rt2560.c revision 1.18
1 /* $NetBSD: rt2560.c,v 1.18 2008/03/17 17:22:49 xtraeme Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.18 2008/03/17 17:22:49 xtraeme Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/callout.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 #include <machine/endian.h> 44 #include <sys/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 #include <net/if_ether.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_rssadapt.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/ic/rt2560reg.h> 66 #include <dev/ic/rt2560var.h> 67 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcivar.h> 70 #include <dev/pci/pcidevs.h> 71 72 #ifdef RAL_DEBUG 73 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 74 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 75 int rt2560_debug = 0; 76 #else 77 #define DPRINTF(x) 78 #define DPRINTFN(n, x) 79 #endif 80 81 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 82 struct rt2560_tx_ring *, int); 83 static void rt2560_reset_tx_ring(struct rt2560_softc *, 84 struct rt2560_tx_ring *); 85 static void rt2560_free_tx_ring(struct rt2560_softc *, 86 struct rt2560_tx_ring *); 87 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 88 struct rt2560_rx_ring *, int); 89 static void rt2560_reset_rx_ring(struct rt2560_softc *, 90 struct rt2560_rx_ring *); 91 static void rt2560_free_rx_ring(struct rt2560_softc *, 92 struct rt2560_rx_ring *); 93 static struct ieee80211_node * 94 rt2560_node_alloc(struct ieee80211_node_table *); 95 static int rt2560_media_change(struct ifnet *); 96 static void rt2560_next_scan(void *); 97 static void rt2560_iter_func(void *, struct ieee80211_node *); 98 static void rt2560_update_rssadapt(void *); 99 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 100 int); 101 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 102 static void rt2560_encryption_intr(struct rt2560_softc *); 103 static void rt2560_tx_intr(struct rt2560_softc *); 104 static void rt2560_prio_intr(struct rt2560_softc *); 105 static void rt2560_decryption_intr(struct rt2560_softc *); 106 static void rt2560_rx_intr(struct rt2560_softc *); 107 static void rt2560_beacon_expire(struct rt2560_softc *); 108 static void rt2560_wakeup_expire(struct rt2560_softc *); 109 #if NBPFILTER > 0 110 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 111 #endif 112 static int rt2560_ack_rate(struct ieee80211com *, int); 113 static uint16_t rt2560_txtime(int, int, uint32_t); 114 static uint8_t rt2560_plcp_signal(int); 115 static void rt2560_setup_tx_desc(struct rt2560_softc *, 116 struct rt2560_tx_desc *, uint32_t, int, int, int, 117 bus_addr_t); 118 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 123 struct ieee80211_frame *, uint16_t); 124 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 125 struct ieee80211_node *); 126 static void rt2560_start(struct ifnet *); 127 static void rt2560_watchdog(struct ifnet *); 128 static int rt2560_reset(struct ifnet *); 129 static int rt2560_ioctl(struct ifnet *, u_long, void *); 130 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 131 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 132 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 133 static void rt2560_set_chan(struct rt2560_softc *, 134 struct ieee80211_channel *); 135 static void rt2560_disable_rf_tune(struct rt2560_softc *); 136 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 137 static void rt2560_update_plcp(struct rt2560_softc *); 138 static void rt2560_update_slot(struct ifnet *); 139 static void rt2560_set_basicrates(struct rt2560_softc *); 140 static void rt2560_update_led(struct rt2560_softc *, int, int); 141 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 142 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 143 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 144 static void rt2560_update_promisc(struct rt2560_softc *); 145 static void rt2560_set_txantenna(struct rt2560_softc *, int); 146 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 147 static const char *rt2560_get_rf(int); 148 static void rt2560_read_eeprom(struct rt2560_softc *); 149 static int rt2560_bbp_init(struct rt2560_softc *); 150 static int rt2560_init(struct ifnet *); 151 static void rt2560_stop(struct ifnet *, int); 152 153 /* 154 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 155 */ 156 static const struct ieee80211_rateset rt2560_rateset_11a = 157 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 158 159 static const struct ieee80211_rateset rt2560_rateset_11b = 160 { 4, { 2, 4, 11, 22 } }; 161 162 static const struct ieee80211_rateset rt2560_rateset_11g = 163 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 164 165 /* 166 * Default values for MAC registers; values taken from the reference driver. 167 */ 168 static const struct { 169 uint32_t reg; 170 uint32_t val; 171 } rt2560_def_mac[] = { 172 { RT2560_PSCSR0, 0x00020002 }, 173 { RT2560_PSCSR1, 0x00000002 }, 174 { RT2560_PSCSR2, 0x00020002 }, 175 { RT2560_PSCSR3, 0x00000002 }, 176 { RT2560_TIMECSR, 0x00003f21 }, 177 { RT2560_CSR9, 0x00000780 }, 178 { RT2560_CSR11, 0x07041483 }, 179 { RT2560_CNT3, 0x00000000 }, 180 { RT2560_TXCSR1, 0x07614562 }, 181 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 182 { RT2560_ACKPCTCSR, 0x7038140a }, 183 { RT2560_ARTCSR1, 0x1d21252d }, 184 { RT2560_ARTCSR2, 0x1919191d }, 185 { RT2560_RXCSR0, 0xffffffff }, 186 { RT2560_RXCSR3, 0xb3aab3af }, 187 { RT2560_PCICSR, 0x000003b8 }, 188 { RT2560_PWRCSR0, 0x3f3b3100 }, 189 { RT2560_GPIOCSR, 0x0000ff00 }, 190 { RT2560_TESTCSR, 0x000000f0 }, 191 { RT2560_PWRCSR1, 0x000001ff }, 192 { RT2560_MACCSR0, 0x00213223 }, 193 { RT2560_MACCSR1, 0x00235518 }, 194 { RT2560_RLPWCSR, 0x00000040 }, 195 { RT2560_RALINKCSR, 0x9a009a11 }, 196 { RT2560_CSR7, 0xffffffff }, 197 { RT2560_BBPCSR1, 0x82188200 }, 198 { RT2560_TXACKCSR0, 0x00000020 }, 199 { RT2560_SECCSR3, 0x0000e78f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } rt2560_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers; values taken 245 * from the reference driver. 246 */ 247 static const uint32_t rt2560_rf2522_r2[] = { 248 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 249 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 250 }; 251 252 static const uint32_t rt2560_rf2523_r2[] = { 253 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 254 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 255 }; 256 257 static const uint32_t rt2560_rf2524_r2[] = { 258 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 259 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 260 }; 261 262 static const uint32_t rt2560_rf2525_r2[] = { 263 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 264 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 265 }; 266 267 static const uint32_t rt2560_rf2525_hi_r2[] = { 268 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 269 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 270 }; 271 272 static const uint32_t rt2560_rf2525e_r2[] = { 273 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 274 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 275 }; 276 277 static const uint32_t rt2560_rf2526_hi_r2[] = { 278 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 279 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 280 }; 281 282 static const uint32_t rt2560_rf2526_r2[] = { 283 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 284 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 285 }; 286 287 /* 288 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 289 * values taken from the reference driver. 290 */ 291 static const struct { 292 uint8_t chan; 293 uint32_t r1; 294 uint32_t r2; 295 uint32_t r4; 296 } rt2560_rf5222[] = { 297 { 1, 0x08808, 0x0044d, 0x00282 }, 298 { 2, 0x08808, 0x0044e, 0x00282 }, 299 { 3, 0x08808, 0x0044f, 0x00282 }, 300 { 4, 0x08808, 0x00460, 0x00282 }, 301 { 5, 0x08808, 0x00461, 0x00282 }, 302 { 6, 0x08808, 0x00462, 0x00282 }, 303 { 7, 0x08808, 0x00463, 0x00282 }, 304 { 8, 0x08808, 0x00464, 0x00282 }, 305 { 9, 0x08808, 0x00465, 0x00282 }, 306 { 10, 0x08808, 0x00466, 0x00282 }, 307 { 11, 0x08808, 0x00467, 0x00282 }, 308 { 12, 0x08808, 0x00468, 0x00282 }, 309 { 13, 0x08808, 0x00469, 0x00282 }, 310 { 14, 0x08808, 0x0046b, 0x00286 }, 311 312 { 36, 0x08804, 0x06225, 0x00287 }, 313 { 40, 0x08804, 0x06226, 0x00287 }, 314 { 44, 0x08804, 0x06227, 0x00287 }, 315 { 48, 0x08804, 0x06228, 0x00287 }, 316 { 52, 0x08804, 0x06229, 0x00287 }, 317 { 56, 0x08804, 0x0622a, 0x00287 }, 318 { 60, 0x08804, 0x0622b, 0x00287 }, 319 { 64, 0x08804, 0x0622c, 0x00287 }, 320 321 { 100, 0x08804, 0x02200, 0x00283 }, 322 { 104, 0x08804, 0x02201, 0x00283 }, 323 { 108, 0x08804, 0x02202, 0x00283 }, 324 { 112, 0x08804, 0x02203, 0x00283 }, 325 { 116, 0x08804, 0x02204, 0x00283 }, 326 { 120, 0x08804, 0x02205, 0x00283 }, 327 { 124, 0x08804, 0x02206, 0x00283 }, 328 { 128, 0x08804, 0x02207, 0x00283 }, 329 { 132, 0x08804, 0x02208, 0x00283 }, 330 { 136, 0x08804, 0x02209, 0x00283 }, 331 { 140, 0x08804, 0x0220a, 0x00283 }, 332 333 { 149, 0x08808, 0x02429, 0x00281 }, 334 { 153, 0x08808, 0x0242b, 0x00281 }, 335 { 157, 0x08808, 0x0242d, 0x00281 }, 336 { 161, 0x08808, 0x0242f, 0x00281 } 337 }; 338 339 int 340 rt2560_attach(void *xsc, int id) 341 { 342 struct rt2560_softc *sc = xsc; 343 struct ieee80211com *ic = &sc->sc_ic; 344 struct ifnet *ifp = &sc->sc_if; 345 int error, i; 346 347 callout_init(&sc->scan_ch, 0); 348 callout_init(&sc->rssadapt_ch, 0); 349 350 /* retrieve RT2560 rev. no */ 351 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 352 353 /* retrieve MAC address */ 354 rt2560_get_macaddr(sc, ic->ic_myaddr); 355 356 aprint_normal("%s: 802.11 address %s\n", sc->sc_dev.dv_xname, 357 ether_sprintf(ic->ic_myaddr)); 358 359 /* retrieve RF rev. no and various other things from EEPROM */ 360 rt2560_read_eeprom(sc); 361 362 aprint_normal("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 363 sc->sc_dev.dv_xname, sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 364 365 /* 366 * Allocate Tx and Rx rings. 367 */ 368 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 369 if (error != 0) { 370 aprint_error("%s: could not allocate Tx ring\n)", 371 sc->sc_dev.dv_xname); 372 goto fail1; 373 } 374 375 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 376 if (error != 0) { 377 aprint_error("%s: could not allocate ATIM ring\n", 378 sc->sc_dev.dv_xname); 379 goto fail2; 380 } 381 382 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 383 if (error != 0) { 384 aprint_error("%s: could not allocate Prio ring\n", 385 sc->sc_dev.dv_xname); 386 goto fail3; 387 } 388 389 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 390 if (error != 0) { 391 aprint_error("%s: could not allocate Beacon ring\n", 392 sc->sc_dev.dv_xname); 393 goto fail4; 394 } 395 396 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 397 if (error != 0) { 398 aprint_error("%s: could not allocate Rx ring\n", 399 sc->sc_dev.dv_xname); 400 goto fail5; 401 } 402 403 ifp->if_softc = sc; 404 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 405 ifp->if_init = rt2560_init; 406 ifp->if_stop = rt2560_stop; 407 ifp->if_ioctl = rt2560_ioctl; 408 ifp->if_start = rt2560_start; 409 ifp->if_watchdog = rt2560_watchdog; 410 IFQ_SET_READY(&ifp->if_snd); 411 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 412 413 ic->ic_ifp = ifp; 414 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 415 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 416 ic->ic_state = IEEE80211_S_INIT; 417 418 /* set device capabilities */ 419 ic->ic_caps = 420 IEEE80211_C_IBSS | /* IBSS mode supported */ 421 IEEE80211_C_MONITOR | /* monitor mode supported */ 422 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 423 IEEE80211_C_TXPMGT | /* tx power management */ 424 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 425 IEEE80211_C_SHSLOT | /* short slot time supported */ 426 IEEE80211_C_WPA; /* 802.11i */ 427 428 if (sc->rf_rev == RT2560_RF_5222) { 429 /* set supported .11a rates */ 430 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 431 432 /* set supported .11a channels */ 433 for (i = 36; i <= 64; i += 4) { 434 ic->ic_channels[i].ic_freq = 435 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 436 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 437 } 438 for (i = 100; i <= 140; i += 4) { 439 ic->ic_channels[i].ic_freq = 440 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 441 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 442 } 443 for (i = 149; i <= 161; i += 4) { 444 ic->ic_channels[i].ic_freq = 445 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 446 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 447 } 448 } 449 450 /* set supported .11b and .11g rates */ 451 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 452 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 453 454 /* set supported .11b and .11g channels (1 through 14) */ 455 for (i = 1; i <= 14; i++) { 456 ic->ic_channels[i].ic_freq = 457 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 458 ic->ic_channels[i].ic_flags = 459 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 460 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 461 } 462 463 if_attach(ifp); 464 ieee80211_ifattach(ic); 465 ic->ic_node_alloc = rt2560_node_alloc; 466 ic->ic_updateslot = rt2560_update_slot; 467 ic->ic_reset = rt2560_reset; 468 469 /* override state transition machine */ 470 sc->sc_newstate = ic->ic_newstate; 471 ic->ic_newstate = rt2560_newstate; 472 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 473 474 #if NBPFILTER > 0 475 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 476 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 477 #endif 478 479 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 480 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 481 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 482 483 sc->sc_txtap_len = sizeof sc->sc_txtapu; 484 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 485 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 486 487 488 sc->dwelltime = 200; 489 490 ieee80211_announce(ic); 491 492 if (!pmf_device_register(&sc->sc_dev, NULL, NULL)) 493 aprint_error_dev(&sc->sc_dev, "couldn't establish power handler\n"); 494 else 495 pmf_class_network_register(&sc->sc_dev, ifp); 496 497 return 0; 498 499 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 500 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 501 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 502 fail2: rt2560_free_tx_ring(sc, &sc->txq); 503 fail1: 504 return ENXIO; 505 } 506 507 508 int 509 rt2560_detach(void *xsc) 510 { 511 struct rt2560_softc *sc = xsc; 512 struct ifnet *ifp = &sc->sc_if; 513 514 callout_stop(&sc->scan_ch); 515 callout_stop(&sc->rssadapt_ch); 516 517 pmf_device_deregister(&sc->sc_dev); 518 519 rt2560_stop(ifp, 1); 520 521 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 522 if_detach(ifp); 523 524 rt2560_free_tx_ring(sc, &sc->txq); 525 rt2560_free_tx_ring(sc, &sc->atimq); 526 rt2560_free_tx_ring(sc, &sc->prioq); 527 rt2560_free_tx_ring(sc, &sc->bcnq); 528 rt2560_free_rx_ring(sc, &sc->rxq); 529 530 return 0; 531 } 532 533 int 534 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 535 int count) 536 { 537 int i, nsegs, error; 538 539 ring->count = count; 540 ring->queued = 0; 541 ring->cur = ring->next = 0; 542 ring->cur_encrypt = ring->next_encrypt = 0; 543 544 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 545 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 546 if (error != 0) { 547 printf("%s: could not create desc DMA map\n", 548 sc->sc_dev.dv_xname); 549 goto fail; 550 } 551 552 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 553 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 554 if (error != 0) { 555 printf("%s: could not allocate DMA memory\n", 556 sc->sc_dev.dv_xname); 557 goto fail; 558 } 559 560 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 561 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 562 BUS_DMA_NOWAIT); 563 if (error != 0) { 564 printf("%s: could not map desc DMA memory\n", 565 sc->sc_dev.dv_xname); 566 goto fail; 567 } 568 569 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 570 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 571 if (error != 0) { 572 printf("%s: could not load desc DMA map\n", 573 sc->sc_dev.dv_xname); 574 goto fail; 575 } 576 577 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 578 ring->physaddr = ring->map->dm_segs->ds_addr; 579 580 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 581 M_NOWAIT); 582 if (ring->data == NULL) { 583 printf("%s: could not allocate soft data\n", 584 sc->sc_dev.dv_xname); 585 error = ENOMEM; 586 goto fail; 587 } 588 589 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 590 for (i = 0; i < count; i++) { 591 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 592 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 593 &ring->data[i].map); 594 if (error != 0) { 595 printf("%s: could not create DMA map\n", 596 sc->sc_dev.dv_xname); 597 goto fail; 598 } 599 } 600 601 return 0; 602 603 fail: rt2560_free_tx_ring(sc, ring); 604 return error; 605 } 606 607 void 608 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 609 { 610 struct rt2560_tx_desc *desc; 611 struct rt2560_tx_data *data; 612 int i; 613 614 for (i = 0; i < ring->count; i++) { 615 desc = &ring->desc[i]; 616 data = &ring->data[i]; 617 618 if (data->m != NULL) { 619 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 620 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 621 bus_dmamap_unload(sc->sc_dmat, data->map); 622 m_freem(data->m); 623 data->m = NULL; 624 } 625 626 if (data->ni != NULL) { 627 ieee80211_free_node(data->ni); 628 data->ni = NULL; 629 } 630 631 desc->flags = 0; 632 } 633 634 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 635 BUS_DMASYNC_PREWRITE); 636 637 ring->queued = 0; 638 ring->cur = ring->next = 0; 639 ring->cur_encrypt = ring->next_encrypt = 0; 640 } 641 642 void 643 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 644 { 645 struct rt2560_tx_data *data; 646 int i; 647 648 if (ring->desc != NULL) { 649 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 650 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 651 bus_dmamap_unload(sc->sc_dmat, ring->map); 652 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 653 ring->count * RT2560_TX_DESC_SIZE); 654 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 655 } 656 657 if (ring->data != NULL) { 658 for (i = 0; i < ring->count; i++) { 659 data = &ring->data[i]; 660 661 if (data->m != NULL) { 662 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 663 data->map->dm_mapsize, 664 BUS_DMASYNC_POSTWRITE); 665 bus_dmamap_unload(sc->sc_dmat, data->map); 666 m_freem(data->m); 667 } 668 669 if (data->ni != NULL) 670 ieee80211_free_node(data->ni); 671 672 673 if (data->map != NULL) 674 bus_dmamap_destroy(sc->sc_dmat, data->map); 675 } 676 free(ring->data, M_DEVBUF); 677 } 678 } 679 680 int 681 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 682 int count) 683 { 684 struct rt2560_rx_desc *desc; 685 struct rt2560_rx_data *data; 686 int i, nsegs, error; 687 688 ring->count = count; 689 ring->cur = ring->next = 0; 690 ring->cur_decrypt = 0; 691 692 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 693 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 694 if (error != 0) { 695 printf("%s: could not create desc DMA map\n", 696 sc->sc_dev.dv_xname); 697 goto fail; 698 } 699 700 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 701 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 702 if (error != 0) { 703 printf("%s: could not allocate DMA memory\n", 704 sc->sc_dev.dv_xname); 705 goto fail; 706 } 707 708 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 709 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 710 BUS_DMA_NOWAIT); 711 if (error != 0) { 712 printf("%s: could not map desc DMA memory\n", 713 sc->sc_dev.dv_xname); 714 goto fail; 715 } 716 717 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 718 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 719 if (error != 0) { 720 printf("%s: could not load desc DMA map\n", 721 sc->sc_dev.dv_xname); 722 goto fail; 723 } 724 725 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 726 ring->physaddr = ring->map->dm_segs->ds_addr; 727 728 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 729 M_NOWAIT); 730 if (ring->data == NULL) { 731 printf("%s: could not allocate soft data\n", 732 sc->sc_dev.dv_xname); 733 error = ENOMEM; 734 goto fail; 735 } 736 737 /* 738 * Pre-allocate Rx buffers and populate Rx ring. 739 */ 740 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 741 for (i = 0; i < count; i++) { 742 desc = &sc->rxq.desc[i]; 743 data = &sc->rxq.data[i]; 744 745 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 746 0, BUS_DMA_NOWAIT, &data->map); 747 if (error != 0) { 748 printf("%s: could not create DMA map\n", 749 sc->sc_dev.dv_xname); 750 goto fail; 751 } 752 753 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 754 if (data->m == NULL) { 755 printf("%s: could not allocate rx mbuf\n", 756 sc->sc_dev.dv_xname); 757 error = ENOMEM; 758 goto fail; 759 } 760 761 MCLGET(data->m, M_DONTWAIT); 762 if (!(data->m->m_flags & M_EXT)) { 763 printf("%s: could not allocate rx mbuf cluster\n", 764 sc->sc_dev.dv_xname); 765 error = ENOMEM; 766 goto fail; 767 } 768 769 error = bus_dmamap_load(sc->sc_dmat, data->map, 770 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 771 if (error != 0) { 772 printf("%s: could not load rx buf DMA map", 773 sc->sc_dev.dv_xname); 774 goto fail; 775 } 776 777 desc->flags = htole32(RT2560_RX_BUSY); 778 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 779 } 780 781 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 782 BUS_DMASYNC_PREWRITE); 783 784 return 0; 785 786 fail: rt2560_free_rx_ring(sc, ring); 787 return error; 788 } 789 790 void 791 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 792 { 793 int i; 794 795 for (i = 0; i < ring->count; i++) { 796 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 797 ring->data[i].drop = 0; 798 } 799 800 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 801 BUS_DMASYNC_PREWRITE); 802 803 ring->cur = ring->next = 0; 804 ring->cur_decrypt = 0; 805 } 806 807 void 808 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 809 { 810 struct rt2560_rx_data *data; 811 int i; 812 813 if (ring->desc != NULL) { 814 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 815 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 816 bus_dmamap_unload(sc->sc_dmat, ring->map); 817 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 818 ring->count * RT2560_RX_DESC_SIZE); 819 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 820 } 821 822 if (ring->data != NULL) { 823 for (i = 0; i < ring->count; i++) { 824 data = &ring->data[i]; 825 826 if (data->m != NULL) { 827 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 828 data->map->dm_mapsize, 829 BUS_DMASYNC_POSTREAD); 830 bus_dmamap_unload(sc->sc_dmat, data->map); 831 m_freem(data->m); 832 } 833 834 if (data->map != NULL) 835 bus_dmamap_destroy(sc->sc_dmat, data->map); 836 } 837 free(ring->data, M_DEVBUF); 838 } 839 } 840 841 struct ieee80211_node * 842 rt2560_node_alloc(struct ieee80211_node_table *nt) 843 { 844 struct rt2560_node *rn; 845 846 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 847 M_NOWAIT | M_ZERO); 848 849 return (rn != NULL) ? &rn->ni : NULL; 850 } 851 852 int 853 rt2560_media_change(struct ifnet *ifp) 854 { 855 int error; 856 857 error = ieee80211_media_change(ifp); 858 if (error != ENETRESET) 859 return error; 860 861 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 862 rt2560_init(ifp); 863 864 return 0; 865 } 866 867 /* 868 * This function is called periodically (every 200ms) during scanning to 869 * switch from one channel to another. 870 */ 871 void 872 rt2560_next_scan(void *arg) 873 { 874 struct rt2560_softc *sc = arg; 875 struct ieee80211com *ic = &sc->sc_ic; 876 877 if (ic->ic_state == IEEE80211_S_SCAN) 878 ieee80211_next_scan(ic); 879 } 880 881 /* 882 * This function is called for each neighbor node. 883 */ 884 void 885 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 886 { 887 struct rt2560_node *rn = (struct rt2560_node *)ni; 888 889 ieee80211_rssadapt_updatestats(&rn->rssadapt); 890 } 891 892 /* 893 * This function is called periodically (every 100ms) in RUN state to update 894 * the rate adaptation statistics. 895 */ 896 void 897 rt2560_update_rssadapt(void *arg) 898 { 899 struct rt2560_softc *sc = arg; 900 struct ieee80211com *ic = &sc->sc_ic; 901 902 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 903 904 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 905 } 906 907 int 908 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 909 { 910 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 911 enum ieee80211_state ostate; 912 struct ieee80211_node *ni; 913 struct mbuf *m; 914 int error = 0; 915 916 ostate = ic->ic_state; 917 callout_stop(&sc->scan_ch); 918 919 switch (nstate) { 920 case IEEE80211_S_INIT: 921 callout_stop(&sc->rssadapt_ch); 922 923 if (ostate == IEEE80211_S_RUN) { 924 /* abort TSF synchronization */ 925 RAL_WRITE(sc, RT2560_CSR14, 0); 926 927 /* turn association led off */ 928 rt2560_update_led(sc, 0, 0); 929 } 930 break; 931 932 case IEEE80211_S_SCAN: 933 rt2560_set_chan(sc, ic->ic_curchan); 934 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 935 rt2560_next_scan, sc); 936 break; 937 938 case IEEE80211_S_AUTH: 939 rt2560_set_chan(sc, ic->ic_curchan); 940 break; 941 942 case IEEE80211_S_ASSOC: 943 rt2560_set_chan(sc, ic->ic_curchan); 944 break; 945 946 case IEEE80211_S_RUN: 947 rt2560_set_chan(sc, ic->ic_curchan); 948 949 ni = ic->ic_bss; 950 951 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 952 rt2560_update_plcp(sc); 953 rt2560_set_basicrates(sc); 954 rt2560_set_bssid(sc, ni->ni_bssid); 955 } 956 957 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 958 ic->ic_opmode == IEEE80211_M_IBSS) { 959 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 960 if (m == NULL) { 961 printf("%s: could not allocate beacon\n", 962 sc->sc_dev.dv_xname); 963 error = ENOBUFS; 964 break; 965 } 966 967 ieee80211_ref_node(ni); 968 error = rt2560_tx_bcn(sc, m, ni); 969 if (error != 0) 970 break; 971 } 972 973 /* turn assocation led on */ 974 rt2560_update_led(sc, 1, 0); 975 976 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 977 callout_reset(&sc->rssadapt_ch, hz / 10, 978 rt2560_update_rssadapt, sc); 979 rt2560_enable_tsf_sync(sc); 980 } 981 break; 982 } 983 984 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 985 } 986 987 /* 988 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 989 * 93C66). 990 */ 991 uint16_t 992 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 993 { 994 uint32_t tmp; 995 uint16_t val; 996 int n; 997 998 /* clock C once before the first command */ 999 RT2560_EEPROM_CTL(sc, 0); 1000 1001 RT2560_EEPROM_CTL(sc, RT2560_S); 1002 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1003 RT2560_EEPROM_CTL(sc, RT2560_S); 1004 1005 /* write start bit (1) */ 1006 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1007 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1008 1009 /* write READ opcode (10) */ 1010 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1011 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1012 RT2560_EEPROM_CTL(sc, RT2560_S); 1013 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1014 1015 /* write address (A5-A0 or A7-A0) */ 1016 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1017 for (; n >= 0; n--) { 1018 RT2560_EEPROM_CTL(sc, RT2560_S | 1019 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1020 RT2560_EEPROM_CTL(sc, RT2560_S | 1021 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1022 } 1023 1024 RT2560_EEPROM_CTL(sc, RT2560_S); 1025 1026 /* read data Q15-Q0 */ 1027 val = 0; 1028 for (n = 15; n >= 0; n--) { 1029 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1030 tmp = RAL_READ(sc, RT2560_CSR21); 1031 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1032 RT2560_EEPROM_CTL(sc, RT2560_S); 1033 } 1034 1035 RT2560_EEPROM_CTL(sc, 0); 1036 1037 /* clear Chip Select and clock C */ 1038 RT2560_EEPROM_CTL(sc, RT2560_S); 1039 RT2560_EEPROM_CTL(sc, 0); 1040 RT2560_EEPROM_CTL(sc, RT2560_C); 1041 1042 return val; 1043 } 1044 1045 /* 1046 * Some frames were processed by the hardware cipher engine and are ready for 1047 * transmission. 1048 */ 1049 void 1050 rt2560_encryption_intr(struct rt2560_softc *sc) 1051 { 1052 struct rt2560_tx_desc *desc; 1053 int hw; 1054 1055 /* retrieve last descriptor index processed by cipher engine */ 1056 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1057 RT2560_TX_DESC_SIZE; 1058 1059 for (; sc->txq.next_encrypt != hw;) { 1060 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1061 1062 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1063 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1064 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1065 1066 if (le32toh(desc->flags) & 1067 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1068 break; 1069 1070 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1071 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1072 RT2560_TX_CIPHER_TKIP) 1073 desc->eiv = bswap32(desc->eiv); 1074 1075 /* mark the frame ready for transmission */ 1076 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1077 1078 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1079 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1080 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1081 1082 DPRINTFN(15, ("encryption done idx=%u\n", 1083 sc->txq.next_encrypt)); 1084 1085 sc->txq.next_encrypt = 1086 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1087 } 1088 1089 /* kick Tx */ 1090 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1091 } 1092 1093 void 1094 rt2560_tx_intr(struct rt2560_softc *sc) 1095 { 1096 struct ieee80211com *ic = &sc->sc_ic; 1097 struct ifnet *ifp = ic->ic_ifp; 1098 struct rt2560_tx_desc *desc; 1099 struct rt2560_tx_data *data; 1100 struct rt2560_node *rn; 1101 1102 for (;;) { 1103 desc = &sc->txq.desc[sc->txq.next]; 1104 data = &sc->txq.data[sc->txq.next]; 1105 1106 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1107 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1108 BUS_DMASYNC_POSTREAD); 1109 1110 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1111 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1112 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1113 break; 1114 1115 rn = (struct rt2560_node *)data->ni; 1116 1117 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1118 case RT2560_TX_SUCCESS: 1119 DPRINTFN(10, ("data frame sent successfully\n")); 1120 if (data->id.id_node != NULL) { 1121 ieee80211_rssadapt_raise_rate(ic, 1122 &rn->rssadapt, &data->id); 1123 } 1124 ifp->if_opackets++; 1125 break; 1126 1127 case RT2560_TX_SUCCESS_RETRY: 1128 DPRINTFN(9, ("data frame sent after %u retries\n", 1129 (le32toh(desc->flags) >> 5) & 0x7)); 1130 ifp->if_opackets++; 1131 break; 1132 1133 case RT2560_TX_FAIL_RETRY: 1134 DPRINTFN(9, ("sending data frame failed (too much " 1135 "retries)\n")); 1136 if (data->id.id_node != NULL) { 1137 ieee80211_rssadapt_lower_rate(ic, data->ni, 1138 &rn->rssadapt, &data->id); 1139 } 1140 ifp->if_oerrors++; 1141 break; 1142 1143 case RT2560_TX_FAIL_INVALID: 1144 case RT2560_TX_FAIL_OTHER: 1145 default: 1146 printf("%s: sending data frame failed 0x%08x\n", 1147 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1148 ifp->if_oerrors++; 1149 } 1150 1151 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1152 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1153 bus_dmamap_unload(sc->sc_dmat, data->map); 1154 m_freem(data->m); 1155 data->m = NULL; 1156 ieee80211_free_node(data->ni); 1157 data->ni = NULL; 1158 1159 /* descriptor is no longer valid */ 1160 desc->flags &= ~htole32(RT2560_TX_VALID); 1161 1162 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1163 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1164 BUS_DMASYNC_PREWRITE); 1165 1166 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1167 1168 sc->txq.queued--; 1169 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1170 } 1171 1172 sc->sc_tx_timer = 0; 1173 ifp->if_flags &= ~IFF_OACTIVE; 1174 rt2560_start(ifp); 1175 } 1176 1177 void 1178 rt2560_prio_intr(struct rt2560_softc *sc) 1179 { 1180 struct ieee80211com *ic = &sc->sc_ic; 1181 struct ifnet *ifp = ic->ic_ifp; 1182 struct rt2560_tx_desc *desc; 1183 struct rt2560_tx_data *data; 1184 1185 for (;;) { 1186 desc = &sc->prioq.desc[sc->prioq.next]; 1187 data = &sc->prioq.data[sc->prioq.next]; 1188 1189 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1190 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1191 BUS_DMASYNC_POSTREAD); 1192 1193 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1194 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1195 break; 1196 1197 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1198 case RT2560_TX_SUCCESS: 1199 DPRINTFN(10, ("mgt frame sent successfully\n")); 1200 break; 1201 1202 case RT2560_TX_SUCCESS_RETRY: 1203 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1204 (le32toh(desc->flags) >> 5) & 0x7)); 1205 break; 1206 1207 case RT2560_TX_FAIL_RETRY: 1208 DPRINTFN(9, ("sending mgt frame failed (too much " 1209 "retries)\n")); 1210 break; 1211 1212 case RT2560_TX_FAIL_INVALID: 1213 case RT2560_TX_FAIL_OTHER: 1214 default: 1215 printf("%s: sending mgt frame failed 0x%08x\n", 1216 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1217 } 1218 1219 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1220 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1221 bus_dmamap_unload(sc->sc_dmat, data->map); 1222 m_freem(data->m); 1223 data->m = NULL; 1224 ieee80211_free_node(data->ni); 1225 data->ni = NULL; 1226 1227 /* descriptor is no longer valid */ 1228 desc->flags &= ~htole32(RT2560_TX_VALID); 1229 1230 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1231 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1232 BUS_DMASYNC_PREWRITE); 1233 1234 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1235 1236 sc->prioq.queued--; 1237 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1238 } 1239 1240 sc->sc_tx_timer = 0; 1241 ifp->if_flags &= ~IFF_OACTIVE; 1242 rt2560_start(ifp); 1243 } 1244 1245 /* 1246 * Some frames were processed by the hardware cipher engine and are ready for 1247 * transmission to the IEEE802.11 layer. 1248 */ 1249 void 1250 rt2560_decryption_intr(struct rt2560_softc *sc) 1251 { 1252 struct ieee80211com *ic = &sc->sc_ic; 1253 struct ifnet *ifp = ic->ic_ifp; 1254 struct rt2560_rx_desc *desc; 1255 struct rt2560_rx_data *data; 1256 struct rt2560_node *rn; 1257 struct ieee80211_frame *wh; 1258 struct ieee80211_node *ni; 1259 struct mbuf *mnew, *m; 1260 int hw, error; 1261 1262 /* retrieve last decriptor index processed by cipher engine */ 1263 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1264 RT2560_RX_DESC_SIZE; 1265 1266 for (; sc->rxq.cur_decrypt != hw;) { 1267 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1268 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1269 1270 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1271 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1272 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1273 1274 if (le32toh(desc->flags) & 1275 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1276 break; 1277 1278 if (data->drop) { 1279 ifp->if_ierrors++; 1280 goto skip; 1281 } 1282 1283 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1284 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1285 ifp->if_ierrors++; 1286 goto skip; 1287 } 1288 1289 /* 1290 * Try to allocate a new mbuf for this ring element and load it 1291 * before processing the current mbuf. If the ring element 1292 * cannot be loaded, drop the received packet and reuse the old 1293 * mbuf. In the unlikely case that the old mbuf can't be 1294 * reloaded either, explicitly panic. 1295 */ 1296 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1297 if (mnew == NULL) { 1298 ifp->if_ierrors++; 1299 goto skip; 1300 } 1301 1302 MCLGET(mnew, M_DONTWAIT); 1303 if (!(mnew->m_flags & M_EXT)) { 1304 m_freem(mnew); 1305 ifp->if_ierrors++; 1306 goto skip; 1307 } 1308 1309 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1310 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1311 bus_dmamap_unload(sc->sc_dmat, data->map); 1312 1313 error = bus_dmamap_load(sc->sc_dmat, data->map, 1314 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1315 if (error != 0) { 1316 m_freem(mnew); 1317 1318 /* try to reload the old mbuf */ 1319 error = bus_dmamap_load(sc->sc_dmat, data->map, 1320 mtod(data->m, void *), MCLBYTES, NULL, 1321 BUS_DMA_NOWAIT); 1322 if (error != 0) { 1323 /* very unlikely that it will fail... */ 1324 panic("%s: could not load old rx mbuf", 1325 sc->sc_dev.dv_xname); 1326 } 1327 /* physical address may have changed */ 1328 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1329 ifp->if_ierrors++; 1330 goto skip; 1331 } 1332 1333 /* 1334 * New mbuf successfully loaded, update Rx ring and continue 1335 * processing. 1336 */ 1337 m = data->m; 1338 data->m = mnew; 1339 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1340 1341 /* finalize mbuf */ 1342 m->m_pkthdr.rcvif = ifp; 1343 m->m_pkthdr.len = m->m_len = 1344 (le32toh(desc->flags) >> 16) & 0xfff; 1345 1346 #if NBPFILTER > 0 1347 if (sc->sc_drvbpf != NULL) { 1348 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1349 uint32_t tsf_lo, tsf_hi; 1350 1351 /* get timestamp (low and high 32 bits) */ 1352 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1353 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1354 1355 tap->wr_tsf = 1356 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1357 tap->wr_flags = 0; 1358 tap->wr_rate = rt2560_rxrate(desc); 1359 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1360 tap->wr_chan_flags = 1361 htole16(ic->ic_ibss_chan->ic_flags); 1362 tap->wr_antenna = sc->rx_ant; 1363 tap->wr_antsignal = desc->rssi; 1364 1365 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 1366 } 1367 #endif 1368 1369 wh = mtod(m, struct ieee80211_frame *); 1370 ni = ieee80211_find_rxnode(ic, 1371 (struct ieee80211_frame_min *)wh); 1372 1373 /* send the frame to the 802.11 layer */ 1374 ieee80211_input(ic, m, ni, desc->rssi, 0); 1375 1376 /* give rssi to the rate adatation algorithm */ 1377 rn = (struct rt2560_node *)ni; 1378 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1379 1380 /* node is no longer needed */ 1381 ieee80211_free_node(ni); 1382 1383 skip: desc->flags = htole32(RT2560_RX_BUSY); 1384 1385 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1386 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1387 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1388 1389 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1390 1391 sc->rxq.cur_decrypt = 1392 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1393 } 1394 1395 /* 1396 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1397 * without calling if_start(). 1398 */ 1399 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1400 rt2560_start(ifp); 1401 } 1402 1403 /* 1404 * Some frames were received. Pass them to the hardware cipher engine before 1405 * sending them to the 802.11 layer. 1406 */ 1407 void 1408 rt2560_rx_intr(struct rt2560_softc *sc) 1409 { 1410 struct rt2560_rx_desc *desc; 1411 struct rt2560_rx_data *data; 1412 1413 for (;;) { 1414 desc = &sc->rxq.desc[sc->rxq.cur]; 1415 data = &sc->rxq.data[sc->rxq.cur]; 1416 1417 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1418 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1419 BUS_DMASYNC_POSTREAD); 1420 1421 if (le32toh(desc->flags) & 1422 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1423 break; 1424 1425 data->drop = 0; 1426 1427 if (le32toh(desc->flags) & 1428 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1429 /* 1430 * This should not happen since we did not request 1431 * to receive those frames when we filled RXCSR0. 1432 */ 1433 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1434 le32toh(desc->flags))); 1435 data->drop = 1; 1436 } 1437 1438 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1439 DPRINTFN(5, ("bad length\n")); 1440 data->drop = 1; 1441 } 1442 1443 /* mark the frame for decryption */ 1444 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1445 1446 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1447 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1448 BUS_DMASYNC_PREWRITE); 1449 1450 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1451 1452 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1453 } 1454 1455 /* kick decrypt */ 1456 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1457 } 1458 1459 /* 1460 * This function is called periodically in IBSS mode when a new beacon must be 1461 * sent out. 1462 */ 1463 static void 1464 rt2560_beacon_expire(struct rt2560_softc *sc) 1465 { 1466 struct ieee80211com *ic = &sc->sc_ic; 1467 struct rt2560_tx_data *data; 1468 1469 if (ic->ic_opmode != IEEE80211_M_IBSS && 1470 ic->ic_opmode != IEEE80211_M_HOSTAP) 1471 return; 1472 1473 data = &sc->bcnq.data[sc->bcnq.next]; 1474 1475 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1476 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1477 bus_dmamap_unload(sc->sc_dmat, data->map); 1478 1479 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1480 1481 #if NBPFILTER > 0 1482 if (ic->ic_rawbpf != NULL) 1483 bpf_mtap(ic->ic_rawbpf, data->m); 1484 #endif 1485 rt2560_tx_bcn(sc, data->m, data->ni); 1486 1487 DPRINTFN(15, ("beacon expired\n")); 1488 1489 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1490 } 1491 1492 static void 1493 rt2560_wakeup_expire(struct rt2560_softc *sc) 1494 { 1495 DPRINTFN(15, ("wakeup expired\n")); 1496 } 1497 1498 int 1499 rt2560_intr(void *arg) 1500 { 1501 struct rt2560_softc *sc = arg; 1502 struct ifnet *ifp = &sc->sc_if; 1503 uint32_t r; 1504 1505 if (!device_is_active(&sc->sc_dev)) 1506 return 0; 1507 1508 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1509 return 0; /* not for us */ 1510 1511 /* disable interrupts */ 1512 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1513 1514 /* acknowledge interrupts */ 1515 RAL_WRITE(sc, RT2560_CSR7, r); 1516 1517 /* don't re-enable interrupts if we're shutting down */ 1518 if (!(ifp->if_flags & IFF_RUNNING)) 1519 return 0; 1520 1521 if (r & RT2560_BEACON_EXPIRE) 1522 rt2560_beacon_expire(sc); 1523 1524 if (r & RT2560_WAKEUP_EXPIRE) 1525 rt2560_wakeup_expire(sc); 1526 1527 if (r & RT2560_ENCRYPTION_DONE) 1528 rt2560_encryption_intr(sc); 1529 1530 if (r & RT2560_TX_DONE) 1531 rt2560_tx_intr(sc); 1532 1533 if (r & RT2560_PRIO_DONE) 1534 rt2560_prio_intr(sc); 1535 1536 if (r & RT2560_DECRYPTION_DONE) 1537 rt2560_decryption_intr(sc); 1538 1539 if (r & RT2560_RX_DONE) 1540 rt2560_rx_intr(sc); 1541 1542 /* re-enable interrupts */ 1543 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1544 1545 return 1; 1546 } 1547 1548 /* quickly determine if a given rate is CCK or OFDM */ 1549 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1550 1551 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1552 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1553 1554 #define RAL_SIFS 10 /* us */ 1555 1556 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1557 1558 /* 1559 * This function is only used by the Rx radiotap code. It returns the rate at 1560 * which a given frame was received. 1561 */ 1562 #if NBPFILTER > 0 1563 static uint8_t 1564 rt2560_rxrate(struct rt2560_rx_desc *desc) 1565 { 1566 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1567 /* reverse function of rt2560_plcp_signal */ 1568 switch (desc->rate) { 1569 case 0xb: return 12; 1570 case 0xf: return 18; 1571 case 0xa: return 24; 1572 case 0xe: return 36; 1573 case 0x9: return 48; 1574 case 0xd: return 72; 1575 case 0x8: return 96; 1576 case 0xc: return 108; 1577 } 1578 } else { 1579 if (desc->rate == 10) 1580 return 2; 1581 if (desc->rate == 20) 1582 return 4; 1583 if (desc->rate == 55) 1584 return 11; 1585 if (desc->rate == 110) 1586 return 22; 1587 } 1588 return 2; /* should not get there */ 1589 } 1590 #endif 1591 1592 /* 1593 * Return the expected ack rate for a frame transmitted at rate `rate'. 1594 * XXX: this should depend on the destination node basic rate set. 1595 */ 1596 static int 1597 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1598 { 1599 switch (rate) { 1600 /* CCK rates */ 1601 case 2: 1602 return 2; 1603 case 4: 1604 case 11: 1605 case 22: 1606 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1607 1608 /* OFDM rates */ 1609 case 12: 1610 case 18: 1611 return 12; 1612 case 24: 1613 case 36: 1614 return 24; 1615 case 48: 1616 case 72: 1617 case 96: 1618 case 108: 1619 return 48; 1620 } 1621 1622 /* default to 1Mbps */ 1623 return 2; 1624 } 1625 1626 /* 1627 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1628 * The function automatically determines the operating mode depending on the 1629 * given rate. `flags' indicates whether short preamble is in use or not. 1630 */ 1631 static uint16_t 1632 rt2560_txtime(int len, int rate, uint32_t flags) 1633 { 1634 uint16_t txtime; 1635 1636 if (RAL_RATE_IS_OFDM(rate)) { 1637 /* IEEE Std 802.11a-1999, pp. 37 */ 1638 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1639 txtime = 16 + 4 + 4 * txtime + 6; 1640 } else { 1641 /* IEEE Std 802.11b-1999, pp. 28 */ 1642 txtime = (16 * len + rate - 1) / rate; 1643 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1644 txtime += 72 + 24; 1645 else 1646 txtime += 144 + 48; 1647 } 1648 return txtime; 1649 } 1650 1651 static uint8_t 1652 rt2560_plcp_signal(int rate) 1653 { 1654 switch (rate) { 1655 /* CCK rates (returned values are device-dependent) */ 1656 case 2: return 0x0; 1657 case 4: return 0x1; 1658 case 11: return 0x2; 1659 case 22: return 0x3; 1660 1661 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1662 case 12: return 0xb; 1663 case 18: return 0xf; 1664 case 24: return 0xa; 1665 case 36: return 0xe; 1666 case 48: return 0x9; 1667 case 72: return 0xd; 1668 case 96: return 0x8; 1669 case 108: return 0xc; 1670 1671 /* unsupported rates (should not get there) */ 1672 default: return 0xff; 1673 } 1674 } 1675 1676 static void 1677 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1678 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1679 { 1680 struct ieee80211com *ic = &sc->sc_ic; 1681 uint16_t plcp_length; 1682 int remainder; 1683 1684 desc->flags = htole32(flags); 1685 desc->flags |= htole32(len << 16); 1686 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1687 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1688 1689 desc->physaddr = htole32(physaddr); 1690 desc->wme = htole16( 1691 RT2560_AIFSN(2) | 1692 RT2560_LOGCWMIN(3) | 1693 RT2560_LOGCWMAX(8)); 1694 1695 /* setup PLCP fields */ 1696 desc->plcp_signal = rt2560_plcp_signal(rate); 1697 desc->plcp_service = 4; 1698 1699 len += IEEE80211_CRC_LEN; 1700 if (RAL_RATE_IS_OFDM(rate)) { 1701 desc->flags |= htole32(RT2560_TX_OFDM); 1702 1703 plcp_length = len & 0xfff; 1704 desc->plcp_length_hi = plcp_length >> 6; 1705 desc->plcp_length_lo = plcp_length & 0x3f; 1706 } else { 1707 plcp_length = (16 * len + rate - 1) / rate; 1708 if (rate == 22) { 1709 remainder = (16 * len) % 22; 1710 if (remainder != 0 && remainder < 7) 1711 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1712 } 1713 desc->plcp_length_hi = plcp_length >> 8; 1714 desc->plcp_length_lo = plcp_length & 0xff; 1715 1716 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1717 desc->plcp_signal |= 0x08; 1718 } 1719 } 1720 1721 static int 1722 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1723 struct ieee80211_node *ni) 1724 { 1725 struct rt2560_tx_desc *desc; 1726 struct rt2560_tx_data *data; 1727 int rate, error; 1728 1729 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1730 data = &sc->bcnq.data[sc->bcnq.cur]; 1731 1732 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1733 1734 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1735 BUS_DMA_NOWAIT); 1736 if (error != 0) { 1737 printf("%s: could not map mbuf (error %d)\n", 1738 sc->sc_dev.dv_xname, error); 1739 m_freem(m0); 1740 return error; 1741 } 1742 1743 data->m = m0; 1744 data->ni = ni; 1745 1746 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1747 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1748 data->map->dm_segs->ds_addr); 1749 1750 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1751 BUS_DMASYNC_PREWRITE); 1752 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1753 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1754 BUS_DMASYNC_PREWRITE); 1755 1756 return 0; 1757 } 1758 1759 static int 1760 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1761 struct ieee80211_node *ni) 1762 { 1763 struct ieee80211com *ic = &sc->sc_ic; 1764 struct rt2560_tx_desc *desc; 1765 struct rt2560_tx_data *data; 1766 struct ieee80211_frame *wh; 1767 struct ieee80211_key *k; 1768 uint16_t dur; 1769 uint32_t flags = 0; 1770 int rate, error; 1771 1772 desc = &sc->prioq.desc[sc->prioq.cur]; 1773 data = &sc->prioq.data[sc->prioq.cur]; 1774 1775 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1776 1777 wh = mtod(m0, struct ieee80211_frame *); 1778 1779 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1780 k = ieee80211_crypto_encap(ic, ni, m0); 1781 if (k == NULL) { 1782 m_freem(m0); 1783 return ENOBUFS; 1784 } 1785 1786 /* packet header may have moved, reset our local pointer */ 1787 wh = mtod(m0, struct ieee80211_frame *); 1788 } 1789 1790 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1791 BUS_DMA_NOWAIT); 1792 if (error != 0) { 1793 printf("%s: could not map mbuf (error %d)\n", 1794 sc->sc_dev.dv_xname, error); 1795 m_freem(m0); 1796 return error; 1797 } 1798 1799 #if NBPFILTER > 0 1800 if (sc->sc_drvbpf != NULL) { 1801 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1802 1803 tap->wt_flags = 0; 1804 tap->wt_rate = rate; 1805 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1806 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1807 tap->wt_antenna = sc->tx_ant; 1808 1809 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1810 } 1811 #endif 1812 1813 data->m = m0; 1814 data->ni = ni; 1815 1816 wh = mtod(m0, struct ieee80211_frame *); 1817 1818 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1819 flags |= RT2560_TX_ACK; 1820 1821 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1822 RAL_SIFS; 1823 *(uint16_t *)wh->i_dur = htole16(dur); 1824 1825 /* tell hardware to add timestamp for probe responses */ 1826 if ((wh->i_fc[0] & 1827 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1828 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1829 flags |= RT2560_TX_TIMESTAMP; 1830 } 1831 1832 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1833 data->map->dm_segs->ds_addr); 1834 1835 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1836 BUS_DMASYNC_PREWRITE); 1837 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1838 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1839 BUS_DMASYNC_PREWRITE); 1840 1841 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1842 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1843 1844 /* kick prio */ 1845 sc->prioq.queued++; 1846 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1847 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1848 1849 return 0; 1850 } 1851 1852 /* 1853 * Build a RTS control frame. 1854 */ 1855 static struct mbuf * 1856 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1857 uint16_t dur) 1858 { 1859 struct ieee80211_frame_rts *rts; 1860 struct mbuf *m; 1861 1862 MGETHDR(m, M_DONTWAIT, MT_DATA); 1863 if (m == NULL) { 1864 sc->sc_ic.ic_stats.is_tx_nobuf++; 1865 printf("%s: could not allocate RTS frame\n", 1866 sc->sc_dev.dv_xname); 1867 return NULL; 1868 } 1869 1870 rts = mtod(m, struct ieee80211_frame_rts *); 1871 1872 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1873 IEEE80211_FC0_SUBTYPE_RTS; 1874 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1875 *(uint16_t *)rts->i_dur = htole16(dur); 1876 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1877 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1878 1879 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1880 1881 return m; 1882 } 1883 1884 static int 1885 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1886 struct ieee80211_node *ni) 1887 { 1888 struct ieee80211com *ic = &sc->sc_ic; 1889 struct rt2560_tx_desc *desc; 1890 struct rt2560_tx_data *data; 1891 struct rt2560_node *rn; 1892 struct ieee80211_rateset *rs; 1893 struct ieee80211_frame *wh; 1894 struct ieee80211_key *k; 1895 struct mbuf *mnew; 1896 uint16_t dur; 1897 uint32_t flags = 0; 1898 int rate, error; 1899 1900 wh = mtod(m0, struct ieee80211_frame *); 1901 1902 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1903 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1904 rate = rs->rs_rates[ic->ic_fixed_rate]; 1905 } else { 1906 rs = &ni->ni_rates; 1907 rn = (struct rt2560_node *)ni; 1908 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1909 wh, m0->m_pkthdr.len, -1, NULL, 0); 1910 rate = rs->rs_rates[ni->ni_txrate]; 1911 } 1912 rate &= IEEE80211_RATE_VAL; 1913 1914 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1915 k = ieee80211_crypto_encap(ic, ni, m0); 1916 if (k == NULL) { 1917 m_freem(m0); 1918 return ENOBUFS; 1919 } 1920 1921 /* packet header may have moved, reset our local pointer */ 1922 wh = mtod(m0, struct ieee80211_frame *); 1923 } 1924 1925 /* 1926 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1927 * for directed frames only when the length of the MPDU is greater 1928 * than the length threshold indicated by [...]" ic_rtsthreshold. 1929 */ 1930 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1931 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1932 struct mbuf *m; 1933 int rtsrate, ackrate; 1934 1935 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1936 ackrate = rt2560_ack_rate(ic, rate); 1937 1938 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1939 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1940 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1941 3 * RAL_SIFS; 1942 1943 m = rt2560_get_rts(sc, wh, dur); 1944 1945 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1946 data = &sc->txq.data[sc->txq.cur_encrypt]; 1947 1948 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1949 BUS_DMA_NOWAIT); 1950 if (error != 0) { 1951 printf("%s: could not map mbuf (error %d)\n", 1952 sc->sc_dev.dv_xname, error); 1953 m_freem(m); 1954 m_freem(m0); 1955 return error; 1956 } 1957 1958 /* avoid multiple free() of the same node for each fragment */ 1959 ieee80211_ref_node(ni); 1960 1961 data->m = m; 1962 data->ni = ni; 1963 1964 /* RTS frames are not taken into account for rssadapt */ 1965 data->id.id_node = NULL; 1966 1967 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1968 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1969 data->map->dm_segs->ds_addr); 1970 1971 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1972 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1973 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1974 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1975 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1976 1977 sc->txq.queued++; 1978 sc->txq.cur_encrypt = 1979 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1980 1981 /* 1982 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1983 * asynchronous data frame shall be transmitted after the CTS 1984 * frame and a SIFS period. 1985 */ 1986 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1987 } 1988 1989 data = &sc->txq.data[sc->txq.cur_encrypt]; 1990 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1991 1992 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1993 BUS_DMA_NOWAIT); 1994 if (error != 0 && error != EFBIG) { 1995 printf("%s: could not map mbuf (error %d)\n", 1996 sc->sc_dev.dv_xname, error); 1997 m_freem(m0); 1998 return error; 1999 } 2000 if (error != 0) { 2001 /* too many fragments, linearize */ 2002 2003 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2004 if (mnew == NULL) { 2005 m_freem(m0); 2006 return ENOMEM; 2007 } 2008 2009 M_COPY_PKTHDR(mnew, m0); 2010 if (m0->m_pkthdr.len > MHLEN) { 2011 MCLGET(mnew, M_DONTWAIT); 2012 if (!(mnew->m_flags & M_EXT)) { 2013 m_freem(m0); 2014 m_freem(mnew); 2015 return ENOMEM; 2016 } 2017 } 2018 2019 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 2020 m_freem(m0); 2021 mnew->m_len = mnew->m_pkthdr.len; 2022 m0 = mnew; 2023 2024 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2025 BUS_DMA_NOWAIT); 2026 if (error != 0) { 2027 printf("%s: could not map mbuf (error %d)\n", 2028 sc->sc_dev.dv_xname, error); 2029 m_freem(m0); 2030 return error; 2031 } 2032 2033 /* packet header have moved, reset our local pointer */ 2034 wh = mtod(m0, struct ieee80211_frame *); 2035 } 2036 2037 #if NBPFILTER > 0 2038 if (sc->sc_drvbpf != NULL) { 2039 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2040 2041 tap->wt_flags = 0; 2042 tap->wt_rate = rate; 2043 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2044 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2045 tap->wt_antenna = sc->tx_ant; 2046 2047 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2048 } 2049 #endif 2050 2051 data->m = m0; 2052 data->ni = ni; 2053 2054 /* remember link conditions for rate adaptation algorithm */ 2055 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2056 data->id.id_len = m0->m_pkthdr.len; 2057 data->id.id_rateidx = ni->ni_txrate; 2058 data->id.id_node = ni; 2059 data->id.id_rssi = ni->ni_rssi; 2060 } else 2061 data->id.id_node = NULL; 2062 2063 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2064 flags |= RT2560_TX_ACK; 2065 2066 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2067 ic->ic_flags) + RAL_SIFS; 2068 *(uint16_t *)wh->i_dur = htole16(dur); 2069 } 2070 2071 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2072 data->map->dm_segs->ds_addr); 2073 2074 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2075 BUS_DMASYNC_PREWRITE); 2076 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2077 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2078 BUS_DMASYNC_PREWRITE); 2079 2080 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2081 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2082 2083 /* kick encrypt */ 2084 sc->txq.queued++; 2085 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2086 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2087 2088 return 0; 2089 } 2090 2091 static void 2092 rt2560_start(struct ifnet *ifp) 2093 { 2094 struct rt2560_softc *sc = ifp->if_softc; 2095 struct ieee80211com *ic = &sc->sc_ic; 2096 struct mbuf *m0; 2097 struct ieee80211_node *ni; 2098 struct ether_header *eh; 2099 2100 /* 2101 * net80211 may still try to send management frames even if the 2102 * IFF_RUNNING flag is not set... 2103 */ 2104 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2105 return; 2106 2107 for (;;) { 2108 IF_POLL(&ic->ic_mgtq, m0); 2109 if (m0 != NULL) { 2110 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2111 ifp->if_flags |= IFF_OACTIVE; 2112 break; 2113 } 2114 IF_DEQUEUE(&ic->ic_mgtq, m0); 2115 if (m0 == NULL) 2116 break; 2117 2118 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2119 m0->m_pkthdr.rcvif = NULL; 2120 #if NBPFILTER > 0 2121 if (ic->ic_rawbpf != NULL) 2122 bpf_mtap(ic->ic_rawbpf, m0); 2123 #endif 2124 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2125 break; 2126 2127 } else { 2128 if (ic->ic_state != IEEE80211_S_RUN) 2129 break; 2130 IFQ_DEQUEUE(&ifp->if_snd, m0); 2131 if (m0 == NULL) 2132 break; 2133 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2134 ifp->if_flags |= IFF_OACTIVE; 2135 break; 2136 } 2137 2138 if (m0->m_len < sizeof (struct ether_header) && 2139 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2140 continue; 2141 2142 eh = mtod(m0, struct ether_header *); 2143 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2144 if (ni == NULL) { 2145 m_freem(m0); 2146 continue; 2147 } 2148 #if NBPFILTER > 0 2149 if (ifp->if_bpf != NULL) 2150 bpf_mtap(ifp->if_bpf, m0); 2151 #endif 2152 2153 m0 = ieee80211_encap(ic, m0, ni); 2154 if (m0 == NULL) { 2155 ieee80211_free_node(ni); 2156 continue; 2157 } 2158 2159 #if NBPFILTER > 0 2160 if (ic->ic_rawbpf != NULL) 2161 bpf_mtap(ic->ic_rawbpf, m0); 2162 2163 #endif 2164 if (rt2560_tx_data(sc, m0, ni) != 0) { 2165 ieee80211_free_node(ni); 2166 ifp->if_oerrors++; 2167 break; 2168 } 2169 } 2170 2171 sc->sc_tx_timer = 5; 2172 ifp->if_timer = 1; 2173 } 2174 } 2175 2176 static void 2177 rt2560_watchdog(struct ifnet *ifp) 2178 { 2179 struct rt2560_softc *sc = ifp->if_softc; 2180 2181 ifp->if_timer = 0; 2182 2183 if (sc->sc_tx_timer > 0) { 2184 if (--sc->sc_tx_timer == 0) { 2185 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 2186 rt2560_init(ifp); 2187 ifp->if_oerrors++; 2188 return; 2189 } 2190 ifp->if_timer = 1; 2191 } 2192 2193 ieee80211_watchdog(&sc->sc_ic); 2194 } 2195 2196 /* 2197 * This function allows for fast channel switching in monitor mode (used by 2198 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2199 * generate a new beacon frame. 2200 */ 2201 static int 2202 rt2560_reset(struct ifnet *ifp) 2203 { 2204 struct rt2560_softc *sc = ifp->if_softc; 2205 struct ieee80211com *ic = &sc->sc_ic; 2206 2207 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2208 return ENETRESET; 2209 2210 rt2560_set_chan(sc, ic->ic_curchan); 2211 2212 return 0; 2213 } 2214 2215 int 2216 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2217 { 2218 struct rt2560_softc *sc = ifp->if_softc; 2219 struct ieee80211com *ic = &sc->sc_ic; 2220 int s, error = 0; 2221 2222 s = splnet(); 2223 2224 switch (cmd) { 2225 case SIOCSIFFLAGS: 2226 if (ifp->if_flags & IFF_UP) { 2227 if (ifp->if_flags & IFF_RUNNING) 2228 rt2560_update_promisc(sc); 2229 else 2230 rt2560_init(ifp); 2231 } else { 2232 if (ifp->if_flags & IFF_RUNNING) 2233 rt2560_stop(ifp, 1); 2234 } 2235 break; 2236 2237 case SIOCADDMULTI: 2238 case SIOCDELMULTI: 2239 /* XXX no h/w multicast filter? --dyoung */ 2240 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2241 error = 0; 2242 break; 2243 2244 case SIOCS80211CHANNEL: 2245 /* 2246 * This allows for fast channel switching in monitor mode 2247 * (used by kismet). In IBSS mode, we must explicitly reset 2248 * the interface to generate a new beacon frame. 2249 */ 2250 error = ieee80211_ioctl(ic, cmd, data); 2251 if (error == ENETRESET && 2252 ic->ic_opmode == IEEE80211_M_MONITOR) { 2253 rt2560_set_chan(sc, ic->ic_ibss_chan); 2254 error = 0; 2255 } 2256 break; 2257 2258 default: 2259 error = ieee80211_ioctl(ic, cmd, data); 2260 } 2261 2262 if (error == ENETRESET) { 2263 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2264 (IFF_UP | IFF_RUNNING)) 2265 rt2560_init(ifp); 2266 error = 0; 2267 } 2268 2269 splx(s); 2270 2271 return error; 2272 } 2273 2274 static void 2275 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2276 { 2277 uint32_t tmp; 2278 int ntries; 2279 2280 for (ntries = 0; ntries < 100; ntries++) { 2281 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2282 break; 2283 DELAY(1); 2284 } 2285 if (ntries == 100) { 2286 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2287 return; 2288 } 2289 2290 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2291 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2292 2293 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2294 } 2295 2296 static uint8_t 2297 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2298 { 2299 uint32_t val; 2300 int ntries; 2301 2302 val = RT2560_BBP_BUSY | reg << 8; 2303 RAL_WRITE(sc, RT2560_BBPCSR, val); 2304 2305 for (ntries = 0; ntries < 100; ntries++) { 2306 val = RAL_READ(sc, RT2560_BBPCSR); 2307 if (!(val & RT2560_BBP_BUSY)) 2308 return val & 0xff; 2309 DELAY(1); 2310 } 2311 2312 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2313 return 0; 2314 } 2315 2316 static void 2317 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2318 { 2319 uint32_t tmp; 2320 int ntries; 2321 2322 for (ntries = 0; ntries < 100; ntries++) { 2323 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2324 break; 2325 DELAY(1); 2326 } 2327 if (ntries == 100) { 2328 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2329 return; 2330 } 2331 2332 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2333 (reg & 0x3); 2334 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2335 2336 /* remember last written value in sc */ 2337 sc->rf_regs[reg] = val; 2338 2339 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2340 } 2341 2342 static void 2343 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2344 { 2345 struct ieee80211com *ic = &sc->sc_ic; 2346 uint8_t power, tmp; 2347 u_int i, chan; 2348 2349 chan = ieee80211_chan2ieee(ic, c); 2350 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2351 return; 2352 2353 if (IEEE80211_IS_CHAN_2GHZ(c)) 2354 power = min(sc->txpow[chan - 1], 31); 2355 else 2356 power = 31; 2357 2358 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2359 2360 switch (sc->rf_rev) { 2361 case RT2560_RF_2522: 2362 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2363 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2364 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2365 break; 2366 2367 case RT2560_RF_2523: 2368 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2369 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2370 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2371 rt2560_rf_write(sc, RT2560_RF4, 2372 (chan == 14) ? 0x00280 : 0x00286); 2373 break; 2374 2375 case RT2560_RF_2524: 2376 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2377 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2378 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2379 rt2560_rf_write(sc, RT2560_RF4, 2380 (chan == 14) ? 0x00280 : 0x00286); 2381 break; 2382 2383 case RT2560_RF_2525: 2384 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2385 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2386 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2387 rt2560_rf_write(sc, RT2560_RF4, 2388 (chan == 14) ? 0x00280 : 0x00286); 2389 2390 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2391 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2392 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2393 rt2560_rf_write(sc, RT2560_RF4, 2394 (chan == 14) ? 0x00280 : 0x00286); 2395 break; 2396 2397 case RT2560_RF_2525E: 2398 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2399 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2400 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2401 rt2560_rf_write(sc, RT2560_RF4, 2402 (chan == 14) ? 0x00286 : 0x00282); 2403 break; 2404 2405 case RT2560_RF_2526: 2406 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2407 rt2560_rf_write(sc, RT2560_RF4, 2408 (chan & 1) ? 0x00386 : 0x00381); 2409 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2410 2411 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2412 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2413 rt2560_rf_write(sc, RT2560_RF4, 2414 (chan & 1) ? 0x00386 : 0x00381); 2415 break; 2416 2417 /* dual-band RF */ 2418 case RT2560_RF_5222: 2419 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2420 2421 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2422 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2423 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2424 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2425 break; 2426 } 2427 2428 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2429 ic->ic_state != IEEE80211_S_SCAN) { 2430 /* set Japan filter bit for channel 14 */ 2431 tmp = rt2560_bbp_read(sc, 70); 2432 2433 tmp &= ~RT2560_JAPAN_FILTER; 2434 if (chan == 14) 2435 tmp |= RT2560_JAPAN_FILTER; 2436 2437 rt2560_bbp_write(sc, 70, tmp); 2438 2439 DELAY(1000); /* RF needs a 1ms delay here */ 2440 rt2560_disable_rf_tune(sc); 2441 2442 /* clear CRC errors */ 2443 RAL_READ(sc, RT2560_CNT0); 2444 } 2445 } 2446 2447 /* 2448 * Disable RF auto-tuning. 2449 */ 2450 static void 2451 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2452 { 2453 uint32_t tmp; 2454 2455 if (sc->rf_rev != RT2560_RF_2523) { 2456 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2457 rt2560_rf_write(sc, RT2560_RF1, tmp); 2458 } 2459 2460 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2461 rt2560_rf_write(sc, RT2560_RF3, tmp); 2462 2463 DPRINTFN(2, ("disabling RF autotune\n")); 2464 } 2465 2466 /* 2467 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2468 * synchronization. 2469 */ 2470 static void 2471 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2472 { 2473 struct ieee80211com *ic = &sc->sc_ic; 2474 uint16_t logcwmin, preload; 2475 uint32_t tmp; 2476 2477 /* first, disable TSF synchronization */ 2478 RAL_WRITE(sc, RT2560_CSR14, 0); 2479 2480 tmp = 16 * ic->ic_bss->ni_intval; 2481 RAL_WRITE(sc, RT2560_CSR12, tmp); 2482 2483 RAL_WRITE(sc, RT2560_CSR13, 0); 2484 2485 logcwmin = 5; 2486 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2487 tmp = logcwmin << 16 | preload; 2488 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2489 2490 /* finally, enable TSF synchronization */ 2491 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2492 if (ic->ic_opmode == IEEE80211_M_STA) 2493 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2494 else 2495 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2496 RT2560_ENABLE_BEACON_GENERATOR; 2497 RAL_WRITE(sc, RT2560_CSR14, tmp); 2498 2499 DPRINTF(("enabling TSF synchronization\n")); 2500 } 2501 2502 static void 2503 rt2560_update_plcp(struct rt2560_softc *sc) 2504 { 2505 struct ieee80211com *ic = &sc->sc_ic; 2506 2507 /* no short preamble for 1Mbps */ 2508 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2509 2510 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2511 /* values taken from the reference driver */ 2512 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2513 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2514 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2515 } else { 2516 /* same values as above or'ed 0x8 */ 2517 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2518 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2519 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2520 } 2521 2522 DPRINTF(("updating PLCP for %s preamble\n", 2523 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2524 } 2525 2526 /* 2527 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2528 * know how these values are computed. 2529 */ 2530 static void 2531 rt2560_update_slot(struct ifnet *ifp) 2532 { 2533 struct rt2560_softc *sc = ifp->if_softc; 2534 struct ieee80211com *ic = &sc->sc_ic; 2535 uint8_t slottime; 2536 uint16_t sifs, pifs, difs, eifs; 2537 uint32_t tmp; 2538 2539 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2540 2541 /* define the MAC slot boundaries */ 2542 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2543 pifs = sifs + slottime; 2544 difs = sifs + 2 * slottime; 2545 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2546 2547 tmp = RAL_READ(sc, RT2560_CSR11); 2548 tmp = (tmp & ~0x1f00) | slottime << 8; 2549 RAL_WRITE(sc, RT2560_CSR11, tmp); 2550 2551 tmp = pifs << 16 | sifs; 2552 RAL_WRITE(sc, RT2560_CSR18, tmp); 2553 2554 tmp = eifs << 16 | difs; 2555 RAL_WRITE(sc, RT2560_CSR19, tmp); 2556 2557 DPRINTF(("setting slottime to %uus\n", slottime)); 2558 } 2559 2560 static void 2561 rt2560_set_basicrates(struct rt2560_softc *sc) 2562 { 2563 struct ieee80211com *ic = &sc->sc_ic; 2564 2565 /* update basic rate set */ 2566 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2567 /* 11b basic rates: 1, 2Mbps */ 2568 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2569 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2570 /* 11a basic rates: 6, 12, 24Mbps */ 2571 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2572 } else { 2573 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2574 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2575 } 2576 } 2577 2578 static void 2579 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2580 { 2581 uint32_t tmp; 2582 2583 /* set ON period to 70ms and OFF period to 30ms */ 2584 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2585 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2586 } 2587 2588 static void 2589 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2590 { 2591 uint32_t tmp; 2592 2593 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2594 RAL_WRITE(sc, RT2560_CSR5, tmp); 2595 2596 tmp = bssid[4] | bssid[5] << 8; 2597 RAL_WRITE(sc, RT2560_CSR6, tmp); 2598 2599 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2600 } 2601 2602 static void 2603 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2604 { 2605 uint32_t tmp; 2606 2607 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2608 RAL_WRITE(sc, RT2560_CSR3, tmp); 2609 2610 tmp = addr[4] | addr[5] << 8; 2611 RAL_WRITE(sc, RT2560_CSR4, tmp); 2612 2613 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2614 } 2615 2616 static void 2617 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2618 { 2619 uint32_t tmp; 2620 2621 tmp = RAL_READ(sc, RT2560_CSR3); 2622 addr[0] = tmp & 0xff; 2623 addr[1] = (tmp >> 8) & 0xff; 2624 addr[2] = (tmp >> 16) & 0xff; 2625 addr[3] = (tmp >> 24); 2626 2627 tmp = RAL_READ(sc, RT2560_CSR4); 2628 addr[4] = tmp & 0xff; 2629 addr[5] = (tmp >> 8) & 0xff; 2630 } 2631 2632 static void 2633 rt2560_update_promisc(struct rt2560_softc *sc) 2634 { 2635 struct ifnet *ifp = &sc->sc_if; 2636 uint32_t tmp; 2637 2638 tmp = RAL_READ(sc, RT2560_RXCSR0); 2639 2640 tmp &= ~RT2560_DROP_NOT_TO_ME; 2641 if (!(ifp->if_flags & IFF_PROMISC)) 2642 tmp |= RT2560_DROP_NOT_TO_ME; 2643 2644 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2645 2646 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2647 "entering" : "leaving")); 2648 } 2649 2650 static void 2651 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2652 { 2653 uint32_t tmp; 2654 uint8_t tx; 2655 2656 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2657 if (antenna == 1) 2658 tx |= RT2560_BBP_ANTA; 2659 else if (antenna == 2) 2660 tx |= RT2560_BBP_ANTB; 2661 else 2662 tx |= RT2560_BBP_DIVERSITY; 2663 2664 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2665 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2666 sc->rf_rev == RT2560_RF_5222) 2667 tx |= RT2560_BBP_FLIPIQ; 2668 2669 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2670 2671 /* update values for CCK and OFDM in BBPCSR1 */ 2672 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2673 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2674 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2675 } 2676 2677 static void 2678 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2679 { 2680 uint8_t rx; 2681 2682 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2683 if (antenna == 1) 2684 rx |= RT2560_BBP_ANTA; 2685 else if (antenna == 2) 2686 rx |= RT2560_BBP_ANTB; 2687 else 2688 rx |= RT2560_BBP_DIVERSITY; 2689 2690 /* need to force no I/Q flip for RF 2525e and 2526 */ 2691 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2692 rx &= ~RT2560_BBP_FLIPIQ; 2693 2694 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2695 } 2696 2697 static const char * 2698 rt2560_get_rf(int rev) 2699 { 2700 switch (rev) { 2701 case RT2560_RF_2522: return "RT2522"; 2702 case RT2560_RF_2523: return "RT2523"; 2703 case RT2560_RF_2524: return "RT2524"; 2704 case RT2560_RF_2525: return "RT2525"; 2705 case RT2560_RF_2525E: return "RT2525e"; 2706 case RT2560_RF_2526: return "RT2526"; 2707 case RT2560_RF_5222: return "RT5222"; 2708 default: return "unknown"; 2709 } 2710 } 2711 2712 static void 2713 rt2560_read_eeprom(struct rt2560_softc *sc) 2714 { 2715 uint16_t val; 2716 int i; 2717 2718 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2719 sc->rf_rev = (val >> 11) & 0x1f; 2720 sc->hw_radio = (val >> 10) & 0x1; 2721 sc->led_mode = (val >> 6) & 0x7; 2722 sc->rx_ant = (val >> 4) & 0x3; 2723 sc->tx_ant = (val >> 2) & 0x3; 2724 sc->nb_ant = val & 0x3; 2725 2726 /* read default values for BBP registers */ 2727 for (i = 0; i < 16; i++) { 2728 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2729 sc->bbp_prom[i].reg = val >> 8; 2730 sc->bbp_prom[i].val = val & 0xff; 2731 } 2732 2733 /* read Tx power for all b/g channels */ 2734 for (i = 0; i < 14 / 2; i++) { 2735 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2736 sc->txpow[i * 2] = val >> 8; 2737 sc->txpow[i * 2 + 1] = val & 0xff; 2738 } 2739 } 2740 2741 static int 2742 rt2560_bbp_init(struct rt2560_softc *sc) 2743 { 2744 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2745 int i, ntries; 2746 2747 /* wait for BBP to be ready */ 2748 for (ntries = 0; ntries < 100; ntries++) { 2749 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2750 break; 2751 DELAY(1); 2752 } 2753 if (ntries == 100) { 2754 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2755 return EIO; 2756 } 2757 2758 /* initialize BBP registers to default values */ 2759 for (i = 0; i < N(rt2560_def_bbp); i++) { 2760 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2761 rt2560_def_bbp[i].val); 2762 } 2763 #if 0 2764 /* initialize BBP registers to values stored in EEPROM */ 2765 for (i = 0; i < 16; i++) { 2766 if (sc->bbp_prom[i].reg == 0xff) 2767 continue; 2768 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2769 } 2770 #endif 2771 2772 return 0; 2773 #undef N 2774 } 2775 2776 static int 2777 rt2560_init(struct ifnet *ifp) 2778 { 2779 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2780 struct rt2560_softc *sc = ifp->if_softc; 2781 struct ieee80211com *ic = &sc->sc_ic; 2782 uint32_t tmp; 2783 int i; 2784 2785 /* for CardBus, power on the socket */ 2786 if (!(sc->sc_flags & RT2560_ENABLED)) { 2787 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2788 printf("%s: could not enable device\n", 2789 sc->sc_dev.dv_xname); 2790 return EIO; 2791 } 2792 sc->sc_flags |= RT2560_ENABLED; 2793 } 2794 2795 rt2560_stop(ifp, 1); 2796 2797 /* setup tx rings */ 2798 tmp = RT2560_PRIO_RING_COUNT << 24 | 2799 RT2560_ATIM_RING_COUNT << 16 | 2800 RT2560_TX_RING_COUNT << 8 | 2801 RT2560_TX_DESC_SIZE; 2802 2803 /* rings _must_ be initialized in this _exact_ order! */ 2804 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2805 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2806 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2807 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2808 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2809 2810 /* setup rx ring */ 2811 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2812 2813 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2814 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2815 2816 /* initialize MAC registers to default values */ 2817 for (i = 0; i < N(rt2560_def_mac); i++) 2818 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2819 2820 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2821 rt2560_set_macaddr(sc, ic->ic_myaddr); 2822 2823 /* set basic rate set (will be updated later) */ 2824 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2825 2826 rt2560_update_slot(ifp); 2827 rt2560_update_plcp(sc); 2828 rt2560_update_led(sc, 0, 0); 2829 2830 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2831 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2832 2833 if (rt2560_bbp_init(sc) != 0) { 2834 rt2560_stop(ifp, 1); 2835 return EIO; 2836 } 2837 2838 rt2560_set_txantenna(sc, 1); 2839 rt2560_set_rxantenna(sc, 1); 2840 2841 /* set default BSS channel */ 2842 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2843 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2844 2845 /* kick Rx */ 2846 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2847 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2848 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2849 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2850 tmp |= RT2560_DROP_TODS; 2851 if (!(ifp->if_flags & IFF_PROMISC)) 2852 tmp |= RT2560_DROP_NOT_TO_ME; 2853 } 2854 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2855 2856 /* clear old FCS and Rx FIFO errors */ 2857 RAL_READ(sc, RT2560_CNT0); 2858 RAL_READ(sc, RT2560_CNT4); 2859 2860 /* clear any pending interrupts */ 2861 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2862 2863 /* enable interrupts */ 2864 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2865 2866 ifp->if_flags &= ~IFF_OACTIVE; 2867 ifp->if_flags |= IFF_RUNNING; 2868 2869 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2870 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2871 else 2872 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2873 2874 return 0; 2875 #undef N 2876 } 2877 2878 static void 2879 rt2560_stop(struct ifnet *ifp, int disable) 2880 { 2881 struct rt2560_softc *sc = ifp->if_softc; 2882 struct ieee80211com *ic = &sc->sc_ic; 2883 2884 sc->sc_tx_timer = 0; 2885 ifp->if_timer = 0; 2886 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2887 2888 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2889 2890 /* abort Tx */ 2891 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2892 2893 /* disable Rx */ 2894 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2895 2896 /* reset ASIC (and thus, BBP) */ 2897 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2898 RAL_WRITE(sc, RT2560_CSR1, 0); 2899 2900 /* disable interrupts */ 2901 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2902 2903 /* clear any pending interrupt */ 2904 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2905 2906 /* reset Tx and Rx rings */ 2907 rt2560_reset_tx_ring(sc, &sc->txq); 2908 rt2560_reset_tx_ring(sc, &sc->atimq); 2909 rt2560_reset_tx_ring(sc, &sc->prioq); 2910 rt2560_reset_tx_ring(sc, &sc->bcnq); 2911 rt2560_reset_rx_ring(sc, &sc->rxq); 2912 2913 } 2914
Indexes created Sun Oct 19 02:09:48 GMT 2025