rt2560.c revision 1.19.4.2
1 /* $NetBSD: rt2560.c,v 1.19.4.2 2009/09/16 13:37:48 yamt Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.19.4.2 2009/09/16 13:37:48 yamt Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/callout.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 #include <machine/endian.h> 44 #include <sys/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 #include <net/if_ether.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_rssadapt.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/ic/rt2560reg.h> 66 #include <dev/ic/rt2560var.h> 67 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcivar.h> 70 #include <dev/pci/pcidevs.h> 71 72 #ifdef RAL_DEBUG 73 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 74 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 75 int rt2560_debug = 0; 76 #else 77 #define DPRINTF(x) 78 #define DPRINTFN(n, x) 79 #endif 80 81 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 82 struct rt2560_tx_ring *, int); 83 static void rt2560_reset_tx_ring(struct rt2560_softc *, 84 struct rt2560_tx_ring *); 85 static void rt2560_free_tx_ring(struct rt2560_softc *, 86 struct rt2560_tx_ring *); 87 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 88 struct rt2560_rx_ring *, int); 89 static void rt2560_reset_rx_ring(struct rt2560_softc *, 90 struct rt2560_rx_ring *); 91 static void rt2560_free_rx_ring(struct rt2560_softc *, 92 struct rt2560_rx_ring *); 93 static struct ieee80211_node * 94 rt2560_node_alloc(struct ieee80211_node_table *); 95 static int rt2560_media_change(struct ifnet *); 96 static void rt2560_next_scan(void *); 97 static void rt2560_iter_func(void *, struct ieee80211_node *); 98 static void rt2560_update_rssadapt(void *); 99 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 100 int); 101 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 102 static void rt2560_encryption_intr(struct rt2560_softc *); 103 static void rt2560_tx_intr(struct rt2560_softc *); 104 static void rt2560_prio_intr(struct rt2560_softc *); 105 static void rt2560_decryption_intr(struct rt2560_softc *); 106 static void rt2560_rx_intr(struct rt2560_softc *); 107 static void rt2560_beacon_expire(struct rt2560_softc *); 108 static void rt2560_wakeup_expire(struct rt2560_softc *); 109 #if NBPFILTER > 0 110 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 111 #endif 112 static int rt2560_ack_rate(struct ieee80211com *, int); 113 static uint16_t rt2560_txtime(int, int, uint32_t); 114 static uint8_t rt2560_plcp_signal(int); 115 static void rt2560_setup_tx_desc(struct rt2560_softc *, 116 struct rt2560_tx_desc *, uint32_t, int, int, int, 117 bus_addr_t); 118 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 123 struct ieee80211_frame *, uint16_t); 124 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 125 struct ieee80211_node *); 126 static void rt2560_start(struct ifnet *); 127 static void rt2560_watchdog(struct ifnet *); 128 static int rt2560_reset(struct ifnet *); 129 static int rt2560_ioctl(struct ifnet *, u_long, void *); 130 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 131 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 132 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 133 static void rt2560_set_chan(struct rt2560_softc *, 134 struct ieee80211_channel *); 135 static void rt2560_disable_rf_tune(struct rt2560_softc *); 136 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 137 static void rt2560_update_plcp(struct rt2560_softc *); 138 static void rt2560_update_slot(struct ifnet *); 139 static void rt2560_set_basicrates(struct rt2560_softc *); 140 static void rt2560_update_led(struct rt2560_softc *, int, int); 141 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 142 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 143 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 144 static void rt2560_update_promisc(struct rt2560_softc *); 145 static void rt2560_set_txantenna(struct rt2560_softc *, int); 146 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 147 static const char *rt2560_get_rf(int); 148 static void rt2560_read_eeprom(struct rt2560_softc *); 149 static int rt2560_bbp_init(struct rt2560_softc *); 150 static int rt2560_init(struct ifnet *); 151 static void rt2560_stop(struct ifnet *, int); 152 153 /* 154 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 155 */ 156 static const struct ieee80211_rateset rt2560_rateset_11a = 157 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 158 159 static const struct ieee80211_rateset rt2560_rateset_11b = 160 { 4, { 2, 4, 11, 22 } }; 161 162 static const struct ieee80211_rateset rt2560_rateset_11g = 163 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 164 165 /* 166 * Default values for MAC registers; values taken from the reference driver. 167 */ 168 static const struct { 169 uint32_t reg; 170 uint32_t val; 171 } rt2560_def_mac[] = { 172 { RT2560_PSCSR0, 0x00020002 }, 173 { RT2560_PSCSR1, 0x00000002 }, 174 { RT2560_PSCSR2, 0x00020002 }, 175 { RT2560_PSCSR3, 0x00000002 }, 176 { RT2560_TIMECSR, 0x00003f21 }, 177 { RT2560_CSR9, 0x00000780 }, 178 { RT2560_CSR11, 0x07041483 }, 179 { RT2560_CNT3, 0x00000000 }, 180 { RT2560_TXCSR1, 0x07614562 }, 181 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 182 { RT2560_ACKPCTCSR, 0x7038140a }, 183 { RT2560_ARTCSR1, 0x1d21252d }, 184 { RT2560_ARTCSR2, 0x1919191d }, 185 { RT2560_RXCSR0, 0xffffffff }, 186 { RT2560_RXCSR3, 0xb3aab3af }, 187 { RT2560_PCICSR, 0x000003b8 }, 188 { RT2560_PWRCSR0, 0x3f3b3100 }, 189 { RT2560_GPIOCSR, 0x0000ff00 }, 190 { RT2560_TESTCSR, 0x000000f0 }, 191 { RT2560_PWRCSR1, 0x000001ff }, 192 { RT2560_MACCSR0, 0x00213223 }, 193 { RT2560_MACCSR1, 0x00235518 }, 194 { RT2560_RLPWCSR, 0x00000040 }, 195 { RT2560_RALINKCSR, 0x9a009a11 }, 196 { RT2560_CSR7, 0xffffffff }, 197 { RT2560_BBPCSR1, 0x82188200 }, 198 { RT2560_TXACKCSR0, 0x00000020 }, 199 { RT2560_SECCSR3, 0x0000e78f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } rt2560_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers; values taken 245 * from the reference driver. 246 */ 247 static const uint32_t rt2560_rf2522_r2[] = { 248 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 249 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 250 }; 251 252 static const uint32_t rt2560_rf2523_r2[] = { 253 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 254 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 255 }; 256 257 static const uint32_t rt2560_rf2524_r2[] = { 258 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 259 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 260 }; 261 262 static const uint32_t rt2560_rf2525_r2[] = { 263 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 264 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 265 }; 266 267 static const uint32_t rt2560_rf2525_hi_r2[] = { 268 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 269 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 270 }; 271 272 static const uint32_t rt2560_rf2525e_r2[] = { 273 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 274 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 275 }; 276 277 static const uint32_t rt2560_rf2526_hi_r2[] = { 278 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 279 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 280 }; 281 282 static const uint32_t rt2560_rf2526_r2[] = { 283 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 284 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 285 }; 286 287 /* 288 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 289 * values taken from the reference driver. 290 */ 291 static const struct { 292 uint8_t chan; 293 uint32_t r1; 294 uint32_t r2; 295 uint32_t r4; 296 } rt2560_rf5222[] = { 297 { 1, 0x08808, 0x0044d, 0x00282 }, 298 { 2, 0x08808, 0x0044e, 0x00282 }, 299 { 3, 0x08808, 0x0044f, 0x00282 }, 300 { 4, 0x08808, 0x00460, 0x00282 }, 301 { 5, 0x08808, 0x00461, 0x00282 }, 302 { 6, 0x08808, 0x00462, 0x00282 }, 303 { 7, 0x08808, 0x00463, 0x00282 }, 304 { 8, 0x08808, 0x00464, 0x00282 }, 305 { 9, 0x08808, 0x00465, 0x00282 }, 306 { 10, 0x08808, 0x00466, 0x00282 }, 307 { 11, 0x08808, 0x00467, 0x00282 }, 308 { 12, 0x08808, 0x00468, 0x00282 }, 309 { 13, 0x08808, 0x00469, 0x00282 }, 310 { 14, 0x08808, 0x0046b, 0x00286 }, 311 312 { 36, 0x08804, 0x06225, 0x00287 }, 313 { 40, 0x08804, 0x06226, 0x00287 }, 314 { 44, 0x08804, 0x06227, 0x00287 }, 315 { 48, 0x08804, 0x06228, 0x00287 }, 316 { 52, 0x08804, 0x06229, 0x00287 }, 317 { 56, 0x08804, 0x0622a, 0x00287 }, 318 { 60, 0x08804, 0x0622b, 0x00287 }, 319 { 64, 0x08804, 0x0622c, 0x00287 }, 320 321 { 100, 0x08804, 0x02200, 0x00283 }, 322 { 104, 0x08804, 0x02201, 0x00283 }, 323 { 108, 0x08804, 0x02202, 0x00283 }, 324 { 112, 0x08804, 0x02203, 0x00283 }, 325 { 116, 0x08804, 0x02204, 0x00283 }, 326 { 120, 0x08804, 0x02205, 0x00283 }, 327 { 124, 0x08804, 0x02206, 0x00283 }, 328 { 128, 0x08804, 0x02207, 0x00283 }, 329 { 132, 0x08804, 0x02208, 0x00283 }, 330 { 136, 0x08804, 0x02209, 0x00283 }, 331 { 140, 0x08804, 0x0220a, 0x00283 }, 332 333 { 149, 0x08808, 0x02429, 0x00281 }, 334 { 153, 0x08808, 0x0242b, 0x00281 }, 335 { 157, 0x08808, 0x0242d, 0x00281 }, 336 { 161, 0x08808, 0x0242f, 0x00281 } 337 }; 338 339 int 340 rt2560_attach(void *xsc, int id) 341 { 342 struct rt2560_softc *sc = xsc; 343 struct ieee80211com *ic = &sc->sc_ic; 344 struct ifnet *ifp = &sc->sc_if; 345 int error, i; 346 347 callout_init(&sc->scan_ch, 0); 348 callout_init(&sc->rssadapt_ch, 0); 349 350 /* retrieve RT2560 rev. no */ 351 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 352 353 /* retrieve MAC address */ 354 rt2560_get_macaddr(sc, ic->ic_myaddr); 355 356 aprint_normal_dev(&sc->sc_dev, "802.11 address %s\n", 357 ether_sprintf(ic->ic_myaddr)); 358 359 /* retrieve RF rev. no and various other things from EEPROM */ 360 rt2560_read_eeprom(sc); 361 362 aprint_normal_dev(&sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 363 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 364 365 /* 366 * Allocate Tx and Rx rings. 367 */ 368 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 369 if (error != 0) { 370 aprint_error_dev(&sc->sc_dev, "could not allocate Tx ring\n)"); 371 goto fail1; 372 } 373 374 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 375 if (error != 0) { 376 aprint_error_dev(&sc->sc_dev, "could not allocate ATIM ring\n"); 377 goto fail2; 378 } 379 380 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 381 if (error != 0) { 382 aprint_error_dev(&sc->sc_dev, "could not allocate Prio ring\n"); 383 goto fail3; 384 } 385 386 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 387 if (error != 0) { 388 aprint_error_dev(&sc->sc_dev, "could not allocate Beacon ring\n"); 389 goto fail4; 390 } 391 392 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 393 if (error != 0) { 394 aprint_error_dev(&sc->sc_dev, "could not allocate Rx ring\n"); 395 goto fail5; 396 } 397 398 ifp->if_softc = sc; 399 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 400 ifp->if_init = rt2560_init; 401 ifp->if_stop = rt2560_stop; 402 ifp->if_ioctl = rt2560_ioctl; 403 ifp->if_start = rt2560_start; 404 ifp->if_watchdog = rt2560_watchdog; 405 IFQ_SET_READY(&ifp->if_snd); 406 memcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 407 408 ic->ic_ifp = ifp; 409 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 410 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 411 ic->ic_state = IEEE80211_S_INIT; 412 413 /* set device capabilities */ 414 ic->ic_caps = 415 IEEE80211_C_IBSS | /* IBSS mode supported */ 416 IEEE80211_C_MONITOR | /* monitor mode supported */ 417 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 418 IEEE80211_C_TXPMGT | /* tx power management */ 419 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 420 IEEE80211_C_SHSLOT | /* short slot time supported */ 421 IEEE80211_C_WPA; /* 802.11i */ 422 423 if (sc->rf_rev == RT2560_RF_5222) { 424 /* set supported .11a rates */ 425 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 426 427 /* set supported .11a channels */ 428 for (i = 36; i <= 64; i += 4) { 429 ic->ic_channels[i].ic_freq = 430 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 431 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 432 } 433 for (i = 100; i <= 140; i += 4) { 434 ic->ic_channels[i].ic_freq = 435 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 436 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 437 } 438 for (i = 149; i <= 161; i += 4) { 439 ic->ic_channels[i].ic_freq = 440 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 441 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 442 } 443 } 444 445 /* set supported .11b and .11g rates */ 446 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 447 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 448 449 /* set supported .11b and .11g channels (1 through 14) */ 450 for (i = 1; i <= 14; i++) { 451 ic->ic_channels[i].ic_freq = 452 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 453 ic->ic_channels[i].ic_flags = 454 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 455 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 456 } 457 458 if_attach(ifp); 459 ieee80211_ifattach(ic); 460 ic->ic_node_alloc = rt2560_node_alloc; 461 ic->ic_updateslot = rt2560_update_slot; 462 ic->ic_reset = rt2560_reset; 463 464 /* override state transition machine */ 465 sc->sc_newstate = ic->ic_newstate; 466 ic->ic_newstate = rt2560_newstate; 467 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 468 469 #if NBPFILTER > 0 470 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 471 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 472 #endif 473 474 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 475 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 476 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 477 478 sc->sc_txtap_len = sizeof sc->sc_txtapu; 479 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 480 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 481 482 483 sc->dwelltime = 200; 484 485 ieee80211_announce(ic); 486 487 if (pmf_device_register(&sc->sc_dev, NULL, NULL)) 488 pmf_class_network_register(&sc->sc_dev, ifp); 489 else 490 aprint_error_dev(&sc->sc_dev, 491 "couldn't establish power handler\n"); 492 493 return 0; 494 495 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 496 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 497 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 498 fail2: rt2560_free_tx_ring(sc, &sc->txq); 499 fail1: 500 return ENXIO; 501 } 502 503 504 int 505 rt2560_detach(void *xsc) 506 { 507 struct rt2560_softc *sc = xsc; 508 struct ifnet *ifp = &sc->sc_if; 509 510 callout_stop(&sc->scan_ch); 511 callout_stop(&sc->rssadapt_ch); 512 513 pmf_device_deregister(&sc->sc_dev); 514 515 rt2560_stop(ifp, 1); 516 517 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 518 if_detach(ifp); 519 520 rt2560_free_tx_ring(sc, &sc->txq); 521 rt2560_free_tx_ring(sc, &sc->atimq); 522 rt2560_free_tx_ring(sc, &sc->prioq); 523 rt2560_free_tx_ring(sc, &sc->bcnq); 524 rt2560_free_rx_ring(sc, &sc->rxq); 525 526 return 0; 527 } 528 529 int 530 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 531 int count) 532 { 533 int i, nsegs, error; 534 535 ring->count = count; 536 ring->queued = 0; 537 ring->cur = ring->next = 0; 538 ring->cur_encrypt = ring->next_encrypt = 0; 539 540 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 541 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 542 if (error != 0) { 543 aprint_error_dev(&sc->sc_dev, "could not create desc DMA map\n"); 544 goto fail; 545 } 546 547 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 548 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 549 if (error != 0) { 550 aprint_error_dev(&sc->sc_dev, "could not allocate DMA memory\n"); 551 goto fail; 552 } 553 554 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 555 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 556 BUS_DMA_NOWAIT); 557 if (error != 0) { 558 aprint_error_dev(&sc->sc_dev, "could not map desc DMA memory\n"); 559 goto fail; 560 } 561 562 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 563 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 564 if (error != 0) { 565 aprint_error_dev(&sc->sc_dev, "could not load desc DMA map\n"); 566 goto fail; 567 } 568 569 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 570 ring->physaddr = ring->map->dm_segs->ds_addr; 571 572 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 573 M_NOWAIT); 574 if (ring->data == NULL) { 575 aprint_error_dev(&sc->sc_dev, "could not allocate soft data\n"); 576 error = ENOMEM; 577 goto fail; 578 } 579 580 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 581 for (i = 0; i < count; i++) { 582 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 583 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 584 &ring->data[i].map); 585 if (error != 0) { 586 aprint_error_dev(&sc->sc_dev, "could not create DMA map\n"); 587 goto fail; 588 } 589 } 590 591 return 0; 592 593 fail: rt2560_free_tx_ring(sc, ring); 594 return error; 595 } 596 597 void 598 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 599 { 600 struct rt2560_tx_desc *desc; 601 struct rt2560_tx_data *data; 602 int i; 603 604 for (i = 0; i < ring->count; i++) { 605 desc = &ring->desc[i]; 606 data = &ring->data[i]; 607 608 if (data->m != NULL) { 609 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 610 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 611 bus_dmamap_unload(sc->sc_dmat, data->map); 612 m_freem(data->m); 613 data->m = NULL; 614 } 615 616 if (data->ni != NULL) { 617 ieee80211_free_node(data->ni); 618 data->ni = NULL; 619 } 620 621 desc->flags = 0; 622 } 623 624 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 625 BUS_DMASYNC_PREWRITE); 626 627 ring->queued = 0; 628 ring->cur = ring->next = 0; 629 ring->cur_encrypt = ring->next_encrypt = 0; 630 } 631 632 void 633 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 634 { 635 struct rt2560_tx_data *data; 636 int i; 637 638 if (ring->desc != NULL) { 639 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 640 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 641 bus_dmamap_unload(sc->sc_dmat, ring->map); 642 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 643 ring->count * RT2560_TX_DESC_SIZE); 644 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 645 } 646 647 if (ring->data != NULL) { 648 for (i = 0; i < ring->count; i++) { 649 data = &ring->data[i]; 650 651 if (data->m != NULL) { 652 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 653 data->map->dm_mapsize, 654 BUS_DMASYNC_POSTWRITE); 655 bus_dmamap_unload(sc->sc_dmat, data->map); 656 m_freem(data->m); 657 } 658 659 if (data->ni != NULL) 660 ieee80211_free_node(data->ni); 661 662 663 if (data->map != NULL) 664 bus_dmamap_destroy(sc->sc_dmat, data->map); 665 } 666 free(ring->data, M_DEVBUF); 667 } 668 } 669 670 int 671 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 672 int count) 673 { 674 struct rt2560_rx_desc *desc; 675 struct rt2560_rx_data *data; 676 int i, nsegs, error; 677 678 ring->count = count; 679 ring->cur = ring->next = 0; 680 ring->cur_decrypt = 0; 681 682 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 683 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 684 if (error != 0) { 685 aprint_error_dev(&sc->sc_dev, "could not create desc DMA map\n"); 686 goto fail; 687 } 688 689 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 690 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 691 if (error != 0) { 692 aprint_error_dev(&sc->sc_dev, "could not allocate DMA memory\n"); 693 goto fail; 694 } 695 696 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 697 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 698 BUS_DMA_NOWAIT); 699 if (error != 0) { 700 aprint_error_dev(&sc->sc_dev, "could not map desc DMA memory\n"); 701 goto fail; 702 } 703 704 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 705 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 706 if (error != 0) { 707 aprint_error_dev(&sc->sc_dev, "could not load desc DMA map\n"); 708 goto fail; 709 } 710 711 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 712 ring->physaddr = ring->map->dm_segs->ds_addr; 713 714 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 715 M_NOWAIT); 716 if (ring->data == NULL) { 717 aprint_error_dev(&sc->sc_dev, "could not allocate soft data\n"); 718 error = ENOMEM; 719 goto fail; 720 } 721 722 /* 723 * Pre-allocate Rx buffers and populate Rx ring. 724 */ 725 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 726 for (i = 0; i < count; i++) { 727 desc = &sc->rxq.desc[i]; 728 data = &sc->rxq.data[i]; 729 730 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 731 0, BUS_DMA_NOWAIT, &data->map); 732 if (error != 0) { 733 aprint_error_dev(&sc->sc_dev, "could not create DMA map\n"); 734 goto fail; 735 } 736 737 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 738 if (data->m == NULL) { 739 aprint_error_dev(&sc->sc_dev, "could not allocate rx mbuf\n"); 740 error = ENOMEM; 741 goto fail; 742 } 743 744 MCLGET(data->m, M_DONTWAIT); 745 if (!(data->m->m_flags & M_EXT)) { 746 aprint_error_dev(&sc->sc_dev, "could not allocate rx mbuf cluster\n"); 747 error = ENOMEM; 748 goto fail; 749 } 750 751 error = bus_dmamap_load(sc->sc_dmat, data->map, 752 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 753 if (error != 0) { 754 aprint_error_dev(&sc->sc_dev, "could not load rx buf DMA map"); 755 goto fail; 756 } 757 758 desc->flags = htole32(RT2560_RX_BUSY); 759 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 760 } 761 762 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 763 BUS_DMASYNC_PREWRITE); 764 765 return 0; 766 767 fail: rt2560_free_rx_ring(sc, ring); 768 return error; 769 } 770 771 void 772 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 773 { 774 int i; 775 776 for (i = 0; i < ring->count; i++) { 777 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 778 ring->data[i].drop = 0; 779 } 780 781 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 782 BUS_DMASYNC_PREWRITE); 783 784 ring->cur = ring->next = 0; 785 ring->cur_decrypt = 0; 786 } 787 788 void 789 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 790 { 791 struct rt2560_rx_data *data; 792 int i; 793 794 if (ring->desc != NULL) { 795 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 796 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 797 bus_dmamap_unload(sc->sc_dmat, ring->map); 798 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 799 ring->count * RT2560_RX_DESC_SIZE); 800 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 801 } 802 803 if (ring->data != NULL) { 804 for (i = 0; i < ring->count; i++) { 805 data = &ring->data[i]; 806 807 if (data->m != NULL) { 808 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 809 data->map->dm_mapsize, 810 BUS_DMASYNC_POSTREAD); 811 bus_dmamap_unload(sc->sc_dmat, data->map); 812 m_freem(data->m); 813 } 814 815 if (data->map != NULL) 816 bus_dmamap_destroy(sc->sc_dmat, data->map); 817 } 818 free(ring->data, M_DEVBUF); 819 } 820 } 821 822 struct ieee80211_node * 823 rt2560_node_alloc(struct ieee80211_node_table *nt) 824 { 825 struct rt2560_node *rn; 826 827 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 828 M_NOWAIT | M_ZERO); 829 830 return (rn != NULL) ? &rn->ni : NULL; 831 } 832 833 int 834 rt2560_media_change(struct ifnet *ifp) 835 { 836 int error; 837 838 error = ieee80211_media_change(ifp); 839 if (error != ENETRESET) 840 return error; 841 842 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 843 rt2560_init(ifp); 844 845 return 0; 846 } 847 848 /* 849 * This function is called periodically (every 200ms) during scanning to 850 * switch from one channel to another. 851 */ 852 void 853 rt2560_next_scan(void *arg) 854 { 855 struct rt2560_softc *sc = arg; 856 struct ieee80211com *ic = &sc->sc_ic; 857 858 if (ic->ic_state == IEEE80211_S_SCAN) 859 ieee80211_next_scan(ic); 860 } 861 862 /* 863 * This function is called for each neighbor node. 864 */ 865 void 866 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 867 { 868 struct rt2560_node *rn = (struct rt2560_node *)ni; 869 870 ieee80211_rssadapt_updatestats(&rn->rssadapt); 871 } 872 873 /* 874 * This function is called periodically (every 100ms) in RUN state to update 875 * the rate adaptation statistics. 876 */ 877 void 878 rt2560_update_rssadapt(void *arg) 879 { 880 struct rt2560_softc *sc = arg; 881 struct ieee80211com *ic = &sc->sc_ic; 882 883 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 884 885 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 886 } 887 888 int 889 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 890 { 891 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 892 enum ieee80211_state ostate; 893 struct ieee80211_node *ni; 894 struct mbuf *m; 895 int error = 0; 896 897 ostate = ic->ic_state; 898 callout_stop(&sc->scan_ch); 899 900 switch (nstate) { 901 case IEEE80211_S_INIT: 902 callout_stop(&sc->rssadapt_ch); 903 904 if (ostate == IEEE80211_S_RUN) { 905 /* abort TSF synchronization */ 906 RAL_WRITE(sc, RT2560_CSR14, 0); 907 908 /* turn association led off */ 909 rt2560_update_led(sc, 0, 0); 910 } 911 break; 912 913 case IEEE80211_S_SCAN: 914 rt2560_set_chan(sc, ic->ic_curchan); 915 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 916 rt2560_next_scan, sc); 917 break; 918 919 case IEEE80211_S_AUTH: 920 rt2560_set_chan(sc, ic->ic_curchan); 921 break; 922 923 case IEEE80211_S_ASSOC: 924 rt2560_set_chan(sc, ic->ic_curchan); 925 break; 926 927 case IEEE80211_S_RUN: 928 rt2560_set_chan(sc, ic->ic_curchan); 929 930 ni = ic->ic_bss; 931 932 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 933 rt2560_update_plcp(sc); 934 rt2560_set_basicrates(sc); 935 rt2560_set_bssid(sc, ni->ni_bssid); 936 } 937 938 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 939 ic->ic_opmode == IEEE80211_M_IBSS) { 940 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 941 if (m == NULL) { 942 aprint_error_dev(&sc->sc_dev, "could not allocate beacon\n"); 943 error = ENOBUFS; 944 break; 945 } 946 947 ieee80211_ref_node(ni); 948 error = rt2560_tx_bcn(sc, m, ni); 949 if (error != 0) 950 break; 951 } 952 953 /* turn assocation led on */ 954 rt2560_update_led(sc, 1, 0); 955 956 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 957 callout_reset(&sc->rssadapt_ch, hz / 10, 958 rt2560_update_rssadapt, sc); 959 rt2560_enable_tsf_sync(sc); 960 } 961 break; 962 } 963 964 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 965 } 966 967 /* 968 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 969 * 93C66). 970 */ 971 uint16_t 972 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 973 { 974 uint32_t tmp; 975 uint16_t val; 976 int n; 977 978 /* clock C once before the first command */ 979 RT2560_EEPROM_CTL(sc, 0); 980 981 RT2560_EEPROM_CTL(sc, RT2560_S); 982 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 983 RT2560_EEPROM_CTL(sc, RT2560_S); 984 985 /* write start bit (1) */ 986 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 987 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 988 989 /* write READ opcode (10) */ 990 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 991 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 992 RT2560_EEPROM_CTL(sc, RT2560_S); 993 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 994 995 /* write address (A5-A0 or A7-A0) */ 996 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 997 for (; n >= 0; n--) { 998 RT2560_EEPROM_CTL(sc, RT2560_S | 999 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1000 RT2560_EEPROM_CTL(sc, RT2560_S | 1001 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1002 } 1003 1004 RT2560_EEPROM_CTL(sc, RT2560_S); 1005 1006 /* read data Q15-Q0 */ 1007 val = 0; 1008 for (n = 15; n >= 0; n--) { 1009 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1010 tmp = RAL_READ(sc, RT2560_CSR21); 1011 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1012 RT2560_EEPROM_CTL(sc, RT2560_S); 1013 } 1014 1015 RT2560_EEPROM_CTL(sc, 0); 1016 1017 /* clear Chip Select and clock C */ 1018 RT2560_EEPROM_CTL(sc, RT2560_S); 1019 RT2560_EEPROM_CTL(sc, 0); 1020 RT2560_EEPROM_CTL(sc, RT2560_C); 1021 1022 return val; 1023 } 1024 1025 /* 1026 * Some frames were processed by the hardware cipher engine and are ready for 1027 * transmission. 1028 */ 1029 void 1030 rt2560_encryption_intr(struct rt2560_softc *sc) 1031 { 1032 struct rt2560_tx_desc *desc; 1033 int hw; 1034 1035 /* retrieve last descriptor index processed by cipher engine */ 1036 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1037 RT2560_TX_DESC_SIZE; 1038 1039 for (; sc->txq.next_encrypt != hw;) { 1040 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1041 1042 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1043 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1044 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1045 1046 if (le32toh(desc->flags) & 1047 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1048 break; 1049 1050 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1051 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1052 RT2560_TX_CIPHER_TKIP) 1053 desc->eiv = bswap32(desc->eiv); 1054 1055 /* mark the frame ready for transmission */ 1056 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1057 1058 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1059 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1060 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1061 1062 DPRINTFN(15, ("encryption done idx=%u\n", 1063 sc->txq.next_encrypt)); 1064 1065 sc->txq.next_encrypt = 1066 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1067 } 1068 1069 /* kick Tx */ 1070 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1071 } 1072 1073 void 1074 rt2560_tx_intr(struct rt2560_softc *sc) 1075 { 1076 struct ieee80211com *ic = &sc->sc_ic; 1077 struct ifnet *ifp = ic->ic_ifp; 1078 struct rt2560_tx_desc *desc; 1079 struct rt2560_tx_data *data; 1080 struct rt2560_node *rn; 1081 1082 for (;;) { 1083 desc = &sc->txq.desc[sc->txq.next]; 1084 data = &sc->txq.data[sc->txq.next]; 1085 1086 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1087 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1088 BUS_DMASYNC_POSTREAD); 1089 1090 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1091 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1092 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1093 break; 1094 1095 rn = (struct rt2560_node *)data->ni; 1096 1097 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1098 case RT2560_TX_SUCCESS: 1099 DPRINTFN(10, ("data frame sent successfully\n")); 1100 if (data->id.id_node != NULL) { 1101 ieee80211_rssadapt_raise_rate(ic, 1102 &rn->rssadapt, &data->id); 1103 } 1104 ifp->if_opackets++; 1105 break; 1106 1107 case RT2560_TX_SUCCESS_RETRY: 1108 DPRINTFN(9, ("data frame sent after %u retries\n", 1109 (le32toh(desc->flags) >> 5) & 0x7)); 1110 ifp->if_opackets++; 1111 break; 1112 1113 case RT2560_TX_FAIL_RETRY: 1114 DPRINTFN(9, ("sending data frame failed (too much " 1115 "retries)\n")); 1116 if (data->id.id_node != NULL) { 1117 ieee80211_rssadapt_lower_rate(ic, data->ni, 1118 &rn->rssadapt, &data->id); 1119 } 1120 ifp->if_oerrors++; 1121 break; 1122 1123 case RT2560_TX_FAIL_INVALID: 1124 case RT2560_TX_FAIL_OTHER: 1125 default: 1126 aprint_error_dev(&sc->sc_dev, "sending data frame failed 0x%08x\n", 1127 le32toh(desc->flags)); 1128 ifp->if_oerrors++; 1129 } 1130 1131 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1132 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1133 bus_dmamap_unload(sc->sc_dmat, data->map); 1134 m_freem(data->m); 1135 data->m = NULL; 1136 ieee80211_free_node(data->ni); 1137 data->ni = NULL; 1138 1139 /* descriptor is no longer valid */ 1140 desc->flags &= ~htole32(RT2560_TX_VALID); 1141 1142 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1143 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1144 BUS_DMASYNC_PREWRITE); 1145 1146 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1147 1148 sc->txq.queued--; 1149 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1150 } 1151 1152 sc->sc_tx_timer = 0; 1153 ifp->if_flags &= ~IFF_OACTIVE; 1154 rt2560_start(ifp); 1155 } 1156 1157 void 1158 rt2560_prio_intr(struct rt2560_softc *sc) 1159 { 1160 struct ieee80211com *ic = &sc->sc_ic; 1161 struct ifnet *ifp = ic->ic_ifp; 1162 struct rt2560_tx_desc *desc; 1163 struct rt2560_tx_data *data; 1164 1165 for (;;) { 1166 desc = &sc->prioq.desc[sc->prioq.next]; 1167 data = &sc->prioq.data[sc->prioq.next]; 1168 1169 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1170 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1171 BUS_DMASYNC_POSTREAD); 1172 1173 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1174 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1175 break; 1176 1177 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1178 case RT2560_TX_SUCCESS: 1179 DPRINTFN(10, ("mgt frame sent successfully\n")); 1180 break; 1181 1182 case RT2560_TX_SUCCESS_RETRY: 1183 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1184 (le32toh(desc->flags) >> 5) & 0x7)); 1185 break; 1186 1187 case RT2560_TX_FAIL_RETRY: 1188 DPRINTFN(9, ("sending mgt frame failed (too much " 1189 "retries)\n")); 1190 break; 1191 1192 case RT2560_TX_FAIL_INVALID: 1193 case RT2560_TX_FAIL_OTHER: 1194 default: 1195 aprint_error_dev(&sc->sc_dev, "sending mgt frame failed 0x%08x\n", 1196 le32toh(desc->flags)); 1197 } 1198 1199 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1200 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1201 bus_dmamap_unload(sc->sc_dmat, data->map); 1202 m_freem(data->m); 1203 data->m = NULL; 1204 ieee80211_free_node(data->ni); 1205 data->ni = NULL; 1206 1207 /* descriptor is no longer valid */ 1208 desc->flags &= ~htole32(RT2560_TX_VALID); 1209 1210 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1211 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1212 BUS_DMASYNC_PREWRITE); 1213 1214 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1215 1216 sc->prioq.queued--; 1217 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1218 } 1219 1220 sc->sc_tx_timer = 0; 1221 ifp->if_flags &= ~IFF_OACTIVE; 1222 rt2560_start(ifp); 1223 } 1224 1225 /* 1226 * Some frames were processed by the hardware cipher engine and are ready for 1227 * transmission to the IEEE802.11 layer. 1228 */ 1229 void 1230 rt2560_decryption_intr(struct rt2560_softc *sc) 1231 { 1232 struct ieee80211com *ic = &sc->sc_ic; 1233 struct ifnet *ifp = ic->ic_ifp; 1234 struct rt2560_rx_desc *desc; 1235 struct rt2560_rx_data *data; 1236 struct rt2560_node *rn; 1237 struct ieee80211_frame *wh; 1238 struct ieee80211_node *ni; 1239 struct mbuf *mnew, *m; 1240 int hw, error; 1241 1242 /* retrieve last decriptor index processed by cipher engine */ 1243 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1244 RT2560_RX_DESC_SIZE; 1245 1246 for (; sc->rxq.cur_decrypt != hw;) { 1247 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1248 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1249 1250 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1251 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1252 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1253 1254 if (le32toh(desc->flags) & 1255 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1256 break; 1257 1258 if (data->drop) { 1259 ifp->if_ierrors++; 1260 goto skip; 1261 } 1262 1263 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1264 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1265 ifp->if_ierrors++; 1266 goto skip; 1267 } 1268 1269 /* 1270 * Try to allocate a new mbuf for this ring element and load it 1271 * before processing the current mbuf. If the ring element 1272 * cannot be loaded, drop the received packet and reuse the old 1273 * mbuf. In the unlikely case that the old mbuf can't be 1274 * reloaded either, explicitly panic. 1275 */ 1276 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1277 if (mnew == NULL) { 1278 ifp->if_ierrors++; 1279 goto skip; 1280 } 1281 1282 MCLGET(mnew, M_DONTWAIT); 1283 if (!(mnew->m_flags & M_EXT)) { 1284 m_freem(mnew); 1285 ifp->if_ierrors++; 1286 goto skip; 1287 } 1288 1289 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1290 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1291 bus_dmamap_unload(sc->sc_dmat, data->map); 1292 1293 error = bus_dmamap_load(sc->sc_dmat, data->map, 1294 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1295 if (error != 0) { 1296 m_freem(mnew); 1297 1298 /* try to reload the old mbuf */ 1299 error = bus_dmamap_load(sc->sc_dmat, data->map, 1300 mtod(data->m, void *), MCLBYTES, NULL, 1301 BUS_DMA_NOWAIT); 1302 if (error != 0) { 1303 /* very unlikely that it will fail... */ 1304 panic("%s: could not load old rx mbuf", 1305 device_xname(&sc->sc_dev)); 1306 } 1307 /* physical address may have changed */ 1308 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1309 ifp->if_ierrors++; 1310 goto skip; 1311 } 1312 1313 /* 1314 * New mbuf successfully loaded, update Rx ring and continue 1315 * processing. 1316 */ 1317 m = data->m; 1318 data->m = mnew; 1319 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1320 1321 /* finalize mbuf */ 1322 m->m_pkthdr.rcvif = ifp; 1323 m->m_pkthdr.len = m->m_len = 1324 (le32toh(desc->flags) >> 16) & 0xfff; 1325 1326 #if NBPFILTER > 0 1327 if (sc->sc_drvbpf != NULL) { 1328 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1329 uint32_t tsf_lo, tsf_hi; 1330 1331 /* get timestamp (low and high 32 bits) */ 1332 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1333 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1334 1335 tap->wr_tsf = 1336 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1337 tap->wr_flags = 0; 1338 tap->wr_rate = rt2560_rxrate(desc); 1339 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1340 tap->wr_chan_flags = 1341 htole16(ic->ic_ibss_chan->ic_flags); 1342 tap->wr_antenna = sc->rx_ant; 1343 tap->wr_antsignal = desc->rssi; 1344 1345 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 1346 } 1347 #endif 1348 1349 wh = mtod(m, struct ieee80211_frame *); 1350 ni = ieee80211_find_rxnode(ic, 1351 (struct ieee80211_frame_min *)wh); 1352 1353 /* send the frame to the 802.11 layer */ 1354 ieee80211_input(ic, m, ni, desc->rssi, 0); 1355 1356 /* give rssi to the rate adatation algorithm */ 1357 rn = (struct rt2560_node *)ni; 1358 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1359 1360 /* node is no longer needed */ 1361 ieee80211_free_node(ni); 1362 1363 skip: desc->flags = htole32(RT2560_RX_BUSY); 1364 1365 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1366 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1367 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1368 1369 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1370 1371 sc->rxq.cur_decrypt = 1372 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1373 } 1374 1375 /* 1376 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1377 * without calling if_start(). 1378 */ 1379 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1380 rt2560_start(ifp); 1381 } 1382 1383 /* 1384 * Some frames were received. Pass them to the hardware cipher engine before 1385 * sending them to the 802.11 layer. 1386 */ 1387 void 1388 rt2560_rx_intr(struct rt2560_softc *sc) 1389 { 1390 struct rt2560_rx_desc *desc; 1391 struct rt2560_rx_data *data; 1392 1393 for (;;) { 1394 desc = &sc->rxq.desc[sc->rxq.cur]; 1395 data = &sc->rxq.data[sc->rxq.cur]; 1396 1397 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1398 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1399 BUS_DMASYNC_POSTREAD); 1400 1401 if (le32toh(desc->flags) & 1402 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1403 break; 1404 1405 data->drop = 0; 1406 1407 if (le32toh(desc->flags) & 1408 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1409 /* 1410 * This should not happen since we did not request 1411 * to receive those frames when we filled RXCSR0. 1412 */ 1413 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1414 le32toh(desc->flags))); 1415 data->drop = 1; 1416 } 1417 1418 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1419 DPRINTFN(5, ("bad length\n")); 1420 data->drop = 1; 1421 } 1422 1423 /* mark the frame for decryption */ 1424 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1425 1426 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1427 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1428 BUS_DMASYNC_PREWRITE); 1429 1430 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1431 1432 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1433 } 1434 1435 /* kick decrypt */ 1436 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1437 } 1438 1439 /* 1440 * This function is called periodically in IBSS mode when a new beacon must be 1441 * sent out. 1442 */ 1443 static void 1444 rt2560_beacon_expire(struct rt2560_softc *sc) 1445 { 1446 struct ieee80211com *ic = &sc->sc_ic; 1447 struct rt2560_tx_data *data; 1448 1449 if (ic->ic_opmode != IEEE80211_M_IBSS && 1450 ic->ic_opmode != IEEE80211_M_HOSTAP) 1451 return; 1452 1453 data = &sc->bcnq.data[sc->bcnq.next]; 1454 1455 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1456 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1457 bus_dmamap_unload(sc->sc_dmat, data->map); 1458 1459 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1460 1461 #if NBPFILTER > 0 1462 if (ic->ic_rawbpf != NULL) 1463 bpf_mtap(ic->ic_rawbpf, data->m); 1464 #endif 1465 rt2560_tx_bcn(sc, data->m, data->ni); 1466 1467 DPRINTFN(15, ("beacon expired\n")); 1468 1469 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1470 } 1471 1472 static void 1473 rt2560_wakeup_expire(struct rt2560_softc *sc) 1474 { 1475 DPRINTFN(15, ("wakeup expired\n")); 1476 } 1477 1478 int 1479 rt2560_intr(void *arg) 1480 { 1481 struct rt2560_softc *sc = arg; 1482 struct ifnet *ifp = &sc->sc_if; 1483 uint32_t r; 1484 1485 if (!device_is_active(&sc->sc_dev)) 1486 return 0; 1487 1488 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1489 return 0; /* not for us */ 1490 1491 /* disable interrupts */ 1492 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1493 1494 /* acknowledge interrupts */ 1495 RAL_WRITE(sc, RT2560_CSR7, r); 1496 1497 /* don't re-enable interrupts if we're shutting down */ 1498 if (!(ifp->if_flags & IFF_RUNNING)) 1499 return 0; 1500 1501 if (r & RT2560_BEACON_EXPIRE) 1502 rt2560_beacon_expire(sc); 1503 1504 if (r & RT2560_WAKEUP_EXPIRE) 1505 rt2560_wakeup_expire(sc); 1506 1507 if (r & RT2560_ENCRYPTION_DONE) 1508 rt2560_encryption_intr(sc); 1509 1510 if (r & RT2560_TX_DONE) 1511 rt2560_tx_intr(sc); 1512 1513 if (r & RT2560_PRIO_DONE) 1514 rt2560_prio_intr(sc); 1515 1516 if (r & RT2560_DECRYPTION_DONE) 1517 rt2560_decryption_intr(sc); 1518 1519 if (r & RT2560_RX_DONE) 1520 rt2560_rx_intr(sc); 1521 1522 /* re-enable interrupts */ 1523 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1524 1525 return 1; 1526 } 1527 1528 /* quickly determine if a given rate is CCK or OFDM */ 1529 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1530 1531 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1532 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1533 1534 #define RAL_SIFS 10 /* us */ 1535 1536 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1537 1538 /* 1539 * This function is only used by the Rx radiotap code. It returns the rate at 1540 * which a given frame was received. 1541 */ 1542 #if NBPFILTER > 0 1543 static uint8_t 1544 rt2560_rxrate(struct rt2560_rx_desc *desc) 1545 { 1546 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1547 /* reverse function of rt2560_plcp_signal */ 1548 switch (desc->rate) { 1549 case 0xb: return 12; 1550 case 0xf: return 18; 1551 case 0xa: return 24; 1552 case 0xe: return 36; 1553 case 0x9: return 48; 1554 case 0xd: return 72; 1555 case 0x8: return 96; 1556 case 0xc: return 108; 1557 } 1558 } else { 1559 if (desc->rate == 10) 1560 return 2; 1561 if (desc->rate == 20) 1562 return 4; 1563 if (desc->rate == 55) 1564 return 11; 1565 if (desc->rate == 110) 1566 return 22; 1567 } 1568 return 2; /* should not get there */ 1569 } 1570 #endif 1571 1572 /* 1573 * Return the expected ack rate for a frame transmitted at rate `rate'. 1574 * XXX: this should depend on the destination node basic rate set. 1575 */ 1576 static int 1577 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1578 { 1579 switch (rate) { 1580 /* CCK rates */ 1581 case 2: 1582 return 2; 1583 case 4: 1584 case 11: 1585 case 22: 1586 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1587 1588 /* OFDM rates */ 1589 case 12: 1590 case 18: 1591 return 12; 1592 case 24: 1593 case 36: 1594 return 24; 1595 case 48: 1596 case 72: 1597 case 96: 1598 case 108: 1599 return 48; 1600 } 1601 1602 /* default to 1Mbps */ 1603 return 2; 1604 } 1605 1606 /* 1607 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1608 * The function automatically determines the operating mode depending on the 1609 * given rate. `flags' indicates whether short preamble is in use or not. 1610 */ 1611 static uint16_t 1612 rt2560_txtime(int len, int rate, uint32_t flags) 1613 { 1614 uint16_t txtime; 1615 1616 if (RAL_RATE_IS_OFDM(rate)) { 1617 /* IEEE Std 802.11a-1999, pp. 37 */ 1618 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1619 txtime = 16 + 4 + 4 * txtime + 6; 1620 } else { 1621 /* IEEE Std 802.11b-1999, pp. 28 */ 1622 txtime = (16 * len + rate - 1) / rate; 1623 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1624 txtime += 72 + 24; 1625 else 1626 txtime += 144 + 48; 1627 } 1628 return txtime; 1629 } 1630 1631 static uint8_t 1632 rt2560_plcp_signal(int rate) 1633 { 1634 switch (rate) { 1635 /* CCK rates (returned values are device-dependent) */ 1636 case 2: return 0x0; 1637 case 4: return 0x1; 1638 case 11: return 0x2; 1639 case 22: return 0x3; 1640 1641 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1642 case 12: return 0xb; 1643 case 18: return 0xf; 1644 case 24: return 0xa; 1645 case 36: return 0xe; 1646 case 48: return 0x9; 1647 case 72: return 0xd; 1648 case 96: return 0x8; 1649 case 108: return 0xc; 1650 1651 /* unsupported rates (should not get there) */ 1652 default: return 0xff; 1653 } 1654 } 1655 1656 static void 1657 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1658 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1659 { 1660 struct ieee80211com *ic = &sc->sc_ic; 1661 uint16_t plcp_length; 1662 int remainder; 1663 1664 desc->flags = htole32(flags); 1665 desc->flags |= htole32(len << 16); 1666 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1667 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1668 1669 desc->physaddr = htole32(physaddr); 1670 desc->wme = htole16( 1671 RT2560_AIFSN(2) | 1672 RT2560_LOGCWMIN(3) | 1673 RT2560_LOGCWMAX(8)); 1674 1675 /* setup PLCP fields */ 1676 desc->plcp_signal = rt2560_plcp_signal(rate); 1677 desc->plcp_service = 4; 1678 1679 len += IEEE80211_CRC_LEN; 1680 if (RAL_RATE_IS_OFDM(rate)) { 1681 desc->flags |= htole32(RT2560_TX_OFDM); 1682 1683 plcp_length = len & 0xfff; 1684 desc->plcp_length_hi = plcp_length >> 6; 1685 desc->plcp_length_lo = plcp_length & 0x3f; 1686 } else { 1687 plcp_length = (16 * len + rate - 1) / rate; 1688 if (rate == 22) { 1689 remainder = (16 * len) % 22; 1690 if (remainder != 0 && remainder < 7) 1691 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1692 } 1693 desc->plcp_length_hi = plcp_length >> 8; 1694 desc->plcp_length_lo = plcp_length & 0xff; 1695 1696 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1697 desc->plcp_signal |= 0x08; 1698 } 1699 } 1700 1701 static int 1702 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1703 struct ieee80211_node *ni) 1704 { 1705 struct rt2560_tx_desc *desc; 1706 struct rt2560_tx_data *data; 1707 int rate, error; 1708 1709 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1710 data = &sc->bcnq.data[sc->bcnq.cur]; 1711 1712 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1713 1714 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1715 BUS_DMA_NOWAIT); 1716 if (error != 0) { 1717 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1718 error); 1719 m_freem(m0); 1720 return error; 1721 } 1722 1723 data->m = m0; 1724 data->ni = ni; 1725 1726 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1727 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1728 data->map->dm_segs->ds_addr); 1729 1730 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1731 BUS_DMASYNC_PREWRITE); 1732 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1733 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1734 BUS_DMASYNC_PREWRITE); 1735 1736 return 0; 1737 } 1738 1739 static int 1740 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1741 struct ieee80211_node *ni) 1742 { 1743 struct ieee80211com *ic = &sc->sc_ic; 1744 struct rt2560_tx_desc *desc; 1745 struct rt2560_tx_data *data; 1746 struct ieee80211_frame *wh; 1747 struct ieee80211_key *k; 1748 uint16_t dur; 1749 uint32_t flags = 0; 1750 int rate, error; 1751 1752 desc = &sc->prioq.desc[sc->prioq.cur]; 1753 data = &sc->prioq.data[sc->prioq.cur]; 1754 1755 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1756 1757 wh = mtod(m0, struct ieee80211_frame *); 1758 1759 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1760 k = ieee80211_crypto_encap(ic, ni, m0); 1761 if (k == NULL) { 1762 m_freem(m0); 1763 return ENOBUFS; 1764 } 1765 1766 /* packet header may have moved, reset our local pointer */ 1767 wh = mtod(m0, struct ieee80211_frame *); 1768 } 1769 1770 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1771 BUS_DMA_NOWAIT); 1772 if (error != 0) { 1773 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1774 error); 1775 m_freem(m0); 1776 return error; 1777 } 1778 1779 #if NBPFILTER > 0 1780 if (sc->sc_drvbpf != NULL) { 1781 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1782 1783 tap->wt_flags = 0; 1784 tap->wt_rate = rate; 1785 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1786 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1787 tap->wt_antenna = sc->tx_ant; 1788 1789 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1790 } 1791 #endif 1792 1793 data->m = m0; 1794 data->ni = ni; 1795 1796 wh = mtod(m0, struct ieee80211_frame *); 1797 1798 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1799 flags |= RT2560_TX_ACK; 1800 1801 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1802 RAL_SIFS; 1803 *(uint16_t *)wh->i_dur = htole16(dur); 1804 1805 /* tell hardware to add timestamp for probe responses */ 1806 if ((wh->i_fc[0] & 1807 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1808 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1809 flags |= RT2560_TX_TIMESTAMP; 1810 } 1811 1812 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1813 data->map->dm_segs->ds_addr); 1814 1815 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1816 BUS_DMASYNC_PREWRITE); 1817 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1818 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1819 BUS_DMASYNC_PREWRITE); 1820 1821 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1822 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1823 1824 /* kick prio */ 1825 sc->prioq.queued++; 1826 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1827 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1828 1829 return 0; 1830 } 1831 1832 /* 1833 * Build a RTS control frame. 1834 */ 1835 static struct mbuf * 1836 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1837 uint16_t dur) 1838 { 1839 struct ieee80211_frame_rts *rts; 1840 struct mbuf *m; 1841 1842 MGETHDR(m, M_DONTWAIT, MT_DATA); 1843 if (m == NULL) { 1844 sc->sc_ic.ic_stats.is_tx_nobuf++; 1845 aprint_error_dev(&sc->sc_dev, "could not allocate RTS frame\n"); 1846 return NULL; 1847 } 1848 1849 rts = mtod(m, struct ieee80211_frame_rts *); 1850 1851 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1852 IEEE80211_FC0_SUBTYPE_RTS; 1853 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1854 *(uint16_t *)rts->i_dur = htole16(dur); 1855 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1856 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1857 1858 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1859 1860 return m; 1861 } 1862 1863 static int 1864 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1865 struct ieee80211_node *ni) 1866 { 1867 struct ieee80211com *ic = &sc->sc_ic; 1868 struct rt2560_tx_desc *desc; 1869 struct rt2560_tx_data *data; 1870 struct rt2560_node *rn; 1871 struct ieee80211_rateset *rs; 1872 struct ieee80211_frame *wh; 1873 struct ieee80211_key *k; 1874 struct mbuf *mnew; 1875 uint16_t dur; 1876 uint32_t flags = 0; 1877 int rate, error; 1878 1879 wh = mtod(m0, struct ieee80211_frame *); 1880 1881 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1882 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1883 rate = rs->rs_rates[ic->ic_fixed_rate]; 1884 } else { 1885 rs = &ni->ni_rates; 1886 rn = (struct rt2560_node *)ni; 1887 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1888 wh, m0->m_pkthdr.len, -1, NULL, 0); 1889 rate = rs->rs_rates[ni->ni_txrate]; 1890 } 1891 rate &= IEEE80211_RATE_VAL; 1892 1893 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1894 k = ieee80211_crypto_encap(ic, ni, m0); 1895 if (k == NULL) { 1896 m_freem(m0); 1897 return ENOBUFS; 1898 } 1899 1900 /* packet header may have moved, reset our local pointer */ 1901 wh = mtod(m0, struct ieee80211_frame *); 1902 } 1903 1904 /* 1905 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1906 * for directed frames only when the length of the MPDU is greater 1907 * than the length threshold indicated by [...]" ic_rtsthreshold. 1908 */ 1909 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1910 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1911 struct mbuf *m; 1912 int rtsrate, ackrate; 1913 1914 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1915 ackrate = rt2560_ack_rate(ic, rate); 1916 1917 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1918 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1919 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1920 3 * RAL_SIFS; 1921 1922 m = rt2560_get_rts(sc, wh, dur); 1923 1924 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1925 data = &sc->txq.data[sc->txq.cur_encrypt]; 1926 1927 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1928 BUS_DMA_NOWAIT); 1929 if (error != 0) { 1930 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1931 error); 1932 m_freem(m); 1933 m_freem(m0); 1934 return error; 1935 } 1936 1937 /* avoid multiple free() of the same node for each fragment */ 1938 ieee80211_ref_node(ni); 1939 1940 data->m = m; 1941 data->ni = ni; 1942 1943 /* RTS frames are not taken into account for rssadapt */ 1944 data->id.id_node = NULL; 1945 1946 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1947 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1948 data->map->dm_segs->ds_addr); 1949 1950 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1951 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1952 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1953 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1954 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1955 1956 sc->txq.queued++; 1957 sc->txq.cur_encrypt = 1958 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1959 1960 /* 1961 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1962 * asynchronous data frame shall be transmitted after the CTS 1963 * frame and a SIFS period. 1964 */ 1965 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1966 } 1967 1968 data = &sc->txq.data[sc->txq.cur_encrypt]; 1969 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1970 1971 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1972 BUS_DMA_NOWAIT); 1973 if (error != 0 && error != EFBIG) { 1974 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1975 error); 1976 m_freem(m0); 1977 return error; 1978 } 1979 if (error != 0) { 1980 /* too many fragments, linearize */ 1981 1982 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1983 if (mnew == NULL) { 1984 m_freem(m0); 1985 return ENOMEM; 1986 } 1987 1988 M_COPY_PKTHDR(mnew, m0); 1989 if (m0->m_pkthdr.len > MHLEN) { 1990 MCLGET(mnew, M_DONTWAIT); 1991 if (!(mnew->m_flags & M_EXT)) { 1992 m_freem(m0); 1993 m_freem(mnew); 1994 return ENOMEM; 1995 } 1996 } 1997 1998 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 1999 m_freem(m0); 2000 mnew->m_len = mnew->m_pkthdr.len; 2001 m0 = mnew; 2002 2003 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2004 BUS_DMA_NOWAIT); 2005 if (error != 0) { 2006 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 2007 error); 2008 m_freem(m0); 2009 return error; 2010 } 2011 2012 /* packet header have moved, reset our local pointer */ 2013 wh = mtod(m0, struct ieee80211_frame *); 2014 } 2015 2016 #if NBPFILTER > 0 2017 if (sc->sc_drvbpf != NULL) { 2018 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2019 2020 tap->wt_flags = 0; 2021 tap->wt_rate = rate; 2022 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2023 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2024 tap->wt_antenna = sc->tx_ant; 2025 2026 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2027 } 2028 #endif 2029 2030 data->m = m0; 2031 data->ni = ni; 2032 2033 /* remember link conditions for rate adaptation algorithm */ 2034 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2035 data->id.id_len = m0->m_pkthdr.len; 2036 data->id.id_rateidx = ni->ni_txrate; 2037 data->id.id_node = ni; 2038 data->id.id_rssi = ni->ni_rssi; 2039 } else 2040 data->id.id_node = NULL; 2041 2042 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2043 flags |= RT2560_TX_ACK; 2044 2045 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2046 ic->ic_flags) + RAL_SIFS; 2047 *(uint16_t *)wh->i_dur = htole16(dur); 2048 } 2049 2050 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2051 data->map->dm_segs->ds_addr); 2052 2053 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2054 BUS_DMASYNC_PREWRITE); 2055 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2056 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2057 BUS_DMASYNC_PREWRITE); 2058 2059 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2060 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2061 2062 /* kick encrypt */ 2063 sc->txq.queued++; 2064 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2065 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2066 2067 return 0; 2068 } 2069 2070 static void 2071 rt2560_start(struct ifnet *ifp) 2072 { 2073 struct rt2560_softc *sc = ifp->if_softc; 2074 struct ieee80211com *ic = &sc->sc_ic; 2075 struct mbuf *m0; 2076 struct ieee80211_node *ni; 2077 struct ether_header *eh; 2078 2079 /* 2080 * net80211 may still try to send management frames even if the 2081 * IFF_RUNNING flag is not set... 2082 */ 2083 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2084 return; 2085 2086 for (;;) { 2087 IF_POLL(&ic->ic_mgtq, m0); 2088 if (m0 != NULL) { 2089 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2090 ifp->if_flags |= IFF_OACTIVE; 2091 break; 2092 } 2093 IF_DEQUEUE(&ic->ic_mgtq, m0); 2094 if (m0 == NULL) 2095 break; 2096 2097 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2098 m0->m_pkthdr.rcvif = NULL; 2099 #if NBPFILTER > 0 2100 if (ic->ic_rawbpf != NULL) 2101 bpf_mtap(ic->ic_rawbpf, m0); 2102 #endif 2103 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2104 break; 2105 2106 } else { 2107 if (ic->ic_state != IEEE80211_S_RUN) 2108 break; 2109 IFQ_DEQUEUE(&ifp->if_snd, m0); 2110 if (m0 == NULL) 2111 break; 2112 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2113 ifp->if_flags |= IFF_OACTIVE; 2114 break; 2115 } 2116 2117 if (m0->m_len < sizeof (struct ether_header) && 2118 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2119 continue; 2120 2121 eh = mtod(m0, struct ether_header *); 2122 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2123 if (ni == NULL) { 2124 m_freem(m0); 2125 continue; 2126 } 2127 #if NBPFILTER > 0 2128 if (ifp->if_bpf != NULL) 2129 bpf_mtap(ifp->if_bpf, m0); 2130 #endif 2131 2132 m0 = ieee80211_encap(ic, m0, ni); 2133 if (m0 == NULL) { 2134 ieee80211_free_node(ni); 2135 continue; 2136 } 2137 2138 #if NBPFILTER > 0 2139 if (ic->ic_rawbpf != NULL) 2140 bpf_mtap(ic->ic_rawbpf, m0); 2141 2142 #endif 2143 if (rt2560_tx_data(sc, m0, ni) != 0) { 2144 ieee80211_free_node(ni); 2145 ifp->if_oerrors++; 2146 break; 2147 } 2148 } 2149 2150 sc->sc_tx_timer = 5; 2151 ifp->if_timer = 1; 2152 } 2153 } 2154 2155 static void 2156 rt2560_watchdog(struct ifnet *ifp) 2157 { 2158 struct rt2560_softc *sc = ifp->if_softc; 2159 2160 ifp->if_timer = 0; 2161 2162 if (sc->sc_tx_timer > 0) { 2163 if (--sc->sc_tx_timer == 0) { 2164 aprint_error_dev(&sc->sc_dev, "device timeout\n"); 2165 rt2560_init(ifp); 2166 ifp->if_oerrors++; 2167 return; 2168 } 2169 ifp->if_timer = 1; 2170 } 2171 2172 ieee80211_watchdog(&sc->sc_ic); 2173 } 2174 2175 /* 2176 * This function allows for fast channel switching in monitor mode (used by 2177 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2178 * generate a new beacon frame. 2179 */ 2180 static int 2181 rt2560_reset(struct ifnet *ifp) 2182 { 2183 struct rt2560_softc *sc = ifp->if_softc; 2184 struct ieee80211com *ic = &sc->sc_ic; 2185 2186 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2187 return ENETRESET; 2188 2189 rt2560_set_chan(sc, ic->ic_curchan); 2190 2191 return 0; 2192 } 2193 2194 int 2195 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2196 { 2197 struct rt2560_softc *sc = ifp->if_softc; 2198 struct ieee80211com *ic = &sc->sc_ic; 2199 int s, error = 0; 2200 2201 s = splnet(); 2202 2203 switch (cmd) { 2204 case SIOCSIFFLAGS: 2205 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2206 break; 2207 if (ifp->if_flags & IFF_UP) { 2208 if (ifp->if_flags & IFF_RUNNING) 2209 rt2560_update_promisc(sc); 2210 else 2211 rt2560_init(ifp); 2212 } else { 2213 if (ifp->if_flags & IFF_RUNNING) 2214 rt2560_stop(ifp, 1); 2215 } 2216 break; 2217 2218 case SIOCADDMULTI: 2219 case SIOCDELMULTI: 2220 /* XXX no h/w multicast filter? --dyoung */ 2221 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2222 error = 0; 2223 break; 2224 2225 case SIOCS80211CHANNEL: 2226 /* 2227 * This allows for fast channel switching in monitor mode 2228 * (used by kismet). In IBSS mode, we must explicitly reset 2229 * the interface to generate a new beacon frame. 2230 */ 2231 error = ieee80211_ioctl(ic, cmd, data); 2232 if (error == ENETRESET && 2233 ic->ic_opmode == IEEE80211_M_MONITOR) { 2234 rt2560_set_chan(sc, ic->ic_ibss_chan); 2235 error = 0; 2236 } 2237 break; 2238 2239 default: 2240 error = ieee80211_ioctl(ic, cmd, data); 2241 } 2242 2243 if (error == ENETRESET) { 2244 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2245 (IFF_UP | IFF_RUNNING)) 2246 rt2560_init(ifp); 2247 error = 0; 2248 } 2249 2250 splx(s); 2251 2252 return error; 2253 } 2254 2255 static void 2256 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2257 { 2258 uint32_t tmp; 2259 int ntries; 2260 2261 for (ntries = 0; ntries < 100; ntries++) { 2262 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2263 break; 2264 DELAY(1); 2265 } 2266 if (ntries == 100) { 2267 aprint_error_dev(&sc->sc_dev, "could not write to BBP\n"); 2268 return; 2269 } 2270 2271 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2272 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2273 2274 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2275 } 2276 2277 static uint8_t 2278 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2279 { 2280 uint32_t val; 2281 int ntries; 2282 2283 val = RT2560_BBP_BUSY | reg << 8; 2284 RAL_WRITE(sc, RT2560_BBPCSR, val); 2285 2286 for (ntries = 0; ntries < 100; ntries++) { 2287 val = RAL_READ(sc, RT2560_BBPCSR); 2288 if (!(val & RT2560_BBP_BUSY)) 2289 return val & 0xff; 2290 DELAY(1); 2291 } 2292 2293 aprint_error_dev(&sc->sc_dev, "could not read from BBP\n"); 2294 return 0; 2295 } 2296 2297 static void 2298 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2299 { 2300 uint32_t tmp; 2301 int ntries; 2302 2303 for (ntries = 0; ntries < 100; ntries++) { 2304 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2305 break; 2306 DELAY(1); 2307 } 2308 if (ntries == 100) { 2309 aprint_error_dev(&sc->sc_dev, "could not write to RF\n"); 2310 return; 2311 } 2312 2313 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2314 (reg & 0x3); 2315 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2316 2317 /* remember last written value in sc */ 2318 sc->rf_regs[reg] = val; 2319 2320 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2321 } 2322 2323 static void 2324 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2325 { 2326 struct ieee80211com *ic = &sc->sc_ic; 2327 uint8_t power, tmp; 2328 u_int i, chan; 2329 2330 chan = ieee80211_chan2ieee(ic, c); 2331 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2332 return; 2333 2334 if (IEEE80211_IS_CHAN_2GHZ(c)) 2335 power = min(sc->txpow[chan - 1], 31); 2336 else 2337 power = 31; 2338 2339 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2340 2341 switch (sc->rf_rev) { 2342 case RT2560_RF_2522: 2343 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2344 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2345 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2346 break; 2347 2348 case RT2560_RF_2523: 2349 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2350 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2351 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2352 rt2560_rf_write(sc, RT2560_RF4, 2353 (chan == 14) ? 0x00280 : 0x00286); 2354 break; 2355 2356 case RT2560_RF_2524: 2357 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2358 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2359 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2360 rt2560_rf_write(sc, RT2560_RF4, 2361 (chan == 14) ? 0x00280 : 0x00286); 2362 break; 2363 2364 case RT2560_RF_2525: 2365 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2366 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2367 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2368 rt2560_rf_write(sc, RT2560_RF4, 2369 (chan == 14) ? 0x00280 : 0x00286); 2370 2371 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2372 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2373 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2374 rt2560_rf_write(sc, RT2560_RF4, 2375 (chan == 14) ? 0x00280 : 0x00286); 2376 break; 2377 2378 case RT2560_RF_2525E: 2379 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2380 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2381 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2382 rt2560_rf_write(sc, RT2560_RF4, 2383 (chan == 14) ? 0x00286 : 0x00282); 2384 break; 2385 2386 case RT2560_RF_2526: 2387 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2388 rt2560_rf_write(sc, RT2560_RF4, 2389 (chan & 1) ? 0x00386 : 0x00381); 2390 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2391 2392 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2393 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2394 rt2560_rf_write(sc, RT2560_RF4, 2395 (chan & 1) ? 0x00386 : 0x00381); 2396 break; 2397 2398 /* dual-band RF */ 2399 case RT2560_RF_5222: 2400 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2401 2402 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2403 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2404 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2405 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2406 break; 2407 } 2408 2409 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2410 ic->ic_state != IEEE80211_S_SCAN) { 2411 /* set Japan filter bit for channel 14 */ 2412 tmp = rt2560_bbp_read(sc, 70); 2413 2414 tmp &= ~RT2560_JAPAN_FILTER; 2415 if (chan == 14) 2416 tmp |= RT2560_JAPAN_FILTER; 2417 2418 rt2560_bbp_write(sc, 70, tmp); 2419 2420 DELAY(1000); /* RF needs a 1ms delay here */ 2421 rt2560_disable_rf_tune(sc); 2422 2423 /* clear CRC errors */ 2424 RAL_READ(sc, RT2560_CNT0); 2425 } 2426 } 2427 2428 /* 2429 * Disable RF auto-tuning. 2430 */ 2431 static void 2432 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2433 { 2434 uint32_t tmp; 2435 2436 if (sc->rf_rev != RT2560_RF_2523) { 2437 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2438 rt2560_rf_write(sc, RT2560_RF1, tmp); 2439 } 2440 2441 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2442 rt2560_rf_write(sc, RT2560_RF3, tmp); 2443 2444 DPRINTFN(2, ("disabling RF autotune\n")); 2445 } 2446 2447 /* 2448 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2449 * synchronization. 2450 */ 2451 static void 2452 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2453 { 2454 struct ieee80211com *ic = &sc->sc_ic; 2455 uint16_t logcwmin, preload; 2456 uint32_t tmp; 2457 2458 /* first, disable TSF synchronization */ 2459 RAL_WRITE(sc, RT2560_CSR14, 0); 2460 2461 tmp = 16 * ic->ic_bss->ni_intval; 2462 RAL_WRITE(sc, RT2560_CSR12, tmp); 2463 2464 RAL_WRITE(sc, RT2560_CSR13, 0); 2465 2466 logcwmin = 5; 2467 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2468 tmp = logcwmin << 16 | preload; 2469 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2470 2471 /* finally, enable TSF synchronization */ 2472 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2473 if (ic->ic_opmode == IEEE80211_M_STA) 2474 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2475 else 2476 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2477 RT2560_ENABLE_BEACON_GENERATOR; 2478 RAL_WRITE(sc, RT2560_CSR14, tmp); 2479 2480 DPRINTF(("enabling TSF synchronization\n")); 2481 } 2482 2483 static void 2484 rt2560_update_plcp(struct rt2560_softc *sc) 2485 { 2486 struct ieee80211com *ic = &sc->sc_ic; 2487 2488 /* no short preamble for 1Mbps */ 2489 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2490 2491 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2492 /* values taken from the reference driver */ 2493 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2494 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2495 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2496 } else { 2497 /* same values as above or'ed 0x8 */ 2498 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2499 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2500 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2501 } 2502 2503 DPRINTF(("updating PLCP for %s preamble\n", 2504 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2505 } 2506 2507 /* 2508 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2509 * know how these values are computed. 2510 */ 2511 static void 2512 rt2560_update_slot(struct ifnet *ifp) 2513 { 2514 struct rt2560_softc *sc = ifp->if_softc; 2515 struct ieee80211com *ic = &sc->sc_ic; 2516 uint8_t slottime; 2517 uint16_t sifs, pifs, difs, eifs; 2518 uint32_t tmp; 2519 2520 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2521 2522 /* define the MAC slot boundaries */ 2523 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2524 pifs = sifs + slottime; 2525 difs = sifs + 2 * slottime; 2526 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2527 2528 tmp = RAL_READ(sc, RT2560_CSR11); 2529 tmp = (tmp & ~0x1f00) | slottime << 8; 2530 RAL_WRITE(sc, RT2560_CSR11, tmp); 2531 2532 tmp = pifs << 16 | sifs; 2533 RAL_WRITE(sc, RT2560_CSR18, tmp); 2534 2535 tmp = eifs << 16 | difs; 2536 RAL_WRITE(sc, RT2560_CSR19, tmp); 2537 2538 DPRINTF(("setting slottime to %uus\n", slottime)); 2539 } 2540 2541 static void 2542 rt2560_set_basicrates(struct rt2560_softc *sc) 2543 { 2544 struct ieee80211com *ic = &sc->sc_ic; 2545 2546 /* update basic rate set */ 2547 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2548 /* 11b basic rates: 1, 2Mbps */ 2549 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2550 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2551 /* 11a basic rates: 6, 12, 24Mbps */ 2552 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2553 } else { 2554 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2555 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2556 } 2557 } 2558 2559 static void 2560 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2561 { 2562 uint32_t tmp; 2563 2564 /* set ON period to 70ms and OFF period to 30ms */ 2565 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2566 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2567 } 2568 2569 static void 2570 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2571 { 2572 uint32_t tmp; 2573 2574 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2575 RAL_WRITE(sc, RT2560_CSR5, tmp); 2576 2577 tmp = bssid[4] | bssid[5] << 8; 2578 RAL_WRITE(sc, RT2560_CSR6, tmp); 2579 2580 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2581 } 2582 2583 static void 2584 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2585 { 2586 uint32_t tmp; 2587 2588 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2589 RAL_WRITE(sc, RT2560_CSR3, tmp); 2590 2591 tmp = addr[4] | addr[5] << 8; 2592 RAL_WRITE(sc, RT2560_CSR4, tmp); 2593 2594 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2595 } 2596 2597 static void 2598 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2599 { 2600 uint32_t tmp; 2601 2602 tmp = RAL_READ(sc, RT2560_CSR3); 2603 addr[0] = tmp & 0xff; 2604 addr[1] = (tmp >> 8) & 0xff; 2605 addr[2] = (tmp >> 16) & 0xff; 2606 addr[3] = (tmp >> 24); 2607 2608 tmp = RAL_READ(sc, RT2560_CSR4); 2609 addr[4] = tmp & 0xff; 2610 addr[5] = (tmp >> 8) & 0xff; 2611 } 2612 2613 static void 2614 rt2560_update_promisc(struct rt2560_softc *sc) 2615 { 2616 struct ifnet *ifp = &sc->sc_if; 2617 uint32_t tmp; 2618 2619 tmp = RAL_READ(sc, RT2560_RXCSR0); 2620 2621 tmp &= ~RT2560_DROP_NOT_TO_ME; 2622 if (!(ifp->if_flags & IFF_PROMISC)) 2623 tmp |= RT2560_DROP_NOT_TO_ME; 2624 2625 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2626 2627 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2628 "entering" : "leaving")); 2629 } 2630 2631 static void 2632 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2633 { 2634 uint32_t tmp; 2635 uint8_t tx; 2636 2637 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2638 if (antenna == 1) 2639 tx |= RT2560_BBP_ANTA; 2640 else if (antenna == 2) 2641 tx |= RT2560_BBP_ANTB; 2642 else 2643 tx |= RT2560_BBP_DIVERSITY; 2644 2645 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2646 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2647 sc->rf_rev == RT2560_RF_5222) 2648 tx |= RT2560_BBP_FLIPIQ; 2649 2650 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2651 2652 /* update values for CCK and OFDM in BBPCSR1 */ 2653 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2654 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2655 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2656 } 2657 2658 static void 2659 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2660 { 2661 uint8_t rx; 2662 2663 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2664 if (antenna == 1) 2665 rx |= RT2560_BBP_ANTA; 2666 else if (antenna == 2) 2667 rx |= RT2560_BBP_ANTB; 2668 else 2669 rx |= RT2560_BBP_DIVERSITY; 2670 2671 /* need to force no I/Q flip for RF 2525e and 2526 */ 2672 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2673 rx &= ~RT2560_BBP_FLIPIQ; 2674 2675 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2676 } 2677 2678 static const char * 2679 rt2560_get_rf(int rev) 2680 { 2681 switch (rev) { 2682 case RT2560_RF_2522: return "RT2522"; 2683 case RT2560_RF_2523: return "RT2523"; 2684 case RT2560_RF_2524: return "RT2524"; 2685 case RT2560_RF_2525: return "RT2525"; 2686 case RT2560_RF_2525E: return "RT2525e"; 2687 case RT2560_RF_2526: return "RT2526"; 2688 case RT2560_RF_5222: return "RT5222"; 2689 default: return "unknown"; 2690 } 2691 } 2692 2693 static void 2694 rt2560_read_eeprom(struct rt2560_softc *sc) 2695 { 2696 uint16_t val; 2697 int i; 2698 2699 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2700 sc->rf_rev = (val >> 11) & 0x1f; 2701 sc->hw_radio = (val >> 10) & 0x1; 2702 sc->led_mode = (val >> 6) & 0x7; 2703 sc->rx_ant = (val >> 4) & 0x3; 2704 sc->tx_ant = (val >> 2) & 0x3; 2705 sc->nb_ant = val & 0x3; 2706 2707 /* read default values for BBP registers */ 2708 for (i = 0; i < 16; i++) { 2709 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2710 sc->bbp_prom[i].reg = val >> 8; 2711 sc->bbp_prom[i].val = val & 0xff; 2712 } 2713 2714 /* read Tx power for all b/g channels */ 2715 for (i = 0; i < 14 / 2; i++) { 2716 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2717 sc->txpow[i * 2] = val >> 8; 2718 sc->txpow[i * 2 + 1] = val & 0xff; 2719 } 2720 } 2721 2722 static int 2723 rt2560_bbp_init(struct rt2560_softc *sc) 2724 { 2725 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2726 int i, ntries; 2727 2728 /* wait for BBP to be ready */ 2729 for (ntries = 0; ntries < 100; ntries++) { 2730 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2731 break; 2732 DELAY(1); 2733 } 2734 if (ntries == 100) { 2735 aprint_error_dev(&sc->sc_dev, "timeout waiting for BBP\n"); 2736 return EIO; 2737 } 2738 2739 /* initialize BBP registers to default values */ 2740 for (i = 0; i < N(rt2560_def_bbp); i++) { 2741 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2742 rt2560_def_bbp[i].val); 2743 } 2744 #if 0 2745 /* initialize BBP registers to values stored in EEPROM */ 2746 for (i = 0; i < 16; i++) { 2747 if (sc->bbp_prom[i].reg == 0xff) 2748 continue; 2749 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2750 } 2751 #endif 2752 2753 return 0; 2754 #undef N 2755 } 2756 2757 static int 2758 rt2560_init(struct ifnet *ifp) 2759 { 2760 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2761 struct rt2560_softc *sc = ifp->if_softc; 2762 struct ieee80211com *ic = &sc->sc_ic; 2763 uint32_t tmp; 2764 int i; 2765 2766 /* for CardBus, power on the socket */ 2767 if (!(sc->sc_flags & RT2560_ENABLED)) { 2768 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2769 aprint_error_dev(&sc->sc_dev, "could not enable device\n"); 2770 return EIO; 2771 } 2772 sc->sc_flags |= RT2560_ENABLED; 2773 } 2774 2775 rt2560_stop(ifp, 1); 2776 2777 /* setup tx rings */ 2778 tmp = RT2560_PRIO_RING_COUNT << 24 | 2779 RT2560_ATIM_RING_COUNT << 16 | 2780 RT2560_TX_RING_COUNT << 8 | 2781 RT2560_TX_DESC_SIZE; 2782 2783 /* rings _must_ be initialized in this _exact_ order! */ 2784 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2785 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2786 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2787 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2788 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2789 2790 /* setup rx ring */ 2791 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2792 2793 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2794 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2795 2796 /* initialize MAC registers to default values */ 2797 for (i = 0; i < N(rt2560_def_mac); i++) 2798 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2799 2800 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2801 rt2560_set_macaddr(sc, ic->ic_myaddr); 2802 2803 /* set basic rate set (will be updated later) */ 2804 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2805 2806 rt2560_update_slot(ifp); 2807 rt2560_update_plcp(sc); 2808 rt2560_update_led(sc, 0, 0); 2809 2810 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2811 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2812 2813 if (rt2560_bbp_init(sc) != 0) { 2814 rt2560_stop(ifp, 1); 2815 return EIO; 2816 } 2817 2818 rt2560_set_txantenna(sc, 1); 2819 rt2560_set_rxantenna(sc, 1); 2820 2821 /* set default BSS channel */ 2822 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2823 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2824 2825 /* kick Rx */ 2826 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2827 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2828 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2829 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2830 tmp |= RT2560_DROP_TODS; 2831 if (!(ifp->if_flags & IFF_PROMISC)) 2832 tmp |= RT2560_DROP_NOT_TO_ME; 2833 } 2834 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2835 2836 /* clear old FCS and Rx FIFO errors */ 2837 RAL_READ(sc, RT2560_CNT0); 2838 RAL_READ(sc, RT2560_CNT4); 2839 2840 /* clear any pending interrupts */ 2841 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2842 2843 /* enable interrupts */ 2844 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2845 2846 ifp->if_flags &= ~IFF_OACTIVE; 2847 ifp->if_flags |= IFF_RUNNING; 2848 2849 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2850 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2851 else 2852 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2853 2854 return 0; 2855 #undef N 2856 } 2857 2858 static void 2859 rt2560_stop(struct ifnet *ifp, int disable) 2860 { 2861 struct rt2560_softc *sc = ifp->if_softc; 2862 struct ieee80211com *ic = &sc->sc_ic; 2863 2864 sc->sc_tx_timer = 0; 2865 ifp->if_timer = 0; 2866 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2867 2868 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2869 2870 /* abort Tx */ 2871 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2872 2873 /* disable Rx */ 2874 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2875 2876 /* reset ASIC (and thus, BBP) */ 2877 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2878 RAL_WRITE(sc, RT2560_CSR1, 0); 2879 2880 /* disable interrupts */ 2881 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2882 2883 /* clear any pending interrupt */ 2884 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2885 2886 /* reset Tx and Rx rings */ 2887 rt2560_reset_tx_ring(sc, &sc->txq); 2888 rt2560_reset_tx_ring(sc, &sc->atimq); 2889 rt2560_reset_tx_ring(sc, &sc->prioq); 2890 rt2560_reset_tx_ring(sc, &sc->bcnq); 2891 rt2560_reset_rx_ring(sc, &sc->rxq); 2892 2893 } 2894
Indexes created Thu Oct 23 22:10:10 GMT 2025