rt2560.c revision 1.22.2.1
1 /* $NetBSD: rt2560.c,v 1.22.2.1 2010/04/30 14:43:20 uebayasi Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.22.2.1 2010/04/30 14:43:20 uebayasi Exp $"); 28 29 30 #include <sys/param.h> 31 #include <sys/sockio.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/callout.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 #include <net/if_ether.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/ip.h> 57 58 #include <net80211/ieee80211_var.h> 59 #include <net80211/ieee80211_rssadapt.h> 60 #include <net80211/ieee80211_radiotap.h> 61 62 #include <dev/ic/rt2560reg.h> 63 #include <dev/ic/rt2560var.h> 64 65 #include <dev/pci/pcireg.h> 66 #include <dev/pci/pcivar.h> 67 #include <dev/pci/pcidevs.h> 68 69 #ifdef RAL_DEBUG 70 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 71 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 72 int rt2560_debug = 0; 73 #else 74 #define DPRINTF(x) 75 #define DPRINTFN(n, x) 76 #endif 77 78 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *, int); 80 static void rt2560_reset_tx_ring(struct rt2560_softc *, 81 struct rt2560_tx_ring *); 82 static void rt2560_free_tx_ring(struct rt2560_softc *, 83 struct rt2560_tx_ring *); 84 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *, int); 86 static void rt2560_reset_rx_ring(struct rt2560_softc *, 87 struct rt2560_rx_ring *); 88 static void rt2560_free_rx_ring(struct rt2560_softc *, 89 struct rt2560_rx_ring *); 90 static struct ieee80211_node * 91 rt2560_node_alloc(struct ieee80211_node_table *); 92 static int rt2560_media_change(struct ifnet *); 93 static void rt2560_next_scan(void *); 94 static void rt2560_iter_func(void *, struct ieee80211_node *); 95 static void rt2560_update_rssadapt(void *); 96 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 97 int); 98 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 99 static void rt2560_encryption_intr(struct rt2560_softc *); 100 static void rt2560_tx_intr(struct rt2560_softc *); 101 static void rt2560_prio_intr(struct rt2560_softc *); 102 static void rt2560_decryption_intr(struct rt2560_softc *); 103 static void rt2560_rx_intr(struct rt2560_softc *); 104 static void rt2560_beacon_expire(struct rt2560_softc *); 105 static void rt2560_wakeup_expire(struct rt2560_softc *); 106 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 107 static int rt2560_ack_rate(struct ieee80211com *, int); 108 static uint16_t rt2560_txtime(int, int, uint32_t); 109 static uint8_t rt2560_plcp_signal(int); 110 static void rt2560_setup_tx_desc(struct rt2560_softc *, 111 struct rt2560_tx_desc *, uint32_t, int, int, int, 112 bus_addr_t); 113 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 114 struct ieee80211_node *); 115 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 116 struct ieee80211_node *); 117 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 118 struct ieee80211_frame *, uint16_t); 119 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 120 struct ieee80211_node *); 121 static void rt2560_start(struct ifnet *); 122 static void rt2560_watchdog(struct ifnet *); 123 static int rt2560_reset(struct ifnet *); 124 static int rt2560_ioctl(struct ifnet *, u_long, void *); 125 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 126 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 127 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 128 static void rt2560_set_chan(struct rt2560_softc *, 129 struct ieee80211_channel *); 130 static void rt2560_disable_rf_tune(struct rt2560_softc *); 131 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 132 static void rt2560_update_plcp(struct rt2560_softc *); 133 static void rt2560_update_slot(struct ifnet *); 134 static void rt2560_set_basicrates(struct rt2560_softc *); 135 static void rt2560_update_led(struct rt2560_softc *, int, int); 136 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 137 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 138 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 139 static void rt2560_update_promisc(struct rt2560_softc *); 140 static void rt2560_set_txantenna(struct rt2560_softc *, int); 141 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 142 static const char *rt2560_get_rf(int); 143 static void rt2560_read_eeprom(struct rt2560_softc *); 144 static int rt2560_bbp_init(struct rt2560_softc *); 145 static int rt2560_init(struct ifnet *); 146 static void rt2560_stop(struct ifnet *, int); 147 148 /* 149 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 150 */ 151 static const struct ieee80211_rateset rt2560_rateset_11a = 152 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 153 154 static const struct ieee80211_rateset rt2560_rateset_11b = 155 { 4, { 2, 4, 11, 22 } }; 156 157 static const struct ieee80211_rateset rt2560_rateset_11g = 158 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 159 160 /* 161 * Default values for MAC registers; values taken from the reference driver. 162 */ 163 static const struct { 164 uint32_t reg; 165 uint32_t val; 166 } rt2560_def_mac[] = { 167 { RT2560_PSCSR0, 0x00020002 }, 168 { RT2560_PSCSR1, 0x00000002 }, 169 { RT2560_PSCSR2, 0x00020002 }, 170 { RT2560_PSCSR3, 0x00000002 }, 171 { RT2560_TIMECSR, 0x00003f21 }, 172 { RT2560_CSR9, 0x00000780 }, 173 { RT2560_CSR11, 0x07041483 }, 174 { RT2560_CNT3, 0x00000000 }, 175 { RT2560_TXCSR1, 0x07614562 }, 176 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 177 { RT2560_ACKPCTCSR, 0x7038140a }, 178 { RT2560_ARTCSR1, 0x1d21252d }, 179 { RT2560_ARTCSR2, 0x1919191d }, 180 { RT2560_RXCSR0, 0xffffffff }, 181 { RT2560_RXCSR3, 0xb3aab3af }, 182 { RT2560_PCICSR, 0x000003b8 }, 183 { RT2560_PWRCSR0, 0x3f3b3100 }, 184 { RT2560_GPIOCSR, 0x0000ff00 }, 185 { RT2560_TESTCSR, 0x000000f0 }, 186 { RT2560_PWRCSR1, 0x000001ff }, 187 { RT2560_MACCSR0, 0x00213223 }, 188 { RT2560_MACCSR1, 0x00235518 }, 189 { RT2560_RLPWCSR, 0x00000040 }, 190 { RT2560_RALINKCSR, 0x9a009a11 }, 191 { RT2560_CSR7, 0xffffffff }, 192 { RT2560_BBPCSR1, 0x82188200 }, 193 { RT2560_TXACKCSR0, 0x00000020 }, 194 { RT2560_SECCSR3, 0x0000e78f } 195 }; 196 197 /* 198 * Default values for BBP registers; values taken from the reference driver. 199 */ 200 static const struct { 201 uint8_t reg; 202 uint8_t val; 203 } rt2560_def_bbp[] = { 204 { 3, 0x02 }, 205 { 4, 0x19 }, 206 { 14, 0x1c }, 207 { 15, 0x30 }, 208 { 16, 0xac }, 209 { 17, 0x48 }, 210 { 18, 0x18 }, 211 { 19, 0xff }, 212 { 20, 0x1e }, 213 { 21, 0x08 }, 214 { 22, 0x08 }, 215 { 23, 0x08 }, 216 { 24, 0x80 }, 217 { 25, 0x50 }, 218 { 26, 0x08 }, 219 { 27, 0x23 }, 220 { 30, 0x10 }, 221 { 31, 0x2b }, 222 { 32, 0xb9 }, 223 { 34, 0x12 }, 224 { 35, 0x50 }, 225 { 39, 0xc4 }, 226 { 40, 0x02 }, 227 { 41, 0x60 }, 228 { 53, 0x10 }, 229 { 54, 0x18 }, 230 { 56, 0x08 }, 231 { 57, 0x10 }, 232 { 58, 0x08 }, 233 { 61, 0x60 }, 234 { 62, 0x10 }, 235 { 75, 0xff } 236 }; 237 238 /* 239 * Default values for RF register R2 indexed by channel numbers; values taken 240 * from the reference driver. 241 */ 242 static const uint32_t rt2560_rf2522_r2[] = { 243 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 244 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 245 }; 246 247 static const uint32_t rt2560_rf2523_r2[] = { 248 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 249 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 250 }; 251 252 static const uint32_t rt2560_rf2524_r2[] = { 253 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 254 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 255 }; 256 257 static const uint32_t rt2560_rf2525_r2[] = { 258 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 259 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 260 }; 261 262 static const uint32_t rt2560_rf2525_hi_r2[] = { 263 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 264 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 265 }; 266 267 static const uint32_t rt2560_rf2525e_r2[] = { 268 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 269 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 270 }; 271 272 static const uint32_t rt2560_rf2526_hi_r2[] = { 273 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 274 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 275 }; 276 277 static const uint32_t rt2560_rf2526_r2[] = { 278 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 279 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 280 }; 281 282 /* 283 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 284 * values taken from the reference driver. 285 */ 286 static const struct { 287 uint8_t chan; 288 uint32_t r1; 289 uint32_t r2; 290 uint32_t r4; 291 } rt2560_rf5222[] = { 292 { 1, 0x08808, 0x0044d, 0x00282 }, 293 { 2, 0x08808, 0x0044e, 0x00282 }, 294 { 3, 0x08808, 0x0044f, 0x00282 }, 295 { 4, 0x08808, 0x00460, 0x00282 }, 296 { 5, 0x08808, 0x00461, 0x00282 }, 297 { 6, 0x08808, 0x00462, 0x00282 }, 298 { 7, 0x08808, 0x00463, 0x00282 }, 299 { 8, 0x08808, 0x00464, 0x00282 }, 300 { 9, 0x08808, 0x00465, 0x00282 }, 301 { 10, 0x08808, 0x00466, 0x00282 }, 302 { 11, 0x08808, 0x00467, 0x00282 }, 303 { 12, 0x08808, 0x00468, 0x00282 }, 304 { 13, 0x08808, 0x00469, 0x00282 }, 305 { 14, 0x08808, 0x0046b, 0x00286 }, 306 307 { 36, 0x08804, 0x06225, 0x00287 }, 308 { 40, 0x08804, 0x06226, 0x00287 }, 309 { 44, 0x08804, 0x06227, 0x00287 }, 310 { 48, 0x08804, 0x06228, 0x00287 }, 311 { 52, 0x08804, 0x06229, 0x00287 }, 312 { 56, 0x08804, 0x0622a, 0x00287 }, 313 { 60, 0x08804, 0x0622b, 0x00287 }, 314 { 64, 0x08804, 0x0622c, 0x00287 }, 315 316 { 100, 0x08804, 0x02200, 0x00283 }, 317 { 104, 0x08804, 0x02201, 0x00283 }, 318 { 108, 0x08804, 0x02202, 0x00283 }, 319 { 112, 0x08804, 0x02203, 0x00283 }, 320 { 116, 0x08804, 0x02204, 0x00283 }, 321 { 120, 0x08804, 0x02205, 0x00283 }, 322 { 124, 0x08804, 0x02206, 0x00283 }, 323 { 128, 0x08804, 0x02207, 0x00283 }, 324 { 132, 0x08804, 0x02208, 0x00283 }, 325 { 136, 0x08804, 0x02209, 0x00283 }, 326 { 140, 0x08804, 0x0220a, 0x00283 }, 327 328 { 149, 0x08808, 0x02429, 0x00281 }, 329 { 153, 0x08808, 0x0242b, 0x00281 }, 330 { 157, 0x08808, 0x0242d, 0x00281 }, 331 { 161, 0x08808, 0x0242f, 0x00281 } 332 }; 333 334 int 335 rt2560_attach(void *xsc, int id) 336 { 337 struct rt2560_softc *sc = xsc; 338 struct ieee80211com *ic = &sc->sc_ic; 339 struct ifnet *ifp = &sc->sc_if; 340 int error, i; 341 342 callout_init(&sc->scan_ch, 0); 343 callout_init(&sc->rssadapt_ch, 0); 344 345 /* retrieve RT2560 rev. no */ 346 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 347 348 /* retrieve MAC address */ 349 rt2560_get_macaddr(sc, ic->ic_myaddr); 350 351 aprint_normal_dev(&sc->sc_dev, "802.11 address %s\n", 352 ether_sprintf(ic->ic_myaddr)); 353 354 /* retrieve RF rev. no and various other things from EEPROM */ 355 rt2560_read_eeprom(sc); 356 357 aprint_normal_dev(&sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 358 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 359 360 /* 361 * Allocate Tx and Rx rings. 362 */ 363 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 364 if (error != 0) { 365 aprint_error_dev(&sc->sc_dev, "could not allocate Tx ring\n)"); 366 goto fail1; 367 } 368 369 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 370 if (error != 0) { 371 aprint_error_dev(&sc->sc_dev, "could not allocate ATIM ring\n"); 372 goto fail2; 373 } 374 375 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 376 if (error != 0) { 377 aprint_error_dev(&sc->sc_dev, "could not allocate Prio ring\n"); 378 goto fail3; 379 } 380 381 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 382 if (error != 0) { 383 aprint_error_dev(&sc->sc_dev, "could not allocate Beacon ring\n"); 384 goto fail4; 385 } 386 387 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 388 if (error != 0) { 389 aprint_error_dev(&sc->sc_dev, "could not allocate Rx ring\n"); 390 goto fail5; 391 } 392 393 ifp->if_softc = sc; 394 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 395 ifp->if_init = rt2560_init; 396 ifp->if_stop = rt2560_stop; 397 ifp->if_ioctl = rt2560_ioctl; 398 ifp->if_start = rt2560_start; 399 ifp->if_watchdog = rt2560_watchdog; 400 IFQ_SET_READY(&ifp->if_snd); 401 memcpy(ifp->if_xname, device_xname(&sc->sc_dev), IFNAMSIZ); 402 403 ic->ic_ifp = ifp; 404 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 405 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 406 ic->ic_state = IEEE80211_S_INIT; 407 408 /* set device capabilities */ 409 ic->ic_caps = 410 IEEE80211_C_IBSS | /* IBSS mode supported */ 411 IEEE80211_C_MONITOR | /* monitor mode supported */ 412 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 413 IEEE80211_C_TXPMGT | /* tx power management */ 414 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 415 IEEE80211_C_SHSLOT | /* short slot time supported */ 416 IEEE80211_C_WPA; /* 802.11i */ 417 418 if (sc->rf_rev == RT2560_RF_5222) { 419 /* set supported .11a rates */ 420 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 421 422 /* set supported .11a channels */ 423 for (i = 36; i <= 64; i += 4) { 424 ic->ic_channels[i].ic_freq = 425 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 426 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 427 } 428 for (i = 100; i <= 140; i += 4) { 429 ic->ic_channels[i].ic_freq = 430 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 431 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 432 } 433 for (i = 149; i <= 161; i += 4) { 434 ic->ic_channels[i].ic_freq = 435 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 436 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 437 } 438 } 439 440 /* set supported .11b and .11g rates */ 441 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 442 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 443 444 /* set supported .11b and .11g channels (1 through 14) */ 445 for (i = 1; i <= 14; i++) { 446 ic->ic_channels[i].ic_freq = 447 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 448 ic->ic_channels[i].ic_flags = 449 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 450 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 451 } 452 453 if_attach(ifp); 454 ieee80211_ifattach(ic); 455 ic->ic_node_alloc = rt2560_node_alloc; 456 ic->ic_updateslot = rt2560_update_slot; 457 ic->ic_reset = rt2560_reset; 458 459 /* override state transition machine */ 460 sc->sc_newstate = ic->ic_newstate; 461 ic->ic_newstate = rt2560_newstate; 462 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 463 464 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 465 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 466 467 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 468 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 469 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 470 471 sc->sc_txtap_len = sizeof sc->sc_txtapu; 472 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 473 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 474 475 476 sc->dwelltime = 200; 477 478 ieee80211_announce(ic); 479 480 if (pmf_device_register(&sc->sc_dev, NULL, NULL)) 481 pmf_class_network_register(&sc->sc_dev, ifp); 482 else 483 aprint_error_dev(&sc->sc_dev, 484 "couldn't establish power handler\n"); 485 486 return 0; 487 488 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 489 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 490 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 491 fail2: rt2560_free_tx_ring(sc, &sc->txq); 492 fail1: 493 return ENXIO; 494 } 495 496 497 int 498 rt2560_detach(void *xsc) 499 { 500 struct rt2560_softc *sc = xsc; 501 struct ifnet *ifp = &sc->sc_if; 502 503 callout_stop(&sc->scan_ch); 504 callout_stop(&sc->rssadapt_ch); 505 506 pmf_device_deregister(&sc->sc_dev); 507 508 rt2560_stop(ifp, 1); 509 510 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 511 if_detach(ifp); 512 513 rt2560_free_tx_ring(sc, &sc->txq); 514 rt2560_free_tx_ring(sc, &sc->atimq); 515 rt2560_free_tx_ring(sc, &sc->prioq); 516 rt2560_free_tx_ring(sc, &sc->bcnq); 517 rt2560_free_rx_ring(sc, &sc->rxq); 518 519 return 0; 520 } 521 522 int 523 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 524 int count) 525 { 526 int i, nsegs, error; 527 528 ring->count = count; 529 ring->queued = 0; 530 ring->cur = ring->next = 0; 531 ring->cur_encrypt = ring->next_encrypt = 0; 532 533 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 534 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 535 if (error != 0) { 536 aprint_error_dev(&sc->sc_dev, "could not create desc DMA map\n"); 537 goto fail; 538 } 539 540 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 541 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 542 if (error != 0) { 543 aprint_error_dev(&sc->sc_dev, "could not allocate DMA memory\n"); 544 goto fail; 545 } 546 547 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 548 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 549 BUS_DMA_NOWAIT); 550 if (error != 0) { 551 aprint_error_dev(&sc->sc_dev, "could not map desc DMA memory\n"); 552 goto fail; 553 } 554 555 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 556 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 557 if (error != 0) { 558 aprint_error_dev(&sc->sc_dev, "could not load desc DMA map\n"); 559 goto fail; 560 } 561 562 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 563 ring->physaddr = ring->map->dm_segs->ds_addr; 564 565 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 566 M_NOWAIT); 567 if (ring->data == NULL) { 568 aprint_error_dev(&sc->sc_dev, "could not allocate soft data\n"); 569 error = ENOMEM; 570 goto fail; 571 } 572 573 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 574 for (i = 0; i < count; i++) { 575 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 576 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 577 &ring->data[i].map); 578 if (error != 0) { 579 aprint_error_dev(&sc->sc_dev, "could not create DMA map\n"); 580 goto fail; 581 } 582 } 583 584 return 0; 585 586 fail: rt2560_free_tx_ring(sc, ring); 587 return error; 588 } 589 590 void 591 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 592 { 593 struct rt2560_tx_desc *desc; 594 struct rt2560_tx_data *data; 595 int i; 596 597 for (i = 0; i < ring->count; i++) { 598 desc = &ring->desc[i]; 599 data = &ring->data[i]; 600 601 if (data->m != NULL) { 602 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 603 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 604 bus_dmamap_unload(sc->sc_dmat, data->map); 605 m_freem(data->m); 606 data->m = NULL; 607 } 608 609 if (data->ni != NULL) { 610 ieee80211_free_node(data->ni); 611 data->ni = NULL; 612 } 613 614 desc->flags = 0; 615 } 616 617 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 618 BUS_DMASYNC_PREWRITE); 619 620 ring->queued = 0; 621 ring->cur = ring->next = 0; 622 ring->cur_encrypt = ring->next_encrypt = 0; 623 } 624 625 void 626 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 627 { 628 struct rt2560_tx_data *data; 629 int i; 630 631 if (ring->desc != NULL) { 632 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 633 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 634 bus_dmamap_unload(sc->sc_dmat, ring->map); 635 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 636 ring->count * RT2560_TX_DESC_SIZE); 637 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 638 } 639 640 if (ring->data != NULL) { 641 for (i = 0; i < ring->count; i++) { 642 data = &ring->data[i]; 643 644 if (data->m != NULL) { 645 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 646 data->map->dm_mapsize, 647 BUS_DMASYNC_POSTWRITE); 648 bus_dmamap_unload(sc->sc_dmat, data->map); 649 m_freem(data->m); 650 } 651 652 if (data->ni != NULL) 653 ieee80211_free_node(data->ni); 654 655 656 if (data->map != NULL) 657 bus_dmamap_destroy(sc->sc_dmat, data->map); 658 } 659 free(ring->data, M_DEVBUF); 660 } 661 } 662 663 int 664 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 665 int count) 666 { 667 struct rt2560_rx_desc *desc; 668 struct rt2560_rx_data *data; 669 int i, nsegs, error; 670 671 ring->count = count; 672 ring->cur = ring->next = 0; 673 ring->cur_decrypt = 0; 674 675 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 676 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 677 if (error != 0) { 678 aprint_error_dev(&sc->sc_dev, "could not create desc DMA map\n"); 679 goto fail; 680 } 681 682 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 683 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 684 if (error != 0) { 685 aprint_error_dev(&sc->sc_dev, "could not allocate DMA memory\n"); 686 goto fail; 687 } 688 689 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 690 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 691 BUS_DMA_NOWAIT); 692 if (error != 0) { 693 aprint_error_dev(&sc->sc_dev, "could not map desc DMA memory\n"); 694 goto fail; 695 } 696 697 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 698 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 699 if (error != 0) { 700 aprint_error_dev(&sc->sc_dev, "could not load desc DMA map\n"); 701 goto fail; 702 } 703 704 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 705 ring->physaddr = ring->map->dm_segs->ds_addr; 706 707 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 708 M_NOWAIT); 709 if (ring->data == NULL) { 710 aprint_error_dev(&sc->sc_dev, "could not allocate soft data\n"); 711 error = ENOMEM; 712 goto fail; 713 } 714 715 /* 716 * Pre-allocate Rx buffers and populate Rx ring. 717 */ 718 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 719 for (i = 0; i < count; i++) { 720 desc = &sc->rxq.desc[i]; 721 data = &sc->rxq.data[i]; 722 723 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 724 0, BUS_DMA_NOWAIT, &data->map); 725 if (error != 0) { 726 aprint_error_dev(&sc->sc_dev, "could not create DMA map\n"); 727 goto fail; 728 } 729 730 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 731 if (data->m == NULL) { 732 aprint_error_dev(&sc->sc_dev, "could not allocate rx mbuf\n"); 733 error = ENOMEM; 734 goto fail; 735 } 736 737 MCLGET(data->m, M_DONTWAIT); 738 if (!(data->m->m_flags & M_EXT)) { 739 aprint_error_dev(&sc->sc_dev, "could not allocate rx mbuf cluster\n"); 740 error = ENOMEM; 741 goto fail; 742 } 743 744 error = bus_dmamap_load(sc->sc_dmat, data->map, 745 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 746 if (error != 0) { 747 aprint_error_dev(&sc->sc_dev, "could not load rx buf DMA map"); 748 goto fail; 749 } 750 751 desc->flags = htole32(RT2560_RX_BUSY); 752 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 753 } 754 755 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 756 BUS_DMASYNC_PREWRITE); 757 758 return 0; 759 760 fail: rt2560_free_rx_ring(sc, ring); 761 return error; 762 } 763 764 void 765 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 766 { 767 int i; 768 769 for (i = 0; i < ring->count; i++) { 770 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 771 ring->data[i].drop = 0; 772 } 773 774 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 775 BUS_DMASYNC_PREWRITE); 776 777 ring->cur = ring->next = 0; 778 ring->cur_decrypt = 0; 779 } 780 781 void 782 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 783 { 784 struct rt2560_rx_data *data; 785 int i; 786 787 if (ring->desc != NULL) { 788 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 789 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 790 bus_dmamap_unload(sc->sc_dmat, ring->map); 791 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 792 ring->count * RT2560_RX_DESC_SIZE); 793 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 794 } 795 796 if (ring->data != NULL) { 797 for (i = 0; i < ring->count; i++) { 798 data = &ring->data[i]; 799 800 if (data->m != NULL) { 801 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 802 data->map->dm_mapsize, 803 BUS_DMASYNC_POSTREAD); 804 bus_dmamap_unload(sc->sc_dmat, data->map); 805 m_freem(data->m); 806 } 807 808 if (data->map != NULL) 809 bus_dmamap_destroy(sc->sc_dmat, data->map); 810 } 811 free(ring->data, M_DEVBUF); 812 } 813 } 814 815 struct ieee80211_node * 816 rt2560_node_alloc(struct ieee80211_node_table *nt) 817 { 818 struct rt2560_node *rn; 819 820 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 821 M_NOWAIT | M_ZERO); 822 823 return (rn != NULL) ? &rn->ni : NULL; 824 } 825 826 int 827 rt2560_media_change(struct ifnet *ifp) 828 { 829 int error; 830 831 error = ieee80211_media_change(ifp); 832 if (error != ENETRESET) 833 return error; 834 835 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 836 rt2560_init(ifp); 837 838 return 0; 839 } 840 841 /* 842 * This function is called periodically (every 200ms) during scanning to 843 * switch from one channel to another. 844 */ 845 void 846 rt2560_next_scan(void *arg) 847 { 848 struct rt2560_softc *sc = arg; 849 struct ieee80211com *ic = &sc->sc_ic; 850 851 if (ic->ic_state == IEEE80211_S_SCAN) 852 ieee80211_next_scan(ic); 853 } 854 855 /* 856 * This function is called for each neighbor node. 857 */ 858 void 859 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 860 { 861 struct rt2560_node *rn = (struct rt2560_node *)ni; 862 863 ieee80211_rssadapt_updatestats(&rn->rssadapt); 864 } 865 866 /* 867 * This function is called periodically (every 100ms) in RUN state to update 868 * the rate adaptation statistics. 869 */ 870 void 871 rt2560_update_rssadapt(void *arg) 872 { 873 struct rt2560_softc *sc = arg; 874 struct ieee80211com *ic = &sc->sc_ic; 875 876 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 877 878 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 879 } 880 881 int 882 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 883 { 884 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 885 enum ieee80211_state ostate; 886 struct ieee80211_node *ni; 887 struct mbuf *m; 888 int error = 0; 889 890 ostate = ic->ic_state; 891 callout_stop(&sc->scan_ch); 892 893 switch (nstate) { 894 case IEEE80211_S_INIT: 895 callout_stop(&sc->rssadapt_ch); 896 897 if (ostate == IEEE80211_S_RUN) { 898 /* abort TSF synchronization */ 899 RAL_WRITE(sc, RT2560_CSR14, 0); 900 901 /* turn association led off */ 902 rt2560_update_led(sc, 0, 0); 903 } 904 break; 905 906 case IEEE80211_S_SCAN: 907 rt2560_set_chan(sc, ic->ic_curchan); 908 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 909 rt2560_next_scan, sc); 910 break; 911 912 case IEEE80211_S_AUTH: 913 rt2560_set_chan(sc, ic->ic_curchan); 914 break; 915 916 case IEEE80211_S_ASSOC: 917 rt2560_set_chan(sc, ic->ic_curchan); 918 break; 919 920 case IEEE80211_S_RUN: 921 rt2560_set_chan(sc, ic->ic_curchan); 922 923 ni = ic->ic_bss; 924 925 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 926 rt2560_update_plcp(sc); 927 rt2560_set_basicrates(sc); 928 rt2560_set_bssid(sc, ni->ni_bssid); 929 } 930 931 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 932 ic->ic_opmode == IEEE80211_M_IBSS) { 933 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 934 if (m == NULL) { 935 aprint_error_dev(&sc->sc_dev, "could not allocate beacon\n"); 936 error = ENOBUFS; 937 break; 938 } 939 940 ieee80211_ref_node(ni); 941 error = rt2560_tx_bcn(sc, m, ni); 942 if (error != 0) 943 break; 944 } 945 946 /* turn assocation led on */ 947 rt2560_update_led(sc, 1, 0); 948 949 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 950 callout_reset(&sc->rssadapt_ch, hz / 10, 951 rt2560_update_rssadapt, sc); 952 rt2560_enable_tsf_sync(sc); 953 } 954 break; 955 } 956 957 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 958 } 959 960 /* 961 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 962 * 93C66). 963 */ 964 uint16_t 965 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 966 { 967 uint32_t tmp; 968 uint16_t val; 969 int n; 970 971 /* clock C once before the first command */ 972 RT2560_EEPROM_CTL(sc, 0); 973 974 RT2560_EEPROM_CTL(sc, RT2560_S); 975 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 976 RT2560_EEPROM_CTL(sc, RT2560_S); 977 978 /* write start bit (1) */ 979 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 980 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 981 982 /* write READ opcode (10) */ 983 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 984 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 985 RT2560_EEPROM_CTL(sc, RT2560_S); 986 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 987 988 /* write address (A5-A0 or A7-A0) */ 989 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 990 for (; n >= 0; n--) { 991 RT2560_EEPROM_CTL(sc, RT2560_S | 992 (((addr >> n) & 1) << RT2560_SHIFT_D)); 993 RT2560_EEPROM_CTL(sc, RT2560_S | 994 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 995 } 996 997 RT2560_EEPROM_CTL(sc, RT2560_S); 998 999 /* read data Q15-Q0 */ 1000 val = 0; 1001 for (n = 15; n >= 0; n--) { 1002 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1003 tmp = RAL_READ(sc, RT2560_CSR21); 1004 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1005 RT2560_EEPROM_CTL(sc, RT2560_S); 1006 } 1007 1008 RT2560_EEPROM_CTL(sc, 0); 1009 1010 /* clear Chip Select and clock C */ 1011 RT2560_EEPROM_CTL(sc, RT2560_S); 1012 RT2560_EEPROM_CTL(sc, 0); 1013 RT2560_EEPROM_CTL(sc, RT2560_C); 1014 1015 return val; 1016 } 1017 1018 /* 1019 * Some frames were processed by the hardware cipher engine and are ready for 1020 * transmission. 1021 */ 1022 void 1023 rt2560_encryption_intr(struct rt2560_softc *sc) 1024 { 1025 struct rt2560_tx_desc *desc; 1026 int hw; 1027 1028 /* retrieve last descriptor index processed by cipher engine */ 1029 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1030 RT2560_TX_DESC_SIZE; 1031 1032 for (; sc->txq.next_encrypt != hw;) { 1033 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1034 1035 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1036 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1037 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1038 1039 if (le32toh(desc->flags) & 1040 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1041 break; 1042 1043 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1044 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1045 RT2560_TX_CIPHER_TKIP) 1046 desc->eiv = bswap32(desc->eiv); 1047 1048 /* mark the frame ready for transmission */ 1049 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1050 1051 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1052 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1053 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1054 1055 DPRINTFN(15, ("encryption done idx=%u\n", 1056 sc->txq.next_encrypt)); 1057 1058 sc->txq.next_encrypt = 1059 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1060 } 1061 1062 /* kick Tx */ 1063 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1064 } 1065 1066 void 1067 rt2560_tx_intr(struct rt2560_softc *sc) 1068 { 1069 struct ieee80211com *ic = &sc->sc_ic; 1070 struct ifnet *ifp = ic->ic_ifp; 1071 struct rt2560_tx_desc *desc; 1072 struct rt2560_tx_data *data; 1073 struct rt2560_node *rn; 1074 1075 for (;;) { 1076 desc = &sc->txq.desc[sc->txq.next]; 1077 data = &sc->txq.data[sc->txq.next]; 1078 1079 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1080 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1081 BUS_DMASYNC_POSTREAD); 1082 1083 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1084 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1085 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1086 break; 1087 1088 rn = (struct rt2560_node *)data->ni; 1089 1090 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1091 case RT2560_TX_SUCCESS: 1092 DPRINTFN(10, ("data frame sent successfully\n")); 1093 if (data->id.id_node != NULL) { 1094 ieee80211_rssadapt_raise_rate(ic, 1095 &rn->rssadapt, &data->id); 1096 } 1097 ifp->if_opackets++; 1098 break; 1099 1100 case RT2560_TX_SUCCESS_RETRY: 1101 DPRINTFN(9, ("data frame sent after %u retries\n", 1102 (le32toh(desc->flags) >> 5) & 0x7)); 1103 ifp->if_opackets++; 1104 break; 1105 1106 case RT2560_TX_FAIL_RETRY: 1107 DPRINTFN(9, ("sending data frame failed (too much " 1108 "retries)\n")); 1109 if (data->id.id_node != NULL) { 1110 ieee80211_rssadapt_lower_rate(ic, data->ni, 1111 &rn->rssadapt, &data->id); 1112 } 1113 ifp->if_oerrors++; 1114 break; 1115 1116 case RT2560_TX_FAIL_INVALID: 1117 case RT2560_TX_FAIL_OTHER: 1118 default: 1119 aprint_error_dev(&sc->sc_dev, "sending data frame failed 0x%08x\n", 1120 le32toh(desc->flags)); 1121 ifp->if_oerrors++; 1122 } 1123 1124 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1125 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1126 bus_dmamap_unload(sc->sc_dmat, data->map); 1127 m_freem(data->m); 1128 data->m = NULL; 1129 ieee80211_free_node(data->ni); 1130 data->ni = NULL; 1131 1132 /* descriptor is no longer valid */ 1133 desc->flags &= ~htole32(RT2560_TX_VALID); 1134 1135 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1136 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1137 BUS_DMASYNC_PREWRITE); 1138 1139 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1140 1141 sc->txq.queued--; 1142 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1143 } 1144 1145 sc->sc_tx_timer = 0; 1146 ifp->if_flags &= ~IFF_OACTIVE; 1147 rt2560_start(ifp); 1148 } 1149 1150 void 1151 rt2560_prio_intr(struct rt2560_softc *sc) 1152 { 1153 struct ieee80211com *ic = &sc->sc_ic; 1154 struct ifnet *ifp = ic->ic_ifp; 1155 struct rt2560_tx_desc *desc; 1156 struct rt2560_tx_data *data; 1157 1158 for (;;) { 1159 desc = &sc->prioq.desc[sc->prioq.next]; 1160 data = &sc->prioq.data[sc->prioq.next]; 1161 1162 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1163 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1164 BUS_DMASYNC_POSTREAD); 1165 1166 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1167 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1168 break; 1169 1170 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1171 case RT2560_TX_SUCCESS: 1172 DPRINTFN(10, ("mgt frame sent successfully\n")); 1173 break; 1174 1175 case RT2560_TX_SUCCESS_RETRY: 1176 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1177 (le32toh(desc->flags) >> 5) & 0x7)); 1178 break; 1179 1180 case RT2560_TX_FAIL_RETRY: 1181 DPRINTFN(9, ("sending mgt frame failed (too much " 1182 "retries)\n")); 1183 break; 1184 1185 case RT2560_TX_FAIL_INVALID: 1186 case RT2560_TX_FAIL_OTHER: 1187 default: 1188 aprint_error_dev(&sc->sc_dev, "sending mgt frame failed 0x%08x\n", 1189 le32toh(desc->flags)); 1190 } 1191 1192 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1193 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1194 bus_dmamap_unload(sc->sc_dmat, data->map); 1195 m_freem(data->m); 1196 data->m = NULL; 1197 ieee80211_free_node(data->ni); 1198 data->ni = NULL; 1199 1200 /* descriptor is no longer valid */ 1201 desc->flags &= ~htole32(RT2560_TX_VALID); 1202 1203 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1204 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1205 BUS_DMASYNC_PREWRITE); 1206 1207 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1208 1209 sc->prioq.queued--; 1210 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1211 } 1212 1213 sc->sc_tx_timer = 0; 1214 ifp->if_flags &= ~IFF_OACTIVE; 1215 rt2560_start(ifp); 1216 } 1217 1218 /* 1219 * Some frames were processed by the hardware cipher engine and are ready for 1220 * transmission to the IEEE802.11 layer. 1221 */ 1222 void 1223 rt2560_decryption_intr(struct rt2560_softc *sc) 1224 { 1225 struct ieee80211com *ic = &sc->sc_ic; 1226 struct ifnet *ifp = ic->ic_ifp; 1227 struct rt2560_rx_desc *desc; 1228 struct rt2560_rx_data *data; 1229 struct rt2560_node *rn; 1230 struct ieee80211_frame *wh; 1231 struct ieee80211_node *ni; 1232 struct mbuf *mnew, *m; 1233 int hw, error; 1234 1235 /* retrieve last decriptor index processed by cipher engine */ 1236 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1237 RT2560_RX_DESC_SIZE; 1238 1239 for (; sc->rxq.cur_decrypt != hw;) { 1240 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1241 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1242 1243 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1244 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1245 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1246 1247 if (le32toh(desc->flags) & 1248 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1249 break; 1250 1251 if (data->drop) { 1252 ifp->if_ierrors++; 1253 goto skip; 1254 } 1255 1256 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1257 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1258 ifp->if_ierrors++; 1259 goto skip; 1260 } 1261 1262 /* 1263 * Try to allocate a new mbuf for this ring element and load it 1264 * before processing the current mbuf. If the ring element 1265 * cannot be loaded, drop the received packet and reuse the old 1266 * mbuf. In the unlikely case that the old mbuf can't be 1267 * reloaded either, explicitly panic. 1268 */ 1269 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1270 if (mnew == NULL) { 1271 ifp->if_ierrors++; 1272 goto skip; 1273 } 1274 1275 MCLGET(mnew, M_DONTWAIT); 1276 if (!(mnew->m_flags & M_EXT)) { 1277 m_freem(mnew); 1278 ifp->if_ierrors++; 1279 goto skip; 1280 } 1281 1282 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1283 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1284 bus_dmamap_unload(sc->sc_dmat, data->map); 1285 1286 error = bus_dmamap_load(sc->sc_dmat, data->map, 1287 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1288 if (error != 0) { 1289 m_freem(mnew); 1290 1291 /* try to reload the old mbuf */ 1292 error = bus_dmamap_load(sc->sc_dmat, data->map, 1293 mtod(data->m, void *), MCLBYTES, NULL, 1294 BUS_DMA_NOWAIT); 1295 if (error != 0) { 1296 /* very unlikely that it will fail... */ 1297 panic("%s: could not load old rx mbuf", 1298 device_xname(&sc->sc_dev)); 1299 } 1300 /* physical address may have changed */ 1301 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1302 ifp->if_ierrors++; 1303 goto skip; 1304 } 1305 1306 /* 1307 * New mbuf successfully loaded, update Rx ring and continue 1308 * processing. 1309 */ 1310 m = data->m; 1311 data->m = mnew; 1312 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1313 1314 /* finalize mbuf */ 1315 m->m_pkthdr.rcvif = ifp; 1316 m->m_pkthdr.len = m->m_len = 1317 (le32toh(desc->flags) >> 16) & 0xfff; 1318 1319 if (sc->sc_drvbpf != NULL) { 1320 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1321 uint32_t tsf_lo, tsf_hi; 1322 1323 /* get timestamp (low and high 32 bits) */ 1324 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1325 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1326 1327 tap->wr_tsf = 1328 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1329 tap->wr_flags = 0; 1330 tap->wr_rate = rt2560_rxrate(desc); 1331 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1332 tap->wr_chan_flags = 1333 htole16(ic->ic_ibss_chan->ic_flags); 1334 tap->wr_antenna = sc->rx_ant; 1335 tap->wr_antsignal = desc->rssi; 1336 1337 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 1338 } 1339 1340 wh = mtod(m, struct ieee80211_frame *); 1341 ni = ieee80211_find_rxnode(ic, 1342 (struct ieee80211_frame_min *)wh); 1343 1344 /* send the frame to the 802.11 layer */ 1345 ieee80211_input(ic, m, ni, desc->rssi, 0); 1346 1347 /* give rssi to the rate adatation algorithm */ 1348 rn = (struct rt2560_node *)ni; 1349 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1350 1351 /* node is no longer needed */ 1352 ieee80211_free_node(ni); 1353 1354 skip: desc->flags = htole32(RT2560_RX_BUSY); 1355 1356 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1357 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1358 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1359 1360 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1361 1362 sc->rxq.cur_decrypt = 1363 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1364 } 1365 1366 /* 1367 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1368 * without calling if_start(). 1369 */ 1370 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1371 rt2560_start(ifp); 1372 } 1373 1374 /* 1375 * Some frames were received. Pass them to the hardware cipher engine before 1376 * sending them to the 802.11 layer. 1377 */ 1378 void 1379 rt2560_rx_intr(struct rt2560_softc *sc) 1380 { 1381 struct rt2560_rx_desc *desc; 1382 struct rt2560_rx_data *data; 1383 1384 for (;;) { 1385 desc = &sc->rxq.desc[sc->rxq.cur]; 1386 data = &sc->rxq.data[sc->rxq.cur]; 1387 1388 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1389 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1390 BUS_DMASYNC_POSTREAD); 1391 1392 if (le32toh(desc->flags) & 1393 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1394 break; 1395 1396 data->drop = 0; 1397 1398 if (le32toh(desc->flags) & 1399 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1400 /* 1401 * This should not happen since we did not request 1402 * to receive those frames when we filled RXCSR0. 1403 */ 1404 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1405 le32toh(desc->flags))); 1406 data->drop = 1; 1407 } 1408 1409 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1410 DPRINTFN(5, ("bad length\n")); 1411 data->drop = 1; 1412 } 1413 1414 /* mark the frame for decryption */ 1415 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1416 1417 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1418 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1419 BUS_DMASYNC_PREWRITE); 1420 1421 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1422 1423 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1424 } 1425 1426 /* kick decrypt */ 1427 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1428 } 1429 1430 /* 1431 * This function is called periodically in IBSS mode when a new beacon must be 1432 * sent out. 1433 */ 1434 static void 1435 rt2560_beacon_expire(struct rt2560_softc *sc) 1436 { 1437 struct ieee80211com *ic = &sc->sc_ic; 1438 struct rt2560_tx_data *data; 1439 1440 if (ic->ic_opmode != IEEE80211_M_IBSS && 1441 ic->ic_opmode != IEEE80211_M_HOSTAP) 1442 return; 1443 1444 data = &sc->bcnq.data[sc->bcnq.next]; 1445 1446 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1447 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1448 bus_dmamap_unload(sc->sc_dmat, data->map); 1449 1450 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1451 1452 bpf_mtap3(ic->ic_rawbpf, data->m); 1453 rt2560_tx_bcn(sc, data->m, data->ni); 1454 1455 DPRINTFN(15, ("beacon expired\n")); 1456 1457 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1458 } 1459 1460 static void 1461 rt2560_wakeup_expire(struct rt2560_softc *sc) 1462 { 1463 DPRINTFN(15, ("wakeup expired\n")); 1464 } 1465 1466 int 1467 rt2560_intr(void *arg) 1468 { 1469 struct rt2560_softc *sc = arg; 1470 struct ifnet *ifp = &sc->sc_if; 1471 uint32_t r; 1472 1473 if (!device_is_active(&sc->sc_dev)) 1474 return 0; 1475 1476 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1477 return 0; /* not for us */ 1478 1479 /* disable interrupts */ 1480 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1481 1482 /* acknowledge interrupts */ 1483 RAL_WRITE(sc, RT2560_CSR7, r); 1484 1485 /* don't re-enable interrupts if we're shutting down */ 1486 if (!(ifp->if_flags & IFF_RUNNING)) 1487 return 0; 1488 1489 if (r & RT2560_BEACON_EXPIRE) 1490 rt2560_beacon_expire(sc); 1491 1492 if (r & RT2560_WAKEUP_EXPIRE) 1493 rt2560_wakeup_expire(sc); 1494 1495 if (r & RT2560_ENCRYPTION_DONE) 1496 rt2560_encryption_intr(sc); 1497 1498 if (r & RT2560_TX_DONE) 1499 rt2560_tx_intr(sc); 1500 1501 if (r & RT2560_PRIO_DONE) 1502 rt2560_prio_intr(sc); 1503 1504 if (r & RT2560_DECRYPTION_DONE) 1505 rt2560_decryption_intr(sc); 1506 1507 if (r & RT2560_RX_DONE) 1508 rt2560_rx_intr(sc); 1509 1510 /* re-enable interrupts */ 1511 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1512 1513 return 1; 1514 } 1515 1516 /* quickly determine if a given rate is CCK or OFDM */ 1517 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1518 1519 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1520 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1521 1522 #define RAL_SIFS 10 /* us */ 1523 1524 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1525 1526 /* 1527 * This function is only used by the Rx radiotap code. It returns the rate at 1528 * which a given frame was received. 1529 */ 1530 static uint8_t 1531 rt2560_rxrate(struct rt2560_rx_desc *desc) 1532 { 1533 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1534 /* reverse function of rt2560_plcp_signal */ 1535 switch (desc->rate) { 1536 case 0xb: return 12; 1537 case 0xf: return 18; 1538 case 0xa: return 24; 1539 case 0xe: return 36; 1540 case 0x9: return 48; 1541 case 0xd: return 72; 1542 case 0x8: return 96; 1543 case 0xc: return 108; 1544 } 1545 } else { 1546 if (desc->rate == 10) 1547 return 2; 1548 if (desc->rate == 20) 1549 return 4; 1550 if (desc->rate == 55) 1551 return 11; 1552 if (desc->rate == 110) 1553 return 22; 1554 } 1555 return 2; /* should not get there */ 1556 } 1557 1558 /* 1559 * Return the expected ack rate for a frame transmitted at rate `rate'. 1560 * XXX: this should depend on the destination node basic rate set. 1561 */ 1562 static int 1563 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1564 { 1565 switch (rate) { 1566 /* CCK rates */ 1567 case 2: 1568 return 2; 1569 case 4: 1570 case 11: 1571 case 22: 1572 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1573 1574 /* OFDM rates */ 1575 case 12: 1576 case 18: 1577 return 12; 1578 case 24: 1579 case 36: 1580 return 24; 1581 case 48: 1582 case 72: 1583 case 96: 1584 case 108: 1585 return 48; 1586 } 1587 1588 /* default to 1Mbps */ 1589 return 2; 1590 } 1591 1592 /* 1593 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1594 * The function automatically determines the operating mode depending on the 1595 * given rate. `flags' indicates whether short preamble is in use or not. 1596 */ 1597 static uint16_t 1598 rt2560_txtime(int len, int rate, uint32_t flags) 1599 { 1600 uint16_t txtime; 1601 1602 if (RAL_RATE_IS_OFDM(rate)) { 1603 /* IEEE Std 802.11a-1999, pp. 37 */ 1604 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1605 txtime = 16 + 4 + 4 * txtime + 6; 1606 } else { 1607 /* IEEE Std 802.11b-1999, pp. 28 */ 1608 txtime = (16 * len + rate - 1) / rate; 1609 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1610 txtime += 72 + 24; 1611 else 1612 txtime += 144 + 48; 1613 } 1614 return txtime; 1615 } 1616 1617 static uint8_t 1618 rt2560_plcp_signal(int rate) 1619 { 1620 switch (rate) { 1621 /* CCK rates (returned values are device-dependent) */ 1622 case 2: return 0x0; 1623 case 4: return 0x1; 1624 case 11: return 0x2; 1625 case 22: return 0x3; 1626 1627 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1628 case 12: return 0xb; 1629 case 18: return 0xf; 1630 case 24: return 0xa; 1631 case 36: return 0xe; 1632 case 48: return 0x9; 1633 case 72: return 0xd; 1634 case 96: return 0x8; 1635 case 108: return 0xc; 1636 1637 /* unsupported rates (should not get there) */ 1638 default: return 0xff; 1639 } 1640 } 1641 1642 static void 1643 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1644 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1645 { 1646 struct ieee80211com *ic = &sc->sc_ic; 1647 uint16_t plcp_length; 1648 int remainder; 1649 1650 desc->flags = htole32(flags); 1651 desc->flags |= htole32(len << 16); 1652 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1653 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1654 1655 desc->physaddr = htole32(physaddr); 1656 desc->wme = htole16( 1657 RT2560_AIFSN(2) | 1658 RT2560_LOGCWMIN(3) | 1659 RT2560_LOGCWMAX(8)); 1660 1661 /* setup PLCP fields */ 1662 desc->plcp_signal = rt2560_plcp_signal(rate); 1663 desc->plcp_service = 4; 1664 1665 len += IEEE80211_CRC_LEN; 1666 if (RAL_RATE_IS_OFDM(rate)) { 1667 desc->flags |= htole32(RT2560_TX_OFDM); 1668 1669 plcp_length = len & 0xfff; 1670 desc->plcp_length_hi = plcp_length >> 6; 1671 desc->plcp_length_lo = plcp_length & 0x3f; 1672 } else { 1673 plcp_length = (16 * len + rate - 1) / rate; 1674 if (rate == 22) { 1675 remainder = (16 * len) % 22; 1676 if (remainder != 0 && remainder < 7) 1677 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1678 } 1679 desc->plcp_length_hi = plcp_length >> 8; 1680 desc->plcp_length_lo = plcp_length & 0xff; 1681 1682 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1683 desc->plcp_signal |= 0x08; 1684 } 1685 } 1686 1687 static int 1688 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1689 struct ieee80211_node *ni) 1690 { 1691 struct rt2560_tx_desc *desc; 1692 struct rt2560_tx_data *data; 1693 int rate, error; 1694 1695 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1696 data = &sc->bcnq.data[sc->bcnq.cur]; 1697 1698 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1699 1700 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1701 BUS_DMA_NOWAIT); 1702 if (error != 0) { 1703 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1704 error); 1705 m_freem(m0); 1706 return error; 1707 } 1708 1709 data->m = m0; 1710 data->ni = ni; 1711 1712 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1713 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1714 data->map->dm_segs->ds_addr); 1715 1716 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1717 BUS_DMASYNC_PREWRITE); 1718 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1719 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1720 BUS_DMASYNC_PREWRITE); 1721 1722 return 0; 1723 } 1724 1725 static int 1726 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1727 struct ieee80211_node *ni) 1728 { 1729 struct ieee80211com *ic = &sc->sc_ic; 1730 struct rt2560_tx_desc *desc; 1731 struct rt2560_tx_data *data; 1732 struct ieee80211_frame *wh; 1733 struct ieee80211_key *k; 1734 uint16_t dur; 1735 uint32_t flags = 0; 1736 int rate, error; 1737 1738 desc = &sc->prioq.desc[sc->prioq.cur]; 1739 data = &sc->prioq.data[sc->prioq.cur]; 1740 1741 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1742 1743 wh = mtod(m0, struct ieee80211_frame *); 1744 1745 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1746 k = ieee80211_crypto_encap(ic, ni, m0); 1747 if (k == NULL) { 1748 m_freem(m0); 1749 return ENOBUFS; 1750 } 1751 1752 /* packet header may have moved, reset our local pointer */ 1753 wh = mtod(m0, struct ieee80211_frame *); 1754 } 1755 1756 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1757 BUS_DMA_NOWAIT); 1758 if (error != 0) { 1759 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1760 error); 1761 m_freem(m0); 1762 return error; 1763 } 1764 1765 if (sc->sc_drvbpf != NULL) { 1766 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1767 1768 tap->wt_flags = 0; 1769 tap->wt_rate = rate; 1770 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1771 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1772 tap->wt_antenna = sc->tx_ant; 1773 1774 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1775 } 1776 1777 data->m = m0; 1778 data->ni = ni; 1779 1780 wh = mtod(m0, struct ieee80211_frame *); 1781 1782 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1783 flags |= RT2560_TX_ACK; 1784 1785 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1786 RAL_SIFS; 1787 *(uint16_t *)wh->i_dur = htole16(dur); 1788 1789 /* tell hardware to add timestamp for probe responses */ 1790 if ((wh->i_fc[0] & 1791 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1792 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1793 flags |= RT2560_TX_TIMESTAMP; 1794 } 1795 1796 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1797 data->map->dm_segs->ds_addr); 1798 1799 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1800 BUS_DMASYNC_PREWRITE); 1801 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1802 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1803 BUS_DMASYNC_PREWRITE); 1804 1805 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1806 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1807 1808 /* kick prio */ 1809 sc->prioq.queued++; 1810 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1811 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1812 1813 return 0; 1814 } 1815 1816 /* 1817 * Build a RTS control frame. 1818 */ 1819 static struct mbuf * 1820 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1821 uint16_t dur) 1822 { 1823 struct ieee80211_frame_rts *rts; 1824 struct mbuf *m; 1825 1826 MGETHDR(m, M_DONTWAIT, MT_DATA); 1827 if (m == NULL) { 1828 sc->sc_ic.ic_stats.is_tx_nobuf++; 1829 aprint_error_dev(&sc->sc_dev, "could not allocate RTS frame\n"); 1830 return NULL; 1831 } 1832 1833 rts = mtod(m, struct ieee80211_frame_rts *); 1834 1835 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1836 IEEE80211_FC0_SUBTYPE_RTS; 1837 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1838 *(uint16_t *)rts->i_dur = htole16(dur); 1839 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1840 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1841 1842 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1843 1844 return m; 1845 } 1846 1847 static int 1848 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1849 struct ieee80211_node *ni) 1850 { 1851 struct ieee80211com *ic = &sc->sc_ic; 1852 struct rt2560_tx_desc *desc; 1853 struct rt2560_tx_data *data; 1854 struct rt2560_node *rn; 1855 struct ieee80211_rateset *rs; 1856 struct ieee80211_frame *wh; 1857 struct ieee80211_key *k; 1858 struct mbuf *mnew; 1859 uint16_t dur; 1860 uint32_t flags = 0; 1861 int rate, error; 1862 1863 wh = mtod(m0, struct ieee80211_frame *); 1864 1865 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1866 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1867 rate = rs->rs_rates[ic->ic_fixed_rate]; 1868 } else { 1869 rs = &ni->ni_rates; 1870 rn = (struct rt2560_node *)ni; 1871 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1872 wh, m0->m_pkthdr.len, -1, NULL, 0); 1873 rate = rs->rs_rates[ni->ni_txrate]; 1874 } 1875 rate &= IEEE80211_RATE_VAL; 1876 1877 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1878 k = ieee80211_crypto_encap(ic, ni, m0); 1879 if (k == NULL) { 1880 m_freem(m0); 1881 return ENOBUFS; 1882 } 1883 1884 /* packet header may have moved, reset our local pointer */ 1885 wh = mtod(m0, struct ieee80211_frame *); 1886 } 1887 1888 /* 1889 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1890 * for directed frames only when the length of the MPDU is greater 1891 * than the length threshold indicated by [...]" ic_rtsthreshold. 1892 */ 1893 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1894 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1895 struct mbuf *m; 1896 int rtsrate, ackrate; 1897 1898 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1899 ackrate = rt2560_ack_rate(ic, rate); 1900 1901 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1902 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1903 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1904 3 * RAL_SIFS; 1905 1906 m = rt2560_get_rts(sc, wh, dur); 1907 1908 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1909 data = &sc->txq.data[sc->txq.cur_encrypt]; 1910 1911 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1912 BUS_DMA_NOWAIT); 1913 if (error != 0) { 1914 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1915 error); 1916 m_freem(m); 1917 m_freem(m0); 1918 return error; 1919 } 1920 1921 /* avoid multiple free() of the same node for each fragment */ 1922 ieee80211_ref_node(ni); 1923 1924 data->m = m; 1925 data->ni = ni; 1926 1927 /* RTS frames are not taken into account for rssadapt */ 1928 data->id.id_node = NULL; 1929 1930 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1931 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1932 data->map->dm_segs->ds_addr); 1933 1934 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1935 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1936 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1937 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1938 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1939 1940 sc->txq.queued++; 1941 sc->txq.cur_encrypt = 1942 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1943 1944 /* 1945 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1946 * asynchronous data frame shall be transmitted after the CTS 1947 * frame and a SIFS period. 1948 */ 1949 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1950 } 1951 1952 data = &sc->txq.data[sc->txq.cur_encrypt]; 1953 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1954 1955 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1956 BUS_DMA_NOWAIT); 1957 if (error != 0 && error != EFBIG) { 1958 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1959 error); 1960 m_freem(m0); 1961 return error; 1962 } 1963 if (error != 0) { 1964 /* too many fragments, linearize */ 1965 1966 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1967 if (mnew == NULL) { 1968 m_freem(m0); 1969 return ENOMEM; 1970 } 1971 1972 M_COPY_PKTHDR(mnew, m0); 1973 if (m0->m_pkthdr.len > MHLEN) { 1974 MCLGET(mnew, M_DONTWAIT); 1975 if (!(mnew->m_flags & M_EXT)) { 1976 m_freem(m0); 1977 m_freem(mnew); 1978 return ENOMEM; 1979 } 1980 } 1981 1982 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 1983 m_freem(m0); 1984 mnew->m_len = mnew->m_pkthdr.len; 1985 m0 = mnew; 1986 1987 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1988 BUS_DMA_NOWAIT); 1989 if (error != 0) { 1990 aprint_error_dev(&sc->sc_dev, "could not map mbuf (error %d)\n", 1991 error); 1992 m_freem(m0); 1993 return error; 1994 } 1995 1996 /* packet header have moved, reset our local pointer */ 1997 wh = mtod(m0, struct ieee80211_frame *); 1998 } 1999 2000 if (sc->sc_drvbpf != NULL) { 2001 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2002 2003 tap->wt_flags = 0; 2004 tap->wt_rate = rate; 2005 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2006 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2007 tap->wt_antenna = sc->tx_ant; 2008 2009 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2010 } 2011 2012 data->m = m0; 2013 data->ni = ni; 2014 2015 /* remember link conditions for rate adaptation algorithm */ 2016 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2017 data->id.id_len = m0->m_pkthdr.len; 2018 data->id.id_rateidx = ni->ni_txrate; 2019 data->id.id_node = ni; 2020 data->id.id_rssi = ni->ni_rssi; 2021 } else 2022 data->id.id_node = NULL; 2023 2024 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2025 flags |= RT2560_TX_ACK; 2026 2027 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2028 ic->ic_flags) + RAL_SIFS; 2029 *(uint16_t *)wh->i_dur = htole16(dur); 2030 } 2031 2032 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2033 data->map->dm_segs->ds_addr); 2034 2035 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2036 BUS_DMASYNC_PREWRITE); 2037 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2038 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2039 BUS_DMASYNC_PREWRITE); 2040 2041 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2042 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2043 2044 /* kick encrypt */ 2045 sc->txq.queued++; 2046 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2047 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2048 2049 return 0; 2050 } 2051 2052 static void 2053 rt2560_start(struct ifnet *ifp) 2054 { 2055 struct rt2560_softc *sc = ifp->if_softc; 2056 struct ieee80211com *ic = &sc->sc_ic; 2057 struct mbuf *m0; 2058 struct ieee80211_node *ni; 2059 struct ether_header *eh; 2060 2061 /* 2062 * net80211 may still try to send management frames even if the 2063 * IFF_RUNNING flag is not set... 2064 */ 2065 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2066 return; 2067 2068 for (;;) { 2069 IF_POLL(&ic->ic_mgtq, m0); 2070 if (m0 != NULL) { 2071 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2072 ifp->if_flags |= IFF_OACTIVE; 2073 break; 2074 } 2075 IF_DEQUEUE(&ic->ic_mgtq, m0); 2076 if (m0 == NULL) 2077 break; 2078 2079 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2080 m0->m_pkthdr.rcvif = NULL; 2081 bpf_mtap3(ic->ic_rawbpf, m0); 2082 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2083 break; 2084 2085 } else { 2086 if (ic->ic_state != IEEE80211_S_RUN) 2087 break; 2088 IFQ_DEQUEUE(&ifp->if_snd, m0); 2089 if (m0 == NULL) 2090 break; 2091 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2092 ifp->if_flags |= IFF_OACTIVE; 2093 break; 2094 } 2095 2096 if (m0->m_len < sizeof (struct ether_header) && 2097 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2098 continue; 2099 2100 eh = mtod(m0, struct ether_header *); 2101 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2102 if (ni == NULL) { 2103 m_freem(m0); 2104 continue; 2105 } 2106 bpf_mtap(ifp, m0); 2107 2108 m0 = ieee80211_encap(ic, m0, ni); 2109 if (m0 == NULL) { 2110 ieee80211_free_node(ni); 2111 continue; 2112 } 2113 2114 bpf_mtap3(ic->ic_rawbpf, m0); 2115 2116 if (rt2560_tx_data(sc, m0, ni) != 0) { 2117 ieee80211_free_node(ni); 2118 ifp->if_oerrors++; 2119 break; 2120 } 2121 } 2122 2123 sc->sc_tx_timer = 5; 2124 ifp->if_timer = 1; 2125 } 2126 } 2127 2128 static void 2129 rt2560_watchdog(struct ifnet *ifp) 2130 { 2131 struct rt2560_softc *sc = ifp->if_softc; 2132 2133 ifp->if_timer = 0; 2134 2135 if (sc->sc_tx_timer > 0) { 2136 if (--sc->sc_tx_timer == 0) { 2137 aprint_error_dev(&sc->sc_dev, "device timeout\n"); 2138 rt2560_init(ifp); 2139 ifp->if_oerrors++; 2140 return; 2141 } 2142 ifp->if_timer = 1; 2143 } 2144 2145 ieee80211_watchdog(&sc->sc_ic); 2146 } 2147 2148 /* 2149 * This function allows for fast channel switching in monitor mode (used by 2150 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2151 * generate a new beacon frame. 2152 */ 2153 static int 2154 rt2560_reset(struct ifnet *ifp) 2155 { 2156 struct rt2560_softc *sc = ifp->if_softc; 2157 struct ieee80211com *ic = &sc->sc_ic; 2158 2159 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2160 return ENETRESET; 2161 2162 rt2560_set_chan(sc, ic->ic_curchan); 2163 2164 return 0; 2165 } 2166 2167 int 2168 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2169 { 2170 struct rt2560_softc *sc = ifp->if_softc; 2171 struct ieee80211com *ic = &sc->sc_ic; 2172 int s, error = 0; 2173 2174 s = splnet(); 2175 2176 switch (cmd) { 2177 case SIOCSIFFLAGS: 2178 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2179 break; 2180 if (ifp->if_flags & IFF_UP) { 2181 if (ifp->if_flags & IFF_RUNNING) 2182 rt2560_update_promisc(sc); 2183 else 2184 rt2560_init(ifp); 2185 } else { 2186 if (ifp->if_flags & IFF_RUNNING) 2187 rt2560_stop(ifp, 1); 2188 } 2189 break; 2190 2191 case SIOCADDMULTI: 2192 case SIOCDELMULTI: 2193 /* XXX no h/w multicast filter? --dyoung */ 2194 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2195 error = 0; 2196 break; 2197 2198 case SIOCS80211CHANNEL: 2199 /* 2200 * This allows for fast channel switching in monitor mode 2201 * (used by kismet). In IBSS mode, we must explicitly reset 2202 * the interface to generate a new beacon frame. 2203 */ 2204 error = ieee80211_ioctl(ic, cmd, data); 2205 if (error == ENETRESET && 2206 ic->ic_opmode == IEEE80211_M_MONITOR) { 2207 rt2560_set_chan(sc, ic->ic_ibss_chan); 2208 error = 0; 2209 } 2210 break; 2211 2212 default: 2213 error = ieee80211_ioctl(ic, cmd, data); 2214 } 2215 2216 if (error == ENETRESET) { 2217 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2218 (IFF_UP | IFF_RUNNING)) 2219 rt2560_init(ifp); 2220 error = 0; 2221 } 2222 2223 splx(s); 2224 2225 return error; 2226 } 2227 2228 static void 2229 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2230 { 2231 uint32_t tmp; 2232 int ntries; 2233 2234 for (ntries = 0; ntries < 100; ntries++) { 2235 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2236 break; 2237 DELAY(1); 2238 } 2239 if (ntries == 100) { 2240 aprint_error_dev(&sc->sc_dev, "could not write to BBP\n"); 2241 return; 2242 } 2243 2244 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2245 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2246 2247 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2248 } 2249 2250 static uint8_t 2251 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2252 { 2253 uint32_t val; 2254 int ntries; 2255 2256 val = RT2560_BBP_BUSY | reg << 8; 2257 RAL_WRITE(sc, RT2560_BBPCSR, val); 2258 2259 for (ntries = 0; ntries < 100; ntries++) { 2260 val = RAL_READ(sc, RT2560_BBPCSR); 2261 if (!(val & RT2560_BBP_BUSY)) 2262 return val & 0xff; 2263 DELAY(1); 2264 } 2265 2266 aprint_error_dev(&sc->sc_dev, "could not read from BBP\n"); 2267 return 0; 2268 } 2269 2270 static void 2271 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2272 { 2273 uint32_t tmp; 2274 int ntries; 2275 2276 for (ntries = 0; ntries < 100; ntries++) { 2277 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2278 break; 2279 DELAY(1); 2280 } 2281 if (ntries == 100) { 2282 aprint_error_dev(&sc->sc_dev, "could not write to RF\n"); 2283 return; 2284 } 2285 2286 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2287 (reg & 0x3); 2288 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2289 2290 /* remember last written value in sc */ 2291 sc->rf_regs[reg] = val; 2292 2293 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2294 } 2295 2296 static void 2297 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2298 { 2299 struct ieee80211com *ic = &sc->sc_ic; 2300 uint8_t power, tmp; 2301 u_int i, chan; 2302 2303 chan = ieee80211_chan2ieee(ic, c); 2304 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2305 return; 2306 2307 if (IEEE80211_IS_CHAN_2GHZ(c)) 2308 power = min(sc->txpow[chan - 1], 31); 2309 else 2310 power = 31; 2311 2312 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2313 2314 switch (sc->rf_rev) { 2315 case RT2560_RF_2522: 2316 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2317 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2318 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2319 break; 2320 2321 case RT2560_RF_2523: 2322 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2323 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2324 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2325 rt2560_rf_write(sc, RT2560_RF4, 2326 (chan == 14) ? 0x00280 : 0x00286); 2327 break; 2328 2329 case RT2560_RF_2524: 2330 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2331 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2332 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2333 rt2560_rf_write(sc, RT2560_RF4, 2334 (chan == 14) ? 0x00280 : 0x00286); 2335 break; 2336 2337 case RT2560_RF_2525: 2338 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2339 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2340 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2341 rt2560_rf_write(sc, RT2560_RF4, 2342 (chan == 14) ? 0x00280 : 0x00286); 2343 2344 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2345 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2346 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2347 rt2560_rf_write(sc, RT2560_RF4, 2348 (chan == 14) ? 0x00280 : 0x00286); 2349 break; 2350 2351 case RT2560_RF_2525E: 2352 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2353 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2354 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2355 rt2560_rf_write(sc, RT2560_RF4, 2356 (chan == 14) ? 0x00286 : 0x00282); 2357 break; 2358 2359 case RT2560_RF_2526: 2360 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2361 rt2560_rf_write(sc, RT2560_RF4, 2362 (chan & 1) ? 0x00386 : 0x00381); 2363 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2364 2365 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2366 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2367 rt2560_rf_write(sc, RT2560_RF4, 2368 (chan & 1) ? 0x00386 : 0x00381); 2369 break; 2370 2371 /* dual-band RF */ 2372 case RT2560_RF_5222: 2373 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2374 2375 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2376 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2377 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2378 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2379 break; 2380 } 2381 2382 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2383 ic->ic_state != IEEE80211_S_SCAN) { 2384 /* set Japan filter bit for channel 14 */ 2385 tmp = rt2560_bbp_read(sc, 70); 2386 2387 tmp &= ~RT2560_JAPAN_FILTER; 2388 if (chan == 14) 2389 tmp |= RT2560_JAPAN_FILTER; 2390 2391 rt2560_bbp_write(sc, 70, tmp); 2392 2393 DELAY(1000); /* RF needs a 1ms delay here */ 2394 rt2560_disable_rf_tune(sc); 2395 2396 /* clear CRC errors */ 2397 RAL_READ(sc, RT2560_CNT0); 2398 } 2399 } 2400 2401 /* 2402 * Disable RF auto-tuning. 2403 */ 2404 static void 2405 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2406 { 2407 uint32_t tmp; 2408 2409 if (sc->rf_rev != RT2560_RF_2523) { 2410 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2411 rt2560_rf_write(sc, RT2560_RF1, tmp); 2412 } 2413 2414 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2415 rt2560_rf_write(sc, RT2560_RF3, tmp); 2416 2417 DPRINTFN(2, ("disabling RF autotune\n")); 2418 } 2419 2420 /* 2421 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2422 * synchronization. 2423 */ 2424 static void 2425 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2426 { 2427 struct ieee80211com *ic = &sc->sc_ic; 2428 uint16_t logcwmin, preload; 2429 uint32_t tmp; 2430 2431 /* first, disable TSF synchronization */ 2432 RAL_WRITE(sc, RT2560_CSR14, 0); 2433 2434 tmp = 16 * ic->ic_bss->ni_intval; 2435 RAL_WRITE(sc, RT2560_CSR12, tmp); 2436 2437 RAL_WRITE(sc, RT2560_CSR13, 0); 2438 2439 logcwmin = 5; 2440 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2441 tmp = logcwmin << 16 | preload; 2442 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2443 2444 /* finally, enable TSF synchronization */ 2445 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2446 if (ic->ic_opmode == IEEE80211_M_STA) 2447 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2448 else 2449 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2450 RT2560_ENABLE_BEACON_GENERATOR; 2451 RAL_WRITE(sc, RT2560_CSR14, tmp); 2452 2453 DPRINTF(("enabling TSF synchronization\n")); 2454 } 2455 2456 static void 2457 rt2560_update_plcp(struct rt2560_softc *sc) 2458 { 2459 struct ieee80211com *ic = &sc->sc_ic; 2460 2461 /* no short preamble for 1Mbps */ 2462 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2463 2464 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2465 /* values taken from the reference driver */ 2466 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2467 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2468 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2469 } else { 2470 /* same values as above or'ed 0x8 */ 2471 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2472 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2473 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2474 } 2475 2476 DPRINTF(("updating PLCP for %s preamble\n", 2477 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2478 } 2479 2480 /* 2481 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2482 * know how these values are computed. 2483 */ 2484 static void 2485 rt2560_update_slot(struct ifnet *ifp) 2486 { 2487 struct rt2560_softc *sc = ifp->if_softc; 2488 struct ieee80211com *ic = &sc->sc_ic; 2489 uint8_t slottime; 2490 uint16_t sifs, pifs, difs, eifs; 2491 uint32_t tmp; 2492 2493 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2494 2495 /* define the MAC slot boundaries */ 2496 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2497 pifs = sifs + slottime; 2498 difs = sifs + 2 * slottime; 2499 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2500 2501 tmp = RAL_READ(sc, RT2560_CSR11); 2502 tmp = (tmp & ~0x1f00) | slottime << 8; 2503 RAL_WRITE(sc, RT2560_CSR11, tmp); 2504 2505 tmp = pifs << 16 | sifs; 2506 RAL_WRITE(sc, RT2560_CSR18, tmp); 2507 2508 tmp = eifs << 16 | difs; 2509 RAL_WRITE(sc, RT2560_CSR19, tmp); 2510 2511 DPRINTF(("setting slottime to %uus\n", slottime)); 2512 } 2513 2514 static void 2515 rt2560_set_basicrates(struct rt2560_softc *sc) 2516 { 2517 struct ieee80211com *ic = &sc->sc_ic; 2518 2519 /* update basic rate set */ 2520 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2521 /* 11b basic rates: 1, 2Mbps */ 2522 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2523 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2524 /* 11a basic rates: 6, 12, 24Mbps */ 2525 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2526 } else { 2527 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2528 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2529 } 2530 } 2531 2532 static void 2533 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2534 { 2535 uint32_t tmp; 2536 2537 /* set ON period to 70ms and OFF period to 30ms */ 2538 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2539 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2540 } 2541 2542 static void 2543 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2544 { 2545 uint32_t tmp; 2546 2547 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2548 RAL_WRITE(sc, RT2560_CSR5, tmp); 2549 2550 tmp = bssid[4] | bssid[5] << 8; 2551 RAL_WRITE(sc, RT2560_CSR6, tmp); 2552 2553 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2554 } 2555 2556 static void 2557 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2558 { 2559 uint32_t tmp; 2560 2561 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2562 RAL_WRITE(sc, RT2560_CSR3, tmp); 2563 2564 tmp = addr[4] | addr[5] << 8; 2565 RAL_WRITE(sc, RT2560_CSR4, tmp); 2566 2567 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2568 } 2569 2570 static void 2571 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2572 { 2573 uint32_t tmp; 2574 2575 tmp = RAL_READ(sc, RT2560_CSR3); 2576 addr[0] = tmp & 0xff; 2577 addr[1] = (tmp >> 8) & 0xff; 2578 addr[2] = (tmp >> 16) & 0xff; 2579 addr[3] = (tmp >> 24); 2580 2581 tmp = RAL_READ(sc, RT2560_CSR4); 2582 addr[4] = tmp & 0xff; 2583 addr[5] = (tmp >> 8) & 0xff; 2584 } 2585 2586 static void 2587 rt2560_update_promisc(struct rt2560_softc *sc) 2588 { 2589 struct ifnet *ifp = &sc->sc_if; 2590 uint32_t tmp; 2591 2592 tmp = RAL_READ(sc, RT2560_RXCSR0); 2593 2594 tmp &= ~RT2560_DROP_NOT_TO_ME; 2595 if (!(ifp->if_flags & IFF_PROMISC)) 2596 tmp |= RT2560_DROP_NOT_TO_ME; 2597 2598 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2599 2600 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2601 "entering" : "leaving")); 2602 } 2603 2604 static void 2605 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2606 { 2607 uint32_t tmp; 2608 uint8_t tx; 2609 2610 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2611 if (antenna == 1) 2612 tx |= RT2560_BBP_ANTA; 2613 else if (antenna == 2) 2614 tx |= RT2560_BBP_ANTB; 2615 else 2616 tx |= RT2560_BBP_DIVERSITY; 2617 2618 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2619 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2620 sc->rf_rev == RT2560_RF_5222) 2621 tx |= RT2560_BBP_FLIPIQ; 2622 2623 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2624 2625 /* update values for CCK and OFDM in BBPCSR1 */ 2626 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2627 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2628 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2629 } 2630 2631 static void 2632 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2633 { 2634 uint8_t rx; 2635 2636 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2637 if (antenna == 1) 2638 rx |= RT2560_BBP_ANTA; 2639 else if (antenna == 2) 2640 rx |= RT2560_BBP_ANTB; 2641 else 2642 rx |= RT2560_BBP_DIVERSITY; 2643 2644 /* need to force no I/Q flip for RF 2525e and 2526 */ 2645 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2646 rx &= ~RT2560_BBP_FLIPIQ; 2647 2648 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2649 } 2650 2651 static const char * 2652 rt2560_get_rf(int rev) 2653 { 2654 switch (rev) { 2655 case RT2560_RF_2522: return "RT2522"; 2656 case RT2560_RF_2523: return "RT2523"; 2657 case RT2560_RF_2524: return "RT2524"; 2658 case RT2560_RF_2525: return "RT2525"; 2659 case RT2560_RF_2525E: return "RT2525e"; 2660 case RT2560_RF_2526: return "RT2526"; 2661 case RT2560_RF_5222: return "RT5222"; 2662 default: return "unknown"; 2663 } 2664 } 2665 2666 static void 2667 rt2560_read_eeprom(struct rt2560_softc *sc) 2668 { 2669 uint16_t val; 2670 int i; 2671 2672 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2673 sc->rf_rev = (val >> 11) & 0x1f; 2674 sc->hw_radio = (val >> 10) & 0x1; 2675 sc->led_mode = (val >> 6) & 0x7; 2676 sc->rx_ant = (val >> 4) & 0x3; 2677 sc->tx_ant = (val >> 2) & 0x3; 2678 sc->nb_ant = val & 0x3; 2679 2680 /* read default values for BBP registers */ 2681 for (i = 0; i < 16; i++) { 2682 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2683 sc->bbp_prom[i].reg = val >> 8; 2684 sc->bbp_prom[i].val = val & 0xff; 2685 } 2686 2687 /* read Tx power for all b/g channels */ 2688 for (i = 0; i < 14 / 2; i++) { 2689 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2690 sc->txpow[i * 2] = val >> 8; 2691 sc->txpow[i * 2 + 1] = val & 0xff; 2692 } 2693 } 2694 2695 static int 2696 rt2560_bbp_init(struct rt2560_softc *sc) 2697 { 2698 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2699 int i, ntries; 2700 2701 /* wait for BBP to be ready */ 2702 for (ntries = 0; ntries < 100; ntries++) { 2703 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2704 break; 2705 DELAY(1); 2706 } 2707 if (ntries == 100) { 2708 aprint_error_dev(&sc->sc_dev, "timeout waiting for BBP\n"); 2709 return EIO; 2710 } 2711 2712 /* initialize BBP registers to default values */ 2713 for (i = 0; i < N(rt2560_def_bbp); i++) { 2714 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2715 rt2560_def_bbp[i].val); 2716 } 2717 #if 0 2718 /* initialize BBP registers to values stored in EEPROM */ 2719 for (i = 0; i < 16; i++) { 2720 if (sc->bbp_prom[i].reg == 0xff) 2721 continue; 2722 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2723 } 2724 #endif 2725 2726 return 0; 2727 #undef N 2728 } 2729 2730 static int 2731 rt2560_init(struct ifnet *ifp) 2732 { 2733 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2734 struct rt2560_softc *sc = ifp->if_softc; 2735 struct ieee80211com *ic = &sc->sc_ic; 2736 uint32_t tmp; 2737 int i; 2738 2739 /* for CardBus, power on the socket */ 2740 if (!(sc->sc_flags & RT2560_ENABLED)) { 2741 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2742 aprint_error_dev(&sc->sc_dev, "could not enable device\n"); 2743 return EIO; 2744 } 2745 sc->sc_flags |= RT2560_ENABLED; 2746 } 2747 2748 rt2560_stop(ifp, 1); 2749 2750 /* setup tx rings */ 2751 tmp = RT2560_PRIO_RING_COUNT << 24 | 2752 RT2560_ATIM_RING_COUNT << 16 | 2753 RT2560_TX_RING_COUNT << 8 | 2754 RT2560_TX_DESC_SIZE; 2755 2756 /* rings _must_ be initialized in this _exact_ order! */ 2757 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2758 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2759 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2760 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2761 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2762 2763 /* setup rx ring */ 2764 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2765 2766 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2767 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2768 2769 /* initialize MAC registers to default values */ 2770 for (i = 0; i < N(rt2560_def_mac); i++) 2771 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2772 2773 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2774 rt2560_set_macaddr(sc, ic->ic_myaddr); 2775 2776 /* set basic rate set (will be updated later) */ 2777 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2778 2779 rt2560_update_slot(ifp); 2780 rt2560_update_plcp(sc); 2781 rt2560_update_led(sc, 0, 0); 2782 2783 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2784 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2785 2786 if (rt2560_bbp_init(sc) != 0) { 2787 rt2560_stop(ifp, 1); 2788 return EIO; 2789 } 2790 2791 rt2560_set_txantenna(sc, 1); 2792 rt2560_set_rxantenna(sc, 1); 2793 2794 /* set default BSS channel */ 2795 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2796 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2797 2798 /* kick Rx */ 2799 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2800 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2801 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2802 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2803 tmp |= RT2560_DROP_TODS; 2804 if (!(ifp->if_flags & IFF_PROMISC)) 2805 tmp |= RT2560_DROP_NOT_TO_ME; 2806 } 2807 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2808 2809 /* clear old FCS and Rx FIFO errors */ 2810 RAL_READ(sc, RT2560_CNT0); 2811 RAL_READ(sc, RT2560_CNT4); 2812 2813 /* clear any pending interrupts */ 2814 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2815 2816 /* enable interrupts */ 2817 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2818 2819 ifp->if_flags &= ~IFF_OACTIVE; 2820 ifp->if_flags |= IFF_RUNNING; 2821 2822 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2823 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2824 else 2825 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2826 2827 return 0; 2828 #undef N 2829 } 2830 2831 static void 2832 rt2560_stop(struct ifnet *ifp, int disable) 2833 { 2834 struct rt2560_softc *sc = ifp->if_softc; 2835 struct ieee80211com *ic = &sc->sc_ic; 2836 2837 sc->sc_tx_timer = 0; 2838 ifp->if_timer = 0; 2839 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2840 2841 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2842 2843 /* abort Tx */ 2844 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2845 2846 /* disable Rx */ 2847 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2848 2849 /* reset ASIC (and thus, BBP) */ 2850 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2851 RAL_WRITE(sc, RT2560_CSR1, 0); 2852 2853 /* disable interrupts */ 2854 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2855 2856 /* clear any pending interrupt */ 2857 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2858 2859 /* reset Tx and Rx rings */ 2860 rt2560_reset_tx_ring(sc, &sc->txq); 2861 rt2560_reset_tx_ring(sc, &sc->atimq); 2862 rt2560_reset_tx_ring(sc, &sc->prioq); 2863 rt2560_reset_tx_ring(sc, &sc->bcnq); 2864 rt2560_reset_rx_ring(sc, &sc->rxq); 2865 2866 } 2867
Indexes created Sun Oct 19 19:09:49 GMT 2025