rt2560.c revision 1.28.2.1
1 /* $NetBSD: rt2560.c,v 1.28.2.1 2017/03/20 06:57:28 pgoyette Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.28.2.1 2017/03/20 06:57:28 pgoyette Exp $"); 28 29 30 #include <sys/param.h> 31 #include <sys/sockio.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/callout.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 #include <net/if_ether.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/ip.h> 57 58 #include <net80211/ieee80211_var.h> 59 #include <net80211/ieee80211_rssadapt.h> 60 #include <net80211/ieee80211_radiotap.h> 61 62 #include <dev/ic/rt2560reg.h> 63 #include <dev/ic/rt2560var.h> 64 65 #ifdef RAL_DEBUG 66 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 67 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 68 int rt2560_debug = 0; 69 #else 70 #define DPRINTF(x) 71 #define DPRINTFN(n, x) 72 #endif 73 74 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 75 struct rt2560_tx_ring *, int); 76 static void rt2560_reset_tx_ring(struct rt2560_softc *, 77 struct rt2560_tx_ring *); 78 static void rt2560_free_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *); 80 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 81 struct rt2560_rx_ring *, int); 82 static void rt2560_reset_rx_ring(struct rt2560_softc *, 83 struct rt2560_rx_ring *); 84 static void rt2560_free_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *); 86 static struct ieee80211_node * 87 rt2560_node_alloc(struct ieee80211_node_table *); 88 static int rt2560_media_change(struct ifnet *); 89 static void rt2560_next_scan(void *); 90 static void rt2560_iter_func(void *, struct ieee80211_node *); 91 static void rt2560_update_rssadapt(void *); 92 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 93 int); 94 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 95 static void rt2560_encryption_intr(struct rt2560_softc *); 96 static void rt2560_tx_intr(struct rt2560_softc *); 97 static void rt2560_prio_intr(struct rt2560_softc *); 98 static void rt2560_decryption_intr(struct rt2560_softc *); 99 static void rt2560_rx_intr(struct rt2560_softc *); 100 static void rt2560_beacon_expire(struct rt2560_softc *); 101 static void rt2560_wakeup_expire(struct rt2560_softc *); 102 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 103 static int rt2560_ack_rate(struct ieee80211com *, int); 104 static uint16_t rt2560_txtime(int, int, uint32_t); 105 static uint8_t rt2560_plcp_signal(int); 106 static void rt2560_setup_tx_desc(struct rt2560_softc *, 107 struct rt2560_tx_desc *, uint32_t, int, int, int, 108 bus_addr_t); 109 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 110 struct ieee80211_node *); 111 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 112 struct ieee80211_node *); 113 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 114 struct ieee80211_frame *, uint16_t); 115 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 116 struct ieee80211_node *); 117 static void rt2560_start(struct ifnet *); 118 static void rt2560_watchdog(struct ifnet *); 119 static int rt2560_reset(struct ifnet *); 120 static int rt2560_ioctl(struct ifnet *, u_long, void *); 121 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 122 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 123 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 124 static void rt2560_set_chan(struct rt2560_softc *, 125 struct ieee80211_channel *); 126 static void rt2560_disable_rf_tune(struct rt2560_softc *); 127 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 128 static void rt2560_update_plcp(struct rt2560_softc *); 129 static void rt2560_update_slot(struct ifnet *); 130 static void rt2560_set_basicrates(struct rt2560_softc *); 131 static void rt2560_update_led(struct rt2560_softc *, int, int); 132 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 133 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 134 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 135 static void rt2560_update_promisc(struct rt2560_softc *); 136 static void rt2560_set_txantenna(struct rt2560_softc *, int); 137 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 138 static const char *rt2560_get_rf(int); 139 static void rt2560_read_eeprom(struct rt2560_softc *); 140 static int rt2560_bbp_init(struct rt2560_softc *); 141 static int rt2560_init(struct ifnet *); 142 static void rt2560_stop(struct ifnet *, int); 143 static void rt2560_softintr(void *); 144 145 /* 146 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 147 */ 148 static const struct ieee80211_rateset rt2560_rateset_11a = 149 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 150 151 static const struct ieee80211_rateset rt2560_rateset_11b = 152 { 4, { 2, 4, 11, 22 } }; 153 154 static const struct ieee80211_rateset rt2560_rateset_11g = 155 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 156 157 /* 158 * Default values for MAC registers; values taken from the reference driver. 159 */ 160 static const struct { 161 uint32_t reg; 162 uint32_t val; 163 } rt2560_def_mac[] = { 164 { RT2560_PSCSR0, 0x00020002 }, 165 { RT2560_PSCSR1, 0x00000002 }, 166 { RT2560_PSCSR2, 0x00020002 }, 167 { RT2560_PSCSR3, 0x00000002 }, 168 { RT2560_TIMECSR, 0x00003f21 }, 169 { RT2560_CSR9, 0x00000780 }, 170 { RT2560_CSR11, 0x07041483 }, 171 { RT2560_CNT3, 0x00000000 }, 172 { RT2560_TXCSR1, 0x07614562 }, 173 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 174 { RT2560_ACKPCTCSR, 0x7038140a }, 175 { RT2560_ARTCSR1, 0x1d21252d }, 176 { RT2560_ARTCSR2, 0x1919191d }, 177 { RT2560_RXCSR0, 0xffffffff }, 178 { RT2560_RXCSR3, 0xb3aab3af }, 179 { RT2560_PCICSR, 0x000003b8 }, 180 { RT2560_PWRCSR0, 0x3f3b3100 }, 181 { RT2560_GPIOCSR, 0x0000ff00 }, 182 { RT2560_TESTCSR, 0x000000f0 }, 183 { RT2560_PWRCSR1, 0x000001ff }, 184 { RT2560_MACCSR0, 0x00213223 }, 185 { RT2560_MACCSR1, 0x00235518 }, 186 { RT2560_RLPWCSR, 0x00000040 }, 187 { RT2560_RALINKCSR, 0x9a009a11 }, 188 { RT2560_CSR7, 0xffffffff }, 189 { RT2560_BBPCSR1, 0x82188200 }, 190 { RT2560_TXACKCSR0, 0x00000020 }, 191 { RT2560_SECCSR3, 0x0000e78f } 192 }; 193 194 /* 195 * Default values for BBP registers; values taken from the reference driver. 196 */ 197 static const struct { 198 uint8_t reg; 199 uint8_t val; 200 } rt2560_def_bbp[] = { 201 { 3, 0x02 }, 202 { 4, 0x19 }, 203 { 14, 0x1c }, 204 { 15, 0x30 }, 205 { 16, 0xac }, 206 { 17, 0x48 }, 207 { 18, 0x18 }, 208 { 19, 0xff }, 209 { 20, 0x1e }, 210 { 21, 0x08 }, 211 { 22, 0x08 }, 212 { 23, 0x08 }, 213 { 24, 0x80 }, 214 { 25, 0x50 }, 215 { 26, 0x08 }, 216 { 27, 0x23 }, 217 { 30, 0x10 }, 218 { 31, 0x2b }, 219 { 32, 0xb9 }, 220 { 34, 0x12 }, 221 { 35, 0x50 }, 222 { 39, 0xc4 }, 223 { 40, 0x02 }, 224 { 41, 0x60 }, 225 { 53, 0x10 }, 226 { 54, 0x18 }, 227 { 56, 0x08 }, 228 { 57, 0x10 }, 229 { 58, 0x08 }, 230 { 61, 0x60 }, 231 { 62, 0x10 }, 232 { 75, 0xff } 233 }; 234 235 /* 236 * Default values for RF register R2 indexed by channel numbers; values taken 237 * from the reference driver. 238 */ 239 static const uint32_t rt2560_rf2522_r2[] = { 240 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 241 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 242 }; 243 244 static const uint32_t rt2560_rf2523_r2[] = { 245 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 246 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 247 }; 248 249 static const uint32_t rt2560_rf2524_r2[] = { 250 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 251 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 252 }; 253 254 static const uint32_t rt2560_rf2525_r2[] = { 255 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 256 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 257 }; 258 259 static const uint32_t rt2560_rf2525_hi_r2[] = { 260 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 261 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 262 }; 263 264 static const uint32_t rt2560_rf2525e_r2[] = { 265 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 266 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 267 }; 268 269 static const uint32_t rt2560_rf2526_hi_r2[] = { 270 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 271 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 272 }; 273 274 static const uint32_t rt2560_rf2526_r2[] = { 275 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 276 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 277 }; 278 279 /* 280 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 281 * values taken from the reference driver. 282 */ 283 static const struct { 284 uint8_t chan; 285 uint32_t r1; 286 uint32_t r2; 287 uint32_t r4; 288 } rt2560_rf5222[] = { 289 { 1, 0x08808, 0x0044d, 0x00282 }, 290 { 2, 0x08808, 0x0044e, 0x00282 }, 291 { 3, 0x08808, 0x0044f, 0x00282 }, 292 { 4, 0x08808, 0x00460, 0x00282 }, 293 { 5, 0x08808, 0x00461, 0x00282 }, 294 { 6, 0x08808, 0x00462, 0x00282 }, 295 { 7, 0x08808, 0x00463, 0x00282 }, 296 { 8, 0x08808, 0x00464, 0x00282 }, 297 { 9, 0x08808, 0x00465, 0x00282 }, 298 { 10, 0x08808, 0x00466, 0x00282 }, 299 { 11, 0x08808, 0x00467, 0x00282 }, 300 { 12, 0x08808, 0x00468, 0x00282 }, 301 { 13, 0x08808, 0x00469, 0x00282 }, 302 { 14, 0x08808, 0x0046b, 0x00286 }, 303 304 { 36, 0x08804, 0x06225, 0x00287 }, 305 { 40, 0x08804, 0x06226, 0x00287 }, 306 { 44, 0x08804, 0x06227, 0x00287 }, 307 { 48, 0x08804, 0x06228, 0x00287 }, 308 { 52, 0x08804, 0x06229, 0x00287 }, 309 { 56, 0x08804, 0x0622a, 0x00287 }, 310 { 60, 0x08804, 0x0622b, 0x00287 }, 311 { 64, 0x08804, 0x0622c, 0x00287 }, 312 313 { 100, 0x08804, 0x02200, 0x00283 }, 314 { 104, 0x08804, 0x02201, 0x00283 }, 315 { 108, 0x08804, 0x02202, 0x00283 }, 316 { 112, 0x08804, 0x02203, 0x00283 }, 317 { 116, 0x08804, 0x02204, 0x00283 }, 318 { 120, 0x08804, 0x02205, 0x00283 }, 319 { 124, 0x08804, 0x02206, 0x00283 }, 320 { 128, 0x08804, 0x02207, 0x00283 }, 321 { 132, 0x08804, 0x02208, 0x00283 }, 322 { 136, 0x08804, 0x02209, 0x00283 }, 323 { 140, 0x08804, 0x0220a, 0x00283 }, 324 325 { 149, 0x08808, 0x02429, 0x00281 }, 326 { 153, 0x08808, 0x0242b, 0x00281 }, 327 { 157, 0x08808, 0x0242d, 0x00281 }, 328 { 161, 0x08808, 0x0242f, 0x00281 } 329 }; 330 331 int 332 rt2560_attach(void *xsc, int id) 333 { 334 struct rt2560_softc *sc = xsc; 335 struct ieee80211com *ic = &sc->sc_ic; 336 struct ifnet *ifp = &sc->sc_if; 337 int error, i; 338 339 callout_init(&sc->scan_ch, 0); 340 callout_init(&sc->rssadapt_ch, 0); 341 342 /* retrieve RT2560 rev. no */ 343 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 344 345 /* retrieve MAC address */ 346 rt2560_get_macaddr(sc, ic->ic_myaddr); 347 348 aprint_normal_dev(sc->sc_dev, "802.11 address %s\n", 349 ether_sprintf(ic->ic_myaddr)); 350 351 /* retrieve RF rev. no and various other things from EEPROM */ 352 rt2560_read_eeprom(sc); 353 354 aprint_normal_dev(sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 355 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 356 357 sc->sc_soft_ih = softint_establish(SOFTINT_NET, rt2560_softintr, sc); 358 if (sc->sc_soft_ih == NULL) { 359 aprint_error_dev(sc->sc_dev, "could not establish softint\n)"); 360 goto fail0; 361 } 362 363 /* 364 * Allocate Tx and Rx rings. 365 */ 366 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 367 if (error != 0) { 368 aprint_error_dev(sc->sc_dev, "could not allocate Tx ring\n)"); 369 goto fail1; 370 } 371 372 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 373 if (error != 0) { 374 aprint_error_dev(sc->sc_dev, "could not allocate ATIM ring\n"); 375 goto fail2; 376 } 377 378 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 379 if (error != 0) { 380 aprint_error_dev(sc->sc_dev, "could not allocate Prio ring\n"); 381 goto fail3; 382 } 383 384 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 385 if (error != 0) { 386 aprint_error_dev(sc->sc_dev, "could not allocate Beacon ring\n"); 387 goto fail4; 388 } 389 390 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 391 if (error != 0) { 392 aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n"); 393 goto fail5; 394 } 395 396 ifp->if_softc = sc; 397 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 398 ifp->if_init = rt2560_init; 399 ifp->if_stop = rt2560_stop; 400 ifp->if_ioctl = rt2560_ioctl; 401 ifp->if_start = rt2560_start; 402 ifp->if_watchdog = rt2560_watchdog; 403 IFQ_SET_READY(&ifp->if_snd); 404 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 405 406 ic->ic_ifp = ifp; 407 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 408 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 409 ic->ic_state = IEEE80211_S_INIT; 410 411 /* set device capabilities */ 412 ic->ic_caps = 413 IEEE80211_C_IBSS | /* IBSS mode supported */ 414 IEEE80211_C_MONITOR | /* monitor mode supported */ 415 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 416 IEEE80211_C_TXPMGT | /* tx power management */ 417 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 418 IEEE80211_C_SHSLOT | /* short slot time supported */ 419 IEEE80211_C_WPA; /* 802.11i */ 420 421 if (sc->rf_rev == RT2560_RF_5222) { 422 /* set supported .11a rates */ 423 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 424 425 /* set supported .11a channels */ 426 for (i = 36; i <= 64; i += 4) { 427 ic->ic_channels[i].ic_freq = 428 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 429 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 430 } 431 for (i = 100; i <= 140; i += 4) { 432 ic->ic_channels[i].ic_freq = 433 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 434 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 435 } 436 for (i = 149; i <= 161; i += 4) { 437 ic->ic_channels[i].ic_freq = 438 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 439 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 440 } 441 } 442 443 /* set supported .11b and .11g rates */ 444 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 445 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 446 447 /* set supported .11b and .11g channels (1 through 14) */ 448 for (i = 1; i <= 14; i++) { 449 ic->ic_channels[i].ic_freq = 450 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 451 ic->ic_channels[i].ic_flags = 452 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 453 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 454 } 455 456 if_initialize(ifp); 457 ieee80211_ifattach(ic); 458 /* Use common softint-based if_input */ 459 ifp->if_percpuq = if_percpuq_create(ifp); 460 if_register(ifp); 461 462 ic->ic_node_alloc = rt2560_node_alloc; 463 ic->ic_updateslot = rt2560_update_slot; 464 ic->ic_reset = rt2560_reset; 465 466 /* override state transition machine */ 467 sc->sc_newstate = ic->ic_newstate; 468 ic->ic_newstate = rt2560_newstate; 469 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 470 471 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 472 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 473 474 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 475 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 476 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 477 478 sc->sc_txtap_len = sizeof sc->sc_txtapu; 479 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 480 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 481 482 483 sc->dwelltime = 200; 484 485 ieee80211_announce(ic); 486 487 if (pmf_device_register(sc->sc_dev, NULL, NULL)) 488 pmf_class_network_register(sc->sc_dev, ifp); 489 else 490 aprint_error_dev(sc->sc_dev, 491 "couldn't establish power handler\n"); 492 493 return 0; 494 495 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 496 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 497 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 498 fail2: rt2560_free_tx_ring(sc, &sc->txq); 499 fail1: softint_disestablish(sc->sc_soft_ih); 500 sc->sc_soft_ih = NULL; 501 fail0: return ENXIO; 502 } 503 504 505 int 506 rt2560_detach(void *xsc) 507 { 508 struct rt2560_softc *sc = xsc; 509 struct ifnet *ifp = &sc->sc_if; 510 511 callout_stop(&sc->scan_ch); 512 callout_stop(&sc->rssadapt_ch); 513 514 pmf_device_deregister(sc->sc_dev); 515 516 rt2560_stop(ifp, 1); 517 518 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 519 if_detach(ifp); 520 521 rt2560_free_tx_ring(sc, &sc->txq); 522 rt2560_free_tx_ring(sc, &sc->atimq); 523 rt2560_free_tx_ring(sc, &sc->prioq); 524 rt2560_free_tx_ring(sc, &sc->bcnq); 525 rt2560_free_rx_ring(sc, &sc->rxq); 526 527 if (sc->sc_soft_ih != NULL) { 528 softint_disestablish(sc->sc_soft_ih); 529 sc->sc_soft_ih = NULL; 530 } 531 532 return 0; 533 } 534 535 int 536 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 537 int count) 538 { 539 int i, nsegs, error; 540 541 ring->count = count; 542 ring->queued = 0; 543 ring->cur = ring->next = 0; 544 ring->cur_encrypt = ring->next_encrypt = 0; 545 546 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 547 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 548 if (error != 0) { 549 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 550 goto fail; 551 } 552 553 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 554 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 555 if (error != 0) { 556 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 557 goto fail; 558 } 559 560 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 561 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 562 BUS_DMA_NOWAIT); 563 if (error != 0) { 564 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 565 goto fail; 566 } 567 568 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 569 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 570 if (error != 0) { 571 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 572 goto fail; 573 } 574 575 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 576 ring->physaddr = ring->map->dm_segs->ds_addr; 577 578 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 579 M_NOWAIT); 580 if (ring->data == NULL) { 581 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 582 error = ENOMEM; 583 goto fail; 584 } 585 586 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 587 for (i = 0; i < count; i++) { 588 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 589 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 590 &ring->data[i].map); 591 if (error != 0) { 592 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 593 goto fail; 594 } 595 } 596 597 return 0; 598 599 fail: rt2560_free_tx_ring(sc, ring); 600 return error; 601 } 602 603 void 604 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 605 { 606 struct rt2560_tx_desc *desc; 607 struct rt2560_tx_data *data; 608 int i; 609 610 for (i = 0; i < ring->count; i++) { 611 desc = &ring->desc[i]; 612 data = &ring->data[i]; 613 614 if (data->m != NULL) { 615 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 616 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 617 bus_dmamap_unload(sc->sc_dmat, data->map); 618 m_freem(data->m); 619 data->m = NULL; 620 } 621 622 if (data->ni != NULL) { 623 ieee80211_free_node(data->ni); 624 data->ni = NULL; 625 } 626 627 desc->flags = 0; 628 } 629 630 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 631 BUS_DMASYNC_PREWRITE); 632 633 ring->queued = 0; 634 ring->cur = ring->next = 0; 635 ring->cur_encrypt = ring->next_encrypt = 0; 636 } 637 638 void 639 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 640 { 641 struct rt2560_tx_data *data; 642 int i; 643 644 if (ring->desc != NULL) { 645 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 646 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 647 bus_dmamap_unload(sc->sc_dmat, ring->map); 648 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 649 ring->count * RT2560_TX_DESC_SIZE); 650 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 651 } 652 653 if (ring->data != NULL) { 654 for (i = 0; i < ring->count; i++) { 655 data = &ring->data[i]; 656 657 if (data->m != NULL) { 658 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 659 data->map->dm_mapsize, 660 BUS_DMASYNC_POSTWRITE); 661 bus_dmamap_unload(sc->sc_dmat, data->map); 662 m_freem(data->m); 663 } 664 665 if (data->ni != NULL) 666 ieee80211_free_node(data->ni); 667 668 669 if (data->map != NULL) 670 bus_dmamap_destroy(sc->sc_dmat, data->map); 671 } 672 free(ring->data, M_DEVBUF); 673 } 674 } 675 676 int 677 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 678 int count) 679 { 680 struct rt2560_rx_desc *desc; 681 struct rt2560_rx_data *data; 682 int i, nsegs, error; 683 684 ring->count = count; 685 ring->cur = ring->next = 0; 686 ring->cur_decrypt = 0; 687 688 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 689 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 690 if (error != 0) { 691 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 692 goto fail; 693 } 694 695 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 696 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 697 if (error != 0) { 698 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 699 goto fail; 700 } 701 702 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 703 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 704 BUS_DMA_NOWAIT); 705 if (error != 0) { 706 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 707 goto fail; 708 } 709 710 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 711 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 712 if (error != 0) { 713 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 714 goto fail; 715 } 716 717 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 718 ring->physaddr = ring->map->dm_segs->ds_addr; 719 720 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 721 M_NOWAIT); 722 if (ring->data == NULL) { 723 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 724 error = ENOMEM; 725 goto fail; 726 } 727 728 /* 729 * Pre-allocate Rx buffers and populate Rx ring. 730 */ 731 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 732 for (i = 0; i < count; i++) { 733 desc = &sc->rxq.desc[i]; 734 data = &sc->rxq.data[i]; 735 736 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 737 0, BUS_DMA_NOWAIT, &data->map); 738 if (error != 0) { 739 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 740 goto fail; 741 } 742 743 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 744 if (data->m == NULL) { 745 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 746 error = ENOMEM; 747 goto fail; 748 } 749 750 MCLGET(data->m, M_DONTWAIT); 751 if (!(data->m->m_flags & M_EXT)) { 752 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 753 error = ENOMEM; 754 goto fail; 755 } 756 757 error = bus_dmamap_load(sc->sc_dmat, data->map, 758 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 759 if (error != 0) { 760 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 761 goto fail; 762 } 763 764 desc->flags = htole32(RT2560_RX_BUSY); 765 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 766 } 767 768 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 769 BUS_DMASYNC_PREWRITE); 770 771 return 0; 772 773 fail: rt2560_free_rx_ring(sc, ring); 774 return error; 775 } 776 777 void 778 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 779 { 780 int i; 781 782 for (i = 0; i < ring->count; i++) { 783 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 784 ring->data[i].drop = 0; 785 } 786 787 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 788 BUS_DMASYNC_PREWRITE); 789 790 ring->cur = ring->next = 0; 791 ring->cur_decrypt = 0; 792 } 793 794 void 795 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 796 { 797 struct rt2560_rx_data *data; 798 int i; 799 800 if (ring->desc != NULL) { 801 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 802 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 803 bus_dmamap_unload(sc->sc_dmat, ring->map); 804 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 805 ring->count * RT2560_RX_DESC_SIZE); 806 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 807 } 808 809 if (ring->data != NULL) { 810 for (i = 0; i < ring->count; i++) { 811 data = &ring->data[i]; 812 813 if (data->m != NULL) { 814 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 815 data->map->dm_mapsize, 816 BUS_DMASYNC_POSTREAD); 817 bus_dmamap_unload(sc->sc_dmat, data->map); 818 m_freem(data->m); 819 } 820 821 if (data->map != NULL) 822 bus_dmamap_destroy(sc->sc_dmat, data->map); 823 } 824 free(ring->data, M_DEVBUF); 825 } 826 } 827 828 struct ieee80211_node * 829 rt2560_node_alloc(struct ieee80211_node_table *nt) 830 { 831 struct rt2560_node *rn; 832 833 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 834 M_NOWAIT | M_ZERO); 835 836 return (rn != NULL) ? &rn->ni : NULL; 837 } 838 839 int 840 rt2560_media_change(struct ifnet *ifp) 841 { 842 int error; 843 844 error = ieee80211_media_change(ifp); 845 if (error != ENETRESET) 846 return error; 847 848 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 849 rt2560_init(ifp); 850 851 return 0; 852 } 853 854 /* 855 * This function is called periodically (every 200ms) during scanning to 856 * switch from one channel to another. 857 */ 858 void 859 rt2560_next_scan(void *arg) 860 { 861 struct rt2560_softc *sc = arg; 862 struct ieee80211com *ic = &sc->sc_ic; 863 int s; 864 865 s = splnet(); 866 if (ic->ic_state == IEEE80211_S_SCAN) 867 ieee80211_next_scan(ic); 868 splx(s); 869 } 870 871 /* 872 * This function is called for each neighbor node. 873 */ 874 void 875 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 876 { 877 struct rt2560_node *rn = (struct rt2560_node *)ni; 878 879 ieee80211_rssadapt_updatestats(&rn->rssadapt); 880 } 881 882 /* 883 * This function is called periodically (every 100ms) in RUN state to update 884 * the rate adaptation statistics. 885 */ 886 void 887 rt2560_update_rssadapt(void *arg) 888 { 889 struct rt2560_softc *sc = arg; 890 struct ieee80211com *ic = &sc->sc_ic; 891 int s; 892 893 s = splnet(); 894 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 895 896 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 897 splx(s); 898 } 899 900 int 901 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 902 { 903 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 904 enum ieee80211_state ostate; 905 struct ieee80211_node *ni; 906 struct mbuf *m; 907 int error = 0; 908 909 ostate = ic->ic_state; 910 callout_stop(&sc->scan_ch); 911 912 switch (nstate) { 913 case IEEE80211_S_INIT: 914 callout_stop(&sc->rssadapt_ch); 915 916 if (ostate == IEEE80211_S_RUN) { 917 /* abort TSF synchronization */ 918 RAL_WRITE(sc, RT2560_CSR14, 0); 919 920 /* turn association led off */ 921 rt2560_update_led(sc, 0, 0); 922 } 923 break; 924 925 case IEEE80211_S_SCAN: 926 rt2560_set_chan(sc, ic->ic_curchan); 927 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 928 rt2560_next_scan, sc); 929 break; 930 931 case IEEE80211_S_AUTH: 932 rt2560_set_chan(sc, ic->ic_curchan); 933 break; 934 935 case IEEE80211_S_ASSOC: 936 rt2560_set_chan(sc, ic->ic_curchan); 937 break; 938 939 case IEEE80211_S_RUN: 940 rt2560_set_chan(sc, ic->ic_curchan); 941 942 ni = ic->ic_bss; 943 944 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 945 rt2560_update_plcp(sc); 946 rt2560_set_basicrates(sc); 947 rt2560_set_bssid(sc, ni->ni_bssid); 948 } 949 950 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 951 ic->ic_opmode == IEEE80211_M_IBSS) { 952 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 953 if (m == NULL) { 954 aprint_error_dev(sc->sc_dev, "could not allocate beacon\n"); 955 error = ENOBUFS; 956 break; 957 } 958 959 ieee80211_ref_node(ni); 960 error = rt2560_tx_bcn(sc, m, ni); 961 if (error != 0) 962 break; 963 } 964 965 /* turn assocation led on */ 966 rt2560_update_led(sc, 1, 0); 967 968 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 969 callout_reset(&sc->rssadapt_ch, hz / 10, 970 rt2560_update_rssadapt, sc); 971 rt2560_enable_tsf_sync(sc); 972 } 973 break; 974 } 975 976 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 977 } 978 979 /* 980 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 981 * 93C66). 982 */ 983 uint16_t 984 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 985 { 986 uint32_t tmp; 987 uint16_t val; 988 int n; 989 990 /* clock C once before the first command */ 991 RT2560_EEPROM_CTL(sc, 0); 992 993 RT2560_EEPROM_CTL(sc, RT2560_S); 994 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 995 RT2560_EEPROM_CTL(sc, RT2560_S); 996 997 /* write start bit (1) */ 998 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 999 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1000 1001 /* write READ opcode (10) */ 1002 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1003 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1004 RT2560_EEPROM_CTL(sc, RT2560_S); 1005 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1006 1007 /* write address (A5-A0 or A7-A0) */ 1008 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1009 for (; n >= 0; n--) { 1010 RT2560_EEPROM_CTL(sc, RT2560_S | 1011 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1012 RT2560_EEPROM_CTL(sc, RT2560_S | 1013 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1014 } 1015 1016 RT2560_EEPROM_CTL(sc, RT2560_S); 1017 1018 /* read data Q15-Q0 */ 1019 val = 0; 1020 for (n = 15; n >= 0; n--) { 1021 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1022 tmp = RAL_READ(sc, RT2560_CSR21); 1023 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1024 RT2560_EEPROM_CTL(sc, RT2560_S); 1025 } 1026 1027 RT2560_EEPROM_CTL(sc, 0); 1028 1029 /* clear Chip Select and clock C */ 1030 RT2560_EEPROM_CTL(sc, RT2560_S); 1031 RT2560_EEPROM_CTL(sc, 0); 1032 RT2560_EEPROM_CTL(sc, RT2560_C); 1033 1034 return val; 1035 } 1036 1037 /* 1038 * Some frames were processed by the hardware cipher engine and are ready for 1039 * transmission. 1040 */ 1041 void 1042 rt2560_encryption_intr(struct rt2560_softc *sc) 1043 { 1044 struct rt2560_tx_desc *desc; 1045 int hw; 1046 1047 /* retrieve last descriptor index processed by cipher engine */ 1048 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1049 RT2560_TX_DESC_SIZE; 1050 1051 for (; sc->txq.next_encrypt != hw;) { 1052 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1053 1054 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1055 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1056 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1057 1058 if (le32toh(desc->flags) & 1059 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1060 break; 1061 1062 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1063 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1064 RT2560_TX_CIPHER_TKIP) 1065 desc->eiv = bswap32(desc->eiv); 1066 1067 /* mark the frame ready for transmission */ 1068 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1069 1070 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1071 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1072 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1073 1074 DPRINTFN(15, ("encryption done idx=%u\n", 1075 sc->txq.next_encrypt)); 1076 1077 sc->txq.next_encrypt = 1078 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1079 } 1080 1081 /* kick Tx */ 1082 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1083 } 1084 1085 void 1086 rt2560_tx_intr(struct rt2560_softc *sc) 1087 { 1088 struct ieee80211com *ic = &sc->sc_ic; 1089 struct ifnet *ifp = ic->ic_ifp; 1090 struct rt2560_tx_desc *desc; 1091 struct rt2560_tx_data *data; 1092 struct rt2560_node *rn; 1093 int s; 1094 1095 s = splnet(); 1096 1097 for (;;) { 1098 desc = &sc->txq.desc[sc->txq.next]; 1099 data = &sc->txq.data[sc->txq.next]; 1100 1101 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1102 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1103 BUS_DMASYNC_POSTREAD); 1104 1105 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1106 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1107 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1108 break; 1109 1110 rn = (struct rt2560_node *)data->ni; 1111 1112 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1113 case RT2560_TX_SUCCESS: 1114 DPRINTFN(10, ("data frame sent successfully\n")); 1115 if (data->id.id_node != NULL) { 1116 ieee80211_rssadapt_raise_rate(ic, 1117 &rn->rssadapt, &data->id); 1118 } 1119 ifp->if_opackets++; 1120 break; 1121 1122 case RT2560_TX_SUCCESS_RETRY: 1123 DPRINTFN(9, ("data frame sent after %u retries\n", 1124 (le32toh(desc->flags) >> 5) & 0x7)); 1125 ifp->if_opackets++; 1126 break; 1127 1128 case RT2560_TX_FAIL_RETRY: 1129 DPRINTFN(9, ("sending data frame failed (too much " 1130 "retries)\n")); 1131 if (data->id.id_node != NULL) { 1132 ieee80211_rssadapt_lower_rate(ic, data->ni, 1133 &rn->rssadapt, &data->id); 1134 } 1135 ifp->if_oerrors++; 1136 break; 1137 1138 case RT2560_TX_FAIL_INVALID: 1139 case RT2560_TX_FAIL_OTHER: 1140 default: 1141 aprint_error_dev(sc->sc_dev, 1142 "sending data frame failed 0x%08x\n", 1143 le32toh(desc->flags)); 1144 ifp->if_oerrors++; 1145 } 1146 1147 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1148 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1149 bus_dmamap_unload(sc->sc_dmat, data->map); 1150 m_freem(data->m); 1151 data->m = NULL; 1152 ieee80211_free_node(data->ni); 1153 data->ni = NULL; 1154 1155 /* descriptor is no longer valid */ 1156 desc->flags &= ~htole32(RT2560_TX_VALID); 1157 1158 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1159 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1160 BUS_DMASYNC_PREWRITE); 1161 1162 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1163 1164 sc->txq.queued--; 1165 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1166 } 1167 1168 sc->sc_tx_timer = 0; 1169 ifp->if_flags &= ~IFF_OACTIVE; 1170 rt2560_start(ifp); 1171 1172 splx(s); 1173 } 1174 1175 void 1176 rt2560_prio_intr(struct rt2560_softc *sc) 1177 { 1178 struct ieee80211com *ic = &sc->sc_ic; 1179 struct ifnet *ifp = ic->ic_ifp; 1180 struct rt2560_tx_desc *desc; 1181 struct rt2560_tx_data *data; 1182 int s; 1183 1184 s = splnet(); 1185 1186 for (;;) { 1187 desc = &sc->prioq.desc[sc->prioq.next]; 1188 data = &sc->prioq.data[sc->prioq.next]; 1189 1190 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1191 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1192 BUS_DMASYNC_POSTREAD); 1193 1194 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1195 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1196 break; 1197 1198 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1199 case RT2560_TX_SUCCESS: 1200 DPRINTFN(10, ("mgt frame sent successfully\n")); 1201 break; 1202 1203 case RT2560_TX_SUCCESS_RETRY: 1204 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1205 (le32toh(desc->flags) >> 5) & 0x7)); 1206 break; 1207 1208 case RT2560_TX_FAIL_RETRY: 1209 DPRINTFN(9, ("sending mgt frame failed (too much " 1210 "retries)\n")); 1211 break; 1212 1213 case RT2560_TX_FAIL_INVALID: 1214 case RT2560_TX_FAIL_OTHER: 1215 default: 1216 aprint_error_dev(sc->sc_dev, "sending mgt frame failed 0x%08x\n", 1217 le32toh(desc->flags)); 1218 } 1219 1220 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1221 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1222 bus_dmamap_unload(sc->sc_dmat, data->map); 1223 m_freem(data->m); 1224 data->m = NULL; 1225 ieee80211_free_node(data->ni); 1226 data->ni = NULL; 1227 1228 /* descriptor is no longer valid */ 1229 desc->flags &= ~htole32(RT2560_TX_VALID); 1230 1231 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1232 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1233 BUS_DMASYNC_PREWRITE); 1234 1235 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1236 1237 sc->prioq.queued--; 1238 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1239 } 1240 1241 sc->sc_tx_timer = 0; 1242 ifp->if_flags &= ~IFF_OACTIVE; 1243 rt2560_start(ifp); 1244 1245 splx(s); 1246 } 1247 1248 /* 1249 * Some frames were processed by the hardware cipher engine and are ready for 1250 * transmission to the IEEE802.11 layer. 1251 */ 1252 void 1253 rt2560_decryption_intr(struct rt2560_softc *sc) 1254 { 1255 struct ieee80211com *ic = &sc->sc_ic; 1256 struct ifnet *ifp = ic->ic_ifp; 1257 struct rt2560_rx_desc *desc; 1258 struct rt2560_rx_data *data; 1259 struct rt2560_node *rn; 1260 struct ieee80211_frame *wh; 1261 struct ieee80211_node *ni; 1262 struct mbuf *mnew, *m; 1263 int hw, error, s; 1264 1265 /* retrieve last decriptor index processed by cipher engine */ 1266 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1267 RT2560_RX_DESC_SIZE; 1268 1269 for (; sc->rxq.cur_decrypt != hw;) { 1270 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1271 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1272 1273 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1274 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1275 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1276 1277 if (le32toh(desc->flags) & 1278 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1279 break; 1280 1281 if (data->drop) { 1282 ifp->if_ierrors++; 1283 goto skip; 1284 } 1285 1286 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1287 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1288 ifp->if_ierrors++; 1289 goto skip; 1290 } 1291 1292 /* 1293 * Try to allocate a new mbuf for this ring element and load it 1294 * before processing the current mbuf. If the ring element 1295 * cannot be loaded, drop the received packet and reuse the old 1296 * mbuf. In the unlikely case that the old mbuf can't be 1297 * reloaded either, explicitly panic. 1298 */ 1299 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1300 if (mnew == NULL) { 1301 ifp->if_ierrors++; 1302 goto skip; 1303 } 1304 1305 MCLGET(mnew, M_DONTWAIT); 1306 if (!(mnew->m_flags & M_EXT)) { 1307 m_freem(mnew); 1308 ifp->if_ierrors++; 1309 goto skip; 1310 } 1311 1312 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1313 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1314 bus_dmamap_unload(sc->sc_dmat, data->map); 1315 1316 error = bus_dmamap_load(sc->sc_dmat, data->map, 1317 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1318 if (error != 0) { 1319 m_freem(mnew); 1320 1321 /* try to reload the old mbuf */ 1322 error = bus_dmamap_load(sc->sc_dmat, data->map, 1323 mtod(data->m, void *), MCLBYTES, NULL, 1324 BUS_DMA_NOWAIT); 1325 if (error != 0) { 1326 /* very unlikely that it will fail... */ 1327 panic("%s: could not load old rx mbuf", 1328 device_xname(sc->sc_dev)); 1329 } 1330 /* physical address may have changed */ 1331 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1332 ifp->if_ierrors++; 1333 goto skip; 1334 } 1335 1336 /* 1337 * New mbuf successfully loaded, update Rx ring and continue 1338 * processing. 1339 */ 1340 m = data->m; 1341 data->m = mnew; 1342 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1343 1344 /* finalize mbuf */ 1345 m_set_rcvif(m, ifp); 1346 m->m_pkthdr.len = m->m_len = 1347 (le32toh(desc->flags) >> 16) & 0xfff; 1348 1349 s = splnet(); 1350 1351 if (sc->sc_drvbpf != NULL) { 1352 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1353 uint32_t tsf_lo, tsf_hi; 1354 1355 /* get timestamp (low and high 32 bits) */ 1356 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1357 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1358 1359 tap->wr_tsf = 1360 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1361 tap->wr_flags = 0; 1362 tap->wr_rate = rt2560_rxrate(desc); 1363 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1364 tap->wr_chan_flags = 1365 htole16(ic->ic_ibss_chan->ic_flags); 1366 tap->wr_antenna = sc->rx_ant; 1367 tap->wr_antsignal = desc->rssi; 1368 1369 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 1370 } 1371 1372 wh = mtod(m, struct ieee80211_frame *); 1373 ni = ieee80211_find_rxnode(ic, 1374 (struct ieee80211_frame_min *)wh); 1375 1376 /* send the frame to the 802.11 layer */ 1377 ieee80211_input(ic, m, ni, desc->rssi, 0); 1378 1379 /* give rssi to the rate adatation algorithm */ 1380 rn = (struct rt2560_node *)ni; 1381 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1382 1383 /* node is no longer needed */ 1384 ieee80211_free_node(ni); 1385 1386 splx(s); 1387 1388 skip: desc->flags = htole32(RT2560_RX_BUSY); 1389 1390 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1391 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1392 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1393 1394 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1395 1396 sc->rxq.cur_decrypt = 1397 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1398 } 1399 1400 /* 1401 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1402 * without calling if_start(). 1403 */ 1404 s = splnet(); 1405 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1406 rt2560_start(ifp); 1407 splx(s); 1408 } 1409 1410 /* 1411 * Some frames were received. Pass them to the hardware cipher engine before 1412 * sending them to the 802.11 layer. 1413 */ 1414 void 1415 rt2560_rx_intr(struct rt2560_softc *sc) 1416 { 1417 struct rt2560_rx_desc *desc; 1418 struct rt2560_rx_data *data; 1419 1420 for (;;) { 1421 desc = &sc->rxq.desc[sc->rxq.cur]; 1422 data = &sc->rxq.data[sc->rxq.cur]; 1423 1424 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1425 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1426 BUS_DMASYNC_POSTREAD); 1427 1428 if (le32toh(desc->flags) & 1429 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1430 break; 1431 1432 data->drop = 0; 1433 1434 if (le32toh(desc->flags) & 1435 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1436 /* 1437 * This should not happen since we did not request 1438 * to receive those frames when we filled RXCSR0. 1439 */ 1440 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1441 le32toh(desc->flags))); 1442 data->drop = 1; 1443 } 1444 1445 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1446 DPRINTFN(5, ("bad length\n")); 1447 data->drop = 1; 1448 } 1449 1450 /* mark the frame for decryption */ 1451 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1452 1453 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1454 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1455 BUS_DMASYNC_PREWRITE); 1456 1457 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1458 1459 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1460 } 1461 1462 /* kick decrypt */ 1463 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1464 } 1465 1466 /* 1467 * This function is called periodically in IBSS mode when a new beacon must be 1468 * sent out. 1469 */ 1470 static void 1471 rt2560_beacon_expire(struct rt2560_softc *sc) 1472 { 1473 struct ieee80211com *ic = &sc->sc_ic; 1474 struct rt2560_tx_data *data; 1475 1476 if (ic->ic_opmode != IEEE80211_M_IBSS && 1477 ic->ic_opmode != IEEE80211_M_HOSTAP) 1478 return; 1479 1480 data = &sc->bcnq.data[sc->bcnq.next]; 1481 1482 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1483 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1484 bus_dmamap_unload(sc->sc_dmat, data->map); 1485 1486 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1487 1488 bpf_mtap3(ic->ic_rawbpf, data->m); 1489 rt2560_tx_bcn(sc, data->m, data->ni); 1490 1491 DPRINTFN(15, ("beacon expired\n")); 1492 1493 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1494 } 1495 1496 static void 1497 rt2560_wakeup_expire(struct rt2560_softc *sc) 1498 { 1499 DPRINTFN(15, ("wakeup expired\n")); 1500 } 1501 1502 int 1503 rt2560_intr(void *arg) 1504 { 1505 struct rt2560_softc *sc = arg; 1506 struct ifnet *ifp = &sc->sc_if; 1507 uint32_t r; 1508 1509 if (!device_is_active(sc->sc_dev)) 1510 return 0; 1511 1512 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1513 return 0; /* not for us */ 1514 1515 /* disable interrupts */ 1516 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1517 1518 /* don't re-enable interrupts if we're shutting down */ 1519 if (!(ifp->if_flags & IFF_RUNNING)) 1520 return 0; 1521 1522 softint_schedule(sc->sc_soft_ih); 1523 return 1; 1524 } 1525 1526 static void 1527 rt2560_softintr(void *arg) 1528 { 1529 struct rt2560_softc *sc = arg; 1530 struct ifnet *ifp = &sc->sc_if; 1531 uint32_t r; 1532 1533 if (!device_is_active(sc->sc_dev) || !(ifp->if_flags & IFF_RUNNING)) 1534 return; 1535 1536 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1537 goto out; 1538 1539 /* acknowledge interrupts */ 1540 RAL_WRITE(sc, RT2560_CSR7, r); 1541 1542 if (r & RT2560_BEACON_EXPIRE) 1543 rt2560_beacon_expire(sc); 1544 1545 if (r & RT2560_WAKEUP_EXPIRE) 1546 rt2560_wakeup_expire(sc); 1547 1548 if (r & RT2560_ENCRYPTION_DONE) 1549 rt2560_encryption_intr(sc); 1550 1551 if (r & RT2560_TX_DONE) 1552 rt2560_tx_intr(sc); 1553 1554 if (r & RT2560_PRIO_DONE) 1555 rt2560_prio_intr(sc); 1556 1557 if (r & RT2560_DECRYPTION_DONE) 1558 rt2560_decryption_intr(sc); 1559 1560 if (r & RT2560_RX_DONE) 1561 rt2560_rx_intr(sc); 1562 1563 out: 1564 /* re-enable interrupts */ 1565 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1566 } 1567 1568 /* quickly determine if a given rate is CCK or OFDM */ 1569 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1570 1571 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1572 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1573 1574 #define RAL_SIFS 10 /* us */ 1575 1576 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1577 1578 /* 1579 * This function is only used by the Rx radiotap code. It returns the rate at 1580 * which a given frame was received. 1581 */ 1582 static uint8_t 1583 rt2560_rxrate(struct rt2560_rx_desc *desc) 1584 { 1585 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1586 /* reverse function of rt2560_plcp_signal */ 1587 switch (desc->rate) { 1588 case 0xb: return 12; 1589 case 0xf: return 18; 1590 case 0xa: return 24; 1591 case 0xe: return 36; 1592 case 0x9: return 48; 1593 case 0xd: return 72; 1594 case 0x8: return 96; 1595 case 0xc: return 108; 1596 } 1597 } else { 1598 if (desc->rate == 10) 1599 return 2; 1600 if (desc->rate == 20) 1601 return 4; 1602 if (desc->rate == 55) 1603 return 11; 1604 if (desc->rate == 110) 1605 return 22; 1606 } 1607 return 2; /* should not get there */ 1608 } 1609 1610 /* 1611 * Return the expected ack rate for a frame transmitted at rate `rate'. 1612 * XXX: this should depend on the destination node basic rate set. 1613 */ 1614 static int 1615 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1616 { 1617 switch (rate) { 1618 /* CCK rates */ 1619 case 2: 1620 return 2; 1621 case 4: 1622 case 11: 1623 case 22: 1624 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1625 1626 /* OFDM rates */ 1627 case 12: 1628 case 18: 1629 return 12; 1630 case 24: 1631 case 36: 1632 return 24; 1633 case 48: 1634 case 72: 1635 case 96: 1636 case 108: 1637 return 48; 1638 } 1639 1640 /* default to 1Mbps */ 1641 return 2; 1642 } 1643 1644 /* 1645 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1646 * The function automatically determines the operating mode depending on the 1647 * given rate. `flags' indicates whether short preamble is in use or not. 1648 */ 1649 static uint16_t 1650 rt2560_txtime(int len, int rate, uint32_t flags) 1651 { 1652 uint16_t txtime; 1653 1654 if (RAL_RATE_IS_OFDM(rate)) { 1655 /* IEEE Std 802.11a-1999, pp. 37 */ 1656 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1657 txtime = 16 + 4 + 4 * txtime + 6; 1658 } else { 1659 /* IEEE Std 802.11b-1999, pp. 28 */ 1660 txtime = (16 * len + rate - 1) / rate; 1661 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1662 txtime += 72 + 24; 1663 else 1664 txtime += 144 + 48; 1665 } 1666 return txtime; 1667 } 1668 1669 static uint8_t 1670 rt2560_plcp_signal(int rate) 1671 { 1672 switch (rate) { 1673 /* CCK rates (returned values are device-dependent) */ 1674 case 2: return 0x0; 1675 case 4: return 0x1; 1676 case 11: return 0x2; 1677 case 22: return 0x3; 1678 1679 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1680 case 12: return 0xb; 1681 case 18: return 0xf; 1682 case 24: return 0xa; 1683 case 36: return 0xe; 1684 case 48: return 0x9; 1685 case 72: return 0xd; 1686 case 96: return 0x8; 1687 case 108: return 0xc; 1688 1689 /* unsupported rates (should not get there) */ 1690 default: return 0xff; 1691 } 1692 } 1693 1694 static void 1695 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1696 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1697 { 1698 struct ieee80211com *ic = &sc->sc_ic; 1699 uint16_t plcp_length; 1700 int remainder; 1701 1702 desc->flags = htole32(flags); 1703 desc->flags |= htole32(len << 16); 1704 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1705 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1706 1707 desc->physaddr = htole32(physaddr); 1708 desc->wme = htole16( 1709 RT2560_AIFSN(2) | 1710 RT2560_LOGCWMIN(3) | 1711 RT2560_LOGCWMAX(8)); 1712 1713 /* setup PLCP fields */ 1714 desc->plcp_signal = rt2560_plcp_signal(rate); 1715 desc->plcp_service = 4; 1716 1717 len += IEEE80211_CRC_LEN; 1718 if (RAL_RATE_IS_OFDM(rate)) { 1719 desc->flags |= htole32(RT2560_TX_OFDM); 1720 1721 plcp_length = len & 0xfff; 1722 desc->plcp_length_hi = plcp_length >> 6; 1723 desc->plcp_length_lo = plcp_length & 0x3f; 1724 } else { 1725 plcp_length = (16 * len + rate - 1) / rate; 1726 if (rate == 22) { 1727 remainder = (16 * len) % 22; 1728 if (remainder != 0 && remainder < 7) 1729 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1730 } 1731 desc->plcp_length_hi = plcp_length >> 8; 1732 desc->plcp_length_lo = plcp_length & 0xff; 1733 1734 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1735 desc->plcp_signal |= 0x08; 1736 } 1737 } 1738 1739 static int 1740 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1741 struct ieee80211_node *ni) 1742 { 1743 struct rt2560_tx_desc *desc; 1744 struct rt2560_tx_data *data; 1745 int rate, error; 1746 1747 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1748 data = &sc->bcnq.data[sc->bcnq.cur]; 1749 1750 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1751 1752 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1753 BUS_DMA_NOWAIT); 1754 if (error != 0) { 1755 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1756 error); 1757 m_freem(m0); 1758 return error; 1759 } 1760 1761 data->m = m0; 1762 data->ni = ni; 1763 1764 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1765 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1766 data->map->dm_segs->ds_addr); 1767 1768 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1769 BUS_DMASYNC_PREWRITE); 1770 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1771 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1772 BUS_DMASYNC_PREWRITE); 1773 1774 return 0; 1775 } 1776 1777 static int 1778 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1779 struct ieee80211_node *ni) 1780 { 1781 struct ieee80211com *ic = &sc->sc_ic; 1782 struct rt2560_tx_desc *desc; 1783 struct rt2560_tx_data *data; 1784 struct ieee80211_frame *wh; 1785 struct ieee80211_key *k; 1786 uint16_t dur; 1787 uint32_t flags = 0; 1788 int rate, error; 1789 1790 desc = &sc->prioq.desc[sc->prioq.cur]; 1791 data = &sc->prioq.data[sc->prioq.cur]; 1792 1793 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1794 1795 wh = mtod(m0, struct ieee80211_frame *); 1796 1797 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1798 k = ieee80211_crypto_encap(ic, ni, m0); 1799 if (k == NULL) { 1800 m_freem(m0); 1801 return ENOBUFS; 1802 } 1803 1804 /* packet header may have moved, reset our local pointer */ 1805 wh = mtod(m0, struct ieee80211_frame *); 1806 } 1807 1808 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1809 BUS_DMA_NOWAIT); 1810 if (error != 0) { 1811 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1812 error); 1813 m_freem(m0); 1814 return error; 1815 } 1816 1817 if (sc->sc_drvbpf != NULL) { 1818 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1819 1820 tap->wt_flags = 0; 1821 tap->wt_rate = rate; 1822 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1823 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1824 tap->wt_antenna = sc->tx_ant; 1825 1826 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1827 } 1828 1829 data->m = m0; 1830 data->ni = ni; 1831 1832 wh = mtod(m0, struct ieee80211_frame *); 1833 1834 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1835 flags |= RT2560_TX_ACK; 1836 1837 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1838 RAL_SIFS; 1839 *(uint16_t *)wh->i_dur = htole16(dur); 1840 1841 /* tell hardware to add timestamp for probe responses */ 1842 if ((wh->i_fc[0] & 1843 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1844 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1845 flags |= RT2560_TX_TIMESTAMP; 1846 } 1847 1848 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1849 data->map->dm_segs->ds_addr); 1850 1851 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1852 BUS_DMASYNC_PREWRITE); 1853 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1854 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1855 BUS_DMASYNC_PREWRITE); 1856 1857 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1858 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1859 1860 /* kick prio */ 1861 sc->prioq.queued++; 1862 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1863 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1864 1865 return 0; 1866 } 1867 1868 /* 1869 * Build a RTS control frame. 1870 */ 1871 static struct mbuf * 1872 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1873 uint16_t dur) 1874 { 1875 struct ieee80211_frame_rts *rts; 1876 struct mbuf *m; 1877 1878 MGETHDR(m, M_DONTWAIT, MT_DATA); 1879 if (m == NULL) { 1880 sc->sc_ic.ic_stats.is_tx_nobuf++; 1881 aprint_error_dev(sc->sc_dev, "could not allocate RTS frame\n"); 1882 return NULL; 1883 } 1884 1885 rts = mtod(m, struct ieee80211_frame_rts *); 1886 1887 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1888 IEEE80211_FC0_SUBTYPE_RTS; 1889 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1890 *(uint16_t *)rts->i_dur = htole16(dur); 1891 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1892 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1893 1894 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1895 1896 return m; 1897 } 1898 1899 static int 1900 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1901 struct ieee80211_node *ni) 1902 { 1903 struct ieee80211com *ic = &sc->sc_ic; 1904 struct rt2560_tx_desc *desc; 1905 struct rt2560_tx_data *data; 1906 struct rt2560_node *rn; 1907 struct ieee80211_rateset *rs; 1908 struct ieee80211_frame *wh; 1909 struct ieee80211_key *k; 1910 struct mbuf *mnew; 1911 uint16_t dur; 1912 uint32_t flags = 0; 1913 int rate, error; 1914 1915 wh = mtod(m0, struct ieee80211_frame *); 1916 1917 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1918 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1919 rate = rs->rs_rates[ic->ic_fixed_rate]; 1920 } else { 1921 rs = &ni->ni_rates; 1922 rn = (struct rt2560_node *)ni; 1923 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1924 wh, m0->m_pkthdr.len, -1, NULL, 0); 1925 rate = rs->rs_rates[ni->ni_txrate]; 1926 } 1927 rate &= IEEE80211_RATE_VAL; 1928 1929 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1930 k = ieee80211_crypto_encap(ic, ni, m0); 1931 if (k == NULL) { 1932 m_freem(m0); 1933 return ENOBUFS; 1934 } 1935 1936 /* packet header may have moved, reset our local pointer */ 1937 wh = mtod(m0, struct ieee80211_frame *); 1938 } 1939 1940 /* 1941 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1942 * for directed frames only when the length of the MPDU is greater 1943 * than the length threshold indicated by [...]" ic_rtsthreshold. 1944 */ 1945 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1946 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1947 struct mbuf *m; 1948 int rtsrate, ackrate; 1949 1950 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1951 ackrate = rt2560_ack_rate(ic, rate); 1952 1953 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1954 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1955 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1956 3 * RAL_SIFS; 1957 1958 m = rt2560_get_rts(sc, wh, dur); 1959 1960 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1961 data = &sc->txq.data[sc->txq.cur_encrypt]; 1962 1963 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1964 BUS_DMA_NOWAIT); 1965 if (error != 0) { 1966 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1967 error); 1968 m_freem(m); 1969 m_freem(m0); 1970 return error; 1971 } 1972 1973 /* avoid multiple free() of the same node for each fragment */ 1974 ieee80211_ref_node(ni); 1975 1976 data->m = m; 1977 data->ni = ni; 1978 1979 /* RTS frames are not taken into account for rssadapt */ 1980 data->id.id_node = NULL; 1981 1982 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1983 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1984 data->map->dm_segs->ds_addr); 1985 1986 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1987 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1988 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1989 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1990 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1991 1992 sc->txq.queued++; 1993 sc->txq.cur_encrypt = 1994 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1995 1996 /* 1997 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1998 * asynchronous data frame shall be transmitted after the CTS 1999 * frame and a SIFS period. 2000 */ 2001 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 2002 } 2003 2004 data = &sc->txq.data[sc->txq.cur_encrypt]; 2005 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 2006 2007 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2008 BUS_DMA_NOWAIT); 2009 if (error != 0 && error != EFBIG) { 2010 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 2011 error); 2012 m_freem(m0); 2013 return error; 2014 } 2015 if (error != 0) { 2016 /* too many fragments, linearize */ 2017 2018 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2019 if (mnew == NULL) { 2020 m_freem(m0); 2021 return ENOMEM; 2022 } 2023 2024 M_COPY_PKTHDR(mnew, m0); 2025 if (m0->m_pkthdr.len > MHLEN) { 2026 MCLGET(mnew, M_DONTWAIT); 2027 if (!(mnew->m_flags & M_EXT)) { 2028 m_freem(m0); 2029 m_freem(mnew); 2030 return ENOMEM; 2031 } 2032 } 2033 2034 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 2035 m_freem(m0); 2036 mnew->m_len = mnew->m_pkthdr.len; 2037 m0 = mnew; 2038 2039 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2040 BUS_DMA_NOWAIT); 2041 if (error != 0) { 2042 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 2043 error); 2044 m_freem(m0); 2045 return error; 2046 } 2047 2048 /* packet header have moved, reset our local pointer */ 2049 wh = mtod(m0, struct ieee80211_frame *); 2050 } 2051 2052 if (sc->sc_drvbpf != NULL) { 2053 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2054 2055 tap->wt_flags = 0; 2056 tap->wt_rate = rate; 2057 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2058 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2059 tap->wt_antenna = sc->tx_ant; 2060 2061 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2062 } 2063 2064 data->m = m0; 2065 data->ni = ni; 2066 2067 /* remember link conditions for rate adaptation algorithm */ 2068 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2069 data->id.id_len = m0->m_pkthdr.len; 2070 data->id.id_rateidx = ni->ni_txrate; 2071 data->id.id_node = ni; 2072 data->id.id_rssi = ni->ni_rssi; 2073 } else 2074 data->id.id_node = NULL; 2075 2076 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2077 flags |= RT2560_TX_ACK; 2078 2079 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2080 ic->ic_flags) + RAL_SIFS; 2081 *(uint16_t *)wh->i_dur = htole16(dur); 2082 } 2083 2084 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2085 data->map->dm_segs->ds_addr); 2086 2087 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2088 BUS_DMASYNC_PREWRITE); 2089 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2090 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2091 BUS_DMASYNC_PREWRITE); 2092 2093 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2094 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2095 2096 /* kick encrypt */ 2097 sc->txq.queued++; 2098 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2099 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2100 2101 return 0; 2102 } 2103 2104 static void 2105 rt2560_start(struct ifnet *ifp) 2106 { 2107 struct rt2560_softc *sc = ifp->if_softc; 2108 struct ieee80211com *ic = &sc->sc_ic; 2109 struct mbuf *m0; 2110 struct ieee80211_node *ni; 2111 struct ether_header *eh; 2112 2113 /* 2114 * net80211 may still try to send management frames even if the 2115 * IFF_RUNNING flag is not set... 2116 */ 2117 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2118 return; 2119 2120 for (;;) { 2121 IF_POLL(&ic->ic_mgtq, m0); 2122 if (m0 != NULL) { 2123 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2124 ifp->if_flags |= IFF_OACTIVE; 2125 break; 2126 } 2127 IF_DEQUEUE(&ic->ic_mgtq, m0); 2128 if (m0 == NULL) 2129 break; 2130 2131 ni = M_GETCTX(m0, struct ieee80211_node *); 2132 M_CLEARCTX(m0); 2133 bpf_mtap3(ic->ic_rawbpf, m0); 2134 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2135 break; 2136 2137 } else { 2138 if (ic->ic_state != IEEE80211_S_RUN) 2139 break; 2140 IFQ_DEQUEUE(&ifp->if_snd, m0); 2141 if (m0 == NULL) 2142 break; 2143 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2144 ifp->if_flags |= IFF_OACTIVE; 2145 break; 2146 } 2147 2148 if (m0->m_len < sizeof (struct ether_header) && 2149 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2150 continue; 2151 2152 eh = mtod(m0, struct ether_header *); 2153 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2154 if (ni == NULL) { 2155 m_freem(m0); 2156 continue; 2157 } 2158 bpf_mtap(ifp, m0); 2159 2160 m0 = ieee80211_encap(ic, m0, ni); 2161 if (m0 == NULL) { 2162 ieee80211_free_node(ni); 2163 continue; 2164 } 2165 2166 bpf_mtap3(ic->ic_rawbpf, m0); 2167 2168 if (rt2560_tx_data(sc, m0, ni) != 0) { 2169 ieee80211_free_node(ni); 2170 ifp->if_oerrors++; 2171 break; 2172 } 2173 } 2174 2175 sc->sc_tx_timer = 5; 2176 ifp->if_timer = 1; 2177 } 2178 } 2179 2180 static void 2181 rt2560_watchdog(struct ifnet *ifp) 2182 { 2183 struct rt2560_softc *sc = ifp->if_softc; 2184 2185 ifp->if_timer = 0; 2186 2187 if (sc->sc_tx_timer > 0) { 2188 if (--sc->sc_tx_timer == 0) { 2189 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2190 rt2560_init(ifp); 2191 ifp->if_oerrors++; 2192 return; 2193 } 2194 ifp->if_timer = 1; 2195 } 2196 2197 ieee80211_watchdog(&sc->sc_ic); 2198 } 2199 2200 /* 2201 * This function allows for fast channel switching in monitor mode (used by 2202 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2203 * generate a new beacon frame. 2204 */ 2205 static int 2206 rt2560_reset(struct ifnet *ifp) 2207 { 2208 struct rt2560_softc *sc = ifp->if_softc; 2209 struct ieee80211com *ic = &sc->sc_ic; 2210 2211 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2212 return ENETRESET; 2213 2214 rt2560_set_chan(sc, ic->ic_curchan); 2215 2216 return 0; 2217 } 2218 2219 int 2220 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2221 { 2222 struct rt2560_softc *sc = ifp->if_softc; 2223 struct ieee80211com *ic = &sc->sc_ic; 2224 int s, error = 0; 2225 2226 s = splnet(); 2227 2228 switch (cmd) { 2229 case SIOCSIFFLAGS: 2230 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2231 break; 2232 if (ifp->if_flags & IFF_UP) { 2233 if (ifp->if_flags & IFF_RUNNING) 2234 rt2560_update_promisc(sc); 2235 else 2236 rt2560_init(ifp); 2237 } else { 2238 if (ifp->if_flags & IFF_RUNNING) 2239 rt2560_stop(ifp, 1); 2240 } 2241 break; 2242 2243 case SIOCADDMULTI: 2244 case SIOCDELMULTI: 2245 /* XXX no h/w multicast filter? --dyoung */ 2246 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2247 error = 0; 2248 break; 2249 2250 case SIOCS80211CHANNEL: 2251 /* 2252 * This allows for fast channel switching in monitor mode 2253 * (used by kismet). In IBSS mode, we must explicitly reset 2254 * the interface to generate a new beacon frame. 2255 */ 2256 error = ieee80211_ioctl(ic, cmd, data); 2257 if (error == ENETRESET && 2258 ic->ic_opmode == IEEE80211_M_MONITOR) { 2259 rt2560_set_chan(sc, ic->ic_ibss_chan); 2260 error = 0; 2261 } 2262 break; 2263 2264 default: 2265 error = ieee80211_ioctl(ic, cmd, data); 2266 } 2267 2268 if (error == ENETRESET) { 2269 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2270 (IFF_UP | IFF_RUNNING)) 2271 rt2560_init(ifp); 2272 error = 0; 2273 } 2274 2275 splx(s); 2276 2277 return error; 2278 } 2279 2280 static void 2281 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2282 { 2283 uint32_t tmp; 2284 int ntries; 2285 2286 for (ntries = 0; ntries < 100; ntries++) { 2287 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2288 break; 2289 DELAY(1); 2290 } 2291 if (ntries == 100) { 2292 aprint_error_dev(sc->sc_dev, "could not write to BBP\n"); 2293 return; 2294 } 2295 2296 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2297 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2298 2299 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2300 } 2301 2302 static uint8_t 2303 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2304 { 2305 uint32_t val; 2306 int ntries; 2307 2308 val = RT2560_BBP_BUSY | reg << 8; 2309 RAL_WRITE(sc, RT2560_BBPCSR, val); 2310 2311 for (ntries = 0; ntries < 100; ntries++) { 2312 val = RAL_READ(sc, RT2560_BBPCSR); 2313 if (!(val & RT2560_BBP_BUSY)) 2314 return val & 0xff; 2315 DELAY(1); 2316 } 2317 2318 aprint_error_dev(sc->sc_dev, "could not read from BBP\n"); 2319 return 0; 2320 } 2321 2322 static void 2323 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2324 { 2325 uint32_t tmp; 2326 int ntries; 2327 2328 for (ntries = 0; ntries < 100; ntries++) { 2329 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2330 break; 2331 DELAY(1); 2332 } 2333 if (ntries == 100) { 2334 aprint_error_dev(sc->sc_dev, "could not write to RF\n"); 2335 return; 2336 } 2337 2338 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2339 (reg & 0x3); 2340 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2341 2342 /* remember last written value in sc */ 2343 sc->rf_regs[reg] = val; 2344 2345 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2346 } 2347 2348 static void 2349 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2350 { 2351 struct ieee80211com *ic = &sc->sc_ic; 2352 uint8_t power, tmp; 2353 u_int i, chan; 2354 2355 chan = ieee80211_chan2ieee(ic, c); 2356 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2357 return; 2358 2359 if (IEEE80211_IS_CHAN_2GHZ(c)) 2360 power = min(sc->txpow[chan - 1], 31); 2361 else 2362 power = 31; 2363 2364 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2365 2366 switch (sc->rf_rev) { 2367 case RT2560_RF_2522: 2368 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2369 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2370 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2371 break; 2372 2373 case RT2560_RF_2523: 2374 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2375 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2376 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2377 rt2560_rf_write(sc, RT2560_RF4, 2378 (chan == 14) ? 0x00280 : 0x00286); 2379 break; 2380 2381 case RT2560_RF_2524: 2382 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2383 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2384 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2385 rt2560_rf_write(sc, RT2560_RF4, 2386 (chan == 14) ? 0x00280 : 0x00286); 2387 break; 2388 2389 case RT2560_RF_2525: 2390 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2391 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2392 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2393 rt2560_rf_write(sc, RT2560_RF4, 2394 (chan == 14) ? 0x00280 : 0x00286); 2395 2396 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2397 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2398 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2399 rt2560_rf_write(sc, RT2560_RF4, 2400 (chan == 14) ? 0x00280 : 0x00286); 2401 break; 2402 2403 case RT2560_RF_2525E: 2404 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2405 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2406 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2407 rt2560_rf_write(sc, RT2560_RF4, 2408 (chan == 14) ? 0x00286 : 0x00282); 2409 break; 2410 2411 case RT2560_RF_2526: 2412 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2413 rt2560_rf_write(sc, RT2560_RF4, 2414 (chan & 1) ? 0x00386 : 0x00381); 2415 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2416 2417 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2418 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2419 rt2560_rf_write(sc, RT2560_RF4, 2420 (chan & 1) ? 0x00386 : 0x00381); 2421 break; 2422 2423 /* dual-band RF */ 2424 case RT2560_RF_5222: 2425 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2426 2427 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2428 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2429 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2430 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2431 break; 2432 } 2433 2434 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2435 ic->ic_state != IEEE80211_S_SCAN) { 2436 /* set Japan filter bit for channel 14 */ 2437 tmp = rt2560_bbp_read(sc, 70); 2438 2439 tmp &= ~RT2560_JAPAN_FILTER; 2440 if (chan == 14) 2441 tmp |= RT2560_JAPAN_FILTER; 2442 2443 rt2560_bbp_write(sc, 70, tmp); 2444 2445 DELAY(1000); /* RF needs a 1ms delay here */ 2446 rt2560_disable_rf_tune(sc); 2447 2448 /* clear CRC errors */ 2449 RAL_READ(sc, RT2560_CNT0); 2450 } 2451 } 2452 2453 /* 2454 * Disable RF auto-tuning. 2455 */ 2456 static void 2457 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2458 { 2459 uint32_t tmp; 2460 2461 if (sc->rf_rev != RT2560_RF_2523) { 2462 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2463 rt2560_rf_write(sc, RT2560_RF1, tmp); 2464 } 2465 2466 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2467 rt2560_rf_write(sc, RT2560_RF3, tmp); 2468 2469 DPRINTFN(2, ("disabling RF autotune\n")); 2470 } 2471 2472 /* 2473 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2474 * synchronization. 2475 */ 2476 static void 2477 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2478 { 2479 struct ieee80211com *ic = &sc->sc_ic; 2480 uint16_t logcwmin, preload; 2481 uint32_t tmp; 2482 2483 /* first, disable TSF synchronization */ 2484 RAL_WRITE(sc, RT2560_CSR14, 0); 2485 2486 tmp = 16 * ic->ic_bss->ni_intval; 2487 RAL_WRITE(sc, RT2560_CSR12, tmp); 2488 2489 RAL_WRITE(sc, RT2560_CSR13, 0); 2490 2491 logcwmin = 5; 2492 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2493 tmp = logcwmin << 16 | preload; 2494 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2495 2496 /* finally, enable TSF synchronization */ 2497 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2498 if (ic->ic_opmode == IEEE80211_M_STA) 2499 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2500 else 2501 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2502 RT2560_ENABLE_BEACON_GENERATOR; 2503 RAL_WRITE(sc, RT2560_CSR14, tmp); 2504 2505 DPRINTF(("enabling TSF synchronization\n")); 2506 } 2507 2508 static void 2509 rt2560_update_plcp(struct rt2560_softc *sc) 2510 { 2511 struct ieee80211com *ic = &sc->sc_ic; 2512 2513 /* no short preamble for 1Mbps */ 2514 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2515 2516 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2517 /* values taken from the reference driver */ 2518 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2519 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2520 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2521 } else { 2522 /* same values as above or'ed 0x8 */ 2523 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2524 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2525 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2526 } 2527 2528 DPRINTF(("updating PLCP for %s preamble\n", 2529 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2530 } 2531 2532 /* 2533 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2534 * know how these values are computed. 2535 */ 2536 static void 2537 rt2560_update_slot(struct ifnet *ifp) 2538 { 2539 struct rt2560_softc *sc = ifp->if_softc; 2540 struct ieee80211com *ic = &sc->sc_ic; 2541 uint8_t slottime; 2542 uint16_t sifs, pifs, difs, eifs; 2543 uint32_t tmp; 2544 2545 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2546 2547 /* define the MAC slot boundaries */ 2548 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2549 pifs = sifs + slottime; 2550 difs = sifs + 2 * slottime; 2551 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2552 2553 tmp = RAL_READ(sc, RT2560_CSR11); 2554 tmp = (tmp & ~0x1f00) | slottime << 8; 2555 RAL_WRITE(sc, RT2560_CSR11, tmp); 2556 2557 tmp = pifs << 16 | sifs; 2558 RAL_WRITE(sc, RT2560_CSR18, tmp); 2559 2560 tmp = eifs << 16 | difs; 2561 RAL_WRITE(sc, RT2560_CSR19, tmp); 2562 2563 DPRINTF(("setting slottime to %uus\n", slottime)); 2564 } 2565 2566 static void 2567 rt2560_set_basicrates(struct rt2560_softc *sc) 2568 { 2569 struct ieee80211com *ic = &sc->sc_ic; 2570 2571 /* update basic rate set */ 2572 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2573 /* 11b basic rates: 1, 2Mbps */ 2574 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2575 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2576 /* 11a basic rates: 6, 12, 24Mbps */ 2577 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2578 } else { 2579 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2580 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2581 } 2582 } 2583 2584 static void 2585 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2586 { 2587 uint32_t tmp; 2588 2589 /* set ON period to 70ms and OFF period to 30ms */ 2590 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2591 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2592 } 2593 2594 static void 2595 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2596 { 2597 uint32_t tmp; 2598 2599 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2600 RAL_WRITE(sc, RT2560_CSR5, tmp); 2601 2602 tmp = bssid[4] | bssid[5] << 8; 2603 RAL_WRITE(sc, RT2560_CSR6, tmp); 2604 2605 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2606 } 2607 2608 static void 2609 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2610 { 2611 uint32_t tmp; 2612 2613 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2614 RAL_WRITE(sc, RT2560_CSR3, tmp); 2615 2616 tmp = addr[4] | addr[5] << 8; 2617 RAL_WRITE(sc, RT2560_CSR4, tmp); 2618 2619 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2620 } 2621 2622 static void 2623 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2624 { 2625 uint32_t tmp; 2626 2627 tmp = RAL_READ(sc, RT2560_CSR3); 2628 addr[0] = tmp & 0xff; 2629 addr[1] = (tmp >> 8) & 0xff; 2630 addr[2] = (tmp >> 16) & 0xff; 2631 addr[3] = (tmp >> 24); 2632 2633 tmp = RAL_READ(sc, RT2560_CSR4); 2634 addr[4] = tmp & 0xff; 2635 addr[5] = (tmp >> 8) & 0xff; 2636 } 2637 2638 static void 2639 rt2560_update_promisc(struct rt2560_softc *sc) 2640 { 2641 struct ifnet *ifp = &sc->sc_if; 2642 uint32_t tmp; 2643 2644 tmp = RAL_READ(sc, RT2560_RXCSR0); 2645 2646 tmp &= ~RT2560_DROP_NOT_TO_ME; 2647 if (!(ifp->if_flags & IFF_PROMISC)) 2648 tmp |= RT2560_DROP_NOT_TO_ME; 2649 2650 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2651 2652 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2653 "entering" : "leaving")); 2654 } 2655 2656 static void 2657 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2658 { 2659 uint32_t tmp; 2660 uint8_t tx; 2661 2662 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2663 if (antenna == 1) 2664 tx |= RT2560_BBP_ANTA; 2665 else if (antenna == 2) 2666 tx |= RT2560_BBP_ANTB; 2667 else 2668 tx |= RT2560_BBP_DIVERSITY; 2669 2670 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2671 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2672 sc->rf_rev == RT2560_RF_5222) 2673 tx |= RT2560_BBP_FLIPIQ; 2674 2675 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2676 2677 /* update values for CCK and OFDM in BBPCSR1 */ 2678 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2679 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2680 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2681 } 2682 2683 static void 2684 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2685 { 2686 uint8_t rx; 2687 2688 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2689 if (antenna == 1) 2690 rx |= RT2560_BBP_ANTA; 2691 else if (antenna == 2) 2692 rx |= RT2560_BBP_ANTB; 2693 else 2694 rx |= RT2560_BBP_DIVERSITY; 2695 2696 /* need to force no I/Q flip for RF 2525e and 2526 */ 2697 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2698 rx &= ~RT2560_BBP_FLIPIQ; 2699 2700 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2701 } 2702 2703 static const char * 2704 rt2560_get_rf(int rev) 2705 { 2706 switch (rev) { 2707 case RT2560_RF_2522: return "RT2522"; 2708 case RT2560_RF_2523: return "RT2523"; 2709 case RT2560_RF_2524: return "RT2524"; 2710 case RT2560_RF_2525: return "RT2525"; 2711 case RT2560_RF_2525E: return "RT2525e"; 2712 case RT2560_RF_2526: return "RT2526"; 2713 case RT2560_RF_5222: return "RT5222"; 2714 default: return "unknown"; 2715 } 2716 } 2717 2718 static void 2719 rt2560_read_eeprom(struct rt2560_softc *sc) 2720 { 2721 uint16_t val; 2722 int i; 2723 2724 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2725 sc->rf_rev = (val >> 11) & 0x1f; 2726 sc->hw_radio = (val >> 10) & 0x1; 2727 sc->led_mode = (val >> 6) & 0x7; 2728 sc->rx_ant = (val >> 4) & 0x3; 2729 sc->tx_ant = (val >> 2) & 0x3; 2730 sc->nb_ant = val & 0x3; 2731 2732 /* read default values for BBP registers */ 2733 for (i = 0; i < 16; i++) { 2734 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2735 sc->bbp_prom[i].reg = val >> 8; 2736 sc->bbp_prom[i].val = val & 0xff; 2737 } 2738 2739 /* read Tx power for all b/g channels */ 2740 for (i = 0; i < 14 / 2; i++) { 2741 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2742 sc->txpow[i * 2] = val >> 8; 2743 sc->txpow[i * 2 + 1] = val & 0xff; 2744 } 2745 } 2746 2747 static int 2748 rt2560_bbp_init(struct rt2560_softc *sc) 2749 { 2750 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2751 int i, ntries; 2752 2753 /* wait for BBP to be ready */ 2754 for (ntries = 0; ntries < 100; ntries++) { 2755 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2756 break; 2757 DELAY(1); 2758 } 2759 if (ntries == 100) { 2760 aprint_error_dev(sc->sc_dev, "timeout waiting for BBP\n"); 2761 return EIO; 2762 } 2763 2764 /* initialize BBP registers to default values */ 2765 for (i = 0; i < N(rt2560_def_bbp); i++) { 2766 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2767 rt2560_def_bbp[i].val); 2768 } 2769 #if 0 2770 /* initialize BBP registers to values stored in EEPROM */ 2771 for (i = 0; i < 16; i++) { 2772 if (sc->bbp_prom[i].reg == 0xff) 2773 continue; 2774 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2775 } 2776 #endif 2777 2778 return 0; 2779 #undef N 2780 } 2781 2782 static int 2783 rt2560_init(struct ifnet *ifp) 2784 { 2785 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2786 struct rt2560_softc *sc = ifp->if_softc; 2787 struct ieee80211com *ic = &sc->sc_ic; 2788 uint32_t tmp; 2789 int i; 2790 2791 /* for CardBus, power on the socket */ 2792 if (!(sc->sc_flags & RT2560_ENABLED)) { 2793 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2794 aprint_error_dev(sc->sc_dev, "could not enable device\n"); 2795 return EIO; 2796 } 2797 sc->sc_flags |= RT2560_ENABLED; 2798 } 2799 2800 rt2560_stop(ifp, 1); 2801 2802 /* setup tx rings */ 2803 tmp = RT2560_PRIO_RING_COUNT << 24 | 2804 RT2560_ATIM_RING_COUNT << 16 | 2805 RT2560_TX_RING_COUNT << 8 | 2806 RT2560_TX_DESC_SIZE; 2807 2808 /* rings _must_ be initialized in this _exact_ order! */ 2809 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2810 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2811 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2812 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2813 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2814 2815 /* setup rx ring */ 2816 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2817 2818 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2819 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2820 2821 /* initialize MAC registers to default values */ 2822 for (i = 0; i < N(rt2560_def_mac); i++) 2823 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2824 2825 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2826 rt2560_set_macaddr(sc, ic->ic_myaddr); 2827 2828 /* set basic rate set (will be updated later) */ 2829 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2830 2831 rt2560_update_slot(ifp); 2832 rt2560_update_plcp(sc); 2833 rt2560_update_led(sc, 0, 0); 2834 2835 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2836 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2837 2838 if (rt2560_bbp_init(sc) != 0) { 2839 rt2560_stop(ifp, 1); 2840 return EIO; 2841 } 2842 2843 rt2560_set_txantenna(sc, 1); 2844 rt2560_set_rxantenna(sc, 1); 2845 2846 /* set default BSS channel */ 2847 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2848 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2849 2850 /* kick Rx */ 2851 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2852 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2853 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2854 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2855 tmp |= RT2560_DROP_TODS; 2856 if (!(ifp->if_flags & IFF_PROMISC)) 2857 tmp |= RT2560_DROP_NOT_TO_ME; 2858 } 2859 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2860 2861 /* clear old FCS and Rx FIFO errors */ 2862 RAL_READ(sc, RT2560_CNT0); 2863 RAL_READ(sc, RT2560_CNT4); 2864 2865 /* clear any pending interrupts */ 2866 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2867 2868 /* enable interrupts */ 2869 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2870 2871 ifp->if_flags &= ~IFF_OACTIVE; 2872 ifp->if_flags |= IFF_RUNNING; 2873 2874 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2875 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2876 else 2877 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2878 2879 return 0; 2880 #undef N 2881 } 2882 2883 static void 2884 rt2560_stop(struct ifnet *ifp, int disable) 2885 { 2886 struct rt2560_softc *sc = ifp->if_softc; 2887 struct ieee80211com *ic = &sc->sc_ic; 2888 2889 sc->sc_tx_timer = 0; 2890 ifp->if_timer = 0; 2891 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2892 2893 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2894 2895 /* abort Tx */ 2896 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2897 2898 /* disable Rx */ 2899 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2900 2901 /* reset ASIC (and thus, BBP) */ 2902 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2903 RAL_WRITE(sc, RT2560_CSR1, 0); 2904 2905 /* disable interrupts */ 2906 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2907 2908 /* clear any pending interrupt */ 2909 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2910 2911 /* reset Tx and Rx rings */ 2912 rt2560_reset_tx_ring(sc, &sc->txq); 2913 rt2560_reset_tx_ring(sc, &sc->atimq); 2914 rt2560_reset_tx_ring(sc, &sc->prioq); 2915 rt2560_reset_tx_ring(sc, &sc->bcnq); 2916 rt2560_reset_rx_ring(sc, &sc->rxq); 2917 } 2918
Indexes created Fri Oct 17 17:09:57 GMT 2025