rt2560.c revision 1.32
1 /* $NetBSD: rt2560.c,v 1.32 2018/02/08 09:05:19 dholland Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.32 2018/02/08 09:05:19 dholland Exp $"); 28 29 30 #include <sys/param.h> 31 #include <sys/sockio.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/callout.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 #include <net/if_ether.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/ip.h> 57 58 #include <net80211/ieee80211_var.h> 59 #include <net80211/ieee80211_rssadapt.h> 60 #include <net80211/ieee80211_radiotap.h> 61 62 #include <dev/ic/rt2560reg.h> 63 #include <dev/ic/rt2560var.h> 64 65 #ifdef RAL_DEBUG 66 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 67 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 68 int rt2560_debug = 0; 69 #else 70 #define DPRINTF(x) 71 #define DPRINTFN(n, x) 72 #endif 73 74 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 75 struct rt2560_tx_ring *, int); 76 static void rt2560_reset_tx_ring(struct rt2560_softc *, 77 struct rt2560_tx_ring *); 78 static void rt2560_free_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *); 80 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 81 struct rt2560_rx_ring *, int); 82 static void rt2560_reset_rx_ring(struct rt2560_softc *, 83 struct rt2560_rx_ring *); 84 static void rt2560_free_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *); 86 static struct ieee80211_node * 87 rt2560_node_alloc(struct ieee80211_node_table *); 88 static int rt2560_media_change(struct ifnet *); 89 static void rt2560_next_scan(void *); 90 static void rt2560_iter_func(void *, struct ieee80211_node *); 91 static void rt2560_update_rssadapt(void *); 92 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 93 int); 94 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 95 static void rt2560_encryption_intr(struct rt2560_softc *); 96 static void rt2560_tx_intr(struct rt2560_softc *); 97 static void rt2560_prio_intr(struct rt2560_softc *); 98 static void rt2560_decryption_intr(struct rt2560_softc *); 99 static void rt2560_rx_intr(struct rt2560_softc *); 100 static void rt2560_beacon_expire(struct rt2560_softc *); 101 static void rt2560_wakeup_expire(struct rt2560_softc *); 102 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 103 static int rt2560_ack_rate(struct ieee80211com *, int); 104 static uint16_t rt2560_txtime(int, int, uint32_t); 105 static uint8_t rt2560_plcp_signal(int); 106 static void rt2560_setup_tx_desc(struct rt2560_softc *, 107 struct rt2560_tx_desc *, uint32_t, int, int, int, 108 bus_addr_t); 109 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 110 struct ieee80211_node *); 111 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 112 struct ieee80211_node *); 113 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 114 struct ieee80211_frame *, uint16_t); 115 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 116 struct ieee80211_node *); 117 static void rt2560_start(struct ifnet *); 118 static void rt2560_watchdog(struct ifnet *); 119 static int rt2560_reset(struct ifnet *); 120 static int rt2560_ioctl(struct ifnet *, u_long, void *); 121 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 122 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 123 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 124 static void rt2560_set_chan(struct rt2560_softc *, 125 struct ieee80211_channel *); 126 static void rt2560_disable_rf_tune(struct rt2560_softc *); 127 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 128 static void rt2560_update_plcp(struct rt2560_softc *); 129 static void rt2560_update_slot(struct ifnet *); 130 static void rt2560_set_basicrates(struct rt2560_softc *); 131 static void rt2560_update_led(struct rt2560_softc *, int, int); 132 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 133 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 134 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 135 static void rt2560_update_promisc(struct rt2560_softc *); 136 static void rt2560_set_txantenna(struct rt2560_softc *, int); 137 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 138 static const char *rt2560_get_rf(int); 139 static void rt2560_read_eeprom(struct rt2560_softc *); 140 static int rt2560_bbp_init(struct rt2560_softc *); 141 static int rt2560_init(struct ifnet *); 142 static void rt2560_stop(struct ifnet *, int); 143 static void rt2560_softintr(void *); 144 145 /* 146 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 147 */ 148 static const struct ieee80211_rateset rt2560_rateset_11a = 149 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 150 151 static const struct ieee80211_rateset rt2560_rateset_11b = 152 { 4, { 2, 4, 11, 22 } }; 153 154 static const struct ieee80211_rateset rt2560_rateset_11g = 155 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 156 157 /* 158 * Default values for MAC registers; values taken from the reference driver. 159 */ 160 static const struct { 161 uint32_t reg; 162 uint32_t val; 163 } rt2560_def_mac[] = { 164 { RT2560_PSCSR0, 0x00020002 }, 165 { RT2560_PSCSR1, 0x00000002 }, 166 { RT2560_PSCSR2, 0x00020002 }, 167 { RT2560_PSCSR3, 0x00000002 }, 168 { RT2560_TIMECSR, 0x00003f21 }, 169 { RT2560_CSR9, 0x00000780 }, 170 { RT2560_CSR11, 0x07041483 }, 171 { RT2560_CNT3, 0x00000000 }, 172 { RT2560_TXCSR1, 0x07614562 }, 173 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 174 { RT2560_ACKPCTCSR, 0x7038140a }, 175 { RT2560_ARTCSR1, 0x1d21252d }, 176 { RT2560_ARTCSR2, 0x1919191d }, 177 { RT2560_RXCSR0, 0xffffffff }, 178 { RT2560_RXCSR3, 0xb3aab3af }, 179 { RT2560_PCICSR, 0x000003b8 }, 180 { RT2560_PWRCSR0, 0x3f3b3100 }, 181 { RT2560_GPIOCSR, 0x0000ff00 }, 182 { RT2560_TESTCSR, 0x000000f0 }, 183 { RT2560_PWRCSR1, 0x000001ff }, 184 { RT2560_MACCSR0, 0x00213223 }, 185 { RT2560_MACCSR1, 0x00235518 }, 186 { RT2560_RLPWCSR, 0x00000040 }, 187 { RT2560_RALINKCSR, 0x9a009a11 }, 188 { RT2560_CSR7, 0xffffffff }, 189 { RT2560_BBPCSR1, 0x82188200 }, 190 { RT2560_TXACKCSR0, 0x00000020 }, 191 { RT2560_SECCSR3, 0x0000e78f } 192 }; 193 194 /* 195 * Default values for BBP registers; values taken from the reference driver. 196 */ 197 static const struct { 198 uint8_t reg; 199 uint8_t val; 200 } rt2560_def_bbp[] = { 201 { 3, 0x02 }, 202 { 4, 0x19 }, 203 { 14, 0x1c }, 204 { 15, 0x30 }, 205 { 16, 0xac }, 206 { 17, 0x48 }, 207 { 18, 0x18 }, 208 { 19, 0xff }, 209 { 20, 0x1e }, 210 { 21, 0x08 }, 211 { 22, 0x08 }, 212 { 23, 0x08 }, 213 { 24, 0x80 }, 214 { 25, 0x50 }, 215 { 26, 0x08 }, 216 { 27, 0x23 }, 217 { 30, 0x10 }, 218 { 31, 0x2b }, 219 { 32, 0xb9 }, 220 { 34, 0x12 }, 221 { 35, 0x50 }, 222 { 39, 0xc4 }, 223 { 40, 0x02 }, 224 { 41, 0x60 }, 225 { 53, 0x10 }, 226 { 54, 0x18 }, 227 { 56, 0x08 }, 228 { 57, 0x10 }, 229 { 58, 0x08 }, 230 { 61, 0x60 }, 231 { 62, 0x10 }, 232 { 75, 0xff } 233 }; 234 235 /* 236 * Default values for RF register R2 indexed by channel numbers; values taken 237 * from the reference driver. 238 */ 239 static const uint32_t rt2560_rf2522_r2[] = { 240 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 241 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 242 }; 243 244 static const uint32_t rt2560_rf2523_r2[] = { 245 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 246 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 247 }; 248 249 static const uint32_t rt2560_rf2524_r2[] = { 250 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 251 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 252 }; 253 254 static const uint32_t rt2560_rf2525_r2[] = { 255 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 256 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 257 }; 258 259 static const uint32_t rt2560_rf2525_hi_r2[] = { 260 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 261 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 262 }; 263 264 static const uint32_t rt2560_rf2525e_r2[] = { 265 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 266 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 267 }; 268 269 static const uint32_t rt2560_rf2526_hi_r2[] = { 270 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 271 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 272 }; 273 274 static const uint32_t rt2560_rf2526_r2[] = { 275 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 276 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 277 }; 278 279 /* 280 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 281 * values taken from the reference driver. 282 */ 283 static const struct { 284 uint8_t chan; 285 uint32_t r1; 286 uint32_t r2; 287 uint32_t r4; 288 } rt2560_rf5222[] = { 289 { 1, 0x08808, 0x0044d, 0x00282 }, 290 { 2, 0x08808, 0x0044e, 0x00282 }, 291 { 3, 0x08808, 0x0044f, 0x00282 }, 292 { 4, 0x08808, 0x00460, 0x00282 }, 293 { 5, 0x08808, 0x00461, 0x00282 }, 294 { 6, 0x08808, 0x00462, 0x00282 }, 295 { 7, 0x08808, 0x00463, 0x00282 }, 296 { 8, 0x08808, 0x00464, 0x00282 }, 297 { 9, 0x08808, 0x00465, 0x00282 }, 298 { 10, 0x08808, 0x00466, 0x00282 }, 299 { 11, 0x08808, 0x00467, 0x00282 }, 300 { 12, 0x08808, 0x00468, 0x00282 }, 301 { 13, 0x08808, 0x00469, 0x00282 }, 302 { 14, 0x08808, 0x0046b, 0x00286 }, 303 304 { 36, 0x08804, 0x06225, 0x00287 }, 305 { 40, 0x08804, 0x06226, 0x00287 }, 306 { 44, 0x08804, 0x06227, 0x00287 }, 307 { 48, 0x08804, 0x06228, 0x00287 }, 308 { 52, 0x08804, 0x06229, 0x00287 }, 309 { 56, 0x08804, 0x0622a, 0x00287 }, 310 { 60, 0x08804, 0x0622b, 0x00287 }, 311 { 64, 0x08804, 0x0622c, 0x00287 }, 312 313 { 100, 0x08804, 0x02200, 0x00283 }, 314 { 104, 0x08804, 0x02201, 0x00283 }, 315 { 108, 0x08804, 0x02202, 0x00283 }, 316 { 112, 0x08804, 0x02203, 0x00283 }, 317 { 116, 0x08804, 0x02204, 0x00283 }, 318 { 120, 0x08804, 0x02205, 0x00283 }, 319 { 124, 0x08804, 0x02206, 0x00283 }, 320 { 128, 0x08804, 0x02207, 0x00283 }, 321 { 132, 0x08804, 0x02208, 0x00283 }, 322 { 136, 0x08804, 0x02209, 0x00283 }, 323 { 140, 0x08804, 0x0220a, 0x00283 }, 324 325 { 149, 0x08808, 0x02429, 0x00281 }, 326 { 153, 0x08808, 0x0242b, 0x00281 }, 327 { 157, 0x08808, 0x0242d, 0x00281 }, 328 { 161, 0x08808, 0x0242f, 0x00281 } 329 }; 330 331 int 332 rt2560_attach(void *xsc, int id) 333 { 334 struct rt2560_softc *sc = xsc; 335 struct ieee80211com *ic = &sc->sc_ic; 336 struct ifnet *ifp = &sc->sc_if; 337 int error, i; 338 339 callout_init(&sc->scan_ch, 0); 340 callout_init(&sc->rssadapt_ch, 0); 341 342 /* retrieve RT2560 rev. no */ 343 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 344 345 /* retrieve MAC address */ 346 rt2560_get_macaddr(sc, ic->ic_myaddr); 347 348 aprint_normal_dev(sc->sc_dev, "802.11 address %s\n", 349 ether_sprintf(ic->ic_myaddr)); 350 351 /* retrieve RF rev. no and various other things from EEPROM */ 352 rt2560_read_eeprom(sc); 353 354 aprint_normal_dev(sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 355 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 356 357 sc->sc_soft_ih = softint_establish(SOFTINT_NET, rt2560_softintr, sc); 358 if (sc->sc_soft_ih == NULL) { 359 aprint_error_dev(sc->sc_dev, "could not establish softint\n)"); 360 goto fail0; 361 } 362 363 /* 364 * Allocate Tx and Rx rings. 365 */ 366 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 367 if (error != 0) { 368 aprint_error_dev(sc->sc_dev, "could not allocate Tx ring\n)"); 369 goto fail1; 370 } 371 372 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 373 if (error != 0) { 374 aprint_error_dev(sc->sc_dev, "could not allocate ATIM ring\n"); 375 goto fail2; 376 } 377 378 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 379 if (error != 0) { 380 aprint_error_dev(sc->sc_dev, "could not allocate Prio ring\n"); 381 goto fail3; 382 } 383 384 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 385 if (error != 0) { 386 aprint_error_dev(sc->sc_dev, "could not allocate Beacon ring\n"); 387 goto fail4; 388 } 389 390 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 391 if (error != 0) { 392 aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n"); 393 goto fail5; 394 } 395 396 ifp->if_softc = sc; 397 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 398 ifp->if_init = rt2560_init; 399 ifp->if_stop = rt2560_stop; 400 ifp->if_ioctl = rt2560_ioctl; 401 ifp->if_start = rt2560_start; 402 ifp->if_watchdog = rt2560_watchdog; 403 IFQ_SET_READY(&ifp->if_snd); 404 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 405 406 ic->ic_ifp = ifp; 407 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 408 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 409 ic->ic_state = IEEE80211_S_INIT; 410 411 /* set device capabilities */ 412 ic->ic_caps = 413 IEEE80211_C_IBSS | /* IBSS mode supported */ 414 IEEE80211_C_MONITOR | /* monitor mode supported */ 415 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 416 IEEE80211_C_TXPMGT | /* tx power management */ 417 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 418 IEEE80211_C_SHSLOT | /* short slot time supported */ 419 IEEE80211_C_WPA; /* 802.11i */ 420 421 if (sc->rf_rev == RT2560_RF_5222) { 422 /* set supported .11a rates */ 423 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 424 425 /* set supported .11a channels */ 426 for (i = 36; i <= 64; i += 4) { 427 ic->ic_channels[i].ic_freq = 428 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 429 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 430 } 431 for (i = 100; i <= 140; i += 4) { 432 ic->ic_channels[i].ic_freq = 433 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 434 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 435 } 436 for (i = 149; i <= 161; i += 4) { 437 ic->ic_channels[i].ic_freq = 438 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 439 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 440 } 441 } 442 443 /* set supported .11b and .11g rates */ 444 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 445 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 446 447 /* set supported .11b and .11g channels (1 through 14) */ 448 for (i = 1; i <= 14; i++) { 449 ic->ic_channels[i].ic_freq = 450 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 451 ic->ic_channels[i].ic_flags = 452 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 453 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 454 } 455 456 error = if_initialize(ifp); 457 if (error != 0) { 458 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", 459 error); 460 goto fail6; 461 } 462 ieee80211_ifattach(ic); 463 /* Use common softint-based if_input */ 464 ifp->if_percpuq = if_percpuq_create(ifp); 465 if_register(ifp); 466 467 ic->ic_node_alloc = rt2560_node_alloc; 468 ic->ic_updateslot = rt2560_update_slot; 469 ic->ic_reset = rt2560_reset; 470 471 /* override state transition machine */ 472 sc->sc_newstate = ic->ic_newstate; 473 ic->ic_newstate = rt2560_newstate; 474 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 475 476 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 477 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 478 479 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 480 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 481 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 482 483 sc->sc_txtap_len = sizeof sc->sc_txtapu; 484 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 485 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 486 487 488 sc->dwelltime = 200; 489 490 ieee80211_announce(ic); 491 492 if (pmf_device_register(sc->sc_dev, NULL, NULL)) 493 pmf_class_network_register(sc->sc_dev, ifp); 494 else 495 aprint_error_dev(sc->sc_dev, 496 "couldn't establish power handler\n"); 497 498 return 0; 499 500 fail6: rt2560_free_rx_ring(sc, &sc->rxq); 501 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 502 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 503 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 504 fail2: rt2560_free_tx_ring(sc, &sc->txq); 505 fail1: softint_disestablish(sc->sc_soft_ih); 506 sc->sc_soft_ih = NULL; 507 fail0: return ENXIO; 508 } 509 510 511 int 512 rt2560_detach(void *xsc) 513 { 514 struct rt2560_softc *sc = xsc; 515 struct ifnet *ifp = &sc->sc_if; 516 517 callout_stop(&sc->scan_ch); 518 callout_stop(&sc->rssadapt_ch); 519 520 pmf_device_deregister(sc->sc_dev); 521 522 rt2560_stop(ifp, 1); 523 524 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 525 if_detach(ifp); 526 527 rt2560_free_tx_ring(sc, &sc->txq); 528 rt2560_free_tx_ring(sc, &sc->atimq); 529 rt2560_free_tx_ring(sc, &sc->prioq); 530 rt2560_free_tx_ring(sc, &sc->bcnq); 531 rt2560_free_rx_ring(sc, &sc->rxq); 532 533 if (sc->sc_soft_ih != NULL) { 534 softint_disestablish(sc->sc_soft_ih); 535 sc->sc_soft_ih = NULL; 536 } 537 538 return 0; 539 } 540 541 int 542 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 543 int count) 544 { 545 int i, nsegs, error; 546 547 ring->count = count; 548 ring->queued = 0; 549 ring->cur = ring->next = 0; 550 ring->cur_encrypt = ring->next_encrypt = 0; 551 552 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 553 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 554 if (error != 0) { 555 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 556 goto fail; 557 } 558 559 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 560 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 561 if (error != 0) { 562 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 563 goto fail; 564 } 565 566 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 567 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 568 BUS_DMA_NOWAIT); 569 if (error != 0) { 570 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 571 goto fail; 572 } 573 574 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 575 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 576 if (error != 0) { 577 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 578 goto fail; 579 } 580 581 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 582 ring->physaddr = ring->map->dm_segs->ds_addr; 583 584 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 585 M_NOWAIT); 586 if (ring->data == NULL) { 587 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 588 error = ENOMEM; 589 goto fail; 590 } 591 592 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 593 for (i = 0; i < count; i++) { 594 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 595 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 596 &ring->data[i].map); 597 if (error != 0) { 598 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 599 goto fail; 600 } 601 } 602 603 return 0; 604 605 fail: rt2560_free_tx_ring(sc, ring); 606 return error; 607 } 608 609 void 610 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 611 { 612 struct rt2560_tx_desc *desc; 613 struct rt2560_tx_data *data; 614 int i; 615 616 for (i = 0; i < ring->count; i++) { 617 desc = &ring->desc[i]; 618 data = &ring->data[i]; 619 620 if (data->m != NULL) { 621 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 622 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 623 bus_dmamap_unload(sc->sc_dmat, data->map); 624 m_freem(data->m); 625 data->m = NULL; 626 } 627 628 if (data->ni != NULL) { 629 ieee80211_free_node(data->ni); 630 data->ni = NULL; 631 } 632 633 desc->flags = 0; 634 } 635 636 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 637 BUS_DMASYNC_PREWRITE); 638 639 ring->queued = 0; 640 ring->cur = ring->next = 0; 641 ring->cur_encrypt = ring->next_encrypt = 0; 642 } 643 644 void 645 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 646 { 647 struct rt2560_tx_data *data; 648 int i; 649 650 if (ring->desc != NULL) { 651 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 652 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 653 bus_dmamap_unload(sc->sc_dmat, ring->map); 654 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 655 ring->count * RT2560_TX_DESC_SIZE); 656 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 657 } 658 659 if (ring->data != NULL) { 660 for (i = 0; i < ring->count; i++) { 661 data = &ring->data[i]; 662 663 if (data->m != NULL) { 664 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 665 data->map->dm_mapsize, 666 BUS_DMASYNC_POSTWRITE); 667 bus_dmamap_unload(sc->sc_dmat, data->map); 668 m_freem(data->m); 669 } 670 671 if (data->ni != NULL) 672 ieee80211_free_node(data->ni); 673 674 675 if (data->map != NULL) 676 bus_dmamap_destroy(sc->sc_dmat, data->map); 677 } 678 free(ring->data, M_DEVBUF); 679 } 680 } 681 682 int 683 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 684 int count) 685 { 686 struct rt2560_rx_desc *desc; 687 struct rt2560_rx_data *data; 688 int i, nsegs, error; 689 690 ring->count = count; 691 ring->cur = ring->next = 0; 692 ring->cur_decrypt = 0; 693 694 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 695 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 696 if (error != 0) { 697 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 698 goto fail; 699 } 700 701 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 702 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 703 if (error != 0) { 704 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 705 goto fail; 706 } 707 708 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 709 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 710 BUS_DMA_NOWAIT); 711 if (error != 0) { 712 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 713 goto fail; 714 } 715 716 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 717 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 718 if (error != 0) { 719 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 720 goto fail; 721 } 722 723 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 724 ring->physaddr = ring->map->dm_segs->ds_addr; 725 726 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 727 M_NOWAIT); 728 if (ring->data == NULL) { 729 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 730 error = ENOMEM; 731 goto fail; 732 } 733 734 /* 735 * Pre-allocate Rx buffers and populate Rx ring. 736 */ 737 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 738 for (i = 0; i < count; i++) { 739 desc = &sc->rxq.desc[i]; 740 data = &sc->rxq.data[i]; 741 742 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 743 0, BUS_DMA_NOWAIT, &data->map); 744 if (error != 0) { 745 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 746 goto fail; 747 } 748 749 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 750 if (data->m == NULL) { 751 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 752 error = ENOMEM; 753 goto fail; 754 } 755 756 MCLGET(data->m, M_DONTWAIT); 757 if (!(data->m->m_flags & M_EXT)) { 758 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 759 error = ENOMEM; 760 goto fail; 761 } 762 763 error = bus_dmamap_load(sc->sc_dmat, data->map, 764 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 765 if (error != 0) { 766 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 767 goto fail; 768 } 769 770 desc->flags = htole32(RT2560_RX_BUSY); 771 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 772 } 773 774 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 775 BUS_DMASYNC_PREWRITE); 776 777 return 0; 778 779 fail: rt2560_free_rx_ring(sc, ring); 780 return error; 781 } 782 783 void 784 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 785 { 786 int i; 787 788 for (i = 0; i < ring->count; i++) { 789 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 790 ring->data[i].drop = 0; 791 } 792 793 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 794 BUS_DMASYNC_PREWRITE); 795 796 ring->cur = ring->next = 0; 797 ring->cur_decrypt = 0; 798 } 799 800 void 801 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 802 { 803 struct rt2560_rx_data *data; 804 int i; 805 806 if (ring->desc != NULL) { 807 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 808 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 809 bus_dmamap_unload(sc->sc_dmat, ring->map); 810 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 811 ring->count * RT2560_RX_DESC_SIZE); 812 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 813 } 814 815 if (ring->data != NULL) { 816 for (i = 0; i < ring->count; i++) { 817 data = &ring->data[i]; 818 819 if (data->m != NULL) { 820 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 821 data->map->dm_mapsize, 822 BUS_DMASYNC_POSTREAD); 823 bus_dmamap_unload(sc->sc_dmat, data->map); 824 m_freem(data->m); 825 } 826 827 if (data->map != NULL) 828 bus_dmamap_destroy(sc->sc_dmat, data->map); 829 } 830 free(ring->data, M_DEVBUF); 831 } 832 } 833 834 struct ieee80211_node * 835 rt2560_node_alloc(struct ieee80211_node_table *nt) 836 { 837 struct rt2560_node *rn; 838 839 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 840 M_NOWAIT | M_ZERO); 841 842 return (rn != NULL) ? &rn->ni : NULL; 843 } 844 845 int 846 rt2560_media_change(struct ifnet *ifp) 847 { 848 int error; 849 850 error = ieee80211_media_change(ifp); 851 if (error != ENETRESET) 852 return error; 853 854 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 855 rt2560_init(ifp); 856 857 return 0; 858 } 859 860 /* 861 * This function is called periodically (every 200ms) during scanning to 862 * switch from one channel to another. 863 */ 864 void 865 rt2560_next_scan(void *arg) 866 { 867 struct rt2560_softc *sc = arg; 868 struct ieee80211com *ic = &sc->sc_ic; 869 int s; 870 871 s = splnet(); 872 if (ic->ic_state == IEEE80211_S_SCAN) 873 ieee80211_next_scan(ic); 874 splx(s); 875 } 876 877 /* 878 * This function is called for each neighbor node. 879 */ 880 void 881 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 882 { 883 struct rt2560_node *rn = (struct rt2560_node *)ni; 884 885 ieee80211_rssadapt_updatestats(&rn->rssadapt); 886 } 887 888 /* 889 * This function is called periodically (every 100ms) in RUN state to update 890 * the rate adaptation statistics. 891 */ 892 void 893 rt2560_update_rssadapt(void *arg) 894 { 895 struct rt2560_softc *sc = arg; 896 struct ieee80211com *ic = &sc->sc_ic; 897 int s; 898 899 s = splnet(); 900 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 901 902 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 903 splx(s); 904 } 905 906 int 907 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 908 { 909 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 910 enum ieee80211_state ostate; 911 struct ieee80211_node *ni; 912 struct mbuf *m; 913 int error = 0; 914 915 ostate = ic->ic_state; 916 callout_stop(&sc->scan_ch); 917 918 switch (nstate) { 919 case IEEE80211_S_INIT: 920 callout_stop(&sc->rssadapt_ch); 921 922 if (ostate == IEEE80211_S_RUN) { 923 /* abort TSF synchronization */ 924 RAL_WRITE(sc, RT2560_CSR14, 0); 925 926 /* turn association led off */ 927 rt2560_update_led(sc, 0, 0); 928 } 929 break; 930 931 case IEEE80211_S_SCAN: 932 rt2560_set_chan(sc, ic->ic_curchan); 933 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 934 rt2560_next_scan, sc); 935 break; 936 937 case IEEE80211_S_AUTH: 938 rt2560_set_chan(sc, ic->ic_curchan); 939 break; 940 941 case IEEE80211_S_ASSOC: 942 rt2560_set_chan(sc, ic->ic_curchan); 943 break; 944 945 case IEEE80211_S_RUN: 946 rt2560_set_chan(sc, ic->ic_curchan); 947 948 ni = ic->ic_bss; 949 950 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 951 rt2560_update_plcp(sc); 952 rt2560_set_basicrates(sc); 953 rt2560_set_bssid(sc, ni->ni_bssid); 954 } 955 956 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 957 ic->ic_opmode == IEEE80211_M_IBSS) { 958 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 959 if (m == NULL) { 960 aprint_error_dev(sc->sc_dev, "could not allocate beacon\n"); 961 error = ENOBUFS; 962 break; 963 } 964 965 ieee80211_ref_node(ni); 966 error = rt2560_tx_bcn(sc, m, ni); 967 if (error != 0) 968 break; 969 } 970 971 /* turn association led on */ 972 rt2560_update_led(sc, 1, 0); 973 974 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 975 callout_reset(&sc->rssadapt_ch, hz / 10, 976 rt2560_update_rssadapt, sc); 977 rt2560_enable_tsf_sync(sc); 978 } 979 break; 980 } 981 982 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 983 } 984 985 /* 986 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 987 * 93C66). 988 */ 989 uint16_t 990 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 991 { 992 uint32_t tmp; 993 uint16_t val; 994 int n; 995 996 /* clock C once before the first command */ 997 RT2560_EEPROM_CTL(sc, 0); 998 999 RT2560_EEPROM_CTL(sc, RT2560_S); 1000 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1001 RT2560_EEPROM_CTL(sc, RT2560_S); 1002 1003 /* write start bit (1) */ 1004 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1005 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1006 1007 /* write READ opcode (10) */ 1008 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1009 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1010 RT2560_EEPROM_CTL(sc, RT2560_S); 1011 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1012 1013 /* write address (A5-A0 or A7-A0) */ 1014 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1015 for (; n >= 0; n--) { 1016 RT2560_EEPROM_CTL(sc, RT2560_S | 1017 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1018 RT2560_EEPROM_CTL(sc, RT2560_S | 1019 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1020 } 1021 1022 RT2560_EEPROM_CTL(sc, RT2560_S); 1023 1024 /* read data Q15-Q0 */ 1025 val = 0; 1026 for (n = 15; n >= 0; n--) { 1027 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1028 tmp = RAL_READ(sc, RT2560_CSR21); 1029 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1030 RT2560_EEPROM_CTL(sc, RT2560_S); 1031 } 1032 1033 RT2560_EEPROM_CTL(sc, 0); 1034 1035 /* clear Chip Select and clock C */ 1036 RT2560_EEPROM_CTL(sc, RT2560_S); 1037 RT2560_EEPROM_CTL(sc, 0); 1038 RT2560_EEPROM_CTL(sc, RT2560_C); 1039 1040 return val; 1041 } 1042 1043 /* 1044 * Some frames were processed by the hardware cipher engine and are ready for 1045 * transmission. 1046 */ 1047 void 1048 rt2560_encryption_intr(struct rt2560_softc *sc) 1049 { 1050 struct rt2560_tx_desc *desc; 1051 int hw; 1052 1053 /* retrieve last descriptor index processed by cipher engine */ 1054 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1055 RT2560_TX_DESC_SIZE; 1056 1057 for (; sc->txq.next_encrypt != hw;) { 1058 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1059 1060 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1061 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1062 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1063 1064 if (le32toh(desc->flags) & 1065 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1066 break; 1067 1068 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1069 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1070 RT2560_TX_CIPHER_TKIP) 1071 desc->eiv = bswap32(desc->eiv); 1072 1073 /* mark the frame ready for transmission */ 1074 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1075 1076 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1077 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1078 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1079 1080 DPRINTFN(15, ("encryption done idx=%u\n", 1081 sc->txq.next_encrypt)); 1082 1083 sc->txq.next_encrypt = 1084 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1085 } 1086 1087 /* kick Tx */ 1088 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1089 } 1090 1091 void 1092 rt2560_tx_intr(struct rt2560_softc *sc) 1093 { 1094 struct ieee80211com *ic = &sc->sc_ic; 1095 struct ifnet *ifp = ic->ic_ifp; 1096 struct rt2560_tx_desc *desc; 1097 struct rt2560_tx_data *data; 1098 struct rt2560_node *rn; 1099 int s; 1100 1101 s = splnet(); 1102 1103 for (;;) { 1104 desc = &sc->txq.desc[sc->txq.next]; 1105 data = &sc->txq.data[sc->txq.next]; 1106 1107 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1108 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1109 BUS_DMASYNC_POSTREAD); 1110 1111 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1112 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1113 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1114 break; 1115 1116 rn = (struct rt2560_node *)data->ni; 1117 1118 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1119 case RT2560_TX_SUCCESS: 1120 DPRINTFN(10, ("data frame sent successfully\n")); 1121 if (data->id.id_node != NULL) { 1122 ieee80211_rssadapt_raise_rate(ic, 1123 &rn->rssadapt, &data->id); 1124 } 1125 ifp->if_opackets++; 1126 break; 1127 1128 case RT2560_TX_SUCCESS_RETRY: 1129 DPRINTFN(9, ("data frame sent after %u retries\n", 1130 (le32toh(desc->flags) >> 5) & 0x7)); 1131 ifp->if_opackets++; 1132 break; 1133 1134 case RT2560_TX_FAIL_RETRY: 1135 DPRINTFN(9, ("sending data frame failed (too much " 1136 "retries)\n")); 1137 if (data->id.id_node != NULL) { 1138 ieee80211_rssadapt_lower_rate(ic, data->ni, 1139 &rn->rssadapt, &data->id); 1140 } 1141 ifp->if_oerrors++; 1142 break; 1143 1144 case RT2560_TX_FAIL_INVALID: 1145 case RT2560_TX_FAIL_OTHER: 1146 default: 1147 aprint_error_dev(sc->sc_dev, 1148 "sending data frame failed 0x%08x\n", 1149 le32toh(desc->flags)); 1150 ifp->if_oerrors++; 1151 } 1152 1153 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1154 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1155 bus_dmamap_unload(sc->sc_dmat, data->map); 1156 m_freem(data->m); 1157 data->m = NULL; 1158 ieee80211_free_node(data->ni); 1159 data->ni = NULL; 1160 1161 /* descriptor is no longer valid */ 1162 desc->flags &= ~htole32(RT2560_TX_VALID); 1163 1164 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1165 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1166 BUS_DMASYNC_PREWRITE); 1167 1168 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1169 1170 sc->txq.queued--; 1171 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1172 } 1173 1174 sc->sc_tx_timer = 0; 1175 ifp->if_flags &= ~IFF_OACTIVE; 1176 rt2560_start(ifp); /* in softint */ 1177 1178 splx(s); 1179 } 1180 1181 void 1182 rt2560_prio_intr(struct rt2560_softc *sc) 1183 { 1184 struct ieee80211com *ic = &sc->sc_ic; 1185 struct ifnet *ifp = ic->ic_ifp; 1186 struct rt2560_tx_desc *desc; 1187 struct rt2560_tx_data *data; 1188 int s; 1189 1190 s = splnet(); 1191 1192 for (;;) { 1193 desc = &sc->prioq.desc[sc->prioq.next]; 1194 data = &sc->prioq.data[sc->prioq.next]; 1195 1196 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1197 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1198 BUS_DMASYNC_POSTREAD); 1199 1200 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1201 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1202 break; 1203 1204 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1205 case RT2560_TX_SUCCESS: 1206 DPRINTFN(10, ("mgt frame sent successfully\n")); 1207 break; 1208 1209 case RT2560_TX_SUCCESS_RETRY: 1210 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1211 (le32toh(desc->flags) >> 5) & 0x7)); 1212 break; 1213 1214 case RT2560_TX_FAIL_RETRY: 1215 DPRINTFN(9, ("sending mgt frame failed (too much " 1216 "retries)\n")); 1217 break; 1218 1219 case RT2560_TX_FAIL_INVALID: 1220 case RT2560_TX_FAIL_OTHER: 1221 default: 1222 aprint_error_dev(sc->sc_dev, "sending mgt frame failed 0x%08x\n", 1223 le32toh(desc->flags)); 1224 } 1225 1226 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1227 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1228 bus_dmamap_unload(sc->sc_dmat, data->map); 1229 m_freem(data->m); 1230 data->m = NULL; 1231 ieee80211_free_node(data->ni); 1232 data->ni = NULL; 1233 1234 /* descriptor is no longer valid */ 1235 desc->flags &= ~htole32(RT2560_TX_VALID); 1236 1237 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1238 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1239 BUS_DMASYNC_PREWRITE); 1240 1241 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1242 1243 sc->prioq.queued--; 1244 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1245 } 1246 1247 sc->sc_tx_timer = 0; 1248 ifp->if_flags &= ~IFF_OACTIVE; 1249 rt2560_start(ifp); /* in softint */ 1250 1251 splx(s); 1252 } 1253 1254 /* 1255 * Some frames were processed by the hardware cipher engine and are ready for 1256 * transmission to the IEEE802.11 layer. 1257 */ 1258 void 1259 rt2560_decryption_intr(struct rt2560_softc *sc) 1260 { 1261 struct ieee80211com *ic = &sc->sc_ic; 1262 struct ifnet *ifp = ic->ic_ifp; 1263 struct rt2560_rx_desc *desc; 1264 struct rt2560_rx_data *data; 1265 struct rt2560_node *rn; 1266 struct ieee80211_frame *wh; 1267 struct ieee80211_node *ni; 1268 struct mbuf *mnew, *m; 1269 int hw, error, s; 1270 1271 /* retrieve last decriptor index processed by cipher engine */ 1272 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1273 RT2560_RX_DESC_SIZE; 1274 1275 for (; sc->rxq.cur_decrypt != hw;) { 1276 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1277 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1278 1279 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1280 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1281 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1282 1283 if (le32toh(desc->flags) & 1284 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1285 break; 1286 1287 if (data->drop) { 1288 ifp->if_ierrors++; 1289 goto skip; 1290 } 1291 1292 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1293 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1294 ifp->if_ierrors++; 1295 goto skip; 1296 } 1297 1298 /* 1299 * Try to allocate a new mbuf for this ring element and load it 1300 * before processing the current mbuf. If the ring element 1301 * cannot be loaded, drop the received packet and reuse the old 1302 * mbuf. In the unlikely case that the old mbuf can't be 1303 * reloaded either, explicitly panic. 1304 */ 1305 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1306 if (mnew == NULL) { 1307 ifp->if_ierrors++; 1308 goto skip; 1309 } 1310 1311 MCLGET(mnew, M_DONTWAIT); 1312 if (!(mnew->m_flags & M_EXT)) { 1313 m_freem(mnew); 1314 ifp->if_ierrors++; 1315 goto skip; 1316 } 1317 1318 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1319 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1320 bus_dmamap_unload(sc->sc_dmat, data->map); 1321 1322 error = bus_dmamap_load(sc->sc_dmat, data->map, 1323 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1324 if (error != 0) { 1325 m_freem(mnew); 1326 1327 /* try to reload the old mbuf */ 1328 error = bus_dmamap_load(sc->sc_dmat, data->map, 1329 mtod(data->m, void *), MCLBYTES, NULL, 1330 BUS_DMA_NOWAIT); 1331 if (error != 0) { 1332 /* very unlikely that it will fail... */ 1333 panic("%s: could not load old rx mbuf", 1334 device_xname(sc->sc_dev)); 1335 } 1336 /* physical address may have changed */ 1337 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1338 ifp->if_ierrors++; 1339 goto skip; 1340 } 1341 1342 /* 1343 * New mbuf successfully loaded, update Rx ring and continue 1344 * processing. 1345 */ 1346 m = data->m; 1347 data->m = mnew; 1348 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1349 1350 /* finalize mbuf */ 1351 m_set_rcvif(m, ifp); 1352 m->m_pkthdr.len = m->m_len = 1353 (le32toh(desc->flags) >> 16) & 0xfff; 1354 1355 s = splnet(); 1356 1357 if (sc->sc_drvbpf != NULL) { 1358 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1359 uint32_t tsf_lo, tsf_hi; 1360 1361 /* get timestamp (low and high 32 bits) */ 1362 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1363 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1364 1365 tap->wr_tsf = 1366 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1367 tap->wr_flags = 0; 1368 tap->wr_rate = rt2560_rxrate(desc); 1369 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1370 tap->wr_chan_flags = 1371 htole16(ic->ic_ibss_chan->ic_flags); 1372 tap->wr_antenna = sc->rx_ant; 1373 tap->wr_antsignal = desc->rssi; 1374 1375 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 1376 } 1377 1378 wh = mtod(m, struct ieee80211_frame *); 1379 ni = ieee80211_find_rxnode(ic, 1380 (struct ieee80211_frame_min *)wh); 1381 1382 /* send the frame to the 802.11 layer */ 1383 ieee80211_input(ic, m, ni, desc->rssi, 0); 1384 1385 /* give rssi to the rate adatation algorithm */ 1386 rn = (struct rt2560_node *)ni; 1387 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1388 1389 /* node is no longer needed */ 1390 ieee80211_free_node(ni); 1391 1392 splx(s); 1393 1394 skip: desc->flags = htole32(RT2560_RX_BUSY); 1395 1396 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1397 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1398 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1399 1400 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1401 1402 sc->rxq.cur_decrypt = 1403 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1404 } 1405 1406 /* 1407 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1408 * without calling if_start(). 1409 */ 1410 s = splnet(); 1411 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1412 rt2560_start(ifp); 1413 splx(s); 1414 } 1415 1416 /* 1417 * Some frames were received. Pass them to the hardware cipher engine before 1418 * sending them to the 802.11 layer. 1419 */ 1420 void 1421 rt2560_rx_intr(struct rt2560_softc *sc) 1422 { 1423 struct rt2560_rx_desc *desc; 1424 struct rt2560_rx_data *data; 1425 1426 for (;;) { 1427 desc = &sc->rxq.desc[sc->rxq.cur]; 1428 data = &sc->rxq.data[sc->rxq.cur]; 1429 1430 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1431 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1432 BUS_DMASYNC_POSTREAD); 1433 1434 if (le32toh(desc->flags) & 1435 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1436 break; 1437 1438 data->drop = 0; 1439 1440 if (le32toh(desc->flags) & 1441 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1442 /* 1443 * This should not happen since we did not request 1444 * to receive those frames when we filled RXCSR0. 1445 */ 1446 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1447 le32toh(desc->flags))); 1448 data->drop = 1; 1449 } 1450 1451 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1452 DPRINTFN(5, ("bad length\n")); 1453 data->drop = 1; 1454 } 1455 1456 /* mark the frame for decryption */ 1457 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1458 1459 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1460 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1461 BUS_DMASYNC_PREWRITE); 1462 1463 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1464 1465 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1466 } 1467 1468 /* kick decrypt */ 1469 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1470 } 1471 1472 /* 1473 * This function is called periodically in IBSS mode when a new beacon must be 1474 * sent out. 1475 */ 1476 static void 1477 rt2560_beacon_expire(struct rt2560_softc *sc) 1478 { 1479 struct ieee80211com *ic = &sc->sc_ic; 1480 struct rt2560_tx_data *data; 1481 1482 if (ic->ic_opmode != IEEE80211_M_IBSS && 1483 ic->ic_opmode != IEEE80211_M_HOSTAP) 1484 return; 1485 1486 data = &sc->bcnq.data[sc->bcnq.next]; 1487 1488 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1489 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1490 bus_dmamap_unload(sc->sc_dmat, data->map); 1491 1492 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1493 1494 bpf_mtap3(ic->ic_rawbpf, data->m); 1495 rt2560_tx_bcn(sc, data->m, data->ni); 1496 1497 DPRINTFN(15, ("beacon expired\n")); 1498 1499 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1500 } 1501 1502 static void 1503 rt2560_wakeup_expire(struct rt2560_softc *sc) 1504 { 1505 DPRINTFN(15, ("wakeup expired\n")); 1506 } 1507 1508 int 1509 rt2560_intr(void *arg) 1510 { 1511 struct rt2560_softc *sc = arg; 1512 struct ifnet *ifp = &sc->sc_if; 1513 uint32_t r; 1514 1515 if (!device_is_active(sc->sc_dev)) 1516 return 0; 1517 1518 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1519 return 0; /* not for us */ 1520 1521 /* disable interrupts */ 1522 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1523 1524 /* don't re-enable interrupts if we're shutting down */ 1525 if (!(ifp->if_flags & IFF_RUNNING)) 1526 return 0; 1527 1528 softint_schedule(sc->sc_soft_ih); 1529 return 1; 1530 } 1531 1532 static void 1533 rt2560_softintr(void *arg) 1534 { 1535 struct rt2560_softc *sc = arg; 1536 struct ifnet *ifp = &sc->sc_if; 1537 uint32_t r; 1538 1539 if (!device_is_active(sc->sc_dev) || !(ifp->if_flags & IFF_RUNNING)) 1540 return; 1541 1542 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1543 goto out; 1544 1545 /* acknowledge interrupts */ 1546 RAL_WRITE(sc, RT2560_CSR7, r); 1547 1548 if (r & RT2560_BEACON_EXPIRE) 1549 rt2560_beacon_expire(sc); 1550 1551 if (r & RT2560_WAKEUP_EXPIRE) 1552 rt2560_wakeup_expire(sc); 1553 1554 if (r & RT2560_ENCRYPTION_DONE) 1555 rt2560_encryption_intr(sc); 1556 1557 if (r & RT2560_TX_DONE) 1558 rt2560_tx_intr(sc); 1559 1560 if (r & RT2560_PRIO_DONE) 1561 rt2560_prio_intr(sc); 1562 1563 if (r & RT2560_DECRYPTION_DONE) 1564 rt2560_decryption_intr(sc); 1565 1566 if (r & RT2560_RX_DONE) 1567 rt2560_rx_intr(sc); 1568 1569 out: 1570 /* re-enable interrupts */ 1571 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1572 } 1573 1574 /* quickly determine if a given rate is CCK or OFDM */ 1575 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1576 1577 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1578 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1579 1580 #define RAL_SIFS 10 /* us */ 1581 1582 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1583 1584 /* 1585 * This function is only used by the Rx radiotap code. It returns the rate at 1586 * which a given frame was received. 1587 */ 1588 static uint8_t 1589 rt2560_rxrate(struct rt2560_rx_desc *desc) 1590 { 1591 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1592 /* reverse function of rt2560_plcp_signal */ 1593 switch (desc->rate) { 1594 case 0xb: return 12; 1595 case 0xf: return 18; 1596 case 0xa: return 24; 1597 case 0xe: return 36; 1598 case 0x9: return 48; 1599 case 0xd: return 72; 1600 case 0x8: return 96; 1601 case 0xc: return 108; 1602 } 1603 } else { 1604 if (desc->rate == 10) 1605 return 2; 1606 if (desc->rate == 20) 1607 return 4; 1608 if (desc->rate == 55) 1609 return 11; 1610 if (desc->rate == 110) 1611 return 22; 1612 } 1613 return 2; /* should not get there */ 1614 } 1615 1616 /* 1617 * Return the expected ack rate for a frame transmitted at rate `rate'. 1618 * XXX: this should depend on the destination node basic rate set. 1619 */ 1620 static int 1621 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1622 { 1623 switch (rate) { 1624 /* CCK rates */ 1625 case 2: 1626 return 2; 1627 case 4: 1628 case 11: 1629 case 22: 1630 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1631 1632 /* OFDM rates */ 1633 case 12: 1634 case 18: 1635 return 12; 1636 case 24: 1637 case 36: 1638 return 24; 1639 case 48: 1640 case 72: 1641 case 96: 1642 case 108: 1643 return 48; 1644 } 1645 1646 /* default to 1Mbps */ 1647 return 2; 1648 } 1649 1650 /* 1651 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1652 * The function automatically determines the operating mode depending on the 1653 * given rate. `flags' indicates whether short preamble is in use or not. 1654 */ 1655 static uint16_t 1656 rt2560_txtime(int len, int rate, uint32_t flags) 1657 { 1658 uint16_t txtime; 1659 1660 if (RAL_RATE_IS_OFDM(rate)) { 1661 /* IEEE Std 802.11a-1999, pp. 37 */ 1662 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1663 txtime = 16 + 4 + 4 * txtime + 6; 1664 } else { 1665 /* IEEE Std 802.11b-1999, pp. 28 */ 1666 txtime = (16 * len + rate - 1) / rate; 1667 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1668 txtime += 72 + 24; 1669 else 1670 txtime += 144 + 48; 1671 } 1672 return txtime; 1673 } 1674 1675 static uint8_t 1676 rt2560_plcp_signal(int rate) 1677 { 1678 switch (rate) { 1679 /* CCK rates (returned values are device-dependent) */ 1680 case 2: return 0x0; 1681 case 4: return 0x1; 1682 case 11: return 0x2; 1683 case 22: return 0x3; 1684 1685 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1686 case 12: return 0xb; 1687 case 18: return 0xf; 1688 case 24: return 0xa; 1689 case 36: return 0xe; 1690 case 48: return 0x9; 1691 case 72: return 0xd; 1692 case 96: return 0x8; 1693 case 108: return 0xc; 1694 1695 /* unsupported rates (should not get there) */ 1696 default: return 0xff; 1697 } 1698 } 1699 1700 static void 1701 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1702 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1703 { 1704 struct ieee80211com *ic = &sc->sc_ic; 1705 uint16_t plcp_length; 1706 int remainder; 1707 1708 desc->flags = htole32(flags); 1709 desc->flags |= htole32(len << 16); 1710 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1711 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1712 1713 desc->physaddr = htole32(physaddr); 1714 desc->wme = htole16( 1715 RT2560_AIFSN(2) | 1716 RT2560_LOGCWMIN(3) | 1717 RT2560_LOGCWMAX(8)); 1718 1719 /* setup PLCP fields */ 1720 desc->plcp_signal = rt2560_plcp_signal(rate); 1721 desc->plcp_service = 4; 1722 1723 len += IEEE80211_CRC_LEN; 1724 if (RAL_RATE_IS_OFDM(rate)) { 1725 desc->flags |= htole32(RT2560_TX_OFDM); 1726 1727 plcp_length = len & 0xfff; 1728 desc->plcp_length_hi = plcp_length >> 6; 1729 desc->plcp_length_lo = plcp_length & 0x3f; 1730 } else { 1731 plcp_length = (16 * len + rate - 1) / rate; 1732 if (rate == 22) { 1733 remainder = (16 * len) % 22; 1734 if (remainder != 0 && remainder < 7) 1735 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1736 } 1737 desc->plcp_length_hi = plcp_length >> 8; 1738 desc->plcp_length_lo = plcp_length & 0xff; 1739 1740 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1741 desc->plcp_signal |= 0x08; 1742 } 1743 } 1744 1745 static int 1746 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1747 struct ieee80211_node *ni) 1748 { 1749 struct rt2560_tx_desc *desc; 1750 struct rt2560_tx_data *data; 1751 int rate, error; 1752 1753 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1754 data = &sc->bcnq.data[sc->bcnq.cur]; 1755 1756 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1757 1758 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1759 BUS_DMA_NOWAIT); 1760 if (error != 0) { 1761 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1762 error); 1763 m_freem(m0); 1764 return error; 1765 } 1766 1767 data->m = m0; 1768 data->ni = ni; 1769 1770 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1771 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1772 data->map->dm_segs->ds_addr); 1773 1774 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1775 BUS_DMASYNC_PREWRITE); 1776 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1777 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1778 BUS_DMASYNC_PREWRITE); 1779 1780 return 0; 1781 } 1782 1783 static int 1784 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1785 struct ieee80211_node *ni) 1786 { 1787 struct ieee80211com *ic = &sc->sc_ic; 1788 struct rt2560_tx_desc *desc; 1789 struct rt2560_tx_data *data; 1790 struct ieee80211_frame *wh; 1791 struct ieee80211_key *k; 1792 uint16_t dur; 1793 uint32_t flags = 0; 1794 int rate, error; 1795 1796 desc = &sc->prioq.desc[sc->prioq.cur]; 1797 data = &sc->prioq.data[sc->prioq.cur]; 1798 1799 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1800 1801 wh = mtod(m0, struct ieee80211_frame *); 1802 1803 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1804 k = ieee80211_crypto_encap(ic, ni, m0); 1805 if (k == NULL) { 1806 m_freem(m0); 1807 return ENOBUFS; 1808 } 1809 1810 /* packet header may have moved, reset our local pointer */ 1811 wh = mtod(m0, struct ieee80211_frame *); 1812 } 1813 1814 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1815 BUS_DMA_NOWAIT); 1816 if (error != 0) { 1817 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1818 error); 1819 m_freem(m0); 1820 return error; 1821 } 1822 1823 if (sc->sc_drvbpf != NULL) { 1824 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1825 1826 tap->wt_flags = 0; 1827 tap->wt_rate = rate; 1828 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1829 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1830 tap->wt_antenna = sc->tx_ant; 1831 1832 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1833 } 1834 1835 data->m = m0; 1836 data->ni = ni; 1837 1838 wh = mtod(m0, struct ieee80211_frame *); 1839 1840 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1841 flags |= RT2560_TX_ACK; 1842 1843 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1844 RAL_SIFS; 1845 *(uint16_t *)wh->i_dur = htole16(dur); 1846 1847 /* tell hardware to add timestamp for probe responses */ 1848 if ((wh->i_fc[0] & 1849 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1850 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1851 flags |= RT2560_TX_TIMESTAMP; 1852 } 1853 1854 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1855 data->map->dm_segs->ds_addr); 1856 1857 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1858 BUS_DMASYNC_PREWRITE); 1859 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1860 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1861 BUS_DMASYNC_PREWRITE); 1862 1863 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1864 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1865 1866 /* kick prio */ 1867 sc->prioq.queued++; 1868 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1869 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1870 1871 return 0; 1872 } 1873 1874 /* 1875 * Build a RTS control frame. 1876 */ 1877 static struct mbuf * 1878 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1879 uint16_t dur) 1880 { 1881 struct ieee80211_frame_rts *rts; 1882 struct mbuf *m; 1883 1884 MGETHDR(m, M_DONTWAIT, MT_DATA); 1885 if (m == NULL) { 1886 sc->sc_ic.ic_stats.is_tx_nobuf++; 1887 aprint_error_dev(sc->sc_dev, "could not allocate RTS frame\n"); 1888 return NULL; 1889 } 1890 1891 rts = mtod(m, struct ieee80211_frame_rts *); 1892 1893 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1894 IEEE80211_FC0_SUBTYPE_RTS; 1895 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1896 *(uint16_t *)rts->i_dur = htole16(dur); 1897 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1898 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1899 1900 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1901 1902 return m; 1903 } 1904 1905 static int 1906 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1907 struct ieee80211_node *ni) 1908 { 1909 struct ieee80211com *ic = &sc->sc_ic; 1910 struct rt2560_tx_desc *desc; 1911 struct rt2560_tx_data *data; 1912 struct rt2560_node *rn; 1913 struct ieee80211_rateset *rs; 1914 struct ieee80211_frame *wh; 1915 struct ieee80211_key *k; 1916 struct mbuf *mnew; 1917 uint16_t dur; 1918 uint32_t flags = 0; 1919 int rate, error; 1920 1921 wh = mtod(m0, struct ieee80211_frame *); 1922 1923 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1924 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1925 rate = rs->rs_rates[ic->ic_fixed_rate]; 1926 } else { 1927 rs = &ni->ni_rates; 1928 rn = (struct rt2560_node *)ni; 1929 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1930 wh, m0->m_pkthdr.len, -1, NULL, 0); 1931 rate = rs->rs_rates[ni->ni_txrate]; 1932 } 1933 rate &= IEEE80211_RATE_VAL; 1934 1935 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1936 k = ieee80211_crypto_encap(ic, ni, m0); 1937 if (k == NULL) { 1938 m_freem(m0); 1939 return ENOBUFS; 1940 } 1941 1942 /* packet header may have moved, reset our local pointer */ 1943 wh = mtod(m0, struct ieee80211_frame *); 1944 } 1945 1946 /* 1947 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1948 * for directed frames only when the length of the MPDU is greater 1949 * than the length threshold indicated by [...]" ic_rtsthreshold. 1950 */ 1951 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1952 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1953 struct mbuf *m; 1954 int rtsrate, ackrate; 1955 1956 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1957 ackrate = rt2560_ack_rate(ic, rate); 1958 1959 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1960 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1961 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1962 3 * RAL_SIFS; 1963 1964 m = rt2560_get_rts(sc, wh, dur); 1965 1966 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1967 data = &sc->txq.data[sc->txq.cur_encrypt]; 1968 1969 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1970 BUS_DMA_NOWAIT); 1971 if (error != 0) { 1972 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1973 error); 1974 m_freem(m); 1975 m_freem(m0); 1976 return error; 1977 } 1978 1979 /* avoid multiple free() of the same node for each fragment */ 1980 ieee80211_ref_node(ni); 1981 1982 data->m = m; 1983 data->ni = ni; 1984 1985 /* RTS frames are not taken into account for rssadapt */ 1986 data->id.id_node = NULL; 1987 1988 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1989 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1990 data->map->dm_segs->ds_addr); 1991 1992 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1993 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1994 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1995 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1996 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1997 1998 sc->txq.queued++; 1999 sc->txq.cur_encrypt = 2000 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2001 2002 /* 2003 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 2004 * asynchronous data frame shall be transmitted after the CTS 2005 * frame and a SIFS period. 2006 */ 2007 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 2008 } 2009 2010 data = &sc->txq.data[sc->txq.cur_encrypt]; 2011 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 2012 2013 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2014 BUS_DMA_NOWAIT); 2015 if (error != 0 && error != EFBIG) { 2016 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 2017 error); 2018 m_freem(m0); 2019 return error; 2020 } 2021 if (error != 0) { 2022 /* too many fragments, linearize */ 2023 2024 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2025 if (mnew == NULL) { 2026 m_freem(m0); 2027 return ENOMEM; 2028 } 2029 2030 M_COPY_PKTHDR(mnew, m0); 2031 if (m0->m_pkthdr.len > MHLEN) { 2032 MCLGET(mnew, M_DONTWAIT); 2033 if (!(mnew->m_flags & M_EXT)) { 2034 m_freem(m0); 2035 m_freem(mnew); 2036 return ENOMEM; 2037 } 2038 } 2039 2040 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 2041 m_freem(m0); 2042 mnew->m_len = mnew->m_pkthdr.len; 2043 m0 = mnew; 2044 2045 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2046 BUS_DMA_NOWAIT); 2047 if (error != 0) { 2048 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 2049 error); 2050 m_freem(m0); 2051 return error; 2052 } 2053 2054 /* packet header have moved, reset our local pointer */ 2055 wh = mtod(m0, struct ieee80211_frame *); 2056 } 2057 2058 if (sc->sc_drvbpf != NULL) { 2059 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2060 2061 tap->wt_flags = 0; 2062 tap->wt_rate = rate; 2063 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2064 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2065 tap->wt_antenna = sc->tx_ant; 2066 2067 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2068 } 2069 2070 data->m = m0; 2071 data->ni = ni; 2072 2073 /* remember link conditions for rate adaptation algorithm */ 2074 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2075 data->id.id_len = m0->m_pkthdr.len; 2076 data->id.id_rateidx = ni->ni_txrate; 2077 data->id.id_node = ni; 2078 data->id.id_rssi = ni->ni_rssi; 2079 } else 2080 data->id.id_node = NULL; 2081 2082 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2083 flags |= RT2560_TX_ACK; 2084 2085 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2086 ic->ic_flags) + RAL_SIFS; 2087 *(uint16_t *)wh->i_dur = htole16(dur); 2088 } 2089 2090 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2091 data->map->dm_segs->ds_addr); 2092 2093 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2094 BUS_DMASYNC_PREWRITE); 2095 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2096 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2097 BUS_DMASYNC_PREWRITE); 2098 2099 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2100 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2101 2102 /* kick encrypt */ 2103 sc->txq.queued++; 2104 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2105 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2106 2107 return 0; 2108 } 2109 2110 static void 2111 rt2560_start(struct ifnet *ifp) 2112 { 2113 struct rt2560_softc *sc = ifp->if_softc; 2114 struct ieee80211com *ic = &sc->sc_ic; 2115 struct mbuf *m0; 2116 struct ieee80211_node *ni; 2117 struct ether_header *eh; 2118 2119 /* 2120 * net80211 may still try to send management frames even if the 2121 * IFF_RUNNING flag is not set... 2122 */ 2123 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2124 return; 2125 2126 for (;;) { 2127 IF_POLL(&ic->ic_mgtq, m0); 2128 if (m0 != NULL) { 2129 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2130 ifp->if_flags |= IFF_OACTIVE; 2131 break; 2132 } 2133 IF_DEQUEUE(&ic->ic_mgtq, m0); 2134 if (m0 == NULL) 2135 break; 2136 2137 ni = M_GETCTX(m0, struct ieee80211_node *); 2138 M_CLEARCTX(m0); 2139 bpf_mtap3(ic->ic_rawbpf, m0); 2140 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2141 break; 2142 2143 } else { 2144 if (ic->ic_state != IEEE80211_S_RUN) 2145 break; 2146 IFQ_DEQUEUE(&ifp->if_snd, m0); 2147 if (m0 == NULL) 2148 break; 2149 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2150 ifp->if_flags |= IFF_OACTIVE; 2151 break; 2152 } 2153 2154 if (m0->m_len < sizeof (struct ether_header) && 2155 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2156 continue; 2157 2158 eh = mtod(m0, struct ether_header *); 2159 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2160 if (ni == NULL) { 2161 m_freem(m0); 2162 continue; 2163 } 2164 bpf_mtap(ifp, m0); 2165 2166 m0 = ieee80211_encap(ic, m0, ni); 2167 if (m0 == NULL) { 2168 ieee80211_free_node(ni); 2169 continue; 2170 } 2171 2172 bpf_mtap3(ic->ic_rawbpf, m0); 2173 2174 if (rt2560_tx_data(sc, m0, ni) != 0) { 2175 ieee80211_free_node(ni); 2176 ifp->if_oerrors++; 2177 break; 2178 } 2179 } 2180 2181 sc->sc_tx_timer = 5; 2182 ifp->if_timer = 1; 2183 } 2184 } 2185 2186 static void 2187 rt2560_watchdog(struct ifnet *ifp) 2188 { 2189 struct rt2560_softc *sc = ifp->if_softc; 2190 2191 ifp->if_timer = 0; 2192 2193 if (sc->sc_tx_timer > 0) { 2194 if (--sc->sc_tx_timer == 0) { 2195 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2196 rt2560_init(ifp); 2197 ifp->if_oerrors++; 2198 return; 2199 } 2200 ifp->if_timer = 1; 2201 } 2202 2203 ieee80211_watchdog(&sc->sc_ic); 2204 } 2205 2206 /* 2207 * This function allows for fast channel switching in monitor mode (used by 2208 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2209 * generate a new beacon frame. 2210 */ 2211 static int 2212 rt2560_reset(struct ifnet *ifp) 2213 { 2214 struct rt2560_softc *sc = ifp->if_softc; 2215 struct ieee80211com *ic = &sc->sc_ic; 2216 2217 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2218 return ENETRESET; 2219 2220 rt2560_set_chan(sc, ic->ic_curchan); 2221 2222 return 0; 2223 } 2224 2225 int 2226 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2227 { 2228 struct rt2560_softc *sc = ifp->if_softc; 2229 struct ieee80211com *ic = &sc->sc_ic; 2230 int s, error = 0; 2231 2232 s = splnet(); 2233 2234 switch (cmd) { 2235 case SIOCSIFFLAGS: 2236 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2237 break; 2238 if (ifp->if_flags & IFF_UP) { 2239 if (ifp->if_flags & IFF_RUNNING) 2240 rt2560_update_promisc(sc); 2241 else 2242 rt2560_init(ifp); 2243 } else { 2244 if (ifp->if_flags & IFF_RUNNING) 2245 rt2560_stop(ifp, 1); 2246 } 2247 break; 2248 2249 case SIOCADDMULTI: 2250 case SIOCDELMULTI: 2251 /* XXX no h/w multicast filter? --dyoung */ 2252 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2253 error = 0; 2254 break; 2255 2256 case SIOCS80211CHANNEL: 2257 /* 2258 * This allows for fast channel switching in monitor mode 2259 * (used by kismet). In IBSS mode, we must explicitly reset 2260 * the interface to generate a new beacon frame. 2261 */ 2262 error = ieee80211_ioctl(ic, cmd, data); 2263 if (error == ENETRESET && 2264 ic->ic_opmode == IEEE80211_M_MONITOR) { 2265 rt2560_set_chan(sc, ic->ic_ibss_chan); 2266 error = 0; 2267 } 2268 break; 2269 2270 default: 2271 error = ieee80211_ioctl(ic, cmd, data); 2272 } 2273 2274 if (error == ENETRESET) { 2275 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2276 (IFF_UP | IFF_RUNNING)) 2277 rt2560_init(ifp); 2278 error = 0; 2279 } 2280 2281 splx(s); 2282 2283 return error; 2284 } 2285 2286 static void 2287 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2288 { 2289 uint32_t tmp; 2290 int ntries; 2291 2292 for (ntries = 0; ntries < 100; ntries++) { 2293 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2294 break; 2295 DELAY(1); 2296 } 2297 if (ntries == 100) { 2298 aprint_error_dev(sc->sc_dev, "could not write to BBP\n"); 2299 return; 2300 } 2301 2302 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2303 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2304 2305 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2306 } 2307 2308 static uint8_t 2309 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2310 { 2311 uint32_t val; 2312 int ntries; 2313 2314 val = RT2560_BBP_BUSY | reg << 8; 2315 RAL_WRITE(sc, RT2560_BBPCSR, val); 2316 2317 for (ntries = 0; ntries < 100; ntries++) { 2318 val = RAL_READ(sc, RT2560_BBPCSR); 2319 if (!(val & RT2560_BBP_BUSY)) 2320 return val & 0xff; 2321 DELAY(1); 2322 } 2323 2324 aprint_error_dev(sc->sc_dev, "could not read from BBP\n"); 2325 return 0; 2326 } 2327 2328 static void 2329 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2330 { 2331 uint32_t tmp; 2332 int ntries; 2333 2334 for (ntries = 0; ntries < 100; ntries++) { 2335 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2336 break; 2337 DELAY(1); 2338 } 2339 if (ntries == 100) { 2340 aprint_error_dev(sc->sc_dev, "could not write to RF\n"); 2341 return; 2342 } 2343 2344 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2345 (reg & 0x3); 2346 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2347 2348 /* remember last written value in sc */ 2349 sc->rf_regs[reg] = val; 2350 2351 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2352 } 2353 2354 static void 2355 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2356 { 2357 struct ieee80211com *ic = &sc->sc_ic; 2358 uint8_t power, tmp; 2359 u_int i, chan; 2360 2361 chan = ieee80211_chan2ieee(ic, c); 2362 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2363 return; 2364 2365 if (IEEE80211_IS_CHAN_2GHZ(c)) 2366 power = min(sc->txpow[chan - 1], 31); 2367 else 2368 power = 31; 2369 2370 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2371 2372 switch (sc->rf_rev) { 2373 case RT2560_RF_2522: 2374 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2375 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2376 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2377 break; 2378 2379 case RT2560_RF_2523: 2380 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2381 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2382 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2383 rt2560_rf_write(sc, RT2560_RF4, 2384 (chan == 14) ? 0x00280 : 0x00286); 2385 break; 2386 2387 case RT2560_RF_2524: 2388 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2389 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2390 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2391 rt2560_rf_write(sc, RT2560_RF4, 2392 (chan == 14) ? 0x00280 : 0x00286); 2393 break; 2394 2395 case RT2560_RF_2525: 2396 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2397 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2398 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2399 rt2560_rf_write(sc, RT2560_RF4, 2400 (chan == 14) ? 0x00280 : 0x00286); 2401 2402 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2403 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2404 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2405 rt2560_rf_write(sc, RT2560_RF4, 2406 (chan == 14) ? 0x00280 : 0x00286); 2407 break; 2408 2409 case RT2560_RF_2525E: 2410 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2411 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2412 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2413 rt2560_rf_write(sc, RT2560_RF4, 2414 (chan == 14) ? 0x00286 : 0x00282); 2415 break; 2416 2417 case RT2560_RF_2526: 2418 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2419 rt2560_rf_write(sc, RT2560_RF4, 2420 (chan & 1) ? 0x00386 : 0x00381); 2421 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2422 2423 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2424 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2425 rt2560_rf_write(sc, RT2560_RF4, 2426 (chan & 1) ? 0x00386 : 0x00381); 2427 break; 2428 2429 /* dual-band RF */ 2430 case RT2560_RF_5222: 2431 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2432 2433 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2434 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2435 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2436 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2437 break; 2438 } 2439 2440 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2441 ic->ic_state != IEEE80211_S_SCAN) { 2442 /* set Japan filter bit for channel 14 */ 2443 tmp = rt2560_bbp_read(sc, 70); 2444 2445 tmp &= ~RT2560_JAPAN_FILTER; 2446 if (chan == 14) 2447 tmp |= RT2560_JAPAN_FILTER; 2448 2449 rt2560_bbp_write(sc, 70, tmp); 2450 2451 DELAY(1000); /* RF needs a 1ms delay here */ 2452 rt2560_disable_rf_tune(sc); 2453 2454 /* clear CRC errors */ 2455 RAL_READ(sc, RT2560_CNT0); 2456 } 2457 } 2458 2459 /* 2460 * Disable RF auto-tuning. 2461 */ 2462 static void 2463 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2464 { 2465 uint32_t tmp; 2466 2467 if (sc->rf_rev != RT2560_RF_2523) { 2468 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2469 rt2560_rf_write(sc, RT2560_RF1, tmp); 2470 } 2471 2472 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2473 rt2560_rf_write(sc, RT2560_RF3, tmp); 2474 2475 DPRINTFN(2, ("disabling RF autotune\n")); 2476 } 2477 2478 /* 2479 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2480 * synchronization. 2481 */ 2482 static void 2483 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2484 { 2485 struct ieee80211com *ic = &sc->sc_ic; 2486 uint16_t logcwmin, preload; 2487 uint32_t tmp; 2488 2489 /* first, disable TSF synchronization */ 2490 RAL_WRITE(sc, RT2560_CSR14, 0); 2491 2492 tmp = 16 * ic->ic_bss->ni_intval; 2493 RAL_WRITE(sc, RT2560_CSR12, tmp); 2494 2495 RAL_WRITE(sc, RT2560_CSR13, 0); 2496 2497 logcwmin = 5; 2498 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2499 tmp = logcwmin << 16 | preload; 2500 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2501 2502 /* finally, enable TSF synchronization */ 2503 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2504 if (ic->ic_opmode == IEEE80211_M_STA) 2505 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2506 else 2507 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2508 RT2560_ENABLE_BEACON_GENERATOR; 2509 RAL_WRITE(sc, RT2560_CSR14, tmp); 2510 2511 DPRINTF(("enabling TSF synchronization\n")); 2512 } 2513 2514 static void 2515 rt2560_update_plcp(struct rt2560_softc *sc) 2516 { 2517 struct ieee80211com *ic = &sc->sc_ic; 2518 2519 /* no short preamble for 1Mbps */ 2520 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2521 2522 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2523 /* values taken from the reference driver */ 2524 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2525 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2526 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2527 } else { 2528 /* same values as above or'ed 0x8 */ 2529 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2530 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2531 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2532 } 2533 2534 DPRINTF(("updating PLCP for %s preamble\n", 2535 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2536 } 2537 2538 /* 2539 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2540 * know how these values are computed. 2541 */ 2542 static void 2543 rt2560_update_slot(struct ifnet *ifp) 2544 { 2545 struct rt2560_softc *sc = ifp->if_softc; 2546 struct ieee80211com *ic = &sc->sc_ic; 2547 uint8_t slottime; 2548 uint16_t sifs, pifs, difs, eifs; 2549 uint32_t tmp; 2550 2551 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2552 2553 /* define the MAC slot boundaries */ 2554 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2555 pifs = sifs + slottime; 2556 difs = sifs + 2 * slottime; 2557 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2558 2559 tmp = RAL_READ(sc, RT2560_CSR11); 2560 tmp = (tmp & ~0x1f00) | slottime << 8; 2561 RAL_WRITE(sc, RT2560_CSR11, tmp); 2562 2563 tmp = pifs << 16 | sifs; 2564 RAL_WRITE(sc, RT2560_CSR18, tmp); 2565 2566 tmp = eifs << 16 | difs; 2567 RAL_WRITE(sc, RT2560_CSR19, tmp); 2568 2569 DPRINTF(("setting slottime to %uus\n", slottime)); 2570 } 2571 2572 static void 2573 rt2560_set_basicrates(struct rt2560_softc *sc) 2574 { 2575 struct ieee80211com *ic = &sc->sc_ic; 2576 2577 /* update basic rate set */ 2578 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2579 /* 11b basic rates: 1, 2Mbps */ 2580 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2581 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2582 /* 11a basic rates: 6, 12, 24Mbps */ 2583 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2584 } else { 2585 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2586 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2587 } 2588 } 2589 2590 static void 2591 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2592 { 2593 uint32_t tmp; 2594 2595 /* set ON period to 70ms and OFF period to 30ms */ 2596 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2597 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2598 } 2599 2600 static void 2601 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2602 { 2603 uint32_t tmp; 2604 2605 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2606 RAL_WRITE(sc, RT2560_CSR5, tmp); 2607 2608 tmp = bssid[4] | bssid[5] << 8; 2609 RAL_WRITE(sc, RT2560_CSR6, tmp); 2610 2611 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2612 } 2613 2614 static void 2615 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2616 { 2617 uint32_t tmp; 2618 2619 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2620 RAL_WRITE(sc, RT2560_CSR3, tmp); 2621 2622 tmp = addr[4] | addr[5] << 8; 2623 RAL_WRITE(sc, RT2560_CSR4, tmp); 2624 2625 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2626 } 2627 2628 static void 2629 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2630 { 2631 uint32_t tmp; 2632 2633 tmp = RAL_READ(sc, RT2560_CSR3); 2634 addr[0] = tmp & 0xff; 2635 addr[1] = (tmp >> 8) & 0xff; 2636 addr[2] = (tmp >> 16) & 0xff; 2637 addr[3] = (tmp >> 24); 2638 2639 tmp = RAL_READ(sc, RT2560_CSR4); 2640 addr[4] = tmp & 0xff; 2641 addr[5] = (tmp >> 8) & 0xff; 2642 } 2643 2644 static void 2645 rt2560_update_promisc(struct rt2560_softc *sc) 2646 { 2647 struct ifnet *ifp = &sc->sc_if; 2648 uint32_t tmp; 2649 2650 tmp = RAL_READ(sc, RT2560_RXCSR0); 2651 2652 tmp &= ~RT2560_DROP_NOT_TO_ME; 2653 if (!(ifp->if_flags & IFF_PROMISC)) 2654 tmp |= RT2560_DROP_NOT_TO_ME; 2655 2656 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2657 2658 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2659 "entering" : "leaving")); 2660 } 2661 2662 static void 2663 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2664 { 2665 uint32_t tmp; 2666 uint8_t tx; 2667 2668 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2669 if (antenna == 1) 2670 tx |= RT2560_BBP_ANTA; 2671 else if (antenna == 2) 2672 tx |= RT2560_BBP_ANTB; 2673 else 2674 tx |= RT2560_BBP_DIVERSITY; 2675 2676 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2677 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2678 sc->rf_rev == RT2560_RF_5222) 2679 tx |= RT2560_BBP_FLIPIQ; 2680 2681 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2682 2683 /* update values for CCK and OFDM in BBPCSR1 */ 2684 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2685 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2686 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2687 } 2688 2689 static void 2690 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2691 { 2692 uint8_t rx; 2693 2694 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2695 if (antenna == 1) 2696 rx |= RT2560_BBP_ANTA; 2697 else if (antenna == 2) 2698 rx |= RT2560_BBP_ANTB; 2699 else 2700 rx |= RT2560_BBP_DIVERSITY; 2701 2702 /* need to force no I/Q flip for RF 2525e and 2526 */ 2703 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2704 rx &= ~RT2560_BBP_FLIPIQ; 2705 2706 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2707 } 2708 2709 static const char * 2710 rt2560_get_rf(int rev) 2711 { 2712 switch (rev) { 2713 case RT2560_RF_2522: return "RT2522"; 2714 case RT2560_RF_2523: return "RT2523"; 2715 case RT2560_RF_2524: return "RT2524"; 2716 case RT2560_RF_2525: return "RT2525"; 2717 case RT2560_RF_2525E: return "RT2525e"; 2718 case RT2560_RF_2526: return "RT2526"; 2719 case RT2560_RF_5222: return "RT5222"; 2720 default: return "unknown"; 2721 } 2722 } 2723 2724 static void 2725 rt2560_read_eeprom(struct rt2560_softc *sc) 2726 { 2727 uint16_t val; 2728 int i; 2729 2730 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2731 sc->rf_rev = (val >> 11) & 0x1f; 2732 sc->hw_radio = (val >> 10) & 0x1; 2733 sc->led_mode = (val >> 6) & 0x7; 2734 sc->rx_ant = (val >> 4) & 0x3; 2735 sc->tx_ant = (val >> 2) & 0x3; 2736 sc->nb_ant = val & 0x3; 2737 2738 /* read default values for BBP registers */ 2739 for (i = 0; i < 16; i++) { 2740 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2741 sc->bbp_prom[i].reg = val >> 8; 2742 sc->bbp_prom[i].val = val & 0xff; 2743 } 2744 2745 /* read Tx power for all b/g channels */ 2746 for (i = 0; i < 14 / 2; i++) { 2747 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2748 sc->txpow[i * 2] = val >> 8; 2749 sc->txpow[i * 2 + 1] = val & 0xff; 2750 } 2751 } 2752 2753 static int 2754 rt2560_bbp_init(struct rt2560_softc *sc) 2755 { 2756 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2757 int i, ntries; 2758 2759 /* wait for BBP to be ready */ 2760 for (ntries = 0; ntries < 100; ntries++) { 2761 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2762 break; 2763 DELAY(1); 2764 } 2765 if (ntries == 100) { 2766 aprint_error_dev(sc->sc_dev, "timeout waiting for BBP\n"); 2767 return EIO; 2768 } 2769 2770 /* initialize BBP registers to default values */ 2771 for (i = 0; i < N(rt2560_def_bbp); i++) { 2772 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2773 rt2560_def_bbp[i].val); 2774 } 2775 #if 0 2776 /* initialize BBP registers to values stored in EEPROM */ 2777 for (i = 0; i < 16; i++) { 2778 if (sc->bbp_prom[i].reg == 0xff) 2779 continue; 2780 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2781 } 2782 #endif 2783 2784 return 0; 2785 #undef N 2786 } 2787 2788 static int 2789 rt2560_init(struct ifnet *ifp) 2790 { 2791 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2792 struct rt2560_softc *sc = ifp->if_softc; 2793 struct ieee80211com *ic = &sc->sc_ic; 2794 uint32_t tmp; 2795 int i; 2796 2797 /* for CardBus, power on the socket */ 2798 if (!(sc->sc_flags & RT2560_ENABLED)) { 2799 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2800 aprint_error_dev(sc->sc_dev, "could not enable device\n"); 2801 return EIO; 2802 } 2803 sc->sc_flags |= RT2560_ENABLED; 2804 } 2805 2806 rt2560_stop(ifp, 1); 2807 2808 /* setup tx rings */ 2809 tmp = RT2560_PRIO_RING_COUNT << 24 | 2810 RT2560_ATIM_RING_COUNT << 16 | 2811 RT2560_TX_RING_COUNT << 8 | 2812 RT2560_TX_DESC_SIZE; 2813 2814 /* rings _must_ be initialized in this _exact_ order! */ 2815 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2816 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2817 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2818 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2819 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2820 2821 /* setup rx ring */ 2822 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2823 2824 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2825 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2826 2827 /* initialize MAC registers to default values */ 2828 for (i = 0; i < N(rt2560_def_mac); i++) 2829 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2830 2831 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2832 rt2560_set_macaddr(sc, ic->ic_myaddr); 2833 2834 /* set basic rate set (will be updated later) */ 2835 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2836 2837 rt2560_update_slot(ifp); 2838 rt2560_update_plcp(sc); 2839 rt2560_update_led(sc, 0, 0); 2840 2841 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2842 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2843 2844 if (rt2560_bbp_init(sc) != 0) { 2845 rt2560_stop(ifp, 1); 2846 return EIO; 2847 } 2848 2849 rt2560_set_txantenna(sc, 1); 2850 rt2560_set_rxantenna(sc, 1); 2851 2852 /* set default BSS channel */ 2853 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2854 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2855 2856 /* kick Rx */ 2857 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2858 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2859 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2860 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2861 tmp |= RT2560_DROP_TODS; 2862 if (!(ifp->if_flags & IFF_PROMISC)) 2863 tmp |= RT2560_DROP_NOT_TO_ME; 2864 } 2865 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2866 2867 /* clear old FCS and Rx FIFO errors */ 2868 RAL_READ(sc, RT2560_CNT0); 2869 RAL_READ(sc, RT2560_CNT4); 2870 2871 /* clear any pending interrupts */ 2872 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2873 2874 /* enable interrupts */ 2875 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2876 2877 ifp->if_flags &= ~IFF_OACTIVE; 2878 ifp->if_flags |= IFF_RUNNING; 2879 2880 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2881 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2882 else 2883 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2884 2885 return 0; 2886 #undef N 2887 } 2888 2889 static void 2890 rt2560_stop(struct ifnet *ifp, int disable) 2891 { 2892 struct rt2560_softc *sc = ifp->if_softc; 2893 struct ieee80211com *ic = &sc->sc_ic; 2894 2895 sc->sc_tx_timer = 0; 2896 ifp->if_timer = 0; 2897 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2898 2899 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2900 2901 /* abort Tx */ 2902 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2903 2904 /* disable Rx */ 2905 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2906 2907 /* reset ASIC (and thus, BBP) */ 2908 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2909 RAL_WRITE(sc, RT2560_CSR1, 0); 2910 2911 /* disable interrupts */ 2912 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2913 2914 /* clear any pending interrupt */ 2915 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2916 2917 /* reset Tx and Rx rings */ 2918 rt2560_reset_tx_ring(sc, &sc->txq); 2919 rt2560_reset_tx_ring(sc, &sc->atimq); 2920 rt2560_reset_tx_ring(sc, &sc->prioq); 2921 rt2560_reset_tx_ring(sc, &sc->bcnq); 2922 rt2560_reset_rx_ring(sc, &sc->rxq); 2923 } 2924
Indexes created Sun Oct 19 02:09:48 GMT 2025