rt2560.c revision 1.34
1 /* $NetBSD: rt2560.c,v 1.34 2018/06/26 06:48:00 msaitoh Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.34 2018/06/26 06:48:00 msaitoh Exp $"); 28 29 30 #include <sys/param.h> 31 #include <sys/sockio.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/callout.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 #include <net/if_ether.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/ip.h> 57 58 #include <net80211/ieee80211_var.h> 59 #include <net80211/ieee80211_rssadapt.h> 60 #include <net80211/ieee80211_radiotap.h> 61 62 #include <dev/ic/rt2560reg.h> 63 #include <dev/ic/rt2560var.h> 64 65 #ifdef RAL_DEBUG 66 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 67 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 68 int rt2560_debug = 0; 69 #else 70 #define DPRINTF(x) 71 #define DPRINTFN(n, x) 72 #endif 73 74 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 75 struct rt2560_tx_ring *, int); 76 static void rt2560_reset_tx_ring(struct rt2560_softc *, 77 struct rt2560_tx_ring *); 78 static void rt2560_free_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *); 80 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 81 struct rt2560_rx_ring *, int); 82 static void rt2560_reset_rx_ring(struct rt2560_softc *, 83 struct rt2560_rx_ring *); 84 static void rt2560_free_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *); 86 static struct ieee80211_node * 87 rt2560_node_alloc(struct ieee80211_node_table *); 88 static int rt2560_media_change(struct ifnet *); 89 static void rt2560_next_scan(void *); 90 static void rt2560_iter_func(void *, struct ieee80211_node *); 91 static void rt2560_update_rssadapt(void *); 92 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 93 int); 94 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 95 static void rt2560_encryption_intr(struct rt2560_softc *); 96 static void rt2560_tx_intr(struct rt2560_softc *); 97 static void rt2560_prio_intr(struct rt2560_softc *); 98 static void rt2560_decryption_intr(struct rt2560_softc *); 99 static void rt2560_rx_intr(struct rt2560_softc *); 100 static void rt2560_beacon_expire(struct rt2560_softc *); 101 static void rt2560_wakeup_expire(struct rt2560_softc *); 102 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 103 static int rt2560_ack_rate(struct ieee80211com *, int); 104 static uint16_t rt2560_txtime(int, int, uint32_t); 105 static uint8_t rt2560_plcp_signal(int); 106 static void rt2560_setup_tx_desc(struct rt2560_softc *, 107 struct rt2560_tx_desc *, uint32_t, int, int, int, 108 bus_addr_t); 109 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 110 struct ieee80211_node *); 111 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 112 struct ieee80211_node *); 113 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 114 struct ieee80211_frame *, uint16_t); 115 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 116 struct ieee80211_node *); 117 static void rt2560_start(struct ifnet *); 118 static void rt2560_watchdog(struct ifnet *); 119 static int rt2560_reset(struct ifnet *); 120 static int rt2560_ioctl(struct ifnet *, u_long, void *); 121 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 122 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 123 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 124 static void rt2560_set_chan(struct rt2560_softc *, 125 struct ieee80211_channel *); 126 static void rt2560_disable_rf_tune(struct rt2560_softc *); 127 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 128 static void rt2560_update_plcp(struct rt2560_softc *); 129 static void rt2560_update_slot(struct ifnet *); 130 static void rt2560_set_basicrates(struct rt2560_softc *); 131 static void rt2560_update_led(struct rt2560_softc *, int, int); 132 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 133 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 134 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 135 static void rt2560_update_promisc(struct rt2560_softc *); 136 static void rt2560_set_txantenna(struct rt2560_softc *, int); 137 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 138 static const char *rt2560_get_rf(int); 139 static void rt2560_read_eeprom(struct rt2560_softc *); 140 static int rt2560_bbp_init(struct rt2560_softc *); 141 static int rt2560_init(struct ifnet *); 142 static void rt2560_stop(struct ifnet *, int); 143 static void rt2560_softintr(void *); 144 145 /* 146 * Default values for MAC registers; values taken from the reference driver. 147 */ 148 static const struct { 149 uint32_t reg; 150 uint32_t val; 151 } rt2560_def_mac[] = { 152 { RT2560_PSCSR0, 0x00020002 }, 153 { RT2560_PSCSR1, 0x00000002 }, 154 { RT2560_PSCSR2, 0x00020002 }, 155 { RT2560_PSCSR3, 0x00000002 }, 156 { RT2560_TIMECSR, 0x00003f21 }, 157 { RT2560_CSR9, 0x00000780 }, 158 { RT2560_CSR11, 0x07041483 }, 159 { RT2560_CNT3, 0x00000000 }, 160 { RT2560_TXCSR1, 0x07614562 }, 161 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 162 { RT2560_ACKPCTCSR, 0x7038140a }, 163 { RT2560_ARTCSR1, 0x1d21252d }, 164 { RT2560_ARTCSR2, 0x1919191d }, 165 { RT2560_RXCSR0, 0xffffffff }, 166 { RT2560_RXCSR3, 0xb3aab3af }, 167 { RT2560_PCICSR, 0x000003b8 }, 168 { RT2560_PWRCSR0, 0x3f3b3100 }, 169 { RT2560_GPIOCSR, 0x0000ff00 }, 170 { RT2560_TESTCSR, 0x000000f0 }, 171 { RT2560_PWRCSR1, 0x000001ff }, 172 { RT2560_MACCSR0, 0x00213223 }, 173 { RT2560_MACCSR1, 0x00235518 }, 174 { RT2560_RLPWCSR, 0x00000040 }, 175 { RT2560_RALINKCSR, 0x9a009a11 }, 176 { RT2560_CSR7, 0xffffffff }, 177 { RT2560_BBPCSR1, 0x82188200 }, 178 { RT2560_TXACKCSR0, 0x00000020 }, 179 { RT2560_SECCSR3, 0x0000e78f } 180 }; 181 182 /* 183 * Default values for BBP registers; values taken from the reference driver. 184 */ 185 static const struct { 186 uint8_t reg; 187 uint8_t val; 188 } rt2560_def_bbp[] = { 189 { 3, 0x02 }, 190 { 4, 0x19 }, 191 { 14, 0x1c }, 192 { 15, 0x30 }, 193 { 16, 0xac }, 194 { 17, 0x48 }, 195 { 18, 0x18 }, 196 { 19, 0xff }, 197 { 20, 0x1e }, 198 { 21, 0x08 }, 199 { 22, 0x08 }, 200 { 23, 0x08 }, 201 { 24, 0x80 }, 202 { 25, 0x50 }, 203 { 26, 0x08 }, 204 { 27, 0x23 }, 205 { 30, 0x10 }, 206 { 31, 0x2b }, 207 { 32, 0xb9 }, 208 { 34, 0x12 }, 209 { 35, 0x50 }, 210 { 39, 0xc4 }, 211 { 40, 0x02 }, 212 { 41, 0x60 }, 213 { 53, 0x10 }, 214 { 54, 0x18 }, 215 { 56, 0x08 }, 216 { 57, 0x10 }, 217 { 58, 0x08 }, 218 { 61, 0x60 }, 219 { 62, 0x10 }, 220 { 75, 0xff } 221 }; 222 223 /* 224 * Default values for RF register R2 indexed by channel numbers; values taken 225 * from the reference driver. 226 */ 227 static const uint32_t rt2560_rf2522_r2[] = { 228 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 229 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 230 }; 231 232 static const uint32_t rt2560_rf2523_r2[] = { 233 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 234 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 235 }; 236 237 static const uint32_t rt2560_rf2524_r2[] = { 238 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 239 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 240 }; 241 242 static const uint32_t rt2560_rf2525_r2[] = { 243 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 244 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 245 }; 246 247 static const uint32_t rt2560_rf2525_hi_r2[] = { 248 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 249 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 250 }; 251 252 static const uint32_t rt2560_rf2525e_r2[] = { 253 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 254 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 255 }; 256 257 static const uint32_t rt2560_rf2526_hi_r2[] = { 258 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 259 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 260 }; 261 262 static const uint32_t rt2560_rf2526_r2[] = { 263 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 264 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 265 }; 266 267 /* 268 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 269 * values taken from the reference driver. 270 */ 271 static const struct { 272 uint8_t chan; 273 uint32_t r1; 274 uint32_t r2; 275 uint32_t r4; 276 } rt2560_rf5222[] = { 277 { 1, 0x08808, 0x0044d, 0x00282 }, 278 { 2, 0x08808, 0x0044e, 0x00282 }, 279 { 3, 0x08808, 0x0044f, 0x00282 }, 280 { 4, 0x08808, 0x00460, 0x00282 }, 281 { 5, 0x08808, 0x00461, 0x00282 }, 282 { 6, 0x08808, 0x00462, 0x00282 }, 283 { 7, 0x08808, 0x00463, 0x00282 }, 284 { 8, 0x08808, 0x00464, 0x00282 }, 285 { 9, 0x08808, 0x00465, 0x00282 }, 286 { 10, 0x08808, 0x00466, 0x00282 }, 287 { 11, 0x08808, 0x00467, 0x00282 }, 288 { 12, 0x08808, 0x00468, 0x00282 }, 289 { 13, 0x08808, 0x00469, 0x00282 }, 290 { 14, 0x08808, 0x0046b, 0x00286 }, 291 292 { 36, 0x08804, 0x06225, 0x00287 }, 293 { 40, 0x08804, 0x06226, 0x00287 }, 294 { 44, 0x08804, 0x06227, 0x00287 }, 295 { 48, 0x08804, 0x06228, 0x00287 }, 296 { 52, 0x08804, 0x06229, 0x00287 }, 297 { 56, 0x08804, 0x0622a, 0x00287 }, 298 { 60, 0x08804, 0x0622b, 0x00287 }, 299 { 64, 0x08804, 0x0622c, 0x00287 }, 300 301 { 100, 0x08804, 0x02200, 0x00283 }, 302 { 104, 0x08804, 0x02201, 0x00283 }, 303 { 108, 0x08804, 0x02202, 0x00283 }, 304 { 112, 0x08804, 0x02203, 0x00283 }, 305 { 116, 0x08804, 0x02204, 0x00283 }, 306 { 120, 0x08804, 0x02205, 0x00283 }, 307 { 124, 0x08804, 0x02206, 0x00283 }, 308 { 128, 0x08804, 0x02207, 0x00283 }, 309 { 132, 0x08804, 0x02208, 0x00283 }, 310 { 136, 0x08804, 0x02209, 0x00283 }, 311 { 140, 0x08804, 0x0220a, 0x00283 }, 312 313 { 149, 0x08808, 0x02429, 0x00281 }, 314 { 153, 0x08808, 0x0242b, 0x00281 }, 315 { 157, 0x08808, 0x0242d, 0x00281 }, 316 { 161, 0x08808, 0x0242f, 0x00281 } 317 }; 318 319 int 320 rt2560_attach(void *xsc, int id) 321 { 322 struct rt2560_softc *sc = xsc; 323 struct ieee80211com *ic = &sc->sc_ic; 324 struct ifnet *ifp = &sc->sc_if; 325 int error, i; 326 327 callout_init(&sc->scan_ch, 0); 328 callout_init(&sc->rssadapt_ch, 0); 329 330 /* retrieve RT2560 rev. no */ 331 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 332 333 /* retrieve MAC address */ 334 rt2560_get_macaddr(sc, ic->ic_myaddr); 335 336 aprint_normal_dev(sc->sc_dev, "802.11 address %s\n", 337 ether_sprintf(ic->ic_myaddr)); 338 339 /* retrieve RF rev. no and various other things from EEPROM */ 340 rt2560_read_eeprom(sc); 341 342 aprint_normal_dev(sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 343 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 344 345 sc->sc_soft_ih = softint_establish(SOFTINT_NET, rt2560_softintr, sc); 346 if (sc->sc_soft_ih == NULL) { 347 aprint_error_dev(sc->sc_dev, "could not establish softint\n)"); 348 goto fail0; 349 } 350 351 /* 352 * Allocate Tx and Rx rings. 353 */ 354 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 355 if (error != 0) { 356 aprint_error_dev(sc->sc_dev, "could not allocate Tx ring\n)"); 357 goto fail1; 358 } 359 360 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 361 if (error != 0) { 362 aprint_error_dev(sc->sc_dev, "could not allocate ATIM ring\n"); 363 goto fail2; 364 } 365 366 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 367 if (error != 0) { 368 aprint_error_dev(sc->sc_dev, "could not allocate Prio ring\n"); 369 goto fail3; 370 } 371 372 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 373 if (error != 0) { 374 aprint_error_dev(sc->sc_dev, "could not allocate Beacon ring\n"); 375 goto fail4; 376 } 377 378 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 379 if (error != 0) { 380 aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n"); 381 goto fail5; 382 } 383 384 ifp->if_softc = sc; 385 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 386 ifp->if_init = rt2560_init; 387 ifp->if_stop = rt2560_stop; 388 ifp->if_ioctl = rt2560_ioctl; 389 ifp->if_start = rt2560_start; 390 ifp->if_watchdog = rt2560_watchdog; 391 IFQ_SET_READY(&ifp->if_snd); 392 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 393 394 ic->ic_ifp = ifp; 395 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 396 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 397 ic->ic_state = IEEE80211_S_INIT; 398 399 /* set device capabilities */ 400 ic->ic_caps = 401 IEEE80211_C_IBSS | /* IBSS mode supported */ 402 IEEE80211_C_MONITOR | /* monitor mode supported */ 403 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 404 IEEE80211_C_TXPMGT | /* tx power management */ 405 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 406 IEEE80211_C_SHSLOT | /* short slot time supported */ 407 IEEE80211_C_WPA; /* 802.11i */ 408 409 if (sc->rf_rev == RT2560_RF_5222) { 410 /* set supported .11a rates */ 411 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 412 413 /* set supported .11a channels */ 414 for (i = 36; i <= 64; i += 4) { 415 ic->ic_channels[i].ic_freq = 416 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 417 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 418 } 419 for (i = 100; i <= 140; i += 4) { 420 ic->ic_channels[i].ic_freq = 421 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 422 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 423 } 424 for (i = 149; i <= 161; i += 4) { 425 ic->ic_channels[i].ic_freq = 426 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 427 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 428 } 429 } 430 431 /* set supported .11b and .11g rates */ 432 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 433 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 434 435 /* set supported .11b and .11g channels (1 through 14) */ 436 for (i = 1; i <= 14; i++) { 437 ic->ic_channels[i].ic_freq = 438 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 439 ic->ic_channels[i].ic_flags = 440 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 441 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 442 } 443 444 error = if_initialize(ifp); 445 if (error != 0) { 446 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", 447 error); 448 goto fail6; 449 } 450 ieee80211_ifattach(ic); 451 /* Use common softint-based if_input */ 452 ifp->if_percpuq = if_percpuq_create(ifp); 453 if_register(ifp); 454 455 ic->ic_node_alloc = rt2560_node_alloc; 456 ic->ic_updateslot = rt2560_update_slot; 457 ic->ic_reset = rt2560_reset; 458 459 /* override state transition machine */ 460 sc->sc_newstate = ic->ic_newstate; 461 ic->ic_newstate = rt2560_newstate; 462 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 463 464 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 465 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 466 467 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 468 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 469 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 470 471 sc->sc_txtap_len = sizeof sc->sc_txtapu; 472 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 473 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 474 475 476 sc->dwelltime = 200; 477 478 ieee80211_announce(ic); 479 480 if (pmf_device_register(sc->sc_dev, NULL, NULL)) 481 pmf_class_network_register(sc->sc_dev, ifp); 482 else 483 aprint_error_dev(sc->sc_dev, 484 "couldn't establish power handler\n"); 485 486 return 0; 487 488 fail6: rt2560_free_rx_ring(sc, &sc->rxq); 489 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 490 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 491 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 492 fail2: rt2560_free_tx_ring(sc, &sc->txq); 493 fail1: softint_disestablish(sc->sc_soft_ih); 494 sc->sc_soft_ih = NULL; 495 fail0: return ENXIO; 496 } 497 498 499 int 500 rt2560_detach(void *xsc) 501 { 502 struct rt2560_softc *sc = xsc; 503 struct ifnet *ifp = &sc->sc_if; 504 505 callout_stop(&sc->scan_ch); 506 callout_stop(&sc->rssadapt_ch); 507 508 pmf_device_deregister(sc->sc_dev); 509 510 rt2560_stop(ifp, 1); 511 512 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 513 if_detach(ifp); 514 515 rt2560_free_tx_ring(sc, &sc->txq); 516 rt2560_free_tx_ring(sc, &sc->atimq); 517 rt2560_free_tx_ring(sc, &sc->prioq); 518 rt2560_free_tx_ring(sc, &sc->bcnq); 519 rt2560_free_rx_ring(sc, &sc->rxq); 520 521 if (sc->sc_soft_ih != NULL) { 522 softint_disestablish(sc->sc_soft_ih); 523 sc->sc_soft_ih = NULL; 524 } 525 526 return 0; 527 } 528 529 int 530 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 531 int count) 532 { 533 int i, nsegs, error; 534 535 ring->count = count; 536 ring->queued = 0; 537 ring->cur = ring->next = 0; 538 ring->cur_encrypt = ring->next_encrypt = 0; 539 540 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 541 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 542 if (error != 0) { 543 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 544 goto fail; 545 } 546 547 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 548 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 549 if (error != 0) { 550 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 551 goto fail; 552 } 553 554 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 555 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 556 BUS_DMA_NOWAIT); 557 if (error != 0) { 558 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 559 goto fail; 560 } 561 562 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 563 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 564 if (error != 0) { 565 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 566 goto fail; 567 } 568 569 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 570 ring->physaddr = ring->map->dm_segs->ds_addr; 571 572 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 573 M_NOWAIT); 574 if (ring->data == NULL) { 575 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 576 error = ENOMEM; 577 goto fail; 578 } 579 580 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 581 for (i = 0; i < count; i++) { 582 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 583 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 584 &ring->data[i].map); 585 if (error != 0) { 586 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 587 goto fail; 588 } 589 } 590 591 return 0; 592 593 fail: rt2560_free_tx_ring(sc, ring); 594 return error; 595 } 596 597 void 598 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 599 { 600 struct rt2560_tx_desc *desc; 601 struct rt2560_tx_data *data; 602 int i; 603 604 for (i = 0; i < ring->count; i++) { 605 desc = &ring->desc[i]; 606 data = &ring->data[i]; 607 608 if (data->m != NULL) { 609 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 610 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 611 bus_dmamap_unload(sc->sc_dmat, data->map); 612 m_freem(data->m); 613 data->m = NULL; 614 } 615 616 if (data->ni != NULL) { 617 ieee80211_free_node(data->ni); 618 data->ni = NULL; 619 } 620 621 desc->flags = 0; 622 } 623 624 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 625 BUS_DMASYNC_PREWRITE); 626 627 ring->queued = 0; 628 ring->cur = ring->next = 0; 629 ring->cur_encrypt = ring->next_encrypt = 0; 630 } 631 632 void 633 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 634 { 635 struct rt2560_tx_data *data; 636 int i; 637 638 if (ring->desc != NULL) { 639 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 640 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 641 bus_dmamap_unload(sc->sc_dmat, ring->map); 642 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 643 ring->count * RT2560_TX_DESC_SIZE); 644 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 645 } 646 647 if (ring->data != NULL) { 648 for (i = 0; i < ring->count; i++) { 649 data = &ring->data[i]; 650 651 if (data->m != NULL) { 652 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 653 data->map->dm_mapsize, 654 BUS_DMASYNC_POSTWRITE); 655 bus_dmamap_unload(sc->sc_dmat, data->map); 656 m_freem(data->m); 657 } 658 659 if (data->ni != NULL) 660 ieee80211_free_node(data->ni); 661 662 663 if (data->map != NULL) 664 bus_dmamap_destroy(sc->sc_dmat, data->map); 665 } 666 free(ring->data, M_DEVBUF); 667 } 668 } 669 670 int 671 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 672 int count) 673 { 674 struct rt2560_rx_desc *desc; 675 struct rt2560_rx_data *data; 676 int i, nsegs, error; 677 678 ring->count = count; 679 ring->cur = ring->next = 0; 680 ring->cur_decrypt = 0; 681 682 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 683 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 684 if (error != 0) { 685 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 686 goto fail; 687 } 688 689 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 690 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 691 if (error != 0) { 692 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 693 goto fail; 694 } 695 696 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 697 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 698 BUS_DMA_NOWAIT); 699 if (error != 0) { 700 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 701 goto fail; 702 } 703 704 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 705 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 706 if (error != 0) { 707 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 708 goto fail; 709 } 710 711 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 712 ring->physaddr = ring->map->dm_segs->ds_addr; 713 714 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 715 M_NOWAIT); 716 if (ring->data == NULL) { 717 aprint_error_dev(sc->sc_dev, "could not allocate soft data\n"); 718 error = ENOMEM; 719 goto fail; 720 } 721 722 /* 723 * Pre-allocate Rx buffers and populate Rx ring. 724 */ 725 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 726 for (i = 0; i < count; i++) { 727 desc = &sc->rxq.desc[i]; 728 data = &sc->rxq.data[i]; 729 730 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 731 0, BUS_DMA_NOWAIT, &data->map); 732 if (error != 0) { 733 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 734 goto fail; 735 } 736 737 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 738 if (data->m == NULL) { 739 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 740 error = ENOMEM; 741 goto fail; 742 } 743 744 MCLGET(data->m, M_DONTWAIT); 745 if (!(data->m->m_flags & M_EXT)) { 746 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 747 error = ENOMEM; 748 goto fail; 749 } 750 751 error = bus_dmamap_load(sc->sc_dmat, data->map, 752 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 753 if (error != 0) { 754 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 755 goto fail; 756 } 757 758 desc->flags = htole32(RT2560_RX_BUSY); 759 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 760 } 761 762 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 763 BUS_DMASYNC_PREWRITE); 764 765 return 0; 766 767 fail: rt2560_free_rx_ring(sc, ring); 768 return error; 769 } 770 771 void 772 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 773 { 774 int i; 775 776 for (i = 0; i < ring->count; i++) { 777 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 778 ring->data[i].drop = 0; 779 } 780 781 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 782 BUS_DMASYNC_PREWRITE); 783 784 ring->cur = ring->next = 0; 785 ring->cur_decrypt = 0; 786 } 787 788 void 789 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 790 { 791 struct rt2560_rx_data *data; 792 int i; 793 794 if (ring->desc != NULL) { 795 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 796 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 797 bus_dmamap_unload(sc->sc_dmat, ring->map); 798 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 799 ring->count * RT2560_RX_DESC_SIZE); 800 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 801 } 802 803 if (ring->data != NULL) { 804 for (i = 0; i < ring->count; i++) { 805 data = &ring->data[i]; 806 807 if (data->m != NULL) { 808 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 809 data->map->dm_mapsize, 810 BUS_DMASYNC_POSTREAD); 811 bus_dmamap_unload(sc->sc_dmat, data->map); 812 m_freem(data->m); 813 } 814 815 if (data->map != NULL) 816 bus_dmamap_destroy(sc->sc_dmat, data->map); 817 } 818 free(ring->data, M_DEVBUF); 819 } 820 } 821 822 struct ieee80211_node * 823 rt2560_node_alloc(struct ieee80211_node_table *nt) 824 { 825 struct rt2560_node *rn; 826 827 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 828 M_NOWAIT | M_ZERO); 829 830 return (rn != NULL) ? &rn->ni : NULL; 831 } 832 833 int 834 rt2560_media_change(struct ifnet *ifp) 835 { 836 int error; 837 838 error = ieee80211_media_change(ifp); 839 if (error != ENETRESET) 840 return error; 841 842 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 843 rt2560_init(ifp); 844 845 return 0; 846 } 847 848 /* 849 * This function is called periodically (every 200ms) during scanning to 850 * switch from one channel to another. 851 */ 852 void 853 rt2560_next_scan(void *arg) 854 { 855 struct rt2560_softc *sc = arg; 856 struct ieee80211com *ic = &sc->sc_ic; 857 int s; 858 859 s = splnet(); 860 if (ic->ic_state == IEEE80211_S_SCAN) 861 ieee80211_next_scan(ic); 862 splx(s); 863 } 864 865 /* 866 * This function is called for each neighbor node. 867 */ 868 void 869 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 870 { 871 struct rt2560_node *rn = (struct rt2560_node *)ni; 872 873 ieee80211_rssadapt_updatestats(&rn->rssadapt); 874 } 875 876 /* 877 * This function is called periodically (every 100ms) in RUN state to update 878 * the rate adaptation statistics. 879 */ 880 void 881 rt2560_update_rssadapt(void *arg) 882 { 883 struct rt2560_softc *sc = arg; 884 struct ieee80211com *ic = &sc->sc_ic; 885 int s; 886 887 s = splnet(); 888 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 889 890 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 891 splx(s); 892 } 893 894 int 895 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 896 { 897 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 898 enum ieee80211_state ostate; 899 struct ieee80211_node *ni; 900 struct mbuf *m; 901 int error = 0; 902 903 ostate = ic->ic_state; 904 callout_stop(&sc->scan_ch); 905 906 switch (nstate) { 907 case IEEE80211_S_INIT: 908 callout_stop(&sc->rssadapt_ch); 909 910 if (ostate == IEEE80211_S_RUN) { 911 /* abort TSF synchronization */ 912 RAL_WRITE(sc, RT2560_CSR14, 0); 913 914 /* turn association led off */ 915 rt2560_update_led(sc, 0, 0); 916 } 917 break; 918 919 case IEEE80211_S_SCAN: 920 rt2560_set_chan(sc, ic->ic_curchan); 921 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 922 rt2560_next_scan, sc); 923 break; 924 925 case IEEE80211_S_AUTH: 926 rt2560_set_chan(sc, ic->ic_curchan); 927 break; 928 929 case IEEE80211_S_ASSOC: 930 rt2560_set_chan(sc, ic->ic_curchan); 931 break; 932 933 case IEEE80211_S_RUN: 934 rt2560_set_chan(sc, ic->ic_curchan); 935 936 ni = ic->ic_bss; 937 938 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 939 rt2560_update_plcp(sc); 940 rt2560_set_basicrates(sc); 941 rt2560_set_bssid(sc, ni->ni_bssid); 942 } 943 944 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 945 ic->ic_opmode == IEEE80211_M_IBSS) { 946 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 947 if (m == NULL) { 948 aprint_error_dev(sc->sc_dev, "could not allocate beacon\n"); 949 error = ENOBUFS; 950 break; 951 } 952 953 ieee80211_ref_node(ni); 954 error = rt2560_tx_bcn(sc, m, ni); 955 if (error != 0) 956 break; 957 } 958 959 /* turn association led on */ 960 rt2560_update_led(sc, 1, 0); 961 962 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 963 callout_reset(&sc->rssadapt_ch, hz / 10, 964 rt2560_update_rssadapt, sc); 965 rt2560_enable_tsf_sync(sc); 966 } 967 break; 968 } 969 970 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 971 } 972 973 /* 974 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 975 * 93C66). 976 */ 977 uint16_t 978 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 979 { 980 uint32_t tmp; 981 uint16_t val; 982 int n; 983 984 /* clock C once before the first command */ 985 RT2560_EEPROM_CTL(sc, 0); 986 987 RT2560_EEPROM_CTL(sc, RT2560_S); 988 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 989 RT2560_EEPROM_CTL(sc, RT2560_S); 990 991 /* write start bit (1) */ 992 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 993 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 994 995 /* write READ opcode (10) */ 996 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 997 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 998 RT2560_EEPROM_CTL(sc, RT2560_S); 999 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1000 1001 /* write address (A5-A0 or A7-A0) */ 1002 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1003 for (; n >= 0; n--) { 1004 RT2560_EEPROM_CTL(sc, RT2560_S | 1005 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1006 RT2560_EEPROM_CTL(sc, RT2560_S | 1007 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1008 } 1009 1010 RT2560_EEPROM_CTL(sc, RT2560_S); 1011 1012 /* read data Q15-Q0 */ 1013 val = 0; 1014 for (n = 15; n >= 0; n--) { 1015 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1016 tmp = RAL_READ(sc, RT2560_CSR21); 1017 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1018 RT2560_EEPROM_CTL(sc, RT2560_S); 1019 } 1020 1021 RT2560_EEPROM_CTL(sc, 0); 1022 1023 /* clear Chip Select and clock C */ 1024 RT2560_EEPROM_CTL(sc, RT2560_S); 1025 RT2560_EEPROM_CTL(sc, 0); 1026 RT2560_EEPROM_CTL(sc, RT2560_C); 1027 1028 return val; 1029 } 1030 1031 /* 1032 * Some frames were processed by the hardware cipher engine and are ready for 1033 * transmission. 1034 */ 1035 void 1036 rt2560_encryption_intr(struct rt2560_softc *sc) 1037 { 1038 struct rt2560_tx_desc *desc; 1039 int hw; 1040 1041 /* retrieve last descriptor index processed by cipher engine */ 1042 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1043 RT2560_TX_DESC_SIZE; 1044 1045 for (; sc->txq.next_encrypt != hw;) { 1046 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1047 1048 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1049 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1050 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1051 1052 if (le32toh(desc->flags) & 1053 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1054 break; 1055 1056 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1057 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1058 RT2560_TX_CIPHER_TKIP) 1059 desc->eiv = bswap32(desc->eiv); 1060 1061 /* mark the frame ready for transmission */ 1062 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1063 1064 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1065 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1066 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1067 1068 DPRINTFN(15, ("encryption done idx=%u\n", 1069 sc->txq.next_encrypt)); 1070 1071 sc->txq.next_encrypt = 1072 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1073 } 1074 1075 /* kick Tx */ 1076 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1077 } 1078 1079 void 1080 rt2560_tx_intr(struct rt2560_softc *sc) 1081 { 1082 struct ieee80211com *ic = &sc->sc_ic; 1083 struct ifnet *ifp = ic->ic_ifp; 1084 struct rt2560_tx_desc *desc; 1085 struct rt2560_tx_data *data; 1086 struct rt2560_node *rn; 1087 int s; 1088 1089 s = splnet(); 1090 1091 for (;;) { 1092 desc = &sc->txq.desc[sc->txq.next]; 1093 data = &sc->txq.data[sc->txq.next]; 1094 1095 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1096 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1097 BUS_DMASYNC_POSTREAD); 1098 1099 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1100 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1101 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1102 break; 1103 1104 rn = (struct rt2560_node *)data->ni; 1105 1106 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1107 case RT2560_TX_SUCCESS: 1108 DPRINTFN(10, ("data frame sent successfully\n")); 1109 if (data->id.id_node != NULL) { 1110 ieee80211_rssadapt_raise_rate(ic, 1111 &rn->rssadapt, &data->id); 1112 } 1113 ifp->if_opackets++; 1114 break; 1115 1116 case RT2560_TX_SUCCESS_RETRY: 1117 DPRINTFN(9, ("data frame sent after %u retries\n", 1118 (le32toh(desc->flags) >> 5) & 0x7)); 1119 ifp->if_opackets++; 1120 break; 1121 1122 case RT2560_TX_FAIL_RETRY: 1123 DPRINTFN(9, ("sending data frame failed (too much " 1124 "retries)\n")); 1125 if (data->id.id_node != NULL) { 1126 ieee80211_rssadapt_lower_rate(ic, data->ni, 1127 &rn->rssadapt, &data->id); 1128 } 1129 ifp->if_oerrors++; 1130 break; 1131 1132 case RT2560_TX_FAIL_INVALID: 1133 case RT2560_TX_FAIL_OTHER: 1134 default: 1135 aprint_error_dev(sc->sc_dev, 1136 "sending data frame failed 0x%08x\n", 1137 le32toh(desc->flags)); 1138 ifp->if_oerrors++; 1139 } 1140 1141 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1142 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1143 bus_dmamap_unload(sc->sc_dmat, data->map); 1144 m_freem(data->m); 1145 data->m = NULL; 1146 ieee80211_free_node(data->ni); 1147 data->ni = NULL; 1148 1149 /* descriptor is no longer valid */ 1150 desc->flags &= ~htole32(RT2560_TX_VALID); 1151 1152 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1153 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1154 BUS_DMASYNC_PREWRITE); 1155 1156 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1157 1158 sc->txq.queued--; 1159 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1160 } 1161 1162 sc->sc_tx_timer = 0; 1163 ifp->if_flags &= ~IFF_OACTIVE; 1164 rt2560_start(ifp); /* in softint */ 1165 1166 splx(s); 1167 } 1168 1169 void 1170 rt2560_prio_intr(struct rt2560_softc *sc) 1171 { 1172 struct ieee80211com *ic = &sc->sc_ic; 1173 struct ifnet *ifp = ic->ic_ifp; 1174 struct rt2560_tx_desc *desc; 1175 struct rt2560_tx_data *data; 1176 int s; 1177 1178 s = splnet(); 1179 1180 for (;;) { 1181 desc = &sc->prioq.desc[sc->prioq.next]; 1182 data = &sc->prioq.data[sc->prioq.next]; 1183 1184 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1185 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1186 BUS_DMASYNC_POSTREAD); 1187 1188 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1189 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1190 break; 1191 1192 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1193 case RT2560_TX_SUCCESS: 1194 DPRINTFN(10, ("mgt frame sent successfully\n")); 1195 break; 1196 1197 case RT2560_TX_SUCCESS_RETRY: 1198 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1199 (le32toh(desc->flags) >> 5) & 0x7)); 1200 break; 1201 1202 case RT2560_TX_FAIL_RETRY: 1203 DPRINTFN(9, ("sending mgt frame failed (too much " 1204 "retries)\n")); 1205 break; 1206 1207 case RT2560_TX_FAIL_INVALID: 1208 case RT2560_TX_FAIL_OTHER: 1209 default: 1210 aprint_error_dev(sc->sc_dev, "sending mgt frame failed 0x%08x\n", 1211 le32toh(desc->flags)); 1212 } 1213 1214 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1215 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1216 bus_dmamap_unload(sc->sc_dmat, data->map); 1217 m_freem(data->m); 1218 data->m = NULL; 1219 ieee80211_free_node(data->ni); 1220 data->ni = NULL; 1221 1222 /* descriptor is no longer valid */ 1223 desc->flags &= ~htole32(RT2560_TX_VALID); 1224 1225 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1226 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1227 BUS_DMASYNC_PREWRITE); 1228 1229 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1230 1231 sc->prioq.queued--; 1232 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1233 } 1234 1235 sc->sc_tx_timer = 0; 1236 ifp->if_flags &= ~IFF_OACTIVE; 1237 rt2560_start(ifp); /* in softint */ 1238 1239 splx(s); 1240 } 1241 1242 /* 1243 * Some frames were processed by the hardware cipher engine and are ready for 1244 * transmission to the IEEE802.11 layer. 1245 */ 1246 void 1247 rt2560_decryption_intr(struct rt2560_softc *sc) 1248 { 1249 struct ieee80211com *ic = &sc->sc_ic; 1250 struct ifnet *ifp = ic->ic_ifp; 1251 struct rt2560_rx_desc *desc; 1252 struct rt2560_rx_data *data; 1253 struct rt2560_node *rn; 1254 struct ieee80211_frame *wh; 1255 struct ieee80211_node *ni; 1256 struct mbuf *mnew, *m; 1257 int hw, error, s; 1258 1259 /* retrieve last decriptor index processed by cipher engine */ 1260 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1261 RT2560_RX_DESC_SIZE; 1262 1263 for (; sc->rxq.cur_decrypt != hw;) { 1264 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1265 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1266 1267 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1268 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1269 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1270 1271 if (le32toh(desc->flags) & 1272 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1273 break; 1274 1275 if (data->drop) { 1276 ifp->if_ierrors++; 1277 goto skip; 1278 } 1279 1280 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1281 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1282 ifp->if_ierrors++; 1283 goto skip; 1284 } 1285 1286 /* 1287 * Try to allocate a new mbuf for this ring element and load it 1288 * before processing the current mbuf. If the ring element 1289 * cannot be loaded, drop the received packet and reuse the old 1290 * mbuf. In the unlikely case that the old mbuf can't be 1291 * reloaded either, explicitly panic. 1292 */ 1293 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1294 if (mnew == NULL) { 1295 ifp->if_ierrors++; 1296 goto skip; 1297 } 1298 1299 MCLGET(mnew, M_DONTWAIT); 1300 if (!(mnew->m_flags & M_EXT)) { 1301 m_freem(mnew); 1302 ifp->if_ierrors++; 1303 goto skip; 1304 } 1305 1306 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1307 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1308 bus_dmamap_unload(sc->sc_dmat, data->map); 1309 1310 error = bus_dmamap_load(sc->sc_dmat, data->map, 1311 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1312 if (error != 0) { 1313 m_freem(mnew); 1314 1315 /* try to reload the old mbuf */ 1316 error = bus_dmamap_load(sc->sc_dmat, data->map, 1317 mtod(data->m, void *), MCLBYTES, NULL, 1318 BUS_DMA_NOWAIT); 1319 if (error != 0) { 1320 /* very unlikely that it will fail... */ 1321 panic("%s: could not load old rx mbuf", 1322 device_xname(sc->sc_dev)); 1323 } 1324 /* physical address may have changed */ 1325 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1326 ifp->if_ierrors++; 1327 goto skip; 1328 } 1329 1330 /* 1331 * New mbuf successfully loaded, update Rx ring and continue 1332 * processing. 1333 */ 1334 m = data->m; 1335 data->m = mnew; 1336 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1337 1338 /* finalize mbuf */ 1339 m_set_rcvif(m, ifp); 1340 m->m_pkthdr.len = m->m_len = 1341 (le32toh(desc->flags) >> 16) & 0xfff; 1342 1343 s = splnet(); 1344 1345 if (sc->sc_drvbpf != NULL) { 1346 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1347 uint32_t tsf_lo, tsf_hi; 1348 1349 /* get timestamp (low and high 32 bits) */ 1350 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1351 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1352 1353 tap->wr_tsf = 1354 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1355 tap->wr_flags = 0; 1356 tap->wr_rate = rt2560_rxrate(desc); 1357 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1358 tap->wr_chan_flags = 1359 htole16(ic->ic_ibss_chan->ic_flags); 1360 tap->wr_antenna = sc->rx_ant; 1361 tap->wr_antsignal = desc->rssi; 1362 1363 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m, 1364 BPF_D_IN); 1365 } 1366 1367 wh = mtod(m, struct ieee80211_frame *); 1368 ni = ieee80211_find_rxnode(ic, 1369 (struct ieee80211_frame_min *)wh); 1370 1371 /* send the frame to the 802.11 layer */ 1372 ieee80211_input(ic, m, ni, desc->rssi, 0); 1373 1374 /* give rssi to the rate adatation algorithm */ 1375 rn = (struct rt2560_node *)ni; 1376 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1377 1378 /* node is no longer needed */ 1379 ieee80211_free_node(ni); 1380 1381 splx(s); 1382 1383 skip: desc->flags = htole32(RT2560_RX_BUSY); 1384 1385 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1386 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1387 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1388 1389 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1390 1391 sc->rxq.cur_decrypt = 1392 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1393 } 1394 1395 /* 1396 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1397 * without calling if_start(). 1398 */ 1399 s = splnet(); 1400 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1401 rt2560_start(ifp); 1402 splx(s); 1403 } 1404 1405 /* 1406 * Some frames were received. Pass them to the hardware cipher engine before 1407 * sending them to the 802.11 layer. 1408 */ 1409 void 1410 rt2560_rx_intr(struct rt2560_softc *sc) 1411 { 1412 struct rt2560_rx_desc *desc; 1413 struct rt2560_rx_data *data; 1414 1415 for (;;) { 1416 desc = &sc->rxq.desc[sc->rxq.cur]; 1417 data = &sc->rxq.data[sc->rxq.cur]; 1418 1419 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1420 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1421 BUS_DMASYNC_POSTREAD); 1422 1423 if (le32toh(desc->flags) & 1424 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1425 break; 1426 1427 data->drop = 0; 1428 1429 if (le32toh(desc->flags) & 1430 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1431 /* 1432 * This should not happen since we did not request 1433 * to receive those frames when we filled RXCSR0. 1434 */ 1435 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1436 le32toh(desc->flags))); 1437 data->drop = 1; 1438 } 1439 1440 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1441 DPRINTFN(5, ("bad length\n")); 1442 data->drop = 1; 1443 } 1444 1445 /* mark the frame for decryption */ 1446 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1447 1448 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1449 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1450 BUS_DMASYNC_PREWRITE); 1451 1452 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1453 1454 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1455 } 1456 1457 /* kick decrypt */ 1458 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1459 } 1460 1461 /* 1462 * This function is called periodically in IBSS mode when a new beacon must be 1463 * sent out. 1464 */ 1465 static void 1466 rt2560_beacon_expire(struct rt2560_softc *sc) 1467 { 1468 struct ieee80211com *ic = &sc->sc_ic; 1469 struct rt2560_tx_data *data; 1470 1471 if (ic->ic_opmode != IEEE80211_M_IBSS && 1472 ic->ic_opmode != IEEE80211_M_HOSTAP) 1473 return; 1474 1475 data = &sc->bcnq.data[sc->bcnq.next]; 1476 1477 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1478 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1479 bus_dmamap_unload(sc->sc_dmat, data->map); 1480 1481 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1482 1483 bpf_mtap3(ic->ic_rawbpf, data->m, BPF_D_OUT); 1484 rt2560_tx_bcn(sc, data->m, data->ni); 1485 1486 DPRINTFN(15, ("beacon expired\n")); 1487 1488 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1489 } 1490 1491 static void 1492 rt2560_wakeup_expire(struct rt2560_softc *sc) 1493 { 1494 DPRINTFN(15, ("wakeup expired\n")); 1495 } 1496 1497 int 1498 rt2560_intr(void *arg) 1499 { 1500 struct rt2560_softc *sc = arg; 1501 struct ifnet *ifp = &sc->sc_if; 1502 uint32_t r; 1503 1504 if (!device_is_active(sc->sc_dev)) 1505 return 0; 1506 1507 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1508 return 0; /* not for us */ 1509 1510 /* disable interrupts */ 1511 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1512 1513 /* don't re-enable interrupts if we're shutting down */ 1514 if (!(ifp->if_flags & IFF_RUNNING)) 1515 return 0; 1516 1517 softint_schedule(sc->sc_soft_ih); 1518 return 1; 1519 } 1520 1521 static void 1522 rt2560_softintr(void *arg) 1523 { 1524 struct rt2560_softc *sc = arg; 1525 struct ifnet *ifp = &sc->sc_if; 1526 uint32_t r; 1527 1528 if (!device_is_active(sc->sc_dev) || !(ifp->if_flags & IFF_RUNNING)) 1529 return; 1530 1531 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1532 goto out; 1533 1534 /* acknowledge interrupts */ 1535 RAL_WRITE(sc, RT2560_CSR7, r); 1536 1537 if (r & RT2560_BEACON_EXPIRE) 1538 rt2560_beacon_expire(sc); 1539 1540 if (r & RT2560_WAKEUP_EXPIRE) 1541 rt2560_wakeup_expire(sc); 1542 1543 if (r & RT2560_ENCRYPTION_DONE) 1544 rt2560_encryption_intr(sc); 1545 1546 if (r & RT2560_TX_DONE) 1547 rt2560_tx_intr(sc); 1548 1549 if (r & RT2560_PRIO_DONE) 1550 rt2560_prio_intr(sc); 1551 1552 if (r & RT2560_DECRYPTION_DONE) 1553 rt2560_decryption_intr(sc); 1554 1555 if (r & RT2560_RX_DONE) 1556 rt2560_rx_intr(sc); 1557 1558 out: 1559 /* re-enable interrupts */ 1560 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1561 } 1562 1563 /* quickly determine if a given rate is CCK or OFDM */ 1564 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1565 1566 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1567 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1568 1569 #define RAL_SIFS 10 /* us */ 1570 1571 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1572 1573 /* 1574 * This function is only used by the Rx radiotap code. It returns the rate at 1575 * which a given frame was received. 1576 */ 1577 static uint8_t 1578 rt2560_rxrate(struct rt2560_rx_desc *desc) 1579 { 1580 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1581 /* reverse function of rt2560_plcp_signal */ 1582 switch (desc->rate) { 1583 case 0xb: return 12; 1584 case 0xf: return 18; 1585 case 0xa: return 24; 1586 case 0xe: return 36; 1587 case 0x9: return 48; 1588 case 0xd: return 72; 1589 case 0x8: return 96; 1590 case 0xc: return 108; 1591 } 1592 } else { 1593 if (desc->rate == 10) 1594 return 2; 1595 if (desc->rate == 20) 1596 return 4; 1597 if (desc->rate == 55) 1598 return 11; 1599 if (desc->rate == 110) 1600 return 22; 1601 } 1602 return 2; /* should not get there */ 1603 } 1604 1605 /* 1606 * Return the expected ack rate for a frame transmitted at rate `rate'. 1607 * XXX: this should depend on the destination node basic rate set. 1608 */ 1609 static int 1610 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1611 { 1612 switch (rate) { 1613 /* CCK rates */ 1614 case 2: 1615 return 2; 1616 case 4: 1617 case 11: 1618 case 22: 1619 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1620 1621 /* OFDM rates */ 1622 case 12: 1623 case 18: 1624 return 12; 1625 case 24: 1626 case 36: 1627 return 24; 1628 case 48: 1629 case 72: 1630 case 96: 1631 case 108: 1632 return 48; 1633 } 1634 1635 /* default to 1Mbps */ 1636 return 2; 1637 } 1638 1639 /* 1640 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1641 * The function automatically determines the operating mode depending on the 1642 * given rate. `flags' indicates whether short preamble is in use or not. 1643 */ 1644 static uint16_t 1645 rt2560_txtime(int len, int rate, uint32_t flags) 1646 { 1647 uint16_t txtime; 1648 1649 if (RAL_RATE_IS_OFDM(rate)) { 1650 /* IEEE Std 802.11a-1999, pp. 37 */ 1651 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1652 txtime = 16 + 4 + 4 * txtime + 6; 1653 } else { 1654 /* IEEE Std 802.11b-1999, pp. 28 */ 1655 txtime = (16 * len + rate - 1) / rate; 1656 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1657 txtime += 72 + 24; 1658 else 1659 txtime += 144 + 48; 1660 } 1661 return txtime; 1662 } 1663 1664 static uint8_t 1665 rt2560_plcp_signal(int rate) 1666 { 1667 switch (rate) { 1668 /* CCK rates (returned values are device-dependent) */ 1669 case 2: return 0x0; 1670 case 4: return 0x1; 1671 case 11: return 0x2; 1672 case 22: return 0x3; 1673 1674 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1675 case 12: return 0xb; 1676 case 18: return 0xf; 1677 case 24: return 0xa; 1678 case 36: return 0xe; 1679 case 48: return 0x9; 1680 case 72: return 0xd; 1681 case 96: return 0x8; 1682 case 108: return 0xc; 1683 1684 /* unsupported rates (should not get there) */ 1685 default: return 0xff; 1686 } 1687 } 1688 1689 static void 1690 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1691 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1692 { 1693 struct ieee80211com *ic = &sc->sc_ic; 1694 uint16_t plcp_length; 1695 int remainder; 1696 1697 desc->flags = htole32(flags); 1698 desc->flags |= htole32(len << 16); 1699 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1700 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1701 1702 desc->physaddr = htole32(physaddr); 1703 desc->wme = htole16( 1704 RT2560_AIFSN(2) | 1705 RT2560_LOGCWMIN(3) | 1706 RT2560_LOGCWMAX(8)); 1707 1708 /* setup PLCP fields */ 1709 desc->plcp_signal = rt2560_plcp_signal(rate); 1710 desc->plcp_service = 4; 1711 1712 len += IEEE80211_CRC_LEN; 1713 if (RAL_RATE_IS_OFDM(rate)) { 1714 desc->flags |= htole32(RT2560_TX_OFDM); 1715 1716 plcp_length = len & 0xfff; 1717 desc->plcp_length_hi = plcp_length >> 6; 1718 desc->plcp_length_lo = plcp_length & 0x3f; 1719 } else { 1720 plcp_length = (16 * len + rate - 1) / rate; 1721 if (rate == 22) { 1722 remainder = (16 * len) % 22; 1723 if (remainder != 0 && remainder < 7) 1724 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1725 } 1726 desc->plcp_length_hi = plcp_length >> 8; 1727 desc->plcp_length_lo = plcp_length & 0xff; 1728 1729 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1730 desc->plcp_signal |= 0x08; 1731 } 1732 } 1733 1734 static int 1735 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1736 struct ieee80211_node *ni) 1737 { 1738 struct rt2560_tx_desc *desc; 1739 struct rt2560_tx_data *data; 1740 int rate, error; 1741 1742 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1743 data = &sc->bcnq.data[sc->bcnq.cur]; 1744 1745 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1746 1747 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1748 BUS_DMA_NOWAIT); 1749 if (error != 0) { 1750 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1751 error); 1752 m_freem(m0); 1753 return error; 1754 } 1755 1756 data->m = m0; 1757 data->ni = ni; 1758 1759 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1760 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1761 data->map->dm_segs->ds_addr); 1762 1763 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1764 BUS_DMASYNC_PREWRITE); 1765 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1766 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1767 BUS_DMASYNC_PREWRITE); 1768 1769 return 0; 1770 } 1771 1772 static int 1773 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1774 struct ieee80211_node *ni) 1775 { 1776 struct ieee80211com *ic = &sc->sc_ic; 1777 struct rt2560_tx_desc *desc; 1778 struct rt2560_tx_data *data; 1779 struct ieee80211_frame *wh; 1780 struct ieee80211_key *k; 1781 uint16_t dur; 1782 uint32_t flags = 0; 1783 int rate, error; 1784 1785 desc = &sc->prioq.desc[sc->prioq.cur]; 1786 data = &sc->prioq.data[sc->prioq.cur]; 1787 1788 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1789 1790 wh = mtod(m0, struct ieee80211_frame *); 1791 1792 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1793 k = ieee80211_crypto_encap(ic, ni, m0); 1794 if (k == NULL) { 1795 m_freem(m0); 1796 return ENOBUFS; 1797 } 1798 1799 /* packet header may have moved, reset our local pointer */ 1800 wh = mtod(m0, struct ieee80211_frame *); 1801 } 1802 1803 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1804 BUS_DMA_NOWAIT); 1805 if (error != 0) { 1806 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1807 error); 1808 m_freem(m0); 1809 return error; 1810 } 1811 1812 if (sc->sc_drvbpf != NULL) { 1813 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1814 1815 tap->wt_flags = 0; 1816 tap->wt_rate = rate; 1817 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1818 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1819 tap->wt_antenna = sc->tx_ant; 1820 1821 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1822 } 1823 1824 data->m = m0; 1825 data->ni = ni; 1826 1827 wh = mtod(m0, struct ieee80211_frame *); 1828 1829 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1830 flags |= RT2560_TX_ACK; 1831 1832 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1833 RAL_SIFS; 1834 *(uint16_t *)wh->i_dur = htole16(dur); 1835 1836 /* tell hardware to add timestamp for probe responses */ 1837 if ((wh->i_fc[0] & 1838 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1839 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1840 flags |= RT2560_TX_TIMESTAMP; 1841 } 1842 1843 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1844 data->map->dm_segs->ds_addr); 1845 1846 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1847 BUS_DMASYNC_PREWRITE); 1848 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1849 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1850 BUS_DMASYNC_PREWRITE); 1851 1852 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1853 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1854 1855 /* kick prio */ 1856 sc->prioq.queued++; 1857 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1858 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1859 1860 return 0; 1861 } 1862 1863 /* 1864 * Build a RTS control frame. 1865 */ 1866 static struct mbuf * 1867 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1868 uint16_t dur) 1869 { 1870 struct ieee80211_frame_rts *rts; 1871 struct mbuf *m; 1872 1873 MGETHDR(m, M_DONTWAIT, MT_DATA); 1874 if (m == NULL) { 1875 sc->sc_ic.ic_stats.is_tx_nobuf++; 1876 aprint_error_dev(sc->sc_dev, "could not allocate RTS frame\n"); 1877 return NULL; 1878 } 1879 1880 rts = mtod(m, struct ieee80211_frame_rts *); 1881 1882 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1883 IEEE80211_FC0_SUBTYPE_RTS; 1884 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1885 *(uint16_t *)rts->i_dur = htole16(dur); 1886 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1887 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1888 1889 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1890 1891 return m; 1892 } 1893 1894 static int 1895 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1896 struct ieee80211_node *ni) 1897 { 1898 struct ieee80211com *ic = &sc->sc_ic; 1899 struct rt2560_tx_desc *desc; 1900 struct rt2560_tx_data *data; 1901 struct rt2560_node *rn; 1902 struct ieee80211_rateset *rs; 1903 struct ieee80211_frame *wh; 1904 struct ieee80211_key *k; 1905 struct mbuf *mnew; 1906 uint16_t dur; 1907 uint32_t flags = 0; 1908 int rate, error; 1909 1910 wh = mtod(m0, struct ieee80211_frame *); 1911 1912 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1913 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1914 rate = rs->rs_rates[ic->ic_fixed_rate]; 1915 } else { 1916 rs = &ni->ni_rates; 1917 rn = (struct rt2560_node *)ni; 1918 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1919 wh, m0->m_pkthdr.len, -1, NULL, 0); 1920 rate = rs->rs_rates[ni->ni_txrate]; 1921 } 1922 rate &= IEEE80211_RATE_VAL; 1923 1924 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1925 k = ieee80211_crypto_encap(ic, ni, m0); 1926 if (k == NULL) { 1927 m_freem(m0); 1928 return ENOBUFS; 1929 } 1930 1931 /* packet header may have moved, reset our local pointer */ 1932 wh = mtod(m0, struct ieee80211_frame *); 1933 } 1934 1935 /* 1936 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1937 * for directed frames only when the length of the MPDU is greater 1938 * than the length threshold indicated by [...]" ic_rtsthreshold. 1939 */ 1940 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1941 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1942 struct mbuf *m; 1943 int rtsrate, ackrate; 1944 1945 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1946 ackrate = rt2560_ack_rate(ic, rate); 1947 1948 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1949 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1950 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1951 3 * RAL_SIFS; 1952 1953 m = rt2560_get_rts(sc, wh, dur); 1954 1955 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1956 data = &sc->txq.data[sc->txq.cur_encrypt]; 1957 1958 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1959 BUS_DMA_NOWAIT); 1960 if (error != 0) { 1961 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1962 error); 1963 m_freem(m); 1964 m_freem(m0); 1965 return error; 1966 } 1967 1968 /* avoid multiple free() of the same node for each fragment */ 1969 ieee80211_ref_node(ni); 1970 1971 data->m = m; 1972 data->ni = ni; 1973 1974 /* RTS frames are not taken into account for rssadapt */ 1975 data->id.id_node = NULL; 1976 1977 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1978 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1979 data->map->dm_segs->ds_addr); 1980 1981 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1982 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1983 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1984 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1985 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1986 1987 sc->txq.queued++; 1988 sc->txq.cur_encrypt = 1989 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1990 1991 /* 1992 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1993 * asynchronous data frame shall be transmitted after the CTS 1994 * frame and a SIFS period. 1995 */ 1996 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1997 } 1998 1999 data = &sc->txq.data[sc->txq.cur_encrypt]; 2000 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 2001 2002 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2003 BUS_DMA_NOWAIT); 2004 if (error != 0 && error != EFBIG) { 2005 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 2006 error); 2007 m_freem(m0); 2008 return error; 2009 } 2010 if (error != 0) { 2011 /* too many fragments, linearize */ 2012 2013 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2014 if (mnew == NULL) { 2015 m_freem(m0); 2016 return ENOMEM; 2017 } 2018 2019 M_COPY_PKTHDR(mnew, m0); 2020 if (m0->m_pkthdr.len > MHLEN) { 2021 MCLGET(mnew, M_DONTWAIT); 2022 if (!(mnew->m_flags & M_EXT)) { 2023 m_freem(m0); 2024 m_freem(mnew); 2025 return ENOMEM; 2026 } 2027 } 2028 2029 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 2030 m_freem(m0); 2031 mnew->m_len = mnew->m_pkthdr.len; 2032 m0 = mnew; 2033 2034 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2035 BUS_DMA_NOWAIT); 2036 if (error != 0) { 2037 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 2038 error); 2039 m_freem(m0); 2040 return error; 2041 } 2042 2043 /* packet header have moved, reset our local pointer */ 2044 wh = mtod(m0, struct ieee80211_frame *); 2045 } 2046 2047 if (sc->sc_drvbpf != NULL) { 2048 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2049 2050 tap->wt_flags = 0; 2051 tap->wt_rate = rate; 2052 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2053 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2054 tap->wt_antenna = sc->tx_ant; 2055 2056 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 2057 } 2058 2059 data->m = m0; 2060 data->ni = ni; 2061 2062 /* remember link conditions for rate adaptation algorithm */ 2063 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2064 data->id.id_len = m0->m_pkthdr.len; 2065 data->id.id_rateidx = ni->ni_txrate; 2066 data->id.id_node = ni; 2067 data->id.id_rssi = ni->ni_rssi; 2068 } else 2069 data->id.id_node = NULL; 2070 2071 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2072 flags |= RT2560_TX_ACK; 2073 2074 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2075 ic->ic_flags) + RAL_SIFS; 2076 *(uint16_t *)wh->i_dur = htole16(dur); 2077 } 2078 2079 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2080 data->map->dm_segs->ds_addr); 2081 2082 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2083 BUS_DMASYNC_PREWRITE); 2084 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2085 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2086 BUS_DMASYNC_PREWRITE); 2087 2088 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2089 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2090 2091 /* kick encrypt */ 2092 sc->txq.queued++; 2093 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2094 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2095 2096 return 0; 2097 } 2098 2099 static void 2100 rt2560_start(struct ifnet *ifp) 2101 { 2102 struct rt2560_softc *sc = ifp->if_softc; 2103 struct ieee80211com *ic = &sc->sc_ic; 2104 struct mbuf *m0; 2105 struct ieee80211_node *ni; 2106 struct ether_header *eh; 2107 2108 /* 2109 * net80211 may still try to send management frames even if the 2110 * IFF_RUNNING flag is not set... 2111 */ 2112 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2113 return; 2114 2115 for (;;) { 2116 IF_POLL(&ic->ic_mgtq, m0); 2117 if (m0 != NULL) { 2118 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2119 ifp->if_flags |= IFF_OACTIVE; 2120 break; 2121 } 2122 IF_DEQUEUE(&ic->ic_mgtq, m0); 2123 if (m0 == NULL) 2124 break; 2125 2126 ni = M_GETCTX(m0, struct ieee80211_node *); 2127 M_CLEARCTX(m0); 2128 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 2129 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2130 break; 2131 2132 } else { 2133 if (ic->ic_state != IEEE80211_S_RUN) 2134 break; 2135 IFQ_DEQUEUE(&ifp->if_snd, m0); 2136 if (m0 == NULL) 2137 break; 2138 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2139 ifp->if_flags |= IFF_OACTIVE; 2140 break; 2141 } 2142 2143 if (m0->m_len < sizeof (struct ether_header) && 2144 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2145 continue; 2146 2147 eh = mtod(m0, struct ether_header *); 2148 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2149 if (ni == NULL) { 2150 m_freem(m0); 2151 continue; 2152 } 2153 bpf_mtap(ifp, m0, BPF_D_OUT); 2154 2155 m0 = ieee80211_encap(ic, m0, ni); 2156 if (m0 == NULL) { 2157 ieee80211_free_node(ni); 2158 continue; 2159 } 2160 2161 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 2162 2163 if (rt2560_tx_data(sc, m0, ni) != 0) { 2164 ieee80211_free_node(ni); 2165 ifp->if_oerrors++; 2166 break; 2167 } 2168 } 2169 2170 sc->sc_tx_timer = 5; 2171 ifp->if_timer = 1; 2172 } 2173 } 2174 2175 static void 2176 rt2560_watchdog(struct ifnet *ifp) 2177 { 2178 struct rt2560_softc *sc = ifp->if_softc; 2179 2180 ifp->if_timer = 0; 2181 2182 if (sc->sc_tx_timer > 0) { 2183 if (--sc->sc_tx_timer == 0) { 2184 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2185 rt2560_init(ifp); 2186 ifp->if_oerrors++; 2187 return; 2188 } 2189 ifp->if_timer = 1; 2190 } 2191 2192 ieee80211_watchdog(&sc->sc_ic); 2193 } 2194 2195 /* 2196 * This function allows for fast channel switching in monitor mode (used by 2197 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2198 * generate a new beacon frame. 2199 */ 2200 static int 2201 rt2560_reset(struct ifnet *ifp) 2202 { 2203 struct rt2560_softc *sc = ifp->if_softc; 2204 struct ieee80211com *ic = &sc->sc_ic; 2205 2206 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2207 return ENETRESET; 2208 2209 rt2560_set_chan(sc, ic->ic_curchan); 2210 2211 return 0; 2212 } 2213 2214 int 2215 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2216 { 2217 struct rt2560_softc *sc = ifp->if_softc; 2218 struct ieee80211com *ic = &sc->sc_ic; 2219 int s, error = 0; 2220 2221 s = splnet(); 2222 2223 switch (cmd) { 2224 case SIOCSIFFLAGS: 2225 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2226 break; 2227 if (ifp->if_flags & IFF_UP) { 2228 if (ifp->if_flags & IFF_RUNNING) 2229 rt2560_update_promisc(sc); 2230 else 2231 rt2560_init(ifp); 2232 } else { 2233 if (ifp->if_flags & IFF_RUNNING) 2234 rt2560_stop(ifp, 1); 2235 } 2236 break; 2237 2238 case SIOCADDMULTI: 2239 case SIOCDELMULTI: 2240 /* XXX no h/w multicast filter? --dyoung */ 2241 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2242 error = 0; 2243 break; 2244 2245 case SIOCS80211CHANNEL: 2246 /* 2247 * This allows for fast channel switching in monitor mode 2248 * (used by kismet). In IBSS mode, we must explicitly reset 2249 * the interface to generate a new beacon frame. 2250 */ 2251 error = ieee80211_ioctl(ic, cmd, data); 2252 if (error == ENETRESET && 2253 ic->ic_opmode == IEEE80211_M_MONITOR) { 2254 rt2560_set_chan(sc, ic->ic_ibss_chan); 2255 error = 0; 2256 } 2257 break; 2258 2259 default: 2260 error = ieee80211_ioctl(ic, cmd, data); 2261 } 2262 2263 if (error == ENETRESET) { 2264 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2265 (IFF_UP | IFF_RUNNING)) 2266 rt2560_init(ifp); 2267 error = 0; 2268 } 2269 2270 splx(s); 2271 2272 return error; 2273 } 2274 2275 static void 2276 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2277 { 2278 uint32_t tmp; 2279 int ntries; 2280 2281 for (ntries = 0; ntries < 100; ntries++) { 2282 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2283 break; 2284 DELAY(1); 2285 } 2286 if (ntries == 100) { 2287 aprint_error_dev(sc->sc_dev, "could not write to BBP\n"); 2288 return; 2289 } 2290 2291 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2292 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2293 2294 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2295 } 2296 2297 static uint8_t 2298 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2299 { 2300 uint32_t val; 2301 int ntries; 2302 2303 val = RT2560_BBP_BUSY | reg << 8; 2304 RAL_WRITE(sc, RT2560_BBPCSR, val); 2305 2306 for (ntries = 0; ntries < 100; ntries++) { 2307 val = RAL_READ(sc, RT2560_BBPCSR); 2308 if (!(val & RT2560_BBP_BUSY)) 2309 return val & 0xff; 2310 DELAY(1); 2311 } 2312 2313 aprint_error_dev(sc->sc_dev, "could not read from BBP\n"); 2314 return 0; 2315 } 2316 2317 static void 2318 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2319 { 2320 uint32_t tmp; 2321 int ntries; 2322 2323 for (ntries = 0; ntries < 100; ntries++) { 2324 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2325 break; 2326 DELAY(1); 2327 } 2328 if (ntries == 100) { 2329 aprint_error_dev(sc->sc_dev, "could not write to RF\n"); 2330 return; 2331 } 2332 2333 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2334 (reg & 0x3); 2335 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2336 2337 /* remember last written value in sc */ 2338 sc->rf_regs[reg] = val; 2339 2340 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2341 } 2342 2343 static void 2344 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2345 { 2346 struct ieee80211com *ic = &sc->sc_ic; 2347 uint8_t power, tmp; 2348 u_int i, chan; 2349 2350 chan = ieee80211_chan2ieee(ic, c); 2351 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2352 return; 2353 2354 if (IEEE80211_IS_CHAN_2GHZ(c)) 2355 power = min(sc->txpow[chan - 1], 31); 2356 else 2357 power = 31; 2358 2359 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2360 2361 switch (sc->rf_rev) { 2362 case RT2560_RF_2522: 2363 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2364 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2365 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2366 break; 2367 2368 case RT2560_RF_2523: 2369 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2370 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2371 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2372 rt2560_rf_write(sc, RT2560_RF4, 2373 (chan == 14) ? 0x00280 : 0x00286); 2374 break; 2375 2376 case RT2560_RF_2524: 2377 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2378 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2379 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2380 rt2560_rf_write(sc, RT2560_RF4, 2381 (chan == 14) ? 0x00280 : 0x00286); 2382 break; 2383 2384 case RT2560_RF_2525: 2385 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2386 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2387 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2388 rt2560_rf_write(sc, RT2560_RF4, 2389 (chan == 14) ? 0x00280 : 0x00286); 2390 2391 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2392 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2393 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2394 rt2560_rf_write(sc, RT2560_RF4, 2395 (chan == 14) ? 0x00280 : 0x00286); 2396 break; 2397 2398 case RT2560_RF_2525E: 2399 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2400 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2401 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2402 rt2560_rf_write(sc, RT2560_RF4, 2403 (chan == 14) ? 0x00286 : 0x00282); 2404 break; 2405 2406 case RT2560_RF_2526: 2407 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2408 rt2560_rf_write(sc, RT2560_RF4, 2409 (chan & 1) ? 0x00386 : 0x00381); 2410 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2411 2412 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2413 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2414 rt2560_rf_write(sc, RT2560_RF4, 2415 (chan & 1) ? 0x00386 : 0x00381); 2416 break; 2417 2418 /* dual-band RF */ 2419 case RT2560_RF_5222: 2420 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2421 2422 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2423 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2424 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2425 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2426 break; 2427 } 2428 2429 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2430 ic->ic_state != IEEE80211_S_SCAN) { 2431 /* set Japan filter bit for channel 14 */ 2432 tmp = rt2560_bbp_read(sc, 70); 2433 2434 tmp &= ~RT2560_JAPAN_FILTER; 2435 if (chan == 14) 2436 tmp |= RT2560_JAPAN_FILTER; 2437 2438 rt2560_bbp_write(sc, 70, tmp); 2439 2440 DELAY(1000); /* RF needs a 1ms delay here */ 2441 rt2560_disable_rf_tune(sc); 2442 2443 /* clear CRC errors */ 2444 RAL_READ(sc, RT2560_CNT0); 2445 } 2446 } 2447 2448 /* 2449 * Disable RF auto-tuning. 2450 */ 2451 static void 2452 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2453 { 2454 uint32_t tmp; 2455 2456 if (sc->rf_rev != RT2560_RF_2523) { 2457 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2458 rt2560_rf_write(sc, RT2560_RF1, tmp); 2459 } 2460 2461 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2462 rt2560_rf_write(sc, RT2560_RF3, tmp); 2463 2464 DPRINTFN(2, ("disabling RF autotune\n")); 2465 } 2466 2467 /* 2468 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2469 * synchronization. 2470 */ 2471 static void 2472 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2473 { 2474 struct ieee80211com *ic = &sc->sc_ic; 2475 uint16_t logcwmin, preload; 2476 uint32_t tmp; 2477 2478 /* first, disable TSF synchronization */ 2479 RAL_WRITE(sc, RT2560_CSR14, 0); 2480 2481 tmp = 16 * ic->ic_bss->ni_intval; 2482 RAL_WRITE(sc, RT2560_CSR12, tmp); 2483 2484 RAL_WRITE(sc, RT2560_CSR13, 0); 2485 2486 logcwmin = 5; 2487 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2488 tmp = logcwmin << 16 | preload; 2489 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2490 2491 /* finally, enable TSF synchronization */ 2492 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2493 if (ic->ic_opmode == IEEE80211_M_STA) 2494 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2495 else 2496 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2497 RT2560_ENABLE_BEACON_GENERATOR; 2498 RAL_WRITE(sc, RT2560_CSR14, tmp); 2499 2500 DPRINTF(("enabling TSF synchronization\n")); 2501 } 2502 2503 static void 2504 rt2560_update_plcp(struct rt2560_softc *sc) 2505 { 2506 struct ieee80211com *ic = &sc->sc_ic; 2507 2508 /* no short preamble for 1Mbps */ 2509 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2510 2511 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2512 /* values taken from the reference driver */ 2513 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2514 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2515 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2516 } else { 2517 /* same values as above or'ed 0x8 */ 2518 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2519 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2520 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2521 } 2522 2523 DPRINTF(("updating PLCP for %s preamble\n", 2524 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2525 } 2526 2527 /* 2528 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2529 * know how these values are computed. 2530 */ 2531 static void 2532 rt2560_update_slot(struct ifnet *ifp) 2533 { 2534 struct rt2560_softc *sc = ifp->if_softc; 2535 struct ieee80211com *ic = &sc->sc_ic; 2536 uint8_t slottime; 2537 uint16_t sifs, pifs, difs, eifs; 2538 uint32_t tmp; 2539 2540 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2541 2542 /* define the MAC slot boundaries */ 2543 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2544 pifs = sifs + slottime; 2545 difs = sifs + 2 * slottime; 2546 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2547 2548 tmp = RAL_READ(sc, RT2560_CSR11); 2549 tmp = (tmp & ~0x1f00) | slottime << 8; 2550 RAL_WRITE(sc, RT2560_CSR11, tmp); 2551 2552 tmp = pifs << 16 | sifs; 2553 RAL_WRITE(sc, RT2560_CSR18, tmp); 2554 2555 tmp = eifs << 16 | difs; 2556 RAL_WRITE(sc, RT2560_CSR19, tmp); 2557 2558 DPRINTF(("setting slottime to %uus\n", slottime)); 2559 } 2560 2561 static void 2562 rt2560_set_basicrates(struct rt2560_softc *sc) 2563 { 2564 struct ieee80211com *ic = &sc->sc_ic; 2565 2566 /* update basic rate set */ 2567 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2568 /* 11b basic rates: 1, 2Mbps */ 2569 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2570 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2571 /* 11a basic rates: 6, 12, 24Mbps */ 2572 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2573 } else { 2574 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2575 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2576 } 2577 } 2578 2579 static void 2580 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2581 { 2582 uint32_t tmp; 2583 2584 /* set ON period to 70ms and OFF period to 30ms */ 2585 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2586 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2587 } 2588 2589 static void 2590 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2591 { 2592 uint32_t tmp; 2593 2594 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2595 RAL_WRITE(sc, RT2560_CSR5, tmp); 2596 2597 tmp = bssid[4] | bssid[5] << 8; 2598 RAL_WRITE(sc, RT2560_CSR6, tmp); 2599 2600 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2601 } 2602 2603 static void 2604 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2605 { 2606 uint32_t tmp; 2607 2608 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2609 RAL_WRITE(sc, RT2560_CSR3, tmp); 2610 2611 tmp = addr[4] | addr[5] << 8; 2612 RAL_WRITE(sc, RT2560_CSR4, tmp); 2613 2614 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2615 } 2616 2617 static void 2618 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2619 { 2620 uint32_t tmp; 2621 2622 tmp = RAL_READ(sc, RT2560_CSR3); 2623 addr[0] = tmp & 0xff; 2624 addr[1] = (tmp >> 8) & 0xff; 2625 addr[2] = (tmp >> 16) & 0xff; 2626 addr[3] = (tmp >> 24); 2627 2628 tmp = RAL_READ(sc, RT2560_CSR4); 2629 addr[4] = tmp & 0xff; 2630 addr[5] = (tmp >> 8) & 0xff; 2631 } 2632 2633 static void 2634 rt2560_update_promisc(struct rt2560_softc *sc) 2635 { 2636 struct ifnet *ifp = &sc->sc_if; 2637 uint32_t tmp; 2638 2639 tmp = RAL_READ(sc, RT2560_RXCSR0); 2640 2641 tmp &= ~RT2560_DROP_NOT_TO_ME; 2642 if (!(ifp->if_flags & IFF_PROMISC)) 2643 tmp |= RT2560_DROP_NOT_TO_ME; 2644 2645 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2646 2647 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2648 "entering" : "leaving")); 2649 } 2650 2651 static void 2652 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2653 { 2654 uint32_t tmp; 2655 uint8_t tx; 2656 2657 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2658 if (antenna == 1) 2659 tx |= RT2560_BBP_ANTA; 2660 else if (antenna == 2) 2661 tx |= RT2560_BBP_ANTB; 2662 else 2663 tx |= RT2560_BBP_DIVERSITY; 2664 2665 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2666 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2667 sc->rf_rev == RT2560_RF_5222) 2668 tx |= RT2560_BBP_FLIPIQ; 2669 2670 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2671 2672 /* update values for CCK and OFDM in BBPCSR1 */ 2673 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2674 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2675 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2676 } 2677 2678 static void 2679 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2680 { 2681 uint8_t rx; 2682 2683 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2684 if (antenna == 1) 2685 rx |= RT2560_BBP_ANTA; 2686 else if (antenna == 2) 2687 rx |= RT2560_BBP_ANTB; 2688 else 2689 rx |= RT2560_BBP_DIVERSITY; 2690 2691 /* need to force no I/Q flip for RF 2525e and 2526 */ 2692 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2693 rx &= ~RT2560_BBP_FLIPIQ; 2694 2695 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2696 } 2697 2698 static const char * 2699 rt2560_get_rf(int rev) 2700 { 2701 switch (rev) { 2702 case RT2560_RF_2522: return "RT2522"; 2703 case RT2560_RF_2523: return "RT2523"; 2704 case RT2560_RF_2524: return "RT2524"; 2705 case RT2560_RF_2525: return "RT2525"; 2706 case RT2560_RF_2525E: return "RT2525e"; 2707 case RT2560_RF_2526: return "RT2526"; 2708 case RT2560_RF_5222: return "RT5222"; 2709 default: return "unknown"; 2710 } 2711 } 2712 2713 static void 2714 rt2560_read_eeprom(struct rt2560_softc *sc) 2715 { 2716 uint16_t val; 2717 int i; 2718 2719 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2720 sc->rf_rev = (val >> 11) & 0x1f; 2721 sc->hw_radio = (val >> 10) & 0x1; 2722 sc->led_mode = (val >> 6) & 0x7; 2723 sc->rx_ant = (val >> 4) & 0x3; 2724 sc->tx_ant = (val >> 2) & 0x3; 2725 sc->nb_ant = val & 0x3; 2726 2727 /* read default values for BBP registers */ 2728 for (i = 0; i < 16; i++) { 2729 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2730 sc->bbp_prom[i].reg = val >> 8; 2731 sc->bbp_prom[i].val = val & 0xff; 2732 } 2733 2734 /* read Tx power for all b/g channels */ 2735 for (i = 0; i < 14 / 2; i++) { 2736 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2737 sc->txpow[i * 2] = val >> 8; 2738 sc->txpow[i * 2 + 1] = val & 0xff; 2739 } 2740 } 2741 2742 static int 2743 rt2560_bbp_init(struct rt2560_softc *sc) 2744 { 2745 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2746 int i, ntries; 2747 2748 /* wait for BBP to be ready */ 2749 for (ntries = 0; ntries < 100; ntries++) { 2750 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2751 break; 2752 DELAY(1); 2753 } 2754 if (ntries == 100) { 2755 aprint_error_dev(sc->sc_dev, "timeout waiting for BBP\n"); 2756 return EIO; 2757 } 2758 2759 /* initialize BBP registers to default values */ 2760 for (i = 0; i < N(rt2560_def_bbp); i++) { 2761 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2762 rt2560_def_bbp[i].val); 2763 } 2764 #if 0 2765 /* initialize BBP registers to values stored in EEPROM */ 2766 for (i = 0; i < 16; i++) { 2767 if (sc->bbp_prom[i].reg == 0xff) 2768 continue; 2769 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2770 } 2771 #endif 2772 2773 return 0; 2774 #undef N 2775 } 2776 2777 static int 2778 rt2560_init(struct ifnet *ifp) 2779 { 2780 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2781 struct rt2560_softc *sc = ifp->if_softc; 2782 struct ieee80211com *ic = &sc->sc_ic; 2783 uint32_t tmp; 2784 int i; 2785 2786 /* for CardBus, power on the socket */ 2787 if (!(sc->sc_flags & RT2560_ENABLED)) { 2788 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2789 aprint_error_dev(sc->sc_dev, "could not enable device\n"); 2790 return EIO; 2791 } 2792 sc->sc_flags |= RT2560_ENABLED; 2793 } 2794 2795 rt2560_stop(ifp, 1); 2796 2797 /* setup tx rings */ 2798 tmp = RT2560_PRIO_RING_COUNT << 24 | 2799 RT2560_ATIM_RING_COUNT << 16 | 2800 RT2560_TX_RING_COUNT << 8 | 2801 RT2560_TX_DESC_SIZE; 2802 2803 /* rings _must_ be initialized in this _exact_ order! */ 2804 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2805 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2806 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2807 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2808 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2809 2810 /* setup rx ring */ 2811 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2812 2813 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2814 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2815 2816 /* initialize MAC registers to default values */ 2817 for (i = 0; i < N(rt2560_def_mac); i++) 2818 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2819 2820 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2821 rt2560_set_macaddr(sc, ic->ic_myaddr); 2822 2823 /* set basic rate set (will be updated later) */ 2824 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2825 2826 rt2560_update_slot(ifp); 2827 rt2560_update_plcp(sc); 2828 rt2560_update_led(sc, 0, 0); 2829 2830 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2831 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2832 2833 if (rt2560_bbp_init(sc) != 0) { 2834 rt2560_stop(ifp, 1); 2835 return EIO; 2836 } 2837 2838 rt2560_set_txantenna(sc, 1); 2839 rt2560_set_rxantenna(sc, 1); 2840 2841 /* set default BSS channel */ 2842 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2843 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2844 2845 /* kick Rx */ 2846 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2847 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2848 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2849 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2850 tmp |= RT2560_DROP_TODS; 2851 if (!(ifp->if_flags & IFF_PROMISC)) 2852 tmp |= RT2560_DROP_NOT_TO_ME; 2853 } 2854 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2855 2856 /* clear old FCS and Rx FIFO errors */ 2857 RAL_READ(sc, RT2560_CNT0); 2858 RAL_READ(sc, RT2560_CNT4); 2859 2860 /* clear any pending interrupts */ 2861 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2862 2863 /* enable interrupts */ 2864 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2865 2866 ifp->if_flags &= ~IFF_OACTIVE; 2867 ifp->if_flags |= IFF_RUNNING; 2868 2869 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2870 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2871 else 2872 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2873 2874 return 0; 2875 #undef N 2876 } 2877 2878 static void 2879 rt2560_stop(struct ifnet *ifp, int disable) 2880 { 2881 struct rt2560_softc *sc = ifp->if_softc; 2882 struct ieee80211com *ic = &sc->sc_ic; 2883 2884 sc->sc_tx_timer = 0; 2885 ifp->if_timer = 0; 2886 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2887 2888 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2889 2890 /* abort Tx */ 2891 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2892 2893 /* disable Rx */ 2894 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2895 2896 /* reset ASIC (and thus, BBP) */ 2897 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2898 RAL_WRITE(sc, RT2560_CSR1, 0); 2899 2900 /* disable interrupts */ 2901 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2902 2903 /* clear any pending interrupt */ 2904 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2905 2906 /* reset Tx and Rx rings */ 2907 rt2560_reset_tx_ring(sc, &sc->txq); 2908 rt2560_reset_tx_ring(sc, &sc->atimq); 2909 rt2560_reset_tx_ring(sc, &sc->prioq); 2910 rt2560_reset_tx_ring(sc, &sc->bcnq); 2911 rt2560_reset_rx_ring(sc, &sc->rxq); 2912 } 2913
Indexes created Mon Oct 20 08:09:54 GMT 2025