rt2560.c revision 1.8.2.3
1 /* $NetBSD: rt2560.c,v 1.8.2.3 2007/10/23 20:07:40 ad Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini (at) free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.8.2.3 2007/10/23 20:07:40 ad Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/callout.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <sys/bus.h> 43 #include <machine/endian.h> 44 #include <sys/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 #include <net/if_ether.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_rssadapt.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/ic/rt2560reg.h> 66 #include <dev/ic/rt2560var.h> 67 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcivar.h> 70 #include <dev/pci/pcidevs.h> 71 72 #ifdef RAL_DEBUG 73 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 74 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 75 int rt2560_debug = 0; 76 #else 77 #define DPRINTF(x) 78 #define DPRINTFN(n, x) 79 #endif 80 81 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 82 struct rt2560_tx_ring *, int); 83 static void rt2560_reset_tx_ring(struct rt2560_softc *, 84 struct rt2560_tx_ring *); 85 static void rt2560_free_tx_ring(struct rt2560_softc *, 86 struct rt2560_tx_ring *); 87 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 88 struct rt2560_rx_ring *, int); 89 static void rt2560_reset_rx_ring(struct rt2560_softc *, 90 struct rt2560_rx_ring *); 91 static void rt2560_free_rx_ring(struct rt2560_softc *, 92 struct rt2560_rx_ring *); 93 static struct ieee80211_node * 94 rt2560_node_alloc(struct ieee80211_node_table *); 95 static int rt2560_media_change(struct ifnet *); 96 static void rt2560_next_scan(void *); 97 static void rt2560_iter_func(void *, struct ieee80211_node *); 98 static void rt2560_update_rssadapt(void *); 99 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 100 int); 101 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 102 static void rt2560_encryption_intr(struct rt2560_softc *); 103 static void rt2560_tx_intr(struct rt2560_softc *); 104 static void rt2560_prio_intr(struct rt2560_softc *); 105 static void rt2560_decryption_intr(struct rt2560_softc *); 106 static void rt2560_rx_intr(struct rt2560_softc *); 107 static void rt2560_beacon_expire(struct rt2560_softc *); 108 static void rt2560_wakeup_expire(struct rt2560_softc *); 109 #if NBPFILTER > 0 110 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 111 #endif 112 static int rt2560_ack_rate(struct ieee80211com *, int); 113 static uint16_t rt2560_txtime(int, int, uint32_t); 114 static uint8_t rt2560_plcp_signal(int); 115 static void rt2560_setup_tx_desc(struct rt2560_softc *, 116 struct rt2560_tx_desc *, uint32_t, int, int, int, 117 bus_addr_t); 118 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 123 struct ieee80211_frame *, uint16_t); 124 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 125 struct ieee80211_node *); 126 static void rt2560_start(struct ifnet *); 127 static void rt2560_watchdog(struct ifnet *); 128 static int rt2560_reset(struct ifnet *); 129 static int rt2560_ioctl(struct ifnet *, u_long, void *); 130 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 131 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 132 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 133 static void rt2560_set_chan(struct rt2560_softc *, 134 struct ieee80211_channel *); 135 static void rt2560_disable_rf_tune(struct rt2560_softc *); 136 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 137 static void rt2560_update_plcp(struct rt2560_softc *); 138 static void rt2560_update_slot(struct ifnet *); 139 static void rt2560_set_basicrates(struct rt2560_softc *); 140 static void rt2560_update_led(struct rt2560_softc *, int, int); 141 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 142 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 143 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 144 static void rt2560_update_promisc(struct rt2560_softc *); 145 static void rt2560_set_txantenna(struct rt2560_softc *, int); 146 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 147 static const char *rt2560_get_rf(int); 148 static void rt2560_read_eeprom(struct rt2560_softc *); 149 static int rt2560_bbp_init(struct rt2560_softc *); 150 static int rt2560_init(struct ifnet *); 151 static void rt2560_stop(void *); 152 static void rt2560_powerhook(int, void *); 153 154 /* 155 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 156 */ 157 static const struct ieee80211_rateset rt2560_rateset_11a = 158 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 159 160 static const struct ieee80211_rateset rt2560_rateset_11b = 161 { 4, { 2, 4, 11, 22 } }; 162 163 static const struct ieee80211_rateset rt2560_rateset_11g = 164 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 165 166 /* 167 * Default values for MAC registers; values taken from the reference driver. 168 */ 169 static const struct { 170 uint32_t reg; 171 uint32_t val; 172 } rt2560_def_mac[] = { 173 { RT2560_PSCSR0, 0x00020002 }, 174 { RT2560_PSCSR1, 0x00000002 }, 175 { RT2560_PSCSR2, 0x00020002 }, 176 { RT2560_PSCSR3, 0x00000002 }, 177 { RT2560_TIMECSR, 0x00003f21 }, 178 { RT2560_CSR9, 0x00000780 }, 179 { RT2560_CSR11, 0x07041483 }, 180 { RT2560_CNT3, 0x00000000 }, 181 { RT2560_TXCSR1, 0x07614562 }, 182 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 183 { RT2560_ACKPCTCSR, 0x7038140a }, 184 { RT2560_ARTCSR1, 0x1d21252d }, 185 { RT2560_ARTCSR2, 0x1919191d }, 186 { RT2560_RXCSR0, 0xffffffff }, 187 { RT2560_RXCSR3, 0xb3aab3af }, 188 { RT2560_PCICSR, 0x000003b8 }, 189 { RT2560_PWRCSR0, 0x3f3b3100 }, 190 { RT2560_GPIOCSR, 0x0000ff00 }, 191 { RT2560_TESTCSR, 0x000000f0 }, 192 { RT2560_PWRCSR1, 0x000001ff }, 193 { RT2560_MACCSR0, 0x00213223 }, 194 { RT2560_MACCSR1, 0x00235518 }, 195 { RT2560_RLPWCSR, 0x00000040 }, 196 { RT2560_RALINKCSR, 0x9a009a11 }, 197 { RT2560_CSR7, 0xffffffff }, 198 { RT2560_BBPCSR1, 0x82188200 }, 199 { RT2560_TXACKCSR0, 0x00000020 }, 200 { RT2560_SECCSR3, 0x0000e78f } 201 }; 202 203 /* 204 * Default values for BBP registers; values taken from the reference driver. 205 */ 206 static const struct { 207 uint8_t reg; 208 uint8_t val; 209 } rt2560_def_bbp[] = { 210 { 3, 0x02 }, 211 { 4, 0x19 }, 212 { 14, 0x1c }, 213 { 15, 0x30 }, 214 { 16, 0xac }, 215 { 17, 0x48 }, 216 { 18, 0x18 }, 217 { 19, 0xff }, 218 { 20, 0x1e }, 219 { 21, 0x08 }, 220 { 22, 0x08 }, 221 { 23, 0x08 }, 222 { 24, 0x80 }, 223 { 25, 0x50 }, 224 { 26, 0x08 }, 225 { 27, 0x23 }, 226 { 30, 0x10 }, 227 { 31, 0x2b }, 228 { 32, 0xb9 }, 229 { 34, 0x12 }, 230 { 35, 0x50 }, 231 { 39, 0xc4 }, 232 { 40, 0x02 }, 233 { 41, 0x60 }, 234 { 53, 0x10 }, 235 { 54, 0x18 }, 236 { 56, 0x08 }, 237 { 57, 0x10 }, 238 { 58, 0x08 }, 239 { 61, 0x60 }, 240 { 62, 0x10 }, 241 { 75, 0xff } 242 }; 243 244 /* 245 * Default values for RF register R2 indexed by channel numbers; values taken 246 * from the reference driver. 247 */ 248 static const uint32_t rt2560_rf2522_r2[] = { 249 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 250 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 251 }; 252 253 static const uint32_t rt2560_rf2523_r2[] = { 254 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 255 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 256 }; 257 258 static const uint32_t rt2560_rf2524_r2[] = { 259 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 260 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 261 }; 262 263 static const uint32_t rt2560_rf2525_r2[] = { 264 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 265 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 266 }; 267 268 static const uint32_t rt2560_rf2525_hi_r2[] = { 269 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 270 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 271 }; 272 273 static const uint32_t rt2560_rf2525e_r2[] = { 274 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 275 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 276 }; 277 278 static const uint32_t rt2560_rf2526_hi_r2[] = { 279 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 280 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 281 }; 282 283 static const uint32_t rt2560_rf2526_r2[] = { 284 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 285 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 286 }; 287 288 /* 289 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 290 * values taken from the reference driver. 291 */ 292 static const struct { 293 uint8_t chan; 294 uint32_t r1; 295 uint32_t r2; 296 uint32_t r4; 297 } rt2560_rf5222[] = { 298 { 1, 0x08808, 0x0044d, 0x00282 }, 299 { 2, 0x08808, 0x0044e, 0x00282 }, 300 { 3, 0x08808, 0x0044f, 0x00282 }, 301 { 4, 0x08808, 0x00460, 0x00282 }, 302 { 5, 0x08808, 0x00461, 0x00282 }, 303 { 6, 0x08808, 0x00462, 0x00282 }, 304 { 7, 0x08808, 0x00463, 0x00282 }, 305 { 8, 0x08808, 0x00464, 0x00282 }, 306 { 9, 0x08808, 0x00465, 0x00282 }, 307 { 10, 0x08808, 0x00466, 0x00282 }, 308 { 11, 0x08808, 0x00467, 0x00282 }, 309 { 12, 0x08808, 0x00468, 0x00282 }, 310 { 13, 0x08808, 0x00469, 0x00282 }, 311 { 14, 0x08808, 0x0046b, 0x00286 }, 312 313 { 36, 0x08804, 0x06225, 0x00287 }, 314 { 40, 0x08804, 0x06226, 0x00287 }, 315 { 44, 0x08804, 0x06227, 0x00287 }, 316 { 48, 0x08804, 0x06228, 0x00287 }, 317 { 52, 0x08804, 0x06229, 0x00287 }, 318 { 56, 0x08804, 0x0622a, 0x00287 }, 319 { 60, 0x08804, 0x0622b, 0x00287 }, 320 { 64, 0x08804, 0x0622c, 0x00287 }, 321 322 { 100, 0x08804, 0x02200, 0x00283 }, 323 { 104, 0x08804, 0x02201, 0x00283 }, 324 { 108, 0x08804, 0x02202, 0x00283 }, 325 { 112, 0x08804, 0x02203, 0x00283 }, 326 { 116, 0x08804, 0x02204, 0x00283 }, 327 { 120, 0x08804, 0x02205, 0x00283 }, 328 { 124, 0x08804, 0x02206, 0x00283 }, 329 { 128, 0x08804, 0x02207, 0x00283 }, 330 { 132, 0x08804, 0x02208, 0x00283 }, 331 { 136, 0x08804, 0x02209, 0x00283 }, 332 { 140, 0x08804, 0x0220a, 0x00283 }, 333 334 { 149, 0x08808, 0x02429, 0x00281 }, 335 { 153, 0x08808, 0x0242b, 0x00281 }, 336 { 157, 0x08808, 0x0242d, 0x00281 }, 337 { 161, 0x08808, 0x0242f, 0x00281 } 338 }; 339 340 int 341 rt2560_attach(void *xsc, int id) 342 { 343 struct rt2560_softc *sc = xsc; 344 struct ieee80211com *ic = &sc->sc_ic; 345 struct ifnet *ifp = &sc->sc_if; 346 int error, i; 347 348 callout_init(&sc->scan_ch, 0); 349 callout_init(&sc->rssadapt_ch, 0); 350 351 /* retrieve RT2560 rev. no */ 352 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 353 354 /* retrieve MAC address */ 355 rt2560_get_macaddr(sc, ic->ic_myaddr); 356 357 aprint_normal("%s: 802.11 address %s\n", sc->sc_dev.dv_xname, 358 ether_sprintf(ic->ic_myaddr)); 359 360 /* retrieve RF rev. no and various other things from EEPROM */ 361 rt2560_read_eeprom(sc); 362 363 aprint_normal("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 364 sc->sc_dev.dv_xname, sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 365 366 /* 367 * Allocate Tx and Rx rings. 368 */ 369 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 370 if (error != 0) { 371 aprint_error("%s: could not allocate Tx ring\n)", 372 sc->sc_dev.dv_xname); 373 goto fail1; 374 } 375 376 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 377 if (error != 0) { 378 aprint_error("%s: could not allocate ATIM ring\n", 379 sc->sc_dev.dv_xname); 380 goto fail2; 381 } 382 383 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 384 if (error != 0) { 385 aprint_error("%s: could not allocate Prio ring\n", 386 sc->sc_dev.dv_xname); 387 goto fail3; 388 } 389 390 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 391 if (error != 0) { 392 aprint_error("%s: could not allocate Beacon ring\n", 393 sc->sc_dev.dv_xname); 394 goto fail4; 395 } 396 397 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 398 if (error != 0) { 399 aprint_error("%s: could not allocate Rx ring\n", 400 sc->sc_dev.dv_xname); 401 goto fail5; 402 } 403 404 sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname, 405 rt2560_powerhook, sc); 406 if (sc->sc_powerhook == NULL) 407 aprint_error("%s: can't establish powerhook\n", 408 sc->sc_dev.dv_xname); 409 sc->sc_suspend = PWR_RESUME; 410 411 ifp->if_softc = sc; 412 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 413 ifp->if_init = rt2560_init; 414 ifp->if_ioctl = rt2560_ioctl; 415 ifp->if_start = rt2560_start; 416 ifp->if_watchdog = rt2560_watchdog; 417 IFQ_SET_READY(&ifp->if_snd); 418 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 419 420 ic->ic_ifp = ifp; 421 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 422 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 423 ic->ic_state = IEEE80211_S_INIT; 424 425 /* set device capabilities */ 426 ic->ic_caps = 427 IEEE80211_C_IBSS | /* IBSS mode supported */ 428 IEEE80211_C_MONITOR | /* monitor mode supported */ 429 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 430 IEEE80211_C_TXPMGT | /* tx power management */ 431 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 432 IEEE80211_C_SHSLOT | /* short slot time supported */ 433 IEEE80211_C_WPA; /* 802.11i */ 434 435 if (sc->rf_rev == RT2560_RF_5222) { 436 /* set supported .11a rates */ 437 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 438 439 /* set supported .11a channels */ 440 for (i = 36; i <= 64; i += 4) { 441 ic->ic_channels[i].ic_freq = 442 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 443 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 444 } 445 for (i = 100; i <= 140; i += 4) { 446 ic->ic_channels[i].ic_freq = 447 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 448 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 449 } 450 for (i = 149; i <= 161; i += 4) { 451 ic->ic_channels[i].ic_freq = 452 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 453 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 454 } 455 } 456 457 /* set supported .11b and .11g rates */ 458 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 459 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 460 461 /* set supported .11b and .11g channels (1 through 14) */ 462 for (i = 1; i <= 14; i++) { 463 ic->ic_channels[i].ic_freq = 464 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 465 ic->ic_channels[i].ic_flags = 466 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 467 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 468 } 469 470 if_attach(ifp); 471 ieee80211_ifattach(ic); 472 ic->ic_node_alloc = rt2560_node_alloc; 473 ic->ic_updateslot = rt2560_update_slot; 474 ic->ic_reset = rt2560_reset; 475 476 /* override state transition machine */ 477 sc->sc_newstate = ic->ic_newstate; 478 ic->ic_newstate = rt2560_newstate; 479 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 480 481 #if NBPFILTER > 0 482 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 483 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 484 #endif 485 486 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 487 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 488 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 489 490 sc->sc_txtap_len = sizeof sc->sc_txtapu; 491 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 492 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 493 494 495 sc->dwelltime = 200; 496 497 ieee80211_announce(ic); 498 499 return 0; 500 501 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 502 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 503 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 504 fail2: rt2560_free_tx_ring(sc, &sc->txq); 505 fail1: 506 return ENXIO; 507 } 508 509 510 int 511 rt2560_detach(void *xsc) 512 { 513 struct rt2560_softc *sc = xsc; 514 struct ifnet *ifp = &sc->sc_if; 515 516 callout_stop(&sc->scan_ch); 517 callout_stop(&sc->rssadapt_ch); 518 519 if (sc->sc_powerhook != NULL) 520 powerhook_disestablish(sc->sc_powerhook); 521 522 rt2560_stop(sc); 523 524 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 525 if_detach(ifp); 526 527 rt2560_free_tx_ring(sc, &sc->txq); 528 rt2560_free_tx_ring(sc, &sc->atimq); 529 rt2560_free_tx_ring(sc, &sc->prioq); 530 rt2560_free_tx_ring(sc, &sc->bcnq); 531 rt2560_free_rx_ring(sc, &sc->rxq); 532 533 return 0; 534 } 535 536 int 537 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 538 int count) 539 { 540 int i, nsegs, error; 541 542 ring->count = count; 543 ring->queued = 0; 544 ring->cur = ring->next = 0; 545 ring->cur_encrypt = ring->next_encrypt = 0; 546 547 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 548 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 549 if (error != 0) { 550 printf("%s: could not create desc DMA map\n", 551 sc->sc_dev.dv_xname); 552 goto fail; 553 } 554 555 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 556 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 557 if (error != 0) { 558 printf("%s: could not allocate DMA memory\n", 559 sc->sc_dev.dv_xname); 560 goto fail; 561 } 562 563 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 564 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 565 BUS_DMA_NOWAIT); 566 if (error != 0) { 567 printf("%s: could not map desc DMA memory\n", 568 sc->sc_dev.dv_xname); 569 goto fail; 570 } 571 572 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 573 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 574 if (error != 0) { 575 printf("%s: could not load desc DMA map\n", 576 sc->sc_dev.dv_xname); 577 goto fail; 578 } 579 580 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 581 ring->physaddr = ring->map->dm_segs->ds_addr; 582 583 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 584 M_NOWAIT); 585 if (ring->data == NULL) { 586 printf("%s: could not allocate soft data\n", 587 sc->sc_dev.dv_xname); 588 error = ENOMEM; 589 goto fail; 590 } 591 592 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 593 for (i = 0; i < count; i++) { 594 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 595 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 596 &ring->data[i].map); 597 if (error != 0) { 598 printf("%s: could not create DMA map\n", 599 sc->sc_dev.dv_xname); 600 goto fail; 601 } 602 } 603 604 return 0; 605 606 fail: rt2560_free_tx_ring(sc, ring); 607 return error; 608 } 609 610 void 611 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 612 { 613 struct rt2560_tx_desc *desc; 614 struct rt2560_tx_data *data; 615 int i; 616 617 for (i = 0; i < ring->count; i++) { 618 desc = &ring->desc[i]; 619 data = &ring->data[i]; 620 621 if (data->m != NULL) { 622 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 623 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 624 bus_dmamap_unload(sc->sc_dmat, data->map); 625 m_freem(data->m); 626 data->m = NULL; 627 } 628 629 if (data->ni != NULL) { 630 ieee80211_free_node(data->ni); 631 data->ni = NULL; 632 } 633 634 desc->flags = 0; 635 } 636 637 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 638 BUS_DMASYNC_PREWRITE); 639 640 ring->queued = 0; 641 ring->cur = ring->next = 0; 642 ring->cur_encrypt = ring->next_encrypt = 0; 643 } 644 645 void 646 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 647 { 648 struct rt2560_tx_data *data; 649 int i; 650 651 if (ring->desc != NULL) { 652 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 653 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 654 bus_dmamap_unload(sc->sc_dmat, ring->map); 655 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 656 ring->count * RT2560_TX_DESC_SIZE); 657 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 658 } 659 660 if (ring->data != NULL) { 661 for (i = 0; i < ring->count; i++) { 662 data = &ring->data[i]; 663 664 if (data->m != NULL) { 665 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 666 data->map->dm_mapsize, 667 BUS_DMASYNC_POSTWRITE); 668 bus_dmamap_unload(sc->sc_dmat, data->map); 669 m_freem(data->m); 670 } 671 672 if (data->ni != NULL) 673 ieee80211_free_node(data->ni); 674 675 676 if (data->map != NULL) 677 bus_dmamap_destroy(sc->sc_dmat, data->map); 678 } 679 free(ring->data, M_DEVBUF); 680 } 681 } 682 683 int 684 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 685 int count) 686 { 687 struct rt2560_rx_desc *desc; 688 struct rt2560_rx_data *data; 689 int i, nsegs, error; 690 691 ring->count = count; 692 ring->cur = ring->next = 0; 693 ring->cur_decrypt = 0; 694 695 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 696 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 697 if (error != 0) { 698 printf("%s: could not create desc DMA map\n", 699 sc->sc_dev.dv_xname); 700 goto fail; 701 } 702 703 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 704 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 705 if (error != 0) { 706 printf("%s: could not allocate DMA memory\n", 707 sc->sc_dev.dv_xname); 708 goto fail; 709 } 710 711 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 712 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 713 BUS_DMA_NOWAIT); 714 if (error != 0) { 715 printf("%s: could not map desc DMA memory\n", 716 sc->sc_dev.dv_xname); 717 goto fail; 718 } 719 720 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 721 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 722 if (error != 0) { 723 printf("%s: could not load desc DMA map\n", 724 sc->sc_dev.dv_xname); 725 goto fail; 726 } 727 728 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 729 ring->physaddr = ring->map->dm_segs->ds_addr; 730 731 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 732 M_NOWAIT); 733 if (ring->data == NULL) { 734 printf("%s: could not allocate soft data\n", 735 sc->sc_dev.dv_xname); 736 error = ENOMEM; 737 goto fail; 738 } 739 740 /* 741 * Pre-allocate Rx buffers and populate Rx ring. 742 */ 743 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 744 for (i = 0; i < count; i++) { 745 desc = &sc->rxq.desc[i]; 746 data = &sc->rxq.data[i]; 747 748 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 749 0, BUS_DMA_NOWAIT, &data->map); 750 if (error != 0) { 751 printf("%s: could not create DMA map\n", 752 sc->sc_dev.dv_xname); 753 goto fail; 754 } 755 756 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 757 if (data->m == NULL) { 758 printf("%s: could not allocate rx mbuf\n", 759 sc->sc_dev.dv_xname); 760 error = ENOMEM; 761 goto fail; 762 } 763 764 MCLGET(data->m, M_DONTWAIT); 765 if (!(data->m->m_flags & M_EXT)) { 766 printf("%s: could not allocate rx mbuf cluster\n", 767 sc->sc_dev.dv_xname); 768 error = ENOMEM; 769 goto fail; 770 } 771 772 error = bus_dmamap_load(sc->sc_dmat, data->map, 773 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 774 if (error != 0) { 775 printf("%s: could not load rx buf DMA map", 776 sc->sc_dev.dv_xname); 777 goto fail; 778 } 779 780 desc->flags = htole32(RT2560_RX_BUSY); 781 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 782 } 783 784 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 785 BUS_DMASYNC_PREWRITE); 786 787 return 0; 788 789 fail: rt2560_free_rx_ring(sc, ring); 790 return error; 791 } 792 793 void 794 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 795 { 796 int i; 797 798 for (i = 0; i < ring->count; i++) { 799 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 800 ring->data[i].drop = 0; 801 } 802 803 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 804 BUS_DMASYNC_PREWRITE); 805 806 ring->cur = ring->next = 0; 807 ring->cur_decrypt = 0; 808 } 809 810 void 811 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 812 { 813 struct rt2560_rx_data *data; 814 int i; 815 816 if (ring->desc != NULL) { 817 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 818 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 819 bus_dmamap_unload(sc->sc_dmat, ring->map); 820 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 821 ring->count * RT2560_RX_DESC_SIZE); 822 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 823 } 824 825 if (ring->data != NULL) { 826 for (i = 0; i < ring->count; i++) { 827 data = &ring->data[i]; 828 829 if (data->m != NULL) { 830 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 831 data->map->dm_mapsize, 832 BUS_DMASYNC_POSTREAD); 833 bus_dmamap_unload(sc->sc_dmat, data->map); 834 m_freem(data->m); 835 } 836 837 if (data->map != NULL) 838 bus_dmamap_destroy(sc->sc_dmat, data->map); 839 } 840 free(ring->data, M_DEVBUF); 841 } 842 } 843 844 struct ieee80211_node * 845 rt2560_node_alloc(struct ieee80211_node_table *nt) 846 { 847 struct rt2560_node *rn; 848 849 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 850 M_NOWAIT | M_ZERO); 851 852 return (rn != NULL) ? &rn->ni : NULL; 853 } 854 855 int 856 rt2560_media_change(struct ifnet *ifp) 857 { 858 int error; 859 860 error = ieee80211_media_change(ifp); 861 if (error != ENETRESET) 862 return error; 863 864 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 865 rt2560_init(ifp); 866 867 return 0; 868 } 869 870 /* 871 * This function is called periodically (every 200ms) during scanning to 872 * switch from one channel to another. 873 */ 874 void 875 rt2560_next_scan(void *arg) 876 { 877 struct rt2560_softc *sc = arg; 878 struct ieee80211com *ic = &sc->sc_ic; 879 880 if (ic->ic_state == IEEE80211_S_SCAN) 881 ieee80211_next_scan(ic); 882 } 883 884 /* 885 * This function is called for each neighbor node. 886 */ 887 void 888 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 889 { 890 struct rt2560_node *rn = (struct rt2560_node *)ni; 891 892 ieee80211_rssadapt_updatestats(&rn->rssadapt); 893 } 894 895 /* 896 * This function is called periodically (every 100ms) in RUN state to update 897 * the rate adaptation statistics. 898 */ 899 void 900 rt2560_update_rssadapt(void *arg) 901 { 902 struct rt2560_softc *sc = arg; 903 struct ieee80211com *ic = &sc->sc_ic; 904 905 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 906 907 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 908 } 909 910 int 911 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 912 { 913 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 914 enum ieee80211_state ostate; 915 struct ieee80211_node *ni; 916 struct mbuf *m; 917 int error = 0; 918 919 ostate = ic->ic_state; 920 callout_stop(&sc->scan_ch); 921 922 switch (nstate) { 923 case IEEE80211_S_INIT: 924 callout_stop(&sc->rssadapt_ch); 925 926 if (ostate == IEEE80211_S_RUN) { 927 /* abort TSF synchronization */ 928 RAL_WRITE(sc, RT2560_CSR14, 0); 929 930 /* turn association led off */ 931 rt2560_update_led(sc, 0, 0); 932 } 933 break; 934 935 case IEEE80211_S_SCAN: 936 rt2560_set_chan(sc, ic->ic_curchan); 937 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 938 rt2560_next_scan, sc); 939 break; 940 941 case IEEE80211_S_AUTH: 942 rt2560_set_chan(sc, ic->ic_curchan); 943 break; 944 945 case IEEE80211_S_ASSOC: 946 rt2560_set_chan(sc, ic->ic_curchan); 947 break; 948 949 case IEEE80211_S_RUN: 950 rt2560_set_chan(sc, ic->ic_curchan); 951 952 ni = ic->ic_bss; 953 954 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 955 rt2560_update_plcp(sc); 956 rt2560_set_basicrates(sc); 957 rt2560_set_bssid(sc, ni->ni_bssid); 958 } 959 960 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 961 ic->ic_opmode == IEEE80211_M_IBSS) { 962 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 963 if (m == NULL) { 964 printf("%s: could not allocate beacon\n", 965 sc->sc_dev.dv_xname); 966 error = ENOBUFS; 967 break; 968 } 969 970 ieee80211_ref_node(ni); 971 error = rt2560_tx_bcn(sc, m, ni); 972 if (error != 0) 973 break; 974 } 975 976 /* turn assocation led on */ 977 rt2560_update_led(sc, 1, 0); 978 979 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 980 callout_reset(&sc->rssadapt_ch, hz / 10, 981 rt2560_update_rssadapt, sc); 982 rt2560_enable_tsf_sync(sc); 983 } 984 break; 985 } 986 987 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 988 } 989 990 /* 991 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 992 * 93C66). 993 */ 994 uint16_t 995 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 996 { 997 uint32_t tmp; 998 uint16_t val; 999 int n; 1000 1001 /* clock C once before the first command */ 1002 RT2560_EEPROM_CTL(sc, 0); 1003 1004 RT2560_EEPROM_CTL(sc, RT2560_S); 1005 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1006 RT2560_EEPROM_CTL(sc, RT2560_S); 1007 1008 /* write start bit (1) */ 1009 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1010 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1011 1012 /* write READ opcode (10) */ 1013 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1014 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1015 RT2560_EEPROM_CTL(sc, RT2560_S); 1016 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1017 1018 /* write address (A5-A0 or A7-A0) */ 1019 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1020 for (; n >= 0; n--) { 1021 RT2560_EEPROM_CTL(sc, RT2560_S | 1022 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1023 RT2560_EEPROM_CTL(sc, RT2560_S | 1024 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1025 } 1026 1027 RT2560_EEPROM_CTL(sc, RT2560_S); 1028 1029 /* read data Q15-Q0 */ 1030 val = 0; 1031 for (n = 15; n >= 0; n--) { 1032 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1033 tmp = RAL_READ(sc, RT2560_CSR21); 1034 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1035 RT2560_EEPROM_CTL(sc, RT2560_S); 1036 } 1037 1038 RT2560_EEPROM_CTL(sc, 0); 1039 1040 /* clear Chip Select and clock C */ 1041 RT2560_EEPROM_CTL(sc, RT2560_S); 1042 RT2560_EEPROM_CTL(sc, 0); 1043 RT2560_EEPROM_CTL(sc, RT2560_C); 1044 1045 return val; 1046 } 1047 1048 /* 1049 * Some frames were processed by the hardware cipher engine and are ready for 1050 * transmission. 1051 */ 1052 void 1053 rt2560_encryption_intr(struct rt2560_softc *sc) 1054 { 1055 struct rt2560_tx_desc *desc; 1056 int hw; 1057 1058 /* retrieve last descriptor index processed by cipher engine */ 1059 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1060 RT2560_TX_DESC_SIZE; 1061 1062 for (; sc->txq.next_encrypt != hw;) { 1063 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1064 1065 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1066 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1067 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1068 1069 if (le32toh(desc->flags) & 1070 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1071 break; 1072 1073 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1074 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1075 RT2560_TX_CIPHER_TKIP) 1076 desc->eiv = bswap32(desc->eiv); 1077 1078 /* mark the frame ready for transmission */ 1079 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1080 1081 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1082 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1083 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1084 1085 DPRINTFN(15, ("encryption done idx=%u\n", 1086 sc->txq.next_encrypt)); 1087 1088 sc->txq.next_encrypt = 1089 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1090 } 1091 1092 /* kick Tx */ 1093 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1094 } 1095 1096 void 1097 rt2560_tx_intr(struct rt2560_softc *sc) 1098 { 1099 struct ieee80211com *ic = &sc->sc_ic; 1100 struct ifnet *ifp = ic->ic_ifp; 1101 struct rt2560_tx_desc *desc; 1102 struct rt2560_tx_data *data; 1103 struct rt2560_node *rn; 1104 1105 for (;;) { 1106 desc = &sc->txq.desc[sc->txq.next]; 1107 data = &sc->txq.data[sc->txq.next]; 1108 1109 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1110 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1111 BUS_DMASYNC_POSTREAD); 1112 1113 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1114 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1115 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1116 break; 1117 1118 rn = (struct rt2560_node *)data->ni; 1119 1120 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1121 case RT2560_TX_SUCCESS: 1122 DPRINTFN(10, ("data frame sent successfully\n")); 1123 if (data->id.id_node != NULL) { 1124 ieee80211_rssadapt_raise_rate(ic, 1125 &rn->rssadapt, &data->id); 1126 } 1127 ifp->if_opackets++; 1128 break; 1129 1130 case RT2560_TX_SUCCESS_RETRY: 1131 DPRINTFN(9, ("data frame sent after %u retries\n", 1132 (le32toh(desc->flags) >> 5) & 0x7)); 1133 ifp->if_opackets++; 1134 break; 1135 1136 case RT2560_TX_FAIL_RETRY: 1137 DPRINTFN(9, ("sending data frame failed (too much " 1138 "retries)\n")); 1139 if (data->id.id_node != NULL) { 1140 ieee80211_rssadapt_lower_rate(ic, data->ni, 1141 &rn->rssadapt, &data->id); 1142 } 1143 ifp->if_oerrors++; 1144 break; 1145 1146 case RT2560_TX_FAIL_INVALID: 1147 case RT2560_TX_FAIL_OTHER: 1148 default: 1149 printf("%s: sending data frame failed 0x%08x\n", 1150 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1151 ifp->if_oerrors++; 1152 } 1153 1154 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1155 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1156 bus_dmamap_unload(sc->sc_dmat, data->map); 1157 m_freem(data->m); 1158 data->m = NULL; 1159 ieee80211_free_node(data->ni); 1160 data->ni = NULL; 1161 1162 /* descriptor is no longer valid */ 1163 desc->flags &= ~htole32(RT2560_TX_VALID); 1164 1165 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1166 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1167 BUS_DMASYNC_PREWRITE); 1168 1169 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1170 1171 sc->txq.queued--; 1172 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1173 } 1174 1175 sc->sc_tx_timer = 0; 1176 ifp->if_flags &= ~IFF_OACTIVE; 1177 rt2560_start(ifp); 1178 } 1179 1180 void 1181 rt2560_prio_intr(struct rt2560_softc *sc) 1182 { 1183 struct ieee80211com *ic = &sc->sc_ic; 1184 struct ifnet *ifp = ic->ic_ifp; 1185 struct rt2560_tx_desc *desc; 1186 struct rt2560_tx_data *data; 1187 1188 for (;;) { 1189 desc = &sc->prioq.desc[sc->prioq.next]; 1190 data = &sc->prioq.data[sc->prioq.next]; 1191 1192 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1193 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1194 BUS_DMASYNC_POSTREAD); 1195 1196 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1197 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1198 break; 1199 1200 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1201 case RT2560_TX_SUCCESS: 1202 DPRINTFN(10, ("mgt frame sent successfully\n")); 1203 break; 1204 1205 case RT2560_TX_SUCCESS_RETRY: 1206 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1207 (le32toh(desc->flags) >> 5) & 0x7)); 1208 break; 1209 1210 case RT2560_TX_FAIL_RETRY: 1211 DPRINTFN(9, ("sending mgt frame failed (too much " 1212 "retries)\n")); 1213 break; 1214 1215 case RT2560_TX_FAIL_INVALID: 1216 case RT2560_TX_FAIL_OTHER: 1217 default: 1218 printf("%s: sending mgt frame failed 0x%08x\n", 1219 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1220 } 1221 1222 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1223 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1224 bus_dmamap_unload(sc->sc_dmat, data->map); 1225 m_freem(data->m); 1226 data->m = NULL; 1227 ieee80211_free_node(data->ni); 1228 data->ni = NULL; 1229 1230 /* descriptor is no longer valid */ 1231 desc->flags &= ~htole32(RT2560_TX_VALID); 1232 1233 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1234 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1235 BUS_DMASYNC_PREWRITE); 1236 1237 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1238 1239 sc->prioq.queued--; 1240 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1241 } 1242 1243 sc->sc_tx_timer = 0; 1244 ifp->if_flags &= ~IFF_OACTIVE; 1245 rt2560_start(ifp); 1246 } 1247 1248 /* 1249 * Some frames were processed by the hardware cipher engine and are ready for 1250 * transmission to the IEEE802.11 layer. 1251 */ 1252 void 1253 rt2560_decryption_intr(struct rt2560_softc *sc) 1254 { 1255 struct ieee80211com *ic = &sc->sc_ic; 1256 struct ifnet *ifp = ic->ic_ifp; 1257 struct rt2560_rx_desc *desc; 1258 struct rt2560_rx_data *data; 1259 struct rt2560_node *rn; 1260 struct ieee80211_frame *wh; 1261 struct ieee80211_node *ni; 1262 struct mbuf *mnew, *m; 1263 int hw, error; 1264 1265 /* retrieve last decriptor index processed by cipher engine */ 1266 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1267 RT2560_RX_DESC_SIZE; 1268 1269 for (; sc->rxq.cur_decrypt != hw;) { 1270 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1271 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1272 1273 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1274 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1275 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1276 1277 if (le32toh(desc->flags) & 1278 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1279 break; 1280 1281 if (data->drop) { 1282 ifp->if_ierrors++; 1283 goto skip; 1284 } 1285 1286 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1287 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1288 ifp->if_ierrors++; 1289 goto skip; 1290 } 1291 1292 /* 1293 * Try to allocate a new mbuf for this ring element and load it 1294 * before processing the current mbuf. If the ring element 1295 * cannot be loaded, drop the received packet and reuse the old 1296 * mbuf. In the unlikely case that the old mbuf can't be 1297 * reloaded either, explicitly panic. 1298 */ 1299 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1300 if (mnew == NULL) { 1301 ifp->if_ierrors++; 1302 goto skip; 1303 } 1304 1305 MCLGET(mnew, M_DONTWAIT); 1306 if (!(mnew->m_flags & M_EXT)) { 1307 m_freem(mnew); 1308 ifp->if_ierrors++; 1309 goto skip; 1310 } 1311 1312 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1313 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1314 bus_dmamap_unload(sc->sc_dmat, data->map); 1315 1316 error = bus_dmamap_load(sc->sc_dmat, data->map, 1317 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1318 if (error != 0) { 1319 m_freem(mnew); 1320 1321 /* try to reload the old mbuf */ 1322 error = bus_dmamap_load(sc->sc_dmat, data->map, 1323 mtod(data->m, void *), MCLBYTES, NULL, 1324 BUS_DMA_NOWAIT); 1325 if (error != 0) { 1326 /* very unlikely that it will fail... */ 1327 panic("%s: could not load old rx mbuf", 1328 sc->sc_dev.dv_xname); 1329 } 1330 ifp->if_ierrors++; 1331 goto skip; 1332 } 1333 1334 /* 1335 * New mbuf successfully loaded, update Rx ring and continue 1336 * processing. 1337 */ 1338 m = data->m; 1339 data->m = mnew; 1340 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1341 1342 /* finalize mbuf */ 1343 m->m_pkthdr.rcvif = ifp; 1344 m->m_pkthdr.len = m->m_len = 1345 (le32toh(desc->flags) >> 16) & 0xfff; 1346 1347 #if NBPFILTER > 0 1348 if (sc->sc_drvbpf != NULL) { 1349 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1350 uint32_t tsf_lo, tsf_hi; 1351 1352 /* get timestamp (low and high 32 bits) */ 1353 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1354 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1355 1356 tap->wr_tsf = 1357 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1358 tap->wr_flags = 0; 1359 tap->wr_rate = rt2560_rxrate(desc); 1360 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1361 tap->wr_chan_flags = 1362 htole16(ic->ic_ibss_chan->ic_flags); 1363 tap->wr_antenna = sc->rx_ant; 1364 tap->wr_antsignal = desc->rssi; 1365 1366 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m); 1367 } 1368 #endif 1369 1370 wh = mtod(m, struct ieee80211_frame *); 1371 ni = ieee80211_find_rxnode(ic, 1372 (struct ieee80211_frame_min *)wh); 1373 1374 /* send the frame to the 802.11 layer */ 1375 ieee80211_input(ic, m, ni, desc->rssi, 0); 1376 1377 /* give rssi to the rate adatation algorithm */ 1378 rn = (struct rt2560_node *)ni; 1379 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1380 1381 /* node is no longer needed */ 1382 ieee80211_free_node(ni); 1383 1384 skip: desc->flags = htole32(RT2560_RX_BUSY); 1385 1386 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1387 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1388 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1389 1390 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1391 1392 sc->rxq.cur_decrypt = 1393 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1394 } 1395 1396 /* 1397 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1398 * without calling if_start(). 1399 */ 1400 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1401 rt2560_start(ifp); 1402 } 1403 1404 /* 1405 * Some frames were received. Pass them to the hardware cipher engine before 1406 * sending them to the 802.11 layer. 1407 */ 1408 void 1409 rt2560_rx_intr(struct rt2560_softc *sc) 1410 { 1411 struct rt2560_rx_desc *desc; 1412 struct rt2560_rx_data *data; 1413 1414 for (;;) { 1415 desc = &sc->rxq.desc[sc->rxq.cur]; 1416 data = &sc->rxq.data[sc->rxq.cur]; 1417 1418 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1419 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1420 BUS_DMASYNC_POSTREAD); 1421 1422 if (le32toh(desc->flags) & 1423 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1424 break; 1425 1426 data->drop = 0; 1427 1428 if (le32toh(desc->flags) & 1429 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1430 /* 1431 * This should not happen since we did not request 1432 * to receive those frames when we filled RXCSR0. 1433 */ 1434 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1435 le32toh(desc->flags))); 1436 data->drop = 1; 1437 } 1438 1439 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1440 DPRINTFN(5, ("bad length\n")); 1441 data->drop = 1; 1442 } 1443 1444 /* mark the frame for decryption */ 1445 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1446 1447 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1448 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1449 BUS_DMASYNC_PREWRITE); 1450 1451 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1452 1453 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1454 } 1455 1456 /* kick decrypt */ 1457 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1458 } 1459 1460 #if 0 1461 void 1462 rt2560_shutdown(void *xsc) 1463 { 1464 struct rt2560_softc *sc = xsc; 1465 1466 rt2560_stop(sc); 1467 } 1468 1469 void 1470 rt2560_suspend(void *xsc) 1471 { 1472 struct rt2560_softc *sc = xsc; 1473 1474 rt2560_stop(sc); 1475 } 1476 1477 void 1478 rt2560_resume(void *xsc) 1479 { 1480 struct rt2560_softc *sc = xsc; 1481 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1482 1483 if (ifp->if_flags & IFF_UP) { 1484 ifp->if_init(ifp->if_softc); 1485 if (ifp->if_flags & IFF_RUNNING) 1486 ifp->if_start(ifp); 1487 } 1488 } 1489 1490 #endif 1491 /* 1492 * This function is called periodically in IBSS mode when a new beacon must be 1493 * sent out. 1494 */ 1495 static void 1496 rt2560_beacon_expire(struct rt2560_softc *sc) 1497 { 1498 struct ieee80211com *ic = &sc->sc_ic; 1499 struct rt2560_tx_data *data; 1500 1501 if (ic->ic_opmode != IEEE80211_M_IBSS && 1502 ic->ic_opmode != IEEE80211_M_HOSTAP) 1503 return; 1504 1505 data = &sc->bcnq.data[sc->bcnq.next]; 1506 1507 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1508 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1509 bus_dmamap_unload(sc->sc_dmat, data->map); 1510 1511 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1512 1513 #if NBPFILTER > 0 1514 if (ic->ic_rawbpf != NULL) 1515 bpf_mtap(ic->ic_rawbpf, data->m); 1516 #endif 1517 rt2560_tx_bcn(sc, data->m, data->ni); 1518 1519 DPRINTFN(15, ("beacon expired\n")); 1520 1521 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1522 } 1523 1524 static void 1525 rt2560_wakeup_expire(struct rt2560_softc *sc) 1526 { 1527 DPRINTFN(15, ("wakeup expired\n")); 1528 } 1529 1530 int 1531 rt2560_intr(void *arg) 1532 { 1533 struct rt2560_softc *sc = arg; 1534 struct ifnet *ifp = &sc->sc_if; 1535 uint32_t r; 1536 1537 /* disable interrupts */ 1538 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1539 1540 /* don't re-enable interrupts if we're shutting down */ 1541 if (!(ifp->if_flags & IFF_RUNNING)) 1542 return 0; 1543 1544 /* if we're suspended, don't bother */ 1545 if (sc->sc_suspend != PWR_RESUME) 1546 return 0; 1547 1548 r = RAL_READ(sc, RT2560_CSR7); 1549 RAL_WRITE(sc, RT2560_CSR7, r); 1550 1551 if (r & RT2560_BEACON_EXPIRE) 1552 rt2560_beacon_expire(sc); 1553 1554 if (r & RT2560_WAKEUP_EXPIRE) 1555 rt2560_wakeup_expire(sc); 1556 1557 if (r & RT2560_ENCRYPTION_DONE) 1558 rt2560_encryption_intr(sc); 1559 1560 if (r & RT2560_TX_DONE) 1561 rt2560_tx_intr(sc); 1562 1563 if (r & RT2560_PRIO_DONE) 1564 rt2560_prio_intr(sc); 1565 1566 if (r & RT2560_DECRYPTION_DONE) 1567 rt2560_decryption_intr(sc); 1568 1569 if (r & RT2560_RX_DONE) 1570 rt2560_rx_intr(sc); 1571 1572 /* re-enable interrupts */ 1573 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1574 1575 return 1; 1576 } 1577 1578 /* quickly determine if a given rate is CCK or OFDM */ 1579 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1580 1581 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1582 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1583 1584 #define RAL_SIFS 10 /* us */ 1585 1586 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1587 1588 /* 1589 * This function is only used by the Rx radiotap code. It returns the rate at 1590 * which a given frame was received. 1591 */ 1592 #if NBPFILTER > 0 1593 static uint8_t 1594 rt2560_rxrate(struct rt2560_rx_desc *desc) 1595 { 1596 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1597 /* reverse function of rt2560_plcp_signal */ 1598 switch (desc->rate) { 1599 case 0xb: return 12; 1600 case 0xf: return 18; 1601 case 0xa: return 24; 1602 case 0xe: return 36; 1603 case 0x9: return 48; 1604 case 0xd: return 72; 1605 case 0x8: return 96; 1606 case 0xc: return 108; 1607 } 1608 } else { 1609 if (desc->rate == 10) 1610 return 2; 1611 if (desc->rate == 20) 1612 return 4; 1613 if (desc->rate == 55) 1614 return 11; 1615 if (desc->rate == 110) 1616 return 22; 1617 } 1618 return 2; /* should not get there */ 1619 } 1620 #endif 1621 1622 /* 1623 * Return the expected ack rate for a frame transmitted at rate `rate'. 1624 * XXX: this should depend on the destination node basic rate set. 1625 */ 1626 static int 1627 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1628 { 1629 switch (rate) { 1630 /* CCK rates */ 1631 case 2: 1632 return 2; 1633 case 4: 1634 case 11: 1635 case 22: 1636 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1637 1638 /* OFDM rates */ 1639 case 12: 1640 case 18: 1641 return 12; 1642 case 24: 1643 case 36: 1644 return 24; 1645 case 48: 1646 case 72: 1647 case 96: 1648 case 108: 1649 return 48; 1650 } 1651 1652 /* default to 1Mbps */ 1653 return 2; 1654 } 1655 1656 /* 1657 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1658 * The function automatically determines the operating mode depending on the 1659 * given rate. `flags' indicates whether short preamble is in use or not. 1660 */ 1661 static uint16_t 1662 rt2560_txtime(int len, int rate, uint32_t flags) 1663 { 1664 uint16_t txtime; 1665 1666 if (RAL_RATE_IS_OFDM(rate)) { 1667 /* IEEE Std 802.11a-1999, pp. 37 */ 1668 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1669 txtime = 16 + 4 + 4 * txtime + 6; 1670 } else { 1671 /* IEEE Std 802.11b-1999, pp. 28 */ 1672 txtime = (16 * len + rate - 1) / rate; 1673 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1674 txtime += 72 + 24; 1675 else 1676 txtime += 144 + 48; 1677 } 1678 return txtime; 1679 } 1680 1681 static uint8_t 1682 rt2560_plcp_signal(int rate) 1683 { 1684 switch (rate) { 1685 /* CCK rates (returned values are device-dependent) */ 1686 case 2: return 0x0; 1687 case 4: return 0x1; 1688 case 11: return 0x2; 1689 case 22: return 0x3; 1690 1691 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1692 case 12: return 0xb; 1693 case 18: return 0xf; 1694 case 24: return 0xa; 1695 case 36: return 0xe; 1696 case 48: return 0x9; 1697 case 72: return 0xd; 1698 case 96: return 0x8; 1699 case 108: return 0xc; 1700 1701 /* unsupported rates (should not get there) */ 1702 default: return 0xff; 1703 } 1704 } 1705 1706 static void 1707 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1708 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1709 { 1710 struct ieee80211com *ic = &sc->sc_ic; 1711 uint16_t plcp_length; 1712 int remainder; 1713 1714 desc->flags = htole32(flags); 1715 desc->flags |= htole32(len << 16); 1716 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1717 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1718 1719 desc->physaddr = htole32(physaddr); 1720 desc->wme = htole16( 1721 RT2560_AIFSN(2) | 1722 RT2560_LOGCWMIN(3) | 1723 RT2560_LOGCWMAX(8)); 1724 1725 /* setup PLCP fields */ 1726 desc->plcp_signal = rt2560_plcp_signal(rate); 1727 desc->plcp_service = 4; 1728 1729 len += IEEE80211_CRC_LEN; 1730 if (RAL_RATE_IS_OFDM(rate)) { 1731 desc->flags |= htole32(RT2560_TX_OFDM); 1732 1733 plcp_length = len & 0xfff; 1734 desc->plcp_length_hi = plcp_length >> 6; 1735 desc->plcp_length_lo = plcp_length & 0x3f; 1736 } else { 1737 plcp_length = (16 * len + rate - 1) / rate; 1738 if (rate == 22) { 1739 remainder = (16 * len) % 22; 1740 if (remainder != 0 && remainder < 7) 1741 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1742 } 1743 desc->plcp_length_hi = plcp_length >> 8; 1744 desc->plcp_length_lo = plcp_length & 0xff; 1745 1746 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1747 desc->plcp_signal |= 0x08; 1748 } 1749 } 1750 1751 static int 1752 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1753 struct ieee80211_node *ni) 1754 { 1755 struct rt2560_tx_desc *desc; 1756 struct rt2560_tx_data *data; 1757 int rate, error; 1758 1759 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1760 data = &sc->bcnq.data[sc->bcnq.cur]; 1761 1762 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1763 1764 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1765 BUS_DMA_NOWAIT); 1766 if (error != 0) { 1767 printf("%s: could not map mbuf (error %d)\n", 1768 sc->sc_dev.dv_xname, error); 1769 m_freem(m0); 1770 return error; 1771 } 1772 1773 data->m = m0; 1774 data->ni = ni; 1775 1776 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1777 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1778 data->map->dm_segs->ds_addr); 1779 1780 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1781 BUS_DMASYNC_PREWRITE); 1782 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1783 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1784 BUS_DMASYNC_PREWRITE); 1785 1786 return 0; 1787 } 1788 1789 static int 1790 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1791 struct ieee80211_node *ni) 1792 { 1793 struct ieee80211com *ic = &sc->sc_ic; 1794 struct rt2560_tx_desc *desc; 1795 struct rt2560_tx_data *data; 1796 struct ieee80211_frame *wh; 1797 uint16_t dur; 1798 uint32_t flags = 0; 1799 int rate, error; 1800 1801 desc = &sc->prioq.desc[sc->prioq.cur]; 1802 data = &sc->prioq.data[sc->prioq.cur]; 1803 1804 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1805 1806 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1807 BUS_DMA_NOWAIT); 1808 if (error != 0) { 1809 printf("%s: could not map mbuf (error %d)\n", 1810 sc->sc_dev.dv_xname, error); 1811 m_freem(m0); 1812 return error; 1813 } 1814 1815 #if NBPFILTER > 0 1816 if (sc->sc_drvbpf != NULL) { 1817 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1818 1819 tap->wt_flags = 0; 1820 tap->wt_rate = rate; 1821 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1822 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1823 tap->wt_antenna = sc->tx_ant; 1824 1825 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 1826 } 1827 #endif 1828 1829 data->m = m0; 1830 data->ni = ni; 1831 1832 wh = mtod(m0, struct ieee80211_frame *); 1833 1834 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1835 flags |= RT2560_TX_ACK; 1836 1837 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1838 RAL_SIFS; 1839 *(uint16_t *)wh->i_dur = htole16(dur); 1840 1841 /* tell hardware to add timestamp for probe responses */ 1842 if ((wh->i_fc[0] & 1843 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1844 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1845 flags |= RT2560_TX_TIMESTAMP; 1846 } 1847 1848 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1849 data->map->dm_segs->ds_addr); 1850 1851 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1852 BUS_DMASYNC_PREWRITE); 1853 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1854 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1855 BUS_DMASYNC_PREWRITE); 1856 1857 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1858 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1859 1860 /* kick prio */ 1861 sc->prioq.queued++; 1862 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1863 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1864 1865 return 0; 1866 } 1867 1868 /* 1869 * Build a RTS control frame. 1870 */ 1871 static struct mbuf * 1872 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1873 uint16_t dur) 1874 { 1875 struct ieee80211_frame_rts *rts; 1876 struct mbuf *m; 1877 1878 MGETHDR(m, M_DONTWAIT, MT_DATA); 1879 if (m == NULL) { 1880 sc->sc_ic.ic_stats.is_tx_nobuf++; 1881 printf("%s: could not allocate RTS frame\n", 1882 sc->sc_dev.dv_xname); 1883 return NULL; 1884 } 1885 1886 rts = mtod(m, struct ieee80211_frame_rts *); 1887 1888 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1889 IEEE80211_FC0_SUBTYPE_RTS; 1890 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1891 *(uint16_t *)rts->i_dur = htole16(dur); 1892 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1893 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1894 1895 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1896 1897 return m; 1898 } 1899 1900 static int 1901 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1902 struct ieee80211_node *ni) 1903 { 1904 struct ieee80211com *ic = &sc->sc_ic; 1905 struct rt2560_tx_desc *desc; 1906 struct rt2560_tx_data *data; 1907 struct rt2560_node *rn; 1908 struct ieee80211_rateset *rs; 1909 struct ieee80211_frame *wh; 1910 struct ieee80211_key *k; 1911 struct mbuf *mnew; 1912 uint16_t dur; 1913 uint32_t flags = 0; 1914 int rate, error; 1915 1916 wh = mtod(m0, struct ieee80211_frame *); 1917 1918 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1919 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1920 rate = rs->rs_rates[ic->ic_fixed_rate]; 1921 } else { 1922 rs = &ni->ni_rates; 1923 rn = (struct rt2560_node *)ni; 1924 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1925 wh, m0->m_pkthdr.len, -1, NULL, 0); 1926 rate = rs->rs_rates[ni->ni_txrate]; 1927 } 1928 rate &= IEEE80211_RATE_VAL; 1929 1930 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1931 k = ieee80211_crypto_encap(ic, ni, m0); 1932 if (k == NULL) { 1933 m_freem(m0); 1934 return ENOBUFS; 1935 } 1936 1937 /* packet header may have moved, reset our local pointer */ 1938 wh = mtod(m0, struct ieee80211_frame *); 1939 } 1940 1941 /* 1942 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1943 * for directed frames only when the length of the MPDU is greater 1944 * than the length threshold indicated by [...]" ic_rtsthreshold. 1945 */ 1946 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1947 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1948 struct mbuf *m; 1949 int rtsrate, ackrate; 1950 1951 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1952 ackrate = rt2560_ack_rate(ic, rate); 1953 1954 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1955 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1956 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1957 3 * RAL_SIFS; 1958 1959 m = rt2560_get_rts(sc, wh, dur); 1960 1961 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1962 data = &sc->txq.data[sc->txq.cur_encrypt]; 1963 1964 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1965 BUS_DMA_NOWAIT); 1966 if (error != 0) { 1967 printf("%s: could not map mbuf (error %d)\n", 1968 sc->sc_dev.dv_xname, error); 1969 m_freem(m); 1970 m_freem(m0); 1971 return error; 1972 } 1973 1974 /* avoid multiple free() of the same node for each fragment */ 1975 ieee80211_ref_node(ni); 1976 1977 data->m = m; 1978 data->ni = ni; 1979 1980 /* RTS frames are not taken into account for rssadapt */ 1981 data->id.id_node = NULL; 1982 1983 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1984 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1985 data->map->dm_segs->ds_addr); 1986 1987 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1988 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1989 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1990 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1991 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1992 1993 sc->txq.queued++; 1994 sc->txq.cur_encrypt = 1995 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1996 1997 /* 1998 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1999 * asynchronous data frame shall be transmitted after the CTS 2000 * frame and a SIFS period. 2001 */ 2002 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 2003 } 2004 2005 data = &sc->txq.data[sc->txq.cur_encrypt]; 2006 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 2007 2008 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2009 BUS_DMA_NOWAIT); 2010 if (error != 0 && error != EFBIG) { 2011 printf("%s: could not map mbuf (error %d)\n", 2012 sc->sc_dev.dv_xname, error); 2013 m_freem(m0); 2014 return error; 2015 } 2016 if (error != 0) { 2017 /* too many fragments, linearize */ 2018 2019 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2020 if (mnew == NULL) { 2021 m_freem(m0); 2022 return ENOMEM; 2023 } 2024 2025 M_COPY_PKTHDR(mnew, m0); 2026 if (m0->m_pkthdr.len > MHLEN) { 2027 MCLGET(mnew, M_DONTWAIT); 2028 if (!(mnew->m_flags & M_EXT)) { 2029 m_freem(m0); 2030 m_freem(mnew); 2031 return ENOMEM; 2032 } 2033 } 2034 2035 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 2036 m_freem(m0); 2037 mnew->m_len = mnew->m_pkthdr.len; 2038 m0 = mnew; 2039 2040 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2041 BUS_DMA_NOWAIT); 2042 if (error != 0) { 2043 printf("%s: could not map mbuf (error %d)\n", 2044 sc->sc_dev.dv_xname, error); 2045 m_freem(m0); 2046 return error; 2047 } 2048 2049 /* packet header have moved, reset our local pointer */ 2050 wh = mtod(m0, struct ieee80211_frame *); 2051 } 2052 2053 #if NBPFILTER > 0 2054 if (sc->sc_drvbpf != NULL) { 2055 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2056 2057 tap->wt_flags = 0; 2058 tap->wt_rate = rate; 2059 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2060 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2061 tap->wt_antenna = sc->tx_ant; 2062 2063 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0); 2064 } 2065 #endif 2066 2067 data->m = m0; 2068 data->ni = ni; 2069 2070 /* remember link conditions for rate adaptation algorithm */ 2071 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2072 data->id.id_len = m0->m_pkthdr.len; 2073 data->id.id_rateidx = ni->ni_txrate; 2074 data->id.id_node = ni; 2075 data->id.id_rssi = ni->ni_rssi; 2076 } else 2077 data->id.id_node = NULL; 2078 2079 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2080 flags |= RT2560_TX_ACK; 2081 2082 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2083 ic->ic_flags) + RAL_SIFS; 2084 *(uint16_t *)wh->i_dur = htole16(dur); 2085 } 2086 2087 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2088 data->map->dm_segs->ds_addr); 2089 2090 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2091 BUS_DMASYNC_PREWRITE); 2092 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2093 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2094 BUS_DMASYNC_PREWRITE); 2095 2096 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2097 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2098 2099 /* kick encrypt */ 2100 sc->txq.queued++; 2101 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2102 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2103 2104 return 0; 2105 } 2106 2107 static void 2108 rt2560_start(struct ifnet *ifp) 2109 { 2110 struct rt2560_softc *sc = ifp->if_softc; 2111 struct ieee80211com *ic = &sc->sc_ic; 2112 struct mbuf *m0; 2113 struct ieee80211_node *ni; 2114 struct ether_header *eh; 2115 2116 /* 2117 * net80211 may still try to send management frames even if the 2118 * IFF_RUNNING flag is not set... 2119 */ 2120 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2121 return; 2122 2123 for (;;) { 2124 IF_POLL(&ic->ic_mgtq, m0); 2125 if (m0 != NULL) { 2126 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2127 ifp->if_flags |= IFF_OACTIVE; 2128 break; 2129 } 2130 IF_DEQUEUE(&ic->ic_mgtq, m0); 2131 if (m0 == NULL) 2132 break; 2133 2134 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2135 m0->m_pkthdr.rcvif = NULL; 2136 #if NBPFILTER > 0 2137 if (ic->ic_rawbpf != NULL) 2138 bpf_mtap(ic->ic_rawbpf, m0); 2139 #endif 2140 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2141 break; 2142 2143 } else { 2144 if (ic->ic_state != IEEE80211_S_RUN) 2145 break; 2146 IFQ_DEQUEUE(&ifp->if_snd, m0); 2147 if (m0 == NULL) 2148 break; 2149 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2150 ifp->if_flags |= IFF_OACTIVE; 2151 break; 2152 } 2153 2154 if (m0->m_len < sizeof (struct ether_header) && 2155 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2156 continue; 2157 2158 eh = mtod(m0, struct ether_header *); 2159 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2160 if (ni == NULL) { 2161 m_freem(m0); 2162 continue; 2163 } 2164 #if NBPFILTER > 0 2165 if (ifp->if_bpf != NULL) 2166 bpf_mtap(ifp->if_bpf, m0); 2167 #endif 2168 2169 m0 = ieee80211_encap(ic, m0, ni); 2170 if (m0 == NULL) { 2171 ieee80211_free_node(ni); 2172 continue; 2173 } 2174 2175 #if NBPFILTER > 0 2176 if (ic->ic_rawbpf != NULL) 2177 bpf_mtap(ic->ic_rawbpf, m0); 2178 2179 #endif 2180 if (rt2560_tx_data(sc, m0, ni) != 0) { 2181 ieee80211_free_node(ni); 2182 ifp->if_oerrors++; 2183 break; 2184 } 2185 } 2186 2187 sc->sc_tx_timer = 5; 2188 ifp->if_timer = 1; 2189 } 2190 } 2191 2192 static void 2193 rt2560_watchdog(struct ifnet *ifp) 2194 { 2195 struct rt2560_softc *sc = ifp->if_softc; 2196 2197 ifp->if_timer = 0; 2198 2199 if (sc->sc_tx_timer > 0) { 2200 if (--sc->sc_tx_timer == 0) { 2201 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 2202 rt2560_init(ifp); 2203 ifp->if_oerrors++; 2204 return; 2205 } 2206 ifp->if_timer = 1; 2207 } 2208 2209 ieee80211_watchdog(&sc->sc_ic); 2210 } 2211 2212 /* 2213 * This function allows for fast channel switching in monitor mode (used by 2214 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2215 * generate a new beacon frame. 2216 */ 2217 static int 2218 rt2560_reset(struct ifnet *ifp) 2219 { 2220 struct rt2560_softc *sc = ifp->if_softc; 2221 struct ieee80211com *ic = &sc->sc_ic; 2222 2223 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2224 return ENETRESET; 2225 2226 rt2560_set_chan(sc, ic->ic_curchan); 2227 2228 return 0; 2229 } 2230 2231 int 2232 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2233 { 2234 struct rt2560_softc *sc = ifp->if_softc; 2235 struct ieee80211com *ic = &sc->sc_ic; 2236 int s, error = 0; 2237 2238 s = splnet(); 2239 2240 switch (cmd) { 2241 case SIOCSIFFLAGS: 2242 if (ifp->if_flags & IFF_UP) { 2243 if (ifp->if_flags & IFF_RUNNING) 2244 rt2560_update_promisc(sc); 2245 else 2246 rt2560_init(ifp); 2247 } else { 2248 if (ifp->if_flags & IFF_RUNNING) 2249 rt2560_stop(sc); 2250 } 2251 break; 2252 2253 case SIOCADDMULTI: 2254 case SIOCDELMULTI: 2255 /* XXX no h/w multicast filter? --dyoung */ 2256 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2257 error = 0; 2258 break; 2259 2260 case SIOCS80211CHANNEL: 2261 /* 2262 * This allows for fast channel switching in monitor mode 2263 * (used by kismet). In IBSS mode, we must explicitly reset 2264 * the interface to generate a new beacon frame. 2265 */ 2266 error = ieee80211_ioctl(ic, cmd, data); 2267 if (error == ENETRESET && 2268 ic->ic_opmode == IEEE80211_M_MONITOR) { 2269 rt2560_set_chan(sc, ic->ic_ibss_chan); 2270 error = 0; 2271 } 2272 break; 2273 2274 default: 2275 error = ieee80211_ioctl(ic, cmd, data); 2276 } 2277 2278 if (error == ENETRESET) { 2279 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2280 (IFF_UP | IFF_RUNNING)) 2281 rt2560_init(ifp); 2282 error = 0; 2283 } 2284 2285 splx(s); 2286 2287 return error; 2288 } 2289 2290 static void 2291 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2292 { 2293 uint32_t tmp; 2294 int ntries; 2295 2296 for (ntries = 0; ntries < 100; ntries++) { 2297 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2298 break; 2299 DELAY(1); 2300 } 2301 if (ntries == 100) { 2302 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2303 return; 2304 } 2305 2306 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2307 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2308 2309 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2310 } 2311 2312 static uint8_t 2313 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2314 { 2315 uint32_t val; 2316 int ntries; 2317 2318 val = RT2560_BBP_BUSY | reg << 8; 2319 RAL_WRITE(sc, RT2560_BBPCSR, val); 2320 2321 for (ntries = 0; ntries < 100; ntries++) { 2322 val = RAL_READ(sc, RT2560_BBPCSR); 2323 if (!(val & RT2560_BBP_BUSY)) 2324 return val & 0xff; 2325 DELAY(1); 2326 } 2327 2328 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2329 return 0; 2330 } 2331 2332 static void 2333 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2334 { 2335 uint32_t tmp; 2336 int ntries; 2337 2338 for (ntries = 0; ntries < 100; ntries++) { 2339 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2340 break; 2341 DELAY(1); 2342 } 2343 if (ntries == 100) { 2344 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2345 return; 2346 } 2347 2348 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2349 (reg & 0x3); 2350 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2351 2352 /* remember last written value in sc */ 2353 sc->rf_regs[reg] = val; 2354 2355 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2356 } 2357 2358 static void 2359 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2360 { 2361 struct ieee80211com *ic = &sc->sc_ic; 2362 uint8_t power, tmp; 2363 u_int i, chan; 2364 2365 chan = ieee80211_chan2ieee(ic, c); 2366 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2367 return; 2368 2369 if (IEEE80211_IS_CHAN_2GHZ(c)) 2370 power = min(sc->txpow[chan - 1], 31); 2371 else 2372 power = 31; 2373 2374 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2375 2376 switch (sc->rf_rev) { 2377 case RT2560_RF_2522: 2378 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2379 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2380 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2381 break; 2382 2383 case RT2560_RF_2523: 2384 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2385 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2386 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2387 rt2560_rf_write(sc, RT2560_RF4, 2388 (chan == 14) ? 0x00280 : 0x00286); 2389 break; 2390 2391 case RT2560_RF_2524: 2392 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2393 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2394 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2395 rt2560_rf_write(sc, RT2560_RF4, 2396 (chan == 14) ? 0x00280 : 0x00286); 2397 break; 2398 2399 case RT2560_RF_2525: 2400 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2401 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2402 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2403 rt2560_rf_write(sc, RT2560_RF4, 2404 (chan == 14) ? 0x00280 : 0x00286); 2405 2406 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2407 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2408 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2409 rt2560_rf_write(sc, RT2560_RF4, 2410 (chan == 14) ? 0x00280 : 0x00286); 2411 break; 2412 2413 case RT2560_RF_2525E: 2414 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2415 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2416 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2417 rt2560_rf_write(sc, RT2560_RF4, 2418 (chan == 14) ? 0x00286 : 0x00282); 2419 break; 2420 2421 case RT2560_RF_2526: 2422 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2423 rt2560_rf_write(sc, RT2560_RF4, 2424 (chan & 1) ? 0x00386 : 0x00381); 2425 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2426 2427 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2428 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2429 rt2560_rf_write(sc, RT2560_RF4, 2430 (chan & 1) ? 0x00386 : 0x00381); 2431 break; 2432 2433 /* dual-band RF */ 2434 case RT2560_RF_5222: 2435 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2436 2437 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2438 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2439 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2440 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2441 break; 2442 } 2443 2444 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2445 ic->ic_state != IEEE80211_S_SCAN) { 2446 /* set Japan filter bit for channel 14 */ 2447 tmp = rt2560_bbp_read(sc, 70); 2448 2449 tmp &= ~RT2560_JAPAN_FILTER; 2450 if (chan == 14) 2451 tmp |= RT2560_JAPAN_FILTER; 2452 2453 rt2560_bbp_write(sc, 70, tmp); 2454 2455 DELAY(1000); /* RF needs a 1ms delay here */ 2456 rt2560_disable_rf_tune(sc); 2457 2458 /* clear CRC errors */ 2459 RAL_READ(sc, RT2560_CNT0); 2460 } 2461 } 2462 2463 /* 2464 * Disable RF auto-tuning. 2465 */ 2466 static void 2467 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2468 { 2469 uint32_t tmp; 2470 2471 if (sc->rf_rev != RT2560_RF_2523) { 2472 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2473 rt2560_rf_write(sc, RT2560_RF1, tmp); 2474 } 2475 2476 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2477 rt2560_rf_write(sc, RT2560_RF3, tmp); 2478 2479 DPRINTFN(2, ("disabling RF autotune\n")); 2480 } 2481 2482 /* 2483 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2484 * synchronization. 2485 */ 2486 static void 2487 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2488 { 2489 struct ieee80211com *ic = &sc->sc_ic; 2490 uint16_t logcwmin, preload; 2491 uint32_t tmp; 2492 2493 /* first, disable TSF synchronization */ 2494 RAL_WRITE(sc, RT2560_CSR14, 0); 2495 2496 tmp = 16 * ic->ic_bss->ni_intval; 2497 RAL_WRITE(sc, RT2560_CSR12, tmp); 2498 2499 RAL_WRITE(sc, RT2560_CSR13, 0); 2500 2501 logcwmin = 5; 2502 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2503 tmp = logcwmin << 16 | preload; 2504 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2505 2506 /* finally, enable TSF synchronization */ 2507 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2508 if (ic->ic_opmode == IEEE80211_M_STA) 2509 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2510 else 2511 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2512 RT2560_ENABLE_BEACON_GENERATOR; 2513 RAL_WRITE(sc, RT2560_CSR14, tmp); 2514 2515 DPRINTF(("enabling TSF synchronization\n")); 2516 } 2517 2518 static void 2519 rt2560_update_plcp(struct rt2560_softc *sc) 2520 { 2521 struct ieee80211com *ic = &sc->sc_ic; 2522 2523 /* no short preamble for 1Mbps */ 2524 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2525 2526 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2527 /* values taken from the reference driver */ 2528 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2529 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2530 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2531 } else { 2532 /* same values as above or'ed 0x8 */ 2533 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2534 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2535 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2536 } 2537 2538 DPRINTF(("updating PLCP for %s preamble\n", 2539 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2540 } 2541 2542 /* 2543 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2544 * know how these values are computed. 2545 */ 2546 static void 2547 rt2560_update_slot(struct ifnet *ifp) 2548 { 2549 struct rt2560_softc *sc = ifp->if_softc; 2550 struct ieee80211com *ic = &sc->sc_ic; 2551 uint8_t slottime; 2552 uint16_t sifs, pifs, difs, eifs; 2553 uint32_t tmp; 2554 2555 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2556 2557 /* define the MAC slot boundaries */ 2558 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2559 pifs = sifs + slottime; 2560 difs = sifs + 2 * slottime; 2561 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2562 2563 tmp = RAL_READ(sc, RT2560_CSR11); 2564 tmp = (tmp & ~0x1f00) | slottime << 8; 2565 RAL_WRITE(sc, RT2560_CSR11, tmp); 2566 2567 tmp = pifs << 16 | sifs; 2568 RAL_WRITE(sc, RT2560_CSR18, tmp); 2569 2570 tmp = eifs << 16 | difs; 2571 RAL_WRITE(sc, RT2560_CSR19, tmp); 2572 2573 DPRINTF(("setting slottime to %uus\n", slottime)); 2574 } 2575 2576 static void 2577 rt2560_set_basicrates(struct rt2560_softc *sc) 2578 { 2579 struct ieee80211com *ic = &sc->sc_ic; 2580 2581 /* update basic rate set */ 2582 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2583 /* 11b basic rates: 1, 2Mbps */ 2584 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2585 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2586 /* 11a basic rates: 6, 12, 24Mbps */ 2587 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2588 } else { 2589 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2590 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2591 } 2592 } 2593 2594 static void 2595 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2596 { 2597 uint32_t tmp; 2598 2599 /* set ON period to 70ms and OFF period to 30ms */ 2600 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2601 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2602 } 2603 2604 static void 2605 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2606 { 2607 uint32_t tmp; 2608 2609 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2610 RAL_WRITE(sc, RT2560_CSR5, tmp); 2611 2612 tmp = bssid[4] | bssid[5] << 8; 2613 RAL_WRITE(sc, RT2560_CSR6, tmp); 2614 2615 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2616 } 2617 2618 static void 2619 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2620 { 2621 uint32_t tmp; 2622 2623 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2624 RAL_WRITE(sc, RT2560_CSR3, tmp); 2625 2626 tmp = addr[4] | addr[5] << 8; 2627 RAL_WRITE(sc, RT2560_CSR4, tmp); 2628 2629 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2630 } 2631 2632 static void 2633 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2634 { 2635 uint32_t tmp; 2636 2637 tmp = RAL_READ(sc, RT2560_CSR3); 2638 addr[0] = tmp & 0xff; 2639 addr[1] = (tmp >> 8) & 0xff; 2640 addr[2] = (tmp >> 16) & 0xff; 2641 addr[3] = (tmp >> 24); 2642 2643 tmp = RAL_READ(sc, RT2560_CSR4); 2644 addr[4] = tmp & 0xff; 2645 addr[5] = (tmp >> 8) & 0xff; 2646 } 2647 2648 static void 2649 rt2560_update_promisc(struct rt2560_softc *sc) 2650 { 2651 struct ifnet *ifp = &sc->sc_if; 2652 uint32_t tmp; 2653 2654 tmp = RAL_READ(sc, RT2560_RXCSR0); 2655 2656 tmp &= ~RT2560_DROP_NOT_TO_ME; 2657 if (!(ifp->if_flags & IFF_PROMISC)) 2658 tmp |= RT2560_DROP_NOT_TO_ME; 2659 2660 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2661 2662 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2663 "entering" : "leaving")); 2664 } 2665 2666 static void 2667 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2668 { 2669 uint32_t tmp; 2670 uint8_t tx; 2671 2672 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2673 if (antenna == 1) 2674 tx |= RT2560_BBP_ANTA; 2675 else if (antenna == 2) 2676 tx |= RT2560_BBP_ANTB; 2677 else 2678 tx |= RT2560_BBP_DIVERSITY; 2679 2680 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2681 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2682 sc->rf_rev == RT2560_RF_5222) 2683 tx |= RT2560_BBP_FLIPIQ; 2684 2685 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2686 2687 /* update values for CCK and OFDM in BBPCSR1 */ 2688 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2689 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2690 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2691 } 2692 2693 static void 2694 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2695 { 2696 uint8_t rx; 2697 2698 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2699 if (antenna == 1) 2700 rx |= RT2560_BBP_ANTA; 2701 else if (antenna == 2) 2702 rx |= RT2560_BBP_ANTB; 2703 else 2704 rx |= RT2560_BBP_DIVERSITY; 2705 2706 /* need to force no I/Q flip for RF 2525e and 2526 */ 2707 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2708 rx &= ~RT2560_BBP_FLIPIQ; 2709 2710 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2711 } 2712 2713 static const char * 2714 rt2560_get_rf(int rev) 2715 { 2716 switch (rev) { 2717 case RT2560_RF_2522: return "RT2522"; 2718 case RT2560_RF_2523: return "RT2523"; 2719 case RT2560_RF_2524: return "RT2524"; 2720 case RT2560_RF_2525: return "RT2525"; 2721 case RT2560_RF_2525E: return "RT2525e"; 2722 case RT2560_RF_2526: return "RT2526"; 2723 case RT2560_RF_5222: return "RT5222"; 2724 default: return "unknown"; 2725 } 2726 } 2727 2728 static void 2729 rt2560_read_eeprom(struct rt2560_softc *sc) 2730 { 2731 uint16_t val; 2732 int i; 2733 2734 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2735 sc->rf_rev = (val >> 11) & 0x1f; 2736 sc->hw_radio = (val >> 10) & 0x1; 2737 sc->led_mode = (val >> 6) & 0x7; 2738 sc->rx_ant = (val >> 4) & 0x3; 2739 sc->tx_ant = (val >> 2) & 0x3; 2740 sc->nb_ant = val & 0x3; 2741 2742 /* read default values for BBP registers */ 2743 for (i = 0; i < 16; i++) { 2744 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2745 sc->bbp_prom[i].reg = val >> 8; 2746 sc->bbp_prom[i].val = val & 0xff; 2747 } 2748 2749 /* read Tx power for all b/g channels */ 2750 for (i = 0; i < 14 / 2; i++) { 2751 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2752 sc->txpow[i * 2] = val >> 8; 2753 sc->txpow[i * 2 + 1] = val & 0xff; 2754 } 2755 } 2756 2757 static int 2758 rt2560_bbp_init(struct rt2560_softc *sc) 2759 { 2760 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2761 int i, ntries; 2762 2763 /* wait for BBP to be ready */ 2764 for (ntries = 0; ntries < 100; ntries++) { 2765 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2766 break; 2767 DELAY(1); 2768 } 2769 if (ntries == 100) { 2770 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2771 return EIO; 2772 } 2773 2774 /* initialize BBP registers to default values */ 2775 for (i = 0; i < N(rt2560_def_bbp); i++) { 2776 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2777 rt2560_def_bbp[i].val); 2778 } 2779 #if 0 2780 /* initialize BBP registers to values stored in EEPROM */ 2781 for (i = 0; i < 16; i++) { 2782 if (sc->bbp_prom[i].reg == 0xff) 2783 continue; 2784 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2785 } 2786 #endif 2787 2788 return 0; 2789 #undef N 2790 } 2791 2792 static int 2793 rt2560_init(struct ifnet *ifp) 2794 { 2795 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2796 struct rt2560_softc *sc = ifp->if_softc; 2797 struct ieee80211com *ic = &sc->sc_ic; 2798 uint32_t tmp; 2799 int i; 2800 2801 /* for CardBus, power on the socket */ 2802 if (!(sc->sc_flags & RT2560_ENABLED)) { 2803 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2804 printf("%s: could not enable device\n", 2805 sc->sc_dev.dv_xname); 2806 return EIO; 2807 } 2808 sc->sc_flags |= RT2560_ENABLED; 2809 } 2810 2811 rt2560_stop(sc); 2812 2813 /* setup tx rings */ 2814 tmp = RT2560_PRIO_RING_COUNT << 24 | 2815 RT2560_ATIM_RING_COUNT << 16 | 2816 RT2560_TX_RING_COUNT << 8 | 2817 RT2560_TX_DESC_SIZE; 2818 2819 /* rings _must_ be initialized in this _exact_ order! */ 2820 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2821 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2822 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2823 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2824 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2825 2826 /* setup rx ring */ 2827 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2828 2829 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2830 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2831 2832 /* initialize MAC registers to default values */ 2833 for (i = 0; i < N(rt2560_def_mac); i++) 2834 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2835 2836 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2837 rt2560_set_macaddr(sc, ic->ic_myaddr); 2838 2839 /* set basic rate set (will be updated later) */ 2840 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2841 2842 rt2560_set_txantenna(sc, 1); 2843 rt2560_set_rxantenna(sc, 1); 2844 rt2560_update_slot(ifp); 2845 rt2560_update_plcp(sc); 2846 rt2560_update_led(sc, 0, 0); 2847 2848 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2849 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2850 2851 if (rt2560_bbp_init(sc) != 0) { 2852 rt2560_stop(sc); 2853 return EIO; 2854 } 2855 2856 /* set default BSS channel */ 2857 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2858 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2859 2860 /* kick Rx */ 2861 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2862 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2863 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2864 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2865 tmp |= RT2560_DROP_TODS; 2866 if (!(ifp->if_flags & IFF_PROMISC)) 2867 tmp |= RT2560_DROP_NOT_TO_ME; 2868 } 2869 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2870 2871 /* clear old FCS and Rx FIFO errors */ 2872 RAL_READ(sc, RT2560_CNT0); 2873 RAL_READ(sc, RT2560_CNT4); 2874 2875 /* clear any pending interrupts */ 2876 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2877 2878 /* enable interrupts */ 2879 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2880 2881 ifp->if_flags &= ~IFF_OACTIVE; 2882 ifp->if_flags |= IFF_RUNNING; 2883 2884 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2885 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2886 else 2887 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2888 2889 return 0; 2890 #undef N 2891 } 2892 2893 static void 2894 rt2560_stop(void *priv) 2895 { 2896 struct rt2560_softc *sc = priv; 2897 struct ieee80211com *ic = &sc->sc_ic; 2898 struct ifnet *ifp = ic->ic_ifp; 2899 2900 sc->sc_tx_timer = 0; 2901 ifp->if_timer = 0; 2902 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2903 2904 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2905 2906 /* abort Tx */ 2907 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2908 2909 /* disable Rx */ 2910 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2911 2912 /* reset ASIC (and thus, BBP) */ 2913 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2914 RAL_WRITE(sc, RT2560_CSR1, 0); 2915 2916 /* disable interrupts */ 2917 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2918 2919 /* clear any pending interrupt */ 2920 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2921 2922 /* reset Tx and Rx rings */ 2923 rt2560_reset_tx_ring(sc, &sc->txq); 2924 rt2560_reset_tx_ring(sc, &sc->atimq); 2925 rt2560_reset_tx_ring(sc, &sc->prioq); 2926 rt2560_reset_tx_ring(sc, &sc->bcnq); 2927 rt2560_reset_rx_ring(sc, &sc->rxq); 2928 2929 } 2930 2931 static void 2932 rt2560_powerhook(int why, void *opaque) 2933 { 2934 struct rt2560_softc *sc; 2935 struct ifnet *ifp; 2936 int s; 2937 2938 sc = (struct rt2560_softc *)opaque; 2939 ifp = &sc->sc_if; 2940 2941 s = splnet(); 2942 switch (why) { 2943 case PWR_SUSPEND: 2944 sc->sc_suspend = why; 2945 rt2560_stop(sc); 2946 if (sc->sc_power != NULL) 2947 (*sc->sc_power)(sc, why); 2948 break; 2949 case PWR_RESUME: 2950 sc->sc_suspend = why; 2951 if (ifp->if_flags & IFF_UP) { 2952 if (sc->sc_power != NULL) 2953 (*sc->sc_power)(sc, why); 2954 rt2560_init(ifp); 2955 if (ifp->if_flags & IFF_RUNNING) 2956 rt2560_start(ifp); 2957 } 2958 break; 2959 case PWR_STANDBY: 2960 case PWR_SOFTSUSPEND: 2961 case PWR_SOFTRESUME: 2962 break; 2963 } 2964 splx(s); 2965 2966 return; 2967 } 2968
Indexes created Sun Oct 19 02:09:48 GMT 2025