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rt2661.c revision 1.29.16.1
      1  1.29.16.1     skrll /*	$NetBSD: rt2661.c,v 1.29.16.1 2015/04/06 15:18:09 skrll Exp $	*/
      2        1.1    rpaulo /*	$OpenBSD: rt2661.c,v 1.17 2006/05/01 08:41:11 damien Exp $	*/
      3        1.1    rpaulo /*	$FreeBSD: rt2560.c,v 1.5 2006/06/02 19:59:31 csjp Exp $	*/
      4        1.1    rpaulo 
      5        1.1    rpaulo /*-
      6        1.1    rpaulo  * Copyright (c) 2006
      7        1.1    rpaulo  *	Damien Bergamini <damien.bergamini (at) free.fr>
      8        1.1    rpaulo  *
      9        1.1    rpaulo  * Permission to use, copy, modify, and distribute this software for any
     10        1.1    rpaulo  * purpose with or without fee is hereby granted, provided that the above
     11        1.1    rpaulo  * copyright notice and this permission notice appear in all copies.
     12        1.1    rpaulo  *
     13        1.1    rpaulo  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
     14        1.1    rpaulo  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
     15        1.1    rpaulo  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
     16        1.1    rpaulo  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
     17        1.1    rpaulo  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
     18        1.1    rpaulo  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
     19        1.1    rpaulo  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
     20        1.1    rpaulo  */
     21        1.1    rpaulo 
     22        1.1    rpaulo /*-
     23        1.1    rpaulo  * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
     24        1.1    rpaulo  * http://www.ralinktech.com/
     25        1.1    rpaulo  */
     26        1.1    rpaulo 
     27        1.1    rpaulo #include <sys/cdefs.h>
     28  1.29.16.1     skrll __KERNEL_RCSID(0, "$NetBSD: rt2661.c,v 1.29.16.1 2015/04/06 15:18:09 skrll Exp $");
     29        1.1    rpaulo 
     30        1.1    rpaulo 
     31        1.1    rpaulo #include <sys/param.h>
     32        1.1    rpaulo #include <sys/sockio.h>
     33        1.1    rpaulo #include <sys/sysctl.h>
     34        1.1    rpaulo #include <sys/mbuf.h>
     35        1.1    rpaulo #include <sys/kernel.h>
     36        1.1    rpaulo #include <sys/socket.h>
     37        1.1    rpaulo #include <sys/systm.h>
     38        1.1    rpaulo #include <sys/malloc.h>
     39        1.1    rpaulo #include <sys/callout.h>
     40        1.1    rpaulo #include <sys/conf.h>
     41        1.1    rpaulo #include <sys/device.h>
     42        1.1    rpaulo 
     43       1.19        ad #include <sys/bus.h>
     44        1.1    rpaulo #include <machine/endian.h>
     45       1.19        ad #include <sys/intr.h>
     46        1.1    rpaulo 
     47        1.1    rpaulo #include <net/bpf.h>
     48        1.1    rpaulo #include <net/if.h>
     49        1.1    rpaulo #include <net/if_arp.h>
     50        1.1    rpaulo #include <net/if_dl.h>
     51        1.1    rpaulo #include <net/if_media.h>
     52        1.1    rpaulo #include <net/if_types.h>
     53        1.1    rpaulo #include <net/if_ether.h>
     54        1.1    rpaulo 
     55        1.1    rpaulo #include <netinet/in.h>
     56        1.1    rpaulo #include <netinet/in_systm.h>
     57        1.1    rpaulo #include <netinet/in_var.h>
     58        1.1    rpaulo #include <netinet/ip.h>
     59        1.1    rpaulo 
     60        1.1    rpaulo #include <net80211/ieee80211_var.h>
     61       1.24       scw #include <net80211/ieee80211_amrr.h>
     62        1.1    rpaulo #include <net80211/ieee80211_radiotap.h>
     63        1.1    rpaulo 
     64        1.1    rpaulo #include <dev/ic/rt2661reg.h>
     65        1.1    rpaulo #include <dev/ic/rt2661var.h>
     66        1.1    rpaulo 
     67        1.1    rpaulo #include <dev/pci/pcireg.h>
     68        1.1    rpaulo #include <dev/pci/pcivar.h>
     69        1.1    rpaulo #include <dev/pci/pcidevs.h>
     70        1.1    rpaulo 
     71        1.1    rpaulo #include <dev/firmload.h>
     72        1.1    rpaulo 
     73        1.1    rpaulo #ifdef RAL_DEBUG
     74        1.1    rpaulo #define DPRINTF(x)	do { if (rt2661_debug > 0) printf x; } while (0)
     75        1.1    rpaulo #define DPRINTFN(n, x)	do { if (rt2661_debug >= (n)) printf x; } while (0)
     76        1.1    rpaulo int rt2661_debug = 0;
     77        1.1    rpaulo #else
     78        1.1    rpaulo #define DPRINTF(x)
     79        1.1    rpaulo #define DPRINTFN(n, x)
     80        1.1    rpaulo #endif
     81        1.1    rpaulo 
     82        1.1    rpaulo static int	rt2661_alloc_tx_ring(struct rt2661_softc *,
     83        1.1    rpaulo 		    struct rt2661_tx_ring *, int);
     84        1.1    rpaulo static void	rt2661_reset_tx_ring(struct rt2661_softc *,
     85        1.1    rpaulo 		    struct rt2661_tx_ring *);
     86        1.1    rpaulo static void	rt2661_free_tx_ring(struct rt2661_softc *,
     87        1.1    rpaulo 		    struct rt2661_tx_ring *);
     88        1.1    rpaulo static int	rt2661_alloc_rx_ring(struct rt2661_softc *,
     89        1.1    rpaulo 		    struct rt2661_rx_ring *, int);
     90        1.1    rpaulo static void	rt2661_reset_rx_ring(struct rt2661_softc *,
     91        1.1    rpaulo 		    struct rt2661_rx_ring *);
     92        1.1    rpaulo static void	rt2661_free_rx_ring(struct rt2661_softc *,
     93        1.1    rpaulo 		    struct rt2661_rx_ring *);
     94        1.1    rpaulo static struct ieee80211_node *
     95        1.1    rpaulo 		rt2661_node_alloc(struct ieee80211_node_table *);
     96        1.1    rpaulo static int	rt2661_media_change(struct ifnet *);
     97        1.1    rpaulo static void	rt2661_next_scan(void *);
     98        1.1    rpaulo static void	rt2661_iter_func(void *, struct ieee80211_node *);
     99       1.24       scw static void	rt2661_updatestats(void *);
    100       1.24       scw static void	rt2661_newassoc(struct ieee80211_node *, int);
    101        1.1    rpaulo static int	rt2661_newstate(struct ieee80211com *, enum ieee80211_state,
    102        1.1    rpaulo 		    int);
    103        1.1    rpaulo static uint16_t	rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
    104        1.1    rpaulo static void	rt2661_tx_intr(struct rt2661_softc *);
    105        1.1    rpaulo static void	rt2661_tx_dma_intr(struct rt2661_softc *,
    106        1.1    rpaulo 		    struct rt2661_tx_ring *);
    107        1.1    rpaulo static void	rt2661_rx_intr(struct rt2661_softc *);
    108        1.1    rpaulo static void	rt2661_mcu_beacon_expire(struct rt2661_softc *);
    109        1.1    rpaulo static void	rt2661_mcu_wakeup(struct rt2661_softc *);
    110        1.1    rpaulo static void	rt2661_mcu_cmd_intr(struct rt2661_softc *);
    111        1.1    rpaulo int		rt2661_intr(void *);
    112        1.1    rpaulo static uint8_t	rt2661_rxrate(struct rt2661_rx_desc *);
    113        1.1    rpaulo static int	rt2661_ack_rate(struct ieee80211com *, int);
    114        1.1    rpaulo static uint16_t	rt2661_txtime(int, int, uint32_t);
    115        1.1    rpaulo static uint8_t	rt2661_plcp_signal(int);
    116        1.1    rpaulo static void	rt2661_setup_tx_desc(struct rt2661_softc *,
    117        1.1    rpaulo 		    struct rt2661_tx_desc *, uint32_t, uint16_t, int, int,
    118        1.1    rpaulo 		    const bus_dma_segment_t *, int, int);
    119        1.1    rpaulo static int	rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
    120        1.1    rpaulo 		    struct ieee80211_node *);
    121        1.1    rpaulo static struct mbuf *
    122        1.1    rpaulo 		rt2661_get_rts(struct rt2661_softc *,
    123        1.1    rpaulo 		    struct ieee80211_frame *, uint16_t);
    124        1.1    rpaulo static int	rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
    125        1.1    rpaulo 		    struct ieee80211_node *, int);
    126        1.1    rpaulo static void	rt2661_start(struct ifnet *);
    127        1.1    rpaulo static void	rt2661_watchdog(struct ifnet *);
    128        1.1    rpaulo static int	rt2661_reset(struct ifnet *);
    129       1.14  christos static int	rt2661_ioctl(struct ifnet *, u_long, void *);
    130        1.1    rpaulo static void	rt2661_bbp_write(struct rt2661_softc *, uint8_t, uint8_t);
    131        1.1    rpaulo static uint8_t	rt2661_bbp_read(struct rt2661_softc *, uint8_t);
    132        1.1    rpaulo static void	rt2661_rf_write(struct rt2661_softc *, uint8_t, uint32_t);
    133        1.1    rpaulo static int	rt2661_tx_cmd(struct rt2661_softc *, uint8_t, uint16_t);
    134        1.1    rpaulo static void	rt2661_select_antenna(struct rt2661_softc *);
    135        1.1    rpaulo static void	rt2661_enable_mrr(struct rt2661_softc *);
    136        1.1    rpaulo static void	rt2661_set_txpreamble(struct rt2661_softc *);
    137        1.1    rpaulo static void	rt2661_set_basicrates(struct rt2661_softc *,
    138        1.1    rpaulo 			const struct ieee80211_rateset *);
    139        1.1    rpaulo static void	rt2661_select_band(struct rt2661_softc *,
    140        1.1    rpaulo 		    struct ieee80211_channel *);
    141        1.1    rpaulo static void	rt2661_set_chan(struct rt2661_softc *,
    142        1.1    rpaulo 		    struct ieee80211_channel *);
    143        1.1    rpaulo static void	rt2661_set_bssid(struct rt2661_softc *, const uint8_t *);
    144        1.1    rpaulo static void	rt2661_set_macaddr(struct rt2661_softc *, const uint8_t *);
    145        1.1    rpaulo static void	rt2661_update_promisc(struct rt2661_softc *);
    146       1.13  christos #if 0
    147       1.13  christos static int	rt2661_wme_update(struct ieee80211com *);
    148       1.13  christos #endif
    149        1.1    rpaulo 
    150       1.24       scw static void	rt2661_updateslot(struct ifnet *);
    151       1.24       scw static void	rt2661_set_slottime(struct rt2661_softc *);
    152        1.1    rpaulo static const char *
    153        1.1    rpaulo 		rt2661_get_rf(int);
    154        1.1    rpaulo static void	rt2661_read_eeprom(struct rt2661_softc *);
    155        1.1    rpaulo static int	rt2661_bbp_init(struct rt2661_softc *);
    156        1.1    rpaulo static int     	rt2661_init(struct ifnet *);
    157        1.1    rpaulo static void	rt2661_stop(struct ifnet *, int);
    158        1.1    rpaulo static int	rt2661_load_microcode(struct rt2661_softc *, const uint8_t *,
    159        1.1    rpaulo 		    int);
    160       1.24       scw static void	rt2661_rx_tune(struct rt2661_softc *);
    161        1.7    rpaulo #ifdef notyet
    162        1.1    rpaulo static void	rt2661_radar_start(struct rt2661_softc *);
    163        1.1    rpaulo static int	rt2661_radar_stop(struct rt2661_softc *);
    164        1.1    rpaulo #endif
    165        1.1    rpaulo static int	rt2661_prepare_beacon(struct rt2661_softc *);
    166        1.1    rpaulo static void	rt2661_enable_tsf_sync(struct rt2661_softc *);
    167        1.1    rpaulo static int	rt2661_get_rssi(struct rt2661_softc *, uint8_t);
    168        1.1    rpaulo 
    169        1.1    rpaulo /*
    170        1.1    rpaulo  * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
    171        1.1    rpaulo  */
    172        1.1    rpaulo static const struct ieee80211_rateset rt2661_rateset_11a =
    173        1.1    rpaulo 	{ 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
    174        1.1    rpaulo 
    175        1.1    rpaulo static const struct ieee80211_rateset rt2661_rateset_11b =
    176        1.1    rpaulo 	{ 4, { 2, 4, 11, 22 } };
    177        1.1    rpaulo 
    178        1.1    rpaulo static const struct ieee80211_rateset rt2661_rateset_11g =
    179        1.1    rpaulo 	{ 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
    180        1.1    rpaulo 
    181        1.1    rpaulo static const struct {
    182        1.1    rpaulo 	uint32_t	reg;
    183        1.1    rpaulo 	uint32_t	val;
    184        1.1    rpaulo } rt2661_def_mac[] = {
    185       1.24       scw 	RT2661_DEF_MAC
    186        1.1    rpaulo };
    187        1.1    rpaulo 
    188        1.1    rpaulo static const struct {
    189        1.1    rpaulo 	uint8_t	reg;
    190        1.1    rpaulo 	uint8_t	val;
    191        1.1    rpaulo } rt2661_def_bbp[] = {
    192       1.24       scw 	RT2661_DEF_BBP
    193        1.1    rpaulo };
    194        1.1    rpaulo 
    195        1.1    rpaulo static const struct rfprog {
    196        1.1    rpaulo 	uint8_t		chan;
    197       1.24       scw 	uint32_t	r1, r2, r3, r4;
    198        1.1    rpaulo } rt2661_rf5225_1[] = {
    199       1.24       scw 	RT2661_RF5225_1
    200        1.1    rpaulo }, rt2661_rf5225_2[] = {
    201       1.24       scw 	RT2661_RF5225_2
    202        1.1    rpaulo };
    203        1.1    rpaulo 
    204        1.1    rpaulo int
    205        1.1    rpaulo rt2661_attach(void *xsc, int id)
    206        1.1    rpaulo {
    207        1.1    rpaulo 	struct rt2661_softc *sc = xsc;
    208        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
    209        1.1    rpaulo 	struct ifnet *ifp = &sc->sc_if;
    210        1.1    rpaulo 	uint32_t val;
    211        1.1    rpaulo 	int error, i, ntries;
    212        1.1    rpaulo 
    213        1.1    rpaulo 	sc->sc_id = id;
    214        1.1    rpaulo 
    215       1.24       scw 	sc->amrr.amrr_min_success_threshold =  1;
    216       1.24       scw 	sc->amrr.amrr_max_success_threshold = 15;
    217       1.15        ad 	callout_init(&sc->scan_ch, 0);
    218       1.24       scw 	callout_init(&sc->amrr_ch, 0);
    219        1.1    rpaulo 
    220        1.1    rpaulo 	/* wait for NIC to initialize */
    221        1.1    rpaulo 	for (ntries = 0; ntries < 1000; ntries++) {
    222        1.1    rpaulo 		if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
    223        1.1    rpaulo 			break;
    224        1.1    rpaulo 		DELAY(1000);
    225        1.1    rpaulo 	}
    226        1.1    rpaulo 	if (ntries == 1000) {
    227       1.29  drochner 		aprint_error_dev(sc->sc_dev, "timeout waiting for NIC to initialize\n");
    228        1.1    rpaulo 		return EIO;
    229        1.1    rpaulo 	}
    230        1.1    rpaulo 
    231        1.1    rpaulo 	/* retrieve RF rev. no and various other things from EEPROM */
    232        1.1    rpaulo 	rt2661_read_eeprom(sc);
    233       1.29  drochner 	aprint_normal_dev(sc->sc_dev, "802.11 address %s\n",
    234        1.1    rpaulo 	    ether_sprintf(ic->ic_myaddr));
    235        1.1    rpaulo 
    236       1.29  drochner 	aprint_normal_dev(sc->sc_dev, "MAC/BBP RT%X, RF %s\n", val,
    237        1.1    rpaulo 	    rt2661_get_rf(sc->rf_rev));
    238        1.1    rpaulo 
    239        1.1    rpaulo 	/*
    240        1.1    rpaulo 	 * Allocate Tx and Rx rings.
    241        1.1    rpaulo 	 */
    242        1.1    rpaulo 	error = rt2661_alloc_tx_ring(sc, &sc->txq[0], RT2661_TX_RING_COUNT);
    243        1.1    rpaulo 	if (error != 0) {
    244       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate Tx ring 0\n");
    245        1.1    rpaulo 		goto fail1;
    246        1.1    rpaulo 	}
    247        1.1    rpaulo 
    248        1.1    rpaulo 	error = rt2661_alloc_tx_ring(sc, &sc->txq[1], RT2661_TX_RING_COUNT);
    249        1.1    rpaulo 	if (error != 0) {
    250       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate Tx ring 1\n");
    251        1.1    rpaulo 		goto fail2;
    252        1.1    rpaulo 	}
    253        1.1    rpaulo 
    254        1.1    rpaulo 	error = rt2661_alloc_tx_ring(sc, &sc->txq[2], RT2661_TX_RING_COUNT);
    255        1.1    rpaulo 	if (error != 0) {
    256       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate Tx ring 2\n");
    257        1.1    rpaulo 		goto fail3;
    258        1.1    rpaulo 	}
    259        1.1    rpaulo 
    260        1.1    rpaulo 	error = rt2661_alloc_tx_ring(sc, &sc->txq[3], RT2661_TX_RING_COUNT);
    261        1.1    rpaulo 	if (error != 0) {
    262       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate Tx ring 3\n");
    263        1.1    rpaulo 		goto fail4;
    264        1.1    rpaulo 	}
    265        1.1    rpaulo 
    266        1.1    rpaulo 	error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
    267        1.1    rpaulo 	if (error != 0) {
    268       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate Mgt ring\n");
    269        1.1    rpaulo 		goto fail5;
    270        1.1    rpaulo 	}
    271        1.1    rpaulo 
    272        1.1    rpaulo 	error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
    273        1.1    rpaulo 	if (error != 0) {
    274       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n");
    275        1.1    rpaulo 		goto fail6;
    276        1.1    rpaulo 	}
    277        1.1    rpaulo 
    278        1.1    rpaulo 	ifp->if_softc = sc;
    279        1.1    rpaulo 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    280        1.1    rpaulo 	ifp->if_init = rt2661_init;
    281       1.21  jmcneill 	ifp->if_stop = rt2661_stop;
    282        1.1    rpaulo 	ifp->if_ioctl = rt2661_ioctl;
    283        1.1    rpaulo 	ifp->if_start = rt2661_start;
    284        1.1    rpaulo 	ifp->if_watchdog = rt2661_watchdog;
    285        1.1    rpaulo 	IFQ_SET_READY(&ifp->if_snd);
    286       1.29  drochner 	memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ);
    287        1.1    rpaulo 
    288        1.1    rpaulo 	ic->ic_ifp = ifp;
    289        1.1    rpaulo 	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
    290        1.1    rpaulo 	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
    291        1.1    rpaulo 	ic->ic_state = IEEE80211_S_INIT;
    292        1.1    rpaulo 
    293        1.1    rpaulo 	/* set device capabilities */
    294        1.1    rpaulo 	ic->ic_caps =
    295        1.1    rpaulo 	    IEEE80211_C_IBSS |		/* IBSS mode supported */
    296        1.1    rpaulo 	    IEEE80211_C_MONITOR |	/* monitor mode supported */
    297       1.24       scw 	    IEEE80211_C_HOSTAP |	/* HostAP mode supported */
    298        1.1    rpaulo 	    IEEE80211_C_TXPMGT |	/* tx power management */
    299        1.1    rpaulo 	    IEEE80211_C_SHPREAMBLE |	/* short preamble supported */
    300        1.1    rpaulo 	    IEEE80211_C_SHSLOT |	/* short slot time supported */
    301        1.1    rpaulo 	    IEEE80211_C_WPA;		/* 802.11i */
    302        1.1    rpaulo 
    303        1.1    rpaulo 	if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
    304        1.1    rpaulo 		/* set supported .11a rates */
    305        1.1    rpaulo 		ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2661_rateset_11a;
    306        1.1    rpaulo 
    307        1.1    rpaulo 		/* set supported .11a channels */
    308        1.1    rpaulo 		for (i = 36; i <= 64; i += 4) {
    309        1.1    rpaulo 			ic->ic_channels[i].ic_freq =
    310        1.1    rpaulo 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
    311        1.1    rpaulo 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
    312        1.1    rpaulo 		}
    313        1.1    rpaulo 		for (i = 100; i <= 140; i += 4) {
    314        1.1    rpaulo 			ic->ic_channels[i].ic_freq =
    315        1.1    rpaulo 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
    316        1.1    rpaulo 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
    317        1.1    rpaulo 		}
    318        1.1    rpaulo 		for (i = 149; i <= 165; i += 4) {
    319        1.1    rpaulo 			ic->ic_channels[i].ic_freq =
    320        1.1    rpaulo 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
    321        1.1    rpaulo 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
    322        1.1    rpaulo 		}
    323        1.1    rpaulo 	}
    324        1.1    rpaulo 
    325        1.1    rpaulo 	/* set supported .11b and .11g rates */
    326        1.1    rpaulo 	ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2661_rateset_11b;
    327        1.1    rpaulo 	ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2661_rateset_11g;
    328        1.1    rpaulo 
    329        1.1    rpaulo 	/* set supported .11b and .11g channels (1 through 14) */
    330        1.1    rpaulo 	for (i = 1; i <= 14; i++) {
    331        1.1    rpaulo 		ic->ic_channels[i].ic_freq =
    332        1.1    rpaulo 		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
    333        1.1    rpaulo 		ic->ic_channels[i].ic_flags =
    334        1.1    rpaulo 		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
    335        1.1    rpaulo 		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
    336        1.1    rpaulo 	}
    337        1.1    rpaulo 
    338        1.1    rpaulo 	if_attach(ifp);
    339        1.1    rpaulo 	ieee80211_ifattach(ic);
    340        1.1    rpaulo 	ic->ic_node_alloc = rt2661_node_alloc;
    341       1.24       scw 	ic->ic_newassoc = rt2661_newassoc;
    342       1.24       scw 	ic->ic_updateslot = rt2661_updateslot;
    343        1.1    rpaulo 	ic->ic_reset = rt2661_reset;
    344        1.1    rpaulo 
    345        1.1    rpaulo 	/* override state transition machine */
    346        1.1    rpaulo 	sc->sc_newstate = ic->ic_newstate;
    347        1.1    rpaulo 	ic->ic_newstate = rt2661_newstate;
    348        1.1    rpaulo 	ieee80211_media_init(ic, rt2661_media_change, ieee80211_media_status);
    349        1.1    rpaulo 
    350       1.28     joerg 	bpf_attach2(ifp, DLT_IEEE802_11_RADIO,
    351       1.27     pooka 	    sizeof(struct ieee80211_frame) + sizeof(sc->sc_txtap),
    352       1.24       scw 	    &sc->sc_drvbpf);
    353        1.1    rpaulo 
    354       1.24       scw 	sc->sc_rxtap_len = roundup(sizeof(sc->sc_rxtap), sizeof(u_int32_t));
    355        1.1    rpaulo 	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
    356        1.1    rpaulo 	sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2661_RX_RADIOTAP_PRESENT);
    357        1.1    rpaulo 
    358       1.24       scw 	sc->sc_txtap_len = roundup(sizeof(sc->sc_txtap), sizeof(u_int32_t));
    359        1.1    rpaulo 	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
    360        1.1    rpaulo 	sc->sc_txtap.wt_ihdr.it_present = htole32(RT2661_TX_RADIOTAP_PRESENT);
    361        1.1    rpaulo 
    362        1.1    rpaulo 	ieee80211_announce(ic);
    363        1.1    rpaulo 
    364       1.29  drochner 	if (pmf_device_register(sc->sc_dev, NULL, NULL))
    365       1.29  drochner 		pmf_class_network_register(sc->sc_dev, ifp);
    366       1.21  jmcneill 	else
    367       1.29  drochner 		aprint_error_dev(sc->sc_dev,
    368       1.26   tsutsui 		    "couldn't establish power handler\n");
    369       1.21  jmcneill 
    370        1.1    rpaulo 	return 0;
    371        1.1    rpaulo 
    372        1.1    rpaulo fail6:	rt2661_free_tx_ring(sc, &sc->mgtq);
    373        1.1    rpaulo fail5:	rt2661_free_tx_ring(sc, &sc->txq[3]);
    374        1.1    rpaulo fail4:	rt2661_free_tx_ring(sc, &sc->txq[2]);
    375        1.1    rpaulo fail3:	rt2661_free_tx_ring(sc, &sc->txq[1]);
    376        1.1    rpaulo fail2:	rt2661_free_tx_ring(sc, &sc->txq[0]);
    377        1.1    rpaulo fail1:	return ENXIO;
    378        1.1    rpaulo }
    379        1.1    rpaulo 
    380        1.1    rpaulo int
    381        1.1    rpaulo rt2661_detach(void *xsc)
    382        1.1    rpaulo {
    383        1.1    rpaulo 	struct rt2661_softc *sc = xsc;
    384        1.1    rpaulo 	struct ifnet *ifp = &sc->sc_if;
    385        1.1    rpaulo 
    386        1.1    rpaulo 	callout_stop(&sc->scan_ch);
    387       1.24       scw 	callout_stop(&sc->amrr_ch);
    388        1.1    rpaulo 
    389       1.29  drochner 	pmf_device_deregister(sc->sc_dev);
    390       1.21  jmcneill 
    391        1.1    rpaulo 	ieee80211_ifdetach(&sc->sc_ic);
    392        1.1    rpaulo 	if_detach(ifp);
    393        1.1    rpaulo 
    394        1.1    rpaulo 	rt2661_free_tx_ring(sc, &sc->txq[0]);
    395        1.1    rpaulo 	rt2661_free_tx_ring(sc, &sc->txq[1]);
    396        1.1    rpaulo 	rt2661_free_tx_ring(sc, &sc->txq[2]);
    397        1.1    rpaulo 	rt2661_free_tx_ring(sc, &sc->txq[3]);
    398        1.1    rpaulo 	rt2661_free_tx_ring(sc, &sc->mgtq);
    399        1.1    rpaulo 	rt2661_free_rx_ring(sc, &sc->rxq);
    400        1.1    rpaulo 
    401        1.1    rpaulo 	return 0;
    402        1.1    rpaulo }
    403        1.1    rpaulo 
    404        1.1    rpaulo static int
    405        1.1    rpaulo rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
    406        1.1    rpaulo     int count)
    407        1.1    rpaulo {
    408        1.1    rpaulo 	int i, nsegs, error;
    409        1.1    rpaulo 
    410        1.1    rpaulo 	ring->count = count;
    411        1.1    rpaulo 	ring->queued = 0;
    412        1.1    rpaulo 	ring->cur = ring->next = ring->stat = 0;
    413        1.1    rpaulo 
    414        1.1    rpaulo 	error = bus_dmamap_create(sc->sc_dmat, count * RT2661_TX_DESC_SIZE, 1,
    415        1.1    rpaulo 	    count * RT2661_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
    416        1.1    rpaulo 	if (error != 0) {
    417       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n");
    418        1.1    rpaulo 		goto fail;
    419        1.1    rpaulo 	}
    420        1.1    rpaulo 
    421        1.1    rpaulo 	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2661_TX_DESC_SIZE,
    422        1.1    rpaulo 	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
    423        1.1    rpaulo 	if (error != 0) {
    424       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n");
    425        1.1    rpaulo 		goto fail;
    426        1.1    rpaulo 	}
    427        1.1    rpaulo 
    428        1.1    rpaulo 	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
    429       1.14  christos 	    count * RT2661_TX_DESC_SIZE, (void **)&ring->desc,
    430        1.1    rpaulo 	    BUS_DMA_NOWAIT);
    431        1.1    rpaulo 	if (error != 0) {
    432       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n");
    433        1.1    rpaulo 		goto fail;
    434        1.1    rpaulo 	}
    435        1.1    rpaulo 
    436        1.1    rpaulo 	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
    437        1.1    rpaulo 	    count * RT2661_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
    438        1.1    rpaulo 	if (error != 0) {
    439       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n");
    440        1.1    rpaulo 		goto fail;
    441        1.1    rpaulo 	}
    442        1.1    rpaulo 
    443        1.1    rpaulo 	memset(ring->desc, 0, count * RT2661_TX_DESC_SIZE);
    444        1.1    rpaulo 	ring->physaddr = ring->map->dm_segs->ds_addr;
    445        1.1    rpaulo 
    446        1.1    rpaulo 	ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
    447        1.1    rpaulo 	    M_NOWAIT);
    448        1.1    rpaulo 	if (ring->data == NULL) {
    449       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate soft data\n");
    450        1.1    rpaulo 		error = ENOMEM;
    451        1.1    rpaulo 		goto fail;
    452        1.1    rpaulo 	}
    453        1.1    rpaulo 
    454        1.1    rpaulo 	memset(ring->data, 0, count * sizeof (struct rt2661_tx_data));
    455        1.1    rpaulo 	for (i = 0; i < count; i++) {
    456        1.1    rpaulo 		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
    457        1.1    rpaulo 		    RT2661_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
    458        1.1    rpaulo 		    &ring->data[i].map);
    459        1.1    rpaulo 		if (error != 0) {
    460       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
    461        1.1    rpaulo 			goto fail;
    462        1.1    rpaulo 		}
    463        1.1    rpaulo 	}
    464        1.1    rpaulo 
    465        1.1    rpaulo 	return 0;
    466        1.1    rpaulo 
    467        1.1    rpaulo fail:	rt2661_free_tx_ring(sc, ring);
    468        1.1    rpaulo 	return error;
    469        1.1    rpaulo }
    470        1.1    rpaulo 
    471        1.1    rpaulo static void
    472        1.1    rpaulo rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
    473        1.1    rpaulo {
    474        1.1    rpaulo 	struct rt2661_tx_desc *desc;
    475        1.1    rpaulo 	struct rt2661_tx_data *data;
    476        1.1    rpaulo 	int i;
    477        1.1    rpaulo 
    478        1.1    rpaulo 	for (i = 0; i < ring->count; i++) {
    479        1.1    rpaulo 		desc = &ring->desc[i];
    480        1.1    rpaulo 		data = &ring->data[i];
    481        1.1    rpaulo 
    482        1.1    rpaulo 		if (data->m != NULL) {
    483        1.1    rpaulo 			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
    484        1.1    rpaulo 			    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
    485        1.1    rpaulo 			bus_dmamap_unload(sc->sc_dmat, data->map);
    486        1.1    rpaulo 			m_freem(data->m);
    487        1.1    rpaulo 			data->m = NULL;
    488        1.1    rpaulo 		}
    489        1.1    rpaulo 
    490        1.1    rpaulo 		if (data->ni != NULL) {
    491        1.1    rpaulo 			ieee80211_free_node(data->ni);
    492        1.1    rpaulo 			data->ni = NULL;
    493        1.1    rpaulo 		}
    494        1.1    rpaulo 
    495        1.1    rpaulo 		desc->flags = 0;
    496        1.1    rpaulo 	}
    497        1.1    rpaulo 
    498        1.1    rpaulo 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
    499        1.1    rpaulo 	    BUS_DMASYNC_PREWRITE);
    500        1.1    rpaulo 
    501        1.1    rpaulo 	ring->queued = 0;
    502        1.1    rpaulo 	ring->cur = ring->next = ring->stat = 0;
    503        1.1    rpaulo }
    504        1.1    rpaulo 
    505        1.1    rpaulo 
    506        1.1    rpaulo static void
    507        1.1    rpaulo rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
    508        1.1    rpaulo {
    509        1.1    rpaulo 	struct rt2661_tx_data *data;
    510        1.1    rpaulo 	int i;
    511        1.1    rpaulo 
    512        1.1    rpaulo 	if (ring->desc != NULL) {
    513        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
    514        1.1    rpaulo 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
    515        1.1    rpaulo 		bus_dmamap_unload(sc->sc_dmat, ring->map);
    516       1.14  christos 		bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc,
    517        1.1    rpaulo 		    ring->count * RT2661_TX_DESC_SIZE);
    518        1.1    rpaulo 		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
    519        1.1    rpaulo 	}
    520        1.1    rpaulo 
    521        1.1    rpaulo 	if (ring->data != NULL) {
    522        1.1    rpaulo 		for (i = 0; i < ring->count; i++) {
    523        1.1    rpaulo 			data = &ring->data[i];
    524        1.1    rpaulo 
    525        1.1    rpaulo 			if (data->m != NULL) {
    526        1.1    rpaulo 				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
    527        1.1    rpaulo 				    data->map->dm_mapsize,
    528        1.1    rpaulo 				    BUS_DMASYNC_POSTWRITE);
    529        1.1    rpaulo 				bus_dmamap_unload(sc->sc_dmat, data->map);
    530        1.1    rpaulo 				m_freem(data->m);
    531        1.1    rpaulo 			}
    532        1.1    rpaulo 
    533        1.1    rpaulo 			if (data->ni != NULL)
    534        1.1    rpaulo 				ieee80211_free_node(data->ni);
    535        1.1    rpaulo 
    536        1.1    rpaulo 			if (data->map != NULL)
    537        1.1    rpaulo 				bus_dmamap_destroy(sc->sc_dmat, data->map);
    538        1.1    rpaulo 		}
    539        1.1    rpaulo 		free(ring->data, M_DEVBUF);
    540        1.1    rpaulo 	}
    541        1.1    rpaulo }
    542        1.1    rpaulo 
    543        1.1    rpaulo static int
    544        1.1    rpaulo rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
    545        1.1    rpaulo     int count)
    546        1.1    rpaulo {
    547        1.1    rpaulo 	struct rt2661_rx_desc *desc;
    548        1.1    rpaulo 	struct rt2661_rx_data *data;
    549        1.1    rpaulo 	int i, nsegs, error;
    550        1.1    rpaulo 
    551        1.1    rpaulo 	ring->count = count;
    552        1.1    rpaulo 	ring->cur = ring->next = 0;
    553        1.1    rpaulo 
    554        1.1    rpaulo 	error = bus_dmamap_create(sc->sc_dmat, count * RT2661_RX_DESC_SIZE, 1,
    555        1.1    rpaulo 	    count * RT2661_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
    556        1.1    rpaulo 	if (error != 0) {
    557       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n");
    558        1.1    rpaulo 		goto fail;
    559        1.1    rpaulo 	}
    560        1.1    rpaulo 
    561        1.1    rpaulo 	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2661_RX_DESC_SIZE,
    562        1.1    rpaulo 	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
    563        1.1    rpaulo 	if (error != 0) {
    564       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n");
    565        1.1    rpaulo 		goto fail;
    566        1.1    rpaulo 	}
    567        1.1    rpaulo 
    568        1.1    rpaulo 	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
    569       1.14  christos 	    count * RT2661_RX_DESC_SIZE, (void **)&ring->desc,
    570        1.1    rpaulo 	    BUS_DMA_NOWAIT);
    571        1.1    rpaulo 	if (error != 0) {
    572       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n");
    573        1.1    rpaulo 		goto fail;
    574        1.1    rpaulo 	}
    575        1.1    rpaulo 
    576        1.1    rpaulo 	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
    577        1.1    rpaulo 	    count * RT2661_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
    578        1.1    rpaulo 	if (error != 0) {
    579       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n");
    580        1.1    rpaulo 		goto fail;
    581        1.1    rpaulo 	}
    582        1.1    rpaulo 
    583        1.1    rpaulo 	memset(ring->desc, 0, count * RT2661_RX_DESC_SIZE);
    584        1.1    rpaulo 	ring->physaddr = ring->map->dm_segs->ds_addr;
    585        1.1    rpaulo 
    586        1.1    rpaulo 	ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
    587        1.1    rpaulo 	    M_NOWAIT);
    588        1.1    rpaulo 	if (ring->data == NULL) {
    589       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate soft data\n");
    590        1.1    rpaulo 		error = ENOMEM;
    591        1.1    rpaulo 		goto fail;
    592        1.1    rpaulo 	}
    593        1.1    rpaulo 
    594        1.1    rpaulo 	/*
    595        1.1    rpaulo 	 * Pre-allocate Rx buffers and populate Rx ring.
    596        1.1    rpaulo 	 */
    597        1.1    rpaulo 	memset(ring->data, 0, count * sizeof (struct rt2661_rx_data));
    598        1.1    rpaulo 	for (i = 0; i < count; i++) {
    599        1.1    rpaulo 		desc = &sc->rxq.desc[i];
    600        1.1    rpaulo 		data = &sc->rxq.data[i];
    601        1.1    rpaulo 
    602        1.1    rpaulo 		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
    603        1.1    rpaulo 		    0, BUS_DMA_NOWAIT, &data->map);
    604        1.1    rpaulo 		if (error != 0) {
    605       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not create DMA map\n");
    606        1.1    rpaulo 			goto fail;
    607        1.1    rpaulo 		}
    608        1.1    rpaulo 
    609        1.1    rpaulo 		MGETHDR(data->m, M_DONTWAIT, MT_DATA);
    610        1.1    rpaulo 		if (data->m == NULL) {
    611       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n");
    612        1.1    rpaulo 			error = ENOMEM;
    613        1.1    rpaulo 			goto fail;
    614        1.1    rpaulo 		}
    615        1.1    rpaulo 
    616        1.1    rpaulo 		MCLGET(data->m, M_DONTWAIT);
    617        1.1    rpaulo 		if (!(data->m->m_flags & M_EXT)) {
    618       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n");
    619        1.1    rpaulo 			error = ENOMEM;
    620        1.1    rpaulo 			goto fail;
    621        1.1    rpaulo 		}
    622        1.1    rpaulo 
    623        1.1    rpaulo 		error = bus_dmamap_load(sc->sc_dmat, data->map,
    624        1.1    rpaulo 		    mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
    625        1.1    rpaulo 		if (error != 0) {
    626       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map");
    627        1.1    rpaulo 			goto fail;
    628        1.1    rpaulo 		}
    629        1.1    rpaulo 
    630       1.24       scw 		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
    631        1.1    rpaulo 		desc->flags = htole32(RT2661_RX_BUSY);
    632        1.1    rpaulo 	}
    633        1.1    rpaulo 
    634        1.1    rpaulo 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
    635        1.1    rpaulo 	    BUS_DMASYNC_PREWRITE);
    636        1.1    rpaulo 
    637        1.1    rpaulo 	return 0;
    638        1.1    rpaulo 
    639        1.1    rpaulo fail:	rt2661_free_rx_ring(sc, ring);
    640        1.1    rpaulo 	return error;
    641        1.1    rpaulo }
    642        1.1    rpaulo 
    643        1.1    rpaulo static void
    644        1.1    rpaulo rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
    645        1.1    rpaulo {
    646        1.1    rpaulo 	int i;
    647        1.1    rpaulo 
    648        1.1    rpaulo 	for (i = 0; i < ring->count; i++)
    649        1.1    rpaulo 		ring->desc[i].flags = htole32(RT2661_RX_BUSY);
    650        1.1    rpaulo 
    651        1.1    rpaulo 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
    652        1.1    rpaulo 	    BUS_DMASYNC_PREWRITE);
    653        1.1    rpaulo 
    654        1.1    rpaulo 	ring->cur = ring->next = 0;
    655        1.1    rpaulo }
    656        1.1    rpaulo 
    657        1.1    rpaulo static void
    658        1.1    rpaulo rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
    659        1.1    rpaulo {
    660        1.1    rpaulo 	struct rt2661_rx_data *data;
    661        1.1    rpaulo 	int i;
    662        1.1    rpaulo 
    663        1.1    rpaulo 	if (ring->desc != NULL) {
    664        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
    665        1.1    rpaulo 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
    666        1.1    rpaulo 		bus_dmamap_unload(sc->sc_dmat, ring->map);
    667       1.14  christos 		bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc,
    668        1.1    rpaulo 		    ring->count * RT2661_RX_DESC_SIZE);
    669        1.1    rpaulo 		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
    670        1.1    rpaulo 	}
    671        1.1    rpaulo 
    672        1.1    rpaulo 	if (ring->data != NULL) {
    673        1.1    rpaulo 		for (i = 0; i < ring->count; i++) {
    674        1.1    rpaulo 			data = &ring->data[i];
    675        1.1    rpaulo 
    676        1.1    rpaulo 			if (data->m != NULL) {
    677        1.1    rpaulo 				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
    678        1.1    rpaulo 				    data->map->dm_mapsize,
    679        1.1    rpaulo 				    BUS_DMASYNC_POSTREAD);
    680        1.1    rpaulo 				bus_dmamap_unload(sc->sc_dmat, data->map);
    681        1.1    rpaulo 				m_freem(data->m);
    682        1.1    rpaulo 			}
    683        1.1    rpaulo 
    684        1.1    rpaulo 			if (data->map != NULL)
    685        1.1    rpaulo 				bus_dmamap_destroy(sc->sc_dmat, data->map);
    686        1.1    rpaulo 		}
    687        1.1    rpaulo 		free(ring->data, M_DEVBUF);
    688        1.1    rpaulo 	}
    689        1.1    rpaulo }
    690        1.1    rpaulo 
    691        1.1    rpaulo static struct ieee80211_node *
    692       1.13  christos rt2661_node_alloc(struct ieee80211_node_table *nt)
    693        1.1    rpaulo {
    694        1.1    rpaulo 	struct rt2661_node *rn;
    695        1.1    rpaulo 
    696        1.1    rpaulo 	rn = malloc(sizeof (struct rt2661_node), M_80211_NODE,
    697        1.1    rpaulo 	    M_NOWAIT | M_ZERO);
    698        1.1    rpaulo 
    699        1.1    rpaulo 	return (rn != NULL) ? &rn->ni : NULL;
    700        1.1    rpaulo }
    701        1.1    rpaulo 
    702        1.1    rpaulo static int
    703        1.1    rpaulo rt2661_media_change(struct ifnet *ifp)
    704        1.1    rpaulo {
    705        1.1    rpaulo 	int error;
    706        1.1    rpaulo 
    707        1.1    rpaulo 	error = ieee80211_media_change(ifp);
    708        1.1    rpaulo 	if (error != ENETRESET)
    709        1.1    rpaulo 		return error;
    710        1.1    rpaulo 
    711        1.1    rpaulo 	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
    712        1.1    rpaulo 		rt2661_init(ifp);
    713        1.1    rpaulo 
    714        1.1    rpaulo 	return 0;
    715        1.1    rpaulo }
    716        1.1    rpaulo 
    717        1.1    rpaulo /*
    718        1.1    rpaulo  * This function is called periodically (every 200ms) during scanning to
    719        1.1    rpaulo  * switch from one channel to another.
    720        1.1    rpaulo  */
    721        1.1    rpaulo static void
    722        1.1    rpaulo rt2661_next_scan(void *arg)
    723        1.1    rpaulo {
    724        1.1    rpaulo 	struct rt2661_softc *sc = arg;
    725        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
    726       1.24       scw 	int s;
    727        1.1    rpaulo 
    728       1.24       scw 	s = splnet();
    729        1.1    rpaulo 	if (ic->ic_state == IEEE80211_S_SCAN)
    730        1.1    rpaulo 		ieee80211_next_scan(ic);
    731       1.24       scw 	splx(s);
    732        1.1    rpaulo }
    733        1.1    rpaulo 
    734        1.1    rpaulo /*
    735        1.1    rpaulo  * This function is called for each neighbor node.
    736        1.1    rpaulo  */
    737        1.1    rpaulo static void
    738       1.13  christos rt2661_iter_func(void *arg, struct ieee80211_node *ni)
    739        1.1    rpaulo {
    740       1.24       scw 	struct rt2661_softc *sc = arg;
    741        1.1    rpaulo 	struct rt2661_node *rn = (struct rt2661_node *)ni;
    742        1.1    rpaulo 
    743       1.24       scw 	ieee80211_amrr_choose(&sc->amrr, ni, &rn->amn);
    744        1.1    rpaulo }
    745        1.1    rpaulo 
    746        1.1    rpaulo /*
    747       1.24       scw  * This function is called periodically (every 500ms) in RUN state to update
    748       1.24       scw  * various settings like rate control statistics or Rx sensitivity.
    749        1.1    rpaulo  */
    750        1.1    rpaulo static void
    751       1.24       scw rt2661_updatestats(void *arg)
    752        1.1    rpaulo {
    753        1.1    rpaulo 	struct rt2661_softc *sc = arg;
    754        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
    755       1.24       scw 	int s;
    756        1.1    rpaulo 
    757       1.24       scw 	s = splnet();
    758       1.24       scw 	if (ic->ic_opmode == IEEE80211_M_STA)
    759       1.24       scw 		rt2661_iter_func(sc, ic->ic_bss);
    760       1.24       scw 	else
    761       1.24       scw 		ieee80211_iterate_nodes(&ic->ic_sta, rt2661_iter_func, arg);
    762        1.1    rpaulo 
    763       1.24       scw 	/* update rx sensitivity every 1 sec */
    764       1.24       scw 	if (++sc->ncalls & 1)
    765       1.24       scw 		rt2661_rx_tune(sc);
    766       1.24       scw 	splx(s);
    767       1.24       scw 
    768       1.24       scw 	callout_reset(&sc->amrr_ch, hz / 2, rt2661_updatestats, sc);
    769       1.24       scw }
    770       1.24       scw 
    771       1.24       scw static void
    772       1.24       scw rt2661_newassoc(struct ieee80211_node *ni, int isnew)
    773       1.24       scw {
    774       1.24       scw 	struct rt2661_softc *sc = ni->ni_ic->ic_ifp->if_softc;
    775       1.24       scw 	int i;
    776       1.24       scw 
    777       1.24       scw 	ieee80211_amrr_node_init(&sc->amrr, &((struct rt2661_node *)ni)->amn);
    778       1.24       scw 
    779       1.24       scw 	/* set rate to some reasonable initial value */
    780       1.24       scw 	for (i = ni->ni_rates.rs_nrates - 1;
    781       1.24       scw 	     i > 0 && (ni->ni_rates.rs_rates[i] & IEEE80211_RATE_VAL) > 72;
    782       1.24       scw 	     i--);
    783       1.24       scw 	ni->ni_txrate = i;
    784        1.1    rpaulo }
    785        1.1    rpaulo 
    786        1.1    rpaulo static int
    787        1.1    rpaulo rt2661_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
    788        1.1    rpaulo {
    789        1.1    rpaulo 	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
    790        1.1    rpaulo 	enum ieee80211_state ostate;
    791        1.1    rpaulo 	struct ieee80211_node *ni;
    792        1.1    rpaulo 	uint32_t tmp;
    793        1.1    rpaulo 
    794        1.1    rpaulo 	ostate = ic->ic_state;
    795        1.1    rpaulo 	callout_stop(&sc->scan_ch);
    796        1.1    rpaulo 
    797        1.1    rpaulo 	switch (nstate) {
    798        1.1    rpaulo 	case IEEE80211_S_INIT:
    799       1.24       scw 		callout_stop(&sc->amrr_ch);
    800        1.1    rpaulo 
    801        1.1    rpaulo 		if (ostate == IEEE80211_S_RUN) {
    802        1.1    rpaulo 			/* abort TSF synchronization */
    803        1.1    rpaulo 			tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
    804        1.1    rpaulo 			RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
    805        1.1    rpaulo 		}
    806        1.1    rpaulo 		break;
    807        1.1    rpaulo 
    808        1.1    rpaulo 	case IEEE80211_S_SCAN:
    809        1.1    rpaulo 		rt2661_set_chan(sc, ic->ic_curchan);
    810        1.1    rpaulo 		callout_reset(&sc->scan_ch, hz / 5, rt2661_next_scan, sc);
    811        1.1    rpaulo 		break;
    812        1.1    rpaulo 
    813        1.1    rpaulo 	case IEEE80211_S_AUTH:
    814        1.1    rpaulo 	case IEEE80211_S_ASSOC:
    815        1.1    rpaulo 		rt2661_set_chan(sc, ic->ic_curchan);
    816        1.1    rpaulo 		break;
    817        1.1    rpaulo 
    818        1.1    rpaulo 	case IEEE80211_S_RUN:
    819        1.1    rpaulo 		rt2661_set_chan(sc, ic->ic_curchan);
    820        1.1    rpaulo 
    821        1.1    rpaulo 		ni = ic->ic_bss;
    822        1.1    rpaulo 
    823        1.1    rpaulo 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
    824       1.24       scw 			rt2661_set_slottime(sc);
    825        1.1    rpaulo 			rt2661_enable_mrr(sc);
    826        1.1    rpaulo 			rt2661_set_txpreamble(sc);
    827        1.1    rpaulo 			rt2661_set_basicrates(sc, &ni->ni_rates);
    828        1.1    rpaulo 			rt2661_set_bssid(sc, ni->ni_bssid);
    829        1.1    rpaulo 		}
    830        1.1    rpaulo 
    831        1.1    rpaulo 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
    832       1.24       scw 		    ic->ic_opmode == IEEE80211_M_IBSS)
    833       1.24       scw 			rt2661_prepare_beacon(sc);
    834       1.24       scw 
    835       1.24       scw 		if (ic->ic_opmode == IEEE80211_M_STA) {
    836       1.24       scw 			/* fake a join to init the tx rate */
    837       1.24       scw 			rt2661_newassoc(ni, 1);
    838        1.1    rpaulo 		}
    839        1.1    rpaulo 
    840        1.1    rpaulo 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
    841       1.24       scw 			sc->ncalls = 0;
    842       1.24       scw 			sc->avg_rssi = -95;	/* reset EMA */
    843       1.24       scw 			callout_reset(&sc->amrr_ch, hz / 2,
    844       1.24       scw 			    rt2661_updatestats, sc);
    845        1.1    rpaulo 			rt2661_enable_tsf_sync(sc);
    846        1.1    rpaulo 		}
    847        1.1    rpaulo 		break;
    848        1.1    rpaulo 	}
    849        1.1    rpaulo 
    850       1.24       scw 	return sc->sc_newstate(ic, nstate, arg);
    851        1.1    rpaulo }
    852        1.1    rpaulo 
    853        1.1    rpaulo /*
    854        1.1    rpaulo  * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
    855        1.1    rpaulo  * 93C66).
    856        1.1    rpaulo  */
    857        1.1    rpaulo static uint16_t
    858        1.1    rpaulo rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
    859        1.1    rpaulo {
    860        1.1    rpaulo 	uint32_t tmp;
    861        1.1    rpaulo 	uint16_t val;
    862        1.1    rpaulo 	int n;
    863        1.1    rpaulo 
    864        1.1    rpaulo 	/* clock C once before the first command */
    865        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, 0);
    866        1.1    rpaulo 
    867        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S);
    868        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
    869        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S);
    870        1.1    rpaulo 
    871        1.1    rpaulo 	/* write start bit (1) */
    872        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
    873        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
    874        1.1    rpaulo 
    875        1.1    rpaulo 	/* write READ opcode (10) */
    876        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
    877        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
    878        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S);
    879        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
    880        1.1    rpaulo 
    881        1.1    rpaulo 	/* write address (A5-A0 or A7-A0) */
    882        1.1    rpaulo 	n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
    883        1.1    rpaulo 	for (; n >= 0; n--) {
    884        1.1    rpaulo 		RT2661_EEPROM_CTL(sc, RT2661_S |
    885        1.1    rpaulo 		    (((addr >> n) & 1) << RT2661_SHIFT_D));
    886        1.1    rpaulo 		RT2661_EEPROM_CTL(sc, RT2661_S |
    887        1.1    rpaulo 		    (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
    888        1.1    rpaulo 	}
    889        1.1    rpaulo 
    890        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S);
    891        1.1    rpaulo 
    892        1.1    rpaulo 	/* read data Q15-Q0 */
    893        1.1    rpaulo 	val = 0;
    894        1.1    rpaulo 	for (n = 15; n >= 0; n--) {
    895        1.1    rpaulo 		RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
    896        1.1    rpaulo 		tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
    897        1.1    rpaulo 		val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
    898        1.1    rpaulo 		RT2661_EEPROM_CTL(sc, RT2661_S);
    899        1.1    rpaulo 	}
    900        1.1    rpaulo 
    901        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, 0);
    902        1.1    rpaulo 
    903        1.1    rpaulo 	/* clear Chip Select and clock C */
    904        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_S);
    905        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, 0);
    906        1.1    rpaulo 	RT2661_EEPROM_CTL(sc, RT2661_C);
    907        1.1    rpaulo 
    908        1.1    rpaulo 	return val;
    909        1.1    rpaulo }
    910        1.1    rpaulo 
    911        1.1    rpaulo static void
    912        1.1    rpaulo rt2661_tx_intr(struct rt2661_softc *sc)
    913        1.1    rpaulo {
    914        1.1    rpaulo 	struct ifnet *ifp = &sc->sc_if;
    915        1.1    rpaulo 	struct rt2661_tx_ring *txq;
    916        1.1    rpaulo 	struct rt2661_tx_data *data;
    917        1.1    rpaulo 	struct rt2661_node *rn;
    918        1.1    rpaulo 	uint32_t val;
    919        1.1    rpaulo 	int qid, retrycnt;
    920        1.1    rpaulo 
    921        1.1    rpaulo 	for (;;) {
    922        1.1    rpaulo 		val = RAL_READ(sc, RT2661_STA_CSR4);
    923        1.1    rpaulo 		if (!(val & RT2661_TX_STAT_VALID))
    924        1.1    rpaulo 			break;
    925        1.1    rpaulo 
    926        1.1    rpaulo 		/* retrieve the queue in which this frame was sent */
    927        1.1    rpaulo 		qid = RT2661_TX_QID(val);
    928        1.1    rpaulo 		txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
    929        1.1    rpaulo 
    930        1.1    rpaulo 		/* retrieve rate control algorithm context */
    931        1.1    rpaulo 		data = &txq->data[txq->stat];
    932        1.1    rpaulo 		rn = (struct rt2661_node *)data->ni;
    933        1.1    rpaulo 
    934        1.1    rpaulo 		/* if no frame has been sent, ignore */
    935        1.1    rpaulo 		if (rn == NULL)
    936        1.1    rpaulo 			continue;
    937        1.1    rpaulo 
    938        1.1    rpaulo 		switch (RT2661_TX_RESULT(val)) {
    939        1.1    rpaulo 		case RT2661_TX_SUCCESS:
    940        1.1    rpaulo 			retrycnt = RT2661_TX_RETRYCNT(val);
    941        1.1    rpaulo 
    942        1.1    rpaulo 			DPRINTFN(10, ("data frame sent successfully after "
    943        1.1    rpaulo 			    "%d retries\n", retrycnt));
    944       1.24       scw 			rn->amn.amn_txcnt++;
    945       1.24       scw 			if (retrycnt > 0)
    946       1.24       scw 				rn->amn.amn_retrycnt++;
    947        1.1    rpaulo 			ifp->if_opackets++;
    948        1.1    rpaulo 			break;
    949        1.1    rpaulo 
    950        1.1    rpaulo 		case RT2661_TX_RETRY_FAIL:
    951        1.1    rpaulo 			DPRINTFN(9, ("sending data frame failed (too much "
    952        1.1    rpaulo 			    "retries)\n"));
    953       1.24       scw 			rn->amn.amn_txcnt++;
    954       1.24       scw 			rn->amn.amn_retrycnt++;
    955        1.1    rpaulo 			ifp->if_oerrors++;
    956        1.1    rpaulo 			break;
    957        1.1    rpaulo 
    958        1.1    rpaulo 		default:
    959        1.1    rpaulo 			/* other failure */
    960       1.29  drochner 			aprint_error_dev(sc->sc_dev, "sending data frame failed 0x%08x\n", val);
    961        1.1    rpaulo 			ifp->if_oerrors++;
    962        1.1    rpaulo 		}
    963        1.1    rpaulo 
    964        1.1    rpaulo 		ieee80211_free_node(data->ni);
    965        1.1    rpaulo 		data->ni = NULL;
    966        1.1    rpaulo 
    967        1.1    rpaulo 		DPRINTFN(15, ("tx done q=%d idx=%u\n", qid, txq->stat));
    968        1.1    rpaulo 
    969        1.1    rpaulo 		txq->queued--;
    970        1.1    rpaulo 		if (++txq->stat >= txq->count)	/* faster than % count */
    971        1.1    rpaulo 			txq->stat = 0;
    972        1.1    rpaulo 	}
    973        1.1    rpaulo 
    974        1.1    rpaulo 	sc->sc_tx_timer = 0;
    975        1.1    rpaulo 	ifp->if_flags &= ~IFF_OACTIVE;
    976        1.1    rpaulo 	rt2661_start(ifp);
    977        1.1    rpaulo }
    978        1.1    rpaulo 
    979        1.1    rpaulo static void
    980        1.1    rpaulo rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
    981        1.1    rpaulo {
    982        1.1    rpaulo 	struct rt2661_tx_desc *desc;
    983        1.1    rpaulo 	struct rt2661_tx_data *data;
    984        1.1    rpaulo 
    985        1.1    rpaulo 	for (;;) {
    986        1.1    rpaulo 		desc = &txq->desc[txq->next];
    987        1.1    rpaulo 		data = &txq->data[txq->next];
    988        1.1    rpaulo 
    989        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, txq->map,
    990        1.1    rpaulo 		    txq->next * RT2661_TX_DESC_SIZE, RT2661_TX_DESC_SIZE,
    991        1.1    rpaulo 		    BUS_DMASYNC_POSTREAD);
    992        1.1    rpaulo 
    993        1.1    rpaulo 		if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
    994        1.1    rpaulo 		    !(le32toh(desc->flags) & RT2661_TX_VALID))
    995        1.1    rpaulo 			break;
    996        1.1    rpaulo 
    997        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
    998        1.1    rpaulo 		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
    999        1.1    rpaulo 		bus_dmamap_unload(sc->sc_dmat, data->map);
   1000        1.1    rpaulo 		m_freem(data->m);
   1001        1.1    rpaulo 		data->m = NULL;
   1002        1.1    rpaulo 		/* node reference is released in rt2661_tx_intr() */
   1003        1.1    rpaulo 
   1004        1.1    rpaulo 		/* descriptor is no longer valid */
   1005        1.1    rpaulo 		desc->flags &= ~htole32(RT2661_TX_VALID);
   1006        1.1    rpaulo 
   1007        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, txq->map,
   1008        1.1    rpaulo 		    txq->next * RT2661_TX_DESC_SIZE, RT2661_TX_DESC_SIZE,
   1009        1.1    rpaulo 		    BUS_DMASYNC_PREWRITE);
   1010        1.1    rpaulo 
   1011        1.1    rpaulo 		DPRINTFN(15, ("tx dma done q=%p idx=%u\n", txq, txq->next));
   1012        1.1    rpaulo 
   1013        1.1    rpaulo 		if (++txq->next >= txq->count)	/* faster than % count */
   1014        1.1    rpaulo 			txq->next = 0;
   1015        1.1    rpaulo 	}
   1016        1.1    rpaulo }
   1017        1.1    rpaulo 
   1018        1.1    rpaulo static void
   1019        1.1    rpaulo rt2661_rx_intr(struct rt2661_softc *sc)
   1020        1.1    rpaulo {
   1021        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   1022        1.1    rpaulo 	struct ifnet *ifp = &sc->sc_if;
   1023        1.1    rpaulo 	struct rt2661_rx_desc *desc;
   1024        1.1    rpaulo 	struct rt2661_rx_data *data;
   1025        1.1    rpaulo 	struct ieee80211_frame *wh;
   1026        1.1    rpaulo 	struct ieee80211_node *ni;
   1027        1.1    rpaulo 	struct mbuf *mnew, *m;
   1028       1.24       scw 	int error, rssi;
   1029        1.1    rpaulo 
   1030        1.1    rpaulo 	for (;;) {
   1031        1.1    rpaulo 		desc = &sc->rxq.desc[sc->rxq.cur];
   1032        1.1    rpaulo 		data = &sc->rxq.data[sc->rxq.cur];
   1033        1.1    rpaulo 
   1034        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
   1035        1.1    rpaulo 		    sc->rxq.cur * RT2661_RX_DESC_SIZE, RT2661_RX_DESC_SIZE,
   1036        1.1    rpaulo 		    BUS_DMASYNC_POSTREAD);
   1037        1.1    rpaulo 
   1038        1.1    rpaulo 		if (le32toh(desc->flags) & RT2661_RX_BUSY)
   1039        1.1    rpaulo 			break;
   1040        1.1    rpaulo 
   1041        1.1    rpaulo 		if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
   1042        1.1    rpaulo 		    (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
   1043        1.1    rpaulo 			/*
   1044        1.1    rpaulo 			 * This should not happen since we did not request
   1045        1.1    rpaulo 			 * to receive those frames when we filled TXRX_CSR0.
   1046        1.1    rpaulo 			 */
   1047        1.1    rpaulo 			DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
   1048        1.1    rpaulo 			    le32toh(desc->flags)));
   1049        1.1    rpaulo 			ifp->if_ierrors++;
   1050        1.1    rpaulo 			goto skip;
   1051        1.1    rpaulo 		}
   1052        1.1    rpaulo 
   1053        1.1    rpaulo 		if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
   1054        1.1    rpaulo 			ifp->if_ierrors++;
   1055        1.1    rpaulo 			goto skip;
   1056        1.1    rpaulo 		}
   1057        1.1    rpaulo 
   1058        1.1    rpaulo 		/*
   1059        1.1    rpaulo 		 * Try to allocate a new mbuf for this ring element and load it
   1060        1.1    rpaulo 		 * before processing the current mbuf. If the ring element
   1061        1.1    rpaulo 		 * cannot be loaded, drop the received packet and reuse the old
   1062        1.1    rpaulo 		 * mbuf. In the unlikely case that the old mbuf can't be
   1063        1.1    rpaulo 		 * reloaded either, explicitly panic.
   1064        1.1    rpaulo 		 */
   1065        1.1    rpaulo 		MGETHDR(mnew, M_DONTWAIT, MT_DATA);
   1066        1.1    rpaulo 		if (mnew == NULL) {
   1067        1.1    rpaulo 			ifp->if_ierrors++;
   1068        1.1    rpaulo 			goto skip;
   1069        1.1    rpaulo 		}
   1070        1.1    rpaulo 
   1071        1.1    rpaulo 		MCLGET(mnew, M_DONTWAIT);
   1072        1.1    rpaulo 		if (!(mnew->m_flags & M_EXT)) {
   1073        1.1    rpaulo 			m_freem(mnew);
   1074        1.1    rpaulo 			ifp->if_ierrors++;
   1075        1.1    rpaulo 			goto skip;
   1076        1.1    rpaulo 		}
   1077        1.1    rpaulo 
   1078        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
   1079        1.1    rpaulo 		    data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
   1080        1.1    rpaulo 		bus_dmamap_unload(sc->sc_dmat, data->map);
   1081        1.1    rpaulo 
   1082        1.1    rpaulo 		error = bus_dmamap_load(sc->sc_dmat, data->map,
   1083        1.1    rpaulo 		    mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
   1084        1.1    rpaulo 		if (error != 0) {
   1085        1.1    rpaulo 			m_freem(mnew);
   1086        1.1    rpaulo 
   1087        1.1    rpaulo 			/* try to reload the old mbuf */
   1088        1.1    rpaulo 			error = bus_dmamap_load(sc->sc_dmat, data->map,
   1089        1.1    rpaulo 			    mtod(data->m, void *), MCLBYTES, NULL,
   1090        1.1    rpaulo 			    BUS_DMA_NOWAIT);
   1091        1.1    rpaulo 			if (error != 0) {
   1092        1.1    rpaulo 				/* very unlikely that it will fail... */
   1093        1.1    rpaulo 				panic("%s: could not load old rx mbuf",
   1094       1.29  drochner 				    device_xname(sc->sc_dev));
   1095        1.1    rpaulo 			}
   1096       1.22   xtraeme 			/* physical address may have changed */
   1097       1.22   xtraeme 			desc->physaddr = htole32(data->map->dm_segs->ds_addr);
   1098        1.1    rpaulo 			ifp->if_ierrors++;
   1099        1.1    rpaulo 			goto skip;
   1100        1.1    rpaulo 		}
   1101        1.1    rpaulo 
   1102        1.1    rpaulo 		/*
   1103        1.1    rpaulo 	 	 * New mbuf successfully loaded, update Rx ring and continue
   1104        1.1    rpaulo 		 * processing.
   1105        1.1    rpaulo 		 */
   1106        1.1    rpaulo 		m = data->m;
   1107        1.1    rpaulo 		data->m = mnew;
   1108        1.1    rpaulo 		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
   1109        1.1    rpaulo 
   1110        1.1    rpaulo 		/* finalize mbuf */
   1111        1.1    rpaulo 		m->m_pkthdr.rcvif = ifp;
   1112        1.1    rpaulo 		m->m_pkthdr.len = m->m_len =
   1113        1.1    rpaulo 		    (le32toh(desc->flags) >> 16) & 0xfff;
   1114        1.1    rpaulo 
   1115        1.1    rpaulo 		if (sc->sc_drvbpf != NULL) {
   1116        1.1    rpaulo 			struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
   1117        1.1    rpaulo 			uint32_t tsf_lo, tsf_hi;
   1118        1.1    rpaulo 
   1119        1.1    rpaulo 			/* get timestamp (low and high 32 bits) */
   1120        1.1    rpaulo 			tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
   1121        1.1    rpaulo 			tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
   1122        1.1    rpaulo 
   1123        1.1    rpaulo 			tap->wr_tsf =
   1124        1.1    rpaulo 			    htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
   1125        1.1    rpaulo 			tap->wr_flags = 0;
   1126        1.1    rpaulo 			tap->wr_rate = rt2661_rxrate(desc);
   1127       1.24       scw 			tap->wr_chan_freq = htole16(sc->sc_curchan->ic_freq);
   1128       1.24       scw 			tap->wr_chan_flags = htole16(sc->sc_curchan->ic_flags);
   1129        1.1    rpaulo 			tap->wr_antsignal = desc->rssi;
   1130        1.1    rpaulo 
   1131       1.28     joerg 			bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_rxtap_len, m);
   1132        1.1    rpaulo 		}
   1133        1.1    rpaulo 
   1134        1.1    rpaulo 		wh = mtod(m, struct ieee80211_frame *);
   1135        1.1    rpaulo 		ni = ieee80211_find_rxnode(ic,
   1136        1.1    rpaulo 		    (struct ieee80211_frame_min *)wh);
   1137        1.1    rpaulo 
   1138        1.1    rpaulo 		/* send the frame to the 802.11 layer */
   1139        1.1    rpaulo 		ieee80211_input(ic, m, ni, desc->rssi, 0);
   1140        1.1    rpaulo 
   1141       1.24       scw 		/*-
   1142       1.24       scw 		 * Keep track of the average RSSI using an Exponential Moving
   1143       1.24       scw 		 * Average (EMA) of 8 Wilder's days:
   1144       1.24       scw 		 *     avg = (1 / N) x rssi + ((N - 1) / N) x avg
   1145       1.24       scw 		 */
   1146       1.24       scw 		rssi = rt2661_get_rssi(sc, desc->rssi);
   1147       1.24       scw 		sc->avg_rssi = (rssi + 7 * sc->avg_rssi) / 8;
   1148        1.1    rpaulo 
   1149        1.1    rpaulo 		/* node is no longer needed */
   1150        1.1    rpaulo 		ieee80211_free_node(ni);
   1151        1.1    rpaulo 
   1152        1.1    rpaulo skip:		desc->flags |= htole32(RT2661_RX_BUSY);
   1153        1.1    rpaulo 
   1154        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
   1155        1.1    rpaulo 		    sc->rxq.cur * RT2661_RX_DESC_SIZE, RT2661_RX_DESC_SIZE,
   1156        1.1    rpaulo 		    BUS_DMASYNC_PREWRITE);
   1157        1.1    rpaulo 
   1158       1.24       scw 		DPRINTFN(16, ("rx intr idx=%u\n", sc->rxq.cur));
   1159        1.1    rpaulo 
   1160        1.1    rpaulo 		sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
   1161        1.1    rpaulo 	}
   1162        1.1    rpaulo 
   1163        1.1    rpaulo 	/*
   1164        1.1    rpaulo 	 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd
   1165        1.1    rpaulo 	 * without calling if_start().
   1166        1.1    rpaulo 	 */
   1167        1.1    rpaulo 	if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE))
   1168        1.1    rpaulo 		rt2661_start(ifp);
   1169        1.1    rpaulo }
   1170        1.1    rpaulo 
   1171       1.24       scw /*
   1172       1.24       scw  * This function is called in HostAP or IBSS modes when it's time to send a
   1173       1.24       scw  * new beacon (every ni_intval milliseconds).
   1174       1.24       scw  */
   1175        1.1    rpaulo static void
   1176       1.13  christos rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
   1177        1.1    rpaulo {
   1178       1.24       scw 	struct ieee80211com *ic = &sc->sc_ic;
   1179       1.24       scw 
   1180       1.24       scw 	if (sc->sc_flags & RT2661_UPDATE_SLOT) {
   1181       1.24       scw 		sc->sc_flags &= ~RT2661_UPDATE_SLOT;
   1182       1.24       scw 		sc->sc_flags |= RT2661_SET_SLOTTIME;
   1183       1.24       scw 	} else if (sc->sc_flags & RT2661_SET_SLOTTIME) {
   1184       1.24       scw 		sc->sc_flags &= ~RT2661_SET_SLOTTIME;
   1185       1.24       scw 		rt2661_set_slottime(sc);
   1186       1.24       scw 	}
   1187       1.24       scw 
   1188       1.24       scw 	if (ic->ic_curmode == IEEE80211_MODE_11G) {
   1189       1.24       scw 		/* update ERP Information Element */
   1190       1.24       scw 		RAL_WRITE_1(sc, sc->erp_csr, ic->ic_bss->ni_erp);
   1191       1.24       scw 		RAL_RW_BARRIER_1(sc, sc->erp_csr);
   1192       1.24       scw 	}
   1193       1.24       scw 
   1194       1.24       scw 	DPRINTFN(15, ("beacon expired\n"));
   1195        1.1    rpaulo }
   1196        1.1    rpaulo 
   1197        1.1    rpaulo static void
   1198        1.1    rpaulo rt2661_mcu_wakeup(struct rt2661_softc *sc)
   1199        1.1    rpaulo {
   1200        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
   1201        1.1    rpaulo 
   1202        1.1    rpaulo 	RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
   1203        1.1    rpaulo 	RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
   1204        1.1    rpaulo 	RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
   1205        1.1    rpaulo 
   1206        1.1    rpaulo 	/* send wakeup command to MCU */
   1207        1.1    rpaulo 	rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
   1208        1.1    rpaulo }
   1209        1.1    rpaulo 
   1210        1.1    rpaulo static void
   1211        1.1    rpaulo rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
   1212        1.1    rpaulo {
   1213        1.1    rpaulo 	RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
   1214        1.1    rpaulo 	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
   1215        1.1    rpaulo }
   1216        1.1    rpaulo 
   1217        1.1    rpaulo int
   1218        1.1    rpaulo rt2661_intr(void *arg)
   1219        1.1    rpaulo {
   1220        1.1    rpaulo 	struct rt2661_softc *sc = arg;
   1221        1.1    rpaulo 	struct ifnet *ifp = &sc->sc_if;
   1222        1.1    rpaulo 	uint32_t r1, r2;
   1223       1.24       scw 	int rv = 0;
   1224        1.1    rpaulo 
   1225       1.24       scw 	/* don't re-enable interrupts if we're shutting down */
   1226       1.24       scw 	if (!(ifp->if_flags & IFF_RUNNING)) {
   1227       1.24       scw 		/* disable MAC and MCU interrupts */
   1228       1.24       scw 		RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
   1229       1.24       scw 		RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
   1230       1.24       scw 		return 0;
   1231       1.24       scw 	}
   1232       1.22   xtraeme 
   1233       1.24       scw 	for (;;) {
   1234       1.24       scw 		r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
   1235       1.24       scw 		r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
   1236        1.1    rpaulo 
   1237       1.24       scw 		if ((r1 & RT2661_INT_CSR_ALL) == 0 &&
   1238       1.24       scw 		    (r2 & RT2661_MCU_INT_ALL) == 0)
   1239       1.24       scw 			break;
   1240       1.22   xtraeme 
   1241       1.24       scw 		RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
   1242       1.24       scw 		RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
   1243        1.1    rpaulo 
   1244       1.24       scw 		rv = 1;
   1245        1.1    rpaulo 
   1246       1.24       scw 		if (r1 & RT2661_MGT_DONE)
   1247       1.24       scw 			rt2661_tx_dma_intr(sc, &sc->mgtq);
   1248        1.1    rpaulo 
   1249       1.24       scw 		if (r1 & RT2661_RX_DONE)
   1250       1.24       scw 			rt2661_rx_intr(sc);
   1251        1.1    rpaulo 
   1252       1.24       scw 		if (r1 & RT2661_TX0_DMA_DONE)
   1253       1.24       scw 			rt2661_tx_dma_intr(sc, &sc->txq[0]);
   1254        1.1    rpaulo 
   1255       1.24       scw 		if (r1 & RT2661_TX1_DMA_DONE)
   1256       1.24       scw 			rt2661_tx_dma_intr(sc, &sc->txq[1]);
   1257        1.1    rpaulo 
   1258       1.24       scw 		if (r1 & RT2661_TX2_DMA_DONE)
   1259       1.24       scw 			rt2661_tx_dma_intr(sc, &sc->txq[2]);
   1260        1.1    rpaulo 
   1261       1.24       scw 		if (r1 & RT2661_TX3_DMA_DONE)
   1262       1.24       scw 			rt2661_tx_dma_intr(sc, &sc->txq[3]);
   1263        1.1    rpaulo 
   1264       1.24       scw 		if (r1 & RT2661_TX_DONE)
   1265       1.24       scw 			rt2661_tx_intr(sc);
   1266        1.1    rpaulo 
   1267       1.24       scw 		if (r2 & RT2661_MCU_CMD_DONE)
   1268       1.24       scw 			rt2661_mcu_cmd_intr(sc);
   1269        1.1    rpaulo 
   1270       1.24       scw 		if (r2 & RT2661_MCU_BEACON_EXPIRE)
   1271       1.24       scw 			rt2661_mcu_beacon_expire(sc);
   1272        1.1    rpaulo 
   1273       1.24       scw 		if (r2 & RT2661_MCU_WAKEUP)
   1274       1.24       scw 			rt2661_mcu_wakeup(sc);
   1275       1.24       scw 	}
   1276        1.1    rpaulo 
   1277       1.24       scw 	return rv;
   1278        1.1    rpaulo }
   1279        1.1    rpaulo 
   1280        1.1    rpaulo /* quickly determine if a given rate is CCK or OFDM */
   1281        1.1    rpaulo #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
   1282        1.1    rpaulo 
   1283        1.1    rpaulo #define RAL_ACK_SIZE	14	/* 10 + 4(FCS) */
   1284        1.1    rpaulo #define RAL_CTS_SIZE	14	/* 10 + 4(FCS) */
   1285        1.1    rpaulo 
   1286        1.1    rpaulo /*
   1287        1.1    rpaulo  * This function is only used by the Rx radiotap code. It returns the rate at
   1288        1.1    rpaulo  * which a given frame was received.
   1289        1.1    rpaulo  */
   1290        1.1    rpaulo static uint8_t
   1291        1.1    rpaulo rt2661_rxrate(struct rt2661_rx_desc *desc)
   1292        1.1    rpaulo {
   1293        1.1    rpaulo 	if (le32toh(desc->flags) & RT2661_RX_OFDM) {
   1294        1.1    rpaulo 		/* reverse function of rt2661_plcp_signal */
   1295        1.1    rpaulo 		switch (desc->rate & 0xf) {
   1296        1.1    rpaulo 		case 0xb:	return 12;
   1297        1.1    rpaulo 		case 0xf:	return 18;
   1298        1.1    rpaulo 		case 0xa:	return 24;
   1299        1.1    rpaulo 		case 0xe:	return 36;
   1300        1.1    rpaulo 		case 0x9:	return 48;
   1301        1.1    rpaulo 		case 0xd:	return 72;
   1302        1.1    rpaulo 		case 0x8:	return 96;
   1303        1.1    rpaulo 		case 0xc:	return 108;
   1304        1.1    rpaulo 		}
   1305        1.1    rpaulo 	} else {
   1306        1.1    rpaulo 		if (desc->rate == 10)
   1307        1.1    rpaulo 			return 2;
   1308        1.1    rpaulo 		if (desc->rate == 20)
   1309        1.1    rpaulo 			return 4;
   1310        1.1    rpaulo 		if (desc->rate == 55)
   1311        1.1    rpaulo 			return 11;
   1312        1.1    rpaulo 		if (desc->rate == 110)
   1313        1.1    rpaulo 			return 22;
   1314        1.1    rpaulo 	}
   1315        1.1    rpaulo 	return 2;	/* should not get there */
   1316        1.1    rpaulo }
   1317        1.1    rpaulo 
   1318        1.1    rpaulo /*
   1319        1.1    rpaulo  * Return the expected ack rate for a frame transmitted at rate `rate'.
   1320        1.1    rpaulo  * XXX: this should depend on the destination node basic rate set.
   1321        1.1    rpaulo  */
   1322        1.1    rpaulo static int
   1323        1.1    rpaulo rt2661_ack_rate(struct ieee80211com *ic, int rate)
   1324        1.1    rpaulo {
   1325        1.1    rpaulo 	switch (rate) {
   1326        1.1    rpaulo 	/* CCK rates */
   1327        1.1    rpaulo 	case 2:
   1328        1.1    rpaulo 		return 2;
   1329        1.1    rpaulo 	case 4:
   1330        1.1    rpaulo 	case 11:
   1331        1.1    rpaulo 	case 22:
   1332        1.1    rpaulo 		return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
   1333        1.1    rpaulo 
   1334        1.1    rpaulo 	/* OFDM rates */
   1335        1.1    rpaulo 	case 12:
   1336        1.1    rpaulo 	case 18:
   1337        1.1    rpaulo 		return 12;
   1338        1.1    rpaulo 	case 24:
   1339        1.1    rpaulo 	case 36:
   1340        1.1    rpaulo 		return 24;
   1341        1.1    rpaulo 	case 48:
   1342        1.1    rpaulo 	case 72:
   1343        1.1    rpaulo 	case 96:
   1344        1.1    rpaulo 	case 108:
   1345        1.1    rpaulo 		return 48;
   1346        1.1    rpaulo 	}
   1347        1.1    rpaulo 
   1348        1.1    rpaulo 	/* default to 1Mbps */
   1349        1.1    rpaulo 	return 2;
   1350        1.1    rpaulo }
   1351        1.1    rpaulo 
   1352        1.1    rpaulo /*
   1353        1.1    rpaulo  * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
   1354        1.1    rpaulo  * The function automatically determines the operating mode depending on the
   1355        1.1    rpaulo  * given rate. `flags' indicates whether short preamble is in use or not.
   1356        1.1    rpaulo  */
   1357        1.1    rpaulo static uint16_t
   1358        1.1    rpaulo rt2661_txtime(int len, int rate, uint32_t flags)
   1359        1.1    rpaulo {
   1360        1.1    rpaulo 	uint16_t txtime;
   1361        1.1    rpaulo 
   1362        1.1    rpaulo 	if (RAL_RATE_IS_OFDM(rate)) {
   1363       1.24       scw 		/* IEEE Std 802.11g-2003, pp. 44 */
   1364        1.1    rpaulo 		txtime = (8 + 4 * len + 3 + rate - 1) / rate;
   1365        1.1    rpaulo 		txtime = 16 + 4 + 4 * txtime + 6;
   1366        1.1    rpaulo 	} else {
   1367        1.1    rpaulo 		/* IEEE Std 802.11b-1999, pp. 28 */
   1368        1.1    rpaulo 		txtime = (16 * len + rate - 1) / rate;
   1369        1.1    rpaulo 		if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
   1370        1.1    rpaulo 			txtime +=  72 + 24;
   1371        1.1    rpaulo 		else
   1372        1.1    rpaulo 			txtime += 144 + 48;
   1373        1.1    rpaulo 	}
   1374        1.1    rpaulo 	return txtime;
   1375        1.1    rpaulo }
   1376        1.1    rpaulo 
   1377        1.1    rpaulo static uint8_t
   1378        1.1    rpaulo rt2661_plcp_signal(int rate)
   1379        1.1    rpaulo {
   1380        1.1    rpaulo 	switch (rate) {
   1381        1.1    rpaulo 	/* CCK rates (returned values are device-dependent) */
   1382        1.1    rpaulo 	case 2:		return 0x0;
   1383        1.1    rpaulo 	case 4:		return 0x1;
   1384        1.1    rpaulo 	case 11:	return 0x2;
   1385        1.1    rpaulo 	case 22:	return 0x3;
   1386        1.1    rpaulo 
   1387        1.1    rpaulo 	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
   1388        1.1    rpaulo 	case 12:	return 0xb;
   1389        1.1    rpaulo 	case 18:	return 0xf;
   1390        1.1    rpaulo 	case 24:	return 0xa;
   1391        1.1    rpaulo 	case 36:	return 0xe;
   1392        1.1    rpaulo 	case 48:	return 0x9;
   1393        1.1    rpaulo 	case 72:	return 0xd;
   1394        1.1    rpaulo 	case 96:	return 0x8;
   1395        1.1    rpaulo 	case 108:	return 0xc;
   1396        1.1    rpaulo 
   1397        1.1    rpaulo 	/* unsupported rates (should not get there) */
   1398        1.1    rpaulo 	default:	return 0xff;
   1399        1.1    rpaulo 	}
   1400        1.1    rpaulo }
   1401        1.1    rpaulo 
   1402        1.1    rpaulo static void
   1403        1.1    rpaulo rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
   1404        1.1    rpaulo     uint32_t flags, uint16_t xflags, int len, int rate,
   1405        1.1    rpaulo     const bus_dma_segment_t *segs, int nsegs, int ac)
   1406        1.1    rpaulo {
   1407        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   1408        1.1    rpaulo 	uint16_t plcp_length;
   1409        1.1    rpaulo 	int i, remainder;
   1410        1.1    rpaulo 
   1411        1.1    rpaulo 	desc->flags = htole32(flags);
   1412        1.1    rpaulo 	desc->flags |= htole32(len << 16);
   1413        1.1    rpaulo 
   1414        1.1    rpaulo 	desc->xflags = htole16(xflags);
   1415        1.1    rpaulo 	desc->xflags |= htole16(nsegs << 13);
   1416        1.1    rpaulo 
   1417        1.1    rpaulo 	desc->wme = htole16(
   1418        1.1    rpaulo 	    RT2661_QID(ac) |
   1419        1.1    rpaulo 	    RT2661_AIFSN(2) |
   1420        1.1    rpaulo 	    RT2661_LOGCWMIN(4) |
   1421        1.1    rpaulo 	    RT2661_LOGCWMAX(10));
   1422        1.1    rpaulo 
   1423        1.1    rpaulo 	/*
   1424        1.1    rpaulo 	 * Remember in which queue this frame was sent. This field is driver
   1425        1.1    rpaulo 	 * private data only. It will be made available by the NIC in STA_CSR4
   1426        1.1    rpaulo 	 * on Tx interrupts.
   1427        1.1    rpaulo 	 */
   1428        1.1    rpaulo 	desc->qid = ac;
   1429        1.1    rpaulo 
   1430        1.1    rpaulo 	/* setup PLCP fields */
   1431        1.1    rpaulo 	desc->plcp_signal  = rt2661_plcp_signal(rate);
   1432        1.1    rpaulo 	desc->plcp_service = 4;
   1433        1.1    rpaulo 
   1434        1.1    rpaulo 	len += IEEE80211_CRC_LEN;
   1435        1.1    rpaulo 	if (RAL_RATE_IS_OFDM(rate)) {
   1436        1.1    rpaulo 		desc->flags |= htole32(RT2661_TX_OFDM);
   1437        1.1    rpaulo 
   1438        1.1    rpaulo 		plcp_length = len & 0xfff;
   1439        1.1    rpaulo 		desc->plcp_length_hi = plcp_length >> 6;
   1440        1.1    rpaulo 		desc->plcp_length_lo = plcp_length & 0x3f;
   1441        1.1    rpaulo 	} else {
   1442        1.1    rpaulo 		plcp_length = (16 * len + rate - 1) / rate;
   1443        1.1    rpaulo 		if (rate == 22) {
   1444        1.1    rpaulo 			remainder = (16 * len) % 22;
   1445        1.1    rpaulo 			if (remainder != 0 && remainder < 7)
   1446        1.1    rpaulo 				desc->plcp_service |= RT2661_PLCP_LENGEXT;
   1447        1.1    rpaulo 		}
   1448        1.1    rpaulo 		desc->plcp_length_hi = plcp_length >> 8;
   1449        1.1    rpaulo 		desc->plcp_length_lo = plcp_length & 0xff;
   1450        1.1    rpaulo 
   1451        1.1    rpaulo 		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
   1452        1.1    rpaulo 			desc->plcp_signal |= 0x08;
   1453        1.1    rpaulo 	}
   1454        1.1    rpaulo 
   1455        1.1    rpaulo 	/* RT2x61 supports scatter with up to 5 segments */
   1456        1.1    rpaulo 	for (i = 0; i < nsegs; i++) {
   1457        1.1    rpaulo 		desc->addr[i] = htole32(segs[i].ds_addr);
   1458        1.1    rpaulo 		desc->len [i] = htole16(segs[i].ds_len);
   1459        1.1    rpaulo 	}
   1460       1.24       scw 
   1461       1.24       scw 	desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
   1462        1.1    rpaulo }
   1463        1.1    rpaulo 
   1464        1.1    rpaulo static int
   1465        1.1    rpaulo rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
   1466        1.1    rpaulo     struct ieee80211_node *ni)
   1467        1.1    rpaulo {
   1468        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   1469        1.1    rpaulo 	struct rt2661_tx_desc *desc;
   1470        1.1    rpaulo 	struct rt2661_tx_data *data;
   1471        1.1    rpaulo 	struct ieee80211_frame *wh;
   1472        1.1    rpaulo 	uint16_t dur;
   1473        1.1    rpaulo 	uint32_t flags = 0;
   1474        1.1    rpaulo 	int rate, error;
   1475        1.1    rpaulo 
   1476        1.1    rpaulo 	desc = &sc->mgtq.desc[sc->mgtq.cur];
   1477        1.1    rpaulo 	data = &sc->mgtq.data[sc->mgtq.cur];
   1478        1.1    rpaulo 
   1479        1.1    rpaulo 	/* send mgt frames at the lowest available rate */
   1480        1.1    rpaulo 	rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
   1481        1.1    rpaulo 
   1482       1.20  degroote 	wh = mtod(m0, struct ieee80211_frame *);
   1483       1.20  degroote 
   1484       1.20  degroote 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
   1485       1.24       scw 		if (ieee80211_crypto_encap(ic, ni, m0) == NULL) {
   1486       1.20  degroote 			m_freem(m0);
   1487       1.20  degroote 			return ENOBUFS;
   1488       1.20  degroote 		}
   1489       1.24       scw 
   1490       1.24       scw 		/* packet header may have moved, reset our local pointer */
   1491       1.24       scw 		wh = mtod(m0, struct ieee80211_frame *);
   1492       1.20  degroote 	}
   1493       1.20  degroote 
   1494        1.1    rpaulo 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
   1495        1.1    rpaulo 	    BUS_DMA_NOWAIT);
   1496        1.1    rpaulo 	if (error != 0) {
   1497       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
   1498       1.23    cegger 		    error);
   1499        1.1    rpaulo 		m_freem(m0);
   1500        1.1    rpaulo 		return error;
   1501        1.1    rpaulo 	}
   1502        1.1    rpaulo 
   1503        1.1    rpaulo 	if (sc->sc_drvbpf != NULL) {
   1504        1.1    rpaulo 		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
   1505        1.1    rpaulo 
   1506        1.1    rpaulo 		tap->wt_flags = 0;
   1507        1.1    rpaulo 		tap->wt_rate = rate;
   1508       1.24       scw 		tap->wt_chan_freq = htole16(sc->sc_curchan->ic_freq);
   1509       1.24       scw 		tap->wt_chan_flags = htole16(sc->sc_curchan->ic_flags);
   1510        1.1    rpaulo 
   1511       1.28     joerg 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
   1512        1.1    rpaulo 	}
   1513        1.1    rpaulo 
   1514        1.1    rpaulo 	data->m = m0;
   1515        1.1    rpaulo 	data->ni = ni;
   1516        1.1    rpaulo 
   1517        1.1    rpaulo 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
   1518        1.1    rpaulo 		flags |= RT2661_TX_NEED_ACK;
   1519        1.1    rpaulo 
   1520        1.1    rpaulo 		dur = rt2661_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
   1521       1.24       scw 		    sc->sifs;
   1522        1.1    rpaulo 		*(uint16_t *)wh->i_dur = htole16(dur);
   1523        1.1    rpaulo 
   1524       1.24       scw 		/* tell hardware to set timestamp in probe responses */
   1525        1.1    rpaulo 		if ((wh->i_fc[0] &
   1526        1.1    rpaulo 		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
   1527        1.1    rpaulo 		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
   1528        1.1    rpaulo 			flags |= RT2661_TX_TIMESTAMP;
   1529        1.1    rpaulo 	}
   1530        1.1    rpaulo 
   1531        1.1    rpaulo 	rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
   1532        1.1    rpaulo 	    m0->m_pkthdr.len, rate, data->map->dm_segs, data->map->dm_nsegs,
   1533        1.1    rpaulo 	    RT2661_QID_MGT);
   1534        1.1    rpaulo 
   1535        1.1    rpaulo 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
   1536        1.1    rpaulo 	    BUS_DMASYNC_PREWRITE);
   1537        1.1    rpaulo 	bus_dmamap_sync(sc->sc_dmat, sc->mgtq.map,
   1538        1.1    rpaulo 	    sc->mgtq.cur * RT2661_TX_DESC_SIZE, RT2661_TX_DESC_SIZE,
   1539        1.1    rpaulo 	    BUS_DMASYNC_PREWRITE);
   1540        1.1    rpaulo 
   1541        1.1    rpaulo 	DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
   1542        1.1    rpaulo 	    m0->m_pkthdr.len, sc->mgtq.cur, rate));
   1543        1.1    rpaulo 
   1544        1.1    rpaulo 	/* kick mgt */
   1545        1.1    rpaulo 	sc->mgtq.queued++;
   1546        1.1    rpaulo 	sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
   1547        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
   1548        1.1    rpaulo 
   1549        1.1    rpaulo 	return 0;
   1550        1.1    rpaulo }
   1551        1.1    rpaulo 
   1552        1.1    rpaulo /*
   1553        1.1    rpaulo  * Build a RTS control frame.
   1554        1.1    rpaulo  */
   1555        1.1    rpaulo static struct mbuf *
   1556        1.1    rpaulo rt2661_get_rts(struct rt2661_softc *sc, struct ieee80211_frame *wh,
   1557        1.1    rpaulo     uint16_t dur)
   1558        1.1    rpaulo {
   1559        1.1    rpaulo 	struct ieee80211_frame_rts *rts;
   1560        1.1    rpaulo 	struct mbuf *m;
   1561        1.1    rpaulo 
   1562        1.1    rpaulo 	MGETHDR(m, M_DONTWAIT, MT_DATA);
   1563        1.1    rpaulo 	if (m == NULL) {
   1564        1.1    rpaulo 		sc->sc_ic.ic_stats.is_tx_nobuf++;
   1565       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate RTS frame\n");
   1566        1.1    rpaulo 		return NULL;
   1567        1.1    rpaulo 	}
   1568        1.1    rpaulo 
   1569        1.1    rpaulo 	rts = mtod(m, struct ieee80211_frame_rts *);
   1570        1.1    rpaulo 
   1571        1.1    rpaulo 	rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
   1572        1.1    rpaulo 	    IEEE80211_FC0_SUBTYPE_RTS;
   1573        1.1    rpaulo 	rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   1574        1.1    rpaulo 	*(uint16_t *)rts->i_dur = htole16(dur);
   1575        1.1    rpaulo 	IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
   1576        1.1    rpaulo 	IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
   1577        1.1    rpaulo 
   1578        1.1    rpaulo 	m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
   1579        1.1    rpaulo 
   1580        1.1    rpaulo 	return m;
   1581        1.1    rpaulo }
   1582        1.1    rpaulo 
   1583        1.1    rpaulo static int
   1584        1.1    rpaulo rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
   1585        1.1    rpaulo     struct ieee80211_node *ni, int ac)
   1586        1.1    rpaulo {
   1587        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   1588        1.1    rpaulo 	struct rt2661_tx_ring *txq = &sc->txq[ac];
   1589        1.1    rpaulo 	struct rt2661_tx_desc *desc;
   1590        1.1    rpaulo 	struct rt2661_tx_data *data;
   1591        1.1    rpaulo 	struct ieee80211_frame *wh;
   1592        1.1    rpaulo 	struct ieee80211_key *k;
   1593        1.1    rpaulo 	struct mbuf *mnew;
   1594        1.1    rpaulo 	uint16_t dur;
   1595        1.1    rpaulo 	uint32_t flags = 0;
   1596       1.24       scw 	int rate, useprot, error, tid;
   1597        1.1    rpaulo 
   1598        1.1    rpaulo 	wh = mtod(m0, struct ieee80211_frame *);
   1599        1.1    rpaulo 
   1600        1.1    rpaulo 	if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
   1601       1.24       scw 		rate = ic->ic_sup_rates[ic->ic_curmode].
   1602       1.24       scw 		    rs_rates[ic->ic_fixed_rate];
   1603       1.24       scw 	} else
   1604       1.24       scw 		rate = ni->ni_rates.rs_rates[ni->ni_txrate];
   1605        1.1    rpaulo 	rate &= IEEE80211_RATE_VAL;
   1606       1.24       scw 	if (rate == 0)
   1607       1.24       scw 		rate = 2;	/* XXX should not happen */
   1608        1.1    rpaulo 
   1609        1.1    rpaulo 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
   1610        1.1    rpaulo 		k = ieee80211_crypto_encap(ic, ni, m0);
   1611        1.1    rpaulo 		if (k == NULL) {
   1612        1.1    rpaulo 			m_freem(m0);
   1613        1.1    rpaulo 			return ENOBUFS;
   1614        1.1    rpaulo 		}
   1615        1.1    rpaulo 
   1616        1.1    rpaulo 		/* packet header may have moved, reset our local pointer */
   1617        1.1    rpaulo 		wh = mtod(m0, struct ieee80211_frame *);
   1618        1.1    rpaulo 	}
   1619        1.1    rpaulo 
   1620        1.1    rpaulo 	/*
   1621       1.24       scw 	 * Packet Bursting: backoff after ppb=8 frames to give other STAs a
   1622       1.24       scw 	 * chance to contend for the wireless medium.
   1623       1.24       scw 	 */
   1624       1.24       scw 	tid = WME_AC_TO_TID(M_WME_GETAC(m0));
   1625       1.24       scw 	if (ic->ic_opmode == IEEE80211_M_STA && (ni->ni_txseqs[tid] & 7))
   1626       1.24       scw 		flags |= RT2661_TX_IFS_SIFS;
   1627       1.24       scw 
   1628       1.24       scw 	/*
   1629        1.1    rpaulo 	 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
   1630        1.1    rpaulo 	 * for directed frames only when the length of the MPDU is greater
   1631       1.24       scw 	 * than the length threshold indicated by" ic_rtsthreshold.
   1632       1.24       scw 	 *
   1633       1.24       scw 	 * IEEE Std 802.11-2003g, pp 13: "ERP STAs shall use protection
   1634       1.24       scw 	 * mechanism (such as RTS/CTS or CTS-to-self) for ERP-OFDM MPDUs of
   1635       1.24       scw 	 * type Data or an MMPDU".
   1636        1.1    rpaulo 	 */
   1637       1.24       scw 	useprot = !IEEE80211_IS_MULTICAST(wh->i_addr1) &&
   1638       1.24       scw 	    (m0->m_pkthdr.len + IEEE80211_CRC_LEN > ic->ic_rtsthreshold ||
   1639       1.24       scw 	    ((ic->ic_flags & IEEE80211_F_USEPROT) && RAL_RATE_IS_OFDM(rate)));
   1640       1.24       scw 	if (useprot) {
   1641        1.1    rpaulo 		struct mbuf *m;
   1642        1.1    rpaulo 		int rtsrate, ackrate;
   1643        1.1    rpaulo 
   1644        1.1    rpaulo 		rtsrate = IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ? 12 : 2;
   1645        1.1    rpaulo 		ackrate = rt2661_ack_rate(ic, rate);
   1646        1.1    rpaulo 
   1647        1.1    rpaulo 		dur = rt2661_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) +
   1648        1.1    rpaulo 		      rt2661_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) +
   1649        1.1    rpaulo 		      rt2661_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
   1650       1.24       scw 		      3 * sc->sifs;
   1651        1.1    rpaulo 
   1652        1.1    rpaulo 		m = rt2661_get_rts(sc, wh, dur);
   1653       1.24       scw 		if (m == NULL) {
   1654       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not allocate RTS "
   1655       1.24       scw 			    "frame\n");
   1656       1.24       scw 			m_freem(m0);
   1657       1.24       scw 			return ENOBUFS;
   1658       1.24       scw 		}
   1659        1.1    rpaulo 
   1660        1.1    rpaulo 		desc = &txq->desc[txq->cur];
   1661        1.1    rpaulo 		data = &txq->data[txq->cur];
   1662        1.1    rpaulo 
   1663        1.1    rpaulo 		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
   1664        1.1    rpaulo 		    BUS_DMA_NOWAIT);
   1665        1.1    rpaulo 		if (error != 0) {
   1666       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", error);
   1667        1.1    rpaulo 			m_freem(m);
   1668        1.1    rpaulo 			m_freem(m0);
   1669        1.1    rpaulo 			return error;
   1670        1.1    rpaulo 		}
   1671        1.1    rpaulo 
   1672        1.1    rpaulo 		/* avoid multiple free() of the same node for each fragment */
   1673        1.1    rpaulo 		ieee80211_ref_node(ni);
   1674        1.1    rpaulo 
   1675        1.1    rpaulo 		data->m = m;
   1676        1.1    rpaulo 		data->ni = ni;
   1677        1.1    rpaulo 
   1678        1.1    rpaulo 		rt2661_setup_tx_desc(sc, desc, RT2661_TX_NEED_ACK |
   1679        1.1    rpaulo 		    RT2661_TX_MORE_FRAG, 0, m->m_pkthdr.len, rtsrate,
   1680        1.1    rpaulo 		    data->map->dm_segs, data->map->dm_nsegs, ac);
   1681        1.1    rpaulo 
   1682        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
   1683        1.1    rpaulo 		    data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
   1684        1.1    rpaulo 		bus_dmamap_sync(sc->sc_dmat, txq->map,
   1685        1.1    rpaulo 		    txq->cur * RT2661_TX_DESC_SIZE, RT2661_TX_DESC_SIZE,
   1686        1.1    rpaulo 		    BUS_DMASYNC_PREWRITE);
   1687        1.1    rpaulo 
   1688        1.1    rpaulo 		txq->queued++;
   1689        1.1    rpaulo 		txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
   1690        1.1    rpaulo 
   1691       1.24       scw 		flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS_SIFS;
   1692        1.1    rpaulo 	}
   1693        1.1    rpaulo 
   1694        1.1    rpaulo 	data = &txq->data[txq->cur];
   1695        1.1    rpaulo 	desc = &txq->desc[txq->cur];
   1696        1.1    rpaulo 
   1697        1.1    rpaulo 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
   1698        1.1    rpaulo 	    BUS_DMA_NOWAIT);
   1699        1.1    rpaulo 	if (error != 0 && error != EFBIG) {
   1700       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n",
   1701       1.23    cegger 		    error);
   1702        1.1    rpaulo 		m_freem(m0);
   1703        1.1    rpaulo 		return error;
   1704        1.1    rpaulo 	}
   1705        1.1    rpaulo 	if (error != 0) {
   1706        1.1    rpaulo 		/* too many fragments, linearize */
   1707        1.1    rpaulo 
   1708        1.1    rpaulo 		MGETHDR(mnew, M_DONTWAIT, MT_DATA);
   1709        1.1    rpaulo 		if (mnew == NULL) {
   1710        1.1    rpaulo 			m_freem(m0);
   1711        1.1    rpaulo 			return ENOMEM;
   1712        1.1    rpaulo 		}
   1713        1.1    rpaulo 
   1714        1.1    rpaulo 		M_COPY_PKTHDR(mnew, m0);
   1715        1.1    rpaulo 		if (m0->m_pkthdr.len > MHLEN) {
   1716        1.1    rpaulo 			MCLGET(mnew, M_DONTWAIT);
   1717        1.1    rpaulo 			if (!(mnew->m_flags & M_EXT)) {
   1718        1.1    rpaulo 				m_freem(m0);
   1719        1.1    rpaulo 				m_freem(mnew);
   1720        1.1    rpaulo 				return ENOMEM;
   1721        1.1    rpaulo 			}
   1722        1.1    rpaulo 		}
   1723        1.1    rpaulo 
   1724       1.14  christos 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *));
   1725        1.1    rpaulo 		m_freem(m0);
   1726        1.1    rpaulo 		mnew->m_len = mnew->m_pkthdr.len;
   1727        1.1    rpaulo 		m0 = mnew;
   1728        1.1    rpaulo 
   1729        1.1    rpaulo 		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
   1730        1.1    rpaulo 		    BUS_DMA_NOWAIT);
   1731        1.1    rpaulo 		if (error != 0) {
   1732       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", error);
   1733        1.1    rpaulo 			m_freem(m0);
   1734        1.1    rpaulo 			return error;
   1735        1.1    rpaulo 		}
   1736        1.1    rpaulo 
   1737        1.1    rpaulo 		/* packet header have moved, reset our local pointer */
   1738        1.1    rpaulo 		wh = mtod(m0, struct ieee80211_frame *);
   1739        1.1    rpaulo 	}
   1740        1.1    rpaulo 
   1741        1.1    rpaulo 	if (sc->sc_drvbpf != NULL) {
   1742        1.1    rpaulo 		struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
   1743        1.1    rpaulo 
   1744        1.1    rpaulo 		tap->wt_flags = 0;
   1745        1.1    rpaulo 		tap->wt_rate = rate;
   1746       1.24       scw 		tap->wt_chan_freq = htole16(sc->sc_curchan->ic_freq);
   1747       1.24       scw 		tap->wt_chan_flags = htole16(sc->sc_curchan->ic_flags);
   1748        1.1    rpaulo 
   1749       1.28     joerg 		bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
   1750        1.1    rpaulo 	}
   1751        1.1    rpaulo 
   1752        1.1    rpaulo 	data->m = m0;
   1753        1.1    rpaulo 	data->ni = ni;
   1754        1.1    rpaulo 
   1755        1.1    rpaulo 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
   1756        1.1    rpaulo 		flags |= RT2661_TX_NEED_ACK;
   1757        1.1    rpaulo 
   1758        1.1    rpaulo 		dur = rt2661_txtime(RAL_ACK_SIZE, rt2661_ack_rate(ic, rate),
   1759       1.24       scw 		    ic->ic_flags) + sc->sifs;
   1760        1.1    rpaulo 		*(uint16_t *)wh->i_dur = htole16(dur);
   1761        1.1    rpaulo 	}
   1762        1.1    rpaulo 
   1763        1.1    rpaulo 	rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate,
   1764        1.1    rpaulo 	    data->map->dm_segs, data->map->dm_nsegs, ac);
   1765        1.1    rpaulo 
   1766        1.1    rpaulo 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
   1767        1.1    rpaulo 	    BUS_DMASYNC_PREWRITE);
   1768        1.1    rpaulo 	bus_dmamap_sync(sc->sc_dmat, txq->map, txq->cur * RT2661_TX_DESC_SIZE,
   1769        1.1    rpaulo 	    RT2661_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
   1770        1.1    rpaulo 
   1771        1.1    rpaulo 	DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
   1772        1.1    rpaulo 	    m0->m_pkthdr.len, txq->cur, rate));
   1773        1.1    rpaulo 
   1774        1.1    rpaulo 	/* kick Tx */
   1775        1.1    rpaulo 	txq->queued++;
   1776        1.1    rpaulo 	txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
   1777        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1);
   1778        1.1    rpaulo 
   1779        1.1    rpaulo 	return 0;
   1780        1.1    rpaulo }
   1781        1.1    rpaulo 
   1782        1.1    rpaulo static void
   1783        1.1    rpaulo rt2661_start(struct ifnet *ifp)
   1784        1.1    rpaulo {
   1785        1.1    rpaulo 	struct rt2661_softc *sc = ifp->if_softc;
   1786        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   1787        1.1    rpaulo 	struct mbuf *m0;
   1788        1.1    rpaulo 	struct ether_header *eh;
   1789        1.1    rpaulo 	struct ieee80211_node *ni = NULL;
   1790        1.1    rpaulo 
   1791        1.1    rpaulo 	/*
   1792        1.1    rpaulo 	 * net80211 may still try to send management frames even if the
   1793        1.1    rpaulo 	 * IFF_RUNNING flag is not set...
   1794        1.1    rpaulo 	 */
   1795        1.1    rpaulo 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
   1796        1.1    rpaulo 		return;
   1797        1.1    rpaulo 
   1798        1.1    rpaulo 	for (;;) {
   1799        1.1    rpaulo 		IF_POLL(&ic->ic_mgtq, m0);
   1800        1.1    rpaulo 		if (m0 != NULL) {
   1801        1.1    rpaulo 			if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
   1802        1.1    rpaulo 				ifp->if_flags |= IFF_OACTIVE;
   1803        1.1    rpaulo 				break;
   1804        1.1    rpaulo 			}
   1805        1.1    rpaulo 			IF_DEQUEUE(&ic->ic_mgtq, m0);
   1806        1.8    rpaulo 			if (m0 == NULL)
   1807        1.8    rpaulo 				break;
   1808        1.1    rpaulo 
   1809        1.1    rpaulo 			ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
   1810        1.1    rpaulo 			m0->m_pkthdr.rcvif = NULL;
   1811       1.28     joerg 			bpf_mtap3(ic->ic_rawbpf, m0);
   1812        1.1    rpaulo 			if (rt2661_tx_mgt(sc, m0, ni) != 0)
   1813        1.1    rpaulo 				break;
   1814        1.1    rpaulo 
   1815        1.1    rpaulo 		} else {
   1816       1.24       scw 			IF_POLL(&ifp->if_snd, m0);
   1817       1.24       scw 			if (m0 == NULL || ic->ic_state != IEEE80211_S_RUN)
   1818        1.1    rpaulo 				break;
   1819       1.24       scw 
   1820       1.24       scw 			if (sc->txq[0].queued >= RT2661_TX_RING_COUNT - 1) {
   1821       1.24       scw 				/* there is no place left in this ring */
   1822       1.24       scw 				ifp->if_flags |= IFF_OACTIVE;
   1823       1.24       scw 				break;
   1824       1.24       scw 			}
   1825       1.24       scw 
   1826        1.1    rpaulo 			IFQ_DEQUEUE(&ifp->if_snd, m0);
   1827        1.1    rpaulo 
   1828        1.1    rpaulo 			if (m0->m_len < sizeof (struct ether_header) &&
   1829        1.1    rpaulo 			    !(m0 = m_pullup(m0, sizeof (struct ether_header))))
   1830        1.1    rpaulo 				continue;
   1831        1.1    rpaulo 
   1832        1.1    rpaulo 			eh = mtod(m0, struct ether_header *);
   1833        1.1    rpaulo 			ni = ieee80211_find_txnode(ic, eh->ether_dhost);
   1834        1.1    rpaulo 			if (ni == NULL) {
   1835        1.1    rpaulo 				m_freem(m0);
   1836        1.1    rpaulo 				ifp->if_oerrors++;
   1837        1.1    rpaulo 				continue;
   1838        1.1    rpaulo 			}
   1839        1.1    rpaulo 
   1840       1.28     joerg 			bpf_mtap3(ifp->if_bpf, m0);
   1841        1.1    rpaulo 			m0 = ieee80211_encap(ic, m0, ni);
   1842        1.1    rpaulo 			if (m0 == NULL) {
   1843        1.1    rpaulo 				ieee80211_free_node(ni);
   1844        1.1    rpaulo 				ifp->if_oerrors++;
   1845        1.1    rpaulo 				continue;
   1846        1.1    rpaulo 			}
   1847       1.28     joerg 			bpf_mtap3(ic->ic_rawbpf, m0);
   1848        1.1    rpaulo 			if (rt2661_tx_data(sc, m0, ni, 0) != 0) {
   1849        1.1    rpaulo 				if (ni != NULL)
   1850        1.1    rpaulo 					ieee80211_free_node(ni);
   1851        1.1    rpaulo 				ifp->if_oerrors++;
   1852        1.1    rpaulo 				break;
   1853        1.1    rpaulo 			}
   1854        1.1    rpaulo 		}
   1855        1.1    rpaulo 
   1856        1.1    rpaulo 		sc->sc_tx_timer = 5;
   1857        1.1    rpaulo 		ifp->if_timer = 1;
   1858        1.1    rpaulo 	}
   1859        1.1    rpaulo }
   1860        1.1    rpaulo 
   1861        1.1    rpaulo static void
   1862        1.1    rpaulo rt2661_watchdog(struct ifnet *ifp)
   1863        1.1    rpaulo {
   1864        1.1    rpaulo 	struct rt2661_softc *sc = ifp->if_softc;
   1865        1.1    rpaulo 
   1866        1.1    rpaulo 	ifp->if_timer = 0;
   1867        1.1    rpaulo 
   1868        1.1    rpaulo 	if (sc->sc_tx_timer > 0) {
   1869        1.1    rpaulo 		if (--sc->sc_tx_timer == 0) {
   1870       1.29  drochner 			aprint_error_dev(sc->sc_dev, "device timeout\n");
   1871        1.1    rpaulo 			rt2661_init(ifp);
   1872        1.1    rpaulo 			ifp->if_oerrors++;
   1873        1.1    rpaulo 			return;
   1874        1.1    rpaulo 		}
   1875        1.1    rpaulo 		ifp->if_timer = 1;
   1876        1.1    rpaulo 	}
   1877        1.1    rpaulo 
   1878        1.1    rpaulo 	ieee80211_watchdog(&sc->sc_ic);
   1879        1.1    rpaulo }
   1880        1.1    rpaulo 
   1881        1.1    rpaulo /*
   1882        1.1    rpaulo  * This function allows for fast channel switching in monitor mode (used by
   1883        1.1    rpaulo  * kismet). In IBSS mode, we must explicitly reset the interface to
   1884        1.1    rpaulo  * generate a new beacon frame.
   1885        1.1    rpaulo  */
   1886        1.1    rpaulo static int
   1887        1.1    rpaulo rt2661_reset(struct ifnet *ifp)
   1888        1.1    rpaulo {
   1889        1.1    rpaulo 	struct rt2661_softc *sc = ifp->if_softc;
   1890        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   1891        1.1    rpaulo 
   1892        1.1    rpaulo 	if (ic->ic_opmode != IEEE80211_M_MONITOR)
   1893        1.1    rpaulo 		return ENETRESET;
   1894        1.1    rpaulo 
   1895        1.1    rpaulo 	rt2661_set_chan(sc, ic->ic_curchan);
   1896        1.1    rpaulo 
   1897        1.1    rpaulo 	return 0;
   1898        1.1    rpaulo }
   1899        1.1    rpaulo 
   1900        1.1    rpaulo static int
   1901       1.14  christos rt2661_ioctl(struct ifnet *ifp, u_long cmd, void *data)
   1902        1.1    rpaulo {
   1903        1.1    rpaulo 	struct rt2661_softc *sc = ifp->if_softc;
   1904        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   1905        1.1    rpaulo 	int s, error = 0;
   1906        1.1    rpaulo 
   1907        1.1    rpaulo 	s = splnet();
   1908        1.1    rpaulo 
   1909        1.1    rpaulo 	switch (cmd) {
   1910        1.1    rpaulo 	case SIOCSIFFLAGS:
   1911       1.25    dyoung 		if ((error = ifioctl_common(ifp, cmd, data)) != 0)
   1912       1.25    dyoung 			break;
   1913        1.1    rpaulo 		if (ifp->if_flags & IFF_UP) {
   1914        1.1    rpaulo 			if (ifp->if_flags & IFF_RUNNING)
   1915        1.1    rpaulo 				rt2661_update_promisc(sc);
   1916        1.1    rpaulo 			else
   1917        1.1    rpaulo 				rt2661_init(ifp);
   1918        1.1    rpaulo 		} else {
   1919        1.1    rpaulo 			if (ifp->if_flags & IFF_RUNNING)
   1920        1.1    rpaulo 				rt2661_stop(ifp, 1);
   1921        1.1    rpaulo 		}
   1922        1.1    rpaulo 		break;
   1923        1.1    rpaulo 
   1924        1.1    rpaulo 	case SIOCADDMULTI:
   1925        1.1    rpaulo 	case SIOCDELMULTI:
   1926       1.17    dyoung 		/* XXX no h/w multicast filter? --dyoung */
   1927       1.17    dyoung 		if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET)
   1928        1.1    rpaulo 			error = 0;
   1929        1.1    rpaulo 		break;
   1930        1.1    rpaulo 
   1931        1.1    rpaulo 	case SIOCS80211CHANNEL:
   1932        1.1    rpaulo 		/*
   1933        1.1    rpaulo 		 * This allows for fast channel switching in monitor mode
   1934        1.1    rpaulo 		 * (used by kismet). In IBSS mode, we must explicitly reset
   1935        1.1    rpaulo 		 * the interface to generate a new beacon frame.
   1936        1.1    rpaulo 		 */
   1937        1.1    rpaulo 		error = ieee80211_ioctl(ic, cmd, data);
   1938        1.1    rpaulo 		if (error == ENETRESET &&
   1939        1.1    rpaulo 		    ic->ic_opmode == IEEE80211_M_MONITOR) {
   1940       1.22   xtraeme 			if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
   1941       1.22   xtraeme 			     (IFF_UP | IFF_RUNNING))
   1942       1.22   xtraeme 				rt2661_set_chan(sc, ic->ic_ibss_chan);
   1943        1.1    rpaulo 			error = 0;
   1944        1.1    rpaulo 		}
   1945        1.1    rpaulo 		break;
   1946        1.1    rpaulo 
   1947        1.1    rpaulo 	default:
   1948        1.1    rpaulo 		error = ieee80211_ioctl(ic, cmd, data);
   1949        1.1    rpaulo 
   1950        1.1    rpaulo 	}
   1951        1.1    rpaulo 
   1952        1.1    rpaulo 	if (error == ENETRESET) {
   1953        1.1    rpaulo 		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
   1954        1.1    rpaulo 		    (IFF_UP | IFF_RUNNING))
   1955        1.1    rpaulo 			rt2661_init(ifp);
   1956        1.1    rpaulo 		error = 0;
   1957        1.1    rpaulo 	}
   1958        1.1    rpaulo 
   1959        1.1    rpaulo 	splx(s);
   1960        1.1    rpaulo 
   1961        1.1    rpaulo 	return error;
   1962        1.1    rpaulo }
   1963        1.1    rpaulo 
   1964        1.1    rpaulo static void
   1965        1.1    rpaulo rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
   1966        1.1    rpaulo {
   1967        1.1    rpaulo 	uint32_t tmp;
   1968        1.1    rpaulo 	int ntries;
   1969        1.1    rpaulo 
   1970        1.1    rpaulo 	for (ntries = 0; ntries < 100; ntries++) {
   1971        1.1    rpaulo 		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
   1972        1.1    rpaulo 			break;
   1973        1.1    rpaulo 		DELAY(1);
   1974        1.1    rpaulo 	}
   1975        1.1    rpaulo 	if (ntries == 100) {
   1976       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not write to BBP\n");
   1977        1.1    rpaulo 		return;
   1978        1.1    rpaulo 	}
   1979        1.1    rpaulo 
   1980        1.1    rpaulo 	tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
   1981        1.1    rpaulo 	RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
   1982        1.1    rpaulo 
   1983        1.1    rpaulo 	DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
   1984        1.1    rpaulo }
   1985        1.1    rpaulo 
   1986        1.1    rpaulo static uint8_t
   1987        1.1    rpaulo rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
   1988        1.1    rpaulo {
   1989        1.1    rpaulo 	uint32_t val;
   1990        1.1    rpaulo 	int ntries;
   1991        1.1    rpaulo 
   1992        1.1    rpaulo 	for (ntries = 0; ntries < 100; ntries++) {
   1993        1.1    rpaulo 		if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
   1994        1.1    rpaulo 			break;
   1995        1.1    rpaulo 		DELAY(1);
   1996        1.1    rpaulo 	}
   1997        1.1    rpaulo 	if (ntries == 100) {
   1998       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not read from BBP\n");
   1999        1.1    rpaulo 		return 0;
   2000        1.1    rpaulo 	}
   2001        1.1    rpaulo 
   2002        1.1    rpaulo 	val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
   2003        1.1    rpaulo 	RAL_WRITE(sc, RT2661_PHY_CSR3, val);
   2004        1.1    rpaulo 
   2005        1.1    rpaulo 	for (ntries = 0; ntries < 100; ntries++) {
   2006        1.1    rpaulo 		val = RAL_READ(sc, RT2661_PHY_CSR3);
   2007        1.1    rpaulo 		if (!(val & RT2661_BBP_BUSY))
   2008        1.1    rpaulo 			return val & 0xff;
   2009        1.1    rpaulo 		DELAY(1);
   2010        1.1    rpaulo 	}
   2011        1.1    rpaulo 
   2012       1.29  drochner 	aprint_error_dev(sc->sc_dev, "could not read from BBP\n");
   2013        1.1    rpaulo 	return 0;
   2014        1.1    rpaulo }
   2015        1.1    rpaulo 
   2016        1.1    rpaulo static void
   2017        1.1    rpaulo rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
   2018        1.1    rpaulo {
   2019        1.1    rpaulo 	uint32_t tmp;
   2020        1.1    rpaulo 	int ntries;
   2021        1.1    rpaulo 
   2022        1.1    rpaulo 	for (ntries = 0; ntries < 100; ntries++) {
   2023        1.1    rpaulo 		if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
   2024        1.1    rpaulo 			break;
   2025        1.1    rpaulo 		DELAY(1);
   2026        1.1    rpaulo 	}
   2027        1.1    rpaulo 	if (ntries == 100) {
   2028       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not write to RF\n");
   2029        1.1    rpaulo 		return;
   2030        1.1    rpaulo 	}
   2031        1.1    rpaulo 	tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
   2032        1.1    rpaulo 	    (reg & 3);
   2033        1.1    rpaulo 	RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
   2034        1.1    rpaulo 
   2035        1.1    rpaulo 	/* remember last written value in sc */
   2036        1.1    rpaulo 	sc->rf_regs[reg] = val;
   2037        1.1    rpaulo 
   2038        1.1    rpaulo 	DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff));
   2039        1.1    rpaulo }
   2040        1.1    rpaulo 
   2041        1.1    rpaulo static int
   2042        1.1    rpaulo rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
   2043        1.1    rpaulo {
   2044        1.1    rpaulo 	if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
   2045        1.1    rpaulo 		return EIO;	/* there is already a command pending */
   2046        1.1    rpaulo 
   2047        1.1    rpaulo 	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
   2048        1.1    rpaulo 	    RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
   2049        1.1    rpaulo 
   2050        1.1    rpaulo 	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
   2051        1.1    rpaulo 
   2052        1.1    rpaulo 	return 0;
   2053        1.1    rpaulo }
   2054        1.1    rpaulo 
   2055        1.1    rpaulo static void
   2056        1.1    rpaulo rt2661_select_antenna(struct rt2661_softc *sc)
   2057        1.1    rpaulo {
   2058        1.1    rpaulo 	uint8_t bbp4, bbp77;
   2059        1.1    rpaulo 	uint32_t tmp;
   2060        1.1    rpaulo 
   2061        1.1    rpaulo 	bbp4  = rt2661_bbp_read(sc,  4);
   2062        1.1    rpaulo 	bbp77 = rt2661_bbp_read(sc, 77);
   2063        1.1    rpaulo 
   2064        1.1    rpaulo 	/* TBD */
   2065        1.1    rpaulo 
   2066        1.1    rpaulo 	/* make sure Rx is disabled before switching antenna */
   2067        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
   2068        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
   2069        1.1    rpaulo 
   2070        1.1    rpaulo 	rt2661_bbp_write(sc,  4, bbp4);
   2071        1.1    rpaulo 	rt2661_bbp_write(sc, 77, bbp77);
   2072        1.1    rpaulo 
   2073        1.1    rpaulo 	/* restore Rx filter */
   2074        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
   2075        1.1    rpaulo }
   2076        1.1    rpaulo 
   2077        1.1    rpaulo /*
   2078        1.1    rpaulo  * Enable multi-rate retries for frames sent at OFDM rates.
   2079        1.1    rpaulo  * In 802.11b/g mode, allow fallback to CCK rates.
   2080        1.1    rpaulo  */
   2081        1.1    rpaulo static void
   2082        1.1    rpaulo rt2661_enable_mrr(struct rt2661_softc *sc)
   2083        1.1    rpaulo {
   2084        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2085        1.1    rpaulo 	uint32_t tmp;
   2086        1.1    rpaulo 
   2087        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
   2088        1.1    rpaulo 
   2089        1.1    rpaulo 	tmp &= ~RT2661_MRR_CCK_FALLBACK;
   2090        1.1    rpaulo 	if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan))
   2091        1.1    rpaulo 		tmp |= RT2661_MRR_CCK_FALLBACK;
   2092        1.1    rpaulo 	tmp |= RT2661_MRR_ENABLED;
   2093        1.1    rpaulo 
   2094        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
   2095        1.1    rpaulo }
   2096        1.1    rpaulo 
   2097        1.1    rpaulo static void
   2098        1.1    rpaulo rt2661_set_txpreamble(struct rt2661_softc *sc)
   2099        1.1    rpaulo {
   2100        1.1    rpaulo 	uint32_t tmp;
   2101        1.1    rpaulo 
   2102        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
   2103        1.1    rpaulo 
   2104        1.1    rpaulo 	tmp &= ~RT2661_SHORT_PREAMBLE;
   2105        1.1    rpaulo 	if (sc->sc_ic.ic_flags & IEEE80211_F_SHPREAMBLE)
   2106        1.1    rpaulo 		tmp |= RT2661_SHORT_PREAMBLE;
   2107        1.1    rpaulo 
   2108        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
   2109        1.1    rpaulo }
   2110        1.1    rpaulo 
   2111        1.1    rpaulo static void
   2112        1.1    rpaulo rt2661_set_basicrates(struct rt2661_softc *sc,
   2113        1.1    rpaulo     const struct ieee80211_rateset *rs)
   2114        1.1    rpaulo {
   2115        1.1    rpaulo #define RV(r)	((r) & IEEE80211_RATE_VAL)
   2116        1.1    rpaulo 	uint32_t mask = 0;
   2117        1.1    rpaulo 	uint8_t rate;
   2118        1.1    rpaulo 	int i, j;
   2119        1.1    rpaulo 
   2120        1.1    rpaulo 	for (i = 0; i < rs->rs_nrates; i++) {
   2121        1.1    rpaulo 		rate = rs->rs_rates[i];
   2122        1.1    rpaulo 
   2123        1.1    rpaulo 		if (!(rate & IEEE80211_RATE_BASIC))
   2124        1.1    rpaulo 			continue;
   2125        1.1    rpaulo 
   2126        1.1    rpaulo 		/*
   2127        1.1    rpaulo 		 * Find h/w rate index.  We know it exists because the rate
   2128        1.1    rpaulo 		 * set has already been negotiated.
   2129        1.1    rpaulo 		 */
   2130        1.1    rpaulo 		for (j = 0; rt2661_rateset_11g.rs_rates[j] != RV(rate); j++);
   2131        1.1    rpaulo 
   2132        1.1    rpaulo 		mask |= 1 << j;
   2133        1.1    rpaulo 	}
   2134        1.1    rpaulo 
   2135        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
   2136        1.1    rpaulo 
   2137        1.1    rpaulo 	DPRINTF(("Setting basic rate mask to 0x%x\n", mask));
   2138        1.1    rpaulo #undef RV
   2139        1.1    rpaulo }
   2140        1.1    rpaulo 
   2141        1.1    rpaulo /*
   2142        1.1    rpaulo  * Reprogram MAC/BBP to switch to a new band.  Values taken from the reference
   2143        1.1    rpaulo  * driver.
   2144        1.1    rpaulo  */
   2145        1.1    rpaulo static void
   2146        1.1    rpaulo rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
   2147        1.1    rpaulo {
   2148        1.1    rpaulo 	uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
   2149        1.1    rpaulo 	uint32_t tmp;
   2150        1.1    rpaulo 
   2151        1.1    rpaulo 	/* update all BBP registers that depend on the band */
   2152        1.1    rpaulo 	bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
   2153        1.1    rpaulo 	bbp35 = 0x50; bbp97 = 0x48; bbp98  = 0x48;
   2154        1.1    rpaulo 	if (IEEE80211_IS_CHAN_5GHZ(c)) {
   2155        1.1    rpaulo 		bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
   2156        1.1    rpaulo 		bbp35 += 0x10; bbp97 += 0x10; bbp98  += 0x10;
   2157        1.1    rpaulo 	}
   2158        1.1    rpaulo 	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
   2159        1.1    rpaulo 	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
   2160        1.1    rpaulo 		bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
   2161        1.1    rpaulo 	}
   2162        1.1    rpaulo 
   2163       1.24       scw 	sc->bbp17 = bbp17;
   2164        1.1    rpaulo 	rt2661_bbp_write(sc,  17, bbp17);
   2165        1.1    rpaulo 	rt2661_bbp_write(sc,  96, bbp96);
   2166        1.1    rpaulo 	rt2661_bbp_write(sc, 104, bbp104);
   2167        1.1    rpaulo 
   2168        1.1    rpaulo 	if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
   2169        1.1    rpaulo 	    (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
   2170        1.1    rpaulo 		rt2661_bbp_write(sc, 75, 0x80);
   2171        1.1    rpaulo 		rt2661_bbp_write(sc, 86, 0x80);
   2172        1.1    rpaulo 		rt2661_bbp_write(sc, 88, 0x80);
   2173        1.1    rpaulo 	}
   2174        1.1    rpaulo 
   2175        1.1    rpaulo 	rt2661_bbp_write(sc, 35, bbp35);
   2176        1.1    rpaulo 	rt2661_bbp_write(sc, 97, bbp97);
   2177        1.1    rpaulo 	rt2661_bbp_write(sc, 98, bbp98);
   2178        1.1    rpaulo 
   2179        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_PHY_CSR0);
   2180        1.1    rpaulo 	tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
   2181        1.1    rpaulo 	if (IEEE80211_IS_CHAN_2GHZ(c))
   2182        1.1    rpaulo 		tmp |= RT2661_PA_PE_2GHZ;
   2183        1.1    rpaulo 	else
   2184        1.1    rpaulo 		tmp |= RT2661_PA_PE_5GHZ;
   2185        1.1    rpaulo 	RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
   2186       1.24       scw 
   2187       1.24       scw 	/* 802.11a uses a 16 microseconds short interframe space */
   2188       1.24       scw 	sc->sifs = IEEE80211_IS_CHAN_5GHZ(c) ? 16 : 10;
   2189        1.1    rpaulo }
   2190        1.1    rpaulo 
   2191        1.1    rpaulo static void
   2192        1.1    rpaulo rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
   2193        1.1    rpaulo {
   2194        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2195        1.1    rpaulo 	const struct rfprog *rfprog;
   2196        1.1    rpaulo 	uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
   2197        1.1    rpaulo 	int8_t power;
   2198        1.1    rpaulo 	u_int i, chan;
   2199        1.1    rpaulo 
   2200        1.1    rpaulo 	chan = ieee80211_chan2ieee(ic, c);
   2201        1.1    rpaulo 	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
   2202        1.1    rpaulo 		return;
   2203        1.1    rpaulo 
   2204        1.1    rpaulo 	/* select the appropriate RF settings based on what EEPROM says */
   2205        1.1    rpaulo 	rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
   2206        1.1    rpaulo 
   2207        1.1    rpaulo 	/* find the settings for this channel (we know it exists) */
   2208        1.1    rpaulo 	for (i = 0; rfprog[i].chan != chan; i++);
   2209        1.1    rpaulo 
   2210        1.1    rpaulo 	power = sc->txpow[i];
   2211        1.1    rpaulo 	if (power < 0) {
   2212        1.1    rpaulo 		bbp94 += power;
   2213        1.1    rpaulo 		power = 0;
   2214        1.1    rpaulo 	} else if (power > 31) {
   2215        1.1    rpaulo 		bbp94 += power - 31;
   2216        1.1    rpaulo 		power = 31;
   2217        1.1    rpaulo 	}
   2218        1.1    rpaulo 
   2219        1.1    rpaulo 	/*
   2220       1.18       scw 	 * If we've yet to select a channel, or we are switching from the
   2221       1.18       scw 	 * 2GHz band to the 5GHz band or vice-versa, BBP registers need to
   2222       1.18       scw 	 * be reprogrammed.
   2223        1.1    rpaulo 	 */
   2224       1.18       scw 	if (sc->sc_curchan == NULL || c->ic_flags != sc->sc_curchan->ic_flags) {
   2225        1.1    rpaulo 		rt2661_select_band(sc, c);
   2226        1.1    rpaulo 		rt2661_select_antenna(sc);
   2227        1.1    rpaulo 	}
   2228        1.1    rpaulo 	sc->sc_curchan = c;
   2229        1.1    rpaulo 
   2230        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
   2231        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
   2232        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
   2233        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
   2234        1.1    rpaulo 
   2235        1.1    rpaulo 	DELAY(200);
   2236        1.1    rpaulo 
   2237        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
   2238        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
   2239        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
   2240        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
   2241        1.1    rpaulo 
   2242        1.1    rpaulo 	DELAY(200);
   2243        1.1    rpaulo 
   2244        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
   2245        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
   2246        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
   2247        1.1    rpaulo 	rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
   2248        1.1    rpaulo 
   2249        1.1    rpaulo 	/* enable smart mode for MIMO-capable RFs */
   2250        1.1    rpaulo 	bbp3 = rt2661_bbp_read(sc, 3);
   2251        1.1    rpaulo 
   2252        1.1    rpaulo 	bbp3 &= ~RT2661_SMART_MODE;
   2253        1.1    rpaulo 	if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
   2254        1.1    rpaulo 		bbp3 |= RT2661_SMART_MODE;
   2255        1.1    rpaulo 
   2256        1.1    rpaulo 	rt2661_bbp_write(sc, 3, bbp3);
   2257        1.1    rpaulo 
   2258        1.1    rpaulo 	if (bbp94 != RT2661_BBPR94_DEFAULT)
   2259        1.1    rpaulo 		rt2661_bbp_write(sc, 94, bbp94);
   2260        1.1    rpaulo 
   2261        1.1    rpaulo 	/* 5GHz radio needs a 1ms delay here */
   2262        1.1    rpaulo 	if (IEEE80211_IS_CHAN_5GHZ(c))
   2263        1.1    rpaulo 		DELAY(1000);
   2264        1.1    rpaulo }
   2265        1.1    rpaulo 
   2266        1.1    rpaulo static void
   2267        1.1    rpaulo rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
   2268        1.1    rpaulo {
   2269        1.1    rpaulo 	uint32_t tmp;
   2270        1.1    rpaulo 
   2271        1.1    rpaulo 	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
   2272        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
   2273        1.1    rpaulo 
   2274        1.1    rpaulo 	tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
   2275        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
   2276        1.1    rpaulo }
   2277        1.1    rpaulo 
   2278        1.1    rpaulo static void
   2279        1.1    rpaulo rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
   2280        1.1    rpaulo {
   2281        1.1    rpaulo 	uint32_t tmp;
   2282        1.1    rpaulo 
   2283        1.1    rpaulo 	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
   2284        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
   2285        1.1    rpaulo 
   2286       1.24       scw 	tmp = addr[4] | addr[5] << 8 | 0xff << 16;
   2287        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
   2288        1.1    rpaulo }
   2289        1.1    rpaulo 
   2290        1.1    rpaulo static void
   2291        1.1    rpaulo rt2661_update_promisc(struct rt2661_softc *sc)
   2292        1.1    rpaulo {
   2293        1.1    rpaulo 	struct ifnet *ifp = sc->sc_ic.ic_ifp;
   2294        1.1    rpaulo 	uint32_t tmp;
   2295        1.1    rpaulo 
   2296        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
   2297        1.1    rpaulo 
   2298        1.1    rpaulo 	tmp &= ~RT2661_DROP_NOT_TO_ME;
   2299        1.1    rpaulo 	if (!(ifp->if_flags & IFF_PROMISC))
   2300        1.1    rpaulo 		tmp |= RT2661_DROP_NOT_TO_ME;
   2301        1.1    rpaulo 
   2302        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
   2303        1.1    rpaulo 
   2304        1.1    rpaulo 	DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
   2305        1.1    rpaulo 	    "entering" : "leaving"));
   2306        1.1    rpaulo }
   2307        1.1    rpaulo 
   2308       1.13  christos #if 0
   2309        1.1    rpaulo /*
   2310        1.1    rpaulo  * Update QoS (802.11e) settings for each h/w Tx ring.
   2311        1.1    rpaulo  */
   2312        1.1    rpaulo static int
   2313        1.1    rpaulo rt2661_wme_update(struct ieee80211com *ic)
   2314        1.1    rpaulo {
   2315        1.1    rpaulo 	struct rt2661_softc *sc = ic->ic_ifp->if_softc;
   2316        1.1    rpaulo 	const struct wmeParams *wmep;
   2317        1.1    rpaulo 
   2318        1.1    rpaulo 	wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
   2319        1.1    rpaulo 
   2320        1.1    rpaulo 	/* XXX: not sure about shifts. */
   2321        1.1    rpaulo 	/* XXX: the reference driver plays with AC_VI settings too. */
   2322        1.1    rpaulo 
   2323        1.1    rpaulo 	/* update TxOp */
   2324        1.1    rpaulo 	RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
   2325        1.1    rpaulo 	    wmep[WME_AC_BE].wmep_txopLimit << 16 |
   2326        1.1    rpaulo 	    wmep[WME_AC_BK].wmep_txopLimit);
   2327        1.1    rpaulo 	RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
   2328        1.1    rpaulo 	    wmep[WME_AC_VI].wmep_txopLimit << 16 |
   2329        1.1    rpaulo 	    wmep[WME_AC_VO].wmep_txopLimit);
   2330        1.1    rpaulo 
   2331        1.1    rpaulo 	/* update CWmin */
   2332        1.1    rpaulo 	RAL_WRITE(sc, RT2661_CWMIN_CSR,
   2333        1.1    rpaulo 	    wmep[WME_AC_BE].wmep_logcwmin << 12 |
   2334        1.1    rpaulo 	    wmep[WME_AC_BK].wmep_logcwmin <<  8 |
   2335        1.1    rpaulo 	    wmep[WME_AC_VI].wmep_logcwmin <<  4 |
   2336        1.1    rpaulo 	    wmep[WME_AC_VO].wmep_logcwmin);
   2337        1.1    rpaulo 
   2338        1.1    rpaulo 	/* update CWmax */
   2339        1.1    rpaulo 	RAL_WRITE(sc, RT2661_CWMAX_CSR,
   2340        1.1    rpaulo 	    wmep[WME_AC_BE].wmep_logcwmax << 12 |
   2341        1.1    rpaulo 	    wmep[WME_AC_BK].wmep_logcwmax <<  8 |
   2342        1.1    rpaulo 	    wmep[WME_AC_VI].wmep_logcwmax <<  4 |
   2343        1.1    rpaulo 	    wmep[WME_AC_VO].wmep_logcwmax);
   2344        1.1    rpaulo 
   2345        1.1    rpaulo 	/* update Aifsn */
   2346        1.1    rpaulo 	RAL_WRITE(sc, RT2661_AIFSN_CSR,
   2347        1.1    rpaulo 	    wmep[WME_AC_BE].wmep_aifsn << 12 |
   2348        1.1    rpaulo 	    wmep[WME_AC_BK].wmep_aifsn <<  8 |
   2349        1.1    rpaulo 	    wmep[WME_AC_VI].wmep_aifsn <<  4 |
   2350        1.1    rpaulo 	    wmep[WME_AC_VO].wmep_aifsn);
   2351        1.1    rpaulo 
   2352        1.1    rpaulo 	return 0;
   2353        1.1    rpaulo }
   2354       1.13  christos #endif
   2355        1.1    rpaulo 
   2356        1.1    rpaulo static void
   2357       1.24       scw rt2661_updateslot(struct ifnet *ifp)
   2358        1.1    rpaulo {
   2359        1.1    rpaulo 	struct rt2661_softc *sc = ifp->if_softc;
   2360        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2361       1.24       scw 
   2362       1.24       scw 	if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
   2363       1.24       scw 		/*
   2364       1.24       scw 		 * In HostAP mode, we defer setting of new slot time until
   2365       1.24       scw 		 * updated ERP Information Element has propagated to all
   2366       1.24       scw 		 * associated STAs.
   2367       1.24       scw 		 */
   2368       1.24       scw 		sc->sc_flags |= RT2661_UPDATE_SLOT;
   2369       1.24       scw 	} else
   2370       1.24       scw 		rt2661_set_slottime(sc);
   2371       1.24       scw }
   2372       1.24       scw 
   2373       1.24       scw static void
   2374       1.24       scw rt2661_set_slottime(struct rt2661_softc *sc)
   2375       1.24       scw {
   2376       1.24       scw 	struct ieee80211com *ic = &sc->sc_ic;
   2377        1.1    rpaulo 	uint8_t slottime;
   2378        1.1    rpaulo 	uint32_t tmp;
   2379        1.1    rpaulo 
   2380        1.1    rpaulo 	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
   2381        1.1    rpaulo 
   2382        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_MAC_CSR9);
   2383        1.1    rpaulo 	tmp = (tmp & ~0xff) | slottime;
   2384        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
   2385       1.24       scw 
   2386       1.24       scw 	DPRINTF(("setting slot time to %uus\n", slottime));
   2387        1.1    rpaulo }
   2388        1.1    rpaulo 
   2389        1.1    rpaulo static const char *
   2390        1.1    rpaulo rt2661_get_rf(int rev)
   2391        1.1    rpaulo {
   2392        1.1    rpaulo 	switch (rev) {
   2393        1.1    rpaulo 	case RT2661_RF_5225:	return "RT5225";
   2394        1.1    rpaulo 	case RT2661_RF_5325:	return "RT5325 (MIMO XR)";
   2395        1.1    rpaulo 	case RT2661_RF_2527:	return "RT2527";
   2396        1.1    rpaulo 	case RT2661_RF_2529:	return "RT2529 (MIMO XR)";
   2397        1.1    rpaulo 	default:		return "unknown";
   2398        1.1    rpaulo 	}
   2399        1.1    rpaulo }
   2400        1.1    rpaulo 
   2401        1.1    rpaulo static void
   2402        1.1    rpaulo rt2661_read_eeprom(struct rt2661_softc *sc)
   2403        1.1    rpaulo {
   2404        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2405        1.1    rpaulo 	uint16_t val;
   2406        1.1    rpaulo 	int i;
   2407        1.1    rpaulo 
   2408        1.1    rpaulo 	/* read MAC address */
   2409        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
   2410        1.1    rpaulo 	ic->ic_myaddr[0] = val & 0xff;
   2411        1.1    rpaulo 	ic->ic_myaddr[1] = val >> 8;
   2412        1.1    rpaulo 
   2413        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
   2414        1.1    rpaulo 	ic->ic_myaddr[2] = val & 0xff;
   2415        1.1    rpaulo 	ic->ic_myaddr[3] = val >> 8;
   2416        1.1    rpaulo 
   2417        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
   2418        1.1    rpaulo 	ic->ic_myaddr[4] = val & 0xff;
   2419        1.1    rpaulo 	ic->ic_myaddr[5] = val >> 8;
   2420        1.1    rpaulo 
   2421        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
   2422        1.1    rpaulo 	/* XXX: test if different from 0xffff? */
   2423        1.1    rpaulo 	sc->rf_rev   = (val >> 11) & 0x1f;
   2424        1.1    rpaulo 	sc->hw_radio = (val >> 10) & 0x1;
   2425        1.1    rpaulo 	sc->rx_ant   = (val >> 4)  & 0x3;
   2426        1.1    rpaulo 	sc->tx_ant   = (val >> 2)  & 0x3;
   2427        1.1    rpaulo 	sc->nb_ant   = val & 0x3;
   2428        1.1    rpaulo 
   2429        1.1    rpaulo 	DPRINTF(("RF revision=%d\n", sc->rf_rev));
   2430        1.1    rpaulo 
   2431        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
   2432        1.1    rpaulo 	sc->ext_5ghz_lna = (val >> 6) & 0x1;
   2433        1.1    rpaulo 	sc->ext_2ghz_lna = (val >> 4) & 0x1;
   2434        1.1    rpaulo 
   2435        1.1    rpaulo 	DPRINTF(("External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
   2436        1.1    rpaulo 	    sc->ext_2ghz_lna, sc->ext_5ghz_lna));
   2437        1.1    rpaulo 
   2438        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
   2439        1.1    rpaulo 	if ((val & 0xff) != 0xff)
   2440        1.1    rpaulo 		sc->rssi_2ghz_corr = (int8_t)(val & 0xff);	/* signed */
   2441        1.1    rpaulo 
   2442        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
   2443        1.1    rpaulo 	if ((val & 0xff) != 0xff)
   2444        1.1    rpaulo 		sc->rssi_5ghz_corr = (int8_t)(val & 0xff);	/* signed */
   2445        1.1    rpaulo 
   2446        1.1    rpaulo 	/* adjust RSSI correction for external low-noise amplifier */
   2447        1.1    rpaulo 	if (sc->ext_2ghz_lna)
   2448        1.1    rpaulo 		sc->rssi_2ghz_corr -= 14;
   2449        1.1    rpaulo 	if (sc->ext_5ghz_lna)
   2450        1.1    rpaulo 		sc->rssi_5ghz_corr -= 14;
   2451        1.1    rpaulo 
   2452        1.1    rpaulo 	DPRINTF(("RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
   2453        1.1    rpaulo 	    sc->rssi_2ghz_corr, sc->rssi_5ghz_corr));
   2454        1.1    rpaulo 
   2455        1.1    rpaulo 	val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
   2456        1.1    rpaulo 	if ((val >> 8) != 0xff)
   2457        1.1    rpaulo 		sc->rfprog = (val >> 8) & 0x3;
   2458        1.1    rpaulo 	if ((val & 0xff) != 0xff)
   2459        1.1    rpaulo 		sc->rffreq = val & 0xff;
   2460        1.1    rpaulo 
   2461        1.1    rpaulo 	DPRINTF(("RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq));
   2462        1.1    rpaulo 
   2463        1.1    rpaulo 	/* read Tx power for all a/b/g channels */
   2464        1.1    rpaulo 	for (i = 0; i < 19; i++) {
   2465        1.1    rpaulo 		val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
   2466        1.1    rpaulo 		sc->txpow[i * 2] = (int8_t)(val >> 8);		/* signed */
   2467        1.1    rpaulo 		DPRINTF(("Channel=%d Tx power=%d\n",
   2468        1.1    rpaulo 		    rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]));
   2469        1.1    rpaulo 		sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff);	/* signed */
   2470        1.1    rpaulo 		DPRINTF(("Channel=%d Tx power=%d\n",
   2471        1.1    rpaulo 		    rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]));
   2472        1.1    rpaulo 	}
   2473        1.1    rpaulo 
   2474        1.1    rpaulo 	/* read vendor-specific BBP values */
   2475        1.1    rpaulo 	for (i = 0; i < 16; i++) {
   2476        1.1    rpaulo 		val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
   2477        1.1    rpaulo 		if (val == 0 || val == 0xffff)
   2478        1.1    rpaulo 			continue;	/* skip invalid entries */
   2479        1.1    rpaulo 		sc->bbp_prom[i].reg = val >> 8;
   2480        1.1    rpaulo 		sc->bbp_prom[i].val = val & 0xff;
   2481        1.1    rpaulo 		DPRINTF(("BBP R%d=%02x\n", sc->bbp_prom[i].reg,
   2482        1.1    rpaulo 		    sc->bbp_prom[i].val));
   2483        1.1    rpaulo 	}
   2484        1.1    rpaulo }
   2485        1.1    rpaulo 
   2486        1.1    rpaulo static int
   2487        1.1    rpaulo rt2661_bbp_init(struct rt2661_softc *sc)
   2488        1.1    rpaulo {
   2489        1.1    rpaulo #define N(a)	(sizeof (a) / sizeof ((a)[0]))
   2490        1.1    rpaulo 	int i, ntries;
   2491        1.1    rpaulo 	uint8_t val;
   2492        1.1    rpaulo 
   2493        1.1    rpaulo 	/* wait for BBP to be ready */
   2494        1.1    rpaulo 	for (ntries = 0; ntries < 100; ntries++) {
   2495        1.1    rpaulo 		val = rt2661_bbp_read(sc, 0);
   2496        1.1    rpaulo 		if (val != 0 && val != 0xff)
   2497        1.1    rpaulo 			break;
   2498        1.1    rpaulo 		DELAY(100);
   2499        1.1    rpaulo 	}
   2500        1.1    rpaulo 	if (ntries == 100) {
   2501       1.29  drochner 		aprint_error_dev(sc->sc_dev, "timeout waiting for BBP\n");
   2502        1.1    rpaulo 		return EIO;
   2503        1.1    rpaulo 	}
   2504        1.1    rpaulo 
   2505        1.1    rpaulo 	/* initialize BBP registers to default values */
   2506        1.1    rpaulo 	for (i = 0; i < N(rt2661_def_bbp); i++) {
   2507        1.1    rpaulo 		rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
   2508        1.1    rpaulo 		    rt2661_def_bbp[i].val);
   2509        1.1    rpaulo 	}
   2510        1.1    rpaulo 
   2511        1.1    rpaulo 	/* write vendor-specific BBP values (from EEPROM) */
   2512        1.1    rpaulo 	for (i = 0; i < 16; i++) {
   2513        1.1    rpaulo 		if (sc->bbp_prom[i].reg == 0)
   2514        1.1    rpaulo 			continue;
   2515        1.1    rpaulo 		rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
   2516        1.1    rpaulo 	}
   2517        1.1    rpaulo 
   2518        1.1    rpaulo 	return 0;
   2519        1.1    rpaulo #undef N
   2520        1.1    rpaulo }
   2521        1.1    rpaulo 
   2522        1.1    rpaulo static int
   2523        1.1    rpaulo rt2661_init(struct ifnet *ifp)
   2524        1.1    rpaulo {
   2525        1.1    rpaulo #define N(a)	(sizeof (a) / sizeof ((a)[0]))
   2526        1.1    rpaulo 	struct rt2661_softc *sc = ifp->if_softc;
   2527        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2528        1.1    rpaulo 	const char *name = NULL;	/* make lint happy */
   2529        1.1    rpaulo 	uint8_t *ucode;
   2530        1.1    rpaulo 	size_t size;
   2531        1.5    rpaulo 	uint32_t tmp, star[3];
   2532        1.1    rpaulo 	int i, ntries;
   2533        1.1    rpaulo 	firmware_handle_t fh;
   2534        1.1    rpaulo 
   2535        1.1    rpaulo 	/* for CardBus, power on the socket */
   2536        1.1    rpaulo 	if (!(sc->sc_flags & RT2661_ENABLED)) {
   2537        1.1    rpaulo 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
   2538       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not enable device\n");
   2539        1.1    rpaulo 			return EIO;
   2540        1.1    rpaulo 		}
   2541        1.1    rpaulo 		sc->sc_flags |= RT2661_ENABLED;
   2542        1.1    rpaulo 	}
   2543        1.1    rpaulo 
   2544        1.1    rpaulo 	rt2661_stop(ifp, 0);
   2545        1.1    rpaulo 
   2546        1.1    rpaulo 	if (!(sc->sc_flags & RT2661_FWLOADED)) {
   2547        1.1    rpaulo 		switch (sc->sc_id) {
   2548        1.1    rpaulo 		case PCI_PRODUCT_RALINK_RT2561:
   2549        1.1    rpaulo 			name = "ral-rt2561";
   2550        1.1    rpaulo 			break;
   2551        1.1    rpaulo 		case PCI_PRODUCT_RALINK_RT2561S:
   2552        1.1    rpaulo 			name = "ral-rt2561s";
   2553        1.1    rpaulo 			break;
   2554        1.1    rpaulo 		case PCI_PRODUCT_RALINK_RT2661:
   2555        1.1    rpaulo 			name = "ral-rt2661";
   2556        1.1    rpaulo 			break;
   2557        1.1    rpaulo 		}
   2558        1.1    rpaulo 
   2559        1.1    rpaulo 		if (firmware_open("ral", name, &fh) != 0) {
   2560       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not open microcode %s\n", name);
   2561        1.1    rpaulo 			rt2661_stop(ifp, 1);
   2562        1.1    rpaulo 			return EIO;
   2563        1.1    rpaulo 		}
   2564        1.1    rpaulo 
   2565        1.1    rpaulo 		size = firmware_get_size(fh);
   2566        1.1    rpaulo 		if (!(ucode = firmware_malloc(size))) {
   2567       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not alloc microcode memory\n");
   2568       1.10    rpaulo 			firmware_close(fh);
   2569        1.1    rpaulo 			rt2661_stop(ifp, 1);
   2570        1.1    rpaulo 			return ENOMEM;
   2571        1.1    rpaulo 		}
   2572        1.1    rpaulo 
   2573        1.1    rpaulo 		if (firmware_read(fh, 0, ucode, size) != 0) {
   2574       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not read microcode %s\n", name);
   2575  1.29.16.1     skrll 			firmware_free(ucode, size);
   2576       1.11    rpaulo 			firmware_close(fh);
   2577        1.1    rpaulo 			rt2661_stop(ifp, 1);
   2578        1.1    rpaulo 			return EIO;
   2579        1.1    rpaulo 		}
   2580        1.1    rpaulo 
   2581        1.1    rpaulo 		if (rt2661_load_microcode(sc, ucode, size) != 0) {
   2582       1.29  drochner 			aprint_error_dev(sc->sc_dev, "could not load 8051 microcode\n");
   2583  1.29.16.1     skrll 			firmware_free(ucode, size);
   2584       1.10    rpaulo 			firmware_close(fh);
   2585        1.1    rpaulo 			rt2661_stop(ifp, 1);
   2586        1.1    rpaulo 			return EIO;
   2587        1.1    rpaulo 		}
   2588        1.1    rpaulo 
   2589  1.29.16.1     skrll 		firmware_free(ucode, size);
   2590        1.2    rpaulo 		firmware_close(fh);
   2591        1.1    rpaulo 		sc->sc_flags |= RT2661_FWLOADED;
   2592        1.1    rpaulo 	}
   2593        1.1    rpaulo 
   2594        1.1    rpaulo 	/* initialize Tx rings */
   2595        1.1    rpaulo 	RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
   2596        1.1    rpaulo 	RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
   2597        1.1    rpaulo 	RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
   2598        1.1    rpaulo 	RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
   2599        1.1    rpaulo 
   2600        1.1    rpaulo 	/* initialize Mgt ring */
   2601        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
   2602        1.1    rpaulo 
   2603        1.1    rpaulo 	/* initialize Rx ring */
   2604        1.1    rpaulo 	RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
   2605        1.1    rpaulo 
   2606        1.1    rpaulo 	/* initialize Tx rings sizes */
   2607        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TX_RING_CSR0,
   2608        1.1    rpaulo 	    RT2661_TX_RING_COUNT << 24 |
   2609        1.1    rpaulo 	    RT2661_TX_RING_COUNT << 16 |
   2610        1.1    rpaulo 	    RT2661_TX_RING_COUNT <<  8 |
   2611        1.1    rpaulo 	    RT2661_TX_RING_COUNT);
   2612        1.1    rpaulo 
   2613        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TX_RING_CSR1,
   2614        1.1    rpaulo 	    RT2661_TX_DESC_WSIZE << 16 |
   2615        1.1    rpaulo 	    RT2661_TX_RING_COUNT <<  8 |	/* XXX: HCCA ring unused */
   2616        1.1    rpaulo 	    RT2661_MGT_RING_COUNT);
   2617        1.1    rpaulo 
   2618        1.1    rpaulo 	/* initialize Rx rings */
   2619        1.1    rpaulo 	RAL_WRITE(sc, RT2661_RX_RING_CSR,
   2620        1.1    rpaulo 	    RT2661_RX_DESC_BACK  << 16 |
   2621        1.1    rpaulo 	    RT2661_RX_DESC_WSIZE <<  8 |
   2622        1.1    rpaulo 	    RT2661_RX_RING_COUNT);
   2623        1.1    rpaulo 
   2624        1.1    rpaulo 	/* XXX: some magic here */
   2625        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
   2626        1.1    rpaulo 
   2627        1.1    rpaulo 	/* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
   2628        1.1    rpaulo 	RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
   2629        1.1    rpaulo 
   2630        1.1    rpaulo 	/* load base address of Rx ring */
   2631        1.1    rpaulo 	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
   2632        1.1    rpaulo 
   2633        1.1    rpaulo 	/* initialize MAC registers to default values */
   2634        1.1    rpaulo 	for (i = 0; i < N(rt2661_def_mac); i++)
   2635        1.1    rpaulo 		RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
   2636        1.1    rpaulo 
   2637       1.16    dyoung 	IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl));
   2638        1.1    rpaulo 	rt2661_set_macaddr(sc, ic->ic_myaddr);
   2639        1.1    rpaulo 
   2640        1.1    rpaulo 	/* set host ready */
   2641        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
   2642        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
   2643        1.1    rpaulo 
   2644        1.1    rpaulo 	/* wait for BBP/RF to wakeup */
   2645        1.1    rpaulo 	for (ntries = 0; ntries < 1000; ntries++) {
   2646        1.1    rpaulo 		if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
   2647        1.1    rpaulo 			break;
   2648        1.1    rpaulo 		DELAY(1000);
   2649        1.1    rpaulo 	}
   2650        1.1    rpaulo 	if (ntries == 1000) {
   2651        1.1    rpaulo 		printf("timeout waiting for BBP/RF to wakeup\n");
   2652        1.1    rpaulo 		rt2661_stop(ifp, 1);
   2653        1.1    rpaulo 		return EIO;
   2654        1.1    rpaulo 	}
   2655        1.1    rpaulo 
   2656        1.1    rpaulo 	if (rt2661_bbp_init(sc) != 0) {
   2657        1.1    rpaulo 		rt2661_stop(ifp, 1);
   2658        1.1    rpaulo 		return EIO;
   2659        1.1    rpaulo 	}
   2660        1.1    rpaulo 
   2661        1.1    rpaulo 	/* select default channel */
   2662        1.1    rpaulo 	sc->sc_curchan = ic->ic_curchan;
   2663        1.1    rpaulo 	rt2661_select_band(sc, sc->sc_curchan);
   2664        1.1    rpaulo 	rt2661_select_antenna(sc);
   2665        1.1    rpaulo 	rt2661_set_chan(sc, sc->sc_curchan);
   2666        1.1    rpaulo 
   2667        1.1    rpaulo 	/* update Rx filter */
   2668        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
   2669        1.1    rpaulo 
   2670        1.1    rpaulo 	tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
   2671        1.1    rpaulo 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
   2672        1.1    rpaulo 		tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
   2673        1.1    rpaulo 		       RT2661_DROP_ACKCTS;
   2674        1.1    rpaulo 		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
   2675        1.1    rpaulo 			tmp |= RT2661_DROP_TODS;
   2676        1.1    rpaulo 		if (!(ifp->if_flags & IFF_PROMISC))
   2677        1.1    rpaulo 			tmp |= RT2661_DROP_NOT_TO_ME;
   2678        1.1    rpaulo 	}
   2679        1.1    rpaulo 
   2680        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
   2681        1.1    rpaulo 
   2682        1.1    rpaulo 	/* clear STA registers */
   2683        1.5    rpaulo 	RAL_READ_REGION_4(sc, RT2661_STA_CSR0, star, N(star));
   2684        1.1    rpaulo 
   2685        1.1    rpaulo 	/* initialize ASIC */
   2686        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
   2687        1.1    rpaulo 
   2688        1.1    rpaulo 	/* clear any pending interrupt */
   2689        1.1    rpaulo 	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
   2690        1.1    rpaulo 
   2691        1.1    rpaulo 	/* enable interrupts */
   2692        1.1    rpaulo 	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
   2693        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
   2694        1.1    rpaulo 
   2695        1.1    rpaulo 	/* kick Rx */
   2696        1.1    rpaulo 	RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
   2697        1.1    rpaulo 
   2698        1.1    rpaulo 	ifp->if_flags &= ~IFF_OACTIVE;
   2699        1.1    rpaulo 	ifp->if_flags |= IFF_RUNNING;
   2700        1.1    rpaulo 
   2701        1.1    rpaulo 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
   2702        1.1    rpaulo 		if (ic->ic_roaming != IEEE80211_ROAMING_MANUAL)
   2703        1.1    rpaulo 			ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
   2704        1.1    rpaulo 	} else
   2705        1.1    rpaulo 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
   2706        1.1    rpaulo 
   2707        1.1    rpaulo 	return 0;
   2708        1.1    rpaulo #undef N
   2709        1.1    rpaulo }
   2710        1.1    rpaulo 
   2711        1.1    rpaulo static void
   2712        1.1    rpaulo rt2661_stop(struct ifnet *ifp, int disable)
   2713        1.1    rpaulo {
   2714        1.1    rpaulo 	struct rt2661_softc *sc = ifp->if_softc;
   2715        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2716        1.1    rpaulo 	uint32_t tmp;
   2717        1.1    rpaulo 
   2718        1.1    rpaulo 	sc->sc_tx_timer = 0;
   2719        1.1    rpaulo 	ifp->if_timer = 0;
   2720        1.1    rpaulo 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   2721        1.1    rpaulo 
   2722        1.1    rpaulo 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);	/* free all nodes */
   2723        1.1    rpaulo 
   2724        1.1    rpaulo 	/* abort Tx (for all 5 Tx rings) */
   2725        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
   2726        1.1    rpaulo 
   2727        1.1    rpaulo 	/* disable Rx (value remains after reset!) */
   2728        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
   2729        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
   2730        1.1    rpaulo 
   2731        1.1    rpaulo 	/* reset ASIC */
   2732        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
   2733        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
   2734        1.1    rpaulo 
   2735        1.1    rpaulo 	/* disable interrupts */
   2736        1.1    rpaulo 	RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
   2737        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
   2738        1.1    rpaulo 
   2739        1.1    rpaulo 	/* clear any pending interrupt */
   2740        1.1    rpaulo 	RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
   2741        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
   2742        1.1    rpaulo 
   2743        1.1    rpaulo 	/* reset Tx and Rx rings */
   2744        1.1    rpaulo 	rt2661_reset_tx_ring(sc, &sc->txq[0]);
   2745        1.1    rpaulo 	rt2661_reset_tx_ring(sc, &sc->txq[1]);
   2746        1.1    rpaulo 	rt2661_reset_tx_ring(sc, &sc->txq[2]);
   2747        1.1    rpaulo 	rt2661_reset_tx_ring(sc, &sc->txq[3]);
   2748        1.1    rpaulo 	rt2661_reset_tx_ring(sc, &sc->mgtq);
   2749        1.1    rpaulo 	rt2661_reset_rx_ring(sc, &sc->rxq);
   2750        1.1    rpaulo 
   2751        1.1    rpaulo 	/* for CardBus, power down the socket */
   2752        1.1    rpaulo 	if (disable && sc->sc_disable != NULL) {
   2753        1.1    rpaulo 		if (sc->sc_flags & RT2661_ENABLED) {
   2754        1.1    rpaulo 			(*sc->sc_disable)(sc);
   2755        1.1    rpaulo 			sc->sc_flags &= ~(RT2661_ENABLED | RT2661_FWLOADED);
   2756        1.1    rpaulo 		}
   2757        1.1    rpaulo 	}
   2758        1.1    rpaulo }
   2759        1.1    rpaulo 
   2760        1.1    rpaulo static int
   2761        1.1    rpaulo rt2661_load_microcode(struct rt2661_softc *sc, const uint8_t *ucode, int size)
   2762        1.1    rpaulo {
   2763        1.1    rpaulo 	int ntries;
   2764        1.1    rpaulo 
   2765        1.1    rpaulo 	/* reset 8051 */
   2766        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
   2767        1.1    rpaulo 
   2768        1.1    rpaulo 	/* cancel any pending Host to MCU command */
   2769        1.1    rpaulo 	RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
   2770        1.1    rpaulo 	RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
   2771        1.1    rpaulo 	RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
   2772        1.1    rpaulo 
   2773        1.1    rpaulo 	/* write 8051's microcode */
   2774        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
   2775        1.1    rpaulo 	RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, ucode, size);
   2776        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
   2777        1.1    rpaulo 
   2778        1.1    rpaulo 	/* kick 8051's ass */
   2779        1.1    rpaulo 	RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
   2780        1.1    rpaulo 
   2781        1.1    rpaulo 	/* wait for 8051 to initialize */
   2782        1.1    rpaulo 	for (ntries = 0; ntries < 500; ntries++) {
   2783        1.1    rpaulo 		if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
   2784        1.1    rpaulo 			break;
   2785        1.1    rpaulo 		DELAY(100);
   2786        1.1    rpaulo 	}
   2787        1.1    rpaulo 	if (ntries == 500) {
   2788        1.1    rpaulo 		printf("timeout waiting for MCU to initialize\n");
   2789        1.1    rpaulo 		return EIO;
   2790        1.1    rpaulo 	}
   2791        1.1    rpaulo 	return 0;
   2792        1.1    rpaulo }
   2793        1.1    rpaulo 
   2794        1.1    rpaulo /*
   2795        1.1    rpaulo  * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
   2796        1.1    rpaulo  * false CCA count.  This function is called periodically (every seconds) when
   2797        1.1    rpaulo  * in the RUN state.  Values taken from the reference driver.
   2798        1.1    rpaulo  */
   2799        1.1    rpaulo static void
   2800        1.1    rpaulo rt2661_rx_tune(struct rt2661_softc *sc)
   2801        1.1    rpaulo {
   2802        1.1    rpaulo 	uint8_t bbp17;
   2803        1.1    rpaulo 	uint16_t cca;
   2804        1.1    rpaulo 	int lo, hi, dbm;
   2805        1.1    rpaulo 
   2806        1.1    rpaulo 	/*
   2807        1.1    rpaulo 	 * Tuning range depends on operating band and on the presence of an
   2808        1.1    rpaulo 	 * external low-noise amplifier.
   2809        1.1    rpaulo 	 */
   2810        1.1    rpaulo 	lo = 0x20;
   2811        1.1    rpaulo 	if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
   2812        1.1    rpaulo 		lo += 0x08;
   2813        1.1    rpaulo 	if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
   2814        1.1    rpaulo 	    (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
   2815        1.1    rpaulo 		lo += 0x10;
   2816        1.1    rpaulo 	hi = lo + 0x20;
   2817        1.1    rpaulo 
   2818       1.24       scw 	dbm = sc->avg_rssi;
   2819        1.1    rpaulo 	/* retrieve false CCA count since last call (clear on read) */
   2820        1.1    rpaulo 	cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
   2821        1.1    rpaulo 
   2822       1.24       scw 	DPRINTFN(2, ("RSSI=%ddBm false CCA=%d\n", dbm, cca));
   2823        1.7    rpaulo 
   2824       1.24       scw 	if (dbm < -74) {
   2825       1.24       scw 		/* very bad RSSI, tune using false CCA count */
   2826        1.1    rpaulo 		bbp17 = sc->bbp17; /* current value */
   2827        1.1    rpaulo 
   2828        1.1    rpaulo 		hi -= 2 * (-74 - dbm);
   2829        1.1    rpaulo 		if (hi < lo)
   2830        1.1    rpaulo 			hi = lo;
   2831        1.1    rpaulo 
   2832       1.24       scw 		if (bbp17 > hi)
   2833        1.1    rpaulo 			bbp17 = hi;
   2834       1.24       scw 		else if (cca > 512)
   2835       1.24       scw 			bbp17 = min(bbp17 + 1, hi);
   2836       1.24       scw 		else if (cca < 100)
   2837       1.24       scw 			bbp17 = max(bbp17 - 1, lo);
   2838        1.7    rpaulo 
   2839       1.24       scw 	} else if (dbm < -66) {
   2840       1.24       scw 		bbp17 = lo + 0x08;
   2841       1.24       scw 	} else if (dbm < -58) {
   2842       1.24       scw 		bbp17 = lo + 0x10;
   2843       1.24       scw 	} else if (dbm < -35) {
   2844       1.24       scw 		bbp17 = hi;
   2845       1.24       scw 	} else {	/* very good RSSI >= -35dBm */
   2846       1.24       scw 		bbp17 = 0x60;	/* very low sensitivity */
   2847        1.1    rpaulo 	}
   2848        1.1    rpaulo 
   2849        1.1    rpaulo 	if (bbp17 != sc->bbp17) {
   2850       1.24       scw 		DPRINTF(("BBP17 %x->%x\n", sc->bbp17, bbp17));
   2851        1.1    rpaulo 		rt2661_bbp_write(sc, 17, bbp17);
   2852        1.1    rpaulo 		sc->bbp17 = bbp17;
   2853        1.1    rpaulo 	}
   2854        1.1    rpaulo }
   2855        1.1    rpaulo 
   2856       1.24       scw #ifdef notyet
   2857        1.1    rpaulo /*
   2858        1.1    rpaulo  * Enter/Leave radar detection mode.
   2859        1.1    rpaulo  * This is for 802.11h additional regulatory domains.
   2860        1.1    rpaulo  */
   2861        1.1    rpaulo static void
   2862        1.1    rpaulo rt2661_radar_start(struct rt2661_softc *sc)
   2863        1.1    rpaulo {
   2864        1.1    rpaulo 	uint32_t tmp;
   2865        1.1    rpaulo 
   2866        1.1    rpaulo 	/* disable Rx */
   2867        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
   2868        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
   2869        1.1    rpaulo 
   2870        1.1    rpaulo 	rt2661_bbp_write(sc, 82, 0x20);
   2871        1.1    rpaulo 	rt2661_bbp_write(sc, 83, 0x00);
   2872        1.1    rpaulo 	rt2661_bbp_write(sc, 84, 0x40);
   2873        1.1    rpaulo 
   2874        1.1    rpaulo 	/* save current BBP registers values */
   2875        1.1    rpaulo 	sc->bbp18 = rt2661_bbp_read(sc, 18);
   2876        1.1    rpaulo 	sc->bbp21 = rt2661_bbp_read(sc, 21);
   2877        1.1    rpaulo 	sc->bbp22 = rt2661_bbp_read(sc, 22);
   2878        1.1    rpaulo 	sc->bbp16 = rt2661_bbp_read(sc, 16);
   2879        1.1    rpaulo 	sc->bbp17 = rt2661_bbp_read(sc, 17);
   2880        1.1    rpaulo 	sc->bbp64 = rt2661_bbp_read(sc, 64);
   2881        1.1    rpaulo 
   2882        1.1    rpaulo 	rt2661_bbp_write(sc, 18, 0xff);
   2883        1.1    rpaulo 	rt2661_bbp_write(sc, 21, 0x3f);
   2884        1.1    rpaulo 	rt2661_bbp_write(sc, 22, 0x3f);
   2885        1.1    rpaulo 	rt2661_bbp_write(sc, 16, 0xbd);
   2886        1.1    rpaulo 	rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
   2887        1.1    rpaulo 	rt2661_bbp_write(sc, 64, 0x21);
   2888        1.1    rpaulo 
   2889        1.1    rpaulo 	/* restore Rx filter */
   2890        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
   2891        1.1    rpaulo }
   2892        1.1    rpaulo 
   2893        1.1    rpaulo static int
   2894        1.1    rpaulo rt2661_radar_stop(struct rt2661_softc *sc)
   2895        1.1    rpaulo {
   2896        1.1    rpaulo 	uint8_t bbp66;
   2897        1.1    rpaulo 
   2898        1.1    rpaulo 	/* read radar detection result */
   2899        1.1    rpaulo 	bbp66 = rt2661_bbp_read(sc, 66);
   2900        1.1    rpaulo 
   2901        1.1    rpaulo 	/* restore BBP registers values */
   2902        1.1    rpaulo 	rt2661_bbp_write(sc, 16, sc->bbp16);
   2903        1.1    rpaulo 	rt2661_bbp_write(sc, 17, sc->bbp17);
   2904        1.1    rpaulo 	rt2661_bbp_write(sc, 18, sc->bbp18);
   2905        1.1    rpaulo 	rt2661_bbp_write(sc, 21, sc->bbp21);
   2906        1.1    rpaulo 	rt2661_bbp_write(sc, 22, sc->bbp22);
   2907        1.1    rpaulo 	rt2661_bbp_write(sc, 64, sc->bbp64);
   2908        1.1    rpaulo 
   2909        1.1    rpaulo 	return bbp66 == 1;
   2910        1.1    rpaulo }
   2911        1.1    rpaulo #endif
   2912        1.1    rpaulo 
   2913        1.1    rpaulo static int
   2914        1.1    rpaulo rt2661_prepare_beacon(struct rt2661_softc *sc)
   2915        1.1    rpaulo {
   2916        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2917       1.24       scw 	struct ieee80211_node *ni = ic->ic_bss;
   2918        1.1    rpaulo 	struct rt2661_tx_desc desc;
   2919        1.1    rpaulo 	struct mbuf *m0;
   2920        1.1    rpaulo 	struct ieee80211_beacon_offsets bo;
   2921        1.1    rpaulo 	int rate;
   2922        1.1    rpaulo 
   2923       1.24       scw 	m0 = ieee80211_beacon_alloc(ic, ni, &bo);
   2924        1.1    rpaulo 	if (m0 == NULL) {
   2925       1.29  drochner 		aprint_error_dev(sc->sc_dev, "could not allocate beacon frame\n");
   2926        1.1    rpaulo 		return ENOBUFS;
   2927        1.1    rpaulo 	}
   2928        1.1    rpaulo 
   2929        1.1    rpaulo 	/* send beacons at the lowest available rate */
   2930       1.24       scw 	rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
   2931        1.1    rpaulo 
   2932        1.1    rpaulo 	rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
   2933        1.1    rpaulo 	    m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
   2934        1.1    rpaulo 
   2935        1.1    rpaulo 	/* copy the first 24 bytes of Tx descriptor into NIC memory */
   2936        1.1    rpaulo 	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
   2937        1.1    rpaulo 
   2938        1.1    rpaulo 	/* copy beacon header and payload into NIC memory */
   2939        1.1    rpaulo 	RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
   2940        1.1    rpaulo 	    mtod(m0, uint8_t *), m0->m_pkthdr.len);
   2941        1.1    rpaulo 
   2942        1.1    rpaulo 	m_freem(m0);
   2943        1.1    rpaulo 
   2944       1.24       scw 	/*
   2945       1.24       scw 	 * Store offset of ERP Information Element so that we can update it
   2946       1.24       scw 	 * dynamically when the slot time changes.
   2947       1.24       scw 	 * XXX: this is ugly since it depends on how net80211 builds beacon
   2948       1.24       scw 	 * frames but ieee80211_beacon_alloc() doesn't store offsets for us.
   2949       1.24       scw 	 */
   2950       1.24       scw 	if (ic->ic_curmode == IEEE80211_MODE_11G) {
   2951       1.24       scw 		sc->erp_csr =
   2952       1.24       scw 		    RT2661_HW_BEACON_BASE0 + 24 +
   2953       1.24       scw 		    sizeof (struct ieee80211_frame) +
   2954       1.24       scw 		    8 + 2 + 2 + 2 + ni->ni_esslen +
   2955       1.24       scw 		    2 + min(ni->ni_rates.rs_nrates, IEEE80211_RATE_SIZE) +
   2956       1.24       scw 		    2 + 1 +
   2957       1.24       scw 		    ((ic->ic_opmode == IEEE80211_M_IBSS) ? 4 : 6) +
   2958       1.24       scw 		    2;
   2959       1.24       scw 	}
   2960       1.24       scw 
   2961        1.1    rpaulo 	return 0;
   2962        1.1    rpaulo }
   2963        1.1    rpaulo 
   2964        1.1    rpaulo /*
   2965        1.1    rpaulo  * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
   2966        1.1    rpaulo  * and HostAP operating modes.
   2967        1.1    rpaulo  */
   2968        1.1    rpaulo static void
   2969        1.1    rpaulo rt2661_enable_tsf_sync(struct rt2661_softc *sc)
   2970        1.1    rpaulo {
   2971        1.1    rpaulo 	struct ieee80211com *ic = &sc->sc_ic;
   2972        1.1    rpaulo 	uint32_t tmp;
   2973        1.1    rpaulo 
   2974        1.1    rpaulo 	if (ic->ic_opmode != IEEE80211_M_STA) {
   2975        1.1    rpaulo 		/*
   2976        1.1    rpaulo 		 * Change default 16ms TBTT adjustment to 8ms.
   2977        1.1    rpaulo 		 * Must be done before enabling beacon generation.
   2978        1.1    rpaulo 		 */
   2979        1.1    rpaulo 		RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
   2980        1.1    rpaulo 	}
   2981        1.1    rpaulo 
   2982        1.1    rpaulo 	tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
   2983        1.1    rpaulo 
   2984        1.1    rpaulo 	/* set beacon interval (in 1/16ms unit) */
   2985        1.1    rpaulo 	tmp |= ic->ic_bss->ni_intval * 16;
   2986        1.1    rpaulo 
   2987        1.1    rpaulo 	tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
   2988        1.1    rpaulo 	if (ic->ic_opmode == IEEE80211_M_STA)
   2989        1.1    rpaulo 		tmp |= RT2661_TSF_MODE(1);
   2990        1.1    rpaulo 	else
   2991        1.1    rpaulo 		tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
   2992        1.1    rpaulo 
   2993        1.1    rpaulo 	RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
   2994        1.1    rpaulo }
   2995        1.1    rpaulo 
   2996        1.1    rpaulo /*
   2997        1.1    rpaulo  * Retrieve the "Received Signal Strength Indicator" from the raw values
   2998        1.1    rpaulo  * contained in Rx descriptors.  The computation depends on which band the
   2999        1.1    rpaulo  * frame was received.  Correction values taken from the reference driver.
   3000        1.1    rpaulo  */
   3001        1.1    rpaulo static int
   3002        1.1    rpaulo rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
   3003        1.1    rpaulo {
   3004        1.1    rpaulo 	int lna, agc, rssi;
   3005        1.1    rpaulo 
   3006        1.1    rpaulo 	lna = (raw >> 5) & 0x3;
   3007        1.1    rpaulo 	agc = raw & 0x1f;
   3008        1.1    rpaulo 
   3009        1.1    rpaulo 	rssi = 2 * agc;
   3010        1.1    rpaulo 
   3011        1.1    rpaulo 	if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
   3012        1.1    rpaulo 		rssi += sc->rssi_2ghz_corr;
   3013        1.1    rpaulo 
   3014        1.1    rpaulo 		if (lna == 1)
   3015        1.1    rpaulo 			rssi -= 64;
   3016        1.1    rpaulo 		else if (lna == 2)
   3017        1.1    rpaulo 			rssi -= 74;
   3018        1.1    rpaulo 		else if (lna == 3)
   3019        1.1    rpaulo 			rssi -= 90;
   3020        1.1    rpaulo 	} else {
   3021        1.1    rpaulo 		rssi += sc->rssi_5ghz_corr;
   3022        1.1    rpaulo 
   3023        1.1    rpaulo 		if (lna == 1)
   3024        1.1    rpaulo 			rssi -= 64;
   3025        1.1    rpaulo 		else if (lna == 2)
   3026        1.1    rpaulo 			rssi -= 86;
   3027        1.1    rpaulo 		else if (lna == 3)
   3028        1.1    rpaulo 			rssi -= 100;
   3029        1.1    rpaulo 	}
   3030        1.1    rpaulo 	return rssi;
   3031        1.1    rpaulo }
   3032