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rtl8169.c revision 1.20.2.10
      1  1.20.2.10      yamt /*	$NetBSD: rtl8169.c,v 1.20.2.10 2008/03/24 09:38:50 yamt Exp $	*/
      2        1.1  jonathan 
      3        1.1  jonathan /*
      4        1.1  jonathan  * Copyright (c) 1997, 1998-2003
      5        1.1  jonathan  *	Bill Paul <wpaul (at) windriver.com>.  All rights reserved.
      6        1.1  jonathan  *
      7        1.1  jonathan  * Redistribution and use in source and binary forms, with or without
      8        1.1  jonathan  * modification, are permitted provided that the following conditions
      9        1.1  jonathan  * are met:
     10        1.1  jonathan  * 1. Redistributions of source code must retain the above copyright
     11        1.1  jonathan  *    notice, this list of conditions and the following disclaimer.
     12        1.1  jonathan  * 2. Redistributions in binary form must reproduce the above copyright
     13        1.1  jonathan  *    notice, this list of conditions and the following disclaimer in the
     14        1.1  jonathan  *    documentation and/or other materials provided with the distribution.
     15        1.1  jonathan  * 3. All advertising materials mentioning features or use of this software
     16        1.1  jonathan  *    must display the following acknowledgement:
     17        1.1  jonathan  *	This product includes software developed by Bill Paul.
     18        1.1  jonathan  * 4. Neither the name of the author nor the names of any co-contributors
     19        1.1  jonathan  *    may be used to endorse or promote products derived from this software
     20        1.1  jonathan  *    without specific prior written permission.
     21        1.1  jonathan  *
     22        1.1  jonathan  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     23        1.1  jonathan  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24        1.1  jonathan  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25        1.1  jonathan  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     26        1.1  jonathan  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27        1.1  jonathan  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28        1.1  jonathan  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29        1.1  jonathan  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30        1.1  jonathan  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31        1.1  jonathan  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     32        1.1  jonathan  * THE POSSIBILITY OF SUCH DAMAGE.
     33        1.1  jonathan  */
     34        1.1  jonathan 
     35        1.1  jonathan #include <sys/cdefs.h>
     36  1.20.2.10      yamt __KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.20.2.10 2008/03/24 09:38:50 yamt Exp $");
     37        1.1  jonathan /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
     38        1.1  jonathan 
     39        1.1  jonathan /*
     40        1.1  jonathan  * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
     41        1.1  jonathan  *
     42        1.1  jonathan  * Written by Bill Paul <wpaul (at) windriver.com>
     43        1.1  jonathan  * Senior Networking Software Engineer
     44        1.1  jonathan  * Wind River Systems
     45        1.1  jonathan  */
     46        1.1  jonathan 
     47        1.1  jonathan /*
     48        1.1  jonathan  * This driver is designed to support RealTek's next generation of
     49        1.1  jonathan  * 10/100 and 10/100/1000 PCI ethernet controllers. There are currently
     50        1.1  jonathan  * four devices in this family: the RTL8139C+, the RTL8169, the RTL8169S
     51        1.1  jonathan  * and the RTL8110S.
     52        1.1  jonathan  *
     53        1.1  jonathan  * The 8139C+ is a 10/100 ethernet chip. It is backwards compatible
     54        1.1  jonathan  * with the older 8139 family, however it also supports a special
     55        1.1  jonathan  * C+ mode of operation that provides several new performance enhancing
     56        1.1  jonathan  * features. These include:
     57        1.1  jonathan  *
     58        1.1  jonathan  *	o Descriptor based DMA mechanism. Each descriptor represents
     59        1.1  jonathan  *	  a single packet fragment. Data buffers may be aligned on
     60        1.1  jonathan  *	  any byte boundary.
     61        1.1  jonathan  *
     62        1.1  jonathan  *	o 64-bit DMA
     63        1.1  jonathan  *
     64        1.1  jonathan  *	o TCP/IP checksum offload for both RX and TX
     65        1.1  jonathan  *
     66        1.1  jonathan  *	o High and normal priority transmit DMA rings
     67        1.1  jonathan  *
     68        1.1  jonathan  *	o VLAN tag insertion and extraction
     69        1.1  jonathan  *
     70        1.1  jonathan  *	o TCP large send (segmentation offload)
     71        1.1  jonathan  *
     72        1.1  jonathan  * Like the 8139, the 8139C+ also has a built-in 10/100 PHY. The C+
     73        1.1  jonathan  * programming API is fairly straightforward. The RX filtering, EEPROM
     74        1.1  jonathan  * access and PHY access is the same as it is on the older 8139 series
     75        1.1  jonathan  * chips.
     76        1.1  jonathan  *
     77        1.1  jonathan  * The 8169 is a 64-bit 10/100/1000 gigabit ethernet MAC. It has almost the
     78        1.1  jonathan  * same programming API and feature set as the 8139C+ with the following
     79        1.1  jonathan  * differences and additions:
     80        1.1  jonathan  *
     81        1.1  jonathan  *	o 1000Mbps mode
     82        1.1  jonathan  *
     83        1.1  jonathan  *	o Jumbo frames
     84        1.1  jonathan  *
     85        1.1  jonathan  * 	o GMII and TBI ports/registers for interfacing with copper
     86        1.1  jonathan  *	  or fiber PHYs
     87        1.1  jonathan  *
     88        1.1  jonathan  *      o RX and TX DMA rings can have up to 1024 descriptors
     89        1.1  jonathan  *        (the 8139C+ allows a maximum of 64)
     90        1.1  jonathan  *
     91        1.1  jonathan  *	o Slight differences in register layout from the 8139C+
     92        1.1  jonathan  *
     93        1.1  jonathan  * The TX start and timer interrupt registers are at different locations
     94        1.1  jonathan  * on the 8169 than they are on the 8139C+. Also, the status word in the
     95        1.1  jonathan  * RX descriptor has a slightly different bit layout. The 8169 does not
     96        1.1  jonathan  * have a built-in PHY. Most reference boards use a Marvell 88E1000 'Alaska'
     97        1.1  jonathan  * copper gigE PHY.
     98        1.1  jonathan  *
     99        1.1  jonathan  * The 8169S/8110S 10/100/1000 devices have built-in copper gigE PHYs
    100        1.1  jonathan  * (the 'S' stands for 'single-chip'). These devices have the same
    101        1.1  jonathan  * programming API as the older 8169, but also have some vendor-specific
    102        1.1  jonathan  * registers for the on-board PHY. The 8110S is a LAN-on-motherboard
    103        1.1  jonathan  * part designed to be pin-compatible with the RealTek 8100 10/100 chip.
    104       1.12     perry  *
    105        1.1  jonathan  * This driver takes advantage of the RX and TX checksum offload and
    106        1.1  jonathan  * VLAN tag insertion/extraction features. It also implements TX
    107        1.1  jonathan  * interrupt moderation using the timer interrupt registers, which
    108        1.1  jonathan  * significantly reduces TX interrupt load. There is also support
    109        1.1  jonathan  * for jumbo frames, however the 8169/8169S/8110S can not transmit
    110        1.1  jonathan  * jumbo frames larger than 7.5K, so the max MTU possible with this
    111        1.1  jonathan  * driver is 7500 bytes.
    112        1.1  jonathan  */
    113        1.1  jonathan 
    114        1.1  jonathan #include "bpfilter.h"
    115        1.1  jonathan #include "vlan.h"
    116        1.1  jonathan 
    117        1.1  jonathan #include <sys/param.h>
    118        1.1  jonathan #include <sys/endian.h>
    119        1.1  jonathan #include <sys/systm.h>
    120        1.1  jonathan #include <sys/sockio.h>
    121        1.1  jonathan #include <sys/mbuf.h>
    122        1.1  jonathan #include <sys/malloc.h>
    123        1.1  jonathan #include <sys/kernel.h>
    124        1.1  jonathan #include <sys/socket.h>
    125        1.1  jonathan #include <sys/device.h>
    126        1.1  jonathan 
    127        1.1  jonathan #include <net/if.h>
    128        1.1  jonathan #include <net/if_arp.h>
    129        1.1  jonathan #include <net/if_dl.h>
    130        1.1  jonathan #include <net/if_ether.h>
    131        1.1  jonathan #include <net/if_media.h>
    132        1.1  jonathan #include <net/if_vlanvar.h>
    133        1.1  jonathan 
    134       1.13      yamt #include <netinet/in_systm.h>	/* XXX for IP_MAXPACKET */
    135       1.13      yamt #include <netinet/in.h>		/* XXX for IP_MAXPACKET */
    136       1.13      yamt #include <netinet/ip.h>		/* XXX for IP_MAXPACKET */
    137       1.13      yamt 
    138        1.1  jonathan #if NBPFILTER > 0
    139        1.1  jonathan #include <net/bpf.h>
    140        1.1  jonathan #endif
    141        1.1  jonathan 
    142   1.20.2.5      yamt #include <sys/bus.h>
    143        1.1  jonathan 
    144        1.1  jonathan #include <dev/mii/mii.h>
    145        1.1  jonathan #include <dev/mii/miivar.h>
    146        1.1  jonathan 
    147        1.1  jonathan #include <dev/ic/rtl81x9reg.h>
    148        1.1  jonathan #include <dev/ic/rtl81x9var.h>
    149        1.1  jonathan 
    150        1.1  jonathan #include <dev/ic/rtl8169var.h>
    151        1.1  jonathan 
    152   1.20.2.2      yamt static inline void re_set_bufaddr(struct re_desc *, bus_addr_t);
    153        1.1  jonathan 
    154        1.4   kanaoka static int re_newbuf(struct rtk_softc *, int, struct mbuf *);
    155        1.4   kanaoka static int re_rx_list_init(struct rtk_softc *);
    156        1.4   kanaoka static int re_tx_list_init(struct rtk_softc *);
    157        1.4   kanaoka static void re_rxeof(struct rtk_softc *);
    158        1.4   kanaoka static void re_txeof(struct rtk_softc *);
    159        1.4   kanaoka static void re_tick(void *);
    160        1.4   kanaoka static void re_start(struct ifnet *);
    161   1.20.2.4      yamt static int re_ioctl(struct ifnet *, u_long, void *);
    162        1.4   kanaoka static int re_init(struct ifnet *);
    163        1.4   kanaoka static void re_stop(struct ifnet *, int);
    164        1.4   kanaoka static void re_watchdog(struct ifnet *);
    165        1.4   kanaoka 
    166        1.4   kanaoka static int re_enable(struct rtk_softc *);
    167        1.4   kanaoka static void re_disable(struct rtk_softc *);
    168        1.4   kanaoka 
    169        1.4   kanaoka static int re_gmii_readreg(struct device *, int, int);
    170        1.4   kanaoka static void re_gmii_writereg(struct device *, int, int, int);
    171        1.4   kanaoka 
    172        1.4   kanaoka static int re_miibus_readreg(struct device *, int, int);
    173        1.4   kanaoka static void re_miibus_writereg(struct device *, int, int, int);
    174        1.4   kanaoka static void re_miibus_statchg(struct device *);
    175        1.1  jonathan 
    176        1.4   kanaoka static void re_reset(struct rtk_softc *);
    177        1.1  jonathan 
    178   1.20.2.2      yamt static inline void
    179   1.20.2.2      yamt re_set_bufaddr(struct re_desc *d, bus_addr_t addr)
    180   1.20.2.2      yamt {
    181   1.20.2.2      yamt 
    182   1.20.2.2      yamt 	d->re_bufaddr_lo = htole32((uint32_t)addr);
    183   1.20.2.2      yamt 	if (sizeof(bus_addr_t) == sizeof(uint64_t))
    184   1.20.2.2      yamt 		d->re_bufaddr_hi = htole32((uint64_t)addr >> 32);
    185   1.20.2.2      yamt 	else
    186   1.20.2.2      yamt 		d->re_bufaddr_hi = 0;
    187   1.20.2.2      yamt }
    188   1.20.2.2      yamt 
    189        1.1  jonathan static int
    190        1.1  jonathan re_gmii_readreg(struct device *self, int phy, int reg)
    191        1.1  jonathan {
    192        1.1  jonathan 	struct rtk_softc	*sc = (void *)self;
    193   1.20.2.2      yamt 	uint32_t		rval;
    194        1.1  jonathan 	int			i;
    195        1.1  jonathan 
    196        1.1  jonathan 	if (phy != 7)
    197        1.4   kanaoka 		return 0;
    198        1.1  jonathan 
    199        1.1  jonathan 	/* Let the rgephy driver read the GMEDIASTAT register */
    200        1.1  jonathan 
    201        1.1  jonathan 	if (reg == RTK_GMEDIASTAT) {
    202        1.1  jonathan 		rval = CSR_READ_1(sc, RTK_GMEDIASTAT);
    203        1.4   kanaoka 		return rval;
    204        1.1  jonathan 	}
    205        1.1  jonathan 
    206        1.1  jonathan 	CSR_WRITE_4(sc, RTK_PHYAR, reg << 16);
    207        1.1  jonathan 	DELAY(1000);
    208        1.1  jonathan 
    209        1.1  jonathan 	for (i = 0; i < RTK_TIMEOUT; i++) {
    210        1.1  jonathan 		rval = CSR_READ_4(sc, RTK_PHYAR);
    211        1.1  jonathan 		if (rval & RTK_PHYAR_BUSY)
    212        1.1  jonathan 			break;
    213        1.1  jonathan 		DELAY(100);
    214        1.1  jonathan 	}
    215        1.1  jonathan 
    216        1.1  jonathan 	if (i == RTK_TIMEOUT) {
    217        1.4   kanaoka 		aprint_error("%s: PHY read failed\n", sc->sc_dev.dv_xname);
    218        1.4   kanaoka 		return 0;
    219        1.1  jonathan 	}
    220        1.1  jonathan 
    221        1.4   kanaoka 	return rval & RTK_PHYAR_PHYDATA;
    222        1.1  jonathan }
    223        1.1  jonathan 
    224        1.1  jonathan static void
    225        1.1  jonathan re_gmii_writereg(struct device *dev, int phy, int reg, int data)
    226        1.1  jonathan {
    227        1.1  jonathan 	struct rtk_softc	*sc = (void *)dev;
    228   1.20.2.2      yamt 	uint32_t		rval;
    229        1.1  jonathan 	int			i;
    230        1.1  jonathan 
    231        1.1  jonathan 	CSR_WRITE_4(sc, RTK_PHYAR, (reg << 16) |
    232        1.1  jonathan 	    (data & RTK_PHYAR_PHYDATA) | RTK_PHYAR_BUSY);
    233        1.1  jonathan 	DELAY(1000);
    234        1.1  jonathan 
    235        1.1  jonathan 	for (i = 0; i < RTK_TIMEOUT; i++) {
    236        1.1  jonathan 		rval = CSR_READ_4(sc, RTK_PHYAR);
    237        1.1  jonathan 		if (!(rval & RTK_PHYAR_BUSY))
    238        1.1  jonathan 			break;
    239        1.1  jonathan 		DELAY(100);
    240        1.1  jonathan 	}
    241        1.1  jonathan 
    242        1.1  jonathan 	if (i == RTK_TIMEOUT) {
    243        1.4   kanaoka 		aprint_error("%s: PHY write reg %x <- %x failed\n",
    244        1.4   kanaoka 		    sc->sc_dev.dv_xname, reg, data);
    245        1.1  jonathan 	}
    246        1.1  jonathan }
    247        1.1  jonathan 
    248        1.1  jonathan static int
    249        1.1  jonathan re_miibus_readreg(struct device *dev, int phy, int reg)
    250        1.1  jonathan {
    251        1.1  jonathan 	struct rtk_softc	*sc = (void *)dev;
    252   1.20.2.2      yamt 	uint16_t		rval = 0;
    253   1.20.2.2      yamt 	uint16_t		re8139_reg = 0;
    254        1.1  jonathan 	int			s;
    255        1.1  jonathan 
    256        1.1  jonathan 	s = splnet();
    257        1.1  jonathan 
    258   1.20.2.4      yamt 	if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0) {
    259        1.1  jonathan 		rval = re_gmii_readreg(dev, phy, reg);
    260        1.1  jonathan 		splx(s);
    261        1.4   kanaoka 		return rval;
    262        1.1  jonathan 	}
    263        1.1  jonathan 
    264        1.1  jonathan 	/* Pretend the internal PHY is only at address 0 */
    265        1.1  jonathan 	if (phy) {
    266        1.1  jonathan 		splx(s);
    267        1.4   kanaoka 		return 0;
    268        1.1  jonathan 	}
    269        1.4   kanaoka 	switch (reg) {
    270        1.1  jonathan 	case MII_BMCR:
    271        1.1  jonathan 		re8139_reg = RTK_BMCR;
    272        1.1  jonathan 		break;
    273        1.1  jonathan 	case MII_BMSR:
    274        1.1  jonathan 		re8139_reg = RTK_BMSR;
    275        1.1  jonathan 		break;
    276        1.1  jonathan 	case MII_ANAR:
    277        1.1  jonathan 		re8139_reg = RTK_ANAR;
    278        1.1  jonathan 		break;
    279        1.1  jonathan 	case MII_ANER:
    280        1.1  jonathan 		re8139_reg = RTK_ANER;
    281        1.1  jonathan 		break;
    282        1.1  jonathan 	case MII_ANLPAR:
    283        1.1  jonathan 		re8139_reg = RTK_LPAR;
    284        1.1  jonathan 		break;
    285        1.1  jonathan 	case MII_PHYIDR1:
    286        1.1  jonathan 	case MII_PHYIDR2:
    287        1.1  jonathan 		splx(s);
    288        1.4   kanaoka 		return 0;
    289        1.1  jonathan 	/*
    290        1.1  jonathan 	 * Allow the rlphy driver to read the media status
    291        1.1  jonathan 	 * register. If we have a link partner which does not
    292        1.1  jonathan 	 * support NWAY, this is the register which will tell
    293        1.1  jonathan 	 * us the results of parallel detection.
    294        1.1  jonathan 	 */
    295        1.1  jonathan 	case RTK_MEDIASTAT:
    296        1.1  jonathan 		rval = CSR_READ_1(sc, RTK_MEDIASTAT);
    297        1.1  jonathan 		splx(s);
    298        1.4   kanaoka 		return rval;
    299        1.1  jonathan 	default:
    300        1.4   kanaoka 		aprint_error("%s: bad phy register\n", sc->sc_dev.dv_xname);
    301        1.1  jonathan 		splx(s);
    302        1.4   kanaoka 		return 0;
    303        1.1  jonathan 	}
    304        1.1  jonathan 	rval = CSR_READ_2(sc, re8139_reg);
    305   1.20.2.4      yamt 	if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0 && re8139_reg == RTK_BMCR) {
    306   1.20.2.2      yamt 		/* 8139C+ has different bit layout. */
    307   1.20.2.2      yamt 		rval &= ~(BMCR_LOOP | BMCR_ISO);
    308   1.20.2.2      yamt 	}
    309        1.1  jonathan 	splx(s);
    310        1.4   kanaoka 	return rval;
    311        1.1  jonathan }
    312        1.1  jonathan 
    313        1.1  jonathan static void
    314        1.1  jonathan re_miibus_writereg(struct device *dev, int phy, int reg, int data)
    315        1.1  jonathan {
    316        1.1  jonathan 	struct rtk_softc	*sc = (void *)dev;
    317   1.20.2.2      yamt 	uint16_t		re8139_reg = 0;
    318        1.1  jonathan 	int			s;
    319        1.1  jonathan 
    320        1.1  jonathan 	s = splnet();
    321        1.1  jonathan 
    322   1.20.2.4      yamt 	if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0) {
    323        1.1  jonathan 		re_gmii_writereg(dev, phy, reg, data);
    324        1.1  jonathan 		splx(s);
    325        1.1  jonathan 		return;
    326        1.1  jonathan 	}
    327        1.1  jonathan 
    328        1.1  jonathan 	/* Pretend the internal PHY is only at address 0 */
    329        1.1  jonathan 	if (phy) {
    330        1.1  jonathan 		splx(s);
    331        1.1  jonathan 		return;
    332        1.1  jonathan 	}
    333        1.4   kanaoka 	switch (reg) {
    334        1.1  jonathan 	case MII_BMCR:
    335        1.1  jonathan 		re8139_reg = RTK_BMCR;
    336   1.20.2.4      yamt 		if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0) {
    337   1.20.2.2      yamt 			/* 8139C+ has different bit layout. */
    338   1.20.2.2      yamt 			data &= ~(BMCR_LOOP | BMCR_ISO);
    339   1.20.2.2      yamt 		}
    340        1.1  jonathan 		break;
    341        1.1  jonathan 	case MII_BMSR:
    342        1.1  jonathan 		re8139_reg = RTK_BMSR;
    343        1.1  jonathan 		break;
    344        1.1  jonathan 	case MII_ANAR:
    345        1.1  jonathan 		re8139_reg = RTK_ANAR;
    346        1.1  jonathan 		break;
    347        1.1  jonathan 	case MII_ANER:
    348        1.1  jonathan 		re8139_reg = RTK_ANER;
    349        1.1  jonathan 		break;
    350        1.1  jonathan 	case MII_ANLPAR:
    351        1.1  jonathan 		re8139_reg = RTK_LPAR;
    352        1.1  jonathan 		break;
    353        1.1  jonathan 	case MII_PHYIDR1:
    354        1.1  jonathan 	case MII_PHYIDR2:
    355        1.1  jonathan 		splx(s);
    356        1.1  jonathan 		return;
    357        1.1  jonathan 		break;
    358        1.1  jonathan 	default:
    359        1.4   kanaoka 		aprint_error("%s: bad phy register\n", sc->sc_dev.dv_xname);
    360        1.1  jonathan 		splx(s);
    361        1.1  jonathan 		return;
    362        1.1  jonathan 	}
    363        1.1  jonathan 	CSR_WRITE_2(sc, re8139_reg, data);
    364        1.1  jonathan 	splx(s);
    365        1.1  jonathan 	return;
    366        1.1  jonathan }
    367        1.1  jonathan 
    368        1.1  jonathan static void
    369        1.1  jonathan re_miibus_statchg(struct device *dev)
    370        1.1  jonathan {
    371        1.1  jonathan 
    372        1.1  jonathan 	return;
    373        1.1  jonathan }
    374        1.1  jonathan 
    375        1.1  jonathan static void
    376        1.1  jonathan re_reset(struct rtk_softc *sc)
    377        1.1  jonathan {
    378   1.20.2.2      yamt 	int		i;
    379        1.1  jonathan 
    380        1.1  jonathan 	CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_RESET);
    381        1.1  jonathan 
    382        1.1  jonathan 	for (i = 0; i < RTK_TIMEOUT; i++) {
    383        1.1  jonathan 		DELAY(10);
    384   1.20.2.2      yamt 		if ((CSR_READ_1(sc, RTK_COMMAND) & RTK_CMD_RESET) == 0)
    385        1.1  jonathan 			break;
    386        1.1  jonathan 	}
    387        1.1  jonathan 	if (i == RTK_TIMEOUT)
    388        1.4   kanaoka 		aprint_error("%s: reset never completed!\n",
    389        1.4   kanaoka 		    sc->sc_dev.dv_xname);
    390        1.1  jonathan 
    391        1.1  jonathan 	/*
    392        1.1  jonathan 	 * NB: Realtek-supplied Linux driver does this only for
    393        1.1  jonathan 	 * MCFG_METHOD_2, which corresponds to sc->sc_rev == 2.
    394        1.1  jonathan 	 */
    395        1.4   kanaoka 	if (1) /* XXX check softc flag for 8169s version */
    396   1.20.2.2      yamt 		CSR_WRITE_1(sc, RTK_LDPS, 1);
    397        1.1  jonathan 
    398        1.1  jonathan 	return;
    399        1.1  jonathan }
    400        1.1  jonathan 
    401        1.1  jonathan /*
    402        1.1  jonathan  * The following routine is designed to test for a defect on some
    403        1.1  jonathan  * 32-bit 8169 cards. Some of these NICs have the REQ64# and ACK64#
    404        1.1  jonathan  * lines connected to the bus, however for a 32-bit only card, they
    405        1.1  jonathan  * should be pulled high. The result of this defect is that the
    406        1.1  jonathan  * NIC will not work right if you plug it into a 64-bit slot: DMA
    407        1.1  jonathan  * operations will be done with 64-bit transfers, which will fail
    408        1.1  jonathan  * because the 64-bit data lines aren't connected.
    409        1.1  jonathan  *
    410        1.1  jonathan  * There's no way to work around this (short of talking a soldering
    411        1.1  jonathan  * iron to the board), however we can detect it. The method we use
    412        1.1  jonathan  * here is to put the NIC into digital loopback mode, set the receiver
    413        1.1  jonathan  * to promiscuous mode, and then try to send a frame. We then compare
    414        1.1  jonathan  * the frame data we sent to what was received. If the data matches,
    415        1.1  jonathan  * then the NIC is working correctly, otherwise we know the user has
    416        1.1  jonathan  * a defective NIC which has been mistakenly plugged into a 64-bit PCI
    417        1.1  jonathan  * slot. In the latter case, there's no way the NIC can work correctly,
    418        1.1  jonathan  * so we print out a message on the console and abort the device attach.
    419        1.1  jonathan  */
    420        1.1  jonathan 
    421        1.6   kanaoka int
    422        1.1  jonathan re_diag(struct rtk_softc *sc)
    423        1.1  jonathan {
    424        1.1  jonathan 	struct ifnet		*ifp = &sc->ethercom.ec_if;
    425        1.1  jonathan 	struct mbuf		*m0;
    426        1.1  jonathan 	struct ether_header	*eh;
    427   1.20.2.2      yamt 	struct re_rxsoft	*rxs;
    428   1.20.2.2      yamt 	struct re_desc		*cur_rx;
    429        1.1  jonathan 	bus_dmamap_t		dmamap;
    430   1.20.2.2      yamt 	uint16_t		status;
    431   1.20.2.2      yamt 	uint32_t		rxstat;
    432        1.1  jonathan 	int			total_len, i, s, error = 0;
    433   1.20.2.2      yamt 	static const uint8_t	dst[] = { 0x00, 'h', 'e', 'l', 'l', 'o' };
    434   1.20.2.2      yamt 	static const uint8_t	src[] = { 0x00, 'w', 'o', 'r', 'l', 'd' };
    435        1.1  jonathan 
    436        1.1  jonathan 	/* Allocate a single mbuf */
    437        1.1  jonathan 
    438        1.1  jonathan 	MGETHDR(m0, M_DONTWAIT, MT_DATA);
    439        1.1  jonathan 	if (m0 == NULL)
    440        1.4   kanaoka 		return ENOBUFS;
    441        1.1  jonathan 
    442        1.1  jonathan 	/*
    443        1.1  jonathan 	 * Initialize the NIC in test mode. This sets the chip up
    444        1.1  jonathan 	 * so that it can send and receive frames, but performs the
    445        1.1  jonathan 	 * following special functions:
    446        1.1  jonathan 	 * - Puts receiver in promiscuous mode
    447        1.1  jonathan 	 * - Enables digital loopback mode
    448        1.1  jonathan 	 * - Leaves interrupts turned off
    449        1.1  jonathan 	 */
    450        1.1  jonathan 
    451        1.1  jonathan 	ifp->if_flags |= IFF_PROMISC;
    452   1.20.2.2      yamt 	sc->re_testmode = 1;
    453        1.1  jonathan 	re_init(ifp);
    454        1.6   kanaoka 	re_stop(ifp, 0);
    455        1.1  jonathan 	DELAY(100000);
    456        1.1  jonathan 	re_init(ifp);
    457        1.1  jonathan 
    458        1.1  jonathan 	/* Put some data in the mbuf */
    459        1.1  jonathan 
    460        1.1  jonathan 	eh = mtod(m0, struct ether_header *);
    461   1.20.2.2      yamt 	memcpy(eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN);
    462   1.20.2.2      yamt 	memcpy(eh->ether_shost, (char *)&src, ETHER_ADDR_LEN);
    463        1.1  jonathan 	eh->ether_type = htons(ETHERTYPE_IP);
    464        1.1  jonathan 	m0->m_pkthdr.len = m0->m_len = ETHER_MIN_LEN - ETHER_CRC_LEN;
    465        1.1  jonathan 
    466        1.1  jonathan 	/*
    467        1.1  jonathan 	 * Queue the packet, start transmission.
    468        1.1  jonathan 	 */
    469        1.1  jonathan 
    470        1.1  jonathan 	CSR_WRITE_2(sc, RTK_ISR, 0xFFFF);
    471        1.1  jonathan 	s = splnet();
    472        1.1  jonathan 	IF_ENQUEUE(&ifp->if_snd, m0);
    473        1.1  jonathan 	re_start(ifp);
    474        1.1  jonathan 	splx(s);
    475        1.1  jonathan 	m0 = NULL;
    476        1.1  jonathan 
    477        1.1  jonathan 	/* Wait for it to propagate through the chip */
    478        1.1  jonathan 
    479        1.1  jonathan 	DELAY(100000);
    480        1.1  jonathan 	for (i = 0; i < RTK_TIMEOUT; i++) {
    481        1.1  jonathan 		status = CSR_READ_2(sc, RTK_ISR);
    482        1.4   kanaoka 		if ((status & (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_RX_OK)) ==
    483        1.4   kanaoka 		    (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_RX_OK))
    484        1.1  jonathan 			break;
    485        1.1  jonathan 		DELAY(10);
    486        1.1  jonathan 	}
    487        1.1  jonathan 	if (i == RTK_TIMEOUT) {
    488        1.4   kanaoka 		aprint_error("%s: diagnostic failed, failed to receive packet "
    489        1.1  jonathan 		    "in loopback mode\n", sc->sc_dev.dv_xname);
    490        1.1  jonathan 		error = EIO;
    491        1.1  jonathan 		goto done;
    492        1.1  jonathan 	}
    493        1.1  jonathan 
    494        1.1  jonathan 	/*
    495        1.1  jonathan 	 * The packet should have been dumped into the first
    496        1.1  jonathan 	 * entry in the RX DMA ring. Grab it from there.
    497        1.1  jonathan 	 */
    498        1.1  jonathan 
    499   1.20.2.2      yamt 	rxs = &sc->re_ldata.re_rxsoft[0];
    500   1.20.2.2      yamt 	dmamap = rxs->rxs_dmamap;
    501        1.1  jonathan 	bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
    502       1.20    briggs 	    BUS_DMASYNC_POSTREAD);
    503   1.20.2.2      yamt 	bus_dmamap_unload(sc->sc_dmat, dmamap);
    504        1.1  jonathan 
    505   1.20.2.2      yamt 	m0 = rxs->rxs_mbuf;
    506   1.20.2.2      yamt 	rxs->rxs_mbuf = NULL;
    507        1.1  jonathan 	eh = mtod(m0, struct ether_header *);
    508        1.1  jonathan 
    509   1.20.2.2      yamt 	RE_RXDESCSYNC(sc, 0, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    510   1.20.2.2      yamt 	cur_rx = &sc->re_ldata.re_rx_list[0];
    511   1.20.2.2      yamt 	rxstat = le32toh(cur_rx->re_cmdstat);
    512   1.20.2.2      yamt 	total_len = rxstat & sc->re_rxlenmask;
    513        1.1  jonathan 
    514        1.1  jonathan 	if (total_len != ETHER_MIN_LEN) {
    515        1.4   kanaoka 		aprint_error("%s: diagnostic failed, received short packet\n",
    516        1.1  jonathan 		    sc->sc_dev.dv_xname);
    517        1.1  jonathan 		error = EIO;
    518        1.1  jonathan 		goto done;
    519        1.1  jonathan 	}
    520        1.1  jonathan 
    521        1.1  jonathan 	/* Test that the received packet data matches what we sent. */
    522        1.1  jonathan 
    523   1.20.2.2      yamt 	if (memcmp((char *)&eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN) ||
    524   1.20.2.2      yamt 	    memcmp((char *)&eh->ether_shost, (char *)&src, ETHER_ADDR_LEN) ||
    525        1.1  jonathan 	    ntohs(eh->ether_type) != ETHERTYPE_IP) {
    526        1.4   kanaoka 		aprint_error("%s: WARNING, DMA FAILURE!\n",
    527        1.4   kanaoka 		    sc->sc_dev.dv_xname);
    528        1.4   kanaoka 		aprint_error("%s: expected TX data: %s",
    529        1.1  jonathan 		    sc->sc_dev.dv_xname, ether_sprintf(dst));
    530        1.4   kanaoka 		aprint_error("/%s/0x%x\n", ether_sprintf(src), ETHERTYPE_IP);
    531        1.4   kanaoka 		aprint_error("%s: received RX data: %s",
    532        1.1  jonathan 		    sc->sc_dev.dv_xname,
    533        1.1  jonathan 		    ether_sprintf(eh->ether_dhost));
    534        1.4   kanaoka 		aprint_error("/%s/0x%x\n", ether_sprintf(eh->ether_shost),
    535        1.1  jonathan 		    ntohs(eh->ether_type));
    536        1.4   kanaoka 		aprint_error("%s: You may have a defective 32-bit NIC plugged "
    537        1.1  jonathan 		    "into a 64-bit PCI slot.\n", sc->sc_dev.dv_xname);
    538        1.4   kanaoka 		aprint_error("%s: Please re-install the NIC in a 32-bit slot "
    539        1.1  jonathan 		    "for proper operation.\n", sc->sc_dev.dv_xname);
    540        1.4   kanaoka 		aprint_error("%s: Read the re(4) man page for more details.\n",
    541        1.1  jonathan 		    sc->sc_dev.dv_xname);
    542        1.1  jonathan 		error = EIO;
    543        1.1  jonathan 	}
    544        1.1  jonathan 
    545   1.20.2.2      yamt  done:
    546        1.1  jonathan 	/* Turn interface off, release resources */
    547        1.1  jonathan 
    548   1.20.2.2      yamt 	sc->re_testmode = 0;
    549        1.1  jonathan 	ifp->if_flags &= ~IFF_PROMISC;
    550        1.6   kanaoka 	re_stop(ifp, 0);
    551        1.1  jonathan 	if (m0 != NULL)
    552        1.1  jonathan 		m_freem(m0);
    553        1.1  jonathan 
    554        1.4   kanaoka 	return error;
    555        1.1  jonathan }
    556        1.1  jonathan 
    557        1.1  jonathan 
    558        1.1  jonathan /*
    559        1.1  jonathan  * Attach the interface. Allocate softc structures, do ifmedia
    560        1.1  jonathan  * setup and ethernet/BPF attach.
    561        1.1  jonathan  */
    562        1.1  jonathan void
    563        1.1  jonathan re_attach(struct rtk_softc *sc)
    564        1.1  jonathan {
    565        1.1  jonathan 	u_char			eaddr[ETHER_ADDR_LEN];
    566   1.20.2.2      yamt 	uint16_t		val;
    567        1.1  jonathan 	struct ifnet		*ifp;
    568        1.1  jonathan 	int			error = 0, i, addr_len;
    569        1.1  jonathan 
    570        1.1  jonathan 	/* Reset the adapter. */
    571        1.1  jonathan 	re_reset(sc);
    572        1.1  jonathan 
    573   1.20.2.3      yamt 	if (rtk_read_eeprom(sc, RTK_EE_ID, RTK_EEADDR_LEN1) == 0x8129)
    574   1.20.2.3      yamt 		addr_len = RTK_EEADDR_LEN1;
    575   1.20.2.3      yamt 	else
    576   1.20.2.3      yamt 		addr_len = RTK_EEADDR_LEN0;
    577   1.20.2.3      yamt 
    578   1.20.2.3      yamt 	/*
    579   1.20.2.3      yamt 	 * Get station address from the EEPROM.
    580   1.20.2.3      yamt 	 */
    581   1.20.2.3      yamt 	for (i = 0; i < 3; i++) {
    582   1.20.2.3      yamt 		val = rtk_read_eeprom(sc, RTK_EE_EADDR0 + i, addr_len);
    583   1.20.2.3      yamt 		eaddr[(i * 2) + 0] = val & 0xff;
    584   1.20.2.3      yamt 		eaddr[(i * 2) + 1] = val >> 8;
    585   1.20.2.3      yamt 	}
    586   1.20.2.3      yamt 
    587   1.20.2.4      yamt 	if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0) {
    588        1.1  jonathan 		uint32_t hwrev;
    589        1.1  jonathan 
    590        1.1  jonathan 		/* Revision of 8169/8169S/8110s in bits 30..26, 23 */
    591   1.20.2.3      yamt 		hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
    592   1.20.2.3      yamt 		/* These rev numbers are taken from Realtek's driver */
    593   1.20.2.3      yamt 		if (       hwrev == RTK_HWREV_8100E_SPIN2) {
    594   1.20.2.3      yamt 			sc->sc_rev = 15;
    595   1.20.2.3      yamt 		} else if (hwrev == RTK_HWREV_8100E) {
    596   1.20.2.3      yamt 			sc->sc_rev = 14;
    597   1.20.2.3      yamt 		} else if (hwrev == RTK_HWREV_8101E) {
    598   1.20.2.3      yamt 			sc->sc_rev = 13;
    599   1.20.2.4      yamt 		} else if (hwrev == RTK_HWREV_8168_SPIN2 ||
    600   1.20.2.4      yamt 		           hwrev == RTK_HWREV_8168_SPIN3) {
    601   1.20.2.3      yamt 			sc->sc_rev = 12;
    602   1.20.2.3      yamt 		} else if (hwrev == RTK_HWREV_8168_SPIN1) {
    603   1.20.2.3      yamt 			sc->sc_rev = 11;
    604   1.20.2.3      yamt 		} else if (hwrev == RTK_HWREV_8169_8110SC) {
    605   1.20.2.3      yamt 			sc->sc_rev = 5;
    606   1.20.2.3      yamt 		} else if (hwrev == RTK_HWREV_8169_8110SB) {
    607        1.1  jonathan 			sc->sc_rev = 4;
    608   1.20.2.3      yamt 		} else if (hwrev == RTK_HWREV_8169S) {
    609        1.1  jonathan 			sc->sc_rev = 3;
    610   1.20.2.3      yamt 		} else if (hwrev == RTK_HWREV_8110S) {
    611        1.1  jonathan 			sc->sc_rev = 2;
    612   1.20.2.4      yamt 		} else if (hwrev == RTK_HWREV_8169) {
    613        1.1  jonathan 			sc->sc_rev = 1;
    614   1.20.2.4      yamt 			sc->sc_quirk |= RTKQ_8169NONS;
    615   1.20.2.4      yamt 		} else {
    616   1.20.2.4      yamt 			aprint_normal("%s: Unknown revision (0x%08x)\n",
    617   1.20.2.4      yamt 			    sc->sc_dev.dv_xname, hwrev);
    618   1.20.2.4      yamt 			/* assume the latest one */
    619   1.20.2.4      yamt 			sc->sc_rev = 15;
    620   1.20.2.4      yamt 		}
    621        1.1  jonathan 
    622        1.1  jonathan 		/* Set RX length mask */
    623   1.20.2.2      yamt 		sc->re_rxlenmask = RE_RDESC_STAT_GFRAGLEN;
    624   1.20.2.2      yamt 		sc->re_ldata.re_tx_desc_cnt = RE_TX_DESC_CNT_8169;
    625        1.1  jonathan 	} else {
    626        1.1  jonathan 		/* Set RX length mask */
    627   1.20.2.2      yamt 		sc->re_rxlenmask = RE_RDESC_STAT_FRAGLEN;
    628   1.20.2.2      yamt 		sc->re_ldata.re_tx_desc_cnt = RE_TX_DESC_CNT_8139;
    629        1.1  jonathan 	}
    630        1.1  jonathan 
    631        1.1  jonathan 	aprint_normal("%s: Ethernet address %s\n",
    632        1.1  jonathan 	    sc->sc_dev.dv_xname, ether_sprintf(eaddr));
    633        1.1  jonathan 
    634   1.20.2.2      yamt 	if (sc->re_ldata.re_tx_desc_cnt >
    635   1.20.2.2      yamt 	    PAGE_SIZE / sizeof(struct re_desc)) {
    636   1.20.2.2      yamt 		sc->re_ldata.re_tx_desc_cnt =
    637   1.20.2.2      yamt 		    PAGE_SIZE / sizeof(struct re_desc);
    638       1.15      yamt 	}
    639       1.15      yamt 
    640       1.15      yamt 	aprint_verbose("%s: using %d tx descriptors\n",
    641   1.20.2.2      yamt 	    sc->sc_dev.dv_xname, sc->re_ldata.re_tx_desc_cnt);
    642   1.20.2.2      yamt 	KASSERT(RE_NEXT_TX_DESC(sc, RE_TX_DESC_CNT(sc) - 1) == 0);
    643        1.1  jonathan 
    644        1.5   kanaoka 	/* Allocate DMA'able memory for the TX ring */
    645   1.20.2.2      yamt 	if ((error = bus_dmamem_alloc(sc->sc_dmat, RE_TX_LIST_SZ(sc),
    646   1.20.2.2      yamt 	    RE_RING_ALIGN, 0, &sc->re_ldata.re_tx_listseg, 1,
    647   1.20.2.2      yamt 	    &sc->re_ldata.re_tx_listnseg, BUS_DMA_NOWAIT)) != 0) {
    648        1.5   kanaoka 		aprint_error("%s: can't allocate tx listseg, error = %d\n",
    649        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    650        1.5   kanaoka 		goto fail_0;
    651        1.5   kanaoka 	}
    652        1.5   kanaoka 
    653        1.5   kanaoka 	/* Load the map for the TX ring. */
    654   1.20.2.2      yamt 	if ((error = bus_dmamem_map(sc->sc_dmat, &sc->re_ldata.re_tx_listseg,
    655   1.20.2.2      yamt 	    sc->re_ldata.re_tx_listnseg, RE_TX_LIST_SZ(sc),
    656   1.20.2.4      yamt 	    (void **)&sc->re_ldata.re_tx_list,
    657   1.20.2.2      yamt 	    BUS_DMA_COHERENT | BUS_DMA_NOWAIT)) != 0) {
    658        1.5   kanaoka 		aprint_error("%s: can't map tx list, error = %d\n",
    659        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    660        1.5   kanaoka 	  	goto fail_1;
    661        1.5   kanaoka 	}
    662   1.20.2.2      yamt 	memset(sc->re_ldata.re_tx_list, 0, RE_TX_LIST_SZ(sc));
    663        1.5   kanaoka 
    664   1.20.2.2      yamt 	if ((error = bus_dmamap_create(sc->sc_dmat, RE_TX_LIST_SZ(sc), 1,
    665   1.20.2.2      yamt 	    RE_TX_LIST_SZ(sc), 0, 0,
    666   1.20.2.2      yamt 	    &sc->re_ldata.re_tx_list_map)) != 0) {
    667        1.5   kanaoka 		aprint_error("%s: can't create tx list map, error = %d\n",
    668        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    669        1.5   kanaoka 		goto fail_2;
    670        1.5   kanaoka 	}
    671        1.5   kanaoka 
    672        1.5   kanaoka 
    673       1.12     perry 	if ((error = bus_dmamap_load(sc->sc_dmat,
    674   1.20.2.2      yamt 	    sc->re_ldata.re_tx_list_map, sc->re_ldata.re_tx_list,
    675   1.20.2.2      yamt 	    RE_TX_LIST_SZ(sc), NULL, BUS_DMA_NOWAIT)) != 0) {
    676        1.5   kanaoka 		aprint_error("%s: can't load tx list, error = %d\n",
    677        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    678        1.5   kanaoka 		goto fail_3;
    679        1.5   kanaoka 	}
    680        1.5   kanaoka 
    681        1.5   kanaoka 	/* Create DMA maps for TX buffers */
    682   1.20.2.2      yamt 	for (i = 0; i < RE_TX_QLEN; i++) {
    683       1.13      yamt 		error = bus_dmamap_create(sc->sc_dmat,
    684       1.13      yamt 		    round_page(IP_MAXPACKET),
    685   1.20.2.7      yamt 		    RE_TX_DESC_CNT(sc), RE_TDESC_CMD_FRAGLEN,
    686   1.20.2.2      yamt 		    0, 0, &sc->re_ldata.re_txq[i].txq_dmamap);
    687        1.5   kanaoka 		if (error) {
    688        1.5   kanaoka 			aprint_error("%s: can't create DMA map for TX\n",
    689        1.5   kanaoka 			    sc->sc_dev.dv_xname);
    690        1.5   kanaoka 			goto fail_4;
    691        1.5   kanaoka 		}
    692        1.5   kanaoka 	}
    693        1.5   kanaoka 
    694        1.5   kanaoka 	/* Allocate DMA'able memory for the RX ring */
    695   1.20.2.2      yamt 	/* XXX see also a comment about RE_RX_DMAMEM_SZ in rtl81x9var.h */
    696   1.20.2.2      yamt 	if ((error = bus_dmamem_alloc(sc->sc_dmat,
    697   1.20.2.2      yamt 	    RE_RX_DMAMEM_SZ, RE_RING_ALIGN, 0, &sc->re_ldata.re_rx_listseg, 1,
    698   1.20.2.2      yamt 	    &sc->re_ldata.re_rx_listnseg, BUS_DMA_NOWAIT)) != 0) {
    699        1.5   kanaoka 		aprint_error("%s: can't allocate rx listseg, error = %d\n",
    700        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    701        1.5   kanaoka 		goto fail_4;
    702        1.5   kanaoka 	}
    703        1.5   kanaoka 
    704        1.5   kanaoka 	/* Load the map for the RX ring. */
    705   1.20.2.2      yamt 	if ((error = bus_dmamem_map(sc->sc_dmat, &sc->re_ldata.re_rx_listseg,
    706   1.20.2.2      yamt 	    sc->re_ldata.re_rx_listnseg, RE_RX_DMAMEM_SZ,
    707   1.20.2.4      yamt 	    (void **)&sc->re_ldata.re_rx_list,
    708   1.20.2.2      yamt 	    BUS_DMA_COHERENT | BUS_DMA_NOWAIT)) != 0) {
    709        1.5   kanaoka 		aprint_error("%s: can't map rx list, error = %d\n",
    710        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    711        1.5   kanaoka 		goto fail_5;
    712        1.5   kanaoka 	}
    713   1.20.2.2      yamt 	memset(sc->re_ldata.re_rx_list, 0, RE_RX_DMAMEM_SZ);
    714        1.5   kanaoka 
    715   1.20.2.2      yamt 	if ((error = bus_dmamap_create(sc->sc_dmat,
    716   1.20.2.2      yamt 	    RE_RX_DMAMEM_SZ, 1, RE_RX_DMAMEM_SZ, 0, 0,
    717   1.20.2.2      yamt 	    &sc->re_ldata.re_rx_list_map)) != 0) {
    718        1.5   kanaoka 		aprint_error("%s: can't create rx list map, error = %d\n",
    719        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    720        1.5   kanaoka 		goto fail_6;
    721        1.5   kanaoka 	}
    722        1.5   kanaoka 
    723        1.5   kanaoka 	if ((error = bus_dmamap_load(sc->sc_dmat,
    724   1.20.2.2      yamt 	    sc->re_ldata.re_rx_list_map, sc->re_ldata.re_rx_list,
    725   1.20.2.2      yamt 	    RE_RX_DMAMEM_SZ, NULL, BUS_DMA_NOWAIT)) != 0) {
    726        1.5   kanaoka 		aprint_error("%s: can't load rx list, error = %d\n",
    727        1.5   kanaoka 		    sc->sc_dev.dv_xname, error);
    728        1.5   kanaoka 		goto fail_7;
    729        1.5   kanaoka 	}
    730        1.5   kanaoka 
    731        1.5   kanaoka 	/* Create DMA maps for RX buffers */
    732   1.20.2.2      yamt 	for (i = 0; i < RE_RX_DESC_CNT; i++) {
    733        1.5   kanaoka 		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
    734   1.20.2.2      yamt 		    0, 0, &sc->re_ldata.re_rxsoft[i].rxs_dmamap);
    735        1.5   kanaoka 		if (error) {
    736        1.5   kanaoka 			aprint_error("%s: can't create DMA map for RX\n",
    737        1.5   kanaoka 			    sc->sc_dev.dv_xname);
    738        1.5   kanaoka 			goto fail_8;
    739        1.5   kanaoka 		}
    740        1.1  jonathan 	}
    741        1.1  jonathan 
    742        1.6   kanaoka 	/*
    743        1.6   kanaoka 	 * Record interface as attached. From here, we should not fail.
    744        1.6   kanaoka 	 */
    745        1.6   kanaoka 	sc->sc_flags |= RTK_ATTACHED;
    746        1.6   kanaoka 
    747        1.1  jonathan 	ifp = &sc->ethercom.ec_if;
    748        1.1  jonathan 	ifp->if_softc = sc;
    749        1.1  jonathan 	strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
    750        1.1  jonathan 	ifp->if_mtu = ETHERMTU;
    751        1.1  jonathan 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    752        1.1  jonathan 	ifp->if_ioctl = re_ioctl;
    753   1.20.2.2      yamt 	sc->ethercom.ec_capabilities |=
    754   1.20.2.2      yamt 	    ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING;
    755        1.1  jonathan 	ifp->if_start = re_start;
    756        1.3   kanaoka 	ifp->if_stop = re_stop;
    757       1.19      yamt 
    758       1.19      yamt 	/*
    759   1.20.2.2      yamt 	 * IFCAP_CSUM_IPv4_Tx on re(4) is broken for small packets,
    760   1.20.2.2      yamt 	 * so we have a workaround to handle the bug by padding
    761   1.20.2.2      yamt 	 * such packets manually.
    762       1.19      yamt 	 */
    763        1.1  jonathan 	ifp->if_capabilities |=
    764   1.20.2.2      yamt 	    IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
    765       1.18      yamt 	    IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
    766       1.18      yamt 	    IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
    767       1.13      yamt 	    IFCAP_TSOv4;
    768        1.1  jonathan 	ifp->if_watchdog = re_watchdog;
    769        1.1  jonathan 	ifp->if_init = re_init;
    770   1.20.2.2      yamt 	ifp->if_snd.ifq_maxlen = RE_IFQ_MAXLEN;
    771        1.1  jonathan 	ifp->if_capenable = ifp->if_capabilities;
    772        1.1  jonathan 	IFQ_SET_READY(&ifp->if_snd);
    773        1.1  jonathan 
    774   1.20.2.4      yamt 	callout_init(&sc->rtk_tick_ch, 0);
    775        1.1  jonathan 
    776        1.1  jonathan 	/* Do MII setup */
    777        1.1  jonathan 	sc->mii.mii_ifp = ifp;
    778        1.1  jonathan 	sc->mii.mii_readreg = re_miibus_readreg;
    779        1.1  jonathan 	sc->mii.mii_writereg = re_miibus_writereg;
    780        1.1  jonathan 	sc->mii.mii_statchg = re_miibus_statchg;
    781   1.20.2.6      yamt 	sc->ethercom.ec_mii = &sc->mii;
    782   1.20.2.6      yamt 	ifmedia_init(&sc->mii.mii_media, IFM_IMASK, ether_mediachange,
    783   1.20.2.6      yamt 	    ether_mediastatus);
    784        1.1  jonathan 	mii_attach(&sc->sc_dev, &sc->mii, 0xffffffff, MII_PHY_ANY,
    785        1.1  jonathan 	    MII_OFFSET_ANY, 0);
    786        1.4   kanaoka 	ifmedia_set(&sc->mii.mii_media, IFM_ETHER | IFM_AUTO);
    787        1.1  jonathan 
    788        1.1  jonathan 	/*
    789        1.1  jonathan 	 * Call MI attach routine.
    790        1.1  jonathan 	 */
    791        1.1  jonathan 	if_attach(ifp);
    792        1.1  jonathan 	ether_ifattach(ifp, eaddr);
    793        1.1  jonathan 
    794        1.5   kanaoka 	return;
    795        1.5   kanaoka 
    796   1.20.2.2      yamt  fail_8:
    797        1.5   kanaoka 	/* Destroy DMA maps for RX buffers. */
    798   1.20.2.2      yamt 	for (i = 0; i < RE_RX_DESC_CNT; i++)
    799   1.20.2.2      yamt 		if (sc->re_ldata.re_rxsoft[i].rxs_dmamap != NULL)
    800        1.5   kanaoka 			bus_dmamap_destroy(sc->sc_dmat,
    801   1.20.2.2      yamt 			    sc->re_ldata.re_rxsoft[i].rxs_dmamap);
    802        1.5   kanaoka 
    803        1.5   kanaoka 	/* Free DMA'able memory for the RX ring. */
    804   1.20.2.2      yamt 	bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
    805   1.20.2.2      yamt  fail_7:
    806   1.20.2.2      yamt 	bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
    807   1.20.2.2      yamt  fail_6:
    808        1.5   kanaoka 	bus_dmamem_unmap(sc->sc_dmat,
    809   1.20.2.4      yamt 	    (void *)sc->re_ldata.re_rx_list, RE_RX_DMAMEM_SZ);
    810   1.20.2.2      yamt  fail_5:
    811        1.5   kanaoka 	bus_dmamem_free(sc->sc_dmat,
    812   1.20.2.2      yamt 	    &sc->re_ldata.re_rx_listseg, sc->re_ldata.re_rx_listnseg);
    813        1.5   kanaoka 
    814   1.20.2.2      yamt  fail_4:
    815        1.5   kanaoka 	/* Destroy DMA maps for TX buffers. */
    816   1.20.2.2      yamt 	for (i = 0; i < RE_TX_QLEN; i++)
    817   1.20.2.2      yamt 		if (sc->re_ldata.re_txq[i].txq_dmamap != NULL)
    818        1.5   kanaoka 			bus_dmamap_destroy(sc->sc_dmat,
    819   1.20.2.2      yamt 			    sc->re_ldata.re_txq[i].txq_dmamap);
    820        1.5   kanaoka 
    821        1.5   kanaoka 	/* Free DMA'able memory for the TX ring. */
    822   1.20.2.2      yamt 	bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
    823   1.20.2.2      yamt  fail_3:
    824   1.20.2.2      yamt 	bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
    825   1.20.2.2      yamt  fail_2:
    826        1.5   kanaoka 	bus_dmamem_unmap(sc->sc_dmat,
    827   1.20.2.4      yamt 	    (void *)sc->re_ldata.re_tx_list, RE_TX_LIST_SZ(sc));
    828   1.20.2.2      yamt  fail_1:
    829        1.5   kanaoka 	bus_dmamem_free(sc->sc_dmat,
    830   1.20.2.2      yamt 	    &sc->re_ldata.re_tx_listseg, sc->re_ldata.re_tx_listnseg);
    831   1.20.2.2      yamt  fail_0:
    832        1.1  jonathan 	return;
    833        1.1  jonathan }
    834        1.1  jonathan 
    835        1.1  jonathan 
    836        1.1  jonathan /*
    837        1.1  jonathan  * re_activate:
    838        1.1  jonathan  *     Handle device activation/deactivation requests.
    839        1.1  jonathan  */
    840        1.1  jonathan int
    841        1.1  jonathan re_activate(struct device *self, enum devact act)
    842        1.1  jonathan {
    843   1.20.2.2      yamt 	struct rtk_softc *sc = (void *)self;
    844        1.1  jonathan 	int s, error = 0;
    845        1.1  jonathan 
    846        1.1  jonathan 	s = splnet();
    847        1.1  jonathan 	switch (act) {
    848        1.1  jonathan 	case DVACT_ACTIVATE:
    849        1.1  jonathan 		error = EOPNOTSUPP;
    850        1.1  jonathan 		break;
    851        1.1  jonathan 	case DVACT_DEACTIVATE:
    852        1.1  jonathan 		mii_activate(&sc->mii, act, MII_PHY_ANY, MII_OFFSET_ANY);
    853        1.1  jonathan 		if_deactivate(&sc->ethercom.ec_if);
    854        1.1  jonathan 		break;
    855        1.1  jonathan 	}
    856        1.1  jonathan 	splx(s);
    857        1.1  jonathan 
    858        1.4   kanaoka 	return error;
    859        1.1  jonathan }
    860        1.1  jonathan 
    861        1.1  jonathan /*
    862        1.1  jonathan  * re_detach:
    863        1.1  jonathan  *     Detach a rtk interface.
    864        1.1  jonathan  */
    865        1.1  jonathan int
    866        1.1  jonathan re_detach(struct rtk_softc *sc)
    867        1.1  jonathan {
    868        1.1  jonathan 	struct ifnet *ifp = &sc->ethercom.ec_if;
    869        1.5   kanaoka 	int i;
    870        1.1  jonathan 
    871        1.1  jonathan 	/*
    872        1.1  jonathan 	 * Succeed now if there isn't any work to do.
    873        1.1  jonathan 	 */
    874        1.1  jonathan 	if ((sc->sc_flags & RTK_ATTACHED) == 0)
    875        1.4   kanaoka 		return 0;
    876        1.1  jonathan 
    877        1.1  jonathan 	/* Unhook our tick handler. */
    878        1.1  jonathan 	callout_stop(&sc->rtk_tick_ch);
    879        1.1  jonathan 
    880        1.1  jonathan 	/* Detach all PHYs. */
    881        1.1  jonathan 	mii_detach(&sc->mii, MII_PHY_ANY, MII_OFFSET_ANY);
    882        1.1  jonathan 
    883        1.1  jonathan 	/* Delete all remaining media. */
    884        1.1  jonathan 	ifmedia_delete_instance(&sc->mii.mii_media, IFM_INST_ANY);
    885        1.1  jonathan 
    886        1.1  jonathan 	ether_ifdetach(ifp);
    887        1.1  jonathan 	if_detach(ifp);
    888        1.1  jonathan 
    889        1.5   kanaoka 	/* Destroy DMA maps for RX buffers. */
    890   1.20.2.2      yamt 	for (i = 0; i < RE_RX_DESC_CNT; i++)
    891   1.20.2.2      yamt 		if (sc->re_ldata.re_rxsoft[i].rxs_dmamap != NULL)
    892        1.5   kanaoka 			bus_dmamap_destroy(sc->sc_dmat,
    893   1.20.2.2      yamt 			    sc->re_ldata.re_rxsoft[i].rxs_dmamap);
    894        1.5   kanaoka 
    895        1.5   kanaoka 	/* Free DMA'able memory for the RX ring. */
    896   1.20.2.2      yamt 	bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
    897   1.20.2.2      yamt 	bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
    898        1.5   kanaoka 	bus_dmamem_unmap(sc->sc_dmat,
    899   1.20.2.4      yamt 	    (void *)sc->re_ldata.re_rx_list, RE_RX_DMAMEM_SZ);
    900        1.5   kanaoka 	bus_dmamem_free(sc->sc_dmat,
    901   1.20.2.2      yamt 	    &sc->re_ldata.re_rx_listseg, sc->re_ldata.re_rx_listnseg);
    902        1.5   kanaoka 
    903        1.5   kanaoka 	/* Destroy DMA maps for TX buffers. */
    904   1.20.2.2      yamt 	for (i = 0; i < RE_TX_QLEN; i++)
    905   1.20.2.2      yamt 		if (sc->re_ldata.re_txq[i].txq_dmamap != NULL)
    906        1.5   kanaoka 			bus_dmamap_destroy(sc->sc_dmat,
    907   1.20.2.2      yamt 			    sc->re_ldata.re_txq[i].txq_dmamap);
    908        1.5   kanaoka 
    909        1.5   kanaoka 	/* Free DMA'able memory for the TX ring. */
    910   1.20.2.2      yamt 	bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
    911   1.20.2.2      yamt 	bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
    912        1.5   kanaoka 	bus_dmamem_unmap(sc->sc_dmat,
    913   1.20.2.4      yamt 	    (void *)sc->re_ldata.re_tx_list, RE_TX_LIST_SZ(sc));
    914        1.5   kanaoka 	bus_dmamem_free(sc->sc_dmat,
    915   1.20.2.2      yamt 	    &sc->re_ldata.re_tx_listseg, sc->re_ldata.re_tx_listnseg);
    916        1.5   kanaoka 
    917        1.4   kanaoka 	return 0;
    918        1.1  jonathan }
    919        1.1  jonathan 
    920        1.1  jonathan /*
    921        1.1  jonathan  * re_enable:
    922        1.1  jonathan  *     Enable the RTL81X9 chip.
    923        1.1  jonathan  */
    924       1.12     perry static int
    925        1.1  jonathan re_enable(struct rtk_softc *sc)
    926        1.1  jonathan {
    927   1.20.2.2      yamt 
    928        1.1  jonathan 	if (RTK_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
    929        1.1  jonathan 		if ((*sc->sc_enable)(sc) != 0) {
    930        1.4   kanaoka 			aprint_error("%s: device enable failed\n",
    931        1.1  jonathan 			    sc->sc_dev.dv_xname);
    932        1.4   kanaoka 			return EIO;
    933        1.1  jonathan 		}
    934        1.1  jonathan 		sc->sc_flags |= RTK_ENABLED;
    935        1.1  jonathan 	}
    936        1.4   kanaoka 	return 0;
    937        1.1  jonathan }
    938        1.1  jonathan 
    939        1.1  jonathan /*
    940        1.1  jonathan  * re_disable:
    941        1.1  jonathan  *     Disable the RTL81X9 chip.
    942        1.1  jonathan  */
    943       1.12     perry static void
    944        1.1  jonathan re_disable(struct rtk_softc *sc)
    945        1.1  jonathan {
    946        1.1  jonathan 
    947        1.1  jonathan 	if (RTK_IS_ENABLED(sc) && sc->sc_disable != NULL) {
    948        1.1  jonathan 		(*sc->sc_disable)(sc);
    949        1.1  jonathan 		sc->sc_flags &= ~RTK_ENABLED;
    950        1.1  jonathan 	}
    951        1.1  jonathan }
    952        1.1  jonathan 
    953        1.1  jonathan static int
    954        1.1  jonathan re_newbuf(struct rtk_softc *sc, int idx, struct mbuf *m)
    955        1.1  jonathan {
    956        1.1  jonathan 	struct mbuf		*n = NULL;
    957        1.1  jonathan 	bus_dmamap_t		map;
    958   1.20.2.2      yamt 	struct re_desc		*d;
    959   1.20.2.2      yamt 	struct re_rxsoft	*rxs;
    960   1.20.2.2      yamt 	uint32_t		cmdstat;
    961        1.1  jonathan 	int			error;
    962        1.1  jonathan 
    963        1.1  jonathan 	if (m == NULL) {
    964        1.1  jonathan 		MGETHDR(n, M_DONTWAIT, MT_DATA);
    965        1.1  jonathan 		if (n == NULL)
    966        1.4   kanaoka 			return ENOBUFS;
    967        1.1  jonathan 
    968   1.20.2.2      yamt 		MCLGET(n, M_DONTWAIT);
    969   1.20.2.2      yamt 		if ((n->m_flags & M_EXT) == 0) {
    970   1.20.2.2      yamt 			m_freem(n);
    971        1.4   kanaoka 			return ENOBUFS;
    972        1.1  jonathan 		}
    973   1.20.2.2      yamt 		m = n;
    974        1.1  jonathan 	} else
    975        1.1  jonathan 		m->m_data = m->m_ext.ext_buf;
    976        1.1  jonathan 
    977        1.1  jonathan 	/*
    978        1.1  jonathan 	 * Initialize mbuf length fields and fixup
    979        1.1  jonathan 	 * alignment so that the frame payload is
    980        1.1  jonathan 	 * longword aligned.
    981        1.1  jonathan 	 */
    982   1.20.2.2      yamt 	m->m_len = m->m_pkthdr.len = MCLBYTES - RE_ETHER_ALIGN;
    983   1.20.2.2      yamt 	m->m_data += RE_ETHER_ALIGN;
    984        1.1  jonathan 
    985   1.20.2.2      yamt 	rxs = &sc->re_ldata.re_rxsoft[idx];
    986   1.20.2.2      yamt 	map = rxs->rxs_dmamap;
    987   1.20.2.1      yamt 	error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
    988   1.20.2.1      yamt 	    BUS_DMA_READ|BUS_DMA_NOWAIT);
    989        1.1  jonathan 
    990        1.1  jonathan 	if (error)
    991        1.1  jonathan 		goto out;
    992        1.1  jonathan 
    993   1.20.2.2      yamt 	bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
    994   1.20.2.2      yamt 	    BUS_DMASYNC_PREREAD);
    995        1.1  jonathan 
    996   1.20.2.2      yamt 	d = &sc->re_ldata.re_rx_list[idx];
    997   1.20.2.2      yamt #ifdef DIAGNOSTIC
    998   1.20.2.2      yamt 	RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
    999   1.20.2.2      yamt 	cmdstat = le32toh(d->re_cmdstat);
   1000   1.20.2.2      yamt 	RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD);
   1001   1.20.2.2      yamt 	if (cmdstat & RE_RDESC_STAT_OWN) {
   1002   1.20.2.2      yamt 		panic("%s: tried to map busy RX descriptor",
   1003   1.20.2.2      yamt 		    sc->sc_dev.dv_xname);
   1004   1.20.2.2      yamt 	}
   1005   1.20.2.2      yamt #endif
   1006        1.1  jonathan 
   1007   1.20.2.2      yamt 	rxs->rxs_mbuf = m;
   1008   1.20.2.2      yamt 
   1009   1.20.2.2      yamt 	d->re_vlanctl = 0;
   1010   1.20.2.2      yamt 	cmdstat = map->dm_segs[0].ds_len;
   1011   1.20.2.2      yamt 	if (idx == (RE_RX_DESC_CNT - 1))
   1012   1.20.2.2      yamt 		cmdstat |= RE_RDESC_CMD_EOR;
   1013   1.20.2.2      yamt 	re_set_bufaddr(d, map->dm_segs[0].ds_addr);
   1014   1.20.2.2      yamt 	d->re_cmdstat = htole32(cmdstat);
   1015   1.20.2.2      yamt 	RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1016   1.20.2.2      yamt 	cmdstat |= RE_RDESC_CMD_OWN;
   1017   1.20.2.2      yamt 	d->re_cmdstat = htole32(cmdstat);
   1018   1.20.2.2      yamt 	RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1019        1.1  jonathan 
   1020        1.1  jonathan 	return 0;
   1021   1.20.2.2      yamt  out:
   1022        1.1  jonathan 	if (n != NULL)
   1023        1.1  jonathan 		m_freem(n);
   1024        1.1  jonathan 	return ENOMEM;
   1025        1.1  jonathan }
   1026        1.1  jonathan 
   1027        1.1  jonathan static int
   1028        1.1  jonathan re_tx_list_init(struct rtk_softc *sc)
   1029        1.1  jonathan {
   1030       1.15      yamt 	int i;
   1031       1.15      yamt 
   1032   1.20.2.2      yamt 	memset(sc->re_ldata.re_tx_list, 0, RE_TX_LIST_SZ(sc));
   1033   1.20.2.2      yamt 	for (i = 0; i < RE_TX_QLEN; i++) {
   1034   1.20.2.2      yamt 		sc->re_ldata.re_txq[i].txq_mbuf = NULL;
   1035       1.15      yamt 	}
   1036        1.1  jonathan 
   1037        1.1  jonathan 	bus_dmamap_sync(sc->sc_dmat,
   1038   1.20.2.2      yamt 	    sc->re_ldata.re_tx_list_map, 0,
   1039   1.20.2.2      yamt 	    sc->re_ldata.re_tx_list_map->dm_mapsize,
   1040   1.20.2.2      yamt 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1041   1.20.2.2      yamt 	sc->re_ldata.re_txq_prodidx = 0;
   1042   1.20.2.2      yamt 	sc->re_ldata.re_txq_considx = 0;
   1043   1.20.2.2      yamt 	sc->re_ldata.re_txq_free = RE_TX_QLEN;
   1044   1.20.2.2      yamt 	sc->re_ldata.re_tx_free = RE_TX_DESC_CNT(sc);
   1045   1.20.2.2      yamt 	sc->re_ldata.re_tx_nextfree = 0;
   1046        1.1  jonathan 
   1047        1.4   kanaoka 	return 0;
   1048        1.1  jonathan }
   1049        1.1  jonathan 
   1050        1.1  jonathan static int
   1051        1.1  jonathan re_rx_list_init(struct rtk_softc *sc)
   1052        1.1  jonathan {
   1053        1.1  jonathan 	int			i;
   1054        1.1  jonathan 
   1055   1.20.2.2      yamt 	memset((char *)sc->re_ldata.re_rx_list, 0, RE_RX_LIST_SZ);
   1056        1.1  jonathan 
   1057   1.20.2.2      yamt 	for (i = 0; i < RE_RX_DESC_CNT; i++) {
   1058        1.1  jonathan 		if (re_newbuf(sc, i, NULL) == ENOBUFS)
   1059        1.4   kanaoka 			return ENOBUFS;
   1060        1.1  jonathan 	}
   1061        1.1  jonathan 
   1062   1.20.2.2      yamt 	sc->re_ldata.re_rx_prodidx = 0;
   1063   1.20.2.2      yamt 	sc->re_head = sc->re_tail = NULL;
   1064        1.1  jonathan 
   1065        1.4   kanaoka 	return 0;
   1066        1.1  jonathan }
   1067        1.1  jonathan 
   1068        1.1  jonathan /*
   1069        1.1  jonathan  * RX handler for C+ and 8169. For the gigE chips, we support
   1070        1.1  jonathan  * the reception of jumbo frames that have been fragmented
   1071        1.1  jonathan  * across multiple 2K mbuf cluster buffers.
   1072        1.1  jonathan  */
   1073        1.1  jonathan static void
   1074        1.1  jonathan re_rxeof(struct rtk_softc *sc)
   1075        1.1  jonathan {
   1076        1.1  jonathan 	struct mbuf		*m;
   1077        1.1  jonathan 	struct ifnet		*ifp;
   1078        1.1  jonathan 	int			i, total_len;
   1079   1.20.2.2      yamt 	struct re_desc		*cur_rx;
   1080   1.20.2.2      yamt 	struct re_rxsoft	*rxs;
   1081   1.20.2.2      yamt 	uint32_t		rxstat, rxvlan;
   1082        1.1  jonathan 
   1083        1.1  jonathan 	ifp = &sc->ethercom.ec_if;
   1084        1.1  jonathan 
   1085   1.20.2.2      yamt 	for (i = sc->re_ldata.re_rx_prodidx;; i = RE_NEXT_RX_DESC(sc, i)) {
   1086   1.20.2.2      yamt 		cur_rx = &sc->re_ldata.re_rx_list[i];
   1087   1.20.2.2      yamt 		RE_RXDESCSYNC(sc, i,
   1088   1.20.2.2      yamt 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1089   1.20.2.2      yamt 		rxstat = le32toh(cur_rx->re_cmdstat);
   1090   1.20.2.9      yamt 		rxvlan = le32toh(cur_rx->re_vlanctl);
   1091   1.20.2.2      yamt 		RE_RXDESCSYNC(sc, i, BUS_DMASYNC_PREREAD);
   1092   1.20.2.2      yamt 		if ((rxstat & RE_RDESC_STAT_OWN) != 0) {
   1093   1.20.2.2      yamt 			break;
   1094   1.20.2.2      yamt 		}
   1095   1.20.2.2      yamt 		total_len = rxstat & sc->re_rxlenmask;
   1096   1.20.2.2      yamt 		rxs = &sc->re_ldata.re_rxsoft[i];
   1097   1.20.2.2      yamt 		m = rxs->rxs_mbuf;
   1098        1.1  jonathan 
   1099        1.1  jonathan 		/* Invalidate the RX mbuf and unload its map */
   1100        1.1  jonathan 
   1101        1.1  jonathan 		bus_dmamap_sync(sc->sc_dmat,
   1102   1.20.2.2      yamt 		    rxs->rxs_dmamap, 0, rxs->rxs_dmamap->dm_mapsize,
   1103       1.20    briggs 		    BUS_DMASYNC_POSTREAD);
   1104   1.20.2.2      yamt 		bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
   1105        1.1  jonathan 
   1106   1.20.2.2      yamt 		if ((rxstat & RE_RDESC_STAT_EOF) == 0) {
   1107   1.20.2.2      yamt 			m->m_len = MCLBYTES - RE_ETHER_ALIGN;
   1108   1.20.2.2      yamt 			if (sc->re_head == NULL)
   1109   1.20.2.2      yamt 				sc->re_head = sc->re_tail = m;
   1110        1.1  jonathan 			else {
   1111        1.1  jonathan 				m->m_flags &= ~M_PKTHDR;
   1112   1.20.2.2      yamt 				sc->re_tail->m_next = m;
   1113   1.20.2.2      yamt 				sc->re_tail = m;
   1114        1.1  jonathan 			}
   1115        1.1  jonathan 			re_newbuf(sc, i, NULL);
   1116        1.1  jonathan 			continue;
   1117        1.1  jonathan 		}
   1118        1.1  jonathan 
   1119        1.1  jonathan 		/*
   1120        1.1  jonathan 		 * NOTE: for the 8139C+, the frame length field
   1121        1.1  jonathan 		 * is always 12 bits in size, but for the gigE chips,
   1122        1.1  jonathan 		 * it is 13 bits (since the max RX frame length is 16K).
   1123        1.1  jonathan 		 * Unfortunately, all 32 bits in the status word
   1124        1.1  jonathan 		 * were already used, so to make room for the extra
   1125        1.1  jonathan 		 * length bit, RealTek took out the 'frame alignment
   1126        1.1  jonathan 		 * error' bit and shifted the other status bits
   1127        1.1  jonathan 		 * over one slot. The OWN, EOR, FS and LS bits are
   1128        1.1  jonathan 		 * still in the same places. We have already extracted
   1129        1.1  jonathan 		 * the frame length and checked the OWN bit, so rather
   1130        1.1  jonathan 		 * than using an alternate bit mapping, we shift the
   1131        1.1  jonathan 		 * status bits one space to the right so we can evaluate
   1132        1.1  jonathan 		 * them using the 8169 status as though it was in the
   1133        1.1  jonathan 		 * same format as that of the 8139C+.
   1134        1.1  jonathan 		 */
   1135   1.20.2.4      yamt 		if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0)
   1136        1.1  jonathan 			rxstat >>= 1;
   1137        1.1  jonathan 
   1138   1.20.2.2      yamt 		if (__predict_false((rxstat & RE_RDESC_STAT_RXERRSUM) != 0)) {
   1139   1.20.2.2      yamt #ifdef RE_DEBUG
   1140   1.20.2.2      yamt 			aprint_error("%s: RX error (rxstat = 0x%08x)",
   1141   1.20.2.2      yamt 			    sc->sc_dev.dv_xname, rxstat);
   1142   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_FRALIGN)
   1143   1.20.2.2      yamt 				aprint_error(", frame alignment error");
   1144   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_BUFOFLOW)
   1145   1.20.2.2      yamt 				aprint_error(", out of buffer space");
   1146   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_FIFOOFLOW)
   1147   1.20.2.2      yamt 				aprint_error(", FIFO overrun");
   1148   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_GIANT)
   1149   1.20.2.2      yamt 				aprint_error(", giant packet");
   1150   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_RUNT)
   1151   1.20.2.2      yamt 				aprint_error(", runt packet");
   1152   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_CRCERR)
   1153   1.20.2.2      yamt 				aprint_error(", CRC error");
   1154   1.20.2.2      yamt 			aprint_error("\n");
   1155   1.20.2.2      yamt #endif
   1156        1.1  jonathan 			ifp->if_ierrors++;
   1157        1.1  jonathan 			/*
   1158        1.1  jonathan 			 * If this is part of a multi-fragment packet,
   1159        1.1  jonathan 			 * discard all the pieces.
   1160        1.1  jonathan 			 */
   1161   1.20.2.2      yamt 			if (sc->re_head != NULL) {
   1162   1.20.2.2      yamt 				m_freem(sc->re_head);
   1163   1.20.2.2      yamt 				sc->re_head = sc->re_tail = NULL;
   1164        1.1  jonathan 			}
   1165        1.1  jonathan 			re_newbuf(sc, i, m);
   1166        1.1  jonathan 			continue;
   1167        1.1  jonathan 		}
   1168        1.1  jonathan 
   1169        1.1  jonathan 		/*
   1170        1.1  jonathan 		 * If allocating a replacement mbuf fails,
   1171        1.1  jonathan 		 * reload the current one.
   1172        1.1  jonathan 		 */
   1173        1.1  jonathan 
   1174   1.20.2.2      yamt 		if (__predict_false(re_newbuf(sc, i, NULL) != 0)) {
   1175        1.1  jonathan 			ifp->if_ierrors++;
   1176   1.20.2.2      yamt 			if (sc->re_head != NULL) {
   1177   1.20.2.2      yamt 				m_freem(sc->re_head);
   1178   1.20.2.2      yamt 				sc->re_head = sc->re_tail = NULL;
   1179        1.1  jonathan 			}
   1180        1.1  jonathan 			re_newbuf(sc, i, m);
   1181        1.1  jonathan 			continue;
   1182        1.1  jonathan 		}
   1183        1.1  jonathan 
   1184   1.20.2.2      yamt 		if (sc->re_head != NULL) {
   1185   1.20.2.2      yamt 			m->m_len = total_len % (MCLBYTES - RE_ETHER_ALIGN);
   1186       1.12     perry 			/*
   1187        1.1  jonathan 			 * Special case: if there's 4 bytes or less
   1188        1.1  jonathan 			 * in this buffer, the mbuf can be discarded:
   1189        1.1  jonathan 			 * the last 4 bytes is the CRC, which we don't
   1190        1.1  jonathan 			 * care about anyway.
   1191        1.1  jonathan 			 */
   1192        1.1  jonathan 			if (m->m_len <= ETHER_CRC_LEN) {
   1193   1.20.2.2      yamt 				sc->re_tail->m_len -=
   1194        1.1  jonathan 				    (ETHER_CRC_LEN - m->m_len);
   1195        1.1  jonathan 				m_freem(m);
   1196        1.1  jonathan 			} else {
   1197        1.1  jonathan 				m->m_len -= ETHER_CRC_LEN;
   1198        1.1  jonathan 				m->m_flags &= ~M_PKTHDR;
   1199   1.20.2.2      yamt 				sc->re_tail->m_next = m;
   1200        1.1  jonathan 			}
   1201   1.20.2.2      yamt 			m = sc->re_head;
   1202   1.20.2.2      yamt 			sc->re_head = sc->re_tail = NULL;
   1203        1.1  jonathan 			m->m_pkthdr.len = total_len - ETHER_CRC_LEN;
   1204        1.1  jonathan 		} else
   1205        1.1  jonathan 			m->m_pkthdr.len = m->m_len =
   1206        1.1  jonathan 			    (total_len - ETHER_CRC_LEN);
   1207        1.1  jonathan 
   1208        1.1  jonathan 		ifp->if_ipackets++;
   1209        1.1  jonathan 		m->m_pkthdr.rcvif = ifp;
   1210        1.1  jonathan 
   1211   1.20.2.2      yamt 		/* Do RX checksumming */
   1212        1.1  jonathan 
   1213   1.20.2.2      yamt 		/* Check IP header checksum */
   1214   1.20.2.2      yamt 		if (rxstat & RE_RDESC_STAT_PROTOID) {
   1215   1.20.2.2      yamt 			m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
   1216   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_IPSUMBAD)
   1217        1.4   kanaoka 				m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD;
   1218        1.1  jonathan 		}
   1219        1.1  jonathan 
   1220        1.1  jonathan 		/* Check TCP/UDP checksum */
   1221   1.20.2.2      yamt 		if (RE_TCPPKT(rxstat)) {
   1222        1.1  jonathan 			m->m_pkthdr.csum_flags |= M_CSUM_TCPv4;
   1223   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_TCPSUMBAD)
   1224        1.1  jonathan 				m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
   1225   1.20.2.2      yamt 		} else if (RE_UDPPKT(rxstat)) {
   1226        1.1  jonathan 			m->m_pkthdr.csum_flags |= M_CSUM_UDPv4;
   1227   1.20.2.2      yamt 			if (rxstat & RE_RDESC_STAT_UDPSUMBAD)
   1228        1.1  jonathan 				m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
   1229        1.1  jonathan 		}
   1230        1.1  jonathan 
   1231   1.20.2.2      yamt 		if (rxvlan & RE_RDESC_VLANCTL_TAG) {
   1232        1.9  jdolecek 			VLAN_INPUT_TAG(ifp, m,
   1233   1.20.2.2      yamt 			     bswap16(rxvlan & RE_RDESC_VLANCTL_DATA),
   1234        1.9  jdolecek 			     continue);
   1235        1.1  jonathan 		}
   1236        1.1  jonathan #if NBPFILTER > 0
   1237        1.1  jonathan 		if (ifp->if_bpf)
   1238        1.1  jonathan 			bpf_mtap(ifp->if_bpf, m);
   1239        1.1  jonathan #endif
   1240        1.1  jonathan 		(*ifp->if_input)(ifp, m);
   1241        1.1  jonathan 	}
   1242        1.1  jonathan 
   1243   1.20.2.2      yamt 	sc->re_ldata.re_rx_prodidx = i;
   1244        1.1  jonathan }
   1245        1.1  jonathan 
   1246        1.1  jonathan static void
   1247        1.1  jonathan re_txeof(struct rtk_softc *sc)
   1248        1.1  jonathan {
   1249        1.1  jonathan 	struct ifnet		*ifp;
   1250   1.20.2.2      yamt 	struct re_txq		*txq;
   1251   1.20.2.2      yamt 	uint32_t		txstat;
   1252   1.20.2.2      yamt 	int			idx, descidx;
   1253        1.1  jonathan 
   1254        1.1  jonathan 	ifp = &sc->ethercom.ec_if;
   1255        1.1  jonathan 
   1256   1.20.2.2      yamt 	for (idx = sc->re_ldata.re_txq_considx;
   1257   1.20.2.2      yamt 	    sc->re_ldata.re_txq_free < RE_TX_QLEN;
   1258   1.20.2.2      yamt 	    idx = RE_NEXT_TXQ(sc, idx), sc->re_ldata.re_txq_free++) {
   1259   1.20.2.2      yamt 		txq = &sc->re_ldata.re_txq[idx];
   1260   1.20.2.2      yamt 		KASSERT(txq->txq_mbuf != NULL);
   1261       1.15      yamt 
   1262       1.17      yamt 		descidx = txq->txq_descidx;
   1263   1.20.2.2      yamt 		RE_TXDESCSYNC(sc, descidx,
   1264   1.20.2.2      yamt 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1265       1.15      yamt 		txstat =
   1266   1.20.2.2      yamt 		    le32toh(sc->re_ldata.re_tx_list[descidx].re_cmdstat);
   1267   1.20.2.2      yamt 		RE_TXDESCSYNC(sc, descidx, BUS_DMASYNC_PREREAD);
   1268   1.20.2.2      yamt 		KASSERT((txstat & RE_TDESC_CMD_EOF) != 0);
   1269   1.20.2.2      yamt 		if (txstat & RE_TDESC_CMD_OWN) {
   1270        1.1  jonathan 			break;
   1271   1.20.2.2      yamt 		}
   1272        1.1  jonathan 
   1273   1.20.2.2      yamt 		sc->re_ldata.re_tx_free += txq->txq_nsegs;
   1274   1.20.2.2      yamt 		KASSERT(sc->re_ldata.re_tx_free <= RE_TX_DESC_CNT(sc));
   1275   1.20.2.2      yamt 		bus_dmamap_sync(sc->sc_dmat, txq->txq_dmamap,
   1276   1.20.2.2      yamt 		    0, txq->txq_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
   1277       1.15      yamt 		bus_dmamap_unload(sc->sc_dmat, txq->txq_dmamap);
   1278       1.15      yamt 		m_freem(txq->txq_mbuf);
   1279       1.15      yamt 		txq->txq_mbuf = NULL;
   1280       1.15      yamt 
   1281   1.20.2.2      yamt 		if (txstat & (RE_TDESC_STAT_EXCESSCOL | RE_TDESC_STAT_COLCNT))
   1282       1.15      yamt 			ifp->if_collisions++;
   1283   1.20.2.2      yamt 		if (txstat & RE_TDESC_STAT_TXERRSUM)
   1284       1.15      yamt 			ifp->if_oerrors++;
   1285       1.15      yamt 		else
   1286       1.15      yamt 			ifp->if_opackets++;
   1287        1.1  jonathan 	}
   1288        1.1  jonathan 
   1289   1.20.2.2      yamt 	sc->re_ldata.re_txq_considx = idx;
   1290        1.1  jonathan 
   1291   1.20.2.3      yamt 	if (sc->re_ldata.re_txq_free > RE_NTXDESC_RSVD)
   1292        1.1  jonathan 		ifp->if_flags &= ~IFF_OACTIVE;
   1293        1.1  jonathan 
   1294        1.1  jonathan 	/*
   1295        1.1  jonathan 	 * If not all descriptors have been released reaped yet,
   1296        1.1  jonathan 	 * reload the timer so that we will eventually get another
   1297        1.1  jonathan 	 * interrupt that will cause us to re-enter this routine.
   1298        1.1  jonathan 	 * This is done in case the transmitter has gone idle.
   1299        1.1  jonathan 	 */
   1300   1.20.2.4      yamt 	if (sc->re_ldata.re_txq_free < RE_TX_QLEN) {
   1301        1.4   kanaoka 		CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
   1302   1.20.2.4      yamt 		if ((sc->sc_quirk & RTKQ_PCIE) != 0) {
   1303   1.20.2.4      yamt 			/*
   1304   1.20.2.4      yamt 			 * Some chips will ignore a second TX request
   1305   1.20.2.4      yamt 			 * issued while an existing transmission is in
   1306   1.20.2.4      yamt 			 * progress. If the transmitter goes idle but
   1307   1.20.2.4      yamt 			 * there are still packets waiting to be sent,
   1308   1.20.2.4      yamt 			 * we need to restart the channel here to flush
   1309   1.20.2.4      yamt 			 * them out. This only seems to be required with
   1310   1.20.2.4      yamt 			 * the PCIe devices.
   1311   1.20.2.4      yamt 			 */
   1312   1.20.2.8      yamt 			CSR_WRITE_1(sc, RTK_GTXSTART, RTK_TXSTART_START);
   1313   1.20.2.4      yamt 		}
   1314   1.20.2.4      yamt 	} else
   1315   1.20.2.2      yamt 		ifp->if_timer = 0;
   1316        1.1  jonathan }
   1317        1.1  jonathan 
   1318        1.1  jonathan static void
   1319        1.1  jonathan re_tick(void *xsc)
   1320        1.1  jonathan {
   1321        1.1  jonathan 	struct rtk_softc	*sc = xsc;
   1322        1.1  jonathan 	int s;
   1323        1.1  jonathan 
   1324        1.1  jonathan 	/*XXX: just return for 8169S/8110S with rev 2 or newer phy */
   1325        1.1  jonathan 	s = splnet();
   1326        1.1  jonathan 
   1327        1.1  jonathan 	mii_tick(&sc->mii);
   1328        1.1  jonathan 	splx(s);
   1329        1.1  jonathan 
   1330        1.1  jonathan 	callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
   1331        1.1  jonathan }
   1332        1.1  jonathan 
   1333        1.1  jonathan #ifdef DEVICE_POLLING
   1334        1.1  jonathan static void
   1335        1.1  jonathan re_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
   1336        1.1  jonathan {
   1337        1.1  jonathan 	struct rtk_softc *sc = ifp->if_softc;
   1338        1.1  jonathan 
   1339        1.1  jonathan 	RTK_LOCK(sc);
   1340   1.20.2.2      yamt 	if ((ifp->if_capenable & IFCAP_POLLING) == 0) {
   1341        1.1  jonathan 		ether_poll_deregister(ifp);
   1342        1.1  jonathan 		cmd = POLL_DEREGISTER;
   1343        1.1  jonathan 	}
   1344        1.1  jonathan 	if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */
   1345        1.1  jonathan 		CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
   1346        1.1  jonathan 		goto done;
   1347        1.1  jonathan 	}
   1348        1.1  jonathan 
   1349        1.1  jonathan 	sc->rxcycles = count;
   1350        1.1  jonathan 	re_rxeof(sc);
   1351        1.1  jonathan 	re_txeof(sc);
   1352        1.1  jonathan 
   1353   1.20.2.1      yamt 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1354        1.1  jonathan 		(*ifp->if_start)(ifp);
   1355        1.1  jonathan 
   1356        1.1  jonathan 	if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register */
   1357   1.20.2.2      yamt 		uint16_t       status;
   1358        1.1  jonathan 
   1359        1.1  jonathan 		status = CSR_READ_2(sc, RTK_ISR);
   1360        1.1  jonathan 		if (status == 0xffff)
   1361        1.1  jonathan 			goto done;
   1362        1.1  jonathan 		if (status)
   1363        1.1  jonathan 			CSR_WRITE_2(sc, RTK_ISR, status);
   1364        1.1  jonathan 
   1365        1.1  jonathan 		/*
   1366        1.1  jonathan 		 * XXX check behaviour on receiver stalls.
   1367        1.1  jonathan 		 */
   1368        1.1  jonathan 
   1369        1.1  jonathan 		if (status & RTK_ISR_SYSTEM_ERR) {
   1370        1.1  jonathan 			re_init(sc);
   1371        1.1  jonathan 		}
   1372        1.1  jonathan 	}
   1373   1.20.2.2      yamt  done:
   1374        1.1  jonathan 	RTK_UNLOCK(sc);
   1375        1.1  jonathan }
   1376        1.1  jonathan #endif /* DEVICE_POLLING */
   1377        1.1  jonathan 
   1378        1.1  jonathan int
   1379        1.1  jonathan re_intr(void *arg)
   1380        1.1  jonathan {
   1381        1.1  jonathan 	struct rtk_softc	*sc = arg;
   1382        1.1  jonathan 	struct ifnet		*ifp;
   1383   1.20.2.2      yamt 	uint16_t		status;
   1384        1.1  jonathan 	int			handled = 0;
   1385        1.1  jonathan 
   1386   1.20.2.6      yamt 	if (!device_has_power(&sc->sc_dev))
   1387   1.20.2.6      yamt 		return 0;
   1388   1.20.2.6      yamt 
   1389        1.1  jonathan 	ifp = &sc->ethercom.ec_if;
   1390        1.1  jonathan 
   1391   1.20.2.2      yamt 	if ((ifp->if_flags & IFF_UP) == 0)
   1392        1.1  jonathan 		return 0;
   1393        1.1  jonathan 
   1394        1.1  jonathan #ifdef DEVICE_POLLING
   1395        1.4   kanaoka 	if (ifp->if_flags & IFF_POLLING)
   1396        1.1  jonathan 		goto done;
   1397        1.1  jonathan 	if ((ifp->if_capenable & IFCAP_POLLING) &&
   1398        1.1  jonathan 	    ether_poll_register(re_poll, ifp)) { /* ok, disable interrupts */
   1399        1.1  jonathan 		CSR_WRITE_2(sc, RTK_IMR, 0x0000);
   1400        1.1  jonathan 		re_poll(ifp, 0, 1);
   1401        1.1  jonathan 		goto done;
   1402        1.1  jonathan 	}
   1403        1.1  jonathan #endif /* DEVICE_POLLING */
   1404        1.1  jonathan 
   1405        1.1  jonathan 	for (;;) {
   1406        1.1  jonathan 
   1407        1.1  jonathan 		status = CSR_READ_2(sc, RTK_ISR);
   1408        1.1  jonathan 		/* If the card has gone away the read returns 0xffff. */
   1409        1.1  jonathan 		if (status == 0xffff)
   1410        1.1  jonathan 			break;
   1411        1.1  jonathan 		if (status) {
   1412        1.1  jonathan 			handled = 1;
   1413        1.1  jonathan 			CSR_WRITE_2(sc, RTK_ISR, status);
   1414        1.1  jonathan 		}
   1415        1.1  jonathan 
   1416        1.1  jonathan 		if ((status & RTK_INTRS_CPLUS) == 0)
   1417        1.1  jonathan 			break;
   1418        1.1  jonathan 
   1419   1.20.2.2      yamt 		if (status & (RTK_ISR_RX_OK | RTK_ISR_RX_ERR))
   1420        1.1  jonathan 			re_rxeof(sc);
   1421        1.1  jonathan 
   1422   1.20.2.2      yamt 		if (status & (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_TX_ERR |
   1423   1.20.2.2      yamt 		    RTK_ISR_TX_DESC_UNAVAIL))
   1424        1.1  jonathan 			re_txeof(sc);
   1425        1.1  jonathan 
   1426        1.1  jonathan 		if (status & RTK_ISR_SYSTEM_ERR) {
   1427        1.1  jonathan 			re_init(ifp);
   1428        1.1  jonathan 		}
   1429        1.1  jonathan 
   1430        1.1  jonathan 		if (status & RTK_ISR_LINKCHG) {
   1431        1.1  jonathan 			callout_stop(&sc->rtk_tick_ch);
   1432        1.1  jonathan 			re_tick(sc);
   1433        1.1  jonathan 		}
   1434        1.1  jonathan 	}
   1435        1.1  jonathan 
   1436   1.20.2.2      yamt 	if (handled && !IFQ_IS_EMPTY(&ifp->if_snd))
   1437   1.20.2.2      yamt 		re_start(ifp);
   1438        1.1  jonathan 
   1439        1.1  jonathan #ifdef DEVICE_POLLING
   1440   1.20.2.2      yamt  done:
   1441        1.1  jonathan #endif
   1442        1.1  jonathan 
   1443        1.1  jonathan 	return handled;
   1444        1.1  jonathan }
   1445        1.1  jonathan 
   1446       1.13      yamt 
   1447        1.1  jonathan 
   1448        1.1  jonathan /*
   1449        1.1  jonathan  * Main transmit routine for C+ and gigE NICs.
   1450        1.1  jonathan  */
   1451        1.1  jonathan 
   1452        1.1  jonathan static void
   1453        1.1  jonathan re_start(struct ifnet *ifp)
   1454        1.1  jonathan {
   1455        1.1  jonathan 	struct rtk_softc	*sc;
   1456   1.20.2.2      yamt 	struct mbuf		*m;
   1457   1.20.2.2      yamt 	bus_dmamap_t		map;
   1458   1.20.2.2      yamt 	struct re_txq		*txq;
   1459   1.20.2.2      yamt 	struct re_desc		*d;
   1460   1.20.2.2      yamt 	struct m_tag		*mtag;
   1461  1.20.2.10      yamt 	uint32_t		cmdstat, re_flags, vlanctl;
   1462   1.20.2.2      yamt 	int			ofree, idx, error, nsegs, seg;
   1463   1.20.2.2      yamt 	int			startdesc, curdesc, lastdesc;
   1464   1.20.2.3      yamt 	bool			pad;
   1465        1.1  jonathan 
   1466        1.1  jonathan 	sc = ifp->if_softc;
   1467   1.20.2.2      yamt 	ofree = sc->re_ldata.re_txq_free;
   1468        1.1  jonathan 
   1469   1.20.2.2      yamt 	for (idx = sc->re_ldata.re_txq_prodidx;; idx = RE_NEXT_TXQ(sc, idx)) {
   1470       1.13      yamt 
   1471       1.17      yamt 		IFQ_POLL(&ifp->if_snd, m);
   1472       1.17      yamt 		if (m == NULL)
   1473        1.1  jonathan 			break;
   1474        1.1  jonathan 
   1475   1.20.2.2      yamt 		if (sc->re_ldata.re_txq_free == 0 ||
   1476   1.20.2.7      yamt 		    sc->re_ldata.re_tx_free == 0) {
   1477   1.20.2.2      yamt 			/* no more free slots left */
   1478       1.17      yamt 			ifp->if_flags |= IFF_OACTIVE;
   1479       1.17      yamt 			break;
   1480       1.17      yamt 		}
   1481       1.17      yamt 
   1482   1.20.2.2      yamt 		/*
   1483   1.20.2.2      yamt 		 * Set up checksum offload. Note: checksum offload bits must
   1484   1.20.2.2      yamt 		 * appear in all descriptors of a multi-descriptor transmit
   1485   1.20.2.2      yamt 		 * attempt. (This is according to testing done with an 8169
   1486   1.20.2.2      yamt 		 * chip. I'm not sure if this is a requirement or a bug.)
   1487   1.20.2.2      yamt 		 */
   1488   1.20.2.2      yamt 
   1489   1.20.2.2      yamt 		if ((m->m_pkthdr.csum_flags & M_CSUM_TSOv4) != 0) {
   1490   1.20.2.2      yamt 			uint32_t segsz = m->m_pkthdr.segsz;
   1491   1.20.2.2      yamt 
   1492   1.20.2.2      yamt 			re_flags = RE_TDESC_CMD_LGSEND |
   1493   1.20.2.2      yamt 			    (segsz << RE_TDESC_CMD_MSSVAL_SHIFT);
   1494   1.20.2.2      yamt 		} else {
   1495   1.20.2.2      yamt 			/*
   1496   1.20.2.2      yamt 			 * set RE_TDESC_CMD_IPCSUM if any checksum offloading
   1497   1.20.2.2      yamt 			 * is requested.  otherwise, RE_TDESC_CMD_TCPCSUM/
   1498   1.20.2.2      yamt 			 * RE_TDESC_CMD_UDPCSUM doesn't make effects.
   1499   1.20.2.2      yamt 			 */
   1500   1.20.2.2      yamt 			re_flags = 0;
   1501   1.20.2.2      yamt 			if ((m->m_pkthdr.csum_flags &
   1502   1.20.2.2      yamt 			    (M_CSUM_IPv4 | M_CSUM_TCPv4 | M_CSUM_UDPv4))
   1503   1.20.2.2      yamt 			    != 0) {
   1504   1.20.2.2      yamt 				re_flags |= RE_TDESC_CMD_IPCSUM;
   1505   1.20.2.2      yamt 				if (m->m_pkthdr.csum_flags & M_CSUM_TCPv4) {
   1506   1.20.2.2      yamt 					re_flags |= RE_TDESC_CMD_TCPCSUM;
   1507   1.20.2.2      yamt 				} else if (m->m_pkthdr.csum_flags &
   1508   1.20.2.2      yamt 				    M_CSUM_UDPv4) {
   1509   1.20.2.2      yamt 					re_flags |= RE_TDESC_CMD_UDPCSUM;
   1510   1.20.2.2      yamt 				}
   1511   1.20.2.2      yamt 			}
   1512   1.20.2.2      yamt 		}
   1513   1.20.2.2      yamt 
   1514   1.20.2.2      yamt 		txq = &sc->re_ldata.re_txq[idx];
   1515   1.20.2.2      yamt 		map = txq->txq_dmamap;
   1516   1.20.2.2      yamt 		error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
   1517   1.20.2.2      yamt 		    BUS_DMA_WRITE|BUS_DMA_NOWAIT);
   1518   1.20.2.2      yamt 
   1519   1.20.2.2      yamt 		if (__predict_false(error)) {
   1520   1.20.2.2      yamt 			/* XXX try to defrag if EFBIG? */
   1521   1.20.2.2      yamt 			aprint_error("%s: can't map mbuf (error %d)\n",
   1522   1.20.2.2      yamt 			    sc->sc_dev.dv_xname, error);
   1523   1.20.2.2      yamt 
   1524       1.17      yamt 			IFQ_DEQUEUE(&ifp->if_snd, m);
   1525       1.17      yamt 			m_freem(m);
   1526       1.13      yamt 			ifp->if_oerrors++;
   1527       1.13      yamt 			continue;
   1528       1.13      yamt 		}
   1529   1.20.2.2      yamt 
   1530   1.20.2.2      yamt 		nsegs = map->dm_nsegs;
   1531   1.20.2.4      yamt 		pad = false;
   1532   1.20.2.2      yamt 		if (__predict_false(m->m_pkthdr.len <= RE_IP4CSUMTX_PADLEN &&
   1533   1.20.2.2      yamt 		    (re_flags & RE_TDESC_CMD_IPCSUM) != 0)) {
   1534   1.20.2.4      yamt 			pad = true;
   1535   1.20.2.2      yamt 			nsegs++;
   1536   1.20.2.2      yamt 		}
   1537   1.20.2.2      yamt 
   1538   1.20.2.7      yamt 		if (nsegs > sc->re_ldata.re_tx_free) {
   1539   1.20.2.2      yamt 			/*
   1540   1.20.2.2      yamt 			 * Not enough free descriptors to transmit this packet.
   1541   1.20.2.2      yamt 			 */
   1542        1.1  jonathan 			ifp->if_flags |= IFF_OACTIVE;
   1543   1.20.2.2      yamt 			bus_dmamap_unload(sc->sc_dmat, map);
   1544        1.1  jonathan 			break;
   1545        1.1  jonathan 		}
   1546       1.17      yamt 
   1547       1.17      yamt 		IFQ_DEQUEUE(&ifp->if_snd, m);
   1548       1.17      yamt 
   1549   1.20.2.2      yamt 		/*
   1550   1.20.2.2      yamt 		 * Make sure that the caches are synchronized before we
   1551   1.20.2.2      yamt 		 * ask the chip to start DMA for the packet data.
   1552   1.20.2.2      yamt 		 */
   1553   1.20.2.2      yamt 		bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
   1554   1.20.2.2      yamt 		    BUS_DMASYNC_PREWRITE);
   1555   1.20.2.2      yamt 
   1556   1.20.2.2      yamt 		/*
   1557  1.20.2.10      yamt 		 * Set up hardware VLAN tagging. Note: vlan tag info must
   1558  1.20.2.10      yamt 		 * appear in all descriptors of a multi-descriptor
   1559  1.20.2.10      yamt 		 * transmission attempt.
   1560  1.20.2.10      yamt 		 */
   1561  1.20.2.10      yamt 		vlanctl = 0;
   1562  1.20.2.10      yamt 		if ((mtag = VLAN_OUTPUT_TAG(&sc->ethercom, m)) != NULL)
   1563  1.20.2.10      yamt 			vlanctl = bswap16(VLAN_TAG_VALUE(mtag)) |
   1564  1.20.2.10      yamt 			    RE_TDESC_VLANCTL_TAG;
   1565  1.20.2.10      yamt 
   1566  1.20.2.10      yamt 		/*
   1567   1.20.2.2      yamt 		 * Map the segment array into descriptors.
   1568   1.20.2.2      yamt 		 * Note that we set the start-of-frame and
   1569   1.20.2.2      yamt 		 * end-of-frame markers for either TX or RX,
   1570   1.20.2.2      yamt 		 * but they really only have meaning in the TX case.
   1571   1.20.2.2      yamt 		 * (In the RX case, it's the chip that tells us
   1572   1.20.2.2      yamt 		 *  where packets begin and end.)
   1573   1.20.2.2      yamt 		 * We also keep track of the end of the ring
   1574   1.20.2.2      yamt 		 * and set the end-of-ring bits as needed,
   1575   1.20.2.2      yamt 		 * and we set the ownership bits in all except
   1576   1.20.2.2      yamt 		 * the very first descriptor. (The caller will
   1577   1.20.2.2      yamt 		 * set this descriptor later when it start
   1578   1.20.2.2      yamt 		 * transmission or reception.)
   1579   1.20.2.2      yamt 		 */
   1580   1.20.2.2      yamt 		curdesc = startdesc = sc->re_ldata.re_tx_nextfree;
   1581   1.20.2.2      yamt 		lastdesc = -1;
   1582   1.20.2.2      yamt 		for (seg = 0; seg < map->dm_nsegs;
   1583   1.20.2.2      yamt 		    seg++, curdesc = RE_NEXT_TX_DESC(sc, curdesc)) {
   1584   1.20.2.2      yamt 			d = &sc->re_ldata.re_tx_list[curdesc];
   1585   1.20.2.2      yamt #ifdef DIAGNOSTIC
   1586   1.20.2.2      yamt 			RE_TXDESCSYNC(sc, curdesc,
   1587   1.20.2.2      yamt 			    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1588   1.20.2.2      yamt 			cmdstat = le32toh(d->re_cmdstat);
   1589   1.20.2.2      yamt 			RE_TXDESCSYNC(sc, curdesc, BUS_DMASYNC_PREREAD);
   1590   1.20.2.2      yamt 			if (cmdstat & RE_TDESC_STAT_OWN) {
   1591   1.20.2.2      yamt 				panic("%s: tried to map busy TX descriptor",
   1592   1.20.2.2      yamt 				    sc->sc_dev.dv_xname);
   1593   1.20.2.2      yamt 			}
   1594   1.20.2.2      yamt #endif
   1595   1.20.2.2      yamt 
   1596  1.20.2.10      yamt 			d->re_vlanctl = htole32(vlanctl);
   1597   1.20.2.2      yamt 			re_set_bufaddr(d, map->dm_segs[seg].ds_addr);
   1598   1.20.2.2      yamt 			cmdstat = re_flags | map->dm_segs[seg].ds_len;
   1599   1.20.2.2      yamt 			if (seg == 0)
   1600   1.20.2.2      yamt 				cmdstat |= RE_TDESC_CMD_SOF;
   1601   1.20.2.2      yamt 			else
   1602   1.20.2.2      yamt 				cmdstat |= RE_TDESC_CMD_OWN;
   1603   1.20.2.2      yamt 			if (curdesc == (RE_TX_DESC_CNT(sc) - 1))
   1604   1.20.2.2      yamt 				cmdstat |= RE_TDESC_CMD_EOR;
   1605   1.20.2.2      yamt 			if (seg == nsegs - 1) {
   1606   1.20.2.2      yamt 				cmdstat |= RE_TDESC_CMD_EOF;
   1607   1.20.2.2      yamt 				lastdesc = curdesc;
   1608   1.20.2.2      yamt 			}
   1609   1.20.2.2      yamt 			d->re_cmdstat = htole32(cmdstat);
   1610   1.20.2.2      yamt 			RE_TXDESCSYNC(sc, curdesc,
   1611   1.20.2.2      yamt 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1612   1.20.2.2      yamt 		}
   1613   1.20.2.2      yamt 		if (__predict_false(pad)) {
   1614   1.20.2.2      yamt 			bus_addr_t paddaddr;
   1615   1.20.2.2      yamt 
   1616   1.20.2.2      yamt 			d = &sc->re_ldata.re_tx_list[curdesc];
   1617  1.20.2.10      yamt 			d->re_vlanctl = htole32(vlanctl);
   1618   1.20.2.2      yamt 			paddaddr = RE_TXPADDADDR(sc);
   1619   1.20.2.2      yamt 			re_set_bufaddr(d, paddaddr);
   1620   1.20.2.2      yamt 			cmdstat = re_flags |
   1621   1.20.2.2      yamt 			    RE_TDESC_CMD_OWN | RE_TDESC_CMD_EOF |
   1622   1.20.2.2      yamt 			    (RE_IP4CSUMTX_PADLEN + 1 - m->m_pkthdr.len);
   1623   1.20.2.2      yamt 			if (curdesc == (RE_TX_DESC_CNT(sc) - 1))
   1624   1.20.2.2      yamt 				cmdstat |= RE_TDESC_CMD_EOR;
   1625   1.20.2.2      yamt 			d->re_cmdstat = htole32(cmdstat);
   1626   1.20.2.2      yamt 			RE_TXDESCSYNC(sc, curdesc,
   1627   1.20.2.2      yamt 			    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1628   1.20.2.2      yamt 			lastdesc = curdesc;
   1629   1.20.2.2      yamt 			curdesc = RE_NEXT_TX_DESC(sc, curdesc);
   1630   1.20.2.2      yamt 		}
   1631   1.20.2.2      yamt 		KASSERT(lastdesc != -1);
   1632   1.20.2.2      yamt 
   1633   1.20.2.2      yamt 		/* Transfer ownership of packet to the chip. */
   1634   1.20.2.2      yamt 
   1635   1.20.2.2      yamt 		sc->re_ldata.re_tx_list[startdesc].re_cmdstat |=
   1636   1.20.2.2      yamt 		    htole32(RE_TDESC_CMD_OWN);
   1637   1.20.2.2      yamt 		RE_TXDESCSYNC(sc, startdesc,
   1638   1.20.2.2      yamt 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1639   1.20.2.2      yamt 
   1640   1.20.2.2      yamt 		/* update info of TX queue and descriptors */
   1641   1.20.2.2      yamt 		txq->txq_mbuf = m;
   1642   1.20.2.2      yamt 		txq->txq_descidx = lastdesc;
   1643   1.20.2.2      yamt 		txq->txq_nsegs = nsegs;
   1644   1.20.2.2      yamt 
   1645   1.20.2.2      yamt 		sc->re_ldata.re_txq_free--;
   1646   1.20.2.2      yamt 		sc->re_ldata.re_tx_free -= nsegs;
   1647   1.20.2.2      yamt 		sc->re_ldata.re_tx_nextfree = curdesc;
   1648   1.20.2.2      yamt 
   1649        1.1  jonathan #if NBPFILTER > 0
   1650        1.1  jonathan 		/*
   1651        1.1  jonathan 		 * If there's a BPF listener, bounce a copy of this frame
   1652        1.1  jonathan 		 * to him.
   1653        1.1  jonathan 		 */
   1654        1.1  jonathan 		if (ifp->if_bpf)
   1655       1.17      yamt 			bpf_mtap(ifp->if_bpf, m);
   1656        1.1  jonathan #endif
   1657        1.1  jonathan 	}
   1658        1.1  jonathan 
   1659   1.20.2.2      yamt 	if (sc->re_ldata.re_txq_free < ofree) {
   1660   1.20.2.2      yamt 		/*
   1661   1.20.2.2      yamt 		 * TX packets are enqueued.
   1662   1.20.2.2      yamt 		 */
   1663   1.20.2.2      yamt 		sc->re_ldata.re_txq_prodidx = idx;
   1664        1.1  jonathan 
   1665   1.20.2.2      yamt 		/*
   1666   1.20.2.2      yamt 		 * Start the transmitter to poll.
   1667   1.20.2.2      yamt 		 *
   1668   1.20.2.2      yamt 		 * RealTek put the TX poll request register in a different
   1669   1.20.2.2      yamt 		 * location on the 8169 gigE chip. I don't know why.
   1670   1.20.2.2      yamt 		 */
   1671   1.20.2.4      yamt 		if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0)
   1672   1.20.2.2      yamt 			CSR_WRITE_1(sc, RTK_TXSTART, RTK_TXSTART_START);
   1673   1.20.2.4      yamt 		else
   1674   1.20.2.8      yamt 			CSR_WRITE_1(sc, RTK_GTXSTART, RTK_TXSTART_START);
   1675        1.1  jonathan 
   1676   1.20.2.2      yamt 		/*
   1677   1.20.2.2      yamt 		 * Use the countdown timer for interrupt moderation.
   1678   1.20.2.2      yamt 		 * 'TX done' interrupts are disabled. Instead, we reset the
   1679   1.20.2.2      yamt 		 * countdown timer, which will begin counting until it hits
   1680   1.20.2.2      yamt 		 * the value in the TIMERINT register, and then trigger an
   1681   1.20.2.2      yamt 		 * interrupt. Each time we write to the TIMERCNT register,
   1682   1.20.2.2      yamt 		 * the timer count is reset to 0.
   1683   1.20.2.2      yamt 		 */
   1684   1.20.2.2      yamt 		CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
   1685        1.1  jonathan 
   1686   1.20.2.2      yamt 		/*
   1687   1.20.2.2      yamt 		 * Set a timeout in case the chip goes out to lunch.
   1688   1.20.2.2      yamt 		 */
   1689   1.20.2.2      yamt 		ifp->if_timer = 5;
   1690   1.20.2.2      yamt 	}
   1691        1.1  jonathan }
   1692        1.1  jonathan 
   1693        1.1  jonathan static int
   1694        1.1  jonathan re_init(struct ifnet *ifp)
   1695        1.1  jonathan {
   1696        1.1  jonathan 	struct rtk_softc	*sc = ifp->if_softc;
   1697   1.20.2.4      yamt 	const uint8_t		*enaddr;
   1698   1.20.2.2      yamt 	uint32_t		rxcfg = 0;
   1699   1.20.2.2      yamt 	uint32_t		reg;
   1700        1.1  jonathan 	int error;
   1701       1.12     perry 
   1702        1.1  jonathan 	if ((error = re_enable(sc)) != 0)
   1703        1.1  jonathan 		goto out;
   1704        1.1  jonathan 
   1705        1.1  jonathan 	/*
   1706        1.1  jonathan 	 * Cancel pending I/O and free all RX/TX buffers.
   1707        1.1  jonathan 	 */
   1708        1.3   kanaoka 	re_stop(ifp, 0);
   1709        1.1  jonathan 
   1710   1.20.2.2      yamt 	re_reset(sc);
   1711   1.20.2.2      yamt 
   1712        1.1  jonathan 	/*
   1713        1.1  jonathan 	 * Enable C+ RX and TX mode, as well as VLAN stripping and
   1714        1.1  jonathan 	 * RX checksum offload. We must configure the C+ register
   1715        1.1  jonathan 	 * before all others.
   1716        1.1  jonathan 	 */
   1717        1.1  jonathan 	reg = 0;
   1718        1.1  jonathan 
   1719        1.1  jonathan 	/*
   1720        1.1  jonathan 	 * XXX: Realtek docs say bits 0 and 1 are reserved, for 8169S/8110S.
   1721        1.1  jonathan 	 * FreeBSD  drivers set these bits anyway (for 8139C+?).
   1722        1.1  jonathan 	 * So far, it works.
   1723        1.1  jonathan 	 */
   1724        1.1  jonathan 
   1725        1.1  jonathan 	/*
   1726   1.20.2.4      yamt 	 * XXX: For old 8169 set bit 14.
   1727   1.20.2.4      yamt 	 *      For 8169S/8110S and above, do not set bit 14.
   1728        1.1  jonathan 	 */
   1729   1.20.2.4      yamt 	if ((sc->sc_quirk & RTKQ_8169NONS) != 0)
   1730        1.4   kanaoka 		reg |= (0x1 << 14) | RTK_CPLUSCMD_PCI_MRW;;
   1731        1.1  jonathan 
   1732        1.4   kanaoka 	if (1)  {/* not for 8169S ? */
   1733   1.20.2.1      yamt 		reg |=
   1734   1.20.2.1      yamt 		    RTK_CPLUSCMD_VLANSTRIP |
   1735        1.4   kanaoka 		    (ifp->if_capenable &
   1736       1.18      yamt 		    (IFCAP_CSUM_IPv4_Rx | IFCAP_CSUM_TCPv4_Rx |
   1737       1.18      yamt 		     IFCAP_CSUM_UDPv4_Rx) ?
   1738        1.4   kanaoka 		    RTK_CPLUSCMD_RXCSUM_ENB : 0);
   1739        1.4   kanaoka 	}
   1740       1.12     perry 
   1741        1.1  jonathan 	CSR_WRITE_2(sc, RTK_CPLUS_CMD,
   1742        1.4   kanaoka 	    reg | RTK_CPLUSCMD_RXENB | RTK_CPLUSCMD_TXENB);
   1743        1.1  jonathan 
   1744        1.1  jonathan 	/* XXX: from Realtek-supplied Linux driver. Wholly undocumented. */
   1745   1.20.2.4      yamt 	if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0)
   1746   1.20.2.2      yamt 		CSR_WRITE_2(sc, RTK_IM, 0x0000);
   1747        1.1  jonathan 
   1748        1.1  jonathan 	DELAY(10000);
   1749        1.1  jonathan 
   1750        1.1  jonathan 	/*
   1751        1.1  jonathan 	 * Init our MAC address.  Even though the chipset
   1752        1.1  jonathan 	 * documentation doesn't mention it, we need to enter "Config
   1753        1.1  jonathan 	 * register write enable" mode to modify the ID registers.
   1754        1.1  jonathan 	 */
   1755        1.1  jonathan 	CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_WRITECFG);
   1756   1.20.2.4      yamt 	enaddr = CLLADDR(ifp->if_sadl);
   1757   1.20.2.2      yamt 	reg = enaddr[0] | (enaddr[1] << 8) |
   1758   1.20.2.2      yamt 	    (enaddr[2] << 16) | (enaddr[3] << 24);
   1759   1.20.2.2      yamt 	CSR_WRITE_4(sc, RTK_IDR0, reg);
   1760   1.20.2.2      yamt 	reg = enaddr[4] | (enaddr[5] << 8);
   1761   1.20.2.2      yamt 	CSR_WRITE_4(sc, RTK_IDR4, reg);
   1762        1.1  jonathan 	CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF);
   1763        1.1  jonathan 
   1764        1.1  jonathan 	/*
   1765        1.1  jonathan 	 * For C+ mode, initialize the RX descriptors and mbufs.
   1766        1.1  jonathan 	 */
   1767        1.1  jonathan 	re_rx_list_init(sc);
   1768        1.1  jonathan 	re_tx_list_init(sc);
   1769        1.1  jonathan 
   1770        1.1  jonathan 	/*
   1771   1.20.2.2      yamt 	 * Load the addresses of the RX and TX lists into the chip.
   1772   1.20.2.2      yamt 	 */
   1773   1.20.2.2      yamt 	CSR_WRITE_4(sc, RTK_RXLIST_ADDR_HI,
   1774   1.20.2.2      yamt 	    RE_ADDR_HI(sc->re_ldata.re_rx_list_map->dm_segs[0].ds_addr));
   1775   1.20.2.2      yamt 	CSR_WRITE_4(sc, RTK_RXLIST_ADDR_LO,
   1776   1.20.2.2      yamt 	    RE_ADDR_LO(sc->re_ldata.re_rx_list_map->dm_segs[0].ds_addr));
   1777   1.20.2.2      yamt 
   1778   1.20.2.2      yamt 	CSR_WRITE_4(sc, RTK_TXLIST_ADDR_HI,
   1779   1.20.2.2      yamt 	    RE_ADDR_HI(sc->re_ldata.re_tx_list_map->dm_segs[0].ds_addr));
   1780   1.20.2.2      yamt 	CSR_WRITE_4(sc, RTK_TXLIST_ADDR_LO,
   1781   1.20.2.2      yamt 	    RE_ADDR_LO(sc->re_ldata.re_tx_list_map->dm_segs[0].ds_addr));
   1782   1.20.2.2      yamt 
   1783   1.20.2.2      yamt 	/*
   1784        1.1  jonathan 	 * Enable transmit and receive.
   1785        1.1  jonathan 	 */
   1786        1.4   kanaoka 	CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
   1787        1.1  jonathan 
   1788        1.1  jonathan 	/*
   1789        1.1  jonathan 	 * Set the initial TX and RX configuration.
   1790        1.1  jonathan 	 */
   1791   1.20.2.4      yamt 	if (sc->re_testmode && (sc->sc_quirk & RTKQ_8169NONS) != 0) {
   1792   1.20.2.4      yamt 		/* test mode is needed only for old 8169 */
   1793   1.20.2.4      yamt 		CSR_WRITE_4(sc, RTK_TXCFG,
   1794   1.20.2.4      yamt 		    RE_TXCFG_CONFIG | RTK_LOOPTEST_ON);
   1795        1.1  jonathan 	} else
   1796   1.20.2.2      yamt 		CSR_WRITE_4(sc, RTK_TXCFG, RE_TXCFG_CONFIG);
   1797   1.20.2.2      yamt 
   1798   1.20.2.2      yamt 	CSR_WRITE_1(sc, RTK_EARLY_TX_THRESH, 16);
   1799   1.20.2.2      yamt 
   1800   1.20.2.2      yamt 	CSR_WRITE_4(sc, RTK_RXCFG, RE_RXCFG_CONFIG);
   1801        1.1  jonathan 
   1802        1.1  jonathan 	/* Set the individual bit to receive frames for this host only. */
   1803        1.1  jonathan 	rxcfg = CSR_READ_4(sc, RTK_RXCFG);
   1804        1.1  jonathan 	rxcfg |= RTK_RXCFG_RX_INDIV;
   1805        1.1  jonathan 
   1806        1.1  jonathan 	/* If we want promiscuous mode, set the allframes bit. */
   1807        1.8  jdolecek 	if (ifp->if_flags & IFF_PROMISC)
   1808        1.1  jonathan 		rxcfg |= RTK_RXCFG_RX_ALLPHYS;
   1809        1.8  jdolecek 	else
   1810        1.1  jonathan 		rxcfg &= ~RTK_RXCFG_RX_ALLPHYS;
   1811        1.8  jdolecek 	CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
   1812        1.1  jonathan 
   1813        1.1  jonathan 	/*
   1814        1.1  jonathan 	 * Set capture broadcast bit to capture broadcast frames.
   1815        1.1  jonathan 	 */
   1816        1.8  jdolecek 	if (ifp->if_flags & IFF_BROADCAST)
   1817        1.1  jonathan 		rxcfg |= RTK_RXCFG_RX_BROAD;
   1818        1.8  jdolecek 	else
   1819        1.1  jonathan 		rxcfg &= ~RTK_RXCFG_RX_BROAD;
   1820        1.8  jdolecek 	CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
   1821        1.1  jonathan 
   1822        1.1  jonathan 	/*
   1823        1.1  jonathan 	 * Program the multicast filter, if necessary.
   1824        1.1  jonathan 	 */
   1825        1.1  jonathan 	rtk_setmulti(sc);
   1826        1.1  jonathan 
   1827        1.1  jonathan #ifdef DEVICE_POLLING
   1828        1.1  jonathan 	/*
   1829        1.1  jonathan 	 * Disable interrupts if we are polling.
   1830        1.1  jonathan 	 */
   1831        1.1  jonathan 	if (ifp->if_flags & IFF_POLLING)
   1832        1.1  jonathan 		CSR_WRITE_2(sc, RTK_IMR, 0);
   1833        1.1  jonathan 	else	/* otherwise ... */
   1834        1.1  jonathan #endif /* DEVICE_POLLING */
   1835        1.1  jonathan 	/*
   1836        1.1  jonathan 	 * Enable interrupts.
   1837        1.1  jonathan 	 */
   1838   1.20.2.2      yamt 	if (sc->re_testmode)
   1839        1.1  jonathan 		CSR_WRITE_2(sc, RTK_IMR, 0);
   1840        1.1  jonathan 	else
   1841        1.1  jonathan 		CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
   1842        1.1  jonathan 
   1843        1.1  jonathan 	/* Start RX/TX process. */
   1844        1.1  jonathan 	CSR_WRITE_4(sc, RTK_MISSEDPKT, 0);
   1845        1.1  jonathan #ifdef notdef
   1846        1.1  jonathan 	/* Enable receiver and transmitter. */
   1847        1.4   kanaoka 	CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
   1848        1.1  jonathan #endif
   1849        1.1  jonathan 
   1850        1.1  jonathan 	/*
   1851        1.1  jonathan 	 * Initialize the timer interrupt register so that
   1852        1.1  jonathan 	 * a timer interrupt will be generated once the timer
   1853        1.1  jonathan 	 * reaches a certain number of ticks. The timer is
   1854        1.1  jonathan 	 * reloaded on each transmit. This gives us TX interrupt
   1855        1.1  jonathan 	 * moderation, which dramatically improves TX frame rate.
   1856        1.1  jonathan 	 */
   1857        1.1  jonathan 
   1858   1.20.2.4      yamt 	if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0)
   1859        1.1  jonathan 		CSR_WRITE_4(sc, RTK_TIMERINT, 0x400);
   1860   1.20.2.4      yamt 	else {
   1861   1.20.2.4      yamt 		CSR_WRITE_4(sc, RTK_TIMERINT_8169, 0x800);
   1862        1.1  jonathan 
   1863   1.20.2.4      yamt 		/*
   1864   1.20.2.4      yamt 		 * For 8169 gigE NICs, set the max allowed RX packet
   1865   1.20.2.4      yamt 		 * size so we can receive jumbo frames.
   1866   1.20.2.4      yamt 		 */
   1867        1.1  jonathan 		CSR_WRITE_2(sc, RTK_MAXRXPKTLEN, 16383);
   1868   1.20.2.4      yamt 	}
   1869        1.1  jonathan 
   1870   1.20.2.2      yamt 	if (sc->re_testmode)
   1871        1.1  jonathan 		return 0;
   1872        1.1  jonathan 
   1873   1.20.2.3      yamt 	CSR_WRITE_1(sc, RTK_CFG1, RTK_CFG1_DRVLOAD);
   1874        1.1  jonathan 
   1875        1.1  jonathan 	ifp->if_flags |= IFF_RUNNING;
   1876        1.1  jonathan 	ifp->if_flags &= ~IFF_OACTIVE;
   1877        1.1  jonathan 
   1878        1.1  jonathan 	callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
   1879        1.1  jonathan 
   1880   1.20.2.2      yamt  out:
   1881        1.1  jonathan 	if (error) {
   1882        1.4   kanaoka 		ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1883        1.1  jonathan 		ifp->if_timer = 0;
   1884        1.4   kanaoka 		aprint_error("%s: interface not running\n",
   1885        1.4   kanaoka 		    sc->sc_dev.dv_xname);
   1886        1.1  jonathan 	}
   1887       1.12     perry 
   1888        1.1  jonathan 	return error;
   1889        1.1  jonathan }
   1890        1.1  jonathan 
   1891        1.1  jonathan static int
   1892   1.20.2.4      yamt re_ioctl(struct ifnet *ifp, u_long command, void *data)
   1893        1.1  jonathan {
   1894        1.1  jonathan 	struct rtk_softc	*sc = ifp->if_softc;
   1895        1.1  jonathan 	struct ifreq		*ifr = (struct ifreq *) data;
   1896        1.1  jonathan 	int			s, error = 0;
   1897        1.1  jonathan 
   1898        1.1  jonathan 	s = splnet();
   1899        1.1  jonathan 
   1900        1.4   kanaoka 	switch (command) {
   1901        1.1  jonathan 	case SIOCSIFMTU:
   1902   1.20.2.8      yamt 		if (ifr->ifr_mtu < ETHERMIN || ifr->ifr_mtu > ETHERMTU_JUMBO)
   1903        1.1  jonathan 			error = EINVAL;
   1904   1.20.2.8      yamt 		else if ((error = ifioctl_common(ifp, command, data)) == ENETRESET)
   1905   1.20.2.8      yamt 			error = 0;
   1906        1.1  jonathan 		break;
   1907        1.1  jonathan 	default:
   1908   1.20.2.8      yamt 		if ((error = ether_ioctl(ifp, command, data)) != ENETRESET)
   1909   1.20.2.8      yamt 			break;
   1910   1.20.2.8      yamt 
   1911   1.20.2.8      yamt 		error = 0;
   1912   1.20.2.8      yamt 
   1913   1.20.2.8      yamt 		if (command == SIOCSIFCAP)
   1914   1.20.2.8      yamt 			error = (*ifp->if_init)(ifp);
   1915   1.20.2.8      yamt 		else if (command != SIOCADDMULTI && command != SIOCDELMULTI)
   1916   1.20.2.8      yamt 			;
   1917   1.20.2.8      yamt 		else if (ifp->if_flags & IFF_RUNNING)
   1918   1.20.2.8      yamt 			rtk_setmulti(sc);
   1919        1.1  jonathan 		break;
   1920        1.1  jonathan 	}
   1921        1.1  jonathan 
   1922        1.1  jonathan 	splx(s);
   1923        1.1  jonathan 
   1924        1.4   kanaoka 	return error;
   1925        1.1  jonathan }
   1926        1.1  jonathan 
   1927        1.1  jonathan static void
   1928        1.1  jonathan re_watchdog(struct ifnet *ifp)
   1929        1.1  jonathan {
   1930        1.1  jonathan 	struct rtk_softc	*sc;
   1931        1.1  jonathan 	int			s;
   1932        1.1  jonathan 
   1933        1.1  jonathan 	sc = ifp->if_softc;
   1934        1.1  jonathan 	s = splnet();
   1935        1.4   kanaoka 	aprint_error("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
   1936        1.1  jonathan 	ifp->if_oerrors++;
   1937        1.1  jonathan 
   1938        1.1  jonathan 	re_txeof(sc);
   1939        1.1  jonathan 	re_rxeof(sc);
   1940        1.1  jonathan 
   1941        1.1  jonathan 	re_init(ifp);
   1942        1.1  jonathan 
   1943        1.1  jonathan 	splx(s);
   1944        1.1  jonathan }
   1945        1.1  jonathan 
   1946        1.1  jonathan /*
   1947        1.1  jonathan  * Stop the adapter and free any mbufs allocated to the
   1948        1.1  jonathan  * RX and TX lists.
   1949        1.1  jonathan  */
   1950        1.1  jonathan static void
   1951        1.3   kanaoka re_stop(struct ifnet *ifp, int disable)
   1952        1.1  jonathan {
   1953   1.20.2.2      yamt 	int		i;
   1954        1.3   kanaoka 	struct rtk_softc *sc = ifp->if_softc;
   1955        1.1  jonathan 
   1956        1.3   kanaoka 	callout_stop(&sc->rtk_tick_ch);
   1957        1.1  jonathan 
   1958        1.1  jonathan #ifdef DEVICE_POLLING
   1959        1.1  jonathan 	ether_poll_deregister(ifp);
   1960        1.1  jonathan #endif /* DEVICE_POLLING */
   1961        1.1  jonathan 
   1962        1.3   kanaoka 	mii_down(&sc->mii);
   1963        1.3   kanaoka 
   1964        1.1  jonathan 	CSR_WRITE_1(sc, RTK_COMMAND, 0x00);
   1965        1.1  jonathan 	CSR_WRITE_2(sc, RTK_IMR, 0x0000);
   1966        1.1  jonathan 
   1967   1.20.2.2      yamt 	if (sc->re_head != NULL) {
   1968   1.20.2.2      yamt 		m_freem(sc->re_head);
   1969   1.20.2.2      yamt 		sc->re_head = sc->re_tail = NULL;
   1970        1.1  jonathan 	}
   1971        1.1  jonathan 
   1972        1.1  jonathan 	/* Free the TX list buffers. */
   1973   1.20.2.2      yamt 	for (i = 0; i < RE_TX_QLEN; i++) {
   1974   1.20.2.2      yamt 		if (sc->re_ldata.re_txq[i].txq_mbuf != NULL) {
   1975        1.1  jonathan 			bus_dmamap_unload(sc->sc_dmat,
   1976   1.20.2.2      yamt 			    sc->re_ldata.re_txq[i].txq_dmamap);
   1977   1.20.2.2      yamt 			m_freem(sc->re_ldata.re_txq[i].txq_mbuf);
   1978   1.20.2.2      yamt 			sc->re_ldata.re_txq[i].txq_mbuf = NULL;
   1979        1.1  jonathan 		}
   1980        1.1  jonathan 	}
   1981        1.1  jonathan 
   1982        1.1  jonathan 	/* Free the RX list buffers. */
   1983   1.20.2.2      yamt 	for (i = 0; i < RE_RX_DESC_CNT; i++) {
   1984   1.20.2.2      yamt 		if (sc->re_ldata.re_rxsoft[i].rxs_mbuf != NULL) {
   1985        1.1  jonathan 			bus_dmamap_unload(sc->sc_dmat,
   1986   1.20.2.2      yamt 			    sc->re_ldata.re_rxsoft[i].rxs_dmamap);
   1987   1.20.2.2      yamt 			m_freem(sc->re_ldata.re_rxsoft[i].rxs_mbuf);
   1988   1.20.2.2      yamt 			sc->re_ldata.re_rxsoft[i].rxs_mbuf = NULL;
   1989        1.1  jonathan 		}
   1990        1.1  jonathan 	}
   1991        1.1  jonathan 
   1992        1.3   kanaoka 	if (disable)
   1993        1.3   kanaoka 		re_disable(sc);
   1994        1.3   kanaoka 
   1995        1.3   kanaoka 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1996        1.4   kanaoka 	ifp->if_timer = 0;
   1997        1.1  jonathan }
   1998