rtl8169.c revision 1.62 1 1.62 christos /* $NetBSD: rtl8169.c,v 1.62 2006/11/16 01:32:52 christos Exp $ */
2 1.1 jonathan
3 1.1 jonathan /*
4 1.1 jonathan * Copyright (c) 1997, 1998-2003
5 1.1 jonathan * Bill Paul <wpaul (at) windriver.com>. All rights reserved.
6 1.1 jonathan *
7 1.1 jonathan * Redistribution and use in source and binary forms, with or without
8 1.1 jonathan * modification, are permitted provided that the following conditions
9 1.1 jonathan * are met:
10 1.1 jonathan * 1. Redistributions of source code must retain the above copyright
11 1.1 jonathan * notice, this list of conditions and the following disclaimer.
12 1.1 jonathan * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jonathan * notice, this list of conditions and the following disclaimer in the
14 1.1 jonathan * documentation and/or other materials provided with the distribution.
15 1.1 jonathan * 3. All advertising materials mentioning features or use of this software
16 1.1 jonathan * must display the following acknowledgement:
17 1.1 jonathan * This product includes software developed by Bill Paul.
18 1.1 jonathan * 4. Neither the name of the author nor the names of any co-contributors
19 1.1 jonathan * may be used to endorse or promote products derived from this software
20 1.1 jonathan * without specific prior written permission.
21 1.1 jonathan *
22 1.1 jonathan * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 1.1 jonathan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.1 jonathan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 jonathan * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 1.1 jonathan * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 1.1 jonathan * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 1.1 jonathan * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.1 jonathan * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 1.1 jonathan * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 1.1 jonathan * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 1.1 jonathan * THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 jonathan */
34 1.1 jonathan
35 1.1 jonathan #include <sys/cdefs.h>
36 1.1 jonathan /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
37 1.1 jonathan
38 1.1 jonathan /*
39 1.1 jonathan * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
40 1.1 jonathan *
41 1.1 jonathan * Written by Bill Paul <wpaul (at) windriver.com>
42 1.1 jonathan * Senior Networking Software Engineer
43 1.1 jonathan * Wind River Systems
44 1.1 jonathan */
45 1.1 jonathan
46 1.1 jonathan /*
47 1.1 jonathan * This driver is designed to support RealTek's next generation of
48 1.1 jonathan * 10/100 and 10/100/1000 PCI ethernet controllers. There are currently
49 1.1 jonathan * four devices in this family: the RTL8139C+, the RTL8169, the RTL8169S
50 1.1 jonathan * and the RTL8110S.
51 1.1 jonathan *
52 1.1 jonathan * The 8139C+ is a 10/100 ethernet chip. It is backwards compatible
53 1.1 jonathan * with the older 8139 family, however it also supports a special
54 1.1 jonathan * C+ mode of operation that provides several new performance enhancing
55 1.1 jonathan * features. These include:
56 1.1 jonathan *
57 1.1 jonathan * o Descriptor based DMA mechanism. Each descriptor represents
58 1.1 jonathan * a single packet fragment. Data buffers may be aligned on
59 1.1 jonathan * any byte boundary.
60 1.1 jonathan *
61 1.1 jonathan * o 64-bit DMA
62 1.1 jonathan *
63 1.1 jonathan * o TCP/IP checksum offload for both RX and TX
64 1.1 jonathan *
65 1.1 jonathan * o High and normal priority transmit DMA rings
66 1.1 jonathan *
67 1.1 jonathan * o VLAN tag insertion and extraction
68 1.1 jonathan *
69 1.1 jonathan * o TCP large send (segmentation offload)
70 1.1 jonathan *
71 1.1 jonathan * Like the 8139, the 8139C+ also has a built-in 10/100 PHY. The C+
72 1.1 jonathan * programming API is fairly straightforward. The RX filtering, EEPROM
73 1.1 jonathan * access and PHY access is the same as it is on the older 8139 series
74 1.1 jonathan * chips.
75 1.1 jonathan *
76 1.1 jonathan * The 8169 is a 64-bit 10/100/1000 gigabit ethernet MAC. It has almost the
77 1.1 jonathan * same programming API and feature set as the 8139C+ with the following
78 1.1 jonathan * differences and additions:
79 1.1 jonathan *
80 1.1 jonathan * o 1000Mbps mode
81 1.1 jonathan *
82 1.1 jonathan * o Jumbo frames
83 1.1 jonathan *
84 1.1 jonathan * o GMII and TBI ports/registers for interfacing with copper
85 1.1 jonathan * or fiber PHYs
86 1.1 jonathan *
87 1.1 jonathan * o RX and TX DMA rings can have up to 1024 descriptors
88 1.1 jonathan * (the 8139C+ allows a maximum of 64)
89 1.1 jonathan *
90 1.1 jonathan * o Slight differences in register layout from the 8139C+
91 1.1 jonathan *
92 1.1 jonathan * The TX start and timer interrupt registers are at different locations
93 1.1 jonathan * on the 8169 than they are on the 8139C+. Also, the status word in the
94 1.1 jonathan * RX descriptor has a slightly different bit layout. The 8169 does not
95 1.1 jonathan * have a built-in PHY. Most reference boards use a Marvell 88E1000 'Alaska'
96 1.1 jonathan * copper gigE PHY.
97 1.1 jonathan *
98 1.1 jonathan * The 8169S/8110S 10/100/1000 devices have built-in copper gigE PHYs
99 1.1 jonathan * (the 'S' stands for 'single-chip'). These devices have the same
100 1.1 jonathan * programming API as the older 8169, but also have some vendor-specific
101 1.1 jonathan * registers for the on-board PHY. The 8110S is a LAN-on-motherboard
102 1.1 jonathan * part designed to be pin-compatible with the RealTek 8100 10/100 chip.
103 1.12 perry *
104 1.1 jonathan * This driver takes advantage of the RX and TX checksum offload and
105 1.1 jonathan * VLAN tag insertion/extraction features. It also implements TX
106 1.1 jonathan * interrupt moderation using the timer interrupt registers, which
107 1.1 jonathan * significantly reduces TX interrupt load. There is also support
108 1.1 jonathan * for jumbo frames, however the 8169/8169S/8110S can not transmit
109 1.1 jonathan * jumbo frames larger than 7.5K, so the max MTU possible with this
110 1.1 jonathan * driver is 7500 bytes.
111 1.1 jonathan */
112 1.1 jonathan
113 1.1 jonathan #include "bpfilter.h"
114 1.1 jonathan #include "vlan.h"
115 1.1 jonathan
116 1.1 jonathan #include <sys/param.h>
117 1.1 jonathan #include <sys/endian.h>
118 1.1 jonathan #include <sys/systm.h>
119 1.1 jonathan #include <sys/sockio.h>
120 1.1 jonathan #include <sys/mbuf.h>
121 1.1 jonathan #include <sys/malloc.h>
122 1.1 jonathan #include <sys/kernel.h>
123 1.1 jonathan #include <sys/socket.h>
124 1.1 jonathan #include <sys/device.h>
125 1.1 jonathan
126 1.1 jonathan #include <net/if.h>
127 1.1 jonathan #include <net/if_arp.h>
128 1.1 jonathan #include <net/if_dl.h>
129 1.1 jonathan #include <net/if_ether.h>
130 1.1 jonathan #include <net/if_media.h>
131 1.1 jonathan #include <net/if_vlanvar.h>
132 1.1 jonathan
133 1.13 yamt #include <netinet/in_systm.h> /* XXX for IP_MAXPACKET */
134 1.13 yamt #include <netinet/in.h> /* XXX for IP_MAXPACKET */
135 1.13 yamt #include <netinet/ip.h> /* XXX for IP_MAXPACKET */
136 1.13 yamt
137 1.1 jonathan #if NBPFILTER > 0
138 1.1 jonathan #include <net/bpf.h>
139 1.1 jonathan #endif
140 1.1 jonathan
141 1.1 jonathan #include <machine/bus.h>
142 1.1 jonathan
143 1.1 jonathan #include <dev/mii/mii.h>
144 1.1 jonathan #include <dev/mii/miivar.h>
145 1.1 jonathan
146 1.1 jonathan #include <dev/pci/pcireg.h>
147 1.1 jonathan #include <dev/pci/pcivar.h>
148 1.1 jonathan #include <dev/pci/pcidevs.h>
149 1.1 jonathan
150 1.1 jonathan #include <dev/ic/rtl81x9reg.h>
151 1.1 jonathan #include <dev/ic/rtl81x9var.h>
152 1.1 jonathan
153 1.1 jonathan #include <dev/ic/rtl8169var.h>
154 1.1 jonathan
155 1.1 jonathan
156 1.4 kanaoka static int re_newbuf(struct rtk_softc *, int, struct mbuf *);
157 1.4 kanaoka static int re_rx_list_init(struct rtk_softc *);
158 1.4 kanaoka static int re_tx_list_init(struct rtk_softc *);
159 1.4 kanaoka static void re_rxeof(struct rtk_softc *);
160 1.4 kanaoka static void re_txeof(struct rtk_softc *);
161 1.4 kanaoka static void re_tick(void *);
162 1.4 kanaoka static void re_start(struct ifnet *);
163 1.4 kanaoka static int re_ioctl(struct ifnet *, u_long, caddr_t);
164 1.4 kanaoka static int re_init(struct ifnet *);
165 1.4 kanaoka static void re_stop(struct ifnet *, int);
166 1.4 kanaoka static void re_watchdog(struct ifnet *);
167 1.4 kanaoka
168 1.4 kanaoka static void re_shutdown(void *);
169 1.4 kanaoka static int re_enable(struct rtk_softc *);
170 1.4 kanaoka static void re_disable(struct rtk_softc *);
171 1.4 kanaoka static void re_power(int, void *);
172 1.4 kanaoka
173 1.4 kanaoka static int re_ifmedia_upd(struct ifnet *);
174 1.4 kanaoka static void re_ifmedia_sts(struct ifnet *, struct ifmediareq *);
175 1.4 kanaoka
176 1.4 kanaoka static int re_gmii_readreg(struct device *, int, int);
177 1.4 kanaoka static void re_gmii_writereg(struct device *, int, int, int);
178 1.4 kanaoka
179 1.4 kanaoka static int re_miibus_readreg(struct device *, int, int);
180 1.4 kanaoka static void re_miibus_writereg(struct device *, int, int, int);
181 1.4 kanaoka static void re_miibus_statchg(struct device *);
182 1.1 jonathan
183 1.4 kanaoka static void re_reset(struct rtk_softc *);
184 1.1 jonathan
185 1.1 jonathan static int
186 1.1 jonathan re_gmii_readreg(struct device *self, int phy, int reg)
187 1.1 jonathan {
188 1.1 jonathan struct rtk_softc *sc = (void *)self;
189 1.40 tsutsui uint32_t rval;
190 1.1 jonathan int i;
191 1.1 jonathan
192 1.1 jonathan if (phy != 7)
193 1.4 kanaoka return 0;
194 1.1 jonathan
195 1.1 jonathan /* Let the rgephy driver read the GMEDIASTAT register */
196 1.1 jonathan
197 1.1 jonathan if (reg == RTK_GMEDIASTAT) {
198 1.1 jonathan rval = CSR_READ_1(sc, RTK_GMEDIASTAT);
199 1.4 kanaoka return rval;
200 1.1 jonathan }
201 1.1 jonathan
202 1.1 jonathan CSR_WRITE_4(sc, RTK_PHYAR, reg << 16);
203 1.1 jonathan DELAY(1000);
204 1.1 jonathan
205 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
206 1.1 jonathan rval = CSR_READ_4(sc, RTK_PHYAR);
207 1.1 jonathan if (rval & RTK_PHYAR_BUSY)
208 1.1 jonathan break;
209 1.1 jonathan DELAY(100);
210 1.1 jonathan }
211 1.1 jonathan
212 1.1 jonathan if (i == RTK_TIMEOUT) {
213 1.4 kanaoka aprint_error("%s: PHY read failed\n", sc->sc_dev.dv_xname);
214 1.4 kanaoka return 0;
215 1.1 jonathan }
216 1.1 jonathan
217 1.4 kanaoka return rval & RTK_PHYAR_PHYDATA;
218 1.1 jonathan }
219 1.1 jonathan
220 1.1 jonathan static void
221 1.62 christos re_gmii_writereg(struct device *dev, int phy, int reg, int data)
222 1.1 jonathan {
223 1.1 jonathan struct rtk_softc *sc = (void *)dev;
224 1.40 tsutsui uint32_t rval;
225 1.1 jonathan int i;
226 1.1 jonathan
227 1.1 jonathan CSR_WRITE_4(sc, RTK_PHYAR, (reg << 16) |
228 1.1 jonathan (data & RTK_PHYAR_PHYDATA) | RTK_PHYAR_BUSY);
229 1.1 jonathan DELAY(1000);
230 1.1 jonathan
231 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
232 1.1 jonathan rval = CSR_READ_4(sc, RTK_PHYAR);
233 1.1 jonathan if (!(rval & RTK_PHYAR_BUSY))
234 1.1 jonathan break;
235 1.1 jonathan DELAY(100);
236 1.1 jonathan }
237 1.1 jonathan
238 1.1 jonathan if (i == RTK_TIMEOUT) {
239 1.4 kanaoka aprint_error("%s: PHY write reg %x <- %x failed\n",
240 1.4 kanaoka sc->sc_dev.dv_xname, reg, data);
241 1.1 jonathan }
242 1.1 jonathan }
243 1.1 jonathan
244 1.1 jonathan static int
245 1.1 jonathan re_miibus_readreg(struct device *dev, int phy, int reg)
246 1.1 jonathan {
247 1.1 jonathan struct rtk_softc *sc = (void *)dev;
248 1.40 tsutsui uint16_t rval = 0;
249 1.40 tsutsui uint16_t re8139_reg = 0;
250 1.1 jonathan int s;
251 1.1 jonathan
252 1.1 jonathan s = splnet();
253 1.1 jonathan
254 1.1 jonathan if (sc->rtk_type == RTK_8169) {
255 1.1 jonathan rval = re_gmii_readreg(dev, phy, reg);
256 1.1 jonathan splx(s);
257 1.4 kanaoka return rval;
258 1.1 jonathan }
259 1.1 jonathan
260 1.1 jonathan /* Pretend the internal PHY is only at address 0 */
261 1.1 jonathan if (phy) {
262 1.1 jonathan splx(s);
263 1.4 kanaoka return 0;
264 1.1 jonathan }
265 1.4 kanaoka switch (reg) {
266 1.1 jonathan case MII_BMCR:
267 1.1 jonathan re8139_reg = RTK_BMCR;
268 1.1 jonathan break;
269 1.1 jonathan case MII_BMSR:
270 1.1 jonathan re8139_reg = RTK_BMSR;
271 1.1 jonathan break;
272 1.1 jonathan case MII_ANAR:
273 1.1 jonathan re8139_reg = RTK_ANAR;
274 1.1 jonathan break;
275 1.1 jonathan case MII_ANER:
276 1.1 jonathan re8139_reg = RTK_ANER;
277 1.1 jonathan break;
278 1.1 jonathan case MII_ANLPAR:
279 1.1 jonathan re8139_reg = RTK_LPAR;
280 1.1 jonathan break;
281 1.1 jonathan case MII_PHYIDR1:
282 1.1 jonathan case MII_PHYIDR2:
283 1.1 jonathan splx(s);
284 1.4 kanaoka return 0;
285 1.1 jonathan /*
286 1.1 jonathan * Allow the rlphy driver to read the media status
287 1.1 jonathan * register. If we have a link partner which does not
288 1.1 jonathan * support NWAY, this is the register which will tell
289 1.1 jonathan * us the results of parallel detection.
290 1.1 jonathan */
291 1.1 jonathan case RTK_MEDIASTAT:
292 1.1 jonathan rval = CSR_READ_1(sc, RTK_MEDIASTAT);
293 1.1 jonathan splx(s);
294 1.4 kanaoka return rval;
295 1.1 jonathan default:
296 1.4 kanaoka aprint_error("%s: bad phy register\n", sc->sc_dev.dv_xname);
297 1.1 jonathan splx(s);
298 1.4 kanaoka return 0;
299 1.1 jonathan }
300 1.1 jonathan rval = CSR_READ_2(sc, re8139_reg);
301 1.51 tsutsui if (sc->rtk_type == RTK_8139CPLUS && re8139_reg == RTK_BMCR) {
302 1.51 tsutsui /* 8139C+ has different bit layout. */
303 1.51 tsutsui rval &= ~(BMCR_LOOP | BMCR_ISO);
304 1.51 tsutsui }
305 1.1 jonathan splx(s);
306 1.4 kanaoka return rval;
307 1.1 jonathan }
308 1.1 jonathan
309 1.1 jonathan static void
310 1.1 jonathan re_miibus_writereg(struct device *dev, int phy, int reg, int data)
311 1.1 jonathan {
312 1.1 jonathan struct rtk_softc *sc = (void *)dev;
313 1.40 tsutsui uint16_t re8139_reg = 0;
314 1.1 jonathan int s;
315 1.1 jonathan
316 1.1 jonathan s = splnet();
317 1.1 jonathan
318 1.1 jonathan if (sc->rtk_type == RTK_8169) {
319 1.1 jonathan re_gmii_writereg(dev, phy, reg, data);
320 1.1 jonathan splx(s);
321 1.1 jonathan return;
322 1.1 jonathan }
323 1.1 jonathan
324 1.1 jonathan /* Pretend the internal PHY is only at address 0 */
325 1.1 jonathan if (phy) {
326 1.1 jonathan splx(s);
327 1.1 jonathan return;
328 1.1 jonathan }
329 1.4 kanaoka switch (reg) {
330 1.1 jonathan case MII_BMCR:
331 1.1 jonathan re8139_reg = RTK_BMCR;
332 1.51 tsutsui if (sc->rtk_type == RTK_8139CPLUS) {
333 1.51 tsutsui /* 8139C+ has different bit layout. */
334 1.51 tsutsui data &= ~(BMCR_LOOP | BMCR_ISO);
335 1.51 tsutsui }
336 1.1 jonathan break;
337 1.1 jonathan case MII_BMSR:
338 1.1 jonathan re8139_reg = RTK_BMSR;
339 1.1 jonathan break;
340 1.1 jonathan case MII_ANAR:
341 1.1 jonathan re8139_reg = RTK_ANAR;
342 1.1 jonathan break;
343 1.1 jonathan case MII_ANER:
344 1.1 jonathan re8139_reg = RTK_ANER;
345 1.1 jonathan break;
346 1.1 jonathan case MII_ANLPAR:
347 1.1 jonathan re8139_reg = RTK_LPAR;
348 1.1 jonathan break;
349 1.1 jonathan case MII_PHYIDR1:
350 1.1 jonathan case MII_PHYIDR2:
351 1.1 jonathan splx(s);
352 1.1 jonathan return;
353 1.1 jonathan break;
354 1.1 jonathan default:
355 1.4 kanaoka aprint_error("%s: bad phy register\n", sc->sc_dev.dv_xname);
356 1.1 jonathan splx(s);
357 1.1 jonathan return;
358 1.1 jonathan }
359 1.1 jonathan CSR_WRITE_2(sc, re8139_reg, data);
360 1.1 jonathan splx(s);
361 1.1 jonathan return;
362 1.1 jonathan }
363 1.1 jonathan
364 1.1 jonathan static void
365 1.62 christos re_miibus_statchg(struct device *dev)
366 1.1 jonathan {
367 1.1 jonathan
368 1.1 jonathan return;
369 1.1 jonathan }
370 1.1 jonathan
371 1.1 jonathan static void
372 1.1 jonathan re_reset(struct rtk_softc *sc)
373 1.1 jonathan {
374 1.41 tsutsui int i;
375 1.1 jonathan
376 1.1 jonathan CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_RESET);
377 1.1 jonathan
378 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
379 1.1 jonathan DELAY(10);
380 1.41 tsutsui if ((CSR_READ_1(sc, RTK_COMMAND) & RTK_CMD_RESET) == 0)
381 1.1 jonathan break;
382 1.1 jonathan }
383 1.1 jonathan if (i == RTK_TIMEOUT)
384 1.4 kanaoka aprint_error("%s: reset never completed!\n",
385 1.4 kanaoka sc->sc_dev.dv_xname);
386 1.1 jonathan
387 1.1 jonathan /*
388 1.1 jonathan * NB: Realtek-supplied Linux driver does this only for
389 1.1 jonathan * MCFG_METHOD_2, which corresponds to sc->sc_rev == 2.
390 1.1 jonathan */
391 1.4 kanaoka if (1) /* XXX check softc flag for 8169s version */
392 1.4 kanaoka CSR_WRITE_1(sc, 0x82, 1);
393 1.1 jonathan
394 1.1 jonathan return;
395 1.1 jonathan }
396 1.1 jonathan
397 1.1 jonathan /*
398 1.1 jonathan * The following routine is designed to test for a defect on some
399 1.1 jonathan * 32-bit 8169 cards. Some of these NICs have the REQ64# and ACK64#
400 1.1 jonathan * lines connected to the bus, however for a 32-bit only card, they
401 1.1 jonathan * should be pulled high. The result of this defect is that the
402 1.1 jonathan * NIC will not work right if you plug it into a 64-bit slot: DMA
403 1.1 jonathan * operations will be done with 64-bit transfers, which will fail
404 1.1 jonathan * because the 64-bit data lines aren't connected.
405 1.1 jonathan *
406 1.1 jonathan * There's no way to work around this (short of talking a soldering
407 1.1 jonathan * iron to the board), however we can detect it. The method we use
408 1.1 jonathan * here is to put the NIC into digital loopback mode, set the receiver
409 1.1 jonathan * to promiscuous mode, and then try to send a frame. We then compare
410 1.1 jonathan * the frame data we sent to what was received. If the data matches,
411 1.1 jonathan * then the NIC is working correctly, otherwise we know the user has
412 1.1 jonathan * a defective NIC which has been mistakenly plugged into a 64-bit PCI
413 1.1 jonathan * slot. In the latter case, there's no way the NIC can work correctly,
414 1.1 jonathan * so we print out a message on the console and abort the device attach.
415 1.1 jonathan */
416 1.1 jonathan
417 1.6 kanaoka int
418 1.1 jonathan re_diag(struct rtk_softc *sc)
419 1.1 jonathan {
420 1.1 jonathan struct ifnet *ifp = &sc->ethercom.ec_if;
421 1.1 jonathan struct mbuf *m0;
422 1.1 jonathan struct ether_header *eh;
423 1.52 tsutsui struct re_rxsoft *rxs;
424 1.52 tsutsui struct re_desc *cur_rx;
425 1.1 jonathan bus_dmamap_t dmamap;
426 1.40 tsutsui uint16_t status;
427 1.40 tsutsui uint32_t rxstat;
428 1.1 jonathan int total_len, i, s, error = 0;
429 1.40 tsutsui static const uint8_t dst[] = { 0x00, 'h', 'e', 'l', 'l', 'o' };
430 1.40 tsutsui static const uint8_t src[] = { 0x00, 'w', 'o', 'r', 'l', 'd' };
431 1.1 jonathan
432 1.1 jonathan /* Allocate a single mbuf */
433 1.1 jonathan
434 1.1 jonathan MGETHDR(m0, M_DONTWAIT, MT_DATA);
435 1.1 jonathan if (m0 == NULL)
436 1.4 kanaoka return ENOBUFS;
437 1.1 jonathan
438 1.1 jonathan /*
439 1.1 jonathan * Initialize the NIC in test mode. This sets the chip up
440 1.1 jonathan * so that it can send and receive frames, but performs the
441 1.1 jonathan * following special functions:
442 1.1 jonathan * - Puts receiver in promiscuous mode
443 1.1 jonathan * - Enables digital loopback mode
444 1.1 jonathan * - Leaves interrupts turned off
445 1.1 jonathan */
446 1.1 jonathan
447 1.1 jonathan ifp->if_flags |= IFF_PROMISC;
448 1.52 tsutsui sc->re_testmode = 1;
449 1.1 jonathan re_init(ifp);
450 1.6 kanaoka re_stop(ifp, 0);
451 1.1 jonathan DELAY(100000);
452 1.1 jonathan re_init(ifp);
453 1.1 jonathan
454 1.1 jonathan /* Put some data in the mbuf */
455 1.1 jonathan
456 1.1 jonathan eh = mtod(m0, struct ether_header *);
457 1.36 tsutsui memcpy(eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN);
458 1.36 tsutsui memcpy(eh->ether_shost, (char *)&src, ETHER_ADDR_LEN);
459 1.1 jonathan eh->ether_type = htons(ETHERTYPE_IP);
460 1.1 jonathan m0->m_pkthdr.len = m0->m_len = ETHER_MIN_LEN - ETHER_CRC_LEN;
461 1.1 jonathan
462 1.1 jonathan /*
463 1.1 jonathan * Queue the packet, start transmission.
464 1.1 jonathan */
465 1.1 jonathan
466 1.1 jonathan CSR_WRITE_2(sc, RTK_ISR, 0xFFFF);
467 1.1 jonathan s = splnet();
468 1.1 jonathan IF_ENQUEUE(&ifp->if_snd, m0);
469 1.1 jonathan re_start(ifp);
470 1.1 jonathan splx(s);
471 1.1 jonathan m0 = NULL;
472 1.1 jonathan
473 1.1 jonathan /* Wait for it to propagate through the chip */
474 1.1 jonathan
475 1.1 jonathan DELAY(100000);
476 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
477 1.1 jonathan status = CSR_READ_2(sc, RTK_ISR);
478 1.4 kanaoka if ((status & (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_RX_OK)) ==
479 1.4 kanaoka (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_RX_OK))
480 1.1 jonathan break;
481 1.1 jonathan DELAY(10);
482 1.1 jonathan }
483 1.1 jonathan if (i == RTK_TIMEOUT) {
484 1.4 kanaoka aprint_error("%s: diagnostic failed, failed to receive packet "
485 1.1 jonathan "in loopback mode\n", sc->sc_dev.dv_xname);
486 1.1 jonathan error = EIO;
487 1.1 jonathan goto done;
488 1.1 jonathan }
489 1.1 jonathan
490 1.1 jonathan /*
491 1.1 jonathan * The packet should have been dumped into the first
492 1.1 jonathan * entry in the RX DMA ring. Grab it from there.
493 1.1 jonathan */
494 1.1 jonathan
495 1.52 tsutsui rxs = &sc->re_ldata.re_rxsoft[0];
496 1.50 tsutsui dmamap = rxs->rxs_dmamap;
497 1.1 jonathan bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
498 1.20 briggs BUS_DMASYNC_POSTREAD);
499 1.50 tsutsui bus_dmamap_unload(sc->sc_dmat, dmamap);
500 1.1 jonathan
501 1.50 tsutsui m0 = rxs->rxs_mbuf;
502 1.50 tsutsui rxs->rxs_mbuf = NULL;
503 1.1 jonathan eh = mtod(m0, struct ether_header *);
504 1.1 jonathan
505 1.52 tsutsui RE_RXDESCSYNC(sc, 0, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
506 1.52 tsutsui cur_rx = &sc->re_ldata.re_rx_list[0];
507 1.52 tsutsui rxstat = le32toh(cur_rx->re_cmdstat);
508 1.52 tsutsui total_len = rxstat & sc->re_rxlenmask;
509 1.1 jonathan
510 1.1 jonathan if (total_len != ETHER_MIN_LEN) {
511 1.4 kanaoka aprint_error("%s: diagnostic failed, received short packet\n",
512 1.1 jonathan sc->sc_dev.dv_xname);
513 1.1 jonathan error = EIO;
514 1.1 jonathan goto done;
515 1.1 jonathan }
516 1.1 jonathan
517 1.1 jonathan /* Test that the received packet data matches what we sent. */
518 1.1 jonathan
519 1.36 tsutsui if (memcmp((char *)&eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN) ||
520 1.36 tsutsui memcmp((char *)&eh->ether_shost, (char *)&src, ETHER_ADDR_LEN) ||
521 1.1 jonathan ntohs(eh->ether_type) != ETHERTYPE_IP) {
522 1.4 kanaoka aprint_error("%s: WARNING, DMA FAILURE!\n",
523 1.4 kanaoka sc->sc_dev.dv_xname);
524 1.4 kanaoka aprint_error("%s: expected TX data: %s",
525 1.1 jonathan sc->sc_dev.dv_xname, ether_sprintf(dst));
526 1.4 kanaoka aprint_error("/%s/0x%x\n", ether_sprintf(src), ETHERTYPE_IP);
527 1.4 kanaoka aprint_error("%s: received RX data: %s",
528 1.1 jonathan sc->sc_dev.dv_xname,
529 1.1 jonathan ether_sprintf(eh->ether_dhost));
530 1.4 kanaoka aprint_error("/%s/0x%x\n", ether_sprintf(eh->ether_shost),
531 1.1 jonathan ntohs(eh->ether_type));
532 1.4 kanaoka aprint_error("%s: You may have a defective 32-bit NIC plugged "
533 1.1 jonathan "into a 64-bit PCI slot.\n", sc->sc_dev.dv_xname);
534 1.4 kanaoka aprint_error("%s: Please re-install the NIC in a 32-bit slot "
535 1.1 jonathan "for proper operation.\n", sc->sc_dev.dv_xname);
536 1.4 kanaoka aprint_error("%s: Read the re(4) man page for more details.\n",
537 1.1 jonathan sc->sc_dev.dv_xname);
538 1.1 jonathan error = EIO;
539 1.1 jonathan }
540 1.1 jonathan
541 1.41 tsutsui done:
542 1.1 jonathan /* Turn interface off, release resources */
543 1.1 jonathan
544 1.52 tsutsui sc->re_testmode = 0;
545 1.1 jonathan ifp->if_flags &= ~IFF_PROMISC;
546 1.6 kanaoka re_stop(ifp, 0);
547 1.1 jonathan if (m0 != NULL)
548 1.1 jonathan m_freem(m0);
549 1.1 jonathan
550 1.4 kanaoka return error;
551 1.1 jonathan }
552 1.1 jonathan
553 1.1 jonathan
554 1.1 jonathan /*
555 1.1 jonathan * Attach the interface. Allocate softc structures, do ifmedia
556 1.1 jonathan * setup and ethernet/BPF attach.
557 1.1 jonathan */
558 1.1 jonathan void
559 1.1 jonathan re_attach(struct rtk_softc *sc)
560 1.1 jonathan {
561 1.1 jonathan u_char eaddr[ETHER_ADDR_LEN];
562 1.40 tsutsui uint16_t val;
563 1.1 jonathan struct ifnet *ifp;
564 1.1 jonathan int error = 0, i, addr_len;
565 1.1 jonathan
566 1.5 kanaoka
567 1.1 jonathan /* XXX JRS: bus-attach-independent code begins approximately here */
568 1.1 jonathan
569 1.1 jonathan /* Reset the adapter. */
570 1.1 jonathan re_reset(sc);
571 1.1 jonathan
572 1.1 jonathan if (sc->rtk_type == RTK_8169) {
573 1.1 jonathan uint32_t hwrev;
574 1.1 jonathan
575 1.1 jonathan /* Revision of 8169/8169S/8110s in bits 30..26, 23 */
576 1.1 jonathan hwrev = CSR_READ_4(sc, RTK_TXCFG) & 0x7c800000;
577 1.1 jonathan if (hwrev == (0x1 << 28)) {
578 1.1 jonathan sc->sc_rev = 4;
579 1.1 jonathan } else if (hwrev == (0x1 << 26)) {
580 1.1 jonathan sc->sc_rev = 3;
581 1.1 jonathan } else if (hwrev == (0x1 << 23)) {
582 1.1 jonathan sc->sc_rev = 2;
583 1.1 jonathan } else
584 1.1 jonathan sc->sc_rev = 1;
585 1.1 jonathan
586 1.1 jonathan /* Set RX length mask */
587 1.1 jonathan
588 1.52 tsutsui sc->re_rxlenmask = RE_RDESC_STAT_GFRAGLEN;
589 1.1 jonathan
590 1.1 jonathan /* Force station address autoload from the EEPROM */
591 1.1 jonathan
592 1.1 jonathan CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_AUTOLOAD);
593 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
594 1.41 tsutsui if ((CSR_READ_1(sc, RTK_EECMD) & RTK_EEMODE_AUTOLOAD)
595 1.41 tsutsui == 0)
596 1.1 jonathan break;
597 1.1 jonathan DELAY(100);
598 1.1 jonathan }
599 1.1 jonathan if (i == RTK_TIMEOUT)
600 1.4 kanaoka aprint_error("%s: eeprom autoload timed out\n",
601 1.4 kanaoka sc->sc_dev.dv_xname);
602 1.1 jonathan
603 1.4 kanaoka for (i = 0; i < ETHER_ADDR_LEN; i++)
604 1.4 kanaoka eaddr[i] = CSR_READ_1(sc, RTK_IDR0 + i);
605 1.15 yamt
606 1.52 tsutsui sc->re_ldata.re_tx_desc_cnt = RE_TX_DESC_CNT_8169;
607 1.1 jonathan } else {
608 1.1 jonathan
609 1.1 jonathan /* Set RX length mask */
610 1.1 jonathan
611 1.52 tsutsui sc->re_rxlenmask = RE_RDESC_STAT_FRAGLEN;
612 1.1 jonathan
613 1.1 jonathan if (rtk_read_eeprom(sc, RTK_EE_ID, RTK_EEADDR_LEN1) == 0x8129)
614 1.1 jonathan addr_len = RTK_EEADDR_LEN1;
615 1.1 jonathan else
616 1.1 jonathan addr_len = RTK_EEADDR_LEN0;
617 1.1 jonathan
618 1.1 jonathan /*
619 1.1 jonathan * Get station address from the EEPROM.
620 1.1 jonathan */
621 1.1 jonathan for (i = 0; i < 3; i++) {
622 1.1 jonathan val = rtk_read_eeprom(sc, RTK_EE_EADDR0 + i, addr_len);
623 1.1 jonathan eaddr[(i * 2) + 0] = val & 0xff;
624 1.1 jonathan eaddr[(i * 2) + 1] = val >> 8;
625 1.1 jonathan }
626 1.15 yamt
627 1.52 tsutsui sc->re_ldata.re_tx_desc_cnt = RE_TX_DESC_CNT_8139;
628 1.1 jonathan }
629 1.1 jonathan
630 1.1 jonathan aprint_normal("%s: Ethernet address %s\n",
631 1.1 jonathan sc->sc_dev.dv_xname, ether_sprintf(eaddr));
632 1.1 jonathan
633 1.52 tsutsui if (sc->re_ldata.re_tx_desc_cnt >
634 1.52 tsutsui PAGE_SIZE / sizeof(struct re_desc)) {
635 1.52 tsutsui sc->re_ldata.re_tx_desc_cnt =
636 1.52 tsutsui PAGE_SIZE / sizeof(struct re_desc);
637 1.15 yamt }
638 1.15 yamt
639 1.15 yamt aprint_verbose("%s: using %d tx descriptors\n",
640 1.52 tsutsui sc->sc_dev.dv_xname, sc->re_ldata.re_tx_desc_cnt);
641 1.1 jonathan
642 1.5 kanaoka /* Allocate DMA'able memory for the TX ring */
643 1.52 tsutsui if ((error = bus_dmamem_alloc(sc->sc_dmat, RE_TX_LIST_SZ(sc),
644 1.52 tsutsui RE_RING_ALIGN, 0, &sc->re_ldata.re_tx_listseg, 1,
645 1.52 tsutsui &sc->re_ldata.re_tx_listnseg, BUS_DMA_NOWAIT)) != 0) {
646 1.5 kanaoka aprint_error("%s: can't allocate tx listseg, error = %d\n",
647 1.5 kanaoka sc->sc_dev.dv_xname, error);
648 1.5 kanaoka goto fail_0;
649 1.5 kanaoka }
650 1.5 kanaoka
651 1.5 kanaoka /* Load the map for the TX ring. */
652 1.52 tsutsui if ((error = bus_dmamem_map(sc->sc_dmat, &sc->re_ldata.re_tx_listseg,
653 1.52 tsutsui sc->re_ldata.re_tx_listnseg, RE_TX_LIST_SZ(sc),
654 1.52 tsutsui (caddr_t *)&sc->re_ldata.re_tx_list,
655 1.41 tsutsui BUS_DMA_COHERENT | BUS_DMA_NOWAIT)) != 0) {
656 1.5 kanaoka aprint_error("%s: can't map tx list, error = %d\n",
657 1.5 kanaoka sc->sc_dev.dv_xname, error);
658 1.5 kanaoka goto fail_1;
659 1.5 kanaoka }
660 1.52 tsutsui memset(sc->re_ldata.re_tx_list, 0, RE_TX_LIST_SZ(sc));
661 1.5 kanaoka
662 1.52 tsutsui if ((error = bus_dmamap_create(sc->sc_dmat, RE_TX_LIST_SZ(sc), 1,
663 1.52 tsutsui RE_TX_LIST_SZ(sc), 0, 0,
664 1.52 tsutsui &sc->re_ldata.re_tx_list_map)) != 0) {
665 1.5 kanaoka aprint_error("%s: can't create tx list map, error = %d\n",
666 1.5 kanaoka sc->sc_dev.dv_xname, error);
667 1.5 kanaoka goto fail_2;
668 1.5 kanaoka }
669 1.5 kanaoka
670 1.5 kanaoka
671 1.12 perry if ((error = bus_dmamap_load(sc->sc_dmat,
672 1.52 tsutsui sc->re_ldata.re_tx_list_map, sc->re_ldata.re_tx_list,
673 1.52 tsutsui RE_TX_LIST_SZ(sc), NULL, BUS_DMA_NOWAIT)) != 0) {
674 1.5 kanaoka aprint_error("%s: can't load tx list, error = %d\n",
675 1.5 kanaoka sc->sc_dev.dv_xname, error);
676 1.5 kanaoka goto fail_3;
677 1.5 kanaoka }
678 1.5 kanaoka
679 1.5 kanaoka /* Create DMA maps for TX buffers */
680 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++) {
681 1.13 yamt error = bus_dmamap_create(sc->sc_dmat,
682 1.13 yamt round_page(IP_MAXPACKET),
683 1.59 tsutsui RE_TX_DESC_CNT(sc) - RE_NTXDESC_RSVD, RE_TDESC_CMD_FRAGLEN,
684 1.59 tsutsui 0, 0, &sc->re_ldata.re_txq[i].txq_dmamap);
685 1.5 kanaoka if (error) {
686 1.5 kanaoka aprint_error("%s: can't create DMA map for TX\n",
687 1.5 kanaoka sc->sc_dev.dv_xname);
688 1.5 kanaoka goto fail_4;
689 1.5 kanaoka }
690 1.5 kanaoka }
691 1.5 kanaoka
692 1.5 kanaoka /* Allocate DMA'able memory for the RX ring */
693 1.52 tsutsui if ((error = bus_dmamem_alloc(sc->sc_dmat, RE_RX_LIST_SZ,
694 1.52 tsutsui RE_RING_ALIGN, 0, &sc->re_ldata.re_rx_listseg, 1,
695 1.52 tsutsui &sc->re_ldata.re_rx_listnseg, BUS_DMA_NOWAIT)) != 0) {
696 1.5 kanaoka aprint_error("%s: can't allocate rx listseg, error = %d\n",
697 1.5 kanaoka sc->sc_dev.dv_xname, error);
698 1.5 kanaoka goto fail_4;
699 1.5 kanaoka }
700 1.5 kanaoka
701 1.5 kanaoka /* Load the map for the RX ring. */
702 1.52 tsutsui if ((error = bus_dmamem_map(sc->sc_dmat, &sc->re_ldata.re_rx_listseg,
703 1.52 tsutsui sc->re_ldata.re_rx_listnseg, RE_RX_LIST_SZ,
704 1.52 tsutsui (caddr_t *)&sc->re_ldata.re_rx_list,
705 1.41 tsutsui BUS_DMA_COHERENT | BUS_DMA_NOWAIT)) != 0) {
706 1.5 kanaoka aprint_error("%s: can't map rx list, error = %d\n",
707 1.5 kanaoka sc->sc_dev.dv_xname, error);
708 1.5 kanaoka goto fail_5;
709 1.5 kanaoka }
710 1.52 tsutsui memset(sc->re_ldata.re_rx_list, 0, RE_RX_LIST_SZ);
711 1.5 kanaoka
712 1.52 tsutsui if ((error = bus_dmamap_create(sc->sc_dmat, RE_RX_LIST_SZ, 1,
713 1.52 tsutsui RE_RX_LIST_SZ, 0, 0,
714 1.52 tsutsui &sc->re_ldata.re_rx_list_map)) != 0) {
715 1.5 kanaoka aprint_error("%s: can't create rx list map, error = %d\n",
716 1.5 kanaoka sc->sc_dev.dv_xname, error);
717 1.5 kanaoka goto fail_6;
718 1.5 kanaoka }
719 1.5 kanaoka
720 1.5 kanaoka if ((error = bus_dmamap_load(sc->sc_dmat,
721 1.52 tsutsui sc->re_ldata.re_rx_list_map, sc->re_ldata.re_rx_list,
722 1.52 tsutsui RE_RX_LIST_SZ, NULL, BUS_DMA_NOWAIT)) != 0) {
723 1.5 kanaoka aprint_error("%s: can't load rx list, error = %d\n",
724 1.5 kanaoka sc->sc_dev.dv_xname, error);
725 1.5 kanaoka goto fail_7;
726 1.5 kanaoka }
727 1.5 kanaoka
728 1.5 kanaoka /* Create DMA maps for RX buffers */
729 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++) {
730 1.5 kanaoka error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
731 1.52 tsutsui 0, 0, &sc->re_ldata.re_rxsoft[i].rxs_dmamap);
732 1.5 kanaoka if (error) {
733 1.5 kanaoka aprint_error("%s: can't create DMA map for RX\n",
734 1.5 kanaoka sc->sc_dev.dv_xname);
735 1.5 kanaoka goto fail_8;
736 1.5 kanaoka }
737 1.1 jonathan }
738 1.1 jonathan
739 1.6 kanaoka /*
740 1.6 kanaoka * Record interface as attached. From here, we should not fail.
741 1.6 kanaoka */
742 1.6 kanaoka sc->sc_flags |= RTK_ATTACHED;
743 1.6 kanaoka
744 1.1 jonathan ifp = &sc->ethercom.ec_if;
745 1.1 jonathan ifp->if_softc = sc;
746 1.1 jonathan strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
747 1.1 jonathan ifp->if_mtu = ETHERMTU;
748 1.1 jonathan ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
749 1.1 jonathan ifp->if_ioctl = re_ioctl;
750 1.23 pavel sc->ethercom.ec_capabilities |= ETHERCAP_VLAN_MTU;
751 1.23 pavel
752 1.24 blymn /*
753 1.23 pavel * This is a way to disable hw VLAN tagging by default
754 1.23 pavel * (RE_VLAN is undefined), as it is problematic. PR 32643
755 1.23 pavel */
756 1.23 pavel
757 1.23 pavel #ifdef RE_VLAN
758 1.23 pavel sc->ethercom.ec_capabilities |= ETHERCAP_VLAN_HWTAGGING;
759 1.23 pavel #endif
760 1.1 jonathan ifp->if_start = re_start;
761 1.3 kanaoka ifp->if_stop = re_stop;
762 1.19 yamt
763 1.19 yamt /*
764 1.19 yamt * IFCAP_CSUM_IPv4_Tx seems broken for small packets.
765 1.19 yamt */
766 1.19 yamt
767 1.1 jonathan ifp->if_capabilities |=
768 1.19 yamt /* IFCAP_CSUM_IPv4_Tx | */ IFCAP_CSUM_IPv4_Rx |
769 1.18 yamt IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
770 1.18 yamt IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
771 1.13 yamt IFCAP_TSOv4;
772 1.1 jonathan ifp->if_watchdog = re_watchdog;
773 1.1 jonathan ifp->if_init = re_init;
774 1.1 jonathan if (sc->rtk_type == RTK_8169)
775 1.1 jonathan ifp->if_baudrate = 1000000000;
776 1.1 jonathan else
777 1.1 jonathan ifp->if_baudrate = 100000000;
778 1.52 tsutsui ifp->if_snd.ifq_maxlen = RE_IFQ_MAXLEN;
779 1.1 jonathan ifp->if_capenable = ifp->if_capabilities;
780 1.1 jonathan IFQ_SET_READY(&ifp->if_snd);
781 1.1 jonathan
782 1.1 jonathan callout_init(&sc->rtk_tick_ch);
783 1.1 jonathan
784 1.1 jonathan /* Do MII setup */
785 1.1 jonathan sc->mii.mii_ifp = ifp;
786 1.1 jonathan sc->mii.mii_readreg = re_miibus_readreg;
787 1.1 jonathan sc->mii.mii_writereg = re_miibus_writereg;
788 1.1 jonathan sc->mii.mii_statchg = re_miibus_statchg;
789 1.1 jonathan ifmedia_init(&sc->mii.mii_media, IFM_IMASK, re_ifmedia_upd,
790 1.1 jonathan re_ifmedia_sts);
791 1.1 jonathan mii_attach(&sc->sc_dev, &sc->mii, 0xffffffff, MII_PHY_ANY,
792 1.1 jonathan MII_OFFSET_ANY, 0);
793 1.4 kanaoka ifmedia_set(&sc->mii.mii_media, IFM_ETHER | IFM_AUTO);
794 1.1 jonathan
795 1.1 jonathan /*
796 1.1 jonathan * Call MI attach routine.
797 1.1 jonathan */
798 1.1 jonathan if_attach(ifp);
799 1.1 jonathan ether_ifattach(ifp, eaddr);
800 1.1 jonathan
801 1.1 jonathan
802 1.1 jonathan /*
803 1.1 jonathan * Make sure the interface is shutdown during reboot.
804 1.1 jonathan */
805 1.1 jonathan sc->sc_sdhook = shutdownhook_establish(re_shutdown, sc);
806 1.1 jonathan if (sc->sc_sdhook == NULL)
807 1.4 kanaoka aprint_error("%s: WARNING: unable to establish shutdown hook\n",
808 1.1 jonathan sc->sc_dev.dv_xname);
809 1.1 jonathan /*
810 1.1 jonathan * Add a suspend hook to make sure we come back up after a
811 1.1 jonathan * resume.
812 1.1 jonathan */
813 1.26 jmcneill sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname,
814 1.26 jmcneill re_power, sc);
815 1.1 jonathan if (sc->sc_powerhook == NULL)
816 1.4 kanaoka aprint_error("%s: WARNING: unable to establish power hook\n",
817 1.1 jonathan sc->sc_dev.dv_xname);
818 1.1 jonathan
819 1.1 jonathan
820 1.5 kanaoka return;
821 1.5 kanaoka
822 1.41 tsutsui fail_8:
823 1.5 kanaoka /* Destroy DMA maps for RX buffers. */
824 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++)
825 1.52 tsutsui if (sc->re_ldata.re_rxsoft[i].rxs_dmamap != NULL)
826 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
827 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_dmamap);
828 1.5 kanaoka
829 1.5 kanaoka /* Free DMA'able memory for the RX ring. */
830 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
831 1.41 tsutsui fail_7:
832 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
833 1.41 tsutsui fail_6:
834 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
835 1.52 tsutsui (caddr_t)sc->re_ldata.re_rx_list, RE_RX_LIST_SZ);
836 1.41 tsutsui fail_5:
837 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
838 1.52 tsutsui &sc->re_ldata.re_rx_listseg, sc->re_ldata.re_rx_listnseg);
839 1.5 kanaoka
840 1.41 tsutsui fail_4:
841 1.5 kanaoka /* Destroy DMA maps for TX buffers. */
842 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++)
843 1.52 tsutsui if (sc->re_ldata.re_txq[i].txq_dmamap != NULL)
844 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
845 1.52 tsutsui sc->re_ldata.re_txq[i].txq_dmamap);
846 1.5 kanaoka
847 1.5 kanaoka /* Free DMA'able memory for the TX ring. */
848 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
849 1.41 tsutsui fail_3:
850 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
851 1.41 tsutsui fail_2:
852 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
853 1.52 tsutsui (caddr_t)sc->re_ldata.re_tx_list, RE_TX_LIST_SZ(sc));
854 1.41 tsutsui fail_1:
855 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
856 1.52 tsutsui &sc->re_ldata.re_tx_listseg, sc->re_ldata.re_tx_listnseg);
857 1.41 tsutsui fail_0:
858 1.1 jonathan return;
859 1.1 jonathan }
860 1.1 jonathan
861 1.1 jonathan
862 1.1 jonathan /*
863 1.1 jonathan * re_activate:
864 1.1 jonathan * Handle device activation/deactivation requests.
865 1.1 jonathan */
866 1.1 jonathan int
867 1.1 jonathan re_activate(struct device *self, enum devact act)
868 1.1 jonathan {
869 1.41 tsutsui struct rtk_softc *sc = (void *)self;
870 1.1 jonathan int s, error = 0;
871 1.1 jonathan
872 1.1 jonathan s = splnet();
873 1.1 jonathan switch (act) {
874 1.1 jonathan case DVACT_ACTIVATE:
875 1.1 jonathan error = EOPNOTSUPP;
876 1.1 jonathan break;
877 1.1 jonathan case DVACT_DEACTIVATE:
878 1.1 jonathan mii_activate(&sc->mii, act, MII_PHY_ANY, MII_OFFSET_ANY);
879 1.1 jonathan if_deactivate(&sc->ethercom.ec_if);
880 1.1 jonathan break;
881 1.1 jonathan }
882 1.1 jonathan splx(s);
883 1.1 jonathan
884 1.4 kanaoka return error;
885 1.1 jonathan }
886 1.1 jonathan
887 1.1 jonathan /*
888 1.1 jonathan * re_detach:
889 1.1 jonathan * Detach a rtk interface.
890 1.1 jonathan */
891 1.1 jonathan int
892 1.1 jonathan re_detach(struct rtk_softc *sc)
893 1.1 jonathan {
894 1.1 jonathan struct ifnet *ifp = &sc->ethercom.ec_if;
895 1.5 kanaoka int i;
896 1.1 jonathan
897 1.1 jonathan /*
898 1.1 jonathan * Succeed now if there isn't any work to do.
899 1.1 jonathan */
900 1.1 jonathan if ((sc->sc_flags & RTK_ATTACHED) == 0)
901 1.4 kanaoka return 0;
902 1.1 jonathan
903 1.1 jonathan /* Unhook our tick handler. */
904 1.1 jonathan callout_stop(&sc->rtk_tick_ch);
905 1.1 jonathan
906 1.1 jonathan /* Detach all PHYs. */
907 1.1 jonathan mii_detach(&sc->mii, MII_PHY_ANY, MII_OFFSET_ANY);
908 1.1 jonathan
909 1.1 jonathan /* Delete all remaining media. */
910 1.1 jonathan ifmedia_delete_instance(&sc->mii.mii_media, IFM_INST_ANY);
911 1.1 jonathan
912 1.1 jonathan ether_ifdetach(ifp);
913 1.1 jonathan if_detach(ifp);
914 1.1 jonathan
915 1.5 kanaoka /* Destroy DMA maps for RX buffers. */
916 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++)
917 1.52 tsutsui if (sc->re_ldata.re_rxsoft[i].rxs_dmamap != NULL)
918 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
919 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_dmamap);
920 1.5 kanaoka
921 1.5 kanaoka /* Free DMA'able memory for the RX ring. */
922 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
923 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
924 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
925 1.52 tsutsui (caddr_t)sc->re_ldata.re_rx_list, RE_RX_LIST_SZ);
926 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
927 1.52 tsutsui &sc->re_ldata.re_rx_listseg, sc->re_ldata.re_rx_listnseg);
928 1.5 kanaoka
929 1.5 kanaoka /* Destroy DMA maps for TX buffers. */
930 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++)
931 1.52 tsutsui if (sc->re_ldata.re_txq[i].txq_dmamap != NULL)
932 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
933 1.52 tsutsui sc->re_ldata.re_txq[i].txq_dmamap);
934 1.5 kanaoka
935 1.5 kanaoka /* Free DMA'able memory for the TX ring. */
936 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
937 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
938 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
939 1.52 tsutsui (caddr_t)sc->re_ldata.re_tx_list, RE_TX_LIST_SZ(sc));
940 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
941 1.52 tsutsui &sc->re_ldata.re_tx_listseg, sc->re_ldata.re_tx_listnseg);
942 1.5 kanaoka
943 1.12 perry
944 1.1 jonathan shutdownhook_disestablish(sc->sc_sdhook);
945 1.1 jonathan powerhook_disestablish(sc->sc_powerhook);
946 1.1 jonathan
947 1.4 kanaoka return 0;
948 1.1 jonathan }
949 1.1 jonathan
950 1.1 jonathan /*
951 1.1 jonathan * re_enable:
952 1.1 jonathan * Enable the RTL81X9 chip.
953 1.1 jonathan */
954 1.12 perry static int
955 1.1 jonathan re_enable(struct rtk_softc *sc)
956 1.1 jonathan {
957 1.41 tsutsui
958 1.1 jonathan if (RTK_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
959 1.1 jonathan if ((*sc->sc_enable)(sc) != 0) {
960 1.4 kanaoka aprint_error("%s: device enable failed\n",
961 1.1 jonathan sc->sc_dev.dv_xname);
962 1.4 kanaoka return EIO;
963 1.1 jonathan }
964 1.1 jonathan sc->sc_flags |= RTK_ENABLED;
965 1.1 jonathan }
966 1.4 kanaoka return 0;
967 1.1 jonathan }
968 1.1 jonathan
969 1.1 jonathan /*
970 1.1 jonathan * re_disable:
971 1.1 jonathan * Disable the RTL81X9 chip.
972 1.1 jonathan */
973 1.12 perry static void
974 1.1 jonathan re_disable(struct rtk_softc *sc)
975 1.1 jonathan {
976 1.1 jonathan
977 1.1 jonathan if (RTK_IS_ENABLED(sc) && sc->sc_disable != NULL) {
978 1.1 jonathan (*sc->sc_disable)(sc);
979 1.1 jonathan sc->sc_flags &= ~RTK_ENABLED;
980 1.1 jonathan }
981 1.1 jonathan }
982 1.1 jonathan
983 1.1 jonathan /*
984 1.1 jonathan * re_power:
985 1.1 jonathan * Power management (suspend/resume) hook.
986 1.1 jonathan */
987 1.12 perry void
988 1.1 jonathan re_power(int why, void *arg)
989 1.1 jonathan {
990 1.41 tsutsui struct rtk_softc *sc = (void *)arg;
991 1.1 jonathan struct ifnet *ifp = &sc->ethercom.ec_if;
992 1.1 jonathan int s;
993 1.1 jonathan
994 1.1 jonathan s = splnet();
995 1.1 jonathan switch (why) {
996 1.1 jonathan case PWR_SUSPEND:
997 1.1 jonathan case PWR_STANDBY:
998 1.3 kanaoka re_stop(ifp, 0);
999 1.1 jonathan if (sc->sc_power != NULL)
1000 1.1 jonathan (*sc->sc_power)(sc, why);
1001 1.1 jonathan break;
1002 1.1 jonathan case PWR_RESUME:
1003 1.1 jonathan if (ifp->if_flags & IFF_UP) {
1004 1.1 jonathan if (sc->sc_power != NULL)
1005 1.1 jonathan (*sc->sc_power)(sc, why);
1006 1.1 jonathan re_init(ifp);
1007 1.1 jonathan }
1008 1.1 jonathan break;
1009 1.1 jonathan case PWR_SOFTSUSPEND:
1010 1.1 jonathan case PWR_SOFTSTANDBY:
1011 1.1 jonathan case PWR_SOFTRESUME:
1012 1.1 jonathan break;
1013 1.1 jonathan }
1014 1.1 jonathan splx(s);
1015 1.1 jonathan }
1016 1.1 jonathan
1017 1.1 jonathan
1018 1.1 jonathan static int
1019 1.1 jonathan re_newbuf(struct rtk_softc *sc, int idx, struct mbuf *m)
1020 1.1 jonathan {
1021 1.1 jonathan struct mbuf *n = NULL;
1022 1.1 jonathan bus_dmamap_t map;
1023 1.52 tsutsui struct re_desc *d;
1024 1.52 tsutsui struct re_rxsoft *rxs;
1025 1.40 tsutsui uint32_t cmdstat;
1026 1.1 jonathan int error;
1027 1.1 jonathan
1028 1.1 jonathan if (m == NULL) {
1029 1.1 jonathan MGETHDR(n, M_DONTWAIT, MT_DATA);
1030 1.1 jonathan if (n == NULL)
1031 1.4 kanaoka return ENOBUFS;
1032 1.1 jonathan
1033 1.42 tsutsui MCLGET(n, M_DONTWAIT);
1034 1.42 tsutsui if ((n->m_flags & M_EXT) == 0) {
1035 1.42 tsutsui m_freem(n);
1036 1.4 kanaoka return ENOBUFS;
1037 1.1 jonathan }
1038 1.42 tsutsui m = n;
1039 1.1 jonathan } else
1040 1.1 jonathan m->m_data = m->m_ext.ext_buf;
1041 1.1 jonathan
1042 1.1 jonathan /*
1043 1.1 jonathan * Initialize mbuf length fields and fixup
1044 1.1 jonathan * alignment so that the frame payload is
1045 1.1 jonathan * longword aligned.
1046 1.1 jonathan */
1047 1.61 tsutsui m->m_len = m->m_pkthdr.len = MCLBYTES - RE_ETHER_ALIGN;
1048 1.61 tsutsui m->m_data += RE_ETHER_ALIGN;
1049 1.1 jonathan
1050 1.52 tsutsui rxs = &sc->re_ldata.re_rxsoft[idx];
1051 1.50 tsutsui map = rxs->rxs_dmamap;
1052 1.21 yamt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1053 1.21 yamt BUS_DMA_READ|BUS_DMA_NOWAIT);
1054 1.1 jonathan
1055 1.1 jonathan if (error)
1056 1.1 jonathan goto out;
1057 1.1 jonathan
1058 1.33 tsutsui bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1059 1.33 tsutsui BUS_DMASYNC_PREREAD);
1060 1.33 tsutsui
1061 1.52 tsutsui d = &sc->re_ldata.re_rx_list[idx];
1062 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1063 1.52 tsutsui cmdstat = le32toh(d->re_cmdstat);
1064 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD);
1065 1.52 tsutsui if (cmdstat & RE_RDESC_STAT_OWN) {
1066 1.44 tsutsui aprint_error("%s: tried to map busy RX descriptor\n",
1067 1.32 tsutsui sc->sc_dev.dv_xname);
1068 1.1 jonathan goto out;
1069 1.32 tsutsui }
1070 1.1 jonathan
1071 1.50 tsutsui rxs->rxs_mbuf = m;
1072 1.50 tsutsui
1073 1.1 jonathan cmdstat = map->dm_segs[0].ds_len;
1074 1.52 tsutsui if (idx == (RE_RX_DESC_CNT - 1))
1075 1.52 tsutsui cmdstat |= RE_RDESC_CMD_EOR;
1076 1.52 tsutsui d->re_bufaddr_lo = htole32(RE_ADDR_LO(map->dm_segs[0].ds_addr));
1077 1.52 tsutsui d->re_bufaddr_hi = htole32(RE_ADDR_HI(map->dm_segs[0].ds_addr));
1078 1.52 tsutsui d->re_cmdstat = htole32(cmdstat);
1079 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1080 1.52 tsutsui cmdstat |= RE_RDESC_CMD_OWN;
1081 1.52 tsutsui d->re_cmdstat = htole32(cmdstat);
1082 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1083 1.1 jonathan
1084 1.1 jonathan return 0;
1085 1.42 tsutsui out:
1086 1.1 jonathan if (n != NULL)
1087 1.1 jonathan m_freem(n);
1088 1.1 jonathan return ENOMEM;
1089 1.1 jonathan }
1090 1.1 jonathan
1091 1.1 jonathan static int
1092 1.1 jonathan re_tx_list_init(struct rtk_softc *sc)
1093 1.1 jonathan {
1094 1.15 yamt int i;
1095 1.15 yamt
1096 1.52 tsutsui memset(sc->re_ldata.re_tx_list, 0, RE_TX_LIST_SZ(sc));
1097 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++) {
1098 1.52 tsutsui sc->re_ldata.re_txq[i].txq_mbuf = NULL;
1099 1.15 yamt }
1100 1.1 jonathan
1101 1.1 jonathan bus_dmamap_sync(sc->sc_dmat,
1102 1.52 tsutsui sc->re_ldata.re_tx_list_map, 0,
1103 1.52 tsutsui sc->re_ldata.re_tx_list_map->dm_mapsize,
1104 1.32 tsutsui BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1105 1.52 tsutsui sc->re_ldata.re_txq_prodidx = 0;
1106 1.52 tsutsui sc->re_ldata.re_txq_considx = 0;
1107 1.59 tsutsui sc->re_ldata.re_txq_free = RE_TX_QLEN;
1108 1.52 tsutsui sc->re_ldata.re_tx_free = RE_TX_DESC_CNT(sc);
1109 1.52 tsutsui sc->re_ldata.re_tx_nextfree = 0;
1110 1.1 jonathan
1111 1.4 kanaoka return 0;
1112 1.1 jonathan }
1113 1.1 jonathan
1114 1.1 jonathan static int
1115 1.1 jonathan re_rx_list_init(struct rtk_softc *sc)
1116 1.1 jonathan {
1117 1.1 jonathan int i;
1118 1.1 jonathan
1119 1.52 tsutsui memset((char *)sc->re_ldata.re_rx_list, 0, RE_RX_LIST_SZ);
1120 1.1 jonathan
1121 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++) {
1122 1.1 jonathan if (re_newbuf(sc, i, NULL) == ENOBUFS)
1123 1.4 kanaoka return ENOBUFS;
1124 1.1 jonathan }
1125 1.1 jonathan
1126 1.52 tsutsui sc->re_ldata.re_rx_prodidx = 0;
1127 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1128 1.1 jonathan
1129 1.4 kanaoka return 0;
1130 1.1 jonathan }
1131 1.1 jonathan
1132 1.1 jonathan /*
1133 1.1 jonathan * RX handler for C+ and 8169. For the gigE chips, we support
1134 1.1 jonathan * the reception of jumbo frames that have been fragmented
1135 1.1 jonathan * across multiple 2K mbuf cluster buffers.
1136 1.1 jonathan */
1137 1.1 jonathan static void
1138 1.1 jonathan re_rxeof(struct rtk_softc *sc)
1139 1.1 jonathan {
1140 1.1 jonathan struct mbuf *m;
1141 1.1 jonathan struct ifnet *ifp;
1142 1.1 jonathan int i, total_len;
1143 1.52 tsutsui struct re_desc *cur_rx;
1144 1.52 tsutsui struct re_rxsoft *rxs;
1145 1.40 tsutsui uint32_t rxstat, rxvlan;
1146 1.1 jonathan
1147 1.1 jonathan ifp = &sc->ethercom.ec_if;
1148 1.1 jonathan
1149 1.52 tsutsui for (i = sc->re_ldata.re_rx_prodidx;; i = RE_NEXT_RX_DESC(sc, i)) {
1150 1.52 tsutsui cur_rx = &sc->re_ldata.re_rx_list[i];
1151 1.52 tsutsui RE_RXDESCSYNC(sc, i,
1152 1.32 tsutsui BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1153 1.52 tsutsui rxstat = le32toh(cur_rx->re_cmdstat);
1154 1.52 tsutsui RE_RXDESCSYNC(sc, i, BUS_DMASYNC_PREREAD);
1155 1.52 tsutsui if ((rxstat & RE_RDESC_STAT_OWN) != 0) {
1156 1.32 tsutsui break;
1157 1.32 tsutsui }
1158 1.52 tsutsui total_len = rxstat & sc->re_rxlenmask;
1159 1.52 tsutsui rxvlan = le32toh(cur_rx->re_vlanctl);
1160 1.52 tsutsui rxs = &sc->re_ldata.re_rxsoft[i];
1161 1.50 tsutsui m = rxs->rxs_mbuf;
1162 1.1 jonathan
1163 1.1 jonathan /* Invalidate the RX mbuf and unload its map */
1164 1.1 jonathan
1165 1.1 jonathan bus_dmamap_sync(sc->sc_dmat,
1166 1.50 tsutsui rxs->rxs_dmamap, 0, rxs->rxs_dmamap->dm_mapsize,
1167 1.20 briggs BUS_DMASYNC_POSTREAD);
1168 1.50 tsutsui bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1169 1.1 jonathan
1170 1.52 tsutsui if ((rxstat & RE_RDESC_STAT_EOF) == 0) {
1171 1.52 tsutsui m->m_len = MCLBYTES - RE_ETHER_ALIGN;
1172 1.52 tsutsui if (sc->re_head == NULL)
1173 1.52 tsutsui sc->re_head = sc->re_tail = m;
1174 1.1 jonathan else {
1175 1.1 jonathan m->m_flags &= ~M_PKTHDR;
1176 1.52 tsutsui sc->re_tail->m_next = m;
1177 1.52 tsutsui sc->re_tail = m;
1178 1.1 jonathan }
1179 1.1 jonathan re_newbuf(sc, i, NULL);
1180 1.1 jonathan continue;
1181 1.1 jonathan }
1182 1.1 jonathan
1183 1.1 jonathan /*
1184 1.1 jonathan * NOTE: for the 8139C+, the frame length field
1185 1.1 jonathan * is always 12 bits in size, but for the gigE chips,
1186 1.1 jonathan * it is 13 bits (since the max RX frame length is 16K).
1187 1.1 jonathan * Unfortunately, all 32 bits in the status word
1188 1.1 jonathan * were already used, so to make room for the extra
1189 1.1 jonathan * length bit, RealTek took out the 'frame alignment
1190 1.1 jonathan * error' bit and shifted the other status bits
1191 1.1 jonathan * over one slot. The OWN, EOR, FS and LS bits are
1192 1.1 jonathan * still in the same places. We have already extracted
1193 1.1 jonathan * the frame length and checked the OWN bit, so rather
1194 1.1 jonathan * than using an alternate bit mapping, we shift the
1195 1.1 jonathan * status bits one space to the right so we can evaluate
1196 1.1 jonathan * them using the 8169 status as though it was in the
1197 1.1 jonathan * same format as that of the 8139C+.
1198 1.1 jonathan */
1199 1.1 jonathan if (sc->rtk_type == RTK_8169)
1200 1.1 jonathan rxstat >>= 1;
1201 1.1 jonathan
1202 1.52 tsutsui if ((rxstat & RE_RDESC_STAT_RXERRSUM) != 0) {
1203 1.1 jonathan ifp->if_ierrors++;
1204 1.1 jonathan /*
1205 1.1 jonathan * If this is part of a multi-fragment packet,
1206 1.1 jonathan * discard all the pieces.
1207 1.1 jonathan */
1208 1.52 tsutsui if (sc->re_head != NULL) {
1209 1.52 tsutsui m_freem(sc->re_head);
1210 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1211 1.1 jonathan }
1212 1.1 jonathan re_newbuf(sc, i, m);
1213 1.1 jonathan continue;
1214 1.1 jonathan }
1215 1.1 jonathan
1216 1.1 jonathan /*
1217 1.1 jonathan * If allocating a replacement mbuf fails,
1218 1.1 jonathan * reload the current one.
1219 1.1 jonathan */
1220 1.1 jonathan
1221 1.41 tsutsui if (re_newbuf(sc, i, NULL) != 0) {
1222 1.1 jonathan ifp->if_ierrors++;
1223 1.52 tsutsui if (sc->re_head != NULL) {
1224 1.52 tsutsui m_freem(sc->re_head);
1225 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1226 1.1 jonathan }
1227 1.1 jonathan re_newbuf(sc, i, m);
1228 1.1 jonathan continue;
1229 1.1 jonathan }
1230 1.1 jonathan
1231 1.52 tsutsui if (sc->re_head != NULL) {
1232 1.52 tsutsui m->m_len = total_len % (MCLBYTES - RE_ETHER_ALIGN);
1233 1.12 perry /*
1234 1.1 jonathan * Special case: if there's 4 bytes or less
1235 1.1 jonathan * in this buffer, the mbuf can be discarded:
1236 1.1 jonathan * the last 4 bytes is the CRC, which we don't
1237 1.1 jonathan * care about anyway.
1238 1.1 jonathan */
1239 1.1 jonathan if (m->m_len <= ETHER_CRC_LEN) {
1240 1.52 tsutsui sc->re_tail->m_len -=
1241 1.1 jonathan (ETHER_CRC_LEN - m->m_len);
1242 1.1 jonathan m_freem(m);
1243 1.1 jonathan } else {
1244 1.1 jonathan m->m_len -= ETHER_CRC_LEN;
1245 1.1 jonathan m->m_flags &= ~M_PKTHDR;
1246 1.52 tsutsui sc->re_tail->m_next = m;
1247 1.1 jonathan }
1248 1.52 tsutsui m = sc->re_head;
1249 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1250 1.1 jonathan m->m_pkthdr.len = total_len - ETHER_CRC_LEN;
1251 1.1 jonathan } else
1252 1.1 jonathan m->m_pkthdr.len = m->m_len =
1253 1.1 jonathan (total_len - ETHER_CRC_LEN);
1254 1.1 jonathan
1255 1.1 jonathan ifp->if_ipackets++;
1256 1.1 jonathan m->m_pkthdr.rcvif = ifp;
1257 1.1 jonathan
1258 1.1 jonathan /* Do RX checksumming if enabled */
1259 1.1 jonathan
1260 1.18 yamt if (ifp->if_capenable & IFCAP_CSUM_IPv4_Rx) {
1261 1.1 jonathan
1262 1.1 jonathan /* Check IP header checksum */
1263 1.52 tsutsui if (rxstat & RE_RDESC_STAT_PROTOID)
1264 1.60 tsutsui m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
1265 1.52 tsutsui if (rxstat & RE_RDESC_STAT_IPSUMBAD)
1266 1.4 kanaoka m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD;
1267 1.1 jonathan }
1268 1.1 jonathan
1269 1.1 jonathan /* Check TCP/UDP checksum */
1270 1.52 tsutsui if (RE_TCPPKT(rxstat) &&
1271 1.18 yamt (ifp->if_capenable & IFCAP_CSUM_TCPv4_Rx)) {
1272 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_TCPv4;
1273 1.52 tsutsui if (rxstat & RE_RDESC_STAT_TCPSUMBAD)
1274 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
1275 1.1 jonathan }
1276 1.52 tsutsui if (RE_UDPPKT(rxstat) &&
1277 1.18 yamt (ifp->if_capenable & IFCAP_CSUM_UDPv4_Rx)) {
1278 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_UDPv4;
1279 1.52 tsutsui if (rxstat & RE_RDESC_STAT_UDPSUMBAD)
1280 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
1281 1.1 jonathan }
1282 1.1 jonathan
1283 1.23 pavel #ifdef RE_VLAN
1284 1.52 tsutsui if (rxvlan & RE_RDESC_VLANCTL_TAG) {
1285 1.9 jdolecek VLAN_INPUT_TAG(ifp, m,
1286 1.52 tsutsui be16toh(rxvlan & RE_RDESC_VLANCTL_DATA),
1287 1.9 jdolecek continue);
1288 1.1 jonathan }
1289 1.23 pavel #endif
1290 1.1 jonathan #if NBPFILTER > 0
1291 1.1 jonathan if (ifp->if_bpf)
1292 1.1 jonathan bpf_mtap(ifp->if_bpf, m);
1293 1.1 jonathan #endif
1294 1.1 jonathan (*ifp->if_input)(ifp, m);
1295 1.1 jonathan }
1296 1.1 jonathan
1297 1.52 tsutsui sc->re_ldata.re_rx_prodidx = i;
1298 1.1 jonathan }
1299 1.1 jonathan
1300 1.1 jonathan static void
1301 1.1 jonathan re_txeof(struct rtk_softc *sc)
1302 1.1 jonathan {
1303 1.1 jonathan struct ifnet *ifp;
1304 1.58 tsutsui struct re_txq *txq;
1305 1.58 tsutsui uint32_t txstat;
1306 1.58 tsutsui int idx, descidx;
1307 1.1 jonathan
1308 1.1 jonathan ifp = &sc->ethercom.ec_if;
1309 1.1 jonathan
1310 1.59 tsutsui for (idx = sc->re_ldata.re_txq_considx;
1311 1.59 tsutsui sc->re_ldata.re_txq_free < RE_TX_QLEN;
1312 1.59 tsutsui idx = RE_NEXT_TXQ(sc, idx), sc->re_ldata.re_txq_free++) {
1313 1.58 tsutsui txq = &sc->re_ldata.re_txq[idx];
1314 1.59 tsutsui KASSERT(txq->txq_mbuf != NULL);
1315 1.15 yamt
1316 1.17 yamt descidx = txq->txq_descidx;
1317 1.52 tsutsui RE_TXDESCSYNC(sc, descidx,
1318 1.32 tsutsui BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1319 1.15 yamt txstat =
1320 1.52 tsutsui le32toh(sc->re_ldata.re_tx_list[descidx].re_cmdstat);
1321 1.52 tsutsui RE_TXDESCSYNC(sc, descidx, BUS_DMASYNC_PREREAD);
1322 1.52 tsutsui KASSERT((txstat & RE_TDESC_CMD_EOF) != 0);
1323 1.52 tsutsui if (txstat & RE_TDESC_CMD_OWN) {
1324 1.1 jonathan break;
1325 1.32 tsutsui }
1326 1.1 jonathan
1327 1.52 tsutsui sc->re_ldata.re_tx_free += txq->txq_dmamap->dm_nsegs;
1328 1.52 tsutsui KASSERT(sc->re_ldata.re_tx_free <= RE_TX_DESC_CNT(sc));
1329 1.32 tsutsui bus_dmamap_sync(sc->sc_dmat, txq->txq_dmamap,
1330 1.32 tsutsui 0, txq->txq_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1331 1.15 yamt bus_dmamap_unload(sc->sc_dmat, txq->txq_dmamap);
1332 1.15 yamt m_freem(txq->txq_mbuf);
1333 1.15 yamt txq->txq_mbuf = NULL;
1334 1.15 yamt
1335 1.52 tsutsui if (txstat & (RE_TDESC_STAT_EXCESSCOL | RE_TDESC_STAT_COLCNT))
1336 1.15 yamt ifp->if_collisions++;
1337 1.52 tsutsui if (txstat & RE_TDESC_STAT_TXERRSUM)
1338 1.15 yamt ifp->if_oerrors++;
1339 1.15 yamt else
1340 1.15 yamt ifp->if_opackets++;
1341 1.59 tsutsui }
1342 1.1 jonathan
1343 1.59 tsutsui sc->re_ldata.re_txq_considx = idx;
1344 1.1 jonathan
1345 1.59 tsutsui if (sc->re_ldata.re_txq_free > 0)
1346 1.1 jonathan ifp->if_flags &= ~IFF_OACTIVE;
1347 1.1 jonathan
1348 1.1 jonathan /*
1349 1.1 jonathan * If not all descriptors have been released reaped yet,
1350 1.1 jonathan * reload the timer so that we will eventually get another
1351 1.1 jonathan * interrupt that will cause us to re-enter this routine.
1352 1.1 jonathan * This is done in case the transmitter has gone idle.
1353 1.1 jonathan */
1354 1.59 tsutsui if (sc->re_ldata.re_txq_free < RE_TX_QLEN)
1355 1.4 kanaoka CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
1356 1.56 tsutsui else
1357 1.56 tsutsui ifp->if_timer = 0;
1358 1.1 jonathan }
1359 1.1 jonathan
1360 1.1 jonathan /*
1361 1.1 jonathan * Stop all chip I/O so that the kernel's probe routines don't
1362 1.1 jonathan * get confused by errant DMAs when rebooting.
1363 1.1 jonathan */
1364 1.1 jonathan static void
1365 1.1 jonathan re_shutdown(void *vsc)
1366 1.1 jonathan
1367 1.1 jonathan {
1368 1.41 tsutsui struct rtk_softc *sc = vsc;
1369 1.1 jonathan
1370 1.3 kanaoka re_stop(&sc->ethercom.ec_if, 0);
1371 1.1 jonathan }
1372 1.1 jonathan
1373 1.1 jonathan
1374 1.1 jonathan static void
1375 1.1 jonathan re_tick(void *xsc)
1376 1.1 jonathan {
1377 1.1 jonathan struct rtk_softc *sc = xsc;
1378 1.1 jonathan int s;
1379 1.1 jonathan
1380 1.1 jonathan /*XXX: just return for 8169S/8110S with rev 2 or newer phy */
1381 1.1 jonathan s = splnet();
1382 1.1 jonathan
1383 1.1 jonathan mii_tick(&sc->mii);
1384 1.1 jonathan splx(s);
1385 1.1 jonathan
1386 1.1 jonathan callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
1387 1.1 jonathan }
1388 1.1 jonathan
1389 1.1 jonathan #ifdef DEVICE_POLLING
1390 1.1 jonathan static void
1391 1.1 jonathan re_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1392 1.1 jonathan {
1393 1.1 jonathan struct rtk_softc *sc = ifp->if_softc;
1394 1.1 jonathan
1395 1.1 jonathan RTK_LOCK(sc);
1396 1.41 tsutsui if ((ifp->if_capenable & IFCAP_POLLING) == 0) {
1397 1.1 jonathan ether_poll_deregister(ifp);
1398 1.1 jonathan cmd = POLL_DEREGISTER;
1399 1.1 jonathan }
1400 1.1 jonathan if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */
1401 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
1402 1.1 jonathan goto done;
1403 1.1 jonathan }
1404 1.1 jonathan
1405 1.1 jonathan sc->rxcycles = count;
1406 1.1 jonathan re_rxeof(sc);
1407 1.1 jonathan re_txeof(sc);
1408 1.1 jonathan
1409 1.25 rpaulo if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1410 1.1 jonathan (*ifp->if_start)(ifp);
1411 1.1 jonathan
1412 1.1 jonathan if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register */
1413 1.40 tsutsui uint16_t status;
1414 1.1 jonathan
1415 1.1 jonathan status = CSR_READ_2(sc, RTK_ISR);
1416 1.1 jonathan if (status == 0xffff)
1417 1.1 jonathan goto done;
1418 1.1 jonathan if (status)
1419 1.1 jonathan CSR_WRITE_2(sc, RTK_ISR, status);
1420 1.1 jonathan
1421 1.1 jonathan /*
1422 1.1 jonathan * XXX check behaviour on receiver stalls.
1423 1.1 jonathan */
1424 1.1 jonathan
1425 1.1 jonathan if (status & RTK_ISR_SYSTEM_ERR) {
1426 1.1 jonathan re_init(sc);
1427 1.1 jonathan }
1428 1.1 jonathan }
1429 1.41 tsutsui done:
1430 1.1 jonathan RTK_UNLOCK(sc);
1431 1.1 jonathan }
1432 1.1 jonathan #endif /* DEVICE_POLLING */
1433 1.1 jonathan
1434 1.1 jonathan int
1435 1.1 jonathan re_intr(void *arg)
1436 1.1 jonathan {
1437 1.1 jonathan struct rtk_softc *sc = arg;
1438 1.1 jonathan struct ifnet *ifp;
1439 1.40 tsutsui uint16_t status;
1440 1.1 jonathan int handled = 0;
1441 1.1 jonathan
1442 1.1 jonathan ifp = &sc->ethercom.ec_if;
1443 1.1 jonathan
1444 1.41 tsutsui if ((ifp->if_flags & IFF_UP) == 0)
1445 1.1 jonathan return 0;
1446 1.1 jonathan
1447 1.1 jonathan #ifdef DEVICE_POLLING
1448 1.4 kanaoka if (ifp->if_flags & IFF_POLLING)
1449 1.1 jonathan goto done;
1450 1.1 jonathan if ((ifp->if_capenable & IFCAP_POLLING) &&
1451 1.1 jonathan ether_poll_register(re_poll, ifp)) { /* ok, disable interrupts */
1452 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0x0000);
1453 1.1 jonathan re_poll(ifp, 0, 1);
1454 1.1 jonathan goto done;
1455 1.1 jonathan }
1456 1.1 jonathan #endif /* DEVICE_POLLING */
1457 1.1 jonathan
1458 1.1 jonathan for (;;) {
1459 1.1 jonathan
1460 1.1 jonathan status = CSR_READ_2(sc, RTK_ISR);
1461 1.1 jonathan /* If the card has gone away the read returns 0xffff. */
1462 1.1 jonathan if (status == 0xffff)
1463 1.1 jonathan break;
1464 1.1 jonathan if (status) {
1465 1.1 jonathan handled = 1;
1466 1.1 jonathan CSR_WRITE_2(sc, RTK_ISR, status);
1467 1.1 jonathan }
1468 1.1 jonathan
1469 1.1 jonathan if ((status & RTK_INTRS_CPLUS) == 0)
1470 1.1 jonathan break;
1471 1.1 jonathan
1472 1.57 tsutsui if (status & (RTK_ISR_RX_OK | RTK_ISR_RX_ERR))
1473 1.1 jonathan re_rxeof(sc);
1474 1.1 jonathan
1475 1.57 tsutsui if (status & (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_TX_ERR |
1476 1.57 tsutsui RTK_ISR_TX_DESC_UNAVAIL))
1477 1.1 jonathan re_txeof(sc);
1478 1.1 jonathan
1479 1.1 jonathan if (status & RTK_ISR_SYSTEM_ERR) {
1480 1.1 jonathan re_init(ifp);
1481 1.1 jonathan }
1482 1.1 jonathan
1483 1.1 jonathan if (status & RTK_ISR_LINKCHG) {
1484 1.1 jonathan callout_stop(&sc->rtk_tick_ch);
1485 1.1 jonathan re_tick(sc);
1486 1.1 jonathan }
1487 1.1 jonathan }
1488 1.1 jonathan
1489 1.57 tsutsui if (handled && !IFQ_IS_EMPTY(&ifp->if_snd))
1490 1.57 tsutsui re_start(ifp);
1491 1.1 jonathan
1492 1.1 jonathan #ifdef DEVICE_POLLING
1493 1.41 tsutsui done:
1494 1.1 jonathan #endif
1495 1.1 jonathan
1496 1.1 jonathan return handled;
1497 1.1 jonathan }
1498 1.1 jonathan
1499 1.59 tsutsui
1500 1.59 tsutsui
1501 1.59 tsutsui /*
1502 1.59 tsutsui * Main transmit routine for C+ and gigE NICs.
1503 1.59 tsutsui */
1504 1.59 tsutsui
1505 1.59 tsutsui static void
1506 1.59 tsutsui re_start(struct ifnet *ifp)
1507 1.1 jonathan {
1508 1.59 tsutsui struct rtk_softc *sc;
1509 1.59 tsutsui struct mbuf *m;
1510 1.1 jonathan bus_dmamap_t map;
1511 1.59 tsutsui struct re_txq *txq;
1512 1.59 tsutsui struct re_desc *d;
1513 1.23 pavel #ifdef RE_VLAN
1514 1.1 jonathan struct m_tag *mtag;
1515 1.23 pavel #endif
1516 1.52 tsutsui uint32_t cmdstat, re_flags;
1517 1.59 tsutsui int ofree, idx, error, seg;
1518 1.59 tsutsui int startdesc, curdesc, lastdesc;
1519 1.1 jonathan
1520 1.59 tsutsui sc = ifp->if_softc;
1521 1.59 tsutsui ofree = sc->re_ldata.re_txq_free;
1522 1.1 jonathan
1523 1.59 tsutsui for (idx = sc->re_ldata.re_txq_prodidx;; idx = RE_NEXT_TXQ(sc, idx)) {
1524 1.1 jonathan
1525 1.59 tsutsui IFQ_POLL(&ifp->if_snd, m);
1526 1.59 tsutsui if (m == NULL)
1527 1.59 tsutsui break;
1528 1.1 jonathan
1529 1.59 tsutsui if (sc->re_ldata.re_txq_free == 0 ||
1530 1.59 tsutsui sc->re_ldata.re_tx_free <= RE_NTXDESC_RSVD) {
1531 1.59 tsutsui /* no more free slots left */
1532 1.59 tsutsui ifp->if_flags |= IFF_OACTIVE;
1533 1.59 tsutsui break;
1534 1.59 tsutsui }
1535 1.16 yamt
1536 1.16 yamt /*
1537 1.59 tsutsui * Set up checksum offload. Note: checksum offload bits must
1538 1.59 tsutsui * appear in all descriptors of a multi-descriptor transmit
1539 1.59 tsutsui * attempt. (This is according to testing done with an 8169
1540 1.59 tsutsui * chip. I'm not sure if this is a requirement or a bug.)
1541 1.16 yamt */
1542 1.16 yamt
1543 1.59 tsutsui if ((m->m_pkthdr.csum_flags & M_CSUM_TSOv4) != 0) {
1544 1.59 tsutsui uint32_t segsz = m->m_pkthdr.segsz;
1545 1.59 tsutsui
1546 1.59 tsutsui re_flags = RE_TDESC_CMD_LGSEND |
1547 1.59 tsutsui (segsz << RE_TDESC_CMD_MSSVAL_SHIFT);
1548 1.59 tsutsui } else {
1549 1.59 tsutsui /*
1550 1.59 tsutsui * set RE_TDESC_CMD_IPCSUM if any checksum offloading
1551 1.59 tsutsui * is requested. otherwise, RE_TDESC_CMD_TCPCSUM/
1552 1.59 tsutsui * RE_TDESC_CMD_UDPCSUM doesn't make effects.
1553 1.59 tsutsui */
1554 1.59 tsutsui re_flags = 0;
1555 1.59 tsutsui if ((m->m_pkthdr.csum_flags &
1556 1.59 tsutsui (M_CSUM_IPv4 | M_CSUM_TCPv4 | M_CSUM_UDPv4))
1557 1.59 tsutsui != 0) {
1558 1.59 tsutsui re_flags |= RE_TDESC_CMD_IPCSUM;
1559 1.59 tsutsui if (m->m_pkthdr.csum_flags & M_CSUM_TCPv4) {
1560 1.59 tsutsui re_flags |= RE_TDESC_CMD_TCPCSUM;
1561 1.59 tsutsui } else if (m->m_pkthdr.csum_flags &
1562 1.59 tsutsui M_CSUM_UDPv4) {
1563 1.59 tsutsui re_flags |= RE_TDESC_CMD_UDPCSUM;
1564 1.59 tsutsui }
1565 1.16 yamt }
1566 1.16 yamt }
1567 1.1 jonathan
1568 1.59 tsutsui txq = &sc->re_ldata.re_txq[idx];
1569 1.59 tsutsui map = txq->txq_dmamap;
1570 1.59 tsutsui error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1571 1.59 tsutsui BUS_DMA_WRITE|BUS_DMA_NOWAIT);
1572 1.59 tsutsui
1573 1.59 tsutsui if (error) {
1574 1.59 tsutsui /* XXX try to defrag if EFBIG? */
1575 1.59 tsutsui aprint_error("%s: can't map mbuf (error %d)\n",
1576 1.59 tsutsui sc->sc_dev.dv_xname, error);
1577 1.1 jonathan
1578 1.59 tsutsui IFQ_DEQUEUE(&ifp->if_snd, m);
1579 1.59 tsutsui m_freem(m);
1580 1.59 tsutsui ifp->if_oerrors++;
1581 1.59 tsutsui continue;
1582 1.59 tsutsui }
1583 1.13 yamt
1584 1.59 tsutsui if (map->dm_nsegs > sc->re_ldata.re_tx_free - RE_NTXDESC_RSVD) {
1585 1.59 tsutsui /*
1586 1.59 tsutsui * Not enough free descriptors to transmit this packet.
1587 1.59 tsutsui */
1588 1.59 tsutsui ifp->if_flags |= IFF_OACTIVE;
1589 1.59 tsutsui bus_dmamap_unload(sc->sc_dmat, map);
1590 1.59 tsutsui break;
1591 1.59 tsutsui }
1592 1.13 yamt
1593 1.59 tsutsui IFQ_DEQUEUE(&ifp->if_snd, m);
1594 1.1 jonathan
1595 1.59 tsutsui /*
1596 1.59 tsutsui * Make sure that the caches are synchronized before we
1597 1.59 tsutsui * ask the chip to start DMA for the packet data.
1598 1.59 tsutsui */
1599 1.59 tsutsui bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1600 1.59 tsutsui BUS_DMASYNC_PREWRITE);
1601 1.20 briggs
1602 1.59 tsutsui /*
1603 1.59 tsutsui * Map the segment array into descriptors.
1604 1.59 tsutsui * Note that we set the start-of-frame and
1605 1.59 tsutsui * end-of-frame markers for either TX or RX,
1606 1.59 tsutsui * but they really only have meaning in the TX case.
1607 1.59 tsutsui * (In the RX case, it's the chip that tells us
1608 1.59 tsutsui * where packets begin and end.)
1609 1.59 tsutsui * We also keep track of the end of the ring
1610 1.59 tsutsui * and set the end-of-ring bits as needed,
1611 1.59 tsutsui * and we set the ownership bits in all except
1612 1.59 tsutsui * the very first descriptor. (The caller will
1613 1.59 tsutsui * set this descriptor later when it start
1614 1.59 tsutsui * transmission or reception.)
1615 1.59 tsutsui */
1616 1.59 tsutsui curdesc = startdesc = sc->re_ldata.re_tx_nextfree;
1617 1.59 tsutsui lastdesc = -1;
1618 1.59 tsutsui for (seg = 0; seg < map->dm_nsegs;
1619 1.59 tsutsui seg++, curdesc = RE_NEXT_TX_DESC(sc, curdesc)) {
1620 1.59 tsutsui d = &sc->re_ldata.re_tx_list[curdesc];
1621 1.59 tsutsui #ifdef DIAGNISTIC
1622 1.59 tsutsui RE_TXDESCSYNC(sc, curdesc,
1623 1.59 tsutsui BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1624 1.59 tsutsui cmdstat = le32toh(d->re_cmdstat);
1625 1.59 tsutsui RE_TXDESCSYNC(sc, curdesc, BUS_DMASYNC_PREREAD);
1626 1.59 tsutsui if (cmdstat & RE_TDESC_STAT_OWN) {
1627 1.59 tsutsui panic("%s: tried to map busy TX descriptor",
1628 1.59 tsutsui sc->sc_dev.dv_xname);
1629 1.59 tsutsui }
1630 1.59 tsutsui #endif
1631 1.20 briggs
1632 1.59 tsutsui d->re_bufaddr_lo =
1633 1.59 tsutsui htole32(RE_ADDR_LO(map->dm_segs[seg].ds_addr));
1634 1.59 tsutsui d->re_bufaddr_hi =
1635 1.59 tsutsui htole32(RE_ADDR_HI(map->dm_segs[seg].ds_addr));
1636 1.59 tsutsui cmdstat = re_flags | map->dm_segs[seg].ds_len;
1637 1.59 tsutsui if (seg == 0)
1638 1.59 tsutsui cmdstat |= RE_TDESC_CMD_SOF;
1639 1.59 tsutsui else
1640 1.59 tsutsui cmdstat |= RE_TDESC_CMD_OWN;
1641 1.59 tsutsui if (curdesc == (RE_TX_DESC_CNT(sc) - 1))
1642 1.59 tsutsui cmdstat |= RE_TDESC_CMD_EOR;
1643 1.59 tsutsui if (seg == map->dm_nsegs - 1) {
1644 1.59 tsutsui cmdstat |= RE_TDESC_CMD_EOF;
1645 1.59 tsutsui lastdesc = curdesc;
1646 1.13 yamt }
1647 1.59 tsutsui d->re_cmdstat = htole32(cmdstat);
1648 1.59 tsutsui RE_TXDESCSYNC(sc, curdesc,
1649 1.59 tsutsui BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1650 1.13 yamt }
1651 1.59 tsutsui KASSERT(lastdesc != -1);
1652 1.1 jonathan
1653 1.59 tsutsui /*
1654 1.59 tsutsui * Set up hardware VLAN tagging. Note: vlan tag info must
1655 1.59 tsutsui * appear in the first descriptor of a multi-descriptor
1656 1.59 tsutsui * transmission attempt.
1657 1.59 tsutsui */
1658 1.1 jonathan
1659 1.23 pavel #ifdef RE_VLAN
1660 1.59 tsutsui if ((mtag = VLAN_OUTPUT_TAG(&sc->ethercom, m)) != NULL) {
1661 1.59 tsutsui sc->re_ldata.re_tx_list[startdesc].re_vlanctl =
1662 1.59 tsutsui htole32(htons(VLAN_TAG_VALUE(mtag)) |
1663 1.59 tsutsui RE_TDESC_VLANCTL_TAG);
1664 1.59 tsutsui }
1665 1.23 pavel #endif
1666 1.1 jonathan
1667 1.59 tsutsui /* Transfer ownership of packet to the chip. */
1668 1.1 jonathan
1669 1.59 tsutsui sc->re_ldata.re_tx_list[startdesc].re_cmdstat |=
1670 1.59 tsutsui htole32(RE_TDESC_CMD_OWN);
1671 1.59 tsutsui RE_TXDESCSYNC(sc, startdesc,
1672 1.59 tsutsui BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1673 1.17 yamt
1674 1.59 tsutsui /* update info of TX queue and descriptors */
1675 1.59 tsutsui txq->txq_mbuf = m;
1676 1.59 tsutsui txq->txq_descidx = lastdesc;
1677 1.59 tsutsui
1678 1.59 tsutsui sc->re_ldata.re_txq_free--;
1679 1.59 tsutsui sc->re_ldata.re_tx_free -= map->dm_nsegs;
1680 1.59 tsutsui sc->re_ldata.re_tx_nextfree = curdesc;
1681 1.17 yamt
1682 1.1 jonathan #if NBPFILTER > 0
1683 1.1 jonathan /*
1684 1.1 jonathan * If there's a BPF listener, bounce a copy of this frame
1685 1.1 jonathan * to him.
1686 1.1 jonathan */
1687 1.1 jonathan if (ifp->if_bpf)
1688 1.17 yamt bpf_mtap(ifp->if_bpf, m);
1689 1.1 jonathan #endif
1690 1.1 jonathan }
1691 1.1 jonathan
1692 1.59 tsutsui if (sc->re_ldata.re_txq_free < ofree) {
1693 1.59 tsutsui /*
1694 1.59 tsutsui * TX packets are enqueued.
1695 1.59 tsutsui */
1696 1.59 tsutsui sc->re_ldata.re_txq_prodidx = idx;
1697 1.17 yamt
1698 1.59 tsutsui /*
1699 1.59 tsutsui * Start the transmitter to poll.
1700 1.59 tsutsui *
1701 1.59 tsutsui * RealTek put the TX poll request register in a different
1702 1.59 tsutsui * location on the 8169 gigE chip. I don't know why.
1703 1.59 tsutsui */
1704 1.59 tsutsui if (sc->rtk_type == RTK_8169)
1705 1.59 tsutsui CSR_WRITE_2(sc, RTK_GTXSTART, RTK_TXSTART_START);
1706 1.59 tsutsui else
1707 1.59 tsutsui CSR_WRITE_1(sc, RTK_TXSTART, RTK_TXSTART_START);
1708 1.1 jonathan
1709 1.59 tsutsui /*
1710 1.59 tsutsui * Use the countdown timer for interrupt moderation.
1711 1.59 tsutsui * 'TX done' interrupts are disabled. Instead, we reset the
1712 1.59 tsutsui * countdown timer, which will begin counting until it hits
1713 1.59 tsutsui * the value in the TIMERINT register, and then trigger an
1714 1.59 tsutsui * interrupt. Each time we write to the TIMERCNT register,
1715 1.59 tsutsui * the timer count is reset to 0.
1716 1.59 tsutsui */
1717 1.59 tsutsui CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
1718 1.1 jonathan
1719 1.59 tsutsui /*
1720 1.59 tsutsui * Set a timeout in case the chip goes out to lunch.
1721 1.59 tsutsui */
1722 1.59 tsutsui ifp->if_timer = 5;
1723 1.59 tsutsui }
1724 1.1 jonathan }
1725 1.1 jonathan
1726 1.1 jonathan static int
1727 1.1 jonathan re_init(struct ifnet *ifp)
1728 1.1 jonathan {
1729 1.1 jonathan struct rtk_softc *sc = ifp->if_softc;
1730 1.49 tsutsui uint8_t *enaddr;
1731 1.40 tsutsui uint32_t rxcfg = 0;
1732 1.40 tsutsui uint32_t reg;
1733 1.1 jonathan int error;
1734 1.12 perry
1735 1.1 jonathan if ((error = re_enable(sc)) != 0)
1736 1.1 jonathan goto out;
1737 1.1 jonathan
1738 1.1 jonathan /*
1739 1.1 jonathan * Cancel pending I/O and free all RX/TX buffers.
1740 1.1 jonathan */
1741 1.3 kanaoka re_stop(ifp, 0);
1742 1.1 jonathan
1743 1.53 tsutsui re_reset(sc);
1744 1.53 tsutsui
1745 1.1 jonathan /*
1746 1.1 jonathan * Enable C+ RX and TX mode, as well as VLAN stripping and
1747 1.1 jonathan * RX checksum offload. We must configure the C+ register
1748 1.1 jonathan * before all others.
1749 1.1 jonathan */
1750 1.1 jonathan reg = 0;
1751 1.1 jonathan
1752 1.1 jonathan /*
1753 1.1 jonathan * XXX: Realtek docs say bits 0 and 1 are reserved, for 8169S/8110S.
1754 1.1 jonathan * FreeBSD drivers set these bits anyway (for 8139C+?).
1755 1.1 jonathan * So far, it works.
1756 1.1 jonathan */
1757 1.1 jonathan
1758 1.1 jonathan /*
1759 1.1 jonathan * XXX: For 8169 and 8196S revs below 2, set bit 14.
1760 1.1 jonathan * For 8169S/8110S rev 2 and above, do not set bit 14.
1761 1.1 jonathan */
1762 1.1 jonathan if (sc->rtk_type == RTK_8169 && sc->sc_rev == 1)
1763 1.4 kanaoka reg |= (0x1 << 14) | RTK_CPLUSCMD_PCI_MRW;;
1764 1.1 jonathan
1765 1.4 kanaoka if (1) {/* not for 8169S ? */
1766 1.24 blymn reg |=
1767 1.23 pavel #ifdef RE_VLAN
1768 1.23 pavel RTK_CPLUSCMD_VLANSTRIP |
1769 1.23 pavel #endif
1770 1.4 kanaoka (ifp->if_capenable &
1771 1.18 yamt (IFCAP_CSUM_IPv4_Rx | IFCAP_CSUM_TCPv4_Rx |
1772 1.18 yamt IFCAP_CSUM_UDPv4_Rx) ?
1773 1.4 kanaoka RTK_CPLUSCMD_RXCSUM_ENB : 0);
1774 1.4 kanaoka }
1775 1.12 perry
1776 1.1 jonathan CSR_WRITE_2(sc, RTK_CPLUS_CMD,
1777 1.4 kanaoka reg | RTK_CPLUSCMD_RXENB | RTK_CPLUSCMD_TXENB);
1778 1.1 jonathan
1779 1.1 jonathan /* XXX: from Realtek-supplied Linux driver. Wholly undocumented. */
1780 1.1 jonathan if (sc->rtk_type == RTK_8169)
1781 1.1 jonathan CSR_WRITE_2(sc, RTK_CPLUS_CMD+0x2, 0x0000);
1782 1.1 jonathan
1783 1.1 jonathan DELAY(10000);
1784 1.1 jonathan
1785 1.1 jonathan /*
1786 1.1 jonathan * Init our MAC address. Even though the chipset
1787 1.1 jonathan * documentation doesn't mention it, we need to enter "Config
1788 1.1 jonathan * register write enable" mode to modify the ID registers.
1789 1.1 jonathan */
1790 1.1 jonathan CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_WRITECFG);
1791 1.49 tsutsui enaddr = LLADDR(ifp->if_sadl);
1792 1.49 tsutsui reg = enaddr[0] | (enaddr[1] << 8) |
1793 1.49 tsutsui (enaddr[2] << 16) | (enaddr[3] << 24);
1794 1.49 tsutsui CSR_WRITE_4(sc, RTK_IDR0, reg);
1795 1.49 tsutsui reg = enaddr[4] | (enaddr[5] << 8);
1796 1.49 tsutsui CSR_WRITE_4(sc, RTK_IDR4, reg);
1797 1.1 jonathan CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF);
1798 1.1 jonathan
1799 1.1 jonathan /*
1800 1.1 jonathan * For C+ mode, initialize the RX descriptors and mbufs.
1801 1.1 jonathan */
1802 1.1 jonathan re_rx_list_init(sc);
1803 1.1 jonathan re_tx_list_init(sc);
1804 1.1 jonathan
1805 1.1 jonathan /*
1806 1.54 tsutsui * Load the addresses of the RX and TX lists into the chip.
1807 1.54 tsutsui */
1808 1.54 tsutsui CSR_WRITE_4(sc, RTK_RXLIST_ADDR_HI,
1809 1.54 tsutsui RE_ADDR_HI(sc->re_ldata.re_rx_list_map->dm_segs[0].ds_addr));
1810 1.54 tsutsui CSR_WRITE_4(sc, RTK_RXLIST_ADDR_LO,
1811 1.54 tsutsui RE_ADDR_LO(sc->re_ldata.re_rx_list_map->dm_segs[0].ds_addr));
1812 1.54 tsutsui
1813 1.54 tsutsui CSR_WRITE_4(sc, RTK_TXLIST_ADDR_HI,
1814 1.54 tsutsui RE_ADDR_HI(sc->re_ldata.re_tx_list_map->dm_segs[0].ds_addr));
1815 1.54 tsutsui CSR_WRITE_4(sc, RTK_TXLIST_ADDR_LO,
1816 1.54 tsutsui RE_ADDR_LO(sc->re_ldata.re_tx_list_map->dm_segs[0].ds_addr));
1817 1.54 tsutsui
1818 1.54 tsutsui /*
1819 1.1 jonathan * Enable transmit and receive.
1820 1.1 jonathan */
1821 1.4 kanaoka CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
1822 1.1 jonathan
1823 1.1 jonathan /*
1824 1.1 jonathan * Set the initial TX and RX configuration.
1825 1.1 jonathan */
1826 1.52 tsutsui if (sc->re_testmode) {
1827 1.1 jonathan if (sc->rtk_type == RTK_8169)
1828 1.1 jonathan CSR_WRITE_4(sc, RTK_TXCFG,
1829 1.4 kanaoka RTK_TXCFG_CONFIG | RTK_LOOPTEST_ON);
1830 1.1 jonathan else
1831 1.1 jonathan CSR_WRITE_4(sc, RTK_TXCFG,
1832 1.4 kanaoka RTK_TXCFG_CONFIG | RTK_LOOPTEST_ON_CPLUS);
1833 1.1 jonathan } else
1834 1.1 jonathan CSR_WRITE_4(sc, RTK_TXCFG, RTK_TXCFG_CONFIG);
1835 1.54 tsutsui
1836 1.54 tsutsui CSR_WRITE_1(sc, RTK_EARLY_TX_THRESH, 16);
1837 1.54 tsutsui
1838 1.1 jonathan CSR_WRITE_4(sc, RTK_RXCFG, RTK_RXCFG_CONFIG);
1839 1.1 jonathan
1840 1.1 jonathan /* Set the individual bit to receive frames for this host only. */
1841 1.1 jonathan rxcfg = CSR_READ_4(sc, RTK_RXCFG);
1842 1.1 jonathan rxcfg |= RTK_RXCFG_RX_INDIV;
1843 1.1 jonathan
1844 1.1 jonathan /* If we want promiscuous mode, set the allframes bit. */
1845 1.8 jdolecek if (ifp->if_flags & IFF_PROMISC)
1846 1.1 jonathan rxcfg |= RTK_RXCFG_RX_ALLPHYS;
1847 1.8 jdolecek else
1848 1.1 jonathan rxcfg &= ~RTK_RXCFG_RX_ALLPHYS;
1849 1.8 jdolecek CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1850 1.1 jonathan
1851 1.1 jonathan /*
1852 1.1 jonathan * Set capture broadcast bit to capture broadcast frames.
1853 1.1 jonathan */
1854 1.8 jdolecek if (ifp->if_flags & IFF_BROADCAST)
1855 1.1 jonathan rxcfg |= RTK_RXCFG_RX_BROAD;
1856 1.8 jdolecek else
1857 1.1 jonathan rxcfg &= ~RTK_RXCFG_RX_BROAD;
1858 1.8 jdolecek CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1859 1.1 jonathan
1860 1.1 jonathan /*
1861 1.1 jonathan * Program the multicast filter, if necessary.
1862 1.1 jonathan */
1863 1.1 jonathan rtk_setmulti(sc);
1864 1.1 jonathan
1865 1.1 jonathan #ifdef DEVICE_POLLING
1866 1.1 jonathan /*
1867 1.1 jonathan * Disable interrupts if we are polling.
1868 1.1 jonathan */
1869 1.1 jonathan if (ifp->if_flags & IFF_POLLING)
1870 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0);
1871 1.1 jonathan else /* otherwise ... */
1872 1.1 jonathan #endif /* DEVICE_POLLING */
1873 1.1 jonathan /*
1874 1.1 jonathan * Enable interrupts.
1875 1.1 jonathan */
1876 1.52 tsutsui if (sc->re_testmode)
1877 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0);
1878 1.1 jonathan else
1879 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
1880 1.1 jonathan
1881 1.1 jonathan /* Start RX/TX process. */
1882 1.1 jonathan CSR_WRITE_4(sc, RTK_MISSEDPKT, 0);
1883 1.1 jonathan #ifdef notdef
1884 1.1 jonathan /* Enable receiver and transmitter. */
1885 1.4 kanaoka CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
1886 1.1 jonathan #endif
1887 1.1 jonathan
1888 1.1 jonathan /*
1889 1.1 jonathan * Initialize the timer interrupt register so that
1890 1.1 jonathan * a timer interrupt will be generated once the timer
1891 1.1 jonathan * reaches a certain number of ticks. The timer is
1892 1.1 jonathan * reloaded on each transmit. This gives us TX interrupt
1893 1.1 jonathan * moderation, which dramatically improves TX frame rate.
1894 1.1 jonathan */
1895 1.1 jonathan
1896 1.1 jonathan if (sc->rtk_type == RTK_8169)
1897 1.1 jonathan CSR_WRITE_4(sc, RTK_TIMERINT_8169, 0x800);
1898 1.1 jonathan else
1899 1.1 jonathan CSR_WRITE_4(sc, RTK_TIMERINT, 0x400);
1900 1.1 jonathan
1901 1.1 jonathan /*
1902 1.1 jonathan * For 8169 gigE NICs, set the max allowed RX packet
1903 1.1 jonathan * size so we can receive jumbo frames.
1904 1.1 jonathan */
1905 1.1 jonathan if (sc->rtk_type == RTK_8169)
1906 1.1 jonathan CSR_WRITE_2(sc, RTK_MAXRXPKTLEN, 16383);
1907 1.1 jonathan
1908 1.52 tsutsui if (sc->re_testmode)
1909 1.1 jonathan return 0;
1910 1.1 jonathan
1911 1.1 jonathan mii_mediachg(&sc->mii);
1912 1.1 jonathan
1913 1.4 kanaoka CSR_WRITE_1(sc, RTK_CFG1, RTK_CFG1_DRVLOAD | RTK_CFG1_FULLDUPLEX);
1914 1.1 jonathan
1915 1.1 jonathan ifp->if_flags |= IFF_RUNNING;
1916 1.1 jonathan ifp->if_flags &= ~IFF_OACTIVE;
1917 1.1 jonathan
1918 1.1 jonathan callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
1919 1.1 jonathan
1920 1.41 tsutsui out:
1921 1.1 jonathan if (error) {
1922 1.4 kanaoka ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1923 1.1 jonathan ifp->if_timer = 0;
1924 1.4 kanaoka aprint_error("%s: interface not running\n",
1925 1.4 kanaoka sc->sc_dev.dv_xname);
1926 1.1 jonathan }
1927 1.12 perry
1928 1.1 jonathan return error;
1929 1.1 jonathan }
1930 1.1 jonathan
1931 1.1 jonathan /*
1932 1.1 jonathan * Set media options.
1933 1.1 jonathan */
1934 1.1 jonathan static int
1935 1.1 jonathan re_ifmedia_upd(struct ifnet *ifp)
1936 1.1 jonathan {
1937 1.1 jonathan struct rtk_softc *sc;
1938 1.1 jonathan
1939 1.1 jonathan sc = ifp->if_softc;
1940 1.1 jonathan
1941 1.4 kanaoka return mii_mediachg(&sc->mii);
1942 1.1 jonathan }
1943 1.1 jonathan
1944 1.1 jonathan /*
1945 1.1 jonathan * Report current media status.
1946 1.1 jonathan */
1947 1.1 jonathan static void
1948 1.1 jonathan re_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1949 1.1 jonathan {
1950 1.1 jonathan struct rtk_softc *sc;
1951 1.1 jonathan
1952 1.1 jonathan sc = ifp->if_softc;
1953 1.1 jonathan
1954 1.1 jonathan mii_pollstat(&sc->mii);
1955 1.1 jonathan ifmr->ifm_active = sc->mii.mii_media_active;
1956 1.1 jonathan ifmr->ifm_status = sc->mii.mii_media_status;
1957 1.1 jonathan }
1958 1.1 jonathan
1959 1.1 jonathan static int
1960 1.1 jonathan re_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
1961 1.1 jonathan {
1962 1.1 jonathan struct rtk_softc *sc = ifp->if_softc;
1963 1.1 jonathan struct ifreq *ifr = (struct ifreq *) data;
1964 1.1 jonathan int s, error = 0;
1965 1.1 jonathan
1966 1.1 jonathan s = splnet();
1967 1.1 jonathan
1968 1.4 kanaoka switch (command) {
1969 1.1 jonathan case SIOCSIFMTU:
1970 1.52 tsutsui if (ifr->ifr_mtu > RE_JUMBO_MTU)
1971 1.1 jonathan error = EINVAL;
1972 1.1 jonathan ifp->if_mtu = ifr->ifr_mtu;
1973 1.1 jonathan break;
1974 1.1 jonathan case SIOCGIFMEDIA:
1975 1.1 jonathan case SIOCSIFMEDIA:
1976 1.1 jonathan error = ifmedia_ioctl(ifp, ifr, &sc->mii.mii_media, command);
1977 1.1 jonathan break;
1978 1.1 jonathan default:
1979 1.1 jonathan error = ether_ioctl(ifp, command, data);
1980 1.1 jonathan if (error == ENETRESET) {
1981 1.2 kanaoka if (ifp->if_flags & IFF_RUNNING)
1982 1.1 jonathan rtk_setmulti(sc);
1983 1.1 jonathan error = 0;
1984 1.1 jonathan }
1985 1.1 jonathan break;
1986 1.1 jonathan }
1987 1.1 jonathan
1988 1.1 jonathan splx(s);
1989 1.1 jonathan
1990 1.4 kanaoka return error;
1991 1.1 jonathan }
1992 1.1 jonathan
1993 1.1 jonathan static void
1994 1.1 jonathan re_watchdog(struct ifnet *ifp)
1995 1.1 jonathan {
1996 1.1 jonathan struct rtk_softc *sc;
1997 1.1 jonathan int s;
1998 1.1 jonathan
1999 1.1 jonathan sc = ifp->if_softc;
2000 1.1 jonathan s = splnet();
2001 1.4 kanaoka aprint_error("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
2002 1.1 jonathan ifp->if_oerrors++;
2003 1.1 jonathan
2004 1.1 jonathan re_txeof(sc);
2005 1.1 jonathan re_rxeof(sc);
2006 1.1 jonathan
2007 1.1 jonathan re_init(ifp);
2008 1.1 jonathan
2009 1.1 jonathan splx(s);
2010 1.1 jonathan }
2011 1.1 jonathan
2012 1.1 jonathan /*
2013 1.1 jonathan * Stop the adapter and free any mbufs allocated to the
2014 1.1 jonathan * RX and TX lists.
2015 1.1 jonathan */
2016 1.1 jonathan static void
2017 1.3 kanaoka re_stop(struct ifnet *ifp, int disable)
2018 1.1 jonathan {
2019 1.41 tsutsui int i;
2020 1.3 kanaoka struct rtk_softc *sc = ifp->if_softc;
2021 1.1 jonathan
2022 1.3 kanaoka callout_stop(&sc->rtk_tick_ch);
2023 1.1 jonathan
2024 1.1 jonathan #ifdef DEVICE_POLLING
2025 1.1 jonathan ether_poll_deregister(ifp);
2026 1.1 jonathan #endif /* DEVICE_POLLING */
2027 1.1 jonathan
2028 1.3 kanaoka mii_down(&sc->mii);
2029 1.3 kanaoka
2030 1.1 jonathan CSR_WRITE_1(sc, RTK_COMMAND, 0x00);
2031 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0x0000);
2032 1.1 jonathan
2033 1.52 tsutsui if (sc->re_head != NULL) {
2034 1.52 tsutsui m_freem(sc->re_head);
2035 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
2036 1.1 jonathan }
2037 1.1 jonathan
2038 1.1 jonathan /* Free the TX list buffers. */
2039 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++) {
2040 1.52 tsutsui if (sc->re_ldata.re_txq[i].txq_mbuf != NULL) {
2041 1.1 jonathan bus_dmamap_unload(sc->sc_dmat,
2042 1.52 tsutsui sc->re_ldata.re_txq[i].txq_dmamap);
2043 1.52 tsutsui m_freem(sc->re_ldata.re_txq[i].txq_mbuf);
2044 1.52 tsutsui sc->re_ldata.re_txq[i].txq_mbuf = NULL;
2045 1.1 jonathan }
2046 1.1 jonathan }
2047 1.1 jonathan
2048 1.1 jonathan /* Free the RX list buffers. */
2049 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++) {
2050 1.52 tsutsui if (sc->re_ldata.re_rxsoft[i].rxs_mbuf != NULL) {
2051 1.1 jonathan bus_dmamap_unload(sc->sc_dmat,
2052 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_dmamap);
2053 1.52 tsutsui m_freem(sc->re_ldata.re_rxsoft[i].rxs_mbuf);
2054 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_mbuf = NULL;
2055 1.1 jonathan }
2056 1.1 jonathan }
2057 1.1 jonathan
2058 1.3 kanaoka if (disable)
2059 1.3 kanaoka re_disable(sc);
2060 1.3 kanaoka
2061 1.3 kanaoka ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2062 1.4 kanaoka ifp->if_timer = 0;
2063 1.1 jonathan }
2064