rtl8169.c revision 1.90.2.1 1 1.90.2.1 bouyer /* $NetBSD: rtl8169.c,v 1.90.2.1 2007/12/13 21:55:36 bouyer Exp $ */
2 1.1 jonathan
3 1.1 jonathan /*
4 1.1 jonathan * Copyright (c) 1997, 1998-2003
5 1.1 jonathan * Bill Paul <wpaul (at) windriver.com>. All rights reserved.
6 1.1 jonathan *
7 1.1 jonathan * Redistribution and use in source and binary forms, with or without
8 1.1 jonathan * modification, are permitted provided that the following conditions
9 1.1 jonathan * are met:
10 1.1 jonathan * 1. Redistributions of source code must retain the above copyright
11 1.1 jonathan * notice, this list of conditions and the following disclaimer.
12 1.1 jonathan * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jonathan * notice, this list of conditions and the following disclaimer in the
14 1.1 jonathan * documentation and/or other materials provided with the distribution.
15 1.1 jonathan * 3. All advertising materials mentioning features or use of this software
16 1.1 jonathan * must display the following acknowledgement:
17 1.1 jonathan * This product includes software developed by Bill Paul.
18 1.1 jonathan * 4. Neither the name of the author nor the names of any co-contributors
19 1.1 jonathan * may be used to endorse or promote products derived from this software
20 1.1 jonathan * without specific prior written permission.
21 1.1 jonathan *
22 1.1 jonathan * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 1.1 jonathan * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 1.1 jonathan * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 1.1 jonathan * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 1.1 jonathan * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 1.1 jonathan * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 1.1 jonathan * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.1 jonathan * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 1.1 jonathan * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 1.1 jonathan * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 1.1 jonathan * THE POSSIBILITY OF SUCH DAMAGE.
33 1.1 jonathan */
34 1.1 jonathan
35 1.1 jonathan #include <sys/cdefs.h>
36 1.90.2.1 bouyer __KERNEL_RCSID(0, "$NetBSD: rtl8169.c,v 1.90.2.1 2007/12/13 21:55:36 bouyer Exp $");
37 1.1 jonathan /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
38 1.1 jonathan
39 1.1 jonathan /*
40 1.1 jonathan * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
41 1.1 jonathan *
42 1.1 jonathan * Written by Bill Paul <wpaul (at) windriver.com>
43 1.1 jonathan * Senior Networking Software Engineer
44 1.1 jonathan * Wind River Systems
45 1.1 jonathan */
46 1.1 jonathan
47 1.1 jonathan /*
48 1.1 jonathan * This driver is designed to support RealTek's next generation of
49 1.1 jonathan * 10/100 and 10/100/1000 PCI ethernet controllers. There are currently
50 1.1 jonathan * four devices in this family: the RTL8139C+, the RTL8169, the RTL8169S
51 1.1 jonathan * and the RTL8110S.
52 1.1 jonathan *
53 1.1 jonathan * The 8139C+ is a 10/100 ethernet chip. It is backwards compatible
54 1.1 jonathan * with the older 8139 family, however it also supports a special
55 1.1 jonathan * C+ mode of operation that provides several new performance enhancing
56 1.1 jonathan * features. These include:
57 1.1 jonathan *
58 1.1 jonathan * o Descriptor based DMA mechanism. Each descriptor represents
59 1.1 jonathan * a single packet fragment. Data buffers may be aligned on
60 1.1 jonathan * any byte boundary.
61 1.1 jonathan *
62 1.1 jonathan * o 64-bit DMA
63 1.1 jonathan *
64 1.1 jonathan * o TCP/IP checksum offload for both RX and TX
65 1.1 jonathan *
66 1.1 jonathan * o High and normal priority transmit DMA rings
67 1.1 jonathan *
68 1.1 jonathan * o VLAN tag insertion and extraction
69 1.1 jonathan *
70 1.1 jonathan * o TCP large send (segmentation offload)
71 1.1 jonathan *
72 1.1 jonathan * Like the 8139, the 8139C+ also has a built-in 10/100 PHY. The C+
73 1.1 jonathan * programming API is fairly straightforward. The RX filtering, EEPROM
74 1.1 jonathan * access and PHY access is the same as it is on the older 8139 series
75 1.1 jonathan * chips.
76 1.1 jonathan *
77 1.1 jonathan * The 8169 is a 64-bit 10/100/1000 gigabit ethernet MAC. It has almost the
78 1.1 jonathan * same programming API and feature set as the 8139C+ with the following
79 1.1 jonathan * differences and additions:
80 1.1 jonathan *
81 1.1 jonathan * o 1000Mbps mode
82 1.1 jonathan *
83 1.1 jonathan * o Jumbo frames
84 1.1 jonathan *
85 1.1 jonathan * o GMII and TBI ports/registers for interfacing with copper
86 1.1 jonathan * or fiber PHYs
87 1.1 jonathan *
88 1.1 jonathan * o RX and TX DMA rings can have up to 1024 descriptors
89 1.1 jonathan * (the 8139C+ allows a maximum of 64)
90 1.1 jonathan *
91 1.1 jonathan * o Slight differences in register layout from the 8139C+
92 1.1 jonathan *
93 1.1 jonathan * The TX start and timer interrupt registers are at different locations
94 1.1 jonathan * on the 8169 than they are on the 8139C+. Also, the status word in the
95 1.1 jonathan * RX descriptor has a slightly different bit layout. The 8169 does not
96 1.1 jonathan * have a built-in PHY. Most reference boards use a Marvell 88E1000 'Alaska'
97 1.1 jonathan * copper gigE PHY.
98 1.1 jonathan *
99 1.1 jonathan * The 8169S/8110S 10/100/1000 devices have built-in copper gigE PHYs
100 1.1 jonathan * (the 'S' stands for 'single-chip'). These devices have the same
101 1.1 jonathan * programming API as the older 8169, but also have some vendor-specific
102 1.1 jonathan * registers for the on-board PHY. The 8110S is a LAN-on-motherboard
103 1.1 jonathan * part designed to be pin-compatible with the RealTek 8100 10/100 chip.
104 1.12 perry *
105 1.1 jonathan * This driver takes advantage of the RX and TX checksum offload and
106 1.1 jonathan * VLAN tag insertion/extraction features. It also implements TX
107 1.1 jonathan * interrupt moderation using the timer interrupt registers, which
108 1.1 jonathan * significantly reduces TX interrupt load. There is also support
109 1.1 jonathan * for jumbo frames, however the 8169/8169S/8110S can not transmit
110 1.1 jonathan * jumbo frames larger than 7.5K, so the max MTU possible with this
111 1.1 jonathan * driver is 7500 bytes.
112 1.1 jonathan */
113 1.1 jonathan
114 1.1 jonathan #include "bpfilter.h"
115 1.1 jonathan #include "vlan.h"
116 1.1 jonathan
117 1.1 jonathan #include <sys/param.h>
118 1.1 jonathan #include <sys/endian.h>
119 1.1 jonathan #include <sys/systm.h>
120 1.1 jonathan #include <sys/sockio.h>
121 1.1 jonathan #include <sys/mbuf.h>
122 1.1 jonathan #include <sys/malloc.h>
123 1.1 jonathan #include <sys/kernel.h>
124 1.1 jonathan #include <sys/socket.h>
125 1.1 jonathan #include <sys/device.h>
126 1.1 jonathan
127 1.1 jonathan #include <net/if.h>
128 1.1 jonathan #include <net/if_arp.h>
129 1.1 jonathan #include <net/if_dl.h>
130 1.1 jonathan #include <net/if_ether.h>
131 1.1 jonathan #include <net/if_media.h>
132 1.1 jonathan #include <net/if_vlanvar.h>
133 1.1 jonathan
134 1.13 yamt #include <netinet/in_systm.h> /* XXX for IP_MAXPACKET */
135 1.13 yamt #include <netinet/in.h> /* XXX for IP_MAXPACKET */
136 1.13 yamt #include <netinet/ip.h> /* XXX for IP_MAXPACKET */
137 1.13 yamt
138 1.1 jonathan #if NBPFILTER > 0
139 1.1 jonathan #include <net/bpf.h>
140 1.1 jonathan #endif
141 1.1 jonathan
142 1.89 ad #include <sys/bus.h>
143 1.1 jonathan
144 1.1 jonathan #include <dev/mii/mii.h>
145 1.1 jonathan #include <dev/mii/miivar.h>
146 1.1 jonathan
147 1.1 jonathan #include <dev/ic/rtl81x9reg.h>
148 1.1 jonathan #include <dev/ic/rtl81x9var.h>
149 1.1 jonathan
150 1.1 jonathan #include <dev/ic/rtl8169var.h>
151 1.1 jonathan
152 1.64 tsutsui static inline void re_set_bufaddr(struct re_desc *, bus_addr_t);
153 1.1 jonathan
154 1.4 kanaoka static int re_newbuf(struct rtk_softc *, int, struct mbuf *);
155 1.4 kanaoka static int re_rx_list_init(struct rtk_softc *);
156 1.4 kanaoka static int re_tx_list_init(struct rtk_softc *);
157 1.4 kanaoka static void re_rxeof(struct rtk_softc *);
158 1.4 kanaoka static void re_txeof(struct rtk_softc *);
159 1.4 kanaoka static void re_tick(void *);
160 1.4 kanaoka static void re_start(struct ifnet *);
161 1.83 christos static int re_ioctl(struct ifnet *, u_long, void *);
162 1.4 kanaoka static int re_init(struct ifnet *);
163 1.4 kanaoka static void re_stop(struct ifnet *, int);
164 1.4 kanaoka static void re_watchdog(struct ifnet *);
165 1.4 kanaoka
166 1.4 kanaoka static int re_enable(struct rtk_softc *);
167 1.4 kanaoka static void re_disable(struct rtk_softc *);
168 1.4 kanaoka
169 1.4 kanaoka static int re_ifmedia_upd(struct ifnet *);
170 1.4 kanaoka static void re_ifmedia_sts(struct ifnet *, struct ifmediareq *);
171 1.4 kanaoka
172 1.4 kanaoka static int re_gmii_readreg(struct device *, int, int);
173 1.4 kanaoka static void re_gmii_writereg(struct device *, int, int, int);
174 1.4 kanaoka
175 1.4 kanaoka static int re_miibus_readreg(struct device *, int, int);
176 1.4 kanaoka static void re_miibus_writereg(struct device *, int, int, int);
177 1.4 kanaoka static void re_miibus_statchg(struct device *);
178 1.1 jonathan
179 1.4 kanaoka static void re_reset(struct rtk_softc *);
180 1.1 jonathan
181 1.64 tsutsui static inline void
182 1.64 tsutsui re_set_bufaddr(struct re_desc *d, bus_addr_t addr)
183 1.64 tsutsui {
184 1.64 tsutsui
185 1.64 tsutsui d->re_bufaddr_lo = htole32((uint32_t)addr);
186 1.64 tsutsui if (sizeof(bus_addr_t) == sizeof(uint64_t))
187 1.64 tsutsui d->re_bufaddr_hi = htole32((uint64_t)addr >> 32);
188 1.64 tsutsui else
189 1.64 tsutsui d->re_bufaddr_hi = 0;
190 1.64 tsutsui }
191 1.64 tsutsui
192 1.1 jonathan static int
193 1.1 jonathan re_gmii_readreg(struct device *self, int phy, int reg)
194 1.1 jonathan {
195 1.1 jonathan struct rtk_softc *sc = (void *)self;
196 1.40 tsutsui uint32_t rval;
197 1.1 jonathan int i;
198 1.1 jonathan
199 1.1 jonathan if (phy != 7)
200 1.4 kanaoka return 0;
201 1.1 jonathan
202 1.1 jonathan /* Let the rgephy driver read the GMEDIASTAT register */
203 1.1 jonathan
204 1.1 jonathan if (reg == RTK_GMEDIASTAT) {
205 1.1 jonathan rval = CSR_READ_1(sc, RTK_GMEDIASTAT);
206 1.4 kanaoka return rval;
207 1.1 jonathan }
208 1.1 jonathan
209 1.1 jonathan CSR_WRITE_4(sc, RTK_PHYAR, reg << 16);
210 1.1 jonathan DELAY(1000);
211 1.1 jonathan
212 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
213 1.1 jonathan rval = CSR_READ_4(sc, RTK_PHYAR);
214 1.1 jonathan if (rval & RTK_PHYAR_BUSY)
215 1.1 jonathan break;
216 1.1 jonathan DELAY(100);
217 1.1 jonathan }
218 1.1 jonathan
219 1.1 jonathan if (i == RTK_TIMEOUT) {
220 1.4 kanaoka aprint_error("%s: PHY read failed\n", sc->sc_dev.dv_xname);
221 1.4 kanaoka return 0;
222 1.1 jonathan }
223 1.1 jonathan
224 1.4 kanaoka return rval & RTK_PHYAR_PHYDATA;
225 1.1 jonathan }
226 1.1 jonathan
227 1.1 jonathan static void
228 1.62 christos re_gmii_writereg(struct device *dev, int phy, int reg, int data)
229 1.1 jonathan {
230 1.1 jonathan struct rtk_softc *sc = (void *)dev;
231 1.40 tsutsui uint32_t rval;
232 1.1 jonathan int i;
233 1.1 jonathan
234 1.1 jonathan CSR_WRITE_4(sc, RTK_PHYAR, (reg << 16) |
235 1.1 jonathan (data & RTK_PHYAR_PHYDATA) | RTK_PHYAR_BUSY);
236 1.1 jonathan DELAY(1000);
237 1.1 jonathan
238 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
239 1.1 jonathan rval = CSR_READ_4(sc, RTK_PHYAR);
240 1.1 jonathan if (!(rval & RTK_PHYAR_BUSY))
241 1.1 jonathan break;
242 1.1 jonathan DELAY(100);
243 1.1 jonathan }
244 1.1 jonathan
245 1.1 jonathan if (i == RTK_TIMEOUT) {
246 1.4 kanaoka aprint_error("%s: PHY write reg %x <- %x failed\n",
247 1.4 kanaoka sc->sc_dev.dv_xname, reg, data);
248 1.1 jonathan }
249 1.1 jonathan }
250 1.1 jonathan
251 1.1 jonathan static int
252 1.1 jonathan re_miibus_readreg(struct device *dev, int phy, int reg)
253 1.1 jonathan {
254 1.1 jonathan struct rtk_softc *sc = (void *)dev;
255 1.40 tsutsui uint16_t rval = 0;
256 1.40 tsutsui uint16_t re8139_reg = 0;
257 1.1 jonathan int s;
258 1.1 jonathan
259 1.1 jonathan s = splnet();
260 1.1 jonathan
261 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0) {
262 1.1 jonathan rval = re_gmii_readreg(dev, phy, reg);
263 1.1 jonathan splx(s);
264 1.4 kanaoka return rval;
265 1.1 jonathan }
266 1.1 jonathan
267 1.1 jonathan /* Pretend the internal PHY is only at address 0 */
268 1.1 jonathan if (phy) {
269 1.1 jonathan splx(s);
270 1.4 kanaoka return 0;
271 1.1 jonathan }
272 1.4 kanaoka switch (reg) {
273 1.1 jonathan case MII_BMCR:
274 1.1 jonathan re8139_reg = RTK_BMCR;
275 1.1 jonathan break;
276 1.1 jonathan case MII_BMSR:
277 1.1 jonathan re8139_reg = RTK_BMSR;
278 1.1 jonathan break;
279 1.1 jonathan case MII_ANAR:
280 1.1 jonathan re8139_reg = RTK_ANAR;
281 1.1 jonathan break;
282 1.1 jonathan case MII_ANER:
283 1.1 jonathan re8139_reg = RTK_ANER;
284 1.1 jonathan break;
285 1.1 jonathan case MII_ANLPAR:
286 1.1 jonathan re8139_reg = RTK_LPAR;
287 1.1 jonathan break;
288 1.1 jonathan case MII_PHYIDR1:
289 1.1 jonathan case MII_PHYIDR2:
290 1.1 jonathan splx(s);
291 1.4 kanaoka return 0;
292 1.1 jonathan /*
293 1.1 jonathan * Allow the rlphy driver to read the media status
294 1.1 jonathan * register. If we have a link partner which does not
295 1.1 jonathan * support NWAY, this is the register which will tell
296 1.1 jonathan * us the results of parallel detection.
297 1.1 jonathan */
298 1.1 jonathan case RTK_MEDIASTAT:
299 1.1 jonathan rval = CSR_READ_1(sc, RTK_MEDIASTAT);
300 1.1 jonathan splx(s);
301 1.4 kanaoka return rval;
302 1.1 jonathan default:
303 1.4 kanaoka aprint_error("%s: bad phy register\n", sc->sc_dev.dv_xname);
304 1.1 jonathan splx(s);
305 1.4 kanaoka return 0;
306 1.1 jonathan }
307 1.1 jonathan rval = CSR_READ_2(sc, re8139_reg);
308 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0 && re8139_reg == RTK_BMCR) {
309 1.51 tsutsui /* 8139C+ has different bit layout. */
310 1.51 tsutsui rval &= ~(BMCR_LOOP | BMCR_ISO);
311 1.51 tsutsui }
312 1.1 jonathan splx(s);
313 1.4 kanaoka return rval;
314 1.1 jonathan }
315 1.1 jonathan
316 1.1 jonathan static void
317 1.1 jonathan re_miibus_writereg(struct device *dev, int phy, int reg, int data)
318 1.1 jonathan {
319 1.1 jonathan struct rtk_softc *sc = (void *)dev;
320 1.40 tsutsui uint16_t re8139_reg = 0;
321 1.1 jonathan int s;
322 1.1 jonathan
323 1.1 jonathan s = splnet();
324 1.1 jonathan
325 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0) {
326 1.1 jonathan re_gmii_writereg(dev, phy, reg, data);
327 1.1 jonathan splx(s);
328 1.1 jonathan return;
329 1.1 jonathan }
330 1.1 jonathan
331 1.1 jonathan /* Pretend the internal PHY is only at address 0 */
332 1.1 jonathan if (phy) {
333 1.1 jonathan splx(s);
334 1.1 jonathan return;
335 1.1 jonathan }
336 1.4 kanaoka switch (reg) {
337 1.1 jonathan case MII_BMCR:
338 1.1 jonathan re8139_reg = RTK_BMCR;
339 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0) {
340 1.51 tsutsui /* 8139C+ has different bit layout. */
341 1.51 tsutsui data &= ~(BMCR_LOOP | BMCR_ISO);
342 1.51 tsutsui }
343 1.1 jonathan break;
344 1.1 jonathan case MII_BMSR:
345 1.1 jonathan re8139_reg = RTK_BMSR;
346 1.1 jonathan break;
347 1.1 jonathan case MII_ANAR:
348 1.1 jonathan re8139_reg = RTK_ANAR;
349 1.1 jonathan break;
350 1.1 jonathan case MII_ANER:
351 1.1 jonathan re8139_reg = RTK_ANER;
352 1.1 jonathan break;
353 1.1 jonathan case MII_ANLPAR:
354 1.1 jonathan re8139_reg = RTK_LPAR;
355 1.1 jonathan break;
356 1.1 jonathan case MII_PHYIDR1:
357 1.1 jonathan case MII_PHYIDR2:
358 1.1 jonathan splx(s);
359 1.1 jonathan return;
360 1.1 jonathan break;
361 1.1 jonathan default:
362 1.4 kanaoka aprint_error("%s: bad phy register\n", sc->sc_dev.dv_xname);
363 1.1 jonathan splx(s);
364 1.1 jonathan return;
365 1.1 jonathan }
366 1.1 jonathan CSR_WRITE_2(sc, re8139_reg, data);
367 1.1 jonathan splx(s);
368 1.1 jonathan return;
369 1.1 jonathan }
370 1.1 jonathan
371 1.1 jonathan static void
372 1.62 christos re_miibus_statchg(struct device *dev)
373 1.1 jonathan {
374 1.1 jonathan
375 1.1 jonathan return;
376 1.1 jonathan }
377 1.1 jonathan
378 1.1 jonathan static void
379 1.1 jonathan re_reset(struct rtk_softc *sc)
380 1.1 jonathan {
381 1.41 tsutsui int i;
382 1.1 jonathan
383 1.1 jonathan CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_RESET);
384 1.1 jonathan
385 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
386 1.1 jonathan DELAY(10);
387 1.41 tsutsui if ((CSR_READ_1(sc, RTK_COMMAND) & RTK_CMD_RESET) == 0)
388 1.1 jonathan break;
389 1.1 jonathan }
390 1.1 jonathan if (i == RTK_TIMEOUT)
391 1.4 kanaoka aprint_error("%s: reset never completed!\n",
392 1.4 kanaoka sc->sc_dev.dv_xname);
393 1.1 jonathan
394 1.1 jonathan /*
395 1.1 jonathan * NB: Realtek-supplied Linux driver does this only for
396 1.1 jonathan * MCFG_METHOD_2, which corresponds to sc->sc_rev == 2.
397 1.1 jonathan */
398 1.4 kanaoka if (1) /* XXX check softc flag for 8169s version */
399 1.66 tsutsui CSR_WRITE_1(sc, RTK_LDPS, 1);
400 1.1 jonathan
401 1.1 jonathan return;
402 1.1 jonathan }
403 1.1 jonathan
404 1.1 jonathan /*
405 1.1 jonathan * The following routine is designed to test for a defect on some
406 1.1 jonathan * 32-bit 8169 cards. Some of these NICs have the REQ64# and ACK64#
407 1.1 jonathan * lines connected to the bus, however for a 32-bit only card, they
408 1.1 jonathan * should be pulled high. The result of this defect is that the
409 1.1 jonathan * NIC will not work right if you plug it into a 64-bit slot: DMA
410 1.1 jonathan * operations will be done with 64-bit transfers, which will fail
411 1.1 jonathan * because the 64-bit data lines aren't connected.
412 1.1 jonathan *
413 1.1 jonathan * There's no way to work around this (short of talking a soldering
414 1.1 jonathan * iron to the board), however we can detect it. The method we use
415 1.1 jonathan * here is to put the NIC into digital loopback mode, set the receiver
416 1.1 jonathan * to promiscuous mode, and then try to send a frame. We then compare
417 1.1 jonathan * the frame data we sent to what was received. If the data matches,
418 1.1 jonathan * then the NIC is working correctly, otherwise we know the user has
419 1.1 jonathan * a defective NIC which has been mistakenly plugged into a 64-bit PCI
420 1.1 jonathan * slot. In the latter case, there's no way the NIC can work correctly,
421 1.1 jonathan * so we print out a message on the console and abort the device attach.
422 1.1 jonathan */
423 1.1 jonathan
424 1.6 kanaoka int
425 1.1 jonathan re_diag(struct rtk_softc *sc)
426 1.1 jonathan {
427 1.1 jonathan struct ifnet *ifp = &sc->ethercom.ec_if;
428 1.1 jonathan struct mbuf *m0;
429 1.1 jonathan struct ether_header *eh;
430 1.52 tsutsui struct re_rxsoft *rxs;
431 1.52 tsutsui struct re_desc *cur_rx;
432 1.1 jonathan bus_dmamap_t dmamap;
433 1.40 tsutsui uint16_t status;
434 1.40 tsutsui uint32_t rxstat;
435 1.1 jonathan int total_len, i, s, error = 0;
436 1.40 tsutsui static const uint8_t dst[] = { 0x00, 'h', 'e', 'l', 'l', 'o' };
437 1.40 tsutsui static const uint8_t src[] = { 0x00, 'w', 'o', 'r', 'l', 'd' };
438 1.1 jonathan
439 1.1 jonathan /* Allocate a single mbuf */
440 1.1 jonathan
441 1.1 jonathan MGETHDR(m0, M_DONTWAIT, MT_DATA);
442 1.1 jonathan if (m0 == NULL)
443 1.4 kanaoka return ENOBUFS;
444 1.1 jonathan
445 1.1 jonathan /*
446 1.1 jonathan * Initialize the NIC in test mode. This sets the chip up
447 1.1 jonathan * so that it can send and receive frames, but performs the
448 1.1 jonathan * following special functions:
449 1.1 jonathan * - Puts receiver in promiscuous mode
450 1.1 jonathan * - Enables digital loopback mode
451 1.1 jonathan * - Leaves interrupts turned off
452 1.1 jonathan */
453 1.1 jonathan
454 1.1 jonathan ifp->if_flags |= IFF_PROMISC;
455 1.52 tsutsui sc->re_testmode = 1;
456 1.1 jonathan re_init(ifp);
457 1.6 kanaoka re_stop(ifp, 0);
458 1.1 jonathan DELAY(100000);
459 1.1 jonathan re_init(ifp);
460 1.1 jonathan
461 1.1 jonathan /* Put some data in the mbuf */
462 1.1 jonathan
463 1.1 jonathan eh = mtod(m0, struct ether_header *);
464 1.36 tsutsui memcpy(eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN);
465 1.36 tsutsui memcpy(eh->ether_shost, (char *)&src, ETHER_ADDR_LEN);
466 1.1 jonathan eh->ether_type = htons(ETHERTYPE_IP);
467 1.1 jonathan m0->m_pkthdr.len = m0->m_len = ETHER_MIN_LEN - ETHER_CRC_LEN;
468 1.1 jonathan
469 1.1 jonathan /*
470 1.1 jonathan * Queue the packet, start transmission.
471 1.1 jonathan */
472 1.1 jonathan
473 1.1 jonathan CSR_WRITE_2(sc, RTK_ISR, 0xFFFF);
474 1.1 jonathan s = splnet();
475 1.1 jonathan IF_ENQUEUE(&ifp->if_snd, m0);
476 1.1 jonathan re_start(ifp);
477 1.1 jonathan splx(s);
478 1.1 jonathan m0 = NULL;
479 1.1 jonathan
480 1.1 jonathan /* Wait for it to propagate through the chip */
481 1.1 jonathan
482 1.1 jonathan DELAY(100000);
483 1.1 jonathan for (i = 0; i < RTK_TIMEOUT; i++) {
484 1.1 jonathan status = CSR_READ_2(sc, RTK_ISR);
485 1.4 kanaoka if ((status & (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_RX_OK)) ==
486 1.4 kanaoka (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_RX_OK))
487 1.1 jonathan break;
488 1.1 jonathan DELAY(10);
489 1.1 jonathan }
490 1.1 jonathan if (i == RTK_TIMEOUT) {
491 1.4 kanaoka aprint_error("%s: diagnostic failed, failed to receive packet "
492 1.1 jonathan "in loopback mode\n", sc->sc_dev.dv_xname);
493 1.1 jonathan error = EIO;
494 1.1 jonathan goto done;
495 1.1 jonathan }
496 1.1 jonathan
497 1.1 jonathan /*
498 1.1 jonathan * The packet should have been dumped into the first
499 1.1 jonathan * entry in the RX DMA ring. Grab it from there.
500 1.1 jonathan */
501 1.1 jonathan
502 1.52 tsutsui rxs = &sc->re_ldata.re_rxsoft[0];
503 1.50 tsutsui dmamap = rxs->rxs_dmamap;
504 1.1 jonathan bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
505 1.20 briggs BUS_DMASYNC_POSTREAD);
506 1.50 tsutsui bus_dmamap_unload(sc->sc_dmat, dmamap);
507 1.1 jonathan
508 1.50 tsutsui m0 = rxs->rxs_mbuf;
509 1.50 tsutsui rxs->rxs_mbuf = NULL;
510 1.1 jonathan eh = mtod(m0, struct ether_header *);
511 1.1 jonathan
512 1.52 tsutsui RE_RXDESCSYNC(sc, 0, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
513 1.52 tsutsui cur_rx = &sc->re_ldata.re_rx_list[0];
514 1.52 tsutsui rxstat = le32toh(cur_rx->re_cmdstat);
515 1.52 tsutsui total_len = rxstat & sc->re_rxlenmask;
516 1.1 jonathan
517 1.1 jonathan if (total_len != ETHER_MIN_LEN) {
518 1.4 kanaoka aprint_error("%s: diagnostic failed, received short packet\n",
519 1.1 jonathan sc->sc_dev.dv_xname);
520 1.1 jonathan error = EIO;
521 1.1 jonathan goto done;
522 1.1 jonathan }
523 1.1 jonathan
524 1.1 jonathan /* Test that the received packet data matches what we sent. */
525 1.1 jonathan
526 1.36 tsutsui if (memcmp((char *)&eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN) ||
527 1.36 tsutsui memcmp((char *)&eh->ether_shost, (char *)&src, ETHER_ADDR_LEN) ||
528 1.1 jonathan ntohs(eh->ether_type) != ETHERTYPE_IP) {
529 1.4 kanaoka aprint_error("%s: WARNING, DMA FAILURE!\n",
530 1.4 kanaoka sc->sc_dev.dv_xname);
531 1.4 kanaoka aprint_error("%s: expected TX data: %s",
532 1.1 jonathan sc->sc_dev.dv_xname, ether_sprintf(dst));
533 1.4 kanaoka aprint_error("/%s/0x%x\n", ether_sprintf(src), ETHERTYPE_IP);
534 1.4 kanaoka aprint_error("%s: received RX data: %s",
535 1.1 jonathan sc->sc_dev.dv_xname,
536 1.1 jonathan ether_sprintf(eh->ether_dhost));
537 1.4 kanaoka aprint_error("/%s/0x%x\n", ether_sprintf(eh->ether_shost),
538 1.1 jonathan ntohs(eh->ether_type));
539 1.4 kanaoka aprint_error("%s: You may have a defective 32-bit NIC plugged "
540 1.1 jonathan "into a 64-bit PCI slot.\n", sc->sc_dev.dv_xname);
541 1.4 kanaoka aprint_error("%s: Please re-install the NIC in a 32-bit slot "
542 1.1 jonathan "for proper operation.\n", sc->sc_dev.dv_xname);
543 1.4 kanaoka aprint_error("%s: Read the re(4) man page for more details.\n",
544 1.1 jonathan sc->sc_dev.dv_xname);
545 1.1 jonathan error = EIO;
546 1.1 jonathan }
547 1.1 jonathan
548 1.41 tsutsui done:
549 1.1 jonathan /* Turn interface off, release resources */
550 1.1 jonathan
551 1.52 tsutsui sc->re_testmode = 0;
552 1.1 jonathan ifp->if_flags &= ~IFF_PROMISC;
553 1.6 kanaoka re_stop(ifp, 0);
554 1.1 jonathan if (m0 != NULL)
555 1.1 jonathan m_freem(m0);
556 1.1 jonathan
557 1.4 kanaoka return error;
558 1.1 jonathan }
559 1.1 jonathan
560 1.1 jonathan
561 1.1 jonathan /*
562 1.1 jonathan * Attach the interface. Allocate softc structures, do ifmedia
563 1.1 jonathan * setup and ethernet/BPF attach.
564 1.1 jonathan */
565 1.1 jonathan void
566 1.1 jonathan re_attach(struct rtk_softc *sc)
567 1.1 jonathan {
568 1.1 jonathan u_char eaddr[ETHER_ADDR_LEN];
569 1.40 tsutsui uint16_t val;
570 1.1 jonathan struct ifnet *ifp;
571 1.1 jonathan int error = 0, i, addr_len;
572 1.1 jonathan
573 1.1 jonathan /* Reset the adapter. */
574 1.1 jonathan re_reset(sc);
575 1.1 jonathan
576 1.77 tsutsui if (rtk_read_eeprom(sc, RTK_EE_ID, RTK_EEADDR_LEN1) == 0x8129)
577 1.77 tsutsui addr_len = RTK_EEADDR_LEN1;
578 1.77 tsutsui else
579 1.77 tsutsui addr_len = RTK_EEADDR_LEN0;
580 1.77 tsutsui
581 1.77 tsutsui /*
582 1.77 tsutsui * Get station address from the EEPROM.
583 1.77 tsutsui */
584 1.77 tsutsui for (i = 0; i < 3; i++) {
585 1.77 tsutsui val = rtk_read_eeprom(sc, RTK_EE_EADDR0 + i, addr_len);
586 1.77 tsutsui eaddr[(i * 2) + 0] = val & 0xff;
587 1.77 tsutsui eaddr[(i * 2) + 1] = val >> 8;
588 1.77 tsutsui }
589 1.77 tsutsui
590 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0) {
591 1.1 jonathan uint32_t hwrev;
592 1.1 jonathan
593 1.1 jonathan /* Revision of 8169/8169S/8110s in bits 30..26, 23 */
594 1.78 tsutsui hwrev = CSR_READ_4(sc, RTK_TXCFG) & RTK_TXCFG_HWREV;
595 1.78 tsutsui /* These rev numbers are taken from Realtek's driver */
596 1.80 tsutsui if ( hwrev == RTK_HWREV_8100E_SPIN2) {
597 1.78 tsutsui sc->sc_rev = 15;
598 1.78 tsutsui } else if (hwrev == RTK_HWREV_8100E) {
599 1.78 tsutsui sc->sc_rev = 14;
600 1.78 tsutsui } else if (hwrev == RTK_HWREV_8101E) {
601 1.78 tsutsui sc->sc_rev = 13;
602 1.84 tsutsui } else if (hwrev == RTK_HWREV_8168_SPIN2 ||
603 1.84 tsutsui hwrev == RTK_HWREV_8168_SPIN3) {
604 1.78 tsutsui sc->sc_rev = 12;
605 1.78 tsutsui } else if (hwrev == RTK_HWREV_8168_SPIN1) {
606 1.78 tsutsui sc->sc_rev = 11;
607 1.78 tsutsui } else if (hwrev == RTK_HWREV_8169_8110SC) {
608 1.78 tsutsui sc->sc_rev = 5;
609 1.78 tsutsui } else if (hwrev == RTK_HWREV_8169_8110SB) {
610 1.1 jonathan sc->sc_rev = 4;
611 1.78 tsutsui } else if (hwrev == RTK_HWREV_8169S) {
612 1.1 jonathan sc->sc_rev = 3;
613 1.78 tsutsui } else if (hwrev == RTK_HWREV_8110S) {
614 1.1 jonathan sc->sc_rev = 2;
615 1.84 tsutsui } else if (hwrev == RTK_HWREV_8169) {
616 1.1 jonathan sc->sc_rev = 1;
617 1.84 tsutsui sc->sc_quirk |= RTKQ_8169NONS;
618 1.84 tsutsui } else {
619 1.84 tsutsui aprint_normal("%s: Unknown revision (0x%08x)\n",
620 1.84 tsutsui sc->sc_dev.dv_xname, hwrev);
621 1.84 tsutsui /* assume the latest one */
622 1.84 tsutsui sc->sc_rev = 15;
623 1.84 tsutsui }
624 1.1 jonathan
625 1.1 jonathan /* Set RX length mask */
626 1.52 tsutsui sc->re_rxlenmask = RE_RDESC_STAT_GFRAGLEN;
627 1.52 tsutsui sc->re_ldata.re_tx_desc_cnt = RE_TX_DESC_CNT_8169;
628 1.1 jonathan } else {
629 1.1 jonathan /* Set RX length mask */
630 1.52 tsutsui sc->re_rxlenmask = RE_RDESC_STAT_FRAGLEN;
631 1.52 tsutsui sc->re_ldata.re_tx_desc_cnt = RE_TX_DESC_CNT_8139;
632 1.1 jonathan }
633 1.1 jonathan
634 1.1 jonathan aprint_normal("%s: Ethernet address %s\n",
635 1.1 jonathan sc->sc_dev.dv_xname, ether_sprintf(eaddr));
636 1.1 jonathan
637 1.52 tsutsui if (sc->re_ldata.re_tx_desc_cnt >
638 1.52 tsutsui PAGE_SIZE / sizeof(struct re_desc)) {
639 1.52 tsutsui sc->re_ldata.re_tx_desc_cnt =
640 1.52 tsutsui PAGE_SIZE / sizeof(struct re_desc);
641 1.15 yamt }
642 1.15 yamt
643 1.15 yamt aprint_verbose("%s: using %d tx descriptors\n",
644 1.52 tsutsui sc->sc_dev.dv_xname, sc->re_ldata.re_tx_desc_cnt);
645 1.65 tsutsui KASSERT(RE_NEXT_TX_DESC(sc, RE_TX_DESC_CNT(sc) - 1) == 0);
646 1.1 jonathan
647 1.5 kanaoka /* Allocate DMA'able memory for the TX ring */
648 1.52 tsutsui if ((error = bus_dmamem_alloc(sc->sc_dmat, RE_TX_LIST_SZ(sc),
649 1.52 tsutsui RE_RING_ALIGN, 0, &sc->re_ldata.re_tx_listseg, 1,
650 1.52 tsutsui &sc->re_ldata.re_tx_listnseg, BUS_DMA_NOWAIT)) != 0) {
651 1.5 kanaoka aprint_error("%s: can't allocate tx listseg, error = %d\n",
652 1.5 kanaoka sc->sc_dev.dv_xname, error);
653 1.5 kanaoka goto fail_0;
654 1.5 kanaoka }
655 1.5 kanaoka
656 1.5 kanaoka /* Load the map for the TX ring. */
657 1.52 tsutsui if ((error = bus_dmamem_map(sc->sc_dmat, &sc->re_ldata.re_tx_listseg,
658 1.52 tsutsui sc->re_ldata.re_tx_listnseg, RE_TX_LIST_SZ(sc),
659 1.83 christos (void **)&sc->re_ldata.re_tx_list,
660 1.41 tsutsui BUS_DMA_COHERENT | BUS_DMA_NOWAIT)) != 0) {
661 1.5 kanaoka aprint_error("%s: can't map tx list, error = %d\n",
662 1.5 kanaoka sc->sc_dev.dv_xname, error);
663 1.5 kanaoka goto fail_1;
664 1.5 kanaoka }
665 1.52 tsutsui memset(sc->re_ldata.re_tx_list, 0, RE_TX_LIST_SZ(sc));
666 1.5 kanaoka
667 1.52 tsutsui if ((error = bus_dmamap_create(sc->sc_dmat, RE_TX_LIST_SZ(sc), 1,
668 1.52 tsutsui RE_TX_LIST_SZ(sc), 0, 0,
669 1.52 tsutsui &sc->re_ldata.re_tx_list_map)) != 0) {
670 1.5 kanaoka aprint_error("%s: can't create tx list map, error = %d\n",
671 1.5 kanaoka sc->sc_dev.dv_xname, error);
672 1.5 kanaoka goto fail_2;
673 1.5 kanaoka }
674 1.5 kanaoka
675 1.5 kanaoka
676 1.12 perry if ((error = bus_dmamap_load(sc->sc_dmat,
677 1.52 tsutsui sc->re_ldata.re_tx_list_map, sc->re_ldata.re_tx_list,
678 1.52 tsutsui RE_TX_LIST_SZ(sc), NULL, BUS_DMA_NOWAIT)) != 0) {
679 1.5 kanaoka aprint_error("%s: can't load tx list, error = %d\n",
680 1.5 kanaoka sc->sc_dev.dv_xname, error);
681 1.5 kanaoka goto fail_3;
682 1.5 kanaoka }
683 1.5 kanaoka
684 1.5 kanaoka /* Create DMA maps for TX buffers */
685 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++) {
686 1.13 yamt error = bus_dmamap_create(sc->sc_dmat,
687 1.13 yamt round_page(IP_MAXPACKET),
688 1.59 tsutsui RE_TX_DESC_CNT(sc) - RE_NTXDESC_RSVD, RE_TDESC_CMD_FRAGLEN,
689 1.59 tsutsui 0, 0, &sc->re_ldata.re_txq[i].txq_dmamap);
690 1.5 kanaoka if (error) {
691 1.5 kanaoka aprint_error("%s: can't create DMA map for TX\n",
692 1.5 kanaoka sc->sc_dev.dv_xname);
693 1.5 kanaoka goto fail_4;
694 1.5 kanaoka }
695 1.5 kanaoka }
696 1.5 kanaoka
697 1.5 kanaoka /* Allocate DMA'able memory for the RX ring */
698 1.71 tsutsui /* XXX see also a comment about RE_RX_DMAMEM_SZ in rtl81x9var.h */
699 1.63 tsutsui if ((error = bus_dmamem_alloc(sc->sc_dmat,
700 1.71 tsutsui RE_RX_DMAMEM_SZ, RE_RING_ALIGN, 0, &sc->re_ldata.re_rx_listseg, 1,
701 1.52 tsutsui &sc->re_ldata.re_rx_listnseg, BUS_DMA_NOWAIT)) != 0) {
702 1.5 kanaoka aprint_error("%s: can't allocate rx listseg, error = %d\n",
703 1.5 kanaoka sc->sc_dev.dv_xname, error);
704 1.5 kanaoka goto fail_4;
705 1.5 kanaoka }
706 1.5 kanaoka
707 1.5 kanaoka /* Load the map for the RX ring. */
708 1.52 tsutsui if ((error = bus_dmamem_map(sc->sc_dmat, &sc->re_ldata.re_rx_listseg,
709 1.71 tsutsui sc->re_ldata.re_rx_listnseg, RE_RX_DMAMEM_SZ,
710 1.83 christos (void **)&sc->re_ldata.re_rx_list,
711 1.41 tsutsui BUS_DMA_COHERENT | BUS_DMA_NOWAIT)) != 0) {
712 1.5 kanaoka aprint_error("%s: can't map rx list, error = %d\n",
713 1.5 kanaoka sc->sc_dev.dv_xname, error);
714 1.5 kanaoka goto fail_5;
715 1.5 kanaoka }
716 1.71 tsutsui memset(sc->re_ldata.re_rx_list, 0, RE_RX_DMAMEM_SZ);
717 1.5 kanaoka
718 1.63 tsutsui if ((error = bus_dmamap_create(sc->sc_dmat,
719 1.71 tsutsui RE_RX_DMAMEM_SZ, 1, RE_RX_DMAMEM_SZ, 0, 0,
720 1.52 tsutsui &sc->re_ldata.re_rx_list_map)) != 0) {
721 1.5 kanaoka aprint_error("%s: can't create rx list map, error = %d\n",
722 1.5 kanaoka sc->sc_dev.dv_xname, error);
723 1.5 kanaoka goto fail_6;
724 1.5 kanaoka }
725 1.5 kanaoka
726 1.5 kanaoka if ((error = bus_dmamap_load(sc->sc_dmat,
727 1.52 tsutsui sc->re_ldata.re_rx_list_map, sc->re_ldata.re_rx_list,
728 1.71 tsutsui RE_RX_DMAMEM_SZ, NULL, BUS_DMA_NOWAIT)) != 0) {
729 1.5 kanaoka aprint_error("%s: can't load rx list, error = %d\n",
730 1.5 kanaoka sc->sc_dev.dv_xname, error);
731 1.5 kanaoka goto fail_7;
732 1.5 kanaoka }
733 1.5 kanaoka
734 1.5 kanaoka /* Create DMA maps for RX buffers */
735 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++) {
736 1.5 kanaoka error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
737 1.52 tsutsui 0, 0, &sc->re_ldata.re_rxsoft[i].rxs_dmamap);
738 1.5 kanaoka if (error) {
739 1.5 kanaoka aprint_error("%s: can't create DMA map for RX\n",
740 1.5 kanaoka sc->sc_dev.dv_xname);
741 1.5 kanaoka goto fail_8;
742 1.5 kanaoka }
743 1.1 jonathan }
744 1.1 jonathan
745 1.6 kanaoka /*
746 1.6 kanaoka * Record interface as attached. From here, we should not fail.
747 1.6 kanaoka */
748 1.6 kanaoka sc->sc_flags |= RTK_ATTACHED;
749 1.6 kanaoka
750 1.1 jonathan ifp = &sc->ethercom.ec_if;
751 1.1 jonathan ifp->if_softc = sc;
752 1.1 jonathan strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
753 1.1 jonathan ifp->if_mtu = ETHERMTU;
754 1.1 jonathan ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
755 1.1 jonathan ifp->if_ioctl = re_ioctl;
756 1.74 tsutsui sc->ethercom.ec_capabilities |=
757 1.74 tsutsui ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING;
758 1.1 jonathan ifp->if_start = re_start;
759 1.3 kanaoka ifp->if_stop = re_stop;
760 1.19 yamt
761 1.19 yamt /*
762 1.67 tsutsui * IFCAP_CSUM_IPv4_Tx on re(4) is broken for small packets,
763 1.67 tsutsui * so we have a workaround to handle the bug by padding
764 1.67 tsutsui * such packets manually.
765 1.19 yamt */
766 1.1 jonathan ifp->if_capabilities |=
767 1.63 tsutsui IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
768 1.18 yamt IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
769 1.18 yamt IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
770 1.13 yamt IFCAP_TSOv4;
771 1.1 jonathan ifp->if_watchdog = re_watchdog;
772 1.1 jonathan ifp->if_init = re_init;
773 1.52 tsutsui ifp->if_snd.ifq_maxlen = RE_IFQ_MAXLEN;
774 1.1 jonathan ifp->if_capenable = ifp->if_capabilities;
775 1.1 jonathan IFQ_SET_READY(&ifp->if_snd);
776 1.1 jonathan
777 1.86 ad callout_init(&sc->rtk_tick_ch, 0);
778 1.1 jonathan
779 1.1 jonathan /* Do MII setup */
780 1.1 jonathan sc->mii.mii_ifp = ifp;
781 1.1 jonathan sc->mii.mii_readreg = re_miibus_readreg;
782 1.1 jonathan sc->mii.mii_writereg = re_miibus_writereg;
783 1.1 jonathan sc->mii.mii_statchg = re_miibus_statchg;
784 1.1 jonathan ifmedia_init(&sc->mii.mii_media, IFM_IMASK, re_ifmedia_upd,
785 1.1 jonathan re_ifmedia_sts);
786 1.1 jonathan mii_attach(&sc->sc_dev, &sc->mii, 0xffffffff, MII_PHY_ANY,
787 1.1 jonathan MII_OFFSET_ANY, 0);
788 1.4 kanaoka ifmedia_set(&sc->mii.mii_media, IFM_ETHER | IFM_AUTO);
789 1.1 jonathan
790 1.1 jonathan /*
791 1.1 jonathan * Call MI attach routine.
792 1.1 jonathan */
793 1.1 jonathan if_attach(ifp);
794 1.1 jonathan ether_ifattach(ifp, eaddr);
795 1.1 jonathan
796 1.5 kanaoka return;
797 1.5 kanaoka
798 1.41 tsutsui fail_8:
799 1.5 kanaoka /* Destroy DMA maps for RX buffers. */
800 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++)
801 1.52 tsutsui if (sc->re_ldata.re_rxsoft[i].rxs_dmamap != NULL)
802 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
803 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_dmamap);
804 1.5 kanaoka
805 1.5 kanaoka /* Free DMA'able memory for the RX ring. */
806 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
807 1.41 tsutsui fail_7:
808 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
809 1.41 tsutsui fail_6:
810 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
811 1.83 christos (void *)sc->re_ldata.re_rx_list, RE_RX_DMAMEM_SZ);
812 1.41 tsutsui fail_5:
813 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
814 1.52 tsutsui &sc->re_ldata.re_rx_listseg, sc->re_ldata.re_rx_listnseg);
815 1.5 kanaoka
816 1.41 tsutsui fail_4:
817 1.5 kanaoka /* Destroy DMA maps for TX buffers. */
818 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++)
819 1.52 tsutsui if (sc->re_ldata.re_txq[i].txq_dmamap != NULL)
820 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
821 1.52 tsutsui sc->re_ldata.re_txq[i].txq_dmamap);
822 1.5 kanaoka
823 1.5 kanaoka /* Free DMA'able memory for the TX ring. */
824 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
825 1.41 tsutsui fail_3:
826 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
827 1.41 tsutsui fail_2:
828 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
829 1.83 christos (void *)sc->re_ldata.re_tx_list, RE_TX_LIST_SZ(sc));
830 1.41 tsutsui fail_1:
831 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
832 1.52 tsutsui &sc->re_ldata.re_tx_listseg, sc->re_ldata.re_tx_listnseg);
833 1.41 tsutsui fail_0:
834 1.1 jonathan return;
835 1.1 jonathan }
836 1.1 jonathan
837 1.1 jonathan
838 1.1 jonathan /*
839 1.1 jonathan * re_activate:
840 1.1 jonathan * Handle device activation/deactivation requests.
841 1.1 jonathan */
842 1.1 jonathan int
843 1.1 jonathan re_activate(struct device *self, enum devact act)
844 1.1 jonathan {
845 1.41 tsutsui struct rtk_softc *sc = (void *)self;
846 1.1 jonathan int s, error = 0;
847 1.1 jonathan
848 1.1 jonathan s = splnet();
849 1.1 jonathan switch (act) {
850 1.1 jonathan case DVACT_ACTIVATE:
851 1.1 jonathan error = EOPNOTSUPP;
852 1.1 jonathan break;
853 1.1 jonathan case DVACT_DEACTIVATE:
854 1.1 jonathan mii_activate(&sc->mii, act, MII_PHY_ANY, MII_OFFSET_ANY);
855 1.1 jonathan if_deactivate(&sc->ethercom.ec_if);
856 1.1 jonathan break;
857 1.1 jonathan }
858 1.1 jonathan splx(s);
859 1.1 jonathan
860 1.4 kanaoka return error;
861 1.1 jonathan }
862 1.1 jonathan
863 1.1 jonathan /*
864 1.1 jonathan * re_detach:
865 1.1 jonathan * Detach a rtk interface.
866 1.1 jonathan */
867 1.1 jonathan int
868 1.1 jonathan re_detach(struct rtk_softc *sc)
869 1.1 jonathan {
870 1.1 jonathan struct ifnet *ifp = &sc->ethercom.ec_if;
871 1.5 kanaoka int i;
872 1.1 jonathan
873 1.1 jonathan /*
874 1.1 jonathan * Succeed now if there isn't any work to do.
875 1.1 jonathan */
876 1.1 jonathan if ((sc->sc_flags & RTK_ATTACHED) == 0)
877 1.4 kanaoka return 0;
878 1.1 jonathan
879 1.1 jonathan /* Unhook our tick handler. */
880 1.1 jonathan callout_stop(&sc->rtk_tick_ch);
881 1.1 jonathan
882 1.1 jonathan /* Detach all PHYs. */
883 1.1 jonathan mii_detach(&sc->mii, MII_PHY_ANY, MII_OFFSET_ANY);
884 1.1 jonathan
885 1.1 jonathan /* Delete all remaining media. */
886 1.1 jonathan ifmedia_delete_instance(&sc->mii.mii_media, IFM_INST_ANY);
887 1.1 jonathan
888 1.1 jonathan ether_ifdetach(ifp);
889 1.1 jonathan if_detach(ifp);
890 1.1 jonathan
891 1.5 kanaoka /* Destroy DMA maps for RX buffers. */
892 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++)
893 1.52 tsutsui if (sc->re_ldata.re_rxsoft[i].rxs_dmamap != NULL)
894 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
895 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_dmamap);
896 1.5 kanaoka
897 1.5 kanaoka /* Free DMA'able memory for the RX ring. */
898 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
899 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_rx_list_map);
900 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
901 1.83 christos (void *)sc->re_ldata.re_rx_list, RE_RX_DMAMEM_SZ);
902 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
903 1.52 tsutsui &sc->re_ldata.re_rx_listseg, sc->re_ldata.re_rx_listnseg);
904 1.5 kanaoka
905 1.5 kanaoka /* Destroy DMA maps for TX buffers. */
906 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++)
907 1.52 tsutsui if (sc->re_ldata.re_txq[i].txq_dmamap != NULL)
908 1.5 kanaoka bus_dmamap_destroy(sc->sc_dmat,
909 1.52 tsutsui sc->re_ldata.re_txq[i].txq_dmamap);
910 1.5 kanaoka
911 1.5 kanaoka /* Free DMA'able memory for the TX ring. */
912 1.52 tsutsui bus_dmamap_unload(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
913 1.52 tsutsui bus_dmamap_destroy(sc->sc_dmat, sc->re_ldata.re_tx_list_map);
914 1.5 kanaoka bus_dmamem_unmap(sc->sc_dmat,
915 1.83 christos (void *)sc->re_ldata.re_tx_list, RE_TX_LIST_SZ(sc));
916 1.5 kanaoka bus_dmamem_free(sc->sc_dmat,
917 1.52 tsutsui &sc->re_ldata.re_tx_listseg, sc->re_ldata.re_tx_listnseg);
918 1.5 kanaoka
919 1.4 kanaoka return 0;
920 1.1 jonathan }
921 1.1 jonathan
922 1.1 jonathan /*
923 1.1 jonathan * re_enable:
924 1.1 jonathan * Enable the RTL81X9 chip.
925 1.1 jonathan */
926 1.12 perry static int
927 1.1 jonathan re_enable(struct rtk_softc *sc)
928 1.1 jonathan {
929 1.41 tsutsui
930 1.1 jonathan if (RTK_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
931 1.1 jonathan if ((*sc->sc_enable)(sc) != 0) {
932 1.4 kanaoka aprint_error("%s: device enable failed\n",
933 1.1 jonathan sc->sc_dev.dv_xname);
934 1.4 kanaoka return EIO;
935 1.1 jonathan }
936 1.1 jonathan sc->sc_flags |= RTK_ENABLED;
937 1.1 jonathan }
938 1.4 kanaoka return 0;
939 1.1 jonathan }
940 1.1 jonathan
941 1.1 jonathan /*
942 1.1 jonathan * re_disable:
943 1.1 jonathan * Disable the RTL81X9 chip.
944 1.1 jonathan */
945 1.12 perry static void
946 1.1 jonathan re_disable(struct rtk_softc *sc)
947 1.1 jonathan {
948 1.1 jonathan
949 1.1 jonathan if (RTK_IS_ENABLED(sc) && sc->sc_disable != NULL) {
950 1.1 jonathan (*sc->sc_disable)(sc);
951 1.1 jonathan sc->sc_flags &= ~RTK_ENABLED;
952 1.1 jonathan }
953 1.1 jonathan }
954 1.1 jonathan
955 1.1 jonathan static int
956 1.1 jonathan re_newbuf(struct rtk_softc *sc, int idx, struct mbuf *m)
957 1.1 jonathan {
958 1.1 jonathan struct mbuf *n = NULL;
959 1.1 jonathan bus_dmamap_t map;
960 1.52 tsutsui struct re_desc *d;
961 1.52 tsutsui struct re_rxsoft *rxs;
962 1.40 tsutsui uint32_t cmdstat;
963 1.1 jonathan int error;
964 1.1 jonathan
965 1.1 jonathan if (m == NULL) {
966 1.1 jonathan MGETHDR(n, M_DONTWAIT, MT_DATA);
967 1.1 jonathan if (n == NULL)
968 1.4 kanaoka return ENOBUFS;
969 1.1 jonathan
970 1.42 tsutsui MCLGET(n, M_DONTWAIT);
971 1.42 tsutsui if ((n->m_flags & M_EXT) == 0) {
972 1.42 tsutsui m_freem(n);
973 1.4 kanaoka return ENOBUFS;
974 1.1 jonathan }
975 1.42 tsutsui m = n;
976 1.1 jonathan } else
977 1.1 jonathan m->m_data = m->m_ext.ext_buf;
978 1.1 jonathan
979 1.1 jonathan /*
980 1.1 jonathan * Initialize mbuf length fields and fixup
981 1.1 jonathan * alignment so that the frame payload is
982 1.1 jonathan * longword aligned.
983 1.1 jonathan */
984 1.61 tsutsui m->m_len = m->m_pkthdr.len = MCLBYTES - RE_ETHER_ALIGN;
985 1.61 tsutsui m->m_data += RE_ETHER_ALIGN;
986 1.1 jonathan
987 1.52 tsutsui rxs = &sc->re_ldata.re_rxsoft[idx];
988 1.50 tsutsui map = rxs->rxs_dmamap;
989 1.21 yamt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
990 1.21 yamt BUS_DMA_READ|BUS_DMA_NOWAIT);
991 1.1 jonathan
992 1.1 jonathan if (error)
993 1.1 jonathan goto out;
994 1.1 jonathan
995 1.33 tsutsui bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
996 1.33 tsutsui BUS_DMASYNC_PREREAD);
997 1.33 tsutsui
998 1.52 tsutsui d = &sc->re_ldata.re_rx_list[idx];
999 1.76 tsutsui #ifdef DIAGNOSTIC
1000 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1001 1.52 tsutsui cmdstat = le32toh(d->re_cmdstat);
1002 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD);
1003 1.52 tsutsui if (cmdstat & RE_RDESC_STAT_OWN) {
1004 1.76 tsutsui panic("%s: tried to map busy RX descriptor",
1005 1.32 tsutsui sc->sc_dev.dv_xname);
1006 1.32 tsutsui }
1007 1.76 tsutsui #endif
1008 1.1 jonathan
1009 1.50 tsutsui rxs->rxs_mbuf = m;
1010 1.50 tsutsui
1011 1.74 tsutsui d->re_vlanctl = 0;
1012 1.1 jonathan cmdstat = map->dm_segs[0].ds_len;
1013 1.52 tsutsui if (idx == (RE_RX_DESC_CNT - 1))
1014 1.52 tsutsui cmdstat |= RE_RDESC_CMD_EOR;
1015 1.64 tsutsui re_set_bufaddr(d, map->dm_segs[0].ds_addr);
1016 1.52 tsutsui d->re_cmdstat = htole32(cmdstat);
1017 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1018 1.52 tsutsui cmdstat |= RE_RDESC_CMD_OWN;
1019 1.52 tsutsui d->re_cmdstat = htole32(cmdstat);
1020 1.52 tsutsui RE_RXDESCSYNC(sc, idx, BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1021 1.1 jonathan
1022 1.1 jonathan return 0;
1023 1.42 tsutsui out:
1024 1.1 jonathan if (n != NULL)
1025 1.1 jonathan m_freem(n);
1026 1.1 jonathan return ENOMEM;
1027 1.1 jonathan }
1028 1.1 jonathan
1029 1.1 jonathan static int
1030 1.1 jonathan re_tx_list_init(struct rtk_softc *sc)
1031 1.1 jonathan {
1032 1.15 yamt int i;
1033 1.15 yamt
1034 1.52 tsutsui memset(sc->re_ldata.re_tx_list, 0, RE_TX_LIST_SZ(sc));
1035 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++) {
1036 1.52 tsutsui sc->re_ldata.re_txq[i].txq_mbuf = NULL;
1037 1.15 yamt }
1038 1.1 jonathan
1039 1.1 jonathan bus_dmamap_sync(sc->sc_dmat,
1040 1.52 tsutsui sc->re_ldata.re_tx_list_map, 0,
1041 1.52 tsutsui sc->re_ldata.re_tx_list_map->dm_mapsize,
1042 1.32 tsutsui BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1043 1.52 tsutsui sc->re_ldata.re_txq_prodidx = 0;
1044 1.52 tsutsui sc->re_ldata.re_txq_considx = 0;
1045 1.59 tsutsui sc->re_ldata.re_txq_free = RE_TX_QLEN;
1046 1.52 tsutsui sc->re_ldata.re_tx_free = RE_TX_DESC_CNT(sc);
1047 1.52 tsutsui sc->re_ldata.re_tx_nextfree = 0;
1048 1.1 jonathan
1049 1.4 kanaoka return 0;
1050 1.1 jonathan }
1051 1.1 jonathan
1052 1.1 jonathan static int
1053 1.1 jonathan re_rx_list_init(struct rtk_softc *sc)
1054 1.1 jonathan {
1055 1.1 jonathan int i;
1056 1.1 jonathan
1057 1.52 tsutsui memset((char *)sc->re_ldata.re_rx_list, 0, RE_RX_LIST_SZ);
1058 1.1 jonathan
1059 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++) {
1060 1.1 jonathan if (re_newbuf(sc, i, NULL) == ENOBUFS)
1061 1.4 kanaoka return ENOBUFS;
1062 1.1 jonathan }
1063 1.1 jonathan
1064 1.52 tsutsui sc->re_ldata.re_rx_prodidx = 0;
1065 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1066 1.1 jonathan
1067 1.4 kanaoka return 0;
1068 1.1 jonathan }
1069 1.1 jonathan
1070 1.1 jonathan /*
1071 1.1 jonathan * RX handler for C+ and 8169. For the gigE chips, we support
1072 1.1 jonathan * the reception of jumbo frames that have been fragmented
1073 1.1 jonathan * across multiple 2K mbuf cluster buffers.
1074 1.1 jonathan */
1075 1.1 jonathan static void
1076 1.1 jonathan re_rxeof(struct rtk_softc *sc)
1077 1.1 jonathan {
1078 1.1 jonathan struct mbuf *m;
1079 1.1 jonathan struct ifnet *ifp;
1080 1.1 jonathan int i, total_len;
1081 1.52 tsutsui struct re_desc *cur_rx;
1082 1.52 tsutsui struct re_rxsoft *rxs;
1083 1.40 tsutsui uint32_t rxstat, rxvlan;
1084 1.1 jonathan
1085 1.1 jonathan ifp = &sc->ethercom.ec_if;
1086 1.1 jonathan
1087 1.52 tsutsui for (i = sc->re_ldata.re_rx_prodidx;; i = RE_NEXT_RX_DESC(sc, i)) {
1088 1.52 tsutsui cur_rx = &sc->re_ldata.re_rx_list[i];
1089 1.52 tsutsui RE_RXDESCSYNC(sc, i,
1090 1.32 tsutsui BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1091 1.52 tsutsui rxstat = le32toh(cur_rx->re_cmdstat);
1092 1.52 tsutsui RE_RXDESCSYNC(sc, i, BUS_DMASYNC_PREREAD);
1093 1.52 tsutsui if ((rxstat & RE_RDESC_STAT_OWN) != 0) {
1094 1.32 tsutsui break;
1095 1.32 tsutsui }
1096 1.52 tsutsui total_len = rxstat & sc->re_rxlenmask;
1097 1.52 tsutsui rxvlan = le32toh(cur_rx->re_vlanctl);
1098 1.52 tsutsui rxs = &sc->re_ldata.re_rxsoft[i];
1099 1.50 tsutsui m = rxs->rxs_mbuf;
1100 1.1 jonathan
1101 1.1 jonathan /* Invalidate the RX mbuf and unload its map */
1102 1.1 jonathan
1103 1.1 jonathan bus_dmamap_sync(sc->sc_dmat,
1104 1.50 tsutsui rxs->rxs_dmamap, 0, rxs->rxs_dmamap->dm_mapsize,
1105 1.20 briggs BUS_DMASYNC_POSTREAD);
1106 1.50 tsutsui bus_dmamap_unload(sc->sc_dmat, rxs->rxs_dmamap);
1107 1.1 jonathan
1108 1.52 tsutsui if ((rxstat & RE_RDESC_STAT_EOF) == 0) {
1109 1.52 tsutsui m->m_len = MCLBYTES - RE_ETHER_ALIGN;
1110 1.52 tsutsui if (sc->re_head == NULL)
1111 1.52 tsutsui sc->re_head = sc->re_tail = m;
1112 1.1 jonathan else {
1113 1.1 jonathan m->m_flags &= ~M_PKTHDR;
1114 1.52 tsutsui sc->re_tail->m_next = m;
1115 1.52 tsutsui sc->re_tail = m;
1116 1.1 jonathan }
1117 1.1 jonathan re_newbuf(sc, i, NULL);
1118 1.1 jonathan continue;
1119 1.1 jonathan }
1120 1.1 jonathan
1121 1.1 jonathan /*
1122 1.1 jonathan * NOTE: for the 8139C+, the frame length field
1123 1.1 jonathan * is always 12 bits in size, but for the gigE chips,
1124 1.1 jonathan * it is 13 bits (since the max RX frame length is 16K).
1125 1.1 jonathan * Unfortunately, all 32 bits in the status word
1126 1.1 jonathan * were already used, so to make room for the extra
1127 1.1 jonathan * length bit, RealTek took out the 'frame alignment
1128 1.1 jonathan * error' bit and shifted the other status bits
1129 1.1 jonathan * over one slot. The OWN, EOR, FS and LS bits are
1130 1.1 jonathan * still in the same places. We have already extracted
1131 1.1 jonathan * the frame length and checked the OWN bit, so rather
1132 1.1 jonathan * than using an alternate bit mapping, we shift the
1133 1.1 jonathan * status bits one space to the right so we can evaluate
1134 1.1 jonathan * them using the 8169 status as though it was in the
1135 1.1 jonathan * same format as that of the 8139C+.
1136 1.1 jonathan */
1137 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0)
1138 1.1 jonathan rxstat >>= 1;
1139 1.1 jonathan
1140 1.75 tsutsui if (__predict_false((rxstat & RE_RDESC_STAT_RXERRSUM) != 0)) {
1141 1.70 tsutsui #ifdef RE_DEBUG
1142 1.70 tsutsui aprint_error("%s: RX error (rxstat = 0x%08x)",
1143 1.70 tsutsui sc->sc_dev.dv_xname, rxstat);
1144 1.70 tsutsui if (rxstat & RE_RDESC_STAT_FRALIGN)
1145 1.70 tsutsui aprint_error(", frame alignment error");
1146 1.70 tsutsui if (rxstat & RE_RDESC_STAT_BUFOFLOW)
1147 1.70 tsutsui aprint_error(", out of buffer space");
1148 1.70 tsutsui if (rxstat & RE_RDESC_STAT_FIFOOFLOW)
1149 1.70 tsutsui aprint_error(", FIFO overrun");
1150 1.70 tsutsui if (rxstat & RE_RDESC_STAT_GIANT)
1151 1.70 tsutsui aprint_error(", giant packet");
1152 1.70 tsutsui if (rxstat & RE_RDESC_STAT_RUNT)
1153 1.70 tsutsui aprint_error(", runt packet");
1154 1.70 tsutsui if (rxstat & RE_RDESC_STAT_CRCERR)
1155 1.70 tsutsui aprint_error(", CRC error");
1156 1.70 tsutsui aprint_error("\n");
1157 1.70 tsutsui #endif
1158 1.1 jonathan ifp->if_ierrors++;
1159 1.1 jonathan /*
1160 1.1 jonathan * If this is part of a multi-fragment packet,
1161 1.1 jonathan * discard all the pieces.
1162 1.1 jonathan */
1163 1.52 tsutsui if (sc->re_head != NULL) {
1164 1.52 tsutsui m_freem(sc->re_head);
1165 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1166 1.1 jonathan }
1167 1.1 jonathan re_newbuf(sc, i, m);
1168 1.1 jonathan continue;
1169 1.1 jonathan }
1170 1.1 jonathan
1171 1.1 jonathan /*
1172 1.1 jonathan * If allocating a replacement mbuf fails,
1173 1.1 jonathan * reload the current one.
1174 1.1 jonathan */
1175 1.1 jonathan
1176 1.75 tsutsui if (__predict_false(re_newbuf(sc, i, NULL) != 0)) {
1177 1.1 jonathan ifp->if_ierrors++;
1178 1.52 tsutsui if (sc->re_head != NULL) {
1179 1.52 tsutsui m_freem(sc->re_head);
1180 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1181 1.1 jonathan }
1182 1.1 jonathan re_newbuf(sc, i, m);
1183 1.1 jonathan continue;
1184 1.1 jonathan }
1185 1.1 jonathan
1186 1.52 tsutsui if (sc->re_head != NULL) {
1187 1.52 tsutsui m->m_len = total_len % (MCLBYTES - RE_ETHER_ALIGN);
1188 1.12 perry /*
1189 1.1 jonathan * Special case: if there's 4 bytes or less
1190 1.1 jonathan * in this buffer, the mbuf can be discarded:
1191 1.1 jonathan * the last 4 bytes is the CRC, which we don't
1192 1.1 jonathan * care about anyway.
1193 1.1 jonathan */
1194 1.1 jonathan if (m->m_len <= ETHER_CRC_LEN) {
1195 1.52 tsutsui sc->re_tail->m_len -=
1196 1.1 jonathan (ETHER_CRC_LEN - m->m_len);
1197 1.1 jonathan m_freem(m);
1198 1.1 jonathan } else {
1199 1.1 jonathan m->m_len -= ETHER_CRC_LEN;
1200 1.1 jonathan m->m_flags &= ~M_PKTHDR;
1201 1.52 tsutsui sc->re_tail->m_next = m;
1202 1.1 jonathan }
1203 1.52 tsutsui m = sc->re_head;
1204 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1205 1.1 jonathan m->m_pkthdr.len = total_len - ETHER_CRC_LEN;
1206 1.1 jonathan } else
1207 1.1 jonathan m->m_pkthdr.len = m->m_len =
1208 1.1 jonathan (total_len - ETHER_CRC_LEN);
1209 1.1 jonathan
1210 1.1 jonathan ifp->if_ipackets++;
1211 1.1 jonathan m->m_pkthdr.rcvif = ifp;
1212 1.1 jonathan
1213 1.68 tsutsui /* Do RX checksumming */
1214 1.1 jonathan
1215 1.68 tsutsui /* Check IP header checksum */
1216 1.68 tsutsui if (rxstat & RE_RDESC_STAT_PROTOID) {
1217 1.68 tsutsui m->m_pkthdr.csum_flags |= M_CSUM_IPv4;
1218 1.52 tsutsui if (rxstat & RE_RDESC_STAT_IPSUMBAD)
1219 1.4 kanaoka m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD;
1220 1.1 jonathan }
1221 1.1 jonathan
1222 1.1 jonathan /* Check TCP/UDP checksum */
1223 1.68 tsutsui if (RE_TCPPKT(rxstat)) {
1224 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_TCPv4;
1225 1.52 tsutsui if (rxstat & RE_RDESC_STAT_TCPSUMBAD)
1226 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
1227 1.68 tsutsui } else if (RE_UDPPKT(rxstat)) {
1228 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_UDPv4;
1229 1.52 tsutsui if (rxstat & RE_RDESC_STAT_UDPSUMBAD)
1230 1.1 jonathan m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
1231 1.1 jonathan }
1232 1.1 jonathan
1233 1.52 tsutsui if (rxvlan & RE_RDESC_VLANCTL_TAG) {
1234 1.9 jdolecek VLAN_INPUT_TAG(ifp, m,
1235 1.74 tsutsui bswap16(rxvlan & RE_RDESC_VLANCTL_DATA),
1236 1.9 jdolecek continue);
1237 1.1 jonathan }
1238 1.1 jonathan #if NBPFILTER > 0
1239 1.1 jonathan if (ifp->if_bpf)
1240 1.1 jonathan bpf_mtap(ifp->if_bpf, m);
1241 1.1 jonathan #endif
1242 1.1 jonathan (*ifp->if_input)(ifp, m);
1243 1.1 jonathan }
1244 1.1 jonathan
1245 1.52 tsutsui sc->re_ldata.re_rx_prodidx = i;
1246 1.1 jonathan }
1247 1.1 jonathan
1248 1.1 jonathan static void
1249 1.1 jonathan re_txeof(struct rtk_softc *sc)
1250 1.1 jonathan {
1251 1.1 jonathan struct ifnet *ifp;
1252 1.58 tsutsui struct re_txq *txq;
1253 1.58 tsutsui uint32_t txstat;
1254 1.58 tsutsui int idx, descidx;
1255 1.1 jonathan
1256 1.1 jonathan ifp = &sc->ethercom.ec_if;
1257 1.1 jonathan
1258 1.59 tsutsui for (idx = sc->re_ldata.re_txq_considx;
1259 1.59 tsutsui sc->re_ldata.re_txq_free < RE_TX_QLEN;
1260 1.59 tsutsui idx = RE_NEXT_TXQ(sc, idx), sc->re_ldata.re_txq_free++) {
1261 1.58 tsutsui txq = &sc->re_ldata.re_txq[idx];
1262 1.59 tsutsui KASSERT(txq->txq_mbuf != NULL);
1263 1.15 yamt
1264 1.17 yamt descidx = txq->txq_descidx;
1265 1.52 tsutsui RE_TXDESCSYNC(sc, descidx,
1266 1.32 tsutsui BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1267 1.15 yamt txstat =
1268 1.52 tsutsui le32toh(sc->re_ldata.re_tx_list[descidx].re_cmdstat);
1269 1.52 tsutsui RE_TXDESCSYNC(sc, descidx, BUS_DMASYNC_PREREAD);
1270 1.52 tsutsui KASSERT((txstat & RE_TDESC_CMD_EOF) != 0);
1271 1.52 tsutsui if (txstat & RE_TDESC_CMD_OWN) {
1272 1.1 jonathan break;
1273 1.32 tsutsui }
1274 1.1 jonathan
1275 1.63 tsutsui sc->re_ldata.re_tx_free += txq->txq_nsegs;
1276 1.52 tsutsui KASSERT(sc->re_ldata.re_tx_free <= RE_TX_DESC_CNT(sc));
1277 1.32 tsutsui bus_dmamap_sync(sc->sc_dmat, txq->txq_dmamap,
1278 1.32 tsutsui 0, txq->txq_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1279 1.15 yamt bus_dmamap_unload(sc->sc_dmat, txq->txq_dmamap);
1280 1.15 yamt m_freem(txq->txq_mbuf);
1281 1.15 yamt txq->txq_mbuf = NULL;
1282 1.15 yamt
1283 1.52 tsutsui if (txstat & (RE_TDESC_STAT_EXCESSCOL | RE_TDESC_STAT_COLCNT))
1284 1.15 yamt ifp->if_collisions++;
1285 1.52 tsutsui if (txstat & RE_TDESC_STAT_TXERRSUM)
1286 1.15 yamt ifp->if_oerrors++;
1287 1.15 yamt else
1288 1.15 yamt ifp->if_opackets++;
1289 1.59 tsutsui }
1290 1.1 jonathan
1291 1.59 tsutsui sc->re_ldata.re_txq_considx = idx;
1292 1.1 jonathan
1293 1.79 tsutsui if (sc->re_ldata.re_txq_free > RE_NTXDESC_RSVD)
1294 1.1 jonathan ifp->if_flags &= ~IFF_OACTIVE;
1295 1.1 jonathan
1296 1.1 jonathan /*
1297 1.1 jonathan * If not all descriptors have been released reaped yet,
1298 1.1 jonathan * reload the timer so that we will eventually get another
1299 1.1 jonathan * interrupt that will cause us to re-enter this routine.
1300 1.1 jonathan * This is done in case the transmitter has gone idle.
1301 1.1 jonathan */
1302 1.85 tsutsui if (sc->re_ldata.re_txq_free < RE_TX_QLEN) {
1303 1.4 kanaoka CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
1304 1.85 tsutsui if ((sc->sc_quirk & RTKQ_PCIE) != 0) {
1305 1.85 tsutsui /*
1306 1.85 tsutsui * Some chips will ignore a second TX request
1307 1.85 tsutsui * issued while an existing transmission is in
1308 1.85 tsutsui * progress. If the transmitter goes idle but
1309 1.85 tsutsui * there are still packets waiting to be sent,
1310 1.85 tsutsui * we need to restart the channel here to flush
1311 1.85 tsutsui * them out. This only seems to be required with
1312 1.85 tsutsui * the PCIe devices.
1313 1.85 tsutsui */
1314 1.85 tsutsui CSR_WRITE_2(sc, RTK_GTXSTART, RTK_TXSTART_START);
1315 1.85 tsutsui }
1316 1.85 tsutsui } else
1317 1.56 tsutsui ifp->if_timer = 0;
1318 1.1 jonathan }
1319 1.1 jonathan
1320 1.1 jonathan static void
1321 1.1 jonathan re_tick(void *xsc)
1322 1.1 jonathan {
1323 1.1 jonathan struct rtk_softc *sc = xsc;
1324 1.1 jonathan int s;
1325 1.1 jonathan
1326 1.1 jonathan /*XXX: just return for 8169S/8110S with rev 2 or newer phy */
1327 1.1 jonathan s = splnet();
1328 1.1 jonathan
1329 1.1 jonathan mii_tick(&sc->mii);
1330 1.1 jonathan splx(s);
1331 1.1 jonathan
1332 1.1 jonathan callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
1333 1.1 jonathan }
1334 1.1 jonathan
1335 1.1 jonathan #ifdef DEVICE_POLLING
1336 1.1 jonathan static void
1337 1.1 jonathan re_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1338 1.1 jonathan {
1339 1.1 jonathan struct rtk_softc *sc = ifp->if_softc;
1340 1.1 jonathan
1341 1.1 jonathan RTK_LOCK(sc);
1342 1.41 tsutsui if ((ifp->if_capenable & IFCAP_POLLING) == 0) {
1343 1.1 jonathan ether_poll_deregister(ifp);
1344 1.1 jonathan cmd = POLL_DEREGISTER;
1345 1.1 jonathan }
1346 1.1 jonathan if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */
1347 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
1348 1.1 jonathan goto done;
1349 1.1 jonathan }
1350 1.1 jonathan
1351 1.1 jonathan sc->rxcycles = count;
1352 1.1 jonathan re_rxeof(sc);
1353 1.1 jonathan re_txeof(sc);
1354 1.1 jonathan
1355 1.25 rpaulo if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
1356 1.1 jonathan (*ifp->if_start)(ifp);
1357 1.1 jonathan
1358 1.1 jonathan if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register */
1359 1.40 tsutsui uint16_t status;
1360 1.1 jonathan
1361 1.1 jonathan status = CSR_READ_2(sc, RTK_ISR);
1362 1.1 jonathan if (status == 0xffff)
1363 1.1 jonathan goto done;
1364 1.1 jonathan if (status)
1365 1.1 jonathan CSR_WRITE_2(sc, RTK_ISR, status);
1366 1.1 jonathan
1367 1.1 jonathan /*
1368 1.1 jonathan * XXX check behaviour on receiver stalls.
1369 1.1 jonathan */
1370 1.1 jonathan
1371 1.1 jonathan if (status & RTK_ISR_SYSTEM_ERR) {
1372 1.1 jonathan re_init(sc);
1373 1.1 jonathan }
1374 1.1 jonathan }
1375 1.41 tsutsui done:
1376 1.1 jonathan RTK_UNLOCK(sc);
1377 1.1 jonathan }
1378 1.1 jonathan #endif /* DEVICE_POLLING */
1379 1.1 jonathan
1380 1.1 jonathan int
1381 1.1 jonathan re_intr(void *arg)
1382 1.1 jonathan {
1383 1.1 jonathan struct rtk_softc *sc = arg;
1384 1.1 jonathan struct ifnet *ifp;
1385 1.40 tsutsui uint16_t status;
1386 1.1 jonathan int handled = 0;
1387 1.1 jonathan
1388 1.1 jonathan ifp = &sc->ethercom.ec_if;
1389 1.1 jonathan
1390 1.41 tsutsui if ((ifp->if_flags & IFF_UP) == 0)
1391 1.1 jonathan return 0;
1392 1.1 jonathan
1393 1.1 jonathan #ifdef DEVICE_POLLING
1394 1.4 kanaoka if (ifp->if_flags & IFF_POLLING)
1395 1.1 jonathan goto done;
1396 1.1 jonathan if ((ifp->if_capenable & IFCAP_POLLING) &&
1397 1.1 jonathan ether_poll_register(re_poll, ifp)) { /* ok, disable interrupts */
1398 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0x0000);
1399 1.1 jonathan re_poll(ifp, 0, 1);
1400 1.1 jonathan goto done;
1401 1.1 jonathan }
1402 1.1 jonathan #endif /* DEVICE_POLLING */
1403 1.1 jonathan
1404 1.1 jonathan for (;;) {
1405 1.1 jonathan
1406 1.1 jonathan status = CSR_READ_2(sc, RTK_ISR);
1407 1.1 jonathan /* If the card has gone away the read returns 0xffff. */
1408 1.1 jonathan if (status == 0xffff)
1409 1.1 jonathan break;
1410 1.1 jonathan if (status) {
1411 1.1 jonathan handled = 1;
1412 1.1 jonathan CSR_WRITE_2(sc, RTK_ISR, status);
1413 1.1 jonathan }
1414 1.1 jonathan
1415 1.1 jonathan if ((status & RTK_INTRS_CPLUS) == 0)
1416 1.1 jonathan break;
1417 1.1 jonathan
1418 1.57 tsutsui if (status & (RTK_ISR_RX_OK | RTK_ISR_RX_ERR))
1419 1.1 jonathan re_rxeof(sc);
1420 1.1 jonathan
1421 1.57 tsutsui if (status & (RTK_ISR_TIMEOUT_EXPIRED | RTK_ISR_TX_ERR |
1422 1.57 tsutsui RTK_ISR_TX_DESC_UNAVAIL))
1423 1.1 jonathan re_txeof(sc);
1424 1.1 jonathan
1425 1.1 jonathan if (status & RTK_ISR_SYSTEM_ERR) {
1426 1.1 jonathan re_init(ifp);
1427 1.1 jonathan }
1428 1.1 jonathan
1429 1.1 jonathan if (status & RTK_ISR_LINKCHG) {
1430 1.1 jonathan callout_stop(&sc->rtk_tick_ch);
1431 1.1 jonathan re_tick(sc);
1432 1.1 jonathan }
1433 1.1 jonathan }
1434 1.1 jonathan
1435 1.57 tsutsui if (handled && !IFQ_IS_EMPTY(&ifp->if_snd))
1436 1.57 tsutsui re_start(ifp);
1437 1.1 jonathan
1438 1.1 jonathan #ifdef DEVICE_POLLING
1439 1.41 tsutsui done:
1440 1.1 jonathan #endif
1441 1.1 jonathan
1442 1.1 jonathan return handled;
1443 1.1 jonathan }
1444 1.1 jonathan
1445 1.59 tsutsui
1446 1.59 tsutsui
1447 1.59 tsutsui /*
1448 1.59 tsutsui * Main transmit routine for C+ and gigE NICs.
1449 1.59 tsutsui */
1450 1.59 tsutsui
1451 1.59 tsutsui static void
1452 1.59 tsutsui re_start(struct ifnet *ifp)
1453 1.1 jonathan {
1454 1.59 tsutsui struct rtk_softc *sc;
1455 1.59 tsutsui struct mbuf *m;
1456 1.1 jonathan bus_dmamap_t map;
1457 1.59 tsutsui struct re_txq *txq;
1458 1.59 tsutsui struct re_desc *d;
1459 1.1 jonathan struct m_tag *mtag;
1460 1.52 tsutsui uint32_t cmdstat, re_flags;
1461 1.63 tsutsui int ofree, idx, error, nsegs, seg;
1462 1.59 tsutsui int startdesc, curdesc, lastdesc;
1463 1.82 thorpej bool pad;
1464 1.1 jonathan
1465 1.59 tsutsui sc = ifp->if_softc;
1466 1.59 tsutsui ofree = sc->re_ldata.re_txq_free;
1467 1.1 jonathan
1468 1.59 tsutsui for (idx = sc->re_ldata.re_txq_prodidx;; idx = RE_NEXT_TXQ(sc, idx)) {
1469 1.1 jonathan
1470 1.59 tsutsui IFQ_POLL(&ifp->if_snd, m);
1471 1.59 tsutsui if (m == NULL)
1472 1.59 tsutsui break;
1473 1.1 jonathan
1474 1.59 tsutsui if (sc->re_ldata.re_txq_free == 0 ||
1475 1.59 tsutsui sc->re_ldata.re_tx_free <= RE_NTXDESC_RSVD) {
1476 1.59 tsutsui /* no more free slots left */
1477 1.59 tsutsui ifp->if_flags |= IFF_OACTIVE;
1478 1.59 tsutsui break;
1479 1.59 tsutsui }
1480 1.16 yamt
1481 1.16 yamt /*
1482 1.59 tsutsui * Set up checksum offload. Note: checksum offload bits must
1483 1.59 tsutsui * appear in all descriptors of a multi-descriptor transmit
1484 1.59 tsutsui * attempt. (This is according to testing done with an 8169
1485 1.59 tsutsui * chip. I'm not sure if this is a requirement or a bug.)
1486 1.16 yamt */
1487 1.16 yamt
1488 1.59 tsutsui if ((m->m_pkthdr.csum_flags & M_CSUM_TSOv4) != 0) {
1489 1.59 tsutsui uint32_t segsz = m->m_pkthdr.segsz;
1490 1.59 tsutsui
1491 1.59 tsutsui re_flags = RE_TDESC_CMD_LGSEND |
1492 1.59 tsutsui (segsz << RE_TDESC_CMD_MSSVAL_SHIFT);
1493 1.59 tsutsui } else {
1494 1.59 tsutsui /*
1495 1.59 tsutsui * set RE_TDESC_CMD_IPCSUM if any checksum offloading
1496 1.59 tsutsui * is requested. otherwise, RE_TDESC_CMD_TCPCSUM/
1497 1.59 tsutsui * RE_TDESC_CMD_UDPCSUM doesn't make effects.
1498 1.59 tsutsui */
1499 1.59 tsutsui re_flags = 0;
1500 1.59 tsutsui if ((m->m_pkthdr.csum_flags &
1501 1.59 tsutsui (M_CSUM_IPv4 | M_CSUM_TCPv4 | M_CSUM_UDPv4))
1502 1.59 tsutsui != 0) {
1503 1.59 tsutsui re_flags |= RE_TDESC_CMD_IPCSUM;
1504 1.59 tsutsui if (m->m_pkthdr.csum_flags & M_CSUM_TCPv4) {
1505 1.59 tsutsui re_flags |= RE_TDESC_CMD_TCPCSUM;
1506 1.59 tsutsui } else if (m->m_pkthdr.csum_flags &
1507 1.59 tsutsui M_CSUM_UDPv4) {
1508 1.59 tsutsui re_flags |= RE_TDESC_CMD_UDPCSUM;
1509 1.59 tsutsui }
1510 1.16 yamt }
1511 1.16 yamt }
1512 1.1 jonathan
1513 1.59 tsutsui txq = &sc->re_ldata.re_txq[idx];
1514 1.59 tsutsui map = txq->txq_dmamap;
1515 1.59 tsutsui error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
1516 1.59 tsutsui BUS_DMA_WRITE|BUS_DMA_NOWAIT);
1517 1.59 tsutsui
1518 1.75 tsutsui if (__predict_false(error)) {
1519 1.59 tsutsui /* XXX try to defrag if EFBIG? */
1520 1.59 tsutsui aprint_error("%s: can't map mbuf (error %d)\n",
1521 1.59 tsutsui sc->sc_dev.dv_xname, error);
1522 1.1 jonathan
1523 1.59 tsutsui IFQ_DEQUEUE(&ifp->if_snd, m);
1524 1.59 tsutsui m_freem(m);
1525 1.59 tsutsui ifp->if_oerrors++;
1526 1.59 tsutsui continue;
1527 1.59 tsutsui }
1528 1.13 yamt
1529 1.63 tsutsui nsegs = map->dm_nsegs;
1530 1.87 tsutsui pad = false;
1531 1.75 tsutsui if (__predict_false(m->m_pkthdr.len <= RE_IP4CSUMTX_PADLEN &&
1532 1.75 tsutsui (re_flags & RE_TDESC_CMD_IPCSUM) != 0)) {
1533 1.87 tsutsui pad = true;
1534 1.63 tsutsui nsegs++;
1535 1.63 tsutsui }
1536 1.63 tsutsui
1537 1.63 tsutsui if (nsegs > sc->re_ldata.re_tx_free - RE_NTXDESC_RSVD) {
1538 1.59 tsutsui /*
1539 1.59 tsutsui * Not enough free descriptors to transmit this packet.
1540 1.59 tsutsui */
1541 1.59 tsutsui ifp->if_flags |= IFF_OACTIVE;
1542 1.59 tsutsui bus_dmamap_unload(sc->sc_dmat, map);
1543 1.59 tsutsui break;
1544 1.59 tsutsui }
1545 1.13 yamt
1546 1.59 tsutsui IFQ_DEQUEUE(&ifp->if_snd, m);
1547 1.1 jonathan
1548 1.59 tsutsui /*
1549 1.59 tsutsui * Make sure that the caches are synchronized before we
1550 1.59 tsutsui * ask the chip to start DMA for the packet data.
1551 1.59 tsutsui */
1552 1.59 tsutsui bus_dmamap_sync(sc->sc_dmat, map, 0, map->dm_mapsize,
1553 1.59 tsutsui BUS_DMASYNC_PREWRITE);
1554 1.20 briggs
1555 1.59 tsutsui /*
1556 1.59 tsutsui * Map the segment array into descriptors.
1557 1.59 tsutsui * Note that we set the start-of-frame and
1558 1.59 tsutsui * end-of-frame markers for either TX or RX,
1559 1.59 tsutsui * but they really only have meaning in the TX case.
1560 1.59 tsutsui * (In the RX case, it's the chip that tells us
1561 1.59 tsutsui * where packets begin and end.)
1562 1.59 tsutsui * We also keep track of the end of the ring
1563 1.59 tsutsui * and set the end-of-ring bits as needed,
1564 1.59 tsutsui * and we set the ownership bits in all except
1565 1.59 tsutsui * the very first descriptor. (The caller will
1566 1.59 tsutsui * set this descriptor later when it start
1567 1.59 tsutsui * transmission or reception.)
1568 1.59 tsutsui */
1569 1.59 tsutsui curdesc = startdesc = sc->re_ldata.re_tx_nextfree;
1570 1.59 tsutsui lastdesc = -1;
1571 1.59 tsutsui for (seg = 0; seg < map->dm_nsegs;
1572 1.59 tsutsui seg++, curdesc = RE_NEXT_TX_DESC(sc, curdesc)) {
1573 1.59 tsutsui d = &sc->re_ldata.re_tx_list[curdesc];
1574 1.69 tsutsui #ifdef DIAGNOSTIC
1575 1.59 tsutsui RE_TXDESCSYNC(sc, curdesc,
1576 1.59 tsutsui BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1577 1.59 tsutsui cmdstat = le32toh(d->re_cmdstat);
1578 1.59 tsutsui RE_TXDESCSYNC(sc, curdesc, BUS_DMASYNC_PREREAD);
1579 1.59 tsutsui if (cmdstat & RE_TDESC_STAT_OWN) {
1580 1.59 tsutsui panic("%s: tried to map busy TX descriptor",
1581 1.59 tsutsui sc->sc_dev.dv_xname);
1582 1.59 tsutsui }
1583 1.59 tsutsui #endif
1584 1.20 briggs
1585 1.74 tsutsui d->re_vlanctl = 0;
1586 1.64 tsutsui re_set_bufaddr(d, map->dm_segs[seg].ds_addr);
1587 1.59 tsutsui cmdstat = re_flags | map->dm_segs[seg].ds_len;
1588 1.59 tsutsui if (seg == 0)
1589 1.59 tsutsui cmdstat |= RE_TDESC_CMD_SOF;
1590 1.59 tsutsui else
1591 1.59 tsutsui cmdstat |= RE_TDESC_CMD_OWN;
1592 1.59 tsutsui if (curdesc == (RE_TX_DESC_CNT(sc) - 1))
1593 1.59 tsutsui cmdstat |= RE_TDESC_CMD_EOR;
1594 1.63 tsutsui if (seg == nsegs - 1) {
1595 1.59 tsutsui cmdstat |= RE_TDESC_CMD_EOF;
1596 1.59 tsutsui lastdesc = curdesc;
1597 1.13 yamt }
1598 1.59 tsutsui d->re_cmdstat = htole32(cmdstat);
1599 1.59 tsutsui RE_TXDESCSYNC(sc, curdesc,
1600 1.59 tsutsui BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1601 1.13 yamt }
1602 1.75 tsutsui if (__predict_false(pad)) {
1603 1.63 tsutsui bus_addr_t paddaddr;
1604 1.63 tsutsui
1605 1.63 tsutsui d = &sc->re_ldata.re_tx_list[curdesc];
1606 1.74 tsutsui d->re_vlanctl = 0;
1607 1.63 tsutsui paddaddr = RE_TXPADDADDR(sc);
1608 1.64 tsutsui re_set_bufaddr(d, paddaddr);
1609 1.63 tsutsui cmdstat = re_flags |
1610 1.63 tsutsui RE_TDESC_CMD_OWN | RE_TDESC_CMD_EOF |
1611 1.63 tsutsui (RE_IP4CSUMTX_PADLEN + 1 - m->m_pkthdr.len);
1612 1.63 tsutsui if (curdesc == (RE_TX_DESC_CNT(sc) - 1))
1613 1.63 tsutsui cmdstat |= RE_TDESC_CMD_EOR;
1614 1.63 tsutsui d->re_cmdstat = htole32(cmdstat);
1615 1.63 tsutsui RE_TXDESCSYNC(sc, curdesc,
1616 1.63 tsutsui BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1617 1.63 tsutsui lastdesc = curdesc;
1618 1.63 tsutsui curdesc = RE_NEXT_TX_DESC(sc, curdesc);
1619 1.63 tsutsui }
1620 1.59 tsutsui KASSERT(lastdesc != -1);
1621 1.1 jonathan
1622 1.59 tsutsui /*
1623 1.59 tsutsui * Set up hardware VLAN tagging. Note: vlan tag info must
1624 1.59 tsutsui * appear in the first descriptor of a multi-descriptor
1625 1.59 tsutsui * transmission attempt.
1626 1.59 tsutsui */
1627 1.59 tsutsui if ((mtag = VLAN_OUTPUT_TAG(&sc->ethercom, m)) != NULL) {
1628 1.59 tsutsui sc->re_ldata.re_tx_list[startdesc].re_vlanctl =
1629 1.74 tsutsui htole32(bswap16(VLAN_TAG_VALUE(mtag)) |
1630 1.59 tsutsui RE_TDESC_VLANCTL_TAG);
1631 1.59 tsutsui }
1632 1.1 jonathan
1633 1.59 tsutsui /* Transfer ownership of packet to the chip. */
1634 1.1 jonathan
1635 1.59 tsutsui sc->re_ldata.re_tx_list[startdesc].re_cmdstat |=
1636 1.59 tsutsui htole32(RE_TDESC_CMD_OWN);
1637 1.59 tsutsui RE_TXDESCSYNC(sc, startdesc,
1638 1.59 tsutsui BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1639 1.17 yamt
1640 1.59 tsutsui /* update info of TX queue and descriptors */
1641 1.59 tsutsui txq->txq_mbuf = m;
1642 1.59 tsutsui txq->txq_descidx = lastdesc;
1643 1.63 tsutsui txq->txq_nsegs = nsegs;
1644 1.59 tsutsui
1645 1.59 tsutsui sc->re_ldata.re_txq_free--;
1646 1.63 tsutsui sc->re_ldata.re_tx_free -= nsegs;
1647 1.59 tsutsui sc->re_ldata.re_tx_nextfree = curdesc;
1648 1.17 yamt
1649 1.1 jonathan #if NBPFILTER > 0
1650 1.1 jonathan /*
1651 1.1 jonathan * If there's a BPF listener, bounce a copy of this frame
1652 1.1 jonathan * to him.
1653 1.1 jonathan */
1654 1.1 jonathan if (ifp->if_bpf)
1655 1.17 yamt bpf_mtap(ifp->if_bpf, m);
1656 1.1 jonathan #endif
1657 1.1 jonathan }
1658 1.1 jonathan
1659 1.59 tsutsui if (sc->re_ldata.re_txq_free < ofree) {
1660 1.59 tsutsui /*
1661 1.59 tsutsui * TX packets are enqueued.
1662 1.59 tsutsui */
1663 1.59 tsutsui sc->re_ldata.re_txq_prodidx = idx;
1664 1.17 yamt
1665 1.59 tsutsui /*
1666 1.59 tsutsui * Start the transmitter to poll.
1667 1.59 tsutsui *
1668 1.59 tsutsui * RealTek put the TX poll request register in a different
1669 1.59 tsutsui * location on the 8169 gigE chip. I don't know why.
1670 1.59 tsutsui */
1671 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0)
1672 1.84 tsutsui CSR_WRITE_1(sc, RTK_TXSTART, RTK_TXSTART_START);
1673 1.84 tsutsui else
1674 1.59 tsutsui CSR_WRITE_2(sc, RTK_GTXSTART, RTK_TXSTART_START);
1675 1.1 jonathan
1676 1.59 tsutsui /*
1677 1.59 tsutsui * Use the countdown timer for interrupt moderation.
1678 1.59 tsutsui * 'TX done' interrupts are disabled. Instead, we reset the
1679 1.59 tsutsui * countdown timer, which will begin counting until it hits
1680 1.59 tsutsui * the value in the TIMERINT register, and then trigger an
1681 1.59 tsutsui * interrupt. Each time we write to the TIMERCNT register,
1682 1.59 tsutsui * the timer count is reset to 0.
1683 1.59 tsutsui */
1684 1.59 tsutsui CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
1685 1.1 jonathan
1686 1.59 tsutsui /*
1687 1.59 tsutsui * Set a timeout in case the chip goes out to lunch.
1688 1.59 tsutsui */
1689 1.59 tsutsui ifp->if_timer = 5;
1690 1.59 tsutsui }
1691 1.1 jonathan }
1692 1.1 jonathan
1693 1.1 jonathan static int
1694 1.1 jonathan re_init(struct ifnet *ifp)
1695 1.1 jonathan {
1696 1.1 jonathan struct rtk_softc *sc = ifp->if_softc;
1697 1.88 dyoung const uint8_t *enaddr;
1698 1.40 tsutsui uint32_t rxcfg = 0;
1699 1.40 tsutsui uint32_t reg;
1700 1.1 jonathan int error;
1701 1.12 perry
1702 1.1 jonathan if ((error = re_enable(sc)) != 0)
1703 1.1 jonathan goto out;
1704 1.1 jonathan
1705 1.1 jonathan /*
1706 1.1 jonathan * Cancel pending I/O and free all RX/TX buffers.
1707 1.1 jonathan */
1708 1.3 kanaoka re_stop(ifp, 0);
1709 1.1 jonathan
1710 1.53 tsutsui re_reset(sc);
1711 1.53 tsutsui
1712 1.1 jonathan /*
1713 1.1 jonathan * Enable C+ RX and TX mode, as well as VLAN stripping and
1714 1.1 jonathan * RX checksum offload. We must configure the C+ register
1715 1.1 jonathan * before all others.
1716 1.1 jonathan */
1717 1.1 jonathan reg = 0;
1718 1.1 jonathan
1719 1.1 jonathan /*
1720 1.1 jonathan * XXX: Realtek docs say bits 0 and 1 are reserved, for 8169S/8110S.
1721 1.1 jonathan * FreeBSD drivers set these bits anyway (for 8139C+?).
1722 1.1 jonathan * So far, it works.
1723 1.1 jonathan */
1724 1.1 jonathan
1725 1.1 jonathan /*
1726 1.84 tsutsui * XXX: For old 8169 set bit 14.
1727 1.84 tsutsui * For 8169S/8110S and above, do not set bit 14.
1728 1.1 jonathan */
1729 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8169NONS) != 0)
1730 1.4 kanaoka reg |= (0x1 << 14) | RTK_CPLUSCMD_PCI_MRW;;
1731 1.1 jonathan
1732 1.4 kanaoka if (1) {/* not for 8169S ? */
1733 1.24 blymn reg |=
1734 1.23 pavel RTK_CPLUSCMD_VLANSTRIP |
1735 1.4 kanaoka (ifp->if_capenable &
1736 1.18 yamt (IFCAP_CSUM_IPv4_Rx | IFCAP_CSUM_TCPv4_Rx |
1737 1.18 yamt IFCAP_CSUM_UDPv4_Rx) ?
1738 1.4 kanaoka RTK_CPLUSCMD_RXCSUM_ENB : 0);
1739 1.4 kanaoka }
1740 1.12 perry
1741 1.1 jonathan CSR_WRITE_2(sc, RTK_CPLUS_CMD,
1742 1.4 kanaoka reg | RTK_CPLUSCMD_RXENB | RTK_CPLUSCMD_TXENB);
1743 1.1 jonathan
1744 1.1 jonathan /* XXX: from Realtek-supplied Linux driver. Wholly undocumented. */
1745 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) == 0)
1746 1.66 tsutsui CSR_WRITE_2(sc, RTK_IM, 0x0000);
1747 1.1 jonathan
1748 1.1 jonathan DELAY(10000);
1749 1.1 jonathan
1750 1.1 jonathan /*
1751 1.1 jonathan * Init our MAC address. Even though the chipset
1752 1.1 jonathan * documentation doesn't mention it, we need to enter "Config
1753 1.1 jonathan * register write enable" mode to modify the ID registers.
1754 1.1 jonathan */
1755 1.1 jonathan CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_WRITECFG);
1756 1.88 dyoung enaddr = CLLADDR(ifp->if_sadl);
1757 1.49 tsutsui reg = enaddr[0] | (enaddr[1] << 8) |
1758 1.49 tsutsui (enaddr[2] << 16) | (enaddr[3] << 24);
1759 1.49 tsutsui CSR_WRITE_4(sc, RTK_IDR0, reg);
1760 1.49 tsutsui reg = enaddr[4] | (enaddr[5] << 8);
1761 1.49 tsutsui CSR_WRITE_4(sc, RTK_IDR4, reg);
1762 1.1 jonathan CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF);
1763 1.1 jonathan
1764 1.1 jonathan /*
1765 1.1 jonathan * For C+ mode, initialize the RX descriptors and mbufs.
1766 1.1 jonathan */
1767 1.1 jonathan re_rx_list_init(sc);
1768 1.1 jonathan re_tx_list_init(sc);
1769 1.1 jonathan
1770 1.1 jonathan /*
1771 1.54 tsutsui * Load the addresses of the RX and TX lists into the chip.
1772 1.54 tsutsui */
1773 1.54 tsutsui CSR_WRITE_4(sc, RTK_RXLIST_ADDR_HI,
1774 1.54 tsutsui RE_ADDR_HI(sc->re_ldata.re_rx_list_map->dm_segs[0].ds_addr));
1775 1.54 tsutsui CSR_WRITE_4(sc, RTK_RXLIST_ADDR_LO,
1776 1.54 tsutsui RE_ADDR_LO(sc->re_ldata.re_rx_list_map->dm_segs[0].ds_addr));
1777 1.54 tsutsui
1778 1.54 tsutsui CSR_WRITE_4(sc, RTK_TXLIST_ADDR_HI,
1779 1.54 tsutsui RE_ADDR_HI(sc->re_ldata.re_tx_list_map->dm_segs[0].ds_addr));
1780 1.54 tsutsui CSR_WRITE_4(sc, RTK_TXLIST_ADDR_LO,
1781 1.54 tsutsui RE_ADDR_LO(sc->re_ldata.re_tx_list_map->dm_segs[0].ds_addr));
1782 1.54 tsutsui
1783 1.54 tsutsui /*
1784 1.1 jonathan * Enable transmit and receive.
1785 1.1 jonathan */
1786 1.4 kanaoka CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
1787 1.1 jonathan
1788 1.1 jonathan /*
1789 1.1 jonathan * Set the initial TX and RX configuration.
1790 1.1 jonathan */
1791 1.84 tsutsui if (sc->re_testmode && (sc->sc_quirk & RTKQ_8169NONS) != 0) {
1792 1.84 tsutsui /* test mode is needed only for old 8169 */
1793 1.84 tsutsui CSR_WRITE_4(sc, RTK_TXCFG,
1794 1.84 tsutsui RE_TXCFG_CONFIG | RTK_LOOPTEST_ON);
1795 1.1 jonathan } else
1796 1.70 tsutsui CSR_WRITE_4(sc, RTK_TXCFG, RE_TXCFG_CONFIG);
1797 1.54 tsutsui
1798 1.54 tsutsui CSR_WRITE_1(sc, RTK_EARLY_TX_THRESH, 16);
1799 1.54 tsutsui
1800 1.70 tsutsui CSR_WRITE_4(sc, RTK_RXCFG, RE_RXCFG_CONFIG);
1801 1.1 jonathan
1802 1.1 jonathan /* Set the individual bit to receive frames for this host only. */
1803 1.1 jonathan rxcfg = CSR_READ_4(sc, RTK_RXCFG);
1804 1.1 jonathan rxcfg |= RTK_RXCFG_RX_INDIV;
1805 1.1 jonathan
1806 1.1 jonathan /* If we want promiscuous mode, set the allframes bit. */
1807 1.8 jdolecek if (ifp->if_flags & IFF_PROMISC)
1808 1.1 jonathan rxcfg |= RTK_RXCFG_RX_ALLPHYS;
1809 1.8 jdolecek else
1810 1.1 jonathan rxcfg &= ~RTK_RXCFG_RX_ALLPHYS;
1811 1.8 jdolecek CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1812 1.1 jonathan
1813 1.1 jonathan /*
1814 1.1 jonathan * Set capture broadcast bit to capture broadcast frames.
1815 1.1 jonathan */
1816 1.8 jdolecek if (ifp->if_flags & IFF_BROADCAST)
1817 1.1 jonathan rxcfg |= RTK_RXCFG_RX_BROAD;
1818 1.8 jdolecek else
1819 1.1 jonathan rxcfg &= ~RTK_RXCFG_RX_BROAD;
1820 1.8 jdolecek CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1821 1.1 jonathan
1822 1.1 jonathan /*
1823 1.1 jonathan * Program the multicast filter, if necessary.
1824 1.1 jonathan */
1825 1.1 jonathan rtk_setmulti(sc);
1826 1.1 jonathan
1827 1.1 jonathan #ifdef DEVICE_POLLING
1828 1.1 jonathan /*
1829 1.1 jonathan * Disable interrupts if we are polling.
1830 1.1 jonathan */
1831 1.1 jonathan if (ifp->if_flags & IFF_POLLING)
1832 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0);
1833 1.1 jonathan else /* otherwise ... */
1834 1.1 jonathan #endif /* DEVICE_POLLING */
1835 1.1 jonathan /*
1836 1.1 jonathan * Enable interrupts.
1837 1.1 jonathan */
1838 1.52 tsutsui if (sc->re_testmode)
1839 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0);
1840 1.1 jonathan else
1841 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
1842 1.1 jonathan
1843 1.1 jonathan /* Start RX/TX process. */
1844 1.1 jonathan CSR_WRITE_4(sc, RTK_MISSEDPKT, 0);
1845 1.1 jonathan #ifdef notdef
1846 1.1 jonathan /* Enable receiver and transmitter. */
1847 1.4 kanaoka CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB | RTK_CMD_RX_ENB);
1848 1.1 jonathan #endif
1849 1.1 jonathan
1850 1.1 jonathan /*
1851 1.1 jonathan * Initialize the timer interrupt register so that
1852 1.1 jonathan * a timer interrupt will be generated once the timer
1853 1.1 jonathan * reaches a certain number of ticks. The timer is
1854 1.1 jonathan * reloaded on each transmit. This gives us TX interrupt
1855 1.1 jonathan * moderation, which dramatically improves TX frame rate.
1856 1.1 jonathan */
1857 1.1 jonathan
1858 1.84 tsutsui if ((sc->sc_quirk & RTKQ_8139CPLUS) != 0)
1859 1.84 tsutsui CSR_WRITE_4(sc, RTK_TIMERINT, 0x400);
1860 1.84 tsutsui else {
1861 1.1 jonathan CSR_WRITE_4(sc, RTK_TIMERINT_8169, 0x800);
1862 1.1 jonathan
1863 1.84 tsutsui /*
1864 1.84 tsutsui * For 8169 gigE NICs, set the max allowed RX packet
1865 1.84 tsutsui * size so we can receive jumbo frames.
1866 1.84 tsutsui */
1867 1.1 jonathan CSR_WRITE_2(sc, RTK_MAXRXPKTLEN, 16383);
1868 1.84 tsutsui }
1869 1.1 jonathan
1870 1.52 tsutsui if (sc->re_testmode)
1871 1.1 jonathan return 0;
1872 1.1 jonathan
1873 1.81 tsutsui CSR_WRITE_1(sc, RTK_CFG1, RTK_CFG1_DRVLOAD);
1874 1.1 jonathan
1875 1.1 jonathan ifp->if_flags |= IFF_RUNNING;
1876 1.1 jonathan ifp->if_flags &= ~IFF_OACTIVE;
1877 1.1 jonathan
1878 1.1 jonathan callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
1879 1.1 jonathan
1880 1.41 tsutsui out:
1881 1.1 jonathan if (error) {
1882 1.4 kanaoka ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1883 1.1 jonathan ifp->if_timer = 0;
1884 1.4 kanaoka aprint_error("%s: interface not running\n",
1885 1.4 kanaoka sc->sc_dev.dv_xname);
1886 1.1 jonathan }
1887 1.12 perry
1888 1.1 jonathan return error;
1889 1.1 jonathan }
1890 1.1 jonathan
1891 1.1 jonathan /*
1892 1.1 jonathan * Set media options.
1893 1.1 jonathan */
1894 1.1 jonathan static int
1895 1.1 jonathan re_ifmedia_upd(struct ifnet *ifp)
1896 1.1 jonathan {
1897 1.1 jonathan struct rtk_softc *sc;
1898 1.1 jonathan
1899 1.1 jonathan sc = ifp->if_softc;
1900 1.1 jonathan
1901 1.4 kanaoka return mii_mediachg(&sc->mii);
1902 1.1 jonathan }
1903 1.1 jonathan
1904 1.1 jonathan /*
1905 1.1 jonathan * Report current media status.
1906 1.1 jonathan */
1907 1.1 jonathan static void
1908 1.1 jonathan re_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1909 1.1 jonathan {
1910 1.1 jonathan struct rtk_softc *sc;
1911 1.1 jonathan
1912 1.1 jonathan sc = ifp->if_softc;
1913 1.1 jonathan
1914 1.1 jonathan mii_pollstat(&sc->mii);
1915 1.1 jonathan ifmr->ifm_active = sc->mii.mii_media_active;
1916 1.1 jonathan ifmr->ifm_status = sc->mii.mii_media_status;
1917 1.1 jonathan }
1918 1.1 jonathan
1919 1.1 jonathan static int
1920 1.83 christos re_ioctl(struct ifnet *ifp, u_long command, void *data)
1921 1.1 jonathan {
1922 1.1 jonathan struct rtk_softc *sc = ifp->if_softc;
1923 1.1 jonathan struct ifreq *ifr = (struct ifreq *) data;
1924 1.1 jonathan int s, error = 0;
1925 1.1 jonathan
1926 1.1 jonathan s = splnet();
1927 1.1 jonathan
1928 1.4 kanaoka switch (command) {
1929 1.1 jonathan case SIOCSIFMTU:
1930 1.52 tsutsui if (ifr->ifr_mtu > RE_JUMBO_MTU)
1931 1.1 jonathan error = EINVAL;
1932 1.1 jonathan ifp->if_mtu = ifr->ifr_mtu;
1933 1.1 jonathan break;
1934 1.1 jonathan case SIOCGIFMEDIA:
1935 1.1 jonathan case SIOCSIFMEDIA:
1936 1.1 jonathan error = ifmedia_ioctl(ifp, ifr, &sc->mii.mii_media, command);
1937 1.1 jonathan break;
1938 1.1 jonathan default:
1939 1.1 jonathan error = ether_ioctl(ifp, command, data);
1940 1.1 jonathan if (error == ENETRESET) {
1941 1.2 kanaoka if (ifp->if_flags & IFF_RUNNING)
1942 1.1 jonathan rtk_setmulti(sc);
1943 1.1 jonathan error = 0;
1944 1.1 jonathan }
1945 1.1 jonathan break;
1946 1.1 jonathan }
1947 1.1 jonathan
1948 1.1 jonathan splx(s);
1949 1.1 jonathan
1950 1.4 kanaoka return error;
1951 1.1 jonathan }
1952 1.1 jonathan
1953 1.1 jonathan static void
1954 1.1 jonathan re_watchdog(struct ifnet *ifp)
1955 1.1 jonathan {
1956 1.1 jonathan struct rtk_softc *sc;
1957 1.1 jonathan int s;
1958 1.1 jonathan
1959 1.1 jonathan sc = ifp->if_softc;
1960 1.1 jonathan s = splnet();
1961 1.4 kanaoka aprint_error("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
1962 1.1 jonathan ifp->if_oerrors++;
1963 1.1 jonathan
1964 1.1 jonathan re_txeof(sc);
1965 1.1 jonathan re_rxeof(sc);
1966 1.1 jonathan
1967 1.1 jonathan re_init(ifp);
1968 1.1 jonathan
1969 1.1 jonathan splx(s);
1970 1.1 jonathan }
1971 1.1 jonathan
1972 1.1 jonathan /*
1973 1.1 jonathan * Stop the adapter and free any mbufs allocated to the
1974 1.1 jonathan * RX and TX lists.
1975 1.1 jonathan */
1976 1.1 jonathan static void
1977 1.3 kanaoka re_stop(struct ifnet *ifp, int disable)
1978 1.1 jonathan {
1979 1.41 tsutsui int i;
1980 1.3 kanaoka struct rtk_softc *sc = ifp->if_softc;
1981 1.1 jonathan
1982 1.3 kanaoka callout_stop(&sc->rtk_tick_ch);
1983 1.1 jonathan
1984 1.1 jonathan #ifdef DEVICE_POLLING
1985 1.1 jonathan ether_poll_deregister(ifp);
1986 1.1 jonathan #endif /* DEVICE_POLLING */
1987 1.1 jonathan
1988 1.3 kanaoka mii_down(&sc->mii);
1989 1.3 kanaoka
1990 1.1 jonathan CSR_WRITE_1(sc, RTK_COMMAND, 0x00);
1991 1.1 jonathan CSR_WRITE_2(sc, RTK_IMR, 0x0000);
1992 1.1 jonathan
1993 1.52 tsutsui if (sc->re_head != NULL) {
1994 1.52 tsutsui m_freem(sc->re_head);
1995 1.52 tsutsui sc->re_head = sc->re_tail = NULL;
1996 1.1 jonathan }
1997 1.1 jonathan
1998 1.1 jonathan /* Free the TX list buffers. */
1999 1.52 tsutsui for (i = 0; i < RE_TX_QLEN; i++) {
2000 1.52 tsutsui if (sc->re_ldata.re_txq[i].txq_mbuf != NULL) {
2001 1.1 jonathan bus_dmamap_unload(sc->sc_dmat,
2002 1.52 tsutsui sc->re_ldata.re_txq[i].txq_dmamap);
2003 1.52 tsutsui m_freem(sc->re_ldata.re_txq[i].txq_mbuf);
2004 1.52 tsutsui sc->re_ldata.re_txq[i].txq_mbuf = NULL;
2005 1.1 jonathan }
2006 1.1 jonathan }
2007 1.1 jonathan
2008 1.1 jonathan /* Free the RX list buffers. */
2009 1.52 tsutsui for (i = 0; i < RE_RX_DESC_CNT; i++) {
2010 1.52 tsutsui if (sc->re_ldata.re_rxsoft[i].rxs_mbuf != NULL) {
2011 1.1 jonathan bus_dmamap_unload(sc->sc_dmat,
2012 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_dmamap);
2013 1.52 tsutsui m_freem(sc->re_ldata.re_rxsoft[i].rxs_mbuf);
2014 1.52 tsutsui sc->re_ldata.re_rxsoft[i].rxs_mbuf = NULL;
2015 1.1 jonathan }
2016 1.1 jonathan }
2017 1.1 jonathan
2018 1.3 kanaoka if (disable)
2019 1.3 kanaoka re_disable(sc);
2020 1.3 kanaoka
2021 1.3 kanaoka ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2022 1.4 kanaoka ifp->if_timer = 0;
2023 1.1 jonathan }
2024