rtl8169.c revision 1.3 1 /* $NetBSD: rtl8169.c,v 1.3 2004/12/26 07:27:41 kanaoka Exp $ */
2
3 /*
4 * Copyright (c) 1997, 1998-2003
5 * Bill Paul <wpaul (at) windriver.com>. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Bill Paul.
18 * 4. Neither the name of the author nor the names of any co-contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
32 * THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #include <sys/cdefs.h>
36 /* $FreeBSD: /repoman/r/ncvs/src/sys/dev/re/if_re.c,v 1.20 2004/04/11 20:34:08 ru Exp $ */
37
38 /*
39 * RealTek 8139C+/8169/8169S/8110S PCI NIC driver
40 *
41 * Written by Bill Paul <wpaul (at) windriver.com>
42 * Senior Networking Software Engineer
43 * Wind River Systems
44 */
45
46 /*
47 * This driver is designed to support RealTek's next generation of
48 * 10/100 and 10/100/1000 PCI ethernet controllers. There are currently
49 * four devices in this family: the RTL8139C+, the RTL8169, the RTL8169S
50 * and the RTL8110S.
51 *
52 * The 8139C+ is a 10/100 ethernet chip. It is backwards compatible
53 * with the older 8139 family, however it also supports a special
54 * C+ mode of operation that provides several new performance enhancing
55 * features. These include:
56 *
57 * o Descriptor based DMA mechanism. Each descriptor represents
58 * a single packet fragment. Data buffers may be aligned on
59 * any byte boundary.
60 *
61 * o 64-bit DMA
62 *
63 * o TCP/IP checksum offload for both RX and TX
64 *
65 * o High and normal priority transmit DMA rings
66 *
67 * o VLAN tag insertion and extraction
68 *
69 * o TCP large send (segmentation offload)
70 *
71 * Like the 8139, the 8139C+ also has a built-in 10/100 PHY. The C+
72 * programming API is fairly straightforward. The RX filtering, EEPROM
73 * access and PHY access is the same as it is on the older 8139 series
74 * chips.
75 *
76 * The 8169 is a 64-bit 10/100/1000 gigabit ethernet MAC. It has almost the
77 * same programming API and feature set as the 8139C+ with the following
78 * differences and additions:
79 *
80 * o 1000Mbps mode
81 *
82 * o Jumbo frames
83 *
84 * o GMII and TBI ports/registers for interfacing with copper
85 * or fiber PHYs
86 *
87 * o RX and TX DMA rings can have up to 1024 descriptors
88 * (the 8139C+ allows a maximum of 64)
89 *
90 * o Slight differences in register layout from the 8139C+
91 *
92 * The TX start and timer interrupt registers are at different locations
93 * on the 8169 than they are on the 8139C+. Also, the status word in the
94 * RX descriptor has a slightly different bit layout. The 8169 does not
95 * have a built-in PHY. Most reference boards use a Marvell 88E1000 'Alaska'
96 * copper gigE PHY.
97 *
98 * The 8169S/8110S 10/100/1000 devices have built-in copper gigE PHYs
99 * (the 'S' stands for 'single-chip'). These devices have the same
100 * programming API as the older 8169, but also have some vendor-specific
101 * registers for the on-board PHY. The 8110S is a LAN-on-motherboard
102 * part designed to be pin-compatible with the RealTek 8100 10/100 chip.
103 *
104 * This driver takes advantage of the RX and TX checksum offload and
105 * VLAN tag insertion/extraction features. It also implements TX
106 * interrupt moderation using the timer interrupt registers, which
107 * significantly reduces TX interrupt load. There is also support
108 * for jumbo frames, however the 8169/8169S/8110S can not transmit
109 * jumbo frames larger than 7.5K, so the max MTU possible with this
110 * driver is 7500 bytes.
111 */
112
113 #include "bpfilter.h"
114 #include "vlan.h"
115
116 #include <sys/param.h>
117 #include <sys/endian.h>
118 #include <sys/systm.h>
119 #include <sys/sockio.h>
120 #include <sys/mbuf.h>
121 #include <sys/malloc.h>
122 #include <sys/kernel.h>
123 #include <sys/socket.h>
124 #include <sys/device.h>
125
126 #include <net/if.h>
127 #include <net/if_arp.h>
128 #include <net/if_dl.h>
129 #include <net/if_ether.h>
130 #include <net/if_media.h>
131 #include <net/if_vlanvar.h>
132
133 #if NBPFILTER > 0
134 #include <net/bpf.h>
135 #endif
136
137 #include <machine/bus.h>
138
139 #include <dev/mii/mii.h>
140 #include <dev/mii/miivar.h>
141
142 #include <dev/pci/pcireg.h>
143 #include <dev/pci/pcivar.h>
144 #include <dev/pci/pcidevs.h>
145
146 /*
147 * Default to using PIO access for this driver.
148 */
149 #define RE_USEIOSPACE
150
151 #include <dev/ic/rtl81x9reg.h>
152 #include <dev/ic/rtl81x9var.h>
153
154 #include <dev/ic/rtl8169var.h>
155
156
157 /*
158 * In FreeBSD and OpenBSD's derivative, re_detach is disabled
159 * by #if 0/#endif. On NetBSD, we support cardbus attachments,
160 * which require if_detach. So re-enable re_detach(). jonathan, 2004-10-08.
161 */
162
163 int re_detach(struct rtk_softc *);
164
165 static int re_encap (struct rtk_softc *, struct mbuf *, int *);
166
167 static int re_allocmem (struct rtk_softc *);
168 static int re_newbuf (struct rtk_softc *, int, struct mbuf *);
169 static int re_rx_list_init (struct rtk_softc *);
170 static int re_tx_list_init (struct rtk_softc *);
171 static void re_rxeof (struct rtk_softc *);
172 static void re_txeof (struct rtk_softc *);
173 static void re_tick (void *);
174 static void re_start (struct ifnet *);
175 static int re_ioctl (struct ifnet *, u_long, caddr_t);
176 static int re_init (struct ifnet *);
177 static void re_stop (struct ifnet *, int);
178 static void re_watchdog (struct ifnet *);
179 #if 0
180 static int re_suspend (device_t);
181 static int re_resume (device_t);
182 static void re_shutdown (device_t);
183 #endif
184
185 static void re_shutdown (void *);
186 static int re_enable (struct rtk_softc *);
187 static void re_disable (struct rtk_softc *);
188 static void re_power (int, void *);
189
190 static int re_ifmedia_upd (struct ifnet *);
191 static void re_ifmedia_sts (struct ifnet *, struct ifmediareq *);
192
193 static int re_gmii_readreg (struct device *, int, int);
194 static void re_gmii_writereg (struct device *, int, int, int);
195
196 static int re_miibus_readreg (struct device *, int, int);
197 static void re_miibus_writereg (struct device *, int, int, int);
198 static void re_miibus_statchg (struct device *);
199
200 static void re_reset (struct rtk_softc *);
201
202 static int re_diag (struct rtk_softc *);
203
204 #ifdef RE_USEIOSPACE
205 #define RTK_RES SYS_RES_IOPORT
206 #define RTK_RID RTK_PCI_LOIO
207 #else
208 #define RTK_RES SYS_RES_MEMORY
209 #define RTK_RID RTK_PCI_LOMEM
210 #endif
211
212 #define EE_SET(x) \
213 CSR_WRITE_1(sc, RTK_EECMD, \
214 CSR_READ_1(sc, RTK_EECMD) | x)
215
216 #define EE_CLR(x) \
217 CSR_WRITE_1(sc, RTK_EECMD, \
218 CSR_READ_1(sc, RTK_EECMD) & ~x)
219
220 static int
221 re_gmii_readreg(struct device *self, int phy, int reg)
222 {
223 struct rtk_softc *sc = (void *)self;
224 u_int32_t rval;
225 int i;
226
227 if (phy != 7)
228 return(0);
229
230 /* Let the rgephy driver read the GMEDIASTAT register */
231
232 if (reg == RTK_GMEDIASTAT) {
233 rval = CSR_READ_1(sc, RTK_GMEDIASTAT);
234 return(rval);
235 }
236
237 CSR_WRITE_4(sc, RTK_PHYAR, reg << 16);
238 DELAY(1000);
239
240 for (i = 0; i < RTK_TIMEOUT; i++) {
241 rval = CSR_READ_4(sc, RTK_PHYAR);
242 if (rval & RTK_PHYAR_BUSY)
243 break;
244 DELAY(100);
245 }
246
247 if (i == RTK_TIMEOUT) {
248 printf ("%s: PHY read failed\n", sc->sc_dev.dv_xname);
249 return (0);
250 }
251
252 return (rval & RTK_PHYAR_PHYDATA);
253 }
254
255 static void
256 re_gmii_writereg(struct device *dev, int phy, int reg, int data)
257 {
258 struct rtk_softc *sc = (void *)dev;
259 u_int32_t rval;
260 int i;
261
262 CSR_WRITE_4(sc, RTK_PHYAR, (reg << 16) |
263 (data & RTK_PHYAR_PHYDATA) | RTK_PHYAR_BUSY);
264 DELAY(1000);
265
266 for (i = 0; i < RTK_TIMEOUT; i++) {
267 rval = CSR_READ_4(sc, RTK_PHYAR);
268 if (!(rval & RTK_PHYAR_BUSY))
269 break;
270 DELAY(100);
271 }
272
273 if (i == RTK_TIMEOUT) {
274 printf ("%s: PHY write reg %x <- %x failed\n",
275 sc->sc_dev.dv_xname, reg, data);
276 return;
277 }
278
279 return;
280 }
281
282 static int
283 re_miibus_readreg(struct device *dev, int phy, int reg)
284 {
285 struct rtk_softc *sc = (void *)dev;
286 u_int16_t rval = 0;
287 u_int16_t re8139_reg = 0;
288 int s;
289
290 s = splnet();
291
292 if (sc->rtk_type == RTK_8169) {
293 rval = re_gmii_readreg(dev, phy, reg);
294 splx(s);
295 return (rval);
296 }
297
298 /* Pretend the internal PHY is only at address 0 */
299 if (phy) {
300 splx(s);
301 return(0);
302 }
303 switch(reg) {
304 case MII_BMCR:
305 re8139_reg = RTK_BMCR;
306 break;
307 case MII_BMSR:
308 re8139_reg = RTK_BMSR;
309 break;
310 case MII_ANAR:
311 re8139_reg = RTK_ANAR;
312 break;
313 case MII_ANER:
314 re8139_reg = RTK_ANER;
315 break;
316 case MII_ANLPAR:
317 re8139_reg = RTK_LPAR;
318 break;
319 case MII_PHYIDR1:
320 case MII_PHYIDR2:
321 splx(s);
322 return(0);
323 /*
324 * Allow the rlphy driver to read the media status
325 * register. If we have a link partner which does not
326 * support NWAY, this is the register which will tell
327 * us the results of parallel detection.
328 */
329 case RTK_MEDIASTAT:
330 rval = CSR_READ_1(sc, RTK_MEDIASTAT);
331 splx(s);
332 return(rval);
333 default:
334 printf("%s: bad phy register\n", sc->sc_dev.dv_xname);
335 splx(s);
336 return(0);
337 }
338 rval = CSR_READ_2(sc, re8139_reg);
339 splx(s);
340 return(rval);
341 }
342
343 static void
344 re_miibus_writereg(struct device *dev, int phy, int reg, int data)
345 {
346 struct rtk_softc *sc = (void *)dev;
347 u_int16_t re8139_reg = 0;
348 int s;
349
350 s = splnet();
351
352 if (sc->rtk_type == RTK_8169) {
353 re_gmii_writereg(dev, phy, reg, data);
354 splx(s);
355 return;
356 }
357
358 /* Pretend the internal PHY is only at address 0 */
359 if (phy) {
360 splx(s);
361 return;
362 }
363 switch(reg) {
364 case MII_BMCR:
365 re8139_reg = RTK_BMCR;
366 break;
367 case MII_BMSR:
368 re8139_reg = RTK_BMSR;
369 break;
370 case MII_ANAR:
371 re8139_reg = RTK_ANAR;
372 break;
373 case MII_ANER:
374 re8139_reg = RTK_ANER;
375 break;
376 case MII_ANLPAR:
377 re8139_reg = RTK_LPAR;
378 break;
379 case MII_PHYIDR1:
380 case MII_PHYIDR2:
381 splx(s);
382 return;
383 break;
384 default:
385 printf("%s: bad phy register\n", sc->sc_dev.dv_xname);
386 splx(s);
387 return;
388 }
389 CSR_WRITE_2(sc, re8139_reg, data);
390 splx(s);
391 return;
392 }
393
394 static void
395 re_miibus_statchg(struct device *dev)
396 {
397
398 return;
399 }
400
401 static void
402 re_reset(struct rtk_softc *sc)
403 {
404 register int i;
405
406 CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_RESET);
407
408 for (i = 0; i < RTK_TIMEOUT; i++) {
409 DELAY(10);
410 if (!(CSR_READ_1(sc, RTK_COMMAND) & RTK_CMD_RESET))
411 break;
412 }
413 if (i == RTK_TIMEOUT)
414 printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
415
416 /*
417 * NB: Realtek-supplied Linux driver does this only for
418 * MCFG_METHOD_2, which corresponds to sc->sc_rev == 2.
419 */
420 if (1) /*XXX check softc flag for 8169s version */
421 CSR_WRITE_1(sc, 0x82, 1);
422
423 return;
424 }
425
426 /*
427 * The following routine is designed to test for a defect on some
428 * 32-bit 8169 cards. Some of these NICs have the REQ64# and ACK64#
429 * lines connected to the bus, however for a 32-bit only card, they
430 * should be pulled high. The result of this defect is that the
431 * NIC will not work right if you plug it into a 64-bit slot: DMA
432 * operations will be done with 64-bit transfers, which will fail
433 * because the 64-bit data lines aren't connected.
434 *
435 * There's no way to work around this (short of talking a soldering
436 * iron to the board), however we can detect it. The method we use
437 * here is to put the NIC into digital loopback mode, set the receiver
438 * to promiscuous mode, and then try to send a frame. We then compare
439 * the frame data we sent to what was received. If the data matches,
440 * then the NIC is working correctly, otherwise we know the user has
441 * a defective NIC which has been mistakenly plugged into a 64-bit PCI
442 * slot. In the latter case, there's no way the NIC can work correctly,
443 * so we print out a message on the console and abort the device attach.
444 */
445
446 static int
447 re_diag(struct rtk_softc *sc)
448 {
449 struct ifnet *ifp = &sc->ethercom.ec_if;
450 struct mbuf *m0;
451 struct ether_header *eh;
452 struct rtk_desc *cur_rx;
453 bus_dmamap_t dmamap;
454 u_int16_t status;
455 u_int32_t rxstat;
456 int total_len, i, s, error = 0;
457 u_int8_t dst[] = { 0x00, 'h', 'e', 'l', 'l', 'o' };
458 u_int8_t src[] = { 0x00, 'w', 'o', 'r', 'l', 'd' };
459
460 /* Allocate a single mbuf */
461
462 MGETHDR(m0, M_DONTWAIT, MT_DATA);
463 if (m0 == NULL)
464 return(ENOBUFS);
465
466 /*
467 * Initialize the NIC in test mode. This sets the chip up
468 * so that it can send and receive frames, but performs the
469 * following special functions:
470 * - Puts receiver in promiscuous mode
471 * - Enables digital loopback mode
472 * - Leaves interrupts turned off
473 */
474
475 ifp->if_flags |= IFF_PROMISC;
476 sc->rtk_testmode = 1;
477 re_init(ifp);
478 re_stop(ifp,1);
479 DELAY(100000);
480 re_init(ifp);
481
482 /* Put some data in the mbuf */
483
484 eh = mtod(m0, struct ether_header *);
485 bcopy ((char *)&dst, eh->ether_dhost, ETHER_ADDR_LEN);
486 bcopy ((char *)&src, eh->ether_shost, ETHER_ADDR_LEN);
487 eh->ether_type = htons(ETHERTYPE_IP);
488 m0->m_pkthdr.len = m0->m_len = ETHER_MIN_LEN - ETHER_CRC_LEN;
489
490 /*
491 * Queue the packet, start transmission.
492 */
493
494 CSR_WRITE_2(sc, RTK_ISR, 0xFFFF);
495 s = splnet();
496 IF_ENQUEUE(&ifp->if_snd, m0);
497 re_start(ifp);
498 splx(s);
499 m0 = NULL;
500
501 /* Wait for it to propagate through the chip */
502
503 DELAY(100000);
504 for (i = 0; i < RTK_TIMEOUT; i++) {
505 status = CSR_READ_2(sc, RTK_ISR);
506 if ((status & (RTK_ISR_TIMEOUT_EXPIRED|RTK_ISR_RX_OK)) ==
507 (RTK_ISR_TIMEOUT_EXPIRED|RTK_ISR_RX_OK))
508 break;
509 DELAY(10);
510 }
511 if (i == RTK_TIMEOUT) {
512 printf("%s: diagnostic failed, failed to receive packet "
513 "in loopback mode\n", sc->sc_dev.dv_xname);
514 error = EIO;
515 goto done;
516 }
517
518 /*
519 * The packet should have been dumped into the first
520 * entry in the RX DMA ring. Grab it from there.
521 */
522
523 dmamap = sc->rtk_ldata.rtk_rx_list_map;
524 bus_dmamap_sync(sc->sc_dmat,
525 dmamap, 0, dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
526 dmamap = sc->rtk_ldata.rtk_rx_dmamap[0];
527 bus_dmamap_sync(sc->sc_dmat, dmamap, 0, dmamap->dm_mapsize,
528 BUS_DMASYNC_POSTWRITE);
529 bus_dmamap_unload(sc->sc_dmat,
530 sc->rtk_ldata.rtk_rx_dmamap[0]);
531
532 m0 = sc->rtk_ldata.rtk_rx_mbuf[0];
533 sc->rtk_ldata.rtk_rx_mbuf[0] = NULL;
534 eh = mtod(m0, struct ether_header *);
535
536 cur_rx = &sc->rtk_ldata.rtk_rx_list[0];
537 total_len = RTK_RXBYTES(cur_rx);
538 rxstat = le32toh(cur_rx->rtk_cmdstat);
539
540 if (total_len != ETHER_MIN_LEN) {
541 printf("%s: diagnostic failed, received short packet\n",
542 sc->sc_dev.dv_xname);
543 error = EIO;
544 goto done;
545 }
546
547 /* Test that the received packet data matches what we sent. */
548
549 if (bcmp((char *)&eh->ether_dhost, (char *)&dst, ETHER_ADDR_LEN) ||
550 bcmp((char *)&eh->ether_shost, (char *)&src, ETHER_ADDR_LEN) ||
551 ntohs(eh->ether_type) != ETHERTYPE_IP) {
552 printf("%s: WARNING, DMA FAILURE!\n", sc->sc_dev.dv_xname);
553 printf("%s: expected TX data: %s",
554 sc->sc_dev.dv_xname, ether_sprintf(dst));
555 printf("/%s/0x%x\n", ether_sprintf(src), ETHERTYPE_IP);
556 printf("%s: received RX data: %s",
557 sc->sc_dev.dv_xname,
558 ether_sprintf(eh->ether_dhost));
559 printf("/%s/0x%x\n", ether_sprintf(eh->ether_shost),
560 ntohs(eh->ether_type));
561 printf("%s: You may have a defective 32-bit NIC plugged "
562 "into a 64-bit PCI slot.\n", sc->sc_dev.dv_xname);
563 printf("%s: Please re-install the NIC in a 32-bit slot "
564 "for proper operation.\n", sc->sc_dev.dv_xname);
565 printf("%s: Read the re(4) man page for more details.\n",
566 sc->sc_dev.dv_xname);
567 error = EIO;
568 }
569
570 done:
571 /* Turn interface off, release resources */
572
573 sc->rtk_testmode = 0;
574 ifp->if_flags &= ~IFF_PROMISC;
575 re_stop(ifp,1);
576 if (m0 != NULL)
577 m_freem(m0);
578
579 return (error);
580 }
581
582 static int
583 re_allocmem(struct rtk_softc *sc)
584 {
585 int error;
586 int nseg, rseg;
587 int i;
588
589 nseg = 32;
590
591 /* Allocate DMA'able memory for the TX ring */
592
593 error = bus_dmamap_create(sc->sc_dmat, RTK_TX_LIST_SZ, 1,
594 RTK_TX_LIST_SZ, 0, BUS_DMA_ALLOCNOW,
595 &sc->rtk_ldata.rtk_tx_list_map);
596 error = bus_dmamem_alloc(sc->sc_dmat, RTK_TX_LIST_SZ,
597 RTK_ETHER_ALIGN, 0,
598 &sc->rtk_ldata.rtk_tx_listseg, 1, &rseg, BUS_DMA_NOWAIT);
599 if (error)
600 return (ENOMEM);
601
602 /* Load the map for the TX ring. */
603 error = bus_dmamem_map(sc->sc_dmat, &sc->rtk_ldata.rtk_tx_listseg,
604 1, RTK_TX_LIST_SZ,
605 (caddr_t *)&sc->rtk_ldata.rtk_tx_list, BUS_DMA_NOWAIT);
606 memset(sc->rtk_ldata.rtk_tx_list, 0, RTK_TX_LIST_SZ);
607
608 error = bus_dmamap_load(sc->sc_dmat, sc->rtk_ldata.rtk_tx_list_map,
609 sc->rtk_ldata.rtk_tx_list, RTK_TX_LIST_SZ, NULL, BUS_DMA_NOWAIT);
610
611 /* Create DMA maps for TX buffers */
612
613 for (i = 0; i < RTK_TX_DESC_CNT; i++) {
614 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES * nseg, nseg,
615 MCLBYTES, 0, BUS_DMA_ALLOCNOW,
616 &sc->rtk_ldata.rtk_tx_dmamap[i]);
617 if (error) {
618 printf("%s: can't create DMA map for TX\n",
619 sc->sc_dev.dv_xname);
620 return(ENOMEM);
621 }
622 }
623
624 /* Allocate DMA'able memory for the RX ring */
625
626 error = bus_dmamap_create(sc->sc_dmat, RTK_RX_LIST_SZ, 1,
627 RTK_RX_LIST_SZ, 0, BUS_DMA_ALLOCNOW,
628 &sc->rtk_ldata.rtk_rx_list_map);
629 error = bus_dmamem_alloc(sc->sc_dmat, RTK_RX_LIST_SZ, RTK_RING_ALIGN,
630 0, &sc->rtk_ldata.rtk_rx_listseg, 1, &rseg, BUS_DMA_NOWAIT);
631 if (error)
632 return (ENOMEM);
633
634 /* Load the map for the RX ring. */
635 error = bus_dmamem_map(sc->sc_dmat, &sc->rtk_ldata.rtk_rx_listseg,
636 1, RTK_RX_LIST_SZ,
637 (caddr_t *)&sc->rtk_ldata.rtk_rx_list, BUS_DMA_NOWAIT);
638 memset(sc->rtk_ldata.rtk_rx_list, 0, RTK_TX_LIST_SZ);
639
640 error = bus_dmamap_load(sc->sc_dmat, sc->rtk_ldata.rtk_rx_list_map,
641 sc->rtk_ldata.rtk_rx_list, RTK_RX_LIST_SZ, NULL, BUS_DMA_NOWAIT);
642
643 /* Create DMA maps for RX buffers */
644
645 for (i = 0; i < RTK_RX_DESC_CNT; i++) {
646 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES * nseg, nseg,
647 MCLBYTES, 0, BUS_DMA_ALLOCNOW,
648 &sc->rtk_ldata.rtk_rx_dmamap[i]);
649 if (error) {
650 printf("%s: can't create DMA map for RX\n",
651 sc->sc_dev.dv_xname);
652 return(ENOMEM);
653 }
654 }
655
656 return(0);
657 }
658
659 /*
660 * Attach the interface. Allocate softc structures, do ifmedia
661 * setup and ethernet/BPF attach.
662 */
663 void
664 re_attach(struct rtk_softc *sc)
665 {
666 u_char eaddr[ETHER_ADDR_LEN];
667 u_int16_t val;
668 struct ifnet *ifp;
669 int error = 0, i, addr_len;
670
671 /* XXX JRS: bus-attach-independent code begins approximately here */
672
673 /* Reset the adapter. */
674 re_reset(sc);
675
676 if (sc->rtk_type == RTK_8169) {
677 uint32_t hwrev;
678
679 /* Revision of 8169/8169S/8110s in bits 30..26, 23 */
680 hwrev = CSR_READ_4(sc, RTK_TXCFG) & 0x7c800000;
681 if (hwrev == (0x1 << 28)) {
682 sc->sc_rev = 4;
683 } else if (hwrev == (0x1 << 26)) {
684 sc->sc_rev = 3;
685 } else if (hwrev == (0x1 << 23)) {
686 sc->sc_rev = 2;
687 } else
688 sc->sc_rev = 1;
689 #if defined(DEBUG) || 1
690 printf("re_attach: MAC chip hwrev 0x%x softc %d\n",
691 hwrev, sc->sc_rev);
692 #endif
693
694 /* Set RX length mask */
695
696 sc->rtk_rxlenmask = RTK_RDESC_STAT_GFRAGLEN;
697
698 /* Force station address autoload from the EEPROM */
699
700 CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_AUTOLOAD);
701 for (i = 0; i < RTK_TIMEOUT; i++) {
702 if (!(CSR_READ_1(sc, RTK_EECMD) & RTK_EEMODE_AUTOLOAD))
703 break;
704 DELAY(100);
705 }
706 if (i == RTK_TIMEOUT)
707 printf ("%s: eeprom autoload timed out\n", sc->sc_dev.dv_xname);
708
709 for (i = 0; i < ETHER_ADDR_LEN; i++)
710 eaddr[i] = CSR_READ_1(sc, RTK_IDR0 + i);
711 } else {
712
713 /* Set RX length mask */
714
715 sc->rtk_rxlenmask = RTK_RDESC_STAT_FRAGLEN;
716
717 if (rtk_read_eeprom(sc, RTK_EE_ID, RTK_EEADDR_LEN1) == 0x8129)
718 addr_len = RTK_EEADDR_LEN1;
719 else
720 addr_len = RTK_EEADDR_LEN0;
721
722 /*
723 * Get station address from the EEPROM.
724 */
725 for (i = 0; i < 3; i++) {
726 val = rtk_read_eeprom(sc, RTK_EE_EADDR0 + i, addr_len);
727 eaddr[(i * 2) + 0] = val & 0xff;
728 eaddr[(i * 2) + 1] = val >> 8;
729 }
730 }
731
732 aprint_normal("%s: Ethernet address %s\n",
733 sc->sc_dev.dv_xname, ether_sprintf(eaddr));
734
735 error = re_allocmem(sc);
736
737 if (error) {
738 printf("%s: attach aborted, re_allocmem() failure\n",
739 sc->sc_dev.dv_xname);
740 goto fail;
741 }
742
743 ifp = &sc->ethercom.ec_if;
744 ifp->if_softc = sc;
745 strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
746 ifp->if_mtu = ETHERMTU;
747 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
748 ifp->if_ioctl = re_ioctl;
749 sc->ethercom.ec_capabilities |=
750 ETHERCAP_VLAN_MTU | ETHERCAP_VLAN_HWTAGGING;
751 ifp->if_start = re_start;
752 ifp->if_stop = re_stop;
753 ifp->if_capabilities |=
754 IFCAP_CSUM_IPv4 | IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4;
755 ifp->if_watchdog = re_watchdog;
756 ifp->if_init = re_init;
757 if (sc->rtk_type == RTK_8169)
758 ifp->if_baudrate = 1000000000;
759 else
760 ifp->if_baudrate = 100000000;
761 ifp->if_snd.ifq_maxlen = RTK_IFQ_MAXLEN;
762 ifp->if_capenable = ifp->if_capabilities;
763 IFQ_SET_READY(&ifp->if_snd);
764
765 callout_init(&sc->rtk_tick_ch);
766
767 /* Do MII setup */
768 sc->mii.mii_ifp = ifp;
769 sc->mii.mii_readreg = re_miibus_readreg;
770 sc->mii.mii_writereg = re_miibus_writereg;
771 sc->mii.mii_statchg = re_miibus_statchg;
772 ifmedia_init(&sc->mii.mii_media, IFM_IMASK, re_ifmedia_upd,
773 re_ifmedia_sts);
774 mii_attach(&sc->sc_dev, &sc->mii, 0xffffffff, MII_PHY_ANY,
775 MII_OFFSET_ANY, 0);
776 ifmedia_set(&sc->mii.mii_media, IFM_ETHER|IFM_AUTO);
777
778 /*
779 * Call MI attach routine.
780 */
781 if_attach(ifp);
782 ether_ifattach(ifp, eaddr);
783
784 /*
785 * Perform hardware diagnostic.
786 * XXX: this diagnostic only makes sense for attachemnts with 64-bit
787 * busses: PCI, but not CardBus.
788 */
789 error = re_diag(sc);
790
791 if (error) {
792 printf("%s: attach aborted due to hardware diag failure\n",
793 sc->sc_dev.dv_xname);
794 ether_ifdetach(ifp);
795 if_detach(ifp);
796 goto fail;
797 }
798
799 /*
800 * Record interface as attached. From here, we should not fail.
801 */
802
803 /*
804 * Make sure the interface is shutdown during reboot.
805 */
806 sc->sc_sdhook = shutdownhook_establish(re_shutdown, sc);
807 if (sc->sc_sdhook == NULL)
808 printf("%s: WARNING: unable to establish shutdown hook\n",
809 sc->sc_dev.dv_xname);
810 /*
811 * Add a suspend hook to make sure we come back up after a
812 * resume.
813 */
814 sc->sc_powerhook = powerhook_establish(re_power, sc);
815 if (sc->sc_powerhook == NULL)
816 printf("%s: WARNING: unable to establish power hook\n",
817 sc->sc_dev.dv_xname);
818
819 sc->sc_flags |= RTK_ATTACHED;
820
821 fail:
822 #if 0
823 if (error)
824 re_detach(sc);
825 #endif
826 return;
827 }
828
829 #ifdef __FreeBSD__
830 /*
831 * Shutdown hardware and free up resources. This can be called any
832 * time after the mutex has been initialized. It is called in both
833 * the error case in attach and the normal detach case so it needs
834 * to be careful about only freeing resources that have actually been
835 * allocated.
836 */
837 static int
838 re_detach(struct device *self, int flags)
839 {
840 struct rtk_softc *sc;
841 struct ifnet *ifp;
842 int i;
843
844 sc = device_get_softc(dev);
845 KASSERT(mtx_initialized(&sc->rtk_mtx), ("rl mutex not initialized"));
846 RTK_LOCK(sc);
847 ifp = &sc->ethercom.ec_if;
848
849 /* These should only be active if attach succeeded */
850 if (device_is_attached(dev)) {
851 re_stop(ifp, 0);
852 /*
853 * Force off the IFF_UP flag here, in case someone
854 * still had a BPF descriptor attached to this
855 * interface. If they do, ether_ifattach() will cause
856 * the BPF code to try and clear the promisc mode
857 * flag, which will bubble down to re_ioctl(),
858 * which will try to call re_init() again. This will
859 * turn the NIC back on and restart the MII ticker,
860 * which will panic the system when the kernel tries
861 * to invoke the re_tick() function that isn't there
862 * anymore.
863 */
864 ifp->if_flags &= ~IFF_UP;
865 ether_ifdetach(ifp);
866 }
867 if (sc->rtk_miibus)
868 device_delete_child(dev, sc->rtk_miibus);
869 bus_generic_detach(dev);
870
871 if (sc->rtk_intrhand)
872 bus_teardown_intr(dev, sc->rtk_irq, sc->rtk_intrhand);
873 if (sc->rtk_irq)
874 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->rtk_irq);
875 if (sc->rtk_res)
876 bus_release_resource(dev, RTK_RES, RTK_RID, sc->rtk_res);
877
878
879 /* Unload and free the RX DMA ring memory and map */
880
881 bus_dmamap_unload(sc->sc_dmat, sc->rtk_ldata.rtk_rx_list_map);
882 bus_dmamem_free(sc->sc_dmat,
883 sc->rtk_ldata.rtk_rx_list,
884 sc->rtk_ldata.rtk_rx_list_map);
885
886 /* Unload and free the TX DMA ring memory and map */
887
888 bus_dmamap_unload(sc->sc_dmat, sc->rtk_ldata.rtk_tx_list_map);
889 bus_dmamem_free(sc->sc_dmat, sc->rtk_ldata.rtk_tx_list,
890 sc->rtk_ldata.rtk_tx_list_map);
891
892 /* Destroy all the RX and TX buffer maps */
893
894 for (i = 0; i < RTK_TX_DESC_CNT; i++)
895 bus_dmamap_destroy(sc->sc_dmat,
896 sc->rtk_ldata.rtk_tx_dmamap[i]);
897 for (i = 0; i < RTK_RX_DESC_CNT; i++)
898 bus_dmamap_destroy(sc->sc_dmat,
899 sc->rtk_ldata.rtk_rx_dmamap[i]);
900
901 /* Unload and free the stats buffer and map */
902
903 if (sc->rtk_ldata.rtk_stag) {
904 bus_dmamap_unload(sc->rtk_ldata.rtk_stag,
905 sc->rtk_ldata.rtk_rx_list_map);
906 bus_dmamem_free(sc->rtk_ldata.rtk_stag,
907 sc->rtk_ldata.rtk_stats,
908 sc->rtk_ldata.rtk_smap);
909 bus_dma_tag_destroy(sc->rtk_ldata.rtk_stag);
910 }
911
912 if (sc->rtk_parent_tag)
913 bus_dma_tag_destroy(sc->rtk_parent_tag);
914
915 RTK_UNLOCK(sc);
916 mtx_destroy(&sc->rtk_mtx);
917
918 return(0);
919 }
920 #endif /* __FreeBSD__ */
921
922 /*
923 * re_activate:
924 * Handle device activation/deactivation requests.
925 */
926 int
927 re_activate(struct device *self, enum devact act)
928 {
929 struct rtk_softc *sc = (void *) self;
930 int s, error = 0;
931
932 s = splnet();
933 switch (act) {
934 case DVACT_ACTIVATE:
935 error = EOPNOTSUPP;
936 break;
937 case DVACT_DEACTIVATE:
938 mii_activate(&sc->mii, act, MII_PHY_ANY, MII_OFFSET_ANY);
939 if_deactivate(&sc->ethercom.ec_if);
940 break;
941 }
942 splx(s);
943
944 return (error);
945 }
946
947 /*
948 * re_detach:
949 * Detach a rtk interface.
950 */
951 int
952 re_detach(struct rtk_softc *sc)
953 {
954 struct ifnet *ifp = &sc->ethercom.ec_if;
955
956 /*
957 * Succeed now if there isn't any work to do.
958 */
959 if ((sc->sc_flags & RTK_ATTACHED) == 0)
960 return (0);
961
962 /* Unhook our tick handler. */
963 callout_stop(&sc->rtk_tick_ch);
964
965 /* Detach all PHYs. */
966 mii_detach(&sc->mii, MII_PHY_ANY, MII_OFFSET_ANY);
967
968 /* Delete all remaining media. */
969 ifmedia_delete_instance(&sc->mii.mii_media, IFM_INST_ANY);
970
971 ether_ifdetach(ifp);
972 if_detach(ifp);
973
974 /* XXX undo re_allocmem() */
975 #if 0 /* bogus cut-and-paste from rtl81x9.c */
976 for (i = 0; i < RTK_TX_LIST_CNT; i++) {
977 txd = &sc->rtk_tx_descs[i];
978 if (txd->txd_dmamap != NULL)
979 bus_dmamap_destroy(sc->sc_dmat, txd->txd_dmamap);
980 }
981 bus_dmamap_destroy(sc->sc_dmat, sc->recv_dmamap);
982 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->rtk_rx_buf,
983 RTK_RXBUFLEN + 16);
984 /* XXX TX ring, Tx buffer, Rx ring, Rx buffer */
985 bus_dmamem_free(sc->sc_dmat, &sc->sc_dmaseg, sc->sc_dmanseg);
986 #endif
987
988 shutdownhook_disestablish(sc->sc_sdhook);
989 powerhook_disestablish(sc->sc_powerhook);
990
991 return(0);
992 }
993
994 /*
995 * re_enable:
996 * Enable the RTL81X9 chip.
997 */
998 static int
999 re_enable(struct rtk_softc *sc)
1000 {
1001 if (RTK_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
1002 if ((*sc->sc_enable)(sc) != 0) {
1003 printf("%s: device enable failed\n",
1004 sc->sc_dev.dv_xname);
1005 return (EIO);
1006 }
1007 sc->sc_flags |= RTK_ENABLED;
1008 }
1009 return (0);
1010 }
1011
1012 /*
1013 * re_disable:
1014 * Disable the RTL81X9 chip.
1015 */
1016 static void
1017 re_disable(struct rtk_softc *sc)
1018 {
1019
1020 if (RTK_IS_ENABLED(sc) && sc->sc_disable != NULL) {
1021 (*sc->sc_disable)(sc);
1022 sc->sc_flags &= ~RTK_ENABLED;
1023 }
1024 }
1025
1026 /*
1027 * re_power:
1028 * Power management (suspend/resume) hook.
1029 */
1030 void
1031 re_power(int why, void *arg)
1032 {
1033 struct rtk_softc *sc = (void *) arg;
1034 struct ifnet *ifp = &sc->ethercom.ec_if;
1035 int s;
1036
1037 s = splnet();
1038 switch (why) {
1039 case PWR_SUSPEND:
1040 case PWR_STANDBY:
1041 re_stop(ifp, 0);
1042 if (sc->sc_power != NULL)
1043 (*sc->sc_power)(sc, why);
1044 break;
1045 case PWR_RESUME:
1046 if (ifp->if_flags & IFF_UP) {
1047 if (sc->sc_power != NULL)
1048 (*sc->sc_power)(sc, why);
1049 re_init(ifp);
1050 }
1051 break;
1052 case PWR_SOFTSUSPEND:
1053 case PWR_SOFTSTANDBY:
1054 case PWR_SOFTRESUME:
1055 break;
1056 }
1057 splx(s);
1058 }
1059
1060
1061 static int
1062 re_newbuf(struct rtk_softc *sc, int idx, struct mbuf *m)
1063 {
1064 struct mbuf *n = NULL;
1065 bus_dmamap_t map;
1066 struct rtk_desc *d;
1067 u_int32_t cmdstat;
1068 int error;
1069
1070 if (m == NULL) {
1071 MGETHDR(n, M_DONTWAIT, MT_DATA);
1072 if (n == NULL)
1073 return(ENOBUFS);
1074 m = n;
1075
1076 MCLGET(m, M_DONTWAIT);
1077 if (! (m->m_flags & M_EXT)) {
1078 m_freem(m);
1079 return(ENOBUFS);
1080 }
1081 } else
1082 m->m_data = m->m_ext.ext_buf;
1083
1084 /*
1085 * Initialize mbuf length fields and fixup
1086 * alignment so that the frame payload is
1087 * longword aligned.
1088 */
1089 m->m_len = m->m_pkthdr.len = MCLBYTES;
1090 m_adj(m, RTK_ETHER_ALIGN);
1091
1092 map = sc->rtk_ldata.rtk_rx_dmamap[idx];
1093 error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, BUS_DMA_NOWAIT);
1094
1095 if (map->dm_nsegs > 1)
1096 goto out;
1097 if (error)
1098 goto out;
1099
1100 d = &sc->rtk_ldata.rtk_rx_list[idx];
1101 if (le32toh(d->rtk_cmdstat) & RTK_RDESC_STAT_OWN)
1102 goto out;
1103
1104 cmdstat = map->dm_segs[0].ds_len;
1105 d->rtk_bufaddr_lo = htole32(RTK_ADDR_LO(map->dm_segs[0].ds_addr));
1106 d->rtk_bufaddr_hi = htole32(RTK_ADDR_HI(map->dm_segs[0].ds_addr));
1107 cmdstat |= RTK_TDESC_CMD_SOF;
1108 if (idx == (RTK_RX_DESC_CNT - 1))
1109 cmdstat |= RTK_TDESC_CMD_EOR;
1110 d->rtk_cmdstat = htole32(cmdstat);
1111
1112 d->rtk_cmdstat |= htole32(RTK_TDESC_CMD_EOF);
1113
1114
1115 sc->rtk_ldata.rtk_rx_list[idx].rtk_cmdstat |= htole32(RTK_RDESC_CMD_OWN);
1116 sc->rtk_ldata.rtk_rx_mbuf[idx] = m;
1117
1118 bus_dmamap_sync(sc->sc_dmat, sc->rtk_ldata.rtk_rx_dmamap[idx], 0,
1119 sc->rtk_ldata.rtk_rx_dmamap[idx]->dm_mapsize,
1120 BUS_DMASYNC_PREREAD);
1121
1122 return 0;
1123 out:
1124 if (n != NULL)
1125 m_freem(n);
1126 return ENOMEM;
1127 }
1128
1129 static int
1130 re_tx_list_init(struct rtk_softc *sc)
1131 {
1132 memset((char *)sc->rtk_ldata.rtk_tx_list, 0, RTK_TX_LIST_SZ);
1133 memset((char *)&sc->rtk_ldata.rtk_tx_mbuf, 0,
1134 (RTK_TX_DESC_CNT * sizeof(struct mbuf *)));
1135
1136 bus_dmamap_sync(sc->sc_dmat,
1137 sc->rtk_ldata.rtk_tx_list_map, 0,
1138 sc->rtk_ldata.rtk_tx_list_map->dm_mapsize, BUS_DMASYNC_PREWRITE);
1139 sc->rtk_ldata.rtk_tx_prodidx = 0;
1140 sc->rtk_ldata.rtk_tx_considx = 0;
1141 sc->rtk_ldata.rtk_tx_free = RTK_TX_DESC_CNT;
1142
1143 return(0);
1144 }
1145
1146 static int
1147 re_rx_list_init(struct rtk_softc *sc)
1148 {
1149 int i;
1150
1151 memset((char *)sc->rtk_ldata.rtk_rx_list, 0, RTK_RX_LIST_SZ);
1152 memset((char *)&sc->rtk_ldata.rtk_rx_mbuf, 0,
1153 (RTK_RX_DESC_CNT * sizeof(struct mbuf *)));
1154
1155 for (i = 0; i < RTK_RX_DESC_CNT; i++) {
1156 if (re_newbuf(sc, i, NULL) == ENOBUFS)
1157 return(ENOBUFS);
1158 }
1159
1160 /* Flush the RX descriptors */
1161
1162 bus_dmamap_sync(sc->sc_dmat,
1163 sc->rtk_ldata.rtk_rx_list_map,
1164 0, sc->rtk_ldata.rtk_rx_list_map->dm_mapsize,
1165 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1166
1167 sc->rtk_ldata.rtk_rx_prodidx = 0;
1168 sc->rtk_head = sc->rtk_tail = NULL;
1169
1170 return(0);
1171 }
1172
1173 /*
1174 * RX handler for C+ and 8169. For the gigE chips, we support
1175 * the reception of jumbo frames that have been fragmented
1176 * across multiple 2K mbuf cluster buffers.
1177 */
1178 static void
1179 re_rxeof(struct rtk_softc *sc)
1180 {
1181 struct mbuf *m;
1182 struct ifnet *ifp;
1183 int i, total_len;
1184 struct rtk_desc *cur_rx;
1185 struct m_tag *mtag;
1186 u_int32_t rxstat, rxvlan;
1187
1188 ifp = &sc->ethercom.ec_if;
1189 i = sc->rtk_ldata.rtk_rx_prodidx;
1190
1191 /* Invalidate the descriptor memory */
1192
1193 bus_dmamap_sync(sc->sc_dmat,
1194 sc->rtk_ldata.rtk_rx_list_map,
1195 0, sc->rtk_ldata.rtk_rx_list_map->dm_mapsize,
1196 BUS_DMASYNC_POSTREAD);
1197
1198 while (!RTK_OWN(&sc->rtk_ldata.rtk_rx_list[i])) {
1199
1200 cur_rx = &sc->rtk_ldata.rtk_rx_list[i];
1201 m = sc->rtk_ldata.rtk_rx_mbuf[i];
1202 total_len = RTK_RXBYTES(cur_rx);
1203 rxstat = le32toh(cur_rx->rtk_cmdstat);
1204 rxvlan = le32toh(cur_rx->rtk_vlanctl);
1205
1206 /* Invalidate the RX mbuf and unload its map */
1207
1208 bus_dmamap_sync(sc->sc_dmat,
1209 sc->rtk_ldata.rtk_rx_dmamap[i],
1210 0, sc->rtk_ldata.rtk_rx_dmamap[i]->dm_mapsize,
1211 BUS_DMASYNC_POSTWRITE);
1212 bus_dmamap_unload(sc->sc_dmat,
1213 sc->rtk_ldata.rtk_rx_dmamap[i]);
1214
1215 if (!(rxstat & RTK_RDESC_STAT_EOF)) {
1216 m->m_len = MCLBYTES - RTK_ETHER_ALIGN;
1217 if (sc->rtk_head == NULL)
1218 sc->rtk_head = sc->rtk_tail = m;
1219 else {
1220 m->m_flags &= ~M_PKTHDR;
1221 sc->rtk_tail->m_next = m;
1222 sc->rtk_tail = m;
1223 }
1224 re_newbuf(sc, i, NULL);
1225 RTK_DESC_INC(i);
1226 continue;
1227 }
1228
1229 /*
1230 * NOTE: for the 8139C+, the frame length field
1231 * is always 12 bits in size, but for the gigE chips,
1232 * it is 13 bits (since the max RX frame length is 16K).
1233 * Unfortunately, all 32 bits in the status word
1234 * were already used, so to make room for the extra
1235 * length bit, RealTek took out the 'frame alignment
1236 * error' bit and shifted the other status bits
1237 * over one slot. The OWN, EOR, FS and LS bits are
1238 * still in the same places. We have already extracted
1239 * the frame length and checked the OWN bit, so rather
1240 * than using an alternate bit mapping, we shift the
1241 * status bits one space to the right so we can evaluate
1242 * them using the 8169 status as though it was in the
1243 * same format as that of the 8139C+.
1244 */
1245 if (sc->rtk_type == RTK_8169)
1246 rxstat >>= 1;
1247
1248 if (rxstat & RTK_RDESC_STAT_RXERRSUM) {
1249 ifp->if_ierrors++;
1250 /*
1251 * If this is part of a multi-fragment packet,
1252 * discard all the pieces.
1253 */
1254 if (sc->rtk_head != NULL) {
1255 m_freem(sc->rtk_head);
1256 sc->rtk_head = sc->rtk_tail = NULL;
1257 }
1258 re_newbuf(sc, i, m);
1259 RTK_DESC_INC(i);
1260 continue;
1261 }
1262
1263 /*
1264 * If allocating a replacement mbuf fails,
1265 * reload the current one.
1266 */
1267
1268 if (re_newbuf(sc, i, NULL)) {
1269 ifp->if_ierrors++;
1270 if (sc->rtk_head != NULL) {
1271 m_freem(sc->rtk_head);
1272 sc->rtk_head = sc->rtk_tail = NULL;
1273 }
1274 re_newbuf(sc, i, m);
1275 RTK_DESC_INC(i);
1276 continue;
1277 }
1278
1279 RTK_DESC_INC(i);
1280
1281 if (sc->rtk_head != NULL) {
1282 m->m_len = total_len % (MCLBYTES - RTK_ETHER_ALIGN);
1283 /*
1284 * Special case: if there's 4 bytes or less
1285 * in this buffer, the mbuf can be discarded:
1286 * the last 4 bytes is the CRC, which we don't
1287 * care about anyway.
1288 */
1289 if (m->m_len <= ETHER_CRC_LEN) {
1290 sc->rtk_tail->m_len -=
1291 (ETHER_CRC_LEN - m->m_len);
1292 m_freem(m);
1293 } else {
1294 m->m_len -= ETHER_CRC_LEN;
1295 m->m_flags &= ~M_PKTHDR;
1296 sc->rtk_tail->m_next = m;
1297 }
1298 m = sc->rtk_head;
1299 sc->rtk_head = sc->rtk_tail = NULL;
1300 m->m_pkthdr.len = total_len - ETHER_CRC_LEN;
1301 } else
1302 m->m_pkthdr.len = m->m_len =
1303 (total_len - ETHER_CRC_LEN);
1304
1305 ifp->if_ipackets++;
1306 m->m_pkthdr.rcvif = ifp;
1307
1308 /* Do RX checksumming if enabled */
1309
1310 if (ifp->if_capenable & IFCAP_CSUM_IPv4) {
1311
1312 /* Check IP header checksum */
1313 if (rxstat & RTK_RDESC_STAT_PROTOID)
1314 m->m_pkthdr.csum_flags |= M_CSUM_IPv4;;
1315 if (rxstat & RTK_RDESC_STAT_IPSUMBAD)
1316 m->m_pkthdr.csum_flags |= M_CSUM_IPv4_BAD;
1317 }
1318
1319 /* Check TCP/UDP checksum */
1320 if (RTK_TCPPKT(rxstat) &&
1321 (ifp->if_capenable & IFCAP_CSUM_TCPv4)) {
1322 m->m_pkthdr.csum_flags |= M_CSUM_TCPv4;
1323 if (rxstat & RTK_RDESC_STAT_TCPSUMBAD)
1324 m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
1325 }
1326 if (RTK_UDPPKT(rxstat) &&
1327 (ifp->if_capenable & IFCAP_CSUM_UDPv4)) {
1328 m->m_pkthdr.csum_flags |= M_CSUM_UDPv4;
1329 if (rxstat & RTK_RDESC_STAT_UDPSUMBAD)
1330 m->m_pkthdr.csum_flags |= M_CSUM_TCP_UDP_BAD;
1331 }
1332
1333 if (rxvlan & RTK_RDESC_VLANCTL_TAG) {
1334 mtag = m_tag_get(PACKET_TAG_VLAN, sizeof(u_int),
1335 M_NOWAIT);
1336 if (mtag == NULL) {
1337 ifp->if_ierrors++;
1338 m_freem(m);
1339 continue;
1340 }
1341 *(u_int *)(mtag + 1) =
1342 be16toh(rxvlan & RTK_RDESC_VLANCTL_DATA);
1343 m_tag_prepend(m, mtag);
1344 }
1345 #if NBPFILTER > 0
1346 if (ifp->if_bpf)
1347 bpf_mtap(ifp->if_bpf, m);
1348 #endif
1349 (*ifp->if_input)(ifp, m);
1350 }
1351
1352 /* Flush the RX DMA ring */
1353
1354 bus_dmamap_sync(sc->sc_dmat,
1355 sc->rtk_ldata.rtk_rx_list_map,
1356 0, sc->rtk_ldata.rtk_rx_list_map->dm_mapsize,
1357 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1358
1359 sc->rtk_ldata.rtk_rx_prodidx = i;
1360
1361 return;
1362 }
1363
1364 static void
1365 re_txeof(struct rtk_softc *sc)
1366 {
1367 struct ifnet *ifp;
1368 u_int32_t txstat;
1369 int idx;
1370
1371 ifp = &sc->ethercom.ec_if;
1372 idx = sc->rtk_ldata.rtk_tx_considx;
1373
1374 /* Invalidate the TX descriptor list */
1375
1376 bus_dmamap_sync(sc->sc_dmat,
1377 sc->rtk_ldata.rtk_tx_list_map,
1378 0, sc->rtk_ldata.rtk_tx_list_map->dm_mapsize,
1379 BUS_DMASYNC_POSTREAD);
1380
1381 while (idx != sc->rtk_ldata.rtk_tx_prodidx) {
1382
1383 txstat = le32toh(sc->rtk_ldata.rtk_tx_list[idx].rtk_cmdstat);
1384 if (txstat & RTK_TDESC_CMD_OWN)
1385 break;
1386
1387 /*
1388 * We only stash mbufs in the last descriptor
1389 * in a fragment chain, which also happens to
1390 * be the only place where the TX status bits
1391 * are valid.
1392 */
1393
1394 if (txstat & RTK_TDESC_CMD_EOF) {
1395 m_freem(sc->rtk_ldata.rtk_tx_mbuf[idx]);
1396 sc->rtk_ldata.rtk_tx_mbuf[idx] = NULL;
1397 bus_dmamap_unload(sc->sc_dmat,
1398 sc->rtk_ldata.rtk_tx_dmamap[idx]);
1399 if (txstat & (RTK_TDESC_STAT_EXCESSCOL|
1400 RTK_TDESC_STAT_COLCNT))
1401 ifp->if_collisions++;
1402 if (txstat & RTK_TDESC_STAT_TXERRSUM)
1403 ifp->if_oerrors++;
1404 else
1405 ifp->if_opackets++;
1406 }
1407 sc->rtk_ldata.rtk_tx_free++;
1408 RTK_DESC_INC(idx);
1409 }
1410
1411 /* No changes made to the TX ring, so no flush needed */
1412
1413 if (idx != sc->rtk_ldata.rtk_tx_considx) {
1414 sc->rtk_ldata.rtk_tx_considx = idx;
1415 ifp->if_flags &= ~IFF_OACTIVE;
1416 ifp->if_timer = 0;
1417 }
1418
1419 /*
1420 * If not all descriptors have been released reaped yet,
1421 * reload the timer so that we will eventually get another
1422 * interrupt that will cause us to re-enter this routine.
1423 * This is done in case the transmitter has gone idle.
1424 */
1425 if (sc->rtk_ldata.rtk_tx_free != RTK_TX_DESC_CNT)
1426 CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
1427
1428 return;
1429 }
1430
1431 /*
1432 * Stop all chip I/O so that the kernel's probe routines don't
1433 * get confused by errant DMAs when rebooting.
1434 */
1435 static void
1436 re_shutdown(void *vsc)
1437
1438 {
1439 struct rtk_softc *sc = (struct rtk_softc *)vsc;
1440
1441 re_stop(&sc->ethercom.ec_if, 0);
1442 }
1443
1444
1445 static void
1446 re_tick(void *xsc)
1447 {
1448 struct rtk_softc *sc = xsc;
1449 int s;
1450
1451 /*XXX: just return for 8169S/8110S with rev 2 or newer phy */
1452 s = splnet();
1453
1454 mii_tick(&sc->mii);
1455 splx(s);
1456
1457 callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
1458 }
1459
1460 #ifdef DEVICE_POLLING
1461 static void
1462 re_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
1463 {
1464 struct rtk_softc *sc = ifp->if_softc;
1465
1466 RTK_LOCK(sc);
1467 if (!(ifp->if_capenable & IFCAP_POLLING)) {
1468 ether_poll_deregister(ifp);
1469 cmd = POLL_DEREGISTER;
1470 }
1471 if (cmd == POLL_DEREGISTER) { /* final call, enable interrupts */
1472 CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
1473 goto done;
1474 }
1475
1476 sc->rxcycles = count;
1477 re_rxeof(sc);
1478 re_txeof(sc);
1479
1480 if (ifp->if_snd.ifq_head != NULL)
1481 (*ifp->if_start)(ifp);
1482
1483 if (cmd == POLL_AND_CHECK_STATUS) { /* also check status register */
1484 u_int16_t status;
1485
1486 status = CSR_READ_2(sc, RTK_ISR);
1487 if (status == 0xffff)
1488 goto done;
1489 if (status)
1490 CSR_WRITE_2(sc, RTK_ISR, status);
1491
1492 /*
1493 * XXX check behaviour on receiver stalls.
1494 */
1495
1496 if (status & RTK_ISR_SYSTEM_ERR) {
1497 re_reset(sc);
1498 re_init(sc);
1499 }
1500 }
1501 done:
1502 RTK_UNLOCK(sc);
1503 }
1504 #endif /* DEVICE_POLLING */
1505
1506 int
1507 re_intr(void *arg)
1508 {
1509 struct rtk_softc *sc = arg;
1510 struct ifnet *ifp;
1511 u_int16_t status;
1512 int handled = 0;
1513
1514 #if 0
1515 if (sc->suspended) {
1516 return 0;
1517 }
1518 #endif
1519 ifp = &sc->ethercom.ec_if;
1520
1521 if (!(ifp->if_flags & IFF_UP))
1522 return 0;
1523
1524 #ifdef DEVICE_POLLING
1525 if (ifp->if_flags & IFF_POLLING)
1526 goto done;
1527 if ((ifp->if_capenable & IFCAP_POLLING) &&
1528 ether_poll_register(re_poll, ifp)) { /* ok, disable interrupts */
1529 CSR_WRITE_2(sc, RTK_IMR, 0x0000);
1530 re_poll(ifp, 0, 1);
1531 goto done;
1532 }
1533 #endif /* DEVICE_POLLING */
1534
1535 for (;;) {
1536
1537 status = CSR_READ_2(sc, RTK_ISR);
1538 /* If the card has gone away the read returns 0xffff. */
1539 if (status == 0xffff)
1540 break;
1541 if (status) {
1542 handled = 1;
1543 CSR_WRITE_2(sc, RTK_ISR, status);
1544 }
1545
1546 if ((status & RTK_INTRS_CPLUS) == 0)
1547 break;
1548
1549 if (status & RTK_ISR_RX_OK)
1550 re_rxeof(sc);
1551
1552 if (status & RTK_ISR_RX_ERR)
1553 re_rxeof(sc);
1554
1555 if ((status & RTK_ISR_TIMEOUT_EXPIRED) ||
1556 (status & RTK_ISR_TX_ERR) ||
1557 (status & RTK_ISR_TX_DESC_UNAVAIL))
1558 re_txeof(sc);
1559
1560 if (status & RTK_ISR_SYSTEM_ERR) {
1561 re_reset(sc);
1562 re_init(ifp);
1563 }
1564
1565 if (status & RTK_ISR_LINKCHG) {
1566 callout_stop(&sc->rtk_tick_ch);
1567 re_tick(sc);
1568 }
1569 }
1570
1571 if (ifp->if_flags & IFF_UP) /* kludge for interrupt during re_init() */
1572 if (ifp->if_snd.ifq_head != NULL)
1573 (*ifp->if_start)(ifp);
1574
1575 #ifdef DEVICE_POLLING
1576 done:
1577 #endif
1578
1579 return handled;
1580 }
1581
1582 static int
1583 re_encap(struct rtk_softc *sc, struct mbuf *m_head, int *idx)
1584 {
1585 bus_dmamap_t map;
1586 int error, i, curidx;
1587 struct m_tag *mtag;
1588 struct rtk_desc *d;
1589 u_int32_t cmdstat, rtk_flags;
1590
1591 if (sc->rtk_ldata.rtk_tx_free <= 4)
1592 return(EFBIG);
1593
1594 /*
1595 * Set up checksum offload. Note: checksum offload bits must
1596 * appear in all descriptors of a multi-descriptor transmit
1597 * attempt. (This is according to testing done with an 8169
1598 * chip. I'm not sure if this is a requirement or a bug.)
1599 */
1600
1601 rtk_flags = 0;
1602
1603 if (m_head->m_pkthdr.csum_flags & M_CSUM_IPv4)
1604 rtk_flags |= RTK_TDESC_CMD_IPCSUM;
1605 if (m_head->m_pkthdr.csum_flags & M_CSUM_TCPv4)
1606 rtk_flags |= RTK_TDESC_CMD_TCPCSUM;
1607 if (m_head->m_pkthdr.csum_flags & M_CSUM_UDPv4)
1608 rtk_flags |= RTK_TDESC_CMD_UDPCSUM;
1609
1610 map = sc->rtk_ldata.rtk_tx_dmamap[*idx];
1611 error = bus_dmamap_load_mbuf(sc->sc_dmat, map,
1612 m_head, BUS_DMA_NOWAIT);
1613
1614 if (error) {
1615 printf("%s: can't map mbuf (error %d)\n",
1616 sc->sc_dev.dv_xname, error);
1617 return ENOBUFS;
1618 }
1619
1620 if (map->dm_nsegs > sc->rtk_ldata.rtk_tx_free - 4)
1621 return ENOBUFS;
1622 /*
1623 * Map the segment array into descriptors. Note that we set the
1624 * start-of-frame and end-of-frame markers for either TX or RX, but
1625 * they really only have meaning in the TX case. (In the RX case,
1626 * it's the chip that tells us where packets begin and end.)
1627 * We also keep track of the end of the ring and set the
1628 * end-of-ring bits as needed, and we set the ownership bits
1629 * in all except the very first descriptor. (The caller will
1630 * set this descriptor later when it start transmission or
1631 * reception.)
1632 */
1633 i = 0;
1634 curidx = *idx;
1635 while (1) {
1636 d = &sc->rtk_ldata.rtk_tx_list[curidx];
1637 if (le32toh(d->rtk_cmdstat) & RTK_RDESC_STAT_OWN)
1638 return ENOBUFS;
1639
1640 cmdstat = map->dm_segs[i].ds_len;
1641 d->rtk_bufaddr_lo =
1642 htole32(RTK_ADDR_LO(map->dm_segs[i].ds_addr));
1643 d->rtk_bufaddr_hi =
1644 htole32(RTK_ADDR_HI(map->dm_segs[i].ds_addr));
1645 if (i == 0)
1646 cmdstat |= RTK_TDESC_CMD_SOF;
1647 else
1648 cmdstat |= RTK_TDESC_CMD_OWN;
1649 if (curidx == (RTK_RX_DESC_CNT - 1))
1650 cmdstat |= RTK_TDESC_CMD_EOR;
1651 d->rtk_cmdstat = htole32(cmdstat | rtk_flags);
1652 i++;
1653 if (i == map->dm_nsegs)
1654 break;
1655 RTK_DESC_INC(curidx);
1656 }
1657
1658 d->rtk_cmdstat |= htole32(RTK_TDESC_CMD_EOF);
1659
1660 /*
1661 * Insure that the map for this transmission
1662 * is placed at the array index of the last descriptor
1663 * in this chain.
1664 */
1665 sc->rtk_ldata.rtk_tx_dmamap[*idx] =
1666 sc->rtk_ldata.rtk_tx_dmamap[curidx];
1667 sc->rtk_ldata.rtk_tx_dmamap[curidx] = map;
1668 sc->rtk_ldata.rtk_tx_mbuf[curidx] = m_head;
1669 sc->rtk_ldata.rtk_tx_free -= map->dm_nsegs;
1670
1671 /*
1672 * Set up hardware VLAN tagging. Note: vlan tag info must
1673 * appear in the first descriptor of a multi-descriptor
1674 * transmission attempt.
1675 */
1676
1677 if (sc->ethercom.ec_nvlans &&
1678 (mtag = m_tag_find(m_head, PACKET_TAG_VLAN, NULL)) != NULL)
1679 sc->rtk_ldata.rtk_tx_list[*idx].rtk_vlanctl =
1680 htole32(htons(*(u_int *)(mtag + 1)) |
1681 RTK_TDESC_VLANCTL_TAG);
1682
1683 /* Transfer ownership of packet to the chip. */
1684
1685 sc->rtk_ldata.rtk_tx_list[curidx].rtk_cmdstat |=
1686 htole32(RTK_TDESC_CMD_OWN);
1687 if (*idx != curidx)
1688 sc->rtk_ldata.rtk_tx_list[*idx].rtk_cmdstat |=
1689 htole32(RTK_TDESC_CMD_OWN);
1690
1691 RTK_DESC_INC(curidx);
1692 *idx = curidx;
1693
1694 return 0;
1695 }
1696
1697 /*
1698 * Main transmit routine for C+ and gigE NICs.
1699 */
1700
1701 static void
1702 re_start(struct ifnet *ifp)
1703 {
1704 struct rtk_softc *sc;
1705 struct mbuf *m_head = NULL;
1706 int idx;
1707
1708 sc = ifp->if_softc;
1709
1710 idx = sc->rtk_ldata.rtk_tx_prodidx;
1711 while (sc->rtk_ldata.rtk_tx_mbuf[idx] == NULL) {
1712 IF_DEQUEUE(&ifp->if_snd, m_head);
1713 if (m_head == NULL)
1714 break;
1715
1716 if (re_encap(sc, m_head, &idx)) {
1717 IF_PREPEND(&ifp->if_snd, m_head);
1718 ifp->if_flags |= IFF_OACTIVE;
1719 break;
1720 }
1721 #if NBPFILTER > 0
1722 /*
1723 * If there's a BPF listener, bounce a copy of this frame
1724 * to him.
1725 */
1726 if (ifp->if_bpf)
1727 bpf_mtap(ifp->if_bpf, m_head);
1728 #endif
1729 }
1730
1731 /* Flush the TX descriptors */
1732
1733 bus_dmamap_sync(sc->sc_dmat,
1734 sc->rtk_ldata.rtk_tx_list_map,
1735 0, sc->rtk_ldata.rtk_tx_list_map->dm_mapsize,
1736 BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1737
1738 sc->rtk_ldata.rtk_tx_prodidx = idx;
1739
1740 /*
1741 * RealTek put the TX poll request register in a different
1742 * location on the 8169 gigE chip. I don't know why.
1743 */
1744
1745 if (sc->rtk_type == RTK_8169)
1746 CSR_WRITE_2(sc, RTK_GTXSTART, RTK_TXSTART_START);
1747 else
1748 CSR_WRITE_2(sc, RTK_TXSTART, RTK_TXSTART_START);
1749
1750 /*
1751 * Use the countdown timer for interrupt moderation.
1752 * 'TX done' interrupts are disabled. Instead, we reset the
1753 * countdown timer, which will begin counting until it hits
1754 * the value in the TIMERINT register, and then trigger an
1755 * interrupt. Each time we write to the TIMERCNT register,
1756 * the timer count is reset to 0.
1757 */
1758 CSR_WRITE_4(sc, RTK_TIMERCNT, 1);
1759
1760 /*
1761 * Set a timeout in case the chip goes out to lunch.
1762 */
1763 ifp->if_timer = 5;
1764
1765 return;
1766 }
1767
1768 static int
1769 re_init(struct ifnet *ifp)
1770 {
1771 struct rtk_softc *sc = ifp->if_softc;
1772 u_int32_t rxcfg = 0;
1773 u_int32_t reg;
1774 int error;
1775
1776 if ((error = re_enable(sc)) != 0)
1777 goto out;
1778
1779 /*
1780 * Cancel pending I/O and free all RX/TX buffers.
1781 */
1782 re_stop(ifp, 0);
1783
1784 /*
1785 * Enable C+ RX and TX mode, as well as VLAN stripping and
1786 * RX checksum offload. We must configure the C+ register
1787 * before all others.
1788 */
1789 reg = 0;
1790
1791 /*
1792 * XXX: Realtek docs say bits 0 and 1 are reserved, for 8169S/8110S.
1793 * FreeBSD drivers set these bits anyway (for 8139C+?).
1794 * So far, it works.
1795 */
1796
1797 /*
1798 * XXX: For 8169 and 8196S revs below 2, set bit 14.
1799 * For 8169S/8110S rev 2 and above, do not set bit 14.
1800 */
1801 if (sc->rtk_type == RTK_8169 && sc->sc_rev == 1)
1802 reg |= (0x1 << 14) | RTK_CPLUSCMD_PCI_MRW;;
1803
1804 if (1) {/* not for 8169S ? */
1805 reg |= RTK_CPLUSCMD_VLANSTRIP|
1806 (ifp->if_capenable &
1807 (IFCAP_CSUM_IPv4 |IFCAP_CSUM_TCPv4 | IFCAP_CSUM_UDPv4) ?
1808 RTK_CPLUSCMD_RXCSUM_ENB : 0);
1809 }
1810
1811 CSR_WRITE_2(sc, RTK_CPLUS_CMD,
1812 reg | RTK_CPLUSCMD_RXENB| RTK_CPLUSCMD_TXENB);
1813
1814 /* XXX: from Realtek-supplied Linux driver. Wholly undocumented. */
1815 if (sc->rtk_type == RTK_8169)
1816 CSR_WRITE_2(sc, RTK_CPLUS_CMD+0x2, 0x0000);
1817
1818 DELAY(10000);
1819
1820 /*
1821 * Init our MAC address. Even though the chipset
1822 * documentation doesn't mention it, we need to enter "Config
1823 * register write enable" mode to modify the ID registers.
1824 */
1825 CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_WRITECFG);
1826 memcpy(®, LLADDR(ifp->if_sadl), 4);
1827 CSR_WRITE_STREAM_4(sc, RTK_IDR0, reg);
1828 reg = 0;
1829 memcpy(®, LLADDR(ifp->if_sadl) + 4, 4);
1830 CSR_WRITE_STREAM_4(sc, RTK_IDR4, reg);
1831 CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF);
1832
1833 /*
1834 * For C+ mode, initialize the RX descriptors and mbufs.
1835 */
1836 re_rx_list_init(sc);
1837 re_tx_list_init(sc);
1838
1839 /*
1840 * Enable transmit and receive.
1841 */
1842 CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB|RTK_CMD_RX_ENB);
1843
1844 /*
1845 * Set the initial TX and RX configuration.
1846 */
1847 if (sc->rtk_testmode) {
1848 if (sc->rtk_type == RTK_8169)
1849 CSR_WRITE_4(sc, RTK_TXCFG,
1850 RTK_TXCFG_CONFIG|RTK_LOOPTEST_ON);
1851 else
1852 CSR_WRITE_4(sc, RTK_TXCFG,
1853 RTK_TXCFG_CONFIG|RTK_LOOPTEST_ON_CPLUS);
1854 } else
1855 CSR_WRITE_4(sc, RTK_TXCFG, RTK_TXCFG_CONFIG);
1856 CSR_WRITE_4(sc, RTK_RXCFG, RTK_RXCFG_CONFIG);
1857
1858 /* Set the individual bit to receive frames for this host only. */
1859 rxcfg = CSR_READ_4(sc, RTK_RXCFG);
1860 rxcfg |= RTK_RXCFG_RX_INDIV;
1861
1862 /* If we want promiscuous mode, set the allframes bit. */
1863 if (ifp->if_flags & IFF_PROMISC) {
1864 rxcfg |= RTK_RXCFG_RX_ALLPHYS;
1865 CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1866 } else {
1867 rxcfg &= ~RTK_RXCFG_RX_ALLPHYS;
1868 CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1869 }
1870
1871 /*
1872 * Set capture broadcast bit to capture broadcast frames.
1873 */
1874 if (ifp->if_flags & IFF_BROADCAST) {
1875 rxcfg |= RTK_RXCFG_RX_BROAD;
1876 CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1877 } else {
1878 rxcfg &= ~RTK_RXCFG_RX_BROAD;
1879 CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
1880 }
1881
1882 /*
1883 * Program the multicast filter, if necessary.
1884 */
1885 rtk_setmulti(sc);
1886
1887 #ifdef DEVICE_POLLING
1888 /*
1889 * Disable interrupts if we are polling.
1890 */
1891 if (ifp->if_flags & IFF_POLLING)
1892 CSR_WRITE_2(sc, RTK_IMR, 0);
1893 else /* otherwise ... */
1894 #endif /* DEVICE_POLLING */
1895 /*
1896 * Enable interrupts.
1897 */
1898 if (sc->rtk_testmode)
1899 CSR_WRITE_2(sc, RTK_IMR, 0);
1900 else
1901 CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS_CPLUS);
1902
1903 /* Start RX/TX process. */
1904 CSR_WRITE_4(sc, RTK_MISSEDPKT, 0);
1905 #ifdef notdef
1906 /* Enable receiver and transmitter. */
1907 CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB|RTK_CMD_RX_ENB);
1908 #endif
1909 /*
1910 * Load the addresses of the RX and TX lists into the chip.
1911 */
1912
1913 CSR_WRITE_4(sc, RTK_RXLIST_ADDR_HI,
1914 RTK_ADDR_HI(sc->rtk_ldata.rtk_rx_listseg.ds_addr));
1915 CSR_WRITE_4(sc, RTK_RXLIST_ADDR_LO,
1916 RTK_ADDR_LO(sc->rtk_ldata.rtk_rx_listseg.ds_addr));
1917
1918 CSR_WRITE_4(sc, RTK_TXLIST_ADDR_HI,
1919 RTK_ADDR_HI(sc->rtk_ldata.rtk_tx_listseg.ds_addr));
1920 CSR_WRITE_4(sc, RTK_TXLIST_ADDR_LO,
1921 RTK_ADDR_LO(sc->rtk_ldata.rtk_tx_listseg.ds_addr));
1922
1923 CSR_WRITE_1(sc, RTK_EARLY_TX_THRESH, 16);
1924
1925 /*
1926 * Initialize the timer interrupt register so that
1927 * a timer interrupt will be generated once the timer
1928 * reaches a certain number of ticks. The timer is
1929 * reloaded on each transmit. This gives us TX interrupt
1930 * moderation, which dramatically improves TX frame rate.
1931 */
1932
1933 if (sc->rtk_type == RTK_8169)
1934 CSR_WRITE_4(sc, RTK_TIMERINT_8169, 0x800);
1935 else
1936 CSR_WRITE_4(sc, RTK_TIMERINT, 0x400);
1937
1938 /*
1939 * For 8169 gigE NICs, set the max allowed RX packet
1940 * size so we can receive jumbo frames.
1941 */
1942 if (sc->rtk_type == RTK_8169)
1943 CSR_WRITE_2(sc, RTK_MAXRXPKTLEN, 16383);
1944
1945 if (sc->rtk_testmode)
1946 return 0;
1947
1948 mii_mediachg(&sc->mii);
1949
1950 CSR_WRITE_1(sc, RTK_CFG1, RTK_CFG1_DRVLOAD|RTK_CFG1_FULLDUPLEX);
1951
1952 ifp->if_flags |= IFF_RUNNING;
1953 ifp->if_flags &= ~IFF_OACTIVE;
1954
1955 callout_reset(&sc->rtk_tick_ch, hz, re_tick, sc);
1956
1957 out:
1958 if (error) {
1959 ifp->if_flags &= ~(IFF_RUNNING|IFF_OACTIVE);
1960 ifp->if_timer = 0;
1961 printf("%s: interface not running\n", sc->sc_dev.dv_xname);
1962 }
1963
1964 return error;
1965
1966 }
1967
1968 /*
1969 * Set media options.
1970 */
1971 static int
1972 re_ifmedia_upd(struct ifnet *ifp)
1973 {
1974 struct rtk_softc *sc;
1975
1976 sc = ifp->if_softc;
1977
1978 return (mii_mediachg(&sc->mii));
1979 }
1980
1981 /*
1982 * Report current media status.
1983 */
1984 static void
1985 re_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1986 {
1987 struct rtk_softc *sc;
1988
1989 sc = ifp->if_softc;
1990
1991 mii_pollstat(&sc->mii);
1992 ifmr->ifm_active = sc->mii.mii_media_active;
1993 ifmr->ifm_status = sc->mii.mii_media_status;
1994
1995 return;
1996 }
1997
1998 static int
1999 re_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
2000 {
2001 struct rtk_softc *sc = ifp->if_softc;
2002 struct ifreq *ifr = (struct ifreq *) data;
2003 int s, error = 0;
2004
2005 s = splnet();
2006
2007 switch(command) {
2008 case SIOCSIFMTU:
2009 if (ifr->ifr_mtu > RTK_JUMBO_MTU)
2010 error = EINVAL;
2011 ifp->if_mtu = ifr->ifr_mtu;
2012 break;
2013 case SIOCGIFMEDIA:
2014 case SIOCSIFMEDIA:
2015 error = ifmedia_ioctl(ifp, ifr, &sc->mii.mii_media, command);
2016 break;
2017 default:
2018 error = ether_ioctl(ifp, command, data);
2019 if (error == ENETRESET) {
2020 if (ifp->if_flags & IFF_RUNNING)
2021 rtk_setmulti(sc);
2022 error = 0;
2023 }
2024 break;
2025 }
2026
2027 splx(s);
2028
2029 return(error);
2030 }
2031
2032 static void
2033 re_watchdog(struct ifnet *ifp)
2034 {
2035 struct rtk_softc *sc;
2036 int s;
2037
2038 sc = ifp->if_softc;
2039 s = splnet();
2040 printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
2041 ifp->if_oerrors++;
2042
2043 re_txeof(sc);
2044 re_rxeof(sc);
2045
2046 re_init(ifp);
2047
2048 splx(s);
2049 }
2050
2051 /*
2052 * Stop the adapter and free any mbufs allocated to the
2053 * RX and TX lists.
2054 */
2055 static void
2056 re_stop(struct ifnet *ifp, int disable)
2057 {
2058 register int i;
2059 struct rtk_softc *sc = ifp->if_softc;
2060
2061 callout_stop(&sc->rtk_tick_ch);
2062
2063 #ifdef DEVICE_POLLING
2064 ether_poll_deregister(ifp);
2065 #endif /* DEVICE_POLLING */
2066
2067 mii_down(&sc->mii);
2068
2069 CSR_WRITE_1(sc, RTK_COMMAND, 0x00);
2070 CSR_WRITE_2(sc, RTK_IMR, 0x0000);
2071
2072 if (sc->rtk_head != NULL) {
2073 m_freem(sc->rtk_head);
2074 sc->rtk_head = sc->rtk_tail = NULL;
2075 }
2076
2077 /* Free the TX list buffers. */
2078 for (i = 0; i < RTK_TX_DESC_CNT; i++) {
2079 if (sc->rtk_ldata.rtk_tx_mbuf[i] != NULL) {
2080 bus_dmamap_unload(sc->sc_dmat,
2081 sc->rtk_ldata.rtk_tx_dmamap[i]);
2082 m_freem(sc->rtk_ldata.rtk_tx_mbuf[i]);
2083 sc->rtk_ldata.rtk_tx_mbuf[i] = NULL;
2084 }
2085 }
2086
2087 /* Free the RX list buffers. */
2088 for (i = 0; i < RTK_RX_DESC_CNT; i++) {
2089 if (sc->rtk_ldata.rtk_rx_mbuf[i] != NULL) {
2090 bus_dmamap_unload(sc->sc_dmat,
2091 sc->rtk_ldata.rtk_rx_dmamap[i]);
2092 m_freem(sc->rtk_ldata.rtk_rx_mbuf[i]);
2093 sc->rtk_ldata.rtk_rx_mbuf[i] = NULL;
2094 }
2095 }
2096
2097 if (disable)
2098 re_disable(sc);
2099
2100 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2101 ifp->if_timer = 0;
2102
2103 return;
2104 }
2105
2106
2107
2108 #if 0
2109 /*
2110 * Device suspend routine. Stop the interface and save some PCI
2111 * settings in case the BIOS doesn't restore them properly on
2112 * resume.
2113 */
2114 static int
2115 re_suspend(device_t dev)
2116 {
2117 register int i;
2118 struct rtk_softc *sc;
2119
2120 sc = device_get_softc(dev);
2121
2122 re_stop(sc);
2123
2124 for (i = 0; i < 5; i++)
2125 sc->saved_maps[i] = pci_read_config(dev, PCIR_MAPS + i * 4, 4);
2126 sc->saved_biosaddr = pci_read_config(dev, PCIR_BIOS, 4);
2127 sc->saved_intline = pci_read_config(dev, PCIR_INTLINE, 1);
2128 sc->saved_cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
2129 sc->saved_lattimer = pci_read_config(dev, PCIR_LATTIMER, 1);
2130
2131 sc->suspended = 1;
2132
2133 return (0);
2134 }
2135
2136 /*
2137 * Device resume routine. Restore some PCI settings in case the BIOS
2138 * doesn't, re-enable busmastering, and restart the interface if
2139 * appropriate.
2140 */
2141 static int
2142 re_resume(device_t dev)
2143 {
2144 register int i;
2145 struct rtk_softc *sc;
2146 struct ifnet *ifp;
2147
2148 sc = device_get_softc(dev);
2149 ifp = &sc->ethercom.ec_if;
2150
2151 /* better way to do this? */
2152 for (i = 0; i < 5; i++)
2153 pci_write_config(dev, PCIR_MAPS + i * 4, sc->saved_maps[i], 4);
2154 pci_write_config(dev, PCIR_BIOS, sc->saved_biosaddr, 4);
2155 pci_write_config(dev, PCIR_INTLINE, sc->saved_intline, 1);
2156 pci_write_config(dev, PCIR_CACHELNSZ, sc->saved_cachelnsz, 1);
2157 pci_write_config(dev, PCIR_LATTIMER, sc->saved_lattimer, 1);
2158
2159 /* reenable busmastering */
2160 pci_enable_busmaster(dev);
2161 pci_enable_io(dev, RTK_RES);
2162
2163 /* reinitialize interface if necessary */
2164 if (ifp->if_flags & IFF_UP)
2165 re_init(sc);
2166
2167 sc->suspended = 0;
2168
2169 return (0);
2170 }
2171
2172 /*
2173 * Stop all chip I/O so that the kernel's probe routines don't
2174 * get confused by errant DMAs when rebooting.
2175 */
2176 static void
2177 re_shutdown(device_t dev)
2178 {
2179 struct rtk_softc *sc;
2180
2181 sc = device_get_softc(dev);
2182
2183 re_stop(sc);
2184
2185 return;
2186 }
2187 #endif /* 0 */
2188