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rtl81x9.c revision 1.37
      1  1.37   kanaoka /*	$NetBSD: rtl81x9.c,v 1.37 2001/08/07 02:59:53 kanaoka Exp $	*/
      2   1.1      haya 
      3   1.1      haya /*
      4   1.1      haya  * Copyright (c) 1997, 1998
      5   1.1      haya  *	Bill Paul <wpaul (at) ctr.columbia.edu>.  All rights reserved.
      6   1.1      haya  *
      7   1.1      haya  * Redistribution and use in source and binary forms, with or without
      8   1.1      haya  * modification, are permitted provided that the following conditions
      9   1.1      haya  * are met:
     10   1.1      haya  * 1. Redistributions of source code must retain the above copyright
     11   1.1      haya  *    notice, this list of conditions and the following disclaimer.
     12   1.1      haya  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1      haya  *    notice, this list of conditions and the following disclaimer in the
     14   1.1      haya  *    documentation and/or other materials provided with the distribution.
     15   1.1      haya  * 3. All advertising materials mentioning features or use of this software
     16   1.1      haya  *    must display the following acknowledgement:
     17   1.1      haya  *	This product includes software developed by Bill Paul.
     18   1.1      haya  * 4. Neither the name of the author nor the names of any co-contributors
     19   1.1      haya  *    may be used to endorse or promote products derived from this software
     20   1.1      haya  *    without specific prior written permission.
     21   1.1      haya  *
     22   1.1      haya  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
     23   1.1      haya  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24   1.1      haya  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25   1.1      haya  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
     26   1.1      haya  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     27   1.1      haya  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     28   1.1      haya  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     29   1.1      haya  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     30   1.1      haya  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     31   1.1      haya  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     32   1.1      haya  * THE POSSIBILITY OF SUCH DAMAGE.
     33   1.1      haya  *
     34   1.1      haya  *	FreeBSD Id: if_rl.c,v 1.17 1999/06/19 20:17:37 wpaul Exp
     35   1.1      haya  */
     36   1.1      haya 
     37   1.1      haya /*
     38   1.1      haya  * RealTek 8129/8139 PCI NIC driver
     39   1.1      haya  *
     40   1.1      haya  * Supports several extremely cheap PCI 10/100 adapters based on
     41   1.1      haya  * the RealTek chipset. Datasheets can be obtained from
     42   1.1      haya  * www.realtek.com.tw.
     43   1.1      haya  *
     44   1.1      haya  * Written by Bill Paul <wpaul (at) ctr.columbia.edu>
     45   1.1      haya  * Electrical Engineering Department
     46   1.1      haya  * Columbia University, New York City
     47   1.1      haya  */
     48   1.1      haya 
     49   1.1      haya /*
     50   1.1      haya  * The RealTek 8139 PCI NIC redefines the meaning of 'low end.' This is
     51   1.1      haya  * probably the worst PCI ethernet controller ever made, with the possible
     52   1.1      haya  * exception of the FEAST chip made by SMC. The 8139 supports bus-master
     53   1.1      haya  * DMA, but it has a terrible interface that nullifies any performance
     54   1.1      haya  * gains that bus-master DMA usually offers.
     55   1.1      haya  *
     56   1.1      haya  * For transmission, the chip offers a series of four TX descriptor
     57   1.1      haya  * registers. Each transmit frame must be in a contiguous buffer, aligned
     58   1.1      haya  * on a longword (32-bit) boundary. This means we almost always have to
     59   1.1      haya  * do mbuf copies in order to transmit a frame, except in the unlikely
     60   1.1      haya  * case where a) the packet fits into a single mbuf, and b) the packet
     61   1.1      haya  * is 32-bit aligned within the mbuf's data area. The presence of only
     62   1.1      haya  * four descriptor registers means that we can never have more than four
     63   1.1      haya  * packets queued for transmission at any one time.
     64   1.1      haya  *
     65   1.1      haya  * Reception is not much better. The driver has to allocate a single large
     66   1.1      haya  * buffer area (up to 64K in size) into which the chip will DMA received
     67   1.1      haya  * frames. Because we don't know where within this region received packets
     68   1.1      haya  * will begin or end, we have no choice but to copy data from the buffer
     69   1.1      haya  * area into mbufs in order to pass the packets up to the higher protocol
     70   1.1      haya  * levels.
     71   1.1      haya  *
     72   1.1      haya  * It's impossible given this rotten design to really achieve decent
     73   1.1      haya  * performance at 100Mbps, unless you happen to have a 400Mhz PII or
     74   1.1      haya  * some equally overmuscled CPU to drive it.
     75   1.1      haya  *
     76   1.1      haya  * On the bright side, the 8139 does have a built-in PHY, although
     77   1.1      haya  * rather than using an MDIO serial interface like most other NICs, the
     78   1.1      haya  * PHY registers are directly accessible through the 8139's register
     79   1.1      haya  * space. The 8139 supports autonegotiation, as well as a 64-bit multicast
     80   1.1      haya  * filter.
     81   1.1      haya  *
     82   1.1      haya  * The 8129 chip is an older version of the 8139 that uses an external PHY
     83   1.1      haya  * chip. The 8129 has a serial MDIO interface for accessing the MII where
     84   1.1      haya  * the 8139 lets you directly access the on-board PHY registers. We need
     85   1.1      haya  * to select which interface to use depending on the chip type.
     86   1.1      haya  */
     87   1.1      haya 
     88   1.1      haya #include "bpfilter.h"
     89   1.1      haya #include "rnd.h"
     90   1.1      haya 
     91   1.1      haya #include <sys/param.h>
     92   1.1      haya #include <sys/systm.h>
     93   1.1      haya #include <sys/callout.h>
     94   1.1      haya #include <sys/device.h>
     95   1.1      haya #include <sys/sockio.h>
     96   1.1      haya #include <sys/mbuf.h>
     97   1.1      haya #include <sys/malloc.h>
     98   1.1      haya #include <sys/kernel.h>
     99   1.1      haya #include <sys/socket.h>
    100   1.1      haya 
    101  1.17   thorpej #include <uvm/uvm_extern.h>
    102  1.17   thorpej 
    103   1.1      haya #include <net/if.h>
    104   1.1      haya #include <net/if_arp.h>
    105   1.1      haya #include <net/if_ether.h>
    106   1.1      haya #include <net/if_dl.h>
    107   1.1      haya #include <net/if_media.h>
    108   1.1      haya 
    109   1.1      haya #if NBPFILTER > 0
    110   1.1      haya #include <net/bpf.h>
    111   1.1      haya #endif
    112   1.1      haya #if NRND > 0
    113   1.1      haya #include <sys/rnd.h>
    114   1.1      haya #endif
    115   1.1      haya 
    116   1.1      haya #include <machine/bus.h>
    117   1.3   tsutsui #include <machine/endian.h>
    118   1.1      haya 
    119   1.1      haya #include <dev/mii/mii.h>
    120   1.1      haya #include <dev/mii/miivar.h>
    121   1.1      haya 
    122   1.1      haya #include <dev/ic/rtl81x9reg.h>
    123   1.4   tsutsui #include <dev/ic/rtl81x9var.h>
    124   1.1      haya 
    125  1.23   tsutsui #if defined(DEBUG)
    126   1.1      haya #define STATIC
    127   1.1      haya #else
    128   1.1      haya #define STATIC static
    129   1.1      haya #endif
    130   1.1      haya 
    131   1.8   thorpej STATIC void rtk_reset		__P((struct rtk_softc *));
    132   1.8   thorpej STATIC void rtk_rxeof		__P((struct rtk_softc *));
    133   1.8   thorpej STATIC void rtk_txeof		__P((struct rtk_softc *));
    134   1.8   thorpej STATIC void rtk_start		__P((struct ifnet *));
    135   1.8   thorpej STATIC int rtk_ioctl		__P((struct ifnet *, u_long, caddr_t));
    136  1.15   thorpej STATIC int rtk_init		__P((struct ifnet *));
    137  1.15   thorpej STATIC void rtk_stop		__P((struct ifnet *, int));
    138  1.15   thorpej 
    139  1.10   tsutsui STATIC void rtk_watchdog	__P((struct ifnet *));
    140  1.10   tsutsui STATIC void rtk_shutdown	__P((void *));
    141   1.8   thorpej STATIC int rtk_ifmedia_upd	__P((struct ifnet *));
    142   1.8   thorpej STATIC void rtk_ifmedia_sts	__P((struct ifnet *, struct ifmediareq *));
    143   1.8   thorpej 
    144   1.8   thorpej STATIC u_int16_t rtk_read_eeprom __P((struct rtk_softc *, int, int));
    145   1.8   thorpej STATIC void rtk_eeprom_putbyte	__P((struct rtk_softc *, int, int));
    146  1.10   tsutsui STATIC void rtk_mii_sync	__P((struct rtk_softc *));
    147  1.10   tsutsui STATIC void rtk_mii_send	__P((struct rtk_softc *, u_int32_t, int));
    148   1.8   thorpej STATIC int rtk_mii_readreg	__P((struct rtk_softc *, struct rtk_mii_frame *));
    149   1.8   thorpej STATIC int rtk_mii_writereg	__P((struct rtk_softc *, struct rtk_mii_frame *));
    150   1.8   thorpej 
    151   1.8   thorpej STATIC int rtk_phy_readreg	__P((struct device *, int, int));
    152   1.8   thorpej STATIC void rtk_phy_writereg	__P((struct device *, int, int, int));
    153   1.8   thorpej STATIC void rtk_phy_statchg	__P((struct device *));
    154  1.10   tsutsui STATIC void rtk_tick		__P((void *));
    155   1.1      haya 
    156  1.10   tsutsui STATIC int rtk_enable		__P((struct rtk_softc *));
    157  1.10   tsutsui STATIC void rtk_disable		__P((struct rtk_softc *));
    158  1.10   tsutsui STATIC void rtk_power		__P((int, void *));
    159  1.10   tsutsui 
    160  1.10   tsutsui STATIC void rtk_setmulti	__P((struct rtk_softc *));
    161   1.8   thorpej STATIC int rtk_list_tx_init	__P((struct rtk_softc *));
    162   1.1      haya 
    163   1.1      haya #define EE_SET(x)					\
    164  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_EECMD,			\
    165  1.10   tsutsui 		CSR_READ_1(sc, RTK_EECMD) | (x))
    166   1.1      haya 
    167   1.1      haya #define EE_CLR(x)					\
    168  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_EECMD,			\
    169  1.10   tsutsui 		CSR_READ_1(sc, RTK_EECMD) & ~(x))
    170   1.1      haya 
    171   1.1      haya /*
    172   1.1      haya  * Send a read command and address to the EEPROM, check for ACK.
    173   1.1      haya  */
    174   1.8   thorpej STATIC void rtk_eeprom_putbyte(sc, addr, addr_len)
    175  1.10   tsutsui 	struct rtk_softc	*sc;
    176   1.5   tsutsui 	int			addr, addr_len;
    177   1.1      haya {
    178   1.2   tsutsui 	int			d, i;
    179   1.1      haya 
    180  1.10   tsutsui 	d = (RTK_EECMD_READ << addr_len) | addr;
    181   1.1      haya 
    182   1.1      haya 	/*
    183   1.1      haya 	 * Feed in each bit and stobe the clock.
    184   1.1      haya 	 */
    185  1.23   tsutsui 	for (i = RTK_EECMD_LEN + addr_len; i > 0; i--) {
    186  1.23   tsutsui 		if (d & (1 << (i - 1))) {
    187  1.10   tsutsui 			EE_SET(RTK_EE_DATAIN);
    188   1.1      haya 		} else {
    189  1.10   tsutsui 			EE_CLR(RTK_EE_DATAIN);
    190   1.1      haya 		}
    191  1.23   tsutsui 		DELAY(4);
    192  1.10   tsutsui 		EE_SET(RTK_EE_CLK);
    193  1.23   tsutsui 		DELAY(4);
    194  1.10   tsutsui 		EE_CLR(RTK_EE_CLK);
    195  1.23   tsutsui 		DELAY(4);
    196   1.1      haya 	}
    197   1.1      haya }
    198   1.1      haya 
    199   1.1      haya /*
    200   1.1      haya  * Read a word of data stored in the EEPROM at address 'addr.'
    201   1.1      haya  */
    202   1.8   thorpej u_int16_t rtk_read_eeprom(sc, addr, addr_len)
    203  1.10   tsutsui 	struct rtk_softc	*sc;
    204   1.5   tsutsui 	int			addr, addr_len;
    205   1.1      haya {
    206   1.5   tsutsui 	u_int16_t		word = 0;
    207   1.2   tsutsui 	int			i;
    208   1.1      haya 
    209   1.1      haya 	/* Enter EEPROM access mode. */
    210  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_PROGRAM|RTK_EE_SEL);
    211   1.1      haya 
    212   1.1      haya 	/*
    213   1.1      haya 	 * Send address of word we want to read.
    214   1.1      haya 	 */
    215   1.8   thorpej 	rtk_eeprom_putbyte(sc, addr, addr_len);
    216   1.1      haya 
    217  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_PROGRAM|RTK_EE_SEL);
    218   1.1      haya 
    219   1.1      haya 	/*
    220   1.1      haya 	 * Start reading bits from EEPROM.
    221   1.1      haya 	 */
    222  1.23   tsutsui 	for (i = 16; i > 0; i--) {
    223  1.10   tsutsui 		EE_SET(RTK_EE_CLK);
    224  1.23   tsutsui 		DELAY(4);
    225  1.10   tsutsui 		if (CSR_READ_1(sc, RTK_EECMD) & RTK_EE_DATAOUT)
    226  1.23   tsutsui 			word |= 1 << (i - 1);
    227  1.10   tsutsui 		EE_CLR(RTK_EE_CLK);
    228  1.23   tsutsui 		DELAY(4);
    229   1.1      haya 	}
    230   1.1      haya 
    231   1.1      haya 	/* Turn off EEPROM access mode. */
    232  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_EECMD, RTK_EEMODE_OFF);
    233   1.1      haya 
    234   1.5   tsutsui 	return (word);
    235   1.1      haya }
    236   1.1      haya 
    237   1.1      haya /*
    238   1.1      haya  * MII access routines are provided for the 8129, which
    239   1.1      haya  * doesn't have a built-in PHY. For the 8139, we fake things
    240   1.8   thorpej  * up by diverting rtk_phy_readreg()/rtk_phy_writereg() to the
    241   1.1      haya  * direct access PHY registers.
    242   1.1      haya  */
    243   1.1      haya #define MII_SET(x)					\
    244  1.23   tsutsui 	CSR_WRITE_1(sc, RTK_MII,			\
    245  1.10   tsutsui 		CSR_READ_1(sc, RTK_MII) | (x))
    246   1.1      haya 
    247   1.1      haya #define MII_CLR(x)					\
    248  1.23   tsutsui 	CSR_WRITE_1(sc, RTK_MII,			\
    249  1.10   tsutsui 		CSR_READ_1(sc, RTK_MII) & ~(x))
    250   1.1      haya 
    251   1.1      haya /*
    252   1.1      haya  * Sync the PHYs by setting data bit and strobing the clock 32 times.
    253   1.1      haya  */
    254   1.8   thorpej STATIC void rtk_mii_sync(sc)
    255  1.10   tsutsui 	struct rtk_softc	*sc;
    256   1.1      haya {
    257   1.2   tsutsui 	int			i;
    258   1.1      haya 
    259  1.10   tsutsui 	MII_SET(RTK_MII_DIR|RTK_MII_DATAOUT);
    260   1.1      haya 
    261   1.1      haya 	for (i = 0; i < 32; i++) {
    262  1.10   tsutsui 		MII_SET(RTK_MII_CLK);
    263   1.1      haya 		DELAY(1);
    264  1.10   tsutsui 		MII_CLR(RTK_MII_CLK);
    265   1.1      haya 		DELAY(1);
    266   1.1      haya 	}
    267   1.1      haya }
    268   1.1      haya 
    269   1.1      haya /*
    270   1.1      haya  * Clock a series of bits through the MII.
    271   1.1      haya  */
    272   1.8   thorpej STATIC void rtk_mii_send(sc, bits, cnt)
    273  1.10   tsutsui 	struct rtk_softc	*sc;
    274   1.1      haya 	u_int32_t		bits;
    275   1.1      haya 	int			cnt;
    276   1.1      haya {
    277   1.1      haya 	int			i;
    278   1.1      haya 
    279  1.10   tsutsui 	MII_CLR(RTK_MII_CLK);
    280   1.1      haya 
    281  1.23   tsutsui 	for (i = cnt; i > 0; i--) {
    282  1.23   tsutsui                 if (bits & (1 << (i - 1))) {
    283  1.10   tsutsui 			MII_SET(RTK_MII_DATAOUT);
    284   1.1      haya                 } else {
    285  1.10   tsutsui 			MII_CLR(RTK_MII_DATAOUT);
    286   1.1      haya                 }
    287   1.1      haya 		DELAY(1);
    288  1.10   tsutsui 		MII_CLR(RTK_MII_CLK);
    289   1.1      haya 		DELAY(1);
    290  1.10   tsutsui 		MII_SET(RTK_MII_CLK);
    291   1.1      haya 	}
    292   1.1      haya }
    293   1.1      haya 
    294   1.1      haya /*
    295   1.1      haya  * Read an PHY register through the MII.
    296   1.1      haya  */
    297   1.8   thorpej STATIC int rtk_mii_readreg(sc, frame)
    298  1.10   tsutsui 	struct rtk_softc	*sc;
    299   1.8   thorpej 	struct rtk_mii_frame	*frame;
    300   1.1      haya {
    301   1.1      haya 	int			i, ack, s;
    302   1.1      haya 
    303   1.9   thorpej 	s = splnet();
    304   1.1      haya 
    305   1.1      haya 	/*
    306   1.1      haya 	 * Set up frame for RX.
    307   1.1      haya 	 */
    308  1.10   tsutsui 	frame->mii_stdelim = RTK_MII_STARTDELIM;
    309  1.10   tsutsui 	frame->mii_opcode = RTK_MII_READOP;
    310   1.1      haya 	frame->mii_turnaround = 0;
    311   1.1      haya 	frame->mii_data = 0;
    312  1.23   tsutsui 
    313  1.10   tsutsui 	CSR_WRITE_2(sc, RTK_MII, 0);
    314   1.1      haya 
    315   1.1      haya 	/*
    316   1.1      haya  	 * Turn on data xmit.
    317   1.1      haya 	 */
    318  1.10   tsutsui 	MII_SET(RTK_MII_DIR);
    319   1.1      haya 
    320   1.8   thorpej 	rtk_mii_sync(sc);
    321   1.1      haya 
    322   1.1      haya 	/*
    323   1.1      haya 	 * Send command/address info.
    324   1.1      haya 	 */
    325   1.8   thorpej 	rtk_mii_send(sc, frame->mii_stdelim, 2);
    326   1.8   thorpej 	rtk_mii_send(sc, frame->mii_opcode, 2);
    327   1.8   thorpej 	rtk_mii_send(sc, frame->mii_phyaddr, 5);
    328   1.8   thorpej 	rtk_mii_send(sc, frame->mii_regaddr, 5);
    329   1.1      haya 
    330   1.1      haya 	/* Idle bit */
    331  1.10   tsutsui 	MII_CLR((RTK_MII_CLK|RTK_MII_DATAOUT));
    332   1.1      haya 	DELAY(1);
    333  1.10   tsutsui 	MII_SET(RTK_MII_CLK);
    334   1.1      haya 	DELAY(1);
    335   1.1      haya 
    336   1.1      haya 	/* Turn off xmit. */
    337  1.10   tsutsui 	MII_CLR(RTK_MII_DIR);
    338   1.1      haya 
    339   1.1      haya 	/* Check for ack */
    340  1.10   tsutsui 	MII_CLR(RTK_MII_CLK);
    341   1.1      haya 	DELAY(1);
    342  1.10   tsutsui 	MII_SET(RTK_MII_CLK);
    343   1.1      haya 	DELAY(1);
    344  1.10   tsutsui 	ack = CSR_READ_2(sc, RTK_MII) & RTK_MII_DATAIN;
    345   1.1      haya 
    346   1.1      haya 	/*
    347   1.1      haya 	 * Now try reading data bits. If the ack failed, we still
    348   1.1      haya 	 * need to clock through 16 cycles to keep the PHY(s) in sync.
    349   1.1      haya 	 */
    350   1.1      haya 	if (ack) {
    351  1.23   tsutsui 		for (i = 0; i < 16; i++) {
    352  1.10   tsutsui 			MII_CLR(RTK_MII_CLK);
    353   1.1      haya 			DELAY(1);
    354  1.10   tsutsui 			MII_SET(RTK_MII_CLK);
    355   1.1      haya 			DELAY(1);
    356   1.1      haya 		}
    357   1.1      haya 		goto fail;
    358   1.1      haya 	}
    359   1.1      haya 
    360  1.23   tsutsui 	for (i = 16; i > 0; i--) {
    361  1.10   tsutsui 		MII_CLR(RTK_MII_CLK);
    362   1.1      haya 		DELAY(1);
    363   1.1      haya 		if (!ack) {
    364  1.10   tsutsui 			if (CSR_READ_2(sc, RTK_MII) & RTK_MII_DATAIN)
    365  1.23   tsutsui 				frame->mii_data |= 1 << (i - 1);
    366   1.1      haya 			DELAY(1);
    367   1.1      haya 		}
    368  1.10   tsutsui 		MII_SET(RTK_MII_CLK);
    369   1.1      haya 		DELAY(1);
    370   1.1      haya 	}
    371   1.1      haya 
    372  1.23   tsutsui  fail:
    373  1.10   tsutsui 	MII_CLR(RTK_MII_CLK);
    374   1.1      haya 	DELAY(1);
    375  1.10   tsutsui 	MII_SET(RTK_MII_CLK);
    376   1.1      haya 	DELAY(1);
    377   1.1      haya 
    378   1.1      haya 	splx(s);
    379   1.1      haya 
    380   1.1      haya 	if (ack)
    381  1.23   tsutsui 		return (1);
    382  1.23   tsutsui 	return (0);
    383   1.1      haya }
    384   1.1      haya 
    385   1.1      haya /*
    386   1.1      haya  * Write to a PHY register through the MII.
    387   1.1      haya  */
    388   1.8   thorpej STATIC int rtk_mii_writereg(sc, frame)
    389  1.10   tsutsui 	struct rtk_softc	*sc;
    390   1.8   thorpej 	struct rtk_mii_frame	*frame;
    391   1.1      haya {
    392   1.1      haya 	int			s;
    393   1.1      haya 
    394   1.9   thorpej 	s = splnet();
    395   1.1      haya 	/*
    396   1.1      haya 	 * Set up frame for TX.
    397   1.1      haya 	 */
    398  1.10   tsutsui 	frame->mii_stdelim = RTK_MII_STARTDELIM;
    399  1.10   tsutsui 	frame->mii_opcode = RTK_MII_WRITEOP;
    400  1.10   tsutsui 	frame->mii_turnaround = RTK_MII_TURNAROUND;
    401   1.1      haya 
    402   1.1      haya 	/*
    403   1.1      haya  	 * Turn on data output.
    404   1.1      haya 	 */
    405  1.10   tsutsui 	MII_SET(RTK_MII_DIR);
    406   1.1      haya 
    407   1.8   thorpej 	rtk_mii_sync(sc);
    408   1.1      haya 
    409   1.8   thorpej 	rtk_mii_send(sc, frame->mii_stdelim, 2);
    410   1.8   thorpej 	rtk_mii_send(sc, frame->mii_opcode, 2);
    411   1.8   thorpej 	rtk_mii_send(sc, frame->mii_phyaddr, 5);
    412   1.8   thorpej 	rtk_mii_send(sc, frame->mii_regaddr, 5);
    413   1.8   thorpej 	rtk_mii_send(sc, frame->mii_turnaround, 2);
    414   1.8   thorpej 	rtk_mii_send(sc, frame->mii_data, 16);
    415   1.1      haya 
    416   1.1      haya 	/* Idle bit. */
    417  1.10   tsutsui 	MII_SET(RTK_MII_CLK);
    418   1.1      haya 	DELAY(1);
    419  1.10   tsutsui 	MII_CLR(RTK_MII_CLK);
    420   1.1      haya 	DELAY(1);
    421   1.1      haya 
    422   1.1      haya 	/*
    423   1.1      haya 	 * Turn off xmit.
    424   1.1      haya 	 */
    425  1.10   tsutsui 	MII_CLR(RTK_MII_DIR);
    426   1.1      haya 
    427   1.1      haya 	splx(s);
    428   1.1      haya 
    429  1.23   tsutsui 	return (0);
    430   1.1      haya }
    431   1.1      haya 
    432   1.8   thorpej STATIC int rtk_phy_readreg(self, phy, reg)
    433   1.1      haya 	struct device		*self;
    434   1.1      haya 	int			phy, reg;
    435   1.1      haya {
    436  1.10   tsutsui 	struct rtk_softc	*sc = (void *)self;
    437   1.8   thorpej 	struct rtk_mii_frame	frame;
    438  1.23   tsutsui 	int			rval = 0;
    439  1.23   tsutsui 	int			rtk8139_reg = 0;
    440   1.1      haya 
    441  1.10   tsutsui 	if (sc->rtk_type == RTK_8139) {
    442   1.1      haya 		if (phy != 7)
    443   1.1      haya 			return (0);
    444   1.1      haya 
    445   1.1      haya 		switch(reg) {
    446   1.1      haya 		case MII_BMCR:
    447  1.10   tsutsui 			rtk8139_reg = RTK_BMCR;
    448   1.1      haya 			break;
    449   1.1      haya 		case MII_BMSR:
    450  1.10   tsutsui 			rtk8139_reg = RTK_BMSR;
    451   1.1      haya 			break;
    452   1.1      haya 		case MII_ANAR:
    453  1.10   tsutsui 			rtk8139_reg = RTK_ANAR;
    454   1.1      haya 			break;
    455  1.12  drochner 		case MII_ANER:
    456  1.12  drochner 			rtk8139_reg = RTK_ANER;
    457  1.12  drochner 			break;
    458   1.1      haya 		case MII_ANLPAR:
    459  1.10   tsutsui 			rtk8139_reg = RTK_LPAR;
    460   1.1      haya 			break;
    461   1.1      haya 		default:
    462   1.1      haya #if 0
    463   1.1      haya 			printf("%s: bad phy register\n", sc->sc_dev.dv_xname);
    464   1.1      haya #endif
    465  1.23   tsutsui 			return (0);
    466   1.1      haya 		}
    467  1.10   tsutsui 		rval = CSR_READ_2(sc, rtk8139_reg);
    468  1.23   tsutsui 		return (rval);
    469   1.1      haya 	}
    470   1.1      haya 
    471  1.34   thorpej 	memset((char *)&frame, 0, sizeof(frame));
    472   1.1      haya 
    473   1.1      haya 	frame.mii_phyaddr = phy;
    474   1.1      haya 	frame.mii_regaddr = reg;
    475   1.8   thorpej 	rtk_mii_readreg(sc, &frame);
    476   1.1      haya 
    477  1.23   tsutsui 	return (frame.mii_data);
    478   1.1      haya }
    479   1.1      haya 
    480   1.8   thorpej STATIC void rtk_phy_writereg(self, phy, reg, data)
    481   1.1      haya 	struct device		*self;
    482   1.1      haya 	int			phy, reg;
    483   1.1      haya 	int			data;
    484   1.1      haya {
    485  1.10   tsutsui 	struct rtk_softc	*sc = (void *)self;
    486   1.8   thorpej 	struct rtk_mii_frame	frame;
    487  1.23   tsutsui 	int			rtk8139_reg = 0;
    488   1.1      haya 
    489  1.10   tsutsui 	if (sc->rtk_type == RTK_8139) {
    490   1.1      haya 		if (phy != 7)
    491   1.1      haya 			return;
    492   1.1      haya 
    493   1.1      haya 		switch(reg) {
    494   1.1      haya 		case MII_BMCR:
    495  1.10   tsutsui 			rtk8139_reg = RTK_BMCR;
    496   1.1      haya 			break;
    497   1.1      haya 		case MII_BMSR:
    498  1.10   tsutsui 			rtk8139_reg = RTK_BMSR;
    499   1.1      haya 			break;
    500   1.1      haya 		case MII_ANAR:
    501  1.10   tsutsui 			rtk8139_reg = RTK_ANAR;
    502   1.1      haya 			break;
    503  1.12  drochner 		case MII_ANER:
    504  1.12  drochner 			rtk8139_reg = RTK_ANER;
    505  1.12  drochner 			break;
    506   1.1      haya 		case MII_ANLPAR:
    507  1.10   tsutsui 			rtk8139_reg = RTK_LPAR;
    508   1.1      haya 			break;
    509   1.1      haya 		default:
    510   1.1      haya #if 0
    511   1.1      haya 			printf("%s: bad phy register\n", sc->sc_dev.dv_xname);
    512   1.1      haya #endif
    513   1.1      haya 			return;
    514   1.1      haya 		}
    515  1.10   tsutsui 		CSR_WRITE_2(sc, rtk8139_reg, data);
    516   1.1      haya 		return;
    517   1.1      haya 	}
    518   1.1      haya 
    519  1.34   thorpej 	memset((char *)&frame, 0, sizeof(frame));
    520   1.1      haya 
    521   1.1      haya 	frame.mii_phyaddr = phy;
    522   1.1      haya 	frame.mii_regaddr = reg;
    523   1.1      haya 	frame.mii_data = data;
    524   1.1      haya 
    525   1.8   thorpej 	rtk_mii_writereg(sc, &frame);
    526   1.1      haya }
    527   1.1      haya 
    528   1.1      haya STATIC void
    529   1.8   thorpej rtk_phy_statchg(v)
    530   1.1      haya 	struct device *v;
    531   1.1      haya {
    532   1.1      haya 
    533   1.1      haya 	/* Nothing to do. */
    534   1.1      haya }
    535   1.1      haya 
    536   1.8   thorpej #define	rtk_calchash(addr) \
    537   1.7   thorpej 	(ether_crc32_be((addr), ETHER_ADDR_LEN) >> 26)
    538   1.1      haya 
    539   1.1      haya /*
    540   1.1      haya  * Program the 64-bit multicast hash filter.
    541   1.1      haya  */
    542   1.8   thorpej STATIC void rtk_setmulti(sc)
    543  1.10   tsutsui 	struct rtk_softc	*sc;
    544   1.1      haya {
    545   1.1      haya 	struct ifnet		*ifp;
    546   1.1      haya 	int			h = 0;
    547   1.1      haya 	u_int32_t		hashes[2] = { 0, 0 };
    548   1.1      haya 	u_int32_t		rxfilt;
    549   1.1      haya 	int			mcnt = 0;
    550   1.1      haya 	struct ether_multi *enm;
    551   1.1      haya 	struct ether_multistep step;
    552   1.1      haya 
    553   1.1      haya 	ifp = &sc->ethercom.ec_if;
    554   1.1      haya 
    555  1.10   tsutsui 	rxfilt = CSR_READ_4(sc, RTK_RXCFG);
    556   1.1      haya 
    557  1.28     enami 	if (ifp->if_flags & IFF_PROMISC) {
    558  1.28     enami allmulti:
    559  1.28     enami 		ifp->if_flags |= IFF_ALLMULTI;
    560  1.10   tsutsui 		rxfilt |= RTK_RXCFG_RX_MULTI;
    561  1.10   tsutsui 		CSR_WRITE_4(sc, RTK_RXCFG, rxfilt);
    562  1.10   tsutsui 		CSR_WRITE_4(sc, RTK_MAR0, 0xFFFFFFFF);
    563  1.10   tsutsui 		CSR_WRITE_4(sc, RTK_MAR4, 0xFFFFFFFF);
    564   1.1      haya 		return;
    565   1.1      haya 	}
    566   1.1      haya 
    567   1.1      haya 	/* first, zot all the existing hash bits */
    568  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_MAR0, 0);
    569  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_MAR4, 0);
    570   1.1      haya 
    571   1.1      haya 	/* now program new ones */
    572   1.1      haya 	ETHER_FIRST_MULTI(step, &sc->ethercom, enm);
    573   1.1      haya 	while (enm != NULL) {
    574   1.4   tsutsui 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
    575   1.4   tsutsui 		    ETHER_ADDR_LEN) != 0)
    576  1.28     enami 			goto allmulti;
    577   1.4   tsutsui 
    578   1.8   thorpej 		h = rtk_calchash(enm->enm_addrlo);
    579   1.1      haya 		if (h < 32)
    580   1.1      haya 			hashes[0] |= (1 << h);
    581   1.1      haya 		else
    582   1.1      haya 			hashes[1] |= (1 << (h - 32));
    583   1.1      haya 		mcnt++;
    584   1.1      haya 		ETHER_NEXT_MULTI(step, enm);
    585   1.1      haya 	}
    586  1.28     enami 
    587  1.28     enami 	ifp->if_flags &= ~IFF_ALLMULTI;
    588   1.1      haya 
    589   1.1      haya 	if (mcnt)
    590  1.10   tsutsui 		rxfilt |= RTK_RXCFG_RX_MULTI;
    591   1.1      haya 	else
    592  1.10   tsutsui 		rxfilt &= ~RTK_RXCFG_RX_MULTI;
    593   1.1      haya 
    594  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_RXCFG, rxfilt);
    595  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_MAR0, hashes[0]);
    596  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_MAR4, hashes[1]);
    597   1.1      haya }
    598   1.1      haya 
    599   1.8   thorpej void rtk_reset(sc)
    600  1.10   tsutsui 	struct rtk_softc	*sc;
    601   1.1      haya {
    602   1.2   tsutsui 	int			i;
    603   1.1      haya 
    604  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_RESET);
    605   1.1      haya 
    606  1.10   tsutsui 	for (i = 0; i < RTK_TIMEOUT; i++) {
    607   1.1      haya 		DELAY(10);
    608  1.23   tsutsui 		if ((CSR_READ_1(sc, RTK_COMMAND) & RTK_CMD_RESET) == 0)
    609   1.1      haya 			break;
    610   1.1      haya 	}
    611  1.10   tsutsui 	if (i == RTK_TIMEOUT)
    612   1.1      haya 		printf("%s: reset never completed!\n", sc->sc_dev.dv_xname);
    613   1.1      haya }
    614   1.1      haya 
    615   1.1      haya /*
    616   1.1      haya  * Attach the interface. Allocate softc structures, do ifmedia
    617   1.1      haya  * setup and ethernet/BPF attach.
    618   1.1      haya  */
    619   1.1      haya void
    620   1.8   thorpej rtk_attach(sc)
    621   1.8   thorpej 	struct rtk_softc *sc;
    622   1.1      haya {
    623   1.1      haya 	struct ifnet *ifp;
    624  1.31   thorpej 	struct rtk_tx_desc *txd;
    625   1.6   tsutsui 	u_int16_t val;
    626   1.6   tsutsui 	u_int8_t eaddr[ETHER_ADDR_LEN];
    627  1.10   tsutsui 	int error;
    628  1.23   tsutsui 	int i, addr_len;
    629   1.1      haya 
    630   1.8   thorpej 	callout_init(&sc->rtk_tick_ch);
    631   1.1      haya 
    632   1.6   tsutsui 	/*
    633   1.6   tsutsui 	 * Check EEPROM type 9346 or 9356.
    634   1.6   tsutsui 	 */
    635  1.10   tsutsui 	if (rtk_read_eeprom(sc, RTK_EE_ID, RTK_EEADDR_LEN1) == 0x8129)
    636  1.10   tsutsui 		addr_len = RTK_EEADDR_LEN1;
    637   1.6   tsutsui 	else
    638  1.10   tsutsui 		addr_len = RTK_EEADDR_LEN0;
    639   1.6   tsutsui 
    640   1.6   tsutsui 	/*
    641   1.6   tsutsui 	 * Get station address.
    642   1.6   tsutsui 	 */
    643  1.10   tsutsui 	val = rtk_read_eeprom(sc, RTK_EE_EADDR0, addr_len);
    644   1.6   tsutsui 	eaddr[0] = val & 0xff;
    645   1.6   tsutsui 	eaddr[1] = val >> 8;
    646  1.10   tsutsui 	val = rtk_read_eeprom(sc, RTK_EE_EADDR1, addr_len);
    647   1.6   tsutsui 	eaddr[2] = val & 0xff;
    648   1.6   tsutsui 	eaddr[3] = val >> 8;
    649  1.10   tsutsui 	val = rtk_read_eeprom(sc, RTK_EE_EADDR2, addr_len);
    650   1.6   tsutsui 	eaddr[4] = val & 0xff;
    651   1.6   tsutsui 	eaddr[5] = val >> 8;
    652   1.6   tsutsui 
    653   1.1      haya 	if ((error = bus_dmamem_alloc(sc->sc_dmat,
    654  1.23   tsutsui 	    RTK_RXBUFLEN + 16, PAGE_SIZE, 0, &sc->sc_dmaseg, 1, &sc->sc_dmanseg,
    655   1.1      haya 	    BUS_DMA_NOWAIT)) != 0) {
    656   1.1      haya 		printf("%s: can't allocate recv buffer, error = %d\n",
    657   1.1      haya 		       sc->sc_dev.dv_xname, error);
    658  1.10   tsutsui 		goto fail_0;
    659   1.1      haya 	}
    660   1.1      haya 
    661  1.10   tsutsui 	if ((error = bus_dmamem_map(sc->sc_dmat, &sc->sc_dmaseg, sc->sc_dmanseg,
    662  1.30   thorpej 	    RTK_RXBUFLEN + 16, (caddr_t *)&sc->rtk_rx_buf,
    663   1.1      haya 	    BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
    664   1.1      haya 		printf("%s: can't map recv buffer, error = %d\n",
    665   1.1      haya 		       sc->sc_dev.dv_xname, error);
    666  1.10   tsutsui 		goto fail_1;
    667   1.1      haya 	}
    668   1.1      haya 
    669   1.1      haya 	if ((error = bus_dmamap_create(sc->sc_dmat,
    670  1.23   tsutsui 	    RTK_RXBUFLEN + 16, 1, RTK_RXBUFLEN + 16, 0, BUS_DMA_NOWAIT,
    671   1.1      haya 	    &sc->recv_dmamap)) != 0) {
    672   1.1      haya 		printf("%s: can't create recv buffer DMA map, error = %d\n",
    673   1.1      haya 		       sc->sc_dev.dv_xname, error);
    674  1.10   tsutsui 		goto fail_2;
    675   1.1      haya 	}
    676   1.1      haya 
    677   1.1      haya 	if ((error = bus_dmamap_load(sc->sc_dmat, sc->recv_dmamap,
    678  1.30   thorpej 	    sc->rtk_rx_buf, RTK_RXBUFLEN + 16,
    679  1.35   thorpej 	    NULL, BUS_DMA_READ|BUS_DMA_NOWAIT)) != 0) {
    680   1.1      haya 		printf("%s: can't load recv buffer DMA map, error = %d\n",
    681   1.1      haya 		       sc->sc_dev.dv_xname, error);
    682  1.10   tsutsui 		goto fail_3;
    683   1.1      haya 	}
    684   1.1      haya 
    685  1.31   thorpej 	for (i = 0; i < RTK_TX_LIST_CNT; i++) {
    686  1.31   thorpej 		txd = &sc->rtk_tx_descs[i];
    687   1.4   tsutsui 		if ((error = bus_dmamap_create(sc->sc_dmat,
    688   1.6   tsutsui 		    MCLBYTES, 1, MCLBYTES, 0, BUS_DMA_NOWAIT,
    689  1.31   thorpej 		    &txd->txd_dmamap)) != 0) {
    690   1.4   tsutsui 			printf("%s: can't create snd buffer DMA map,"
    691   1.4   tsutsui 			    " error = %d\n", sc->sc_dev.dv_xname, error);
    692  1.10   tsutsui 			goto fail_4;
    693   1.5   tsutsui 		}
    694  1.31   thorpej 		txd->txd_txaddr = RTK_TXADDR0 + (i * 4);
    695  1.31   thorpej 		txd->txd_txstat = RTK_TXSTAT0 + (i * 4);
    696  1.31   thorpej 	}
    697  1.31   thorpej 	SIMPLEQ_INIT(&sc->rtk_tx_free);
    698  1.31   thorpej 	SIMPLEQ_INIT(&sc->rtk_tx_dirty);
    699  1.31   thorpej 
    700  1.10   tsutsui 	/*
    701  1.10   tsutsui 	 * From this point forward, the attachment cannot fail. A failure
    702  1.10   tsutsui 	 * before this releases all resources thar may have been
    703  1.10   tsutsui 	 * allocated.
    704  1.10   tsutsui 	 */
    705  1.10   tsutsui 	sc->sc_flags |= RTK_ATTACHED;
    706   1.1      haya 
    707  1.36   kanaoka 	/* Init Early TX threshold. */
    708  1.36   kanaoka 	sc->sc_txthresh = TXTH_256;
    709  1.36   kanaoka 
    710   1.6   tsutsui 	/* Reset the adapter. */
    711   1.8   thorpej 	rtk_reset(sc);
    712   1.6   tsutsui 
    713  1.23   tsutsui 	printf("%s: Ethernet address %s\n",
    714  1.23   tsutsui 	    sc->sc_dev.dv_xname, ether_sprintf(eaddr));
    715   1.6   tsutsui 
    716   1.1      haya 	ifp = &sc->ethercom.ec_if;
    717   1.1      haya 	ifp->if_softc = sc;
    718  1.33   thorpej 	strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
    719   1.1      haya 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
    720   1.8   thorpej 	ifp->if_ioctl = rtk_ioctl;
    721   1.8   thorpej 	ifp->if_start = rtk_start;
    722   1.8   thorpej 	ifp->if_watchdog = rtk_watchdog;
    723  1.15   thorpej 	ifp->if_init = rtk_init;
    724  1.15   thorpej 	ifp->if_stop = rtk_stop;
    725  1.25   thorpej 	IFQ_SET_READY(&ifp->if_snd);
    726   1.1      haya 
    727   1.1      haya 	/*
    728   1.1      haya 	 * Do ifmedia setup.
    729   1.1      haya 	 */
    730   1.1      haya 	sc->mii.mii_ifp = ifp;
    731   1.8   thorpej 	sc->mii.mii_readreg = rtk_phy_readreg;
    732   1.8   thorpej 	sc->mii.mii_writereg = rtk_phy_writereg;
    733   1.8   thorpej 	sc->mii.mii_statchg = rtk_phy_statchg;
    734   1.8   thorpej 	ifmedia_init(&sc->mii.mii_media, 0, rtk_ifmedia_upd, rtk_ifmedia_sts);
    735   1.1      haya 	mii_attach(&sc->sc_dev, &sc->mii, 0xffffffff,
    736  1.23   tsutsui 	    MII_PHY_ANY, MII_OFFSET_ANY, 0);
    737   1.1      haya 
    738   1.1      haya 	/* Choose a default media. */
    739   1.1      haya 	if (LIST_FIRST(&sc->mii.mii_phys) == NULL) {
    740  1.10   tsutsui 		ifmedia_add(&sc->mii.mii_media, IFM_ETHER|IFM_NONE, 0, NULL);
    741   1.1      haya 		ifmedia_set(&sc->mii.mii_media, IFM_ETHER|IFM_NONE);
    742   1.1      haya 	} else {
    743   1.1      haya 		ifmedia_set(&sc->mii.mii_media, IFM_ETHER|IFM_AUTO);
    744   1.1      haya 	}
    745   1.1      haya 
    746   1.1      haya 	/*
    747   1.1      haya 	 * Call MI attach routines.
    748   1.1      haya 	 */
    749   1.1      haya 	if_attach(ifp);
    750   1.1      haya 	ether_ifattach(ifp, eaddr);
    751   1.1      haya 
    752  1.10   tsutsui 	/*
    753  1.10   tsutsui 	 * Make sure the interface is shutdown during reboot.
    754  1.10   tsutsui 	 */
    755  1.10   tsutsui 	sc->sc_sdhook = shutdownhook_establish(rtk_shutdown, sc);
    756  1.10   tsutsui 	if (sc->sc_sdhook == NULL)
    757  1.37   kanaoka 		printf("%s: WARNING: unable to establish shutdown hook\n",
    758  1.23   tsutsui 		    sc->sc_dev.dv_xname);
    759  1.10   tsutsui 	/*
    760  1.10   tsutsui 	 * Add a suspend hook to make sure we come back up after a
    761  1.10   tsutsui 	 * resume.
    762  1.10   tsutsui 	 */
    763  1.10   tsutsui 	sc->sc_powerhook = powerhook_establish(rtk_power, sc);
    764  1.10   tsutsui 	if (sc->sc_powerhook == NULL)
    765  1.10   tsutsui 		printf("%s: WARNING: unable to establish power hook\n",
    766  1.23   tsutsui 		    sc->sc_dev.dv_xname);
    767   1.1      haya 
    768  1.10   tsutsui 	return;
    769  1.23   tsutsui  fail_4:
    770  1.31   thorpej 	for (i = 0; i < RTK_TX_LIST_CNT; i++) {
    771  1.31   thorpej 		txd = &sc->rtk_tx_descs[i];
    772  1.31   thorpej 		if (txd->txd_dmamap != NULL)
    773  1.31   thorpej 			bus_dmamap_destroy(sc->sc_dmat, txd->txd_dmamap);
    774  1.31   thorpej 	}
    775  1.23   tsutsui  fail_3:
    776  1.10   tsutsui 	bus_dmamap_destroy(sc->sc_dmat, sc->recv_dmamap);
    777  1.23   tsutsui  fail_2:
    778  1.30   thorpej 	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->rtk_rx_buf,
    779  1.23   tsutsui 	    RTK_RXBUFLEN + 16);
    780  1.23   tsutsui  fail_1:
    781  1.10   tsutsui 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dmaseg, sc->sc_dmanseg);
    782  1.23   tsutsui  fail_0:
    783   1.1      haya 	return;
    784   1.1      haya }
    785   1.1      haya 
    786   1.1      haya /*
    787   1.1      haya  * Initialize the transmit descriptors.
    788   1.1      haya  */
    789   1.8   thorpej STATIC int rtk_list_tx_init(sc)
    790  1.10   tsutsui 	struct rtk_softc	*sc;
    791   1.1      haya {
    792  1.31   thorpej 	struct rtk_tx_desc *txd;
    793  1.31   thorpej 	int i;
    794  1.31   thorpej 
    795  1.31   thorpej 	while ((txd = SIMPLEQ_FIRST(&sc->rtk_tx_dirty)) != NULL)
    796  1.31   thorpej 		SIMPLEQ_REMOVE_HEAD(&sc->rtk_tx_dirty, txd, txd_q);
    797  1.31   thorpej 	while ((txd = SIMPLEQ_FIRST(&sc->rtk_tx_free)) != NULL)
    798  1.31   thorpej 		SIMPLEQ_REMOVE_HEAD(&sc->rtk_tx_free, txd, txd_q);
    799   1.1      haya 
    800  1.10   tsutsui 	for (i = 0; i < RTK_TX_LIST_CNT; i++) {
    801  1.31   thorpej 		txd = &sc->rtk_tx_descs[i];
    802  1.31   thorpej 		CSR_WRITE_4(sc, txd->txd_txaddr, 0);
    803  1.31   thorpej 		SIMPLEQ_INSERT_TAIL(&sc->rtk_tx_free, txd, txd_q);
    804   1.1      haya 	}
    805   1.1      haya 
    806  1.23   tsutsui 	return (0);
    807   1.1      haya }
    808   1.1      haya 
    809   1.1      haya /*
    810  1.10   tsutsui  * rtk_activate:
    811  1.10   tsutsui  *     Handle device activation/deactivation requests.
    812  1.10   tsutsui  */
    813  1.10   tsutsui int
    814  1.10   tsutsui rtk_activate(self, act)
    815  1.10   tsutsui 	struct device *self;
    816  1.10   tsutsui 	enum devact act;
    817  1.10   tsutsui {
    818  1.10   tsutsui 	struct rtk_softc *sc = (void *) self;
    819  1.10   tsutsui 	int s, error = 0;
    820  1.23   tsutsui 
    821  1.10   tsutsui 	s = splnet();
    822  1.10   tsutsui 	switch (act) {
    823  1.10   tsutsui 	case DVACT_ACTIVATE:
    824  1.10   tsutsui 		error = EOPNOTSUPP;
    825  1.10   tsutsui 		break;
    826  1.10   tsutsui 	case DVACT_DEACTIVATE:
    827  1.10   tsutsui 		mii_activate(&sc->mii, act, MII_PHY_ANY, MII_OFFSET_ANY);
    828  1.10   tsutsui 		if_deactivate(&sc->ethercom.ec_if);
    829  1.10   tsutsui 		break;
    830  1.10   tsutsui 	}
    831  1.10   tsutsui 	splx(s);
    832  1.10   tsutsui 
    833  1.10   tsutsui 	return (error);
    834  1.10   tsutsui }
    835  1.10   tsutsui 
    836  1.10   tsutsui /*
    837  1.10   tsutsui  * rtk_detach:
    838  1.10   tsutsui  *     Detach a rtk interface.
    839  1.10   tsutsui  */
    840  1.10   tsutsui int
    841  1.10   tsutsui rtk_detach(sc)
    842  1.10   tsutsui 	struct rtk_softc *sc;
    843  1.10   tsutsui {
    844  1.10   tsutsui 	struct ifnet *ifp = &sc->ethercom.ec_if;
    845  1.31   thorpej 	struct rtk_tx_desc *txd;
    846  1.10   tsutsui 	int i;
    847  1.10   tsutsui 
    848  1.10   tsutsui 	/*
    849  1.10   tsutsui 	 * Succeed now if thereisn't any work to do.
    850  1.10   tsutsui 	 */
    851  1.10   tsutsui 	if ((sc->sc_flags & RTK_ATTACHED) == 0)
    852  1.10   tsutsui 		return (0);
    853  1.23   tsutsui 
    854  1.10   tsutsui 	/* Unhook our tick handler. */
    855  1.10   tsutsui 	callout_stop(&sc->rtk_tick_ch);
    856  1.10   tsutsui 
    857  1.10   tsutsui 	/* Detach all PHYs. */
    858  1.10   tsutsui 	mii_detach(&sc->mii, MII_PHY_ANY, MII_OFFSET_ANY);
    859  1.10   tsutsui 
    860  1.10   tsutsui 	/* Delete all remaining media. */
    861  1.10   tsutsui 	ifmedia_delete_instance(&sc->mii.mii_media, IFM_INST_ANY);
    862  1.10   tsutsui 
    863  1.10   tsutsui 	ether_ifdetach(ifp);
    864  1.10   tsutsui 	if_detach(ifp);
    865  1.10   tsutsui 
    866  1.31   thorpej 	for (i = 0; i < RTK_TX_LIST_CNT; i++) {
    867  1.31   thorpej 		txd = &sc->rtk_tx_descs[i];
    868  1.31   thorpej 		if (txd->txd_dmamap != NULL)
    869  1.31   thorpej 			bus_dmamap_destroy(sc->sc_dmat, txd->txd_dmamap);
    870  1.31   thorpej 	}
    871  1.10   tsutsui 	bus_dmamap_destroy(sc->sc_dmat, sc->recv_dmamap);
    872  1.30   thorpej 	bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->rtk_rx_buf,
    873  1.23   tsutsui 	    RTK_RXBUFLEN + 16);
    874  1.24   tsutsui 	bus_dmamem_free(sc->sc_dmat, &sc->sc_dmaseg, sc->sc_dmanseg);
    875  1.10   tsutsui 
    876  1.10   tsutsui 	shutdownhook_disestablish(sc->sc_sdhook);
    877  1.10   tsutsui 	powerhook_disestablish(sc->sc_powerhook);
    878  1.23   tsutsui 
    879  1.10   tsutsui 	return (0);
    880  1.10   tsutsui }
    881  1.10   tsutsui 
    882  1.10   tsutsui /*
    883  1.10   tsutsui  * rtk_enable:
    884  1.10   tsutsui  *     Enable the RTL81X9 chip.
    885  1.10   tsutsui  */
    886  1.10   tsutsui int
    887  1.10   tsutsui rtk_enable(sc)
    888  1.10   tsutsui 	struct rtk_softc *sc;
    889  1.10   tsutsui {
    890  1.23   tsutsui 
    891  1.10   tsutsui 	if (RTK_IS_ENABLED(sc) == 0 && sc->sc_enable != NULL) {
    892  1.10   tsutsui 		if ((*sc->sc_enable)(sc) != 0) {
    893  1.10   tsutsui 			printf("%s: device enable failed\n",
    894  1.23   tsutsui 			    sc->sc_dev.dv_xname);
    895  1.23   tsutsui 			return (EIO);
    896  1.10   tsutsui 		}
    897  1.10   tsutsui 		sc->sc_flags |= RTK_ENABLED;
    898  1.10   tsutsui 	}
    899  1.10   tsutsui 	return (0);
    900  1.10   tsutsui }
    901  1.10   tsutsui 
    902  1.10   tsutsui /*
    903  1.10   tsutsui  * rtk_disable:
    904  1.10   tsutsui  *     Disable the RTL81X9 chip.
    905  1.10   tsutsui  */
    906  1.10   tsutsui void
    907  1.10   tsutsui rtk_disable(sc)
    908  1.10   tsutsui 	struct rtk_softc *sc;
    909  1.10   tsutsui {
    910  1.23   tsutsui 
    911  1.10   tsutsui 	if (RTK_IS_ENABLED(sc) && sc->sc_disable != NULL) {
    912  1.10   tsutsui 		(*sc->sc_disable)(sc);
    913  1.10   tsutsui 		sc->sc_flags &= ~RTK_ENABLED;
    914  1.10   tsutsui 	}
    915  1.10   tsutsui }
    916  1.10   tsutsui 
    917  1.10   tsutsui /*
    918  1.10   tsutsui  * rtk_power:
    919  1.10   tsutsui  *     Power management (suspend/resume) hook.
    920  1.10   tsutsui  */
    921  1.10   tsutsui void
    922  1.10   tsutsui rtk_power(why, arg)
    923  1.10   tsutsui 	int why;
    924  1.10   tsutsui 	void *arg;
    925  1.10   tsutsui {
    926  1.10   tsutsui 	struct rtk_softc *sc = (void *) arg;
    927  1.10   tsutsui 	struct ifnet *ifp = &sc->ethercom.ec_if;
    928  1.10   tsutsui 	int s;
    929  1.10   tsutsui 
    930  1.10   tsutsui 	s = splnet();
    931  1.19  takemura 	switch (why) {
    932  1.19  takemura 	case PWR_SUSPEND:
    933  1.19  takemura 	case PWR_STANDBY:
    934  1.15   thorpej 		rtk_stop(ifp, 0);
    935  1.10   tsutsui 		if (sc->sc_power != NULL)
    936  1.10   tsutsui 			(*sc->sc_power)(sc, why);
    937  1.19  takemura 		break;
    938  1.19  takemura 	case PWR_RESUME:
    939  1.19  takemura 		if (ifp->if_flags & IFF_UP) {
    940  1.19  takemura 			if (sc->sc_power != NULL)
    941  1.19  takemura 				(*sc->sc_power)(sc, why);
    942  1.19  takemura 			rtk_init(ifp);
    943  1.19  takemura 		}
    944  1.19  takemura 		break;
    945  1.19  takemura 	case PWR_SOFTSUSPEND:
    946  1.19  takemura 	case PWR_SOFTSTANDBY:
    947  1.19  takemura 	case PWR_SOFTRESUME:
    948  1.19  takemura 		break;
    949  1.10   tsutsui 	}
    950  1.10   tsutsui 	splx(s);
    951  1.10   tsutsui }
    952  1.10   tsutsui 
    953  1.10   tsutsui /*
    954   1.1      haya  * A frame has been uploaded: pass the resulting mbuf chain up to
    955   1.1      haya  * the higher level protocols.
    956   1.1      haya  *
    957  1.22   tsutsui  * You know there's something wrong with a PCI bus-master chip design.
    958   1.1      haya  *
    959   1.1      haya  * The receive operation is badly documented in the datasheet, so I'll
    960   1.1      haya  * attempt to document it here. The driver provides a buffer area and
    961   1.1      haya  * places its base address in the RX buffer start address register.
    962   1.1      haya  * The chip then begins copying frames into the RX buffer. Each frame
    963   1.1      haya  * is preceeded by a 32-bit RX status word which specifies the length
    964   1.1      haya  * of the frame and certain other status bits. Each frame (starting with
    965   1.1      haya  * the status word) is also 32-bit aligned. The frame length is in the
    966   1.1      haya  * first 16 bits of the status word; the lower 15 bits correspond with
    967   1.1      haya  * the 'rx status register' mentioned in the datasheet.
    968   1.1      haya  *
    969   1.1      haya  * Note: to make the Alpha happy, the frame payload needs to be aligned
    970  1.22   tsutsui  * on a 32-bit boundary. To achieve this, we copy the data to mbuf
    971  1.22   tsutsui  * shifted forward 2 bytes.
    972   1.1      haya  */
    973   1.8   thorpej STATIC void rtk_rxeof(sc)
    974  1.10   tsutsui 	struct rtk_softc	*sc;
    975   1.1      haya {
    976   1.1      haya         struct mbuf		*m;
    977   1.1      haya         struct ifnet		*ifp;
    978  1.22   tsutsui 	caddr_t			rxbufpos, dst;
    979  1.22   tsutsui 	int			total_len, wrap = 0;
    980   1.1      haya 	u_int32_t		rxstat;
    981  1.22   tsutsui 	u_int16_t		cur_rx, new_rx;
    982   1.1      haya 	u_int16_t		limit;
    983   1.1      haya 	u_int16_t		rx_bytes = 0, max_bytes;
    984   1.1      haya 
    985   1.1      haya 	ifp = &sc->ethercom.ec_if;
    986   1.1      haya 
    987  1.10   tsutsui 	cur_rx = (CSR_READ_2(sc, RTK_CURRXADDR) + 16) % RTK_RXBUFLEN;
    988   1.1      haya 
    989   1.1      haya 	/* Do not try to read past this point. */
    990  1.10   tsutsui 	limit = CSR_READ_2(sc, RTK_CURRXBUF) % RTK_RXBUFLEN;
    991   1.1      haya 
    992   1.1      haya 	if (limit < cur_rx)
    993  1.10   tsutsui 		max_bytes = (RTK_RXBUFLEN - cur_rx) + limit;
    994   1.1      haya 	else
    995   1.1      haya 		max_bytes = limit - cur_rx;
    996   1.1      haya 
    997  1.10   tsutsui 	while((CSR_READ_1(sc, RTK_COMMAND) & RTK_CMD_EMPTY_RXBUF) == 0) {
    998  1.30   thorpej 		rxbufpos = sc->rtk_rx_buf + cur_rx;
    999   1.4   tsutsui 		bus_dmamap_sync(sc->sc_dmat, sc->recv_dmamap, cur_rx,
   1000  1.21   tsutsui 		    RTK_RXSTAT_LEN, BUS_DMASYNC_POSTREAD);
   1001   1.3   tsutsui 		rxstat = le32toh(*(u_int32_t *)rxbufpos);
   1002   1.4   tsutsui 		bus_dmamap_sync(sc->sc_dmat, sc->recv_dmamap, cur_rx,
   1003  1.21   tsutsui 		    RTK_RXSTAT_LEN, BUS_DMASYNC_PREREAD);
   1004   1.1      haya 
   1005   1.1      haya 		/*
   1006   1.1      haya 		 * Here's a totally undocumented fact for you. When the
   1007   1.1      haya 		 * RealTek chip is in the process of copying a packet into
   1008   1.1      haya 		 * RAM for you, the length will be 0xfff0. If you spot a
   1009   1.1      haya 		 * packet header with this value, you need to stop. The
   1010   1.1      haya 		 * datasheet makes absolutely no mention of this and
   1011   1.1      haya 		 * RealTek should be shot for this.
   1012   1.1      haya 		 */
   1013  1.22   tsutsui 		total_len = rxstat >> 16;
   1014  1.22   tsutsui 		if (total_len == RTK_RXSTAT_UNFINISHED)
   1015   1.1      haya 			break;
   1016  1.22   tsutsui 
   1017  1.27   tsutsui 		if ((rxstat & RTK_RXSTAT_RXOK) == 0 ||
   1018  1.27   tsutsui 		    total_len > ETHER_MAX_LEN) {
   1019   1.1      haya 			ifp->if_ierrors++;
   1020   1.1      haya 
   1021   1.1      haya 			/*
   1022   1.1      haya 			 * submitted by:[netbsd-pcmcia:00484]
   1023   1.1      haya 			 *	Takahiro Kambe <taca (at) sky.yamashina.kyoto.jp>
   1024   1.1      haya 			 * obtain from:
   1025   1.1      haya 			 *     FreeBSD if_rl.c rev 1.24->1.25
   1026   1.1      haya 			 *
   1027   1.1      haya 			 */
   1028   1.1      haya #if 0
   1029  1.10   tsutsui 			if (rxstat & (RTK_RXSTAT_BADSYM|RTK_RXSTAT_RUNT|
   1030  1.21   tsutsui 			    RTK_RXSTAT_GIANT|RTK_RXSTAT_CRCERR|
   1031  1.21   tsutsui 			    RTK_RXSTAT_ALIGNERR)) {
   1032  1.10   tsutsui 				CSR_WRITE_2(sc, RTK_COMMAND, RTK_CMD_TX_ENB);
   1033  1.21   tsutsui 				CSR_WRITE_2(sc, RTK_COMMAND,
   1034  1.21   tsutsui 				    RTK_CMD_TX_ENB|RTK_CMD_RX_ENB);
   1035  1.10   tsutsui 				CSR_WRITE_4(sc, RTK_RXCFG, RTK_RXCFG_CONFIG);
   1036  1.10   tsutsui 				CSR_WRITE_4(sc, RTK_RXADDR,
   1037  1.21   tsutsui 				    sc->recv_dmamap->dm_segs[0].ds_addr);
   1038   1.1      haya 				cur_rx = 0;
   1039   1.1      haya 			}
   1040   1.1      haya 			break;
   1041   1.1      haya #else
   1042  1.15   thorpej 			rtk_init(ifp);
   1043   1.1      haya 			return;
   1044   1.1      haya #endif
   1045   1.1      haya 		}
   1046   1.1      haya 
   1047   1.1      haya 		/* No errors; receive the packet. */
   1048  1.21   tsutsui 		rx_bytes += total_len + RTK_RXSTAT_LEN;
   1049   1.1      haya 
   1050   1.1      haya 		/*
   1051   1.1      haya 		 * Avoid trying to read more bytes than we know
   1052   1.1      haya 		 * the chip has prepared for us.
   1053   1.1      haya 		 */
   1054   1.1      haya 		if (rx_bytes > max_bytes)
   1055   1.1      haya 			break;
   1056   1.1      haya 
   1057  1.22   tsutsui 		/*
   1058  1.22   tsutsui 		 * Skip the status word, wrapping around to the beginning
   1059  1.22   tsutsui 		 * of the Rx area, if necessary.
   1060  1.22   tsutsui 		 */
   1061  1.29   thorpej 		cur_rx = (cur_rx + RTK_RXSTAT_LEN) % RTK_RXBUFLEN;
   1062  1.30   thorpej 		rxbufpos = sc->rtk_rx_buf + cur_rx;
   1063   1.4   tsutsui 
   1064  1.22   tsutsui 		/*
   1065  1.22   tsutsui 		 * Compute the number of bytes at which the packet
   1066  1.22   tsutsui 		 * will wrap to the beginning of the ring buffer.
   1067  1.22   tsutsui 		 */
   1068  1.29   thorpej 		wrap = RTK_RXBUFLEN - cur_rx;
   1069   1.1      haya 
   1070  1.22   tsutsui 		/*
   1071  1.22   tsutsui 		 * Compute where the next pending packet is.
   1072  1.22   tsutsui 		 */
   1073  1.22   tsutsui 		if (total_len > wrap)
   1074  1.22   tsutsui 			new_rx = total_len - wrap;
   1075  1.22   tsutsui 		else
   1076  1.22   tsutsui 			new_rx = cur_rx + total_len;
   1077  1.22   tsutsui 		/* Round up to 32-bit boundary. */
   1078  1.22   tsutsui 		new_rx = (new_rx + 3) & ~3;
   1079   1.1      haya 
   1080  1.22   tsutsui 		/*
   1081  1.22   tsutsui 		 * Now allocate an mbuf (and possibly a cluster) to hold
   1082  1.22   tsutsui 		 * the packet. Note we offset the packet 2 bytes so that
   1083  1.22   tsutsui 		 * data after the Ethernet header will be 4-byte aligned.
   1084  1.22   tsutsui 		 */
   1085  1.22   tsutsui 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   1086  1.22   tsutsui 		if (m == NULL) {
   1087  1.22   tsutsui 			printf("%s: unable to allocate Rx mbuf\n",
   1088  1.22   tsutsui 			    sc->sc_dev.dv_xname);
   1089  1.22   tsutsui 			ifp->if_ierrors++;
   1090  1.22   tsutsui 			goto next_packet;
   1091  1.22   tsutsui 		}
   1092  1.22   tsutsui 		if (total_len > (MHLEN - RTK_ETHER_ALIGN)) {
   1093  1.22   tsutsui 			MCLGET(m, M_DONTWAIT);
   1094  1.22   tsutsui 			if ((m->m_flags & M_EXT) == 0) {
   1095  1.22   tsutsui 				printf("%s: unable to allocate Rx cluster\n",
   1096  1.22   tsutsui 				    sc->sc_dev.dv_xname);
   1097  1.22   tsutsui 				ifp->if_ierrors++;
   1098  1.22   tsutsui 				m_freem(m);
   1099  1.22   tsutsui 				m = NULL;
   1100  1.22   tsutsui 				goto next_packet;
   1101  1.22   tsutsui 			}
   1102  1.22   tsutsui 		}
   1103  1.22   tsutsui 		m->m_data += RTK_ETHER_ALIGN;	/* for alignment */
   1104  1.22   tsutsui 		m->m_pkthdr.rcvif = ifp;
   1105  1.22   tsutsui 		m->m_pkthdr.len = m->m_len = total_len;
   1106  1.22   tsutsui 		dst = mtod(m, caddr_t);
   1107   1.1      haya 
   1108  1.22   tsutsui 		/*
   1109  1.22   tsutsui 		 * If the packet wraps, copy up to the wrapping point.
   1110  1.22   tsutsui 		 */
   1111   1.1      haya 		if (total_len > wrap) {
   1112  1.22   tsutsui 			bus_dmamap_sync(sc->sc_dmat, sc->recv_dmamap,
   1113  1.22   tsutsui 			    cur_rx, wrap, BUS_DMASYNC_POSTREAD);
   1114  1.22   tsutsui 			memcpy(dst, rxbufpos, wrap);
   1115  1.22   tsutsui 			bus_dmamap_sync(sc->sc_dmat, sc->recv_dmamap,
   1116  1.22   tsutsui 			    cur_rx, wrap, BUS_DMASYNC_PREREAD);
   1117  1.22   tsutsui 			cur_rx = 0;
   1118  1.30   thorpej 			rxbufpos = sc->rtk_rx_buf;
   1119  1.22   tsutsui 			total_len -= wrap;
   1120  1.22   tsutsui 			dst += wrap;
   1121   1.1      haya 		}
   1122   1.1      haya 
   1123   1.1      haya 		/*
   1124  1.22   tsutsui 		 * ...and now the rest.
   1125   1.1      haya 		 */
   1126  1.22   tsutsui 		bus_dmamap_sync(sc->sc_dmat, sc->recv_dmamap,
   1127  1.22   tsutsui 		    cur_rx, total_len, BUS_DMASYNC_POSTREAD);
   1128  1.22   tsutsui 		memcpy(dst, rxbufpos, total_len);
   1129  1.22   tsutsui 		bus_dmamap_sync(sc->sc_dmat, sc->recv_dmamap,
   1130  1.22   tsutsui 		    cur_rx, total_len, BUS_DMASYNC_PREREAD);
   1131  1.22   tsutsui 
   1132  1.23   tsutsui  next_packet:
   1133  1.22   tsutsui 		CSR_WRITE_2(sc, RTK_CURRXADDR, new_rx - 16);
   1134  1.22   tsutsui 		cur_rx = new_rx;
   1135   1.1      haya 
   1136   1.1      haya 		if (m == NULL)
   1137   1.1      haya 			continue;
   1138  1.16   thorpej 
   1139  1.16   thorpej 		/*
   1140  1.16   thorpej 		 * The RealTek chip includes the CRC with every
   1141  1.16   thorpej 		 * incoming packet.
   1142  1.16   thorpej 		 */
   1143  1.16   thorpej 		m->m_flags |= M_HASFCS;
   1144   1.1      haya 
   1145   1.1      haya 		ifp->if_ipackets++;
   1146   1.1      haya 
   1147   1.1      haya #if NBPFILTER > 0
   1148  1.14   thorpej 		if (ifp->if_bpf)
   1149   1.1      haya 			bpf_mtap(ifp->if_bpf, m);
   1150   1.1      haya #endif
   1151   1.1      haya 		/* pass it on. */
   1152   1.1      haya 		(*ifp->if_input)(ifp, m);
   1153   1.1      haya 	}
   1154   1.1      haya }
   1155   1.1      haya 
   1156   1.1      haya /*
   1157   1.1      haya  * A frame was downloaded to the chip. It's safe for us to clean up
   1158   1.1      haya  * the list buffers.
   1159   1.1      haya  */
   1160   1.8   thorpej STATIC void rtk_txeof(sc)
   1161  1.10   tsutsui 	struct rtk_softc	*sc;
   1162   1.1      haya {
   1163  1.31   thorpej 	struct ifnet *ifp;
   1164  1.31   thorpej 	struct rtk_tx_desc *txd;
   1165  1.31   thorpej 	u_int32_t txstat;
   1166   1.1      haya 
   1167   1.1      haya 	ifp = &sc->ethercom.ec_if;
   1168   1.1      haya 
   1169   1.1      haya 	/* Clear the timeout timer. */
   1170   1.1      haya 	ifp->if_timer = 0;
   1171   1.1      haya 
   1172   1.1      haya 	/*
   1173   1.1      haya 	 * Go through our tx list and free mbufs for those
   1174   1.1      haya 	 * frames that have been uploaded.
   1175   1.1      haya 	 */
   1176  1.31   thorpej 	while ((txd = SIMPLEQ_FIRST(&sc->rtk_tx_dirty)) != NULL) {
   1177  1.31   thorpej 		txstat = CSR_READ_4(sc, txd->txd_txstat);
   1178  1.23   tsutsui 		if ((txstat & (RTK_TXSTAT_TX_OK|
   1179  1.23   tsutsui 		    RTK_TXSTAT_TX_UNDERRUN|RTK_TXSTAT_TXABRT)) == 0)
   1180   1.1      haya 			break;
   1181   1.1      haya 
   1182  1.31   thorpej 		SIMPLEQ_REMOVE_HEAD(&sc->rtk_tx_dirty, txd, txd_q);
   1183  1.31   thorpej 
   1184  1.31   thorpej 		bus_dmamap_sync(sc->sc_dmat, txd->txd_dmamap, 0,
   1185  1.31   thorpej 		    txd->txd_dmamap->dm_mapsize, BUS_DMASYNC_POSTWRITE);
   1186  1.31   thorpej 		bus_dmamap_unload(sc->sc_dmat, txd->txd_dmamap);
   1187  1.31   thorpej 		m_freem(txd->txd_mbuf);
   1188  1.31   thorpej 		txd->txd_mbuf = NULL;
   1189   1.4   tsutsui 
   1190  1.10   tsutsui 		ifp->if_collisions += (txstat & RTK_TXSTAT_COLLCNT) >> 24;
   1191   1.1      haya 
   1192  1.10   tsutsui 		if (txstat & RTK_TXSTAT_TX_OK)
   1193   1.1      haya 			ifp->if_opackets++;
   1194   1.1      haya 		else {
   1195   1.1      haya 			ifp->if_oerrors++;
   1196  1.36   kanaoka 
   1197  1.36   kanaoka 			/*
   1198  1.36   kanaoka 			 * Increase Early TX threshold if underrun occurred.
   1199  1.36   kanaoka 			 * Increase step 64 bytes.
   1200  1.36   kanaoka 			 */
   1201  1.36   kanaoka 			if (txstat & RTK_TXSTAT_TX_UNDERRUN) {
   1202  1.36   kanaoka 				printf("%s: transmit underrun;",
   1203  1.36   kanaoka 				    sc->sc_dev.dv_xname);
   1204  1.36   kanaoka 				if (sc->sc_txthresh < TXTH_MAX) {
   1205  1.36   kanaoka 					sc->sc_txthresh += 2;
   1206  1.36   kanaoka 					printf(" new threshold: %d bytes",
   1207  1.36   kanaoka 					    sc->sc_txthresh * 32);
   1208  1.36   kanaoka 				}
   1209  1.36   kanaoka 				printf("\n");
   1210  1.36   kanaoka 			}
   1211  1.23   tsutsui 			if (txstat & (RTK_TXSTAT_TXABRT|RTK_TXSTAT_OUTOFWIN))
   1212  1.10   tsutsui 				CSR_WRITE_4(sc, RTK_TXCFG, RTK_TXCFG_CONFIG);
   1213   1.1      haya 		}
   1214  1.31   thorpej 		SIMPLEQ_INSERT_TAIL(&sc->rtk_tx_free, txd, txd_q);
   1215   1.1      haya 		ifp->if_flags &= ~IFF_OACTIVE;
   1216  1.31   thorpej 	}
   1217   1.1      haya }
   1218   1.1      haya 
   1219   1.8   thorpej int rtk_intr(arg)
   1220   1.1      haya 	void			*arg;
   1221   1.1      haya {
   1222  1.10   tsutsui 	struct rtk_softc	*sc;
   1223   1.1      haya 	struct ifnet		*ifp;
   1224   1.1      haya 	u_int16_t		status;
   1225   1.1      haya 	int handled = 0;
   1226   1.1      haya 
   1227   1.1      haya 	sc = arg;
   1228   1.1      haya 	ifp = &sc->ethercom.ec_if;
   1229   1.1      haya 
   1230   1.1      haya 	/* Disable interrupts. */
   1231  1.10   tsutsui 	CSR_WRITE_2(sc, RTK_IMR, 0x0000);
   1232   1.1      haya 
   1233   1.1      haya 	for (;;) {
   1234   1.1      haya 
   1235  1.10   tsutsui 		status = CSR_READ_2(sc, RTK_ISR);
   1236   1.1      haya 		if (status)
   1237  1.10   tsutsui 			CSR_WRITE_2(sc, RTK_ISR, status);
   1238   1.1      haya 
   1239   1.1      haya 		handled = 1;
   1240   1.1      haya 
   1241  1.10   tsutsui 		if ((status & RTK_INTRS) == 0)
   1242   1.1      haya 			break;
   1243   1.1      haya 
   1244  1.10   tsutsui 		if (status & RTK_ISR_RX_OK)
   1245   1.8   thorpej 			rtk_rxeof(sc);
   1246   1.1      haya 
   1247  1.10   tsutsui 		if (status & RTK_ISR_RX_ERR)
   1248   1.8   thorpej 			rtk_rxeof(sc);
   1249   1.1      haya 
   1250  1.23   tsutsui 		if (status & (RTK_ISR_TX_OK|RTK_ISR_TX_ERR))
   1251   1.8   thorpej 			rtk_txeof(sc);
   1252   1.1      haya 
   1253  1.10   tsutsui 		if (status & RTK_ISR_SYSTEM_ERR) {
   1254   1.8   thorpej 			rtk_reset(sc);
   1255  1.15   thorpej 			rtk_init(ifp);
   1256   1.1      haya 		}
   1257   1.1      haya 	}
   1258   1.1      haya 
   1259   1.1      haya 	/* Re-enable interrupts. */
   1260  1.10   tsutsui 	CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS);
   1261   1.1      haya 
   1262  1.25   thorpej 	if (IFQ_IS_EMPTY(&ifp->if_snd) == 0)
   1263   1.8   thorpej 		rtk_start(ifp);
   1264   1.1      haya 
   1265   1.1      haya 	return (handled);
   1266   1.1      haya }
   1267   1.1      haya 
   1268   1.1      haya /*
   1269   1.1      haya  * Main transmit routine.
   1270   1.1      haya  */
   1271   1.1      haya 
   1272   1.8   thorpej STATIC void rtk_start(ifp)
   1273   1.1      haya 	struct ifnet		*ifp;
   1274   1.1      haya {
   1275  1.31   thorpej 	struct rtk_softc *sc;
   1276  1.31   thorpej 	struct rtk_tx_desc *txd;
   1277  1.31   thorpej 	struct mbuf *m_head = NULL, *m_new;
   1278  1.31   thorpej 	int error, len;
   1279   1.1      haya 
   1280   1.1      haya 	sc = ifp->if_softc;
   1281   1.1      haya 
   1282  1.31   thorpej 	while ((txd = SIMPLEQ_FIRST(&sc->rtk_tx_free)) != NULL) {
   1283  1.25   thorpej 		IFQ_POLL(&ifp->if_snd, m_head);
   1284   1.1      haya 		if (m_head == NULL)
   1285   1.1      haya 			break;
   1286  1.26   thorpej 		m_new = NULL;
   1287   1.1      haya 
   1288   1.4   tsutsui 		/*
   1289   1.4   tsutsui 		 * Load the DMA map.  If this fails, the packet didn't
   1290   1.4   tsutsui 		 * fit in one DMA segment, and we need to copy.  Note,
   1291   1.4   tsutsui 		 * the packet must also be aligned.
   1292   1.4   tsutsui 		 */
   1293   1.4   tsutsui 		if ((mtod(m_head, bus_addr_t) & 3) != 0 ||
   1294  1.31   thorpej 		    bus_dmamap_load_mbuf(sc->sc_dmat, txd->txd_dmamap,
   1295  1.35   thorpej 			m_head, BUS_DMA_WRITE|BUS_DMA_NOWAIT) != 0) {
   1296   1.4   tsutsui 			MGETHDR(m_new, M_DONTWAIT, MT_DATA);
   1297   1.4   tsutsui 			if (m_new == NULL) {
   1298   1.4   tsutsui 				printf("%s: unable to allocate Tx mbuf\n",
   1299   1.4   tsutsui 				    sc->sc_dev.dv_xname);
   1300   1.4   tsutsui 				break;
   1301   1.4   tsutsui 			}
   1302   1.4   tsutsui 			if (m_head->m_pkthdr.len > MHLEN) {
   1303   1.4   tsutsui 				MCLGET(m_new, M_DONTWAIT);
   1304   1.4   tsutsui 				if ((m_new->m_flags & M_EXT) == 0) {
   1305   1.4   tsutsui 					printf("%s: unable to allocate Tx "
   1306   1.4   tsutsui 					    "cluster\n", sc->sc_dev.dv_xname);
   1307   1.4   tsutsui 					m_freem(m_new);
   1308   1.4   tsutsui 					break;
   1309   1.4   tsutsui 				}
   1310   1.4   tsutsui 			}
   1311   1.4   tsutsui 			m_copydata(m_head, 0, m_head->m_pkthdr.len,
   1312   1.4   tsutsui 			    mtod(m_new, caddr_t));
   1313   1.4   tsutsui 			m_new->m_pkthdr.len = m_new->m_len =
   1314   1.4   tsutsui 			    m_head->m_pkthdr.len;
   1315   1.4   tsutsui 			error = bus_dmamap_load_mbuf(sc->sc_dmat,
   1316  1.35   thorpej 			    txd->txd_dmamap, m_new,
   1317  1.35   thorpej 			    BUS_DMA_WRITE|BUS_DMA_NOWAIT);
   1318   1.4   tsutsui 			if (error) {
   1319   1.4   tsutsui 				printf("%s: unable to load Tx buffer, "
   1320   1.4   tsutsui 				    "error = %d\n", sc->sc_dev.dv_xname, error);
   1321   1.4   tsutsui 				break;
   1322   1.4   tsutsui 			}
   1323   1.4   tsutsui 		}
   1324  1.25   thorpej 		IFQ_DEQUEUE(&ifp->if_snd, m_head);
   1325  1.26   thorpej 		if (m_new != NULL) {
   1326  1.26   thorpej 			m_freem(m_head);
   1327  1.26   thorpej 			m_head = m_new;
   1328  1.26   thorpej 		}
   1329  1.31   thorpej 		txd->txd_mbuf = m_head;
   1330   1.4   tsutsui 
   1331  1.31   thorpej 		SIMPLEQ_REMOVE_HEAD(&sc->rtk_tx_free, txd, txd_q);
   1332  1.31   thorpej 		SIMPLEQ_INSERT_TAIL(&sc->rtk_tx_dirty, txd, txd_q);
   1333   1.1      haya 
   1334   1.1      haya #if NBPFILTER > 0
   1335   1.1      haya 		/*
   1336   1.1      haya 		 * If there's a BPF listener, bounce a copy of this frame
   1337   1.1      haya 		 * to him.
   1338   1.1      haya 		 */
   1339   1.1      haya 		if (ifp->if_bpf)
   1340  1.31   thorpej 			bpf_mtap(ifp->if_bpf, m_head);
   1341   1.1      haya #endif
   1342   1.1      haya 		/*
   1343   1.1      haya 		 * Transmit the frame.
   1344   1.1      haya 	 	 */
   1345   1.4   tsutsui 		bus_dmamap_sync(sc->sc_dmat,
   1346  1.31   thorpej 		    txd->txd_dmamap, 0, txd->txd_dmamap->dm_mapsize,
   1347   1.4   tsutsui 		    BUS_DMASYNC_PREWRITE);
   1348   1.4   tsutsui 
   1349  1.31   thorpej 		len = txd->txd_dmamap->dm_segs[0].ds_len;
   1350   1.4   tsutsui 		if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN))
   1351   1.4   tsutsui 			len = (ETHER_MIN_LEN - ETHER_CRC_LEN);
   1352   1.4   tsutsui 
   1353  1.31   thorpej 		CSR_WRITE_4(sc, txd->txd_txaddr,
   1354  1.31   thorpej 		    txd->txd_dmamap->dm_segs[0].ds_addr);
   1355  1.36   kanaoka 		CSR_WRITE_4(sc, txd->txd_txstat, RTK_TX_THRESH(sc) | len);
   1356   1.1      haya 	}
   1357   1.1      haya 
   1358   1.1      haya 	/*
   1359   1.1      haya 	 * We broke out of the loop because all our TX slots are
   1360   1.1      haya 	 * full. Mark the NIC as busy until it drains some of the
   1361   1.1      haya 	 * packets from the queue.
   1362   1.1      haya 	 */
   1363  1.31   thorpej 	if (SIMPLEQ_FIRST(&sc->rtk_tx_free) == NULL)
   1364   1.1      haya 		ifp->if_flags |= IFF_OACTIVE;
   1365   1.1      haya 
   1366   1.1      haya 	/*
   1367   1.1      haya 	 * Set a timeout in case the chip goes out to lunch.
   1368   1.1      haya 	 */
   1369   1.1      haya 	ifp->if_timer = 5;
   1370   1.1      haya }
   1371   1.1      haya 
   1372  1.15   thorpej STATIC int rtk_init(ifp)
   1373  1.15   thorpej 	struct ifnet *ifp;
   1374   1.1      haya {
   1375  1.15   thorpej 	struct rtk_softc	*sc = ifp->if_softc;
   1376  1.15   thorpej 	int			error = 0, i;
   1377   1.4   tsutsui 	u_int32_t		rxcfg;
   1378   1.1      haya 
   1379  1.15   thorpej 	if ((error = rtk_enable(sc)) != 0)
   1380  1.15   thorpej 		goto out;
   1381   1.1      haya 
   1382   1.1      haya 	/*
   1383  1.15   thorpej 	 * Cancel pending I/O.
   1384   1.1      haya 	 */
   1385  1.15   thorpej 	rtk_stop(ifp, 0);
   1386   1.1      haya 
   1387   1.1      haya 	/* Init our MAC address */
   1388   1.1      haya 	for (i = 0; i < ETHER_ADDR_LEN; i++) {
   1389  1.10   tsutsui 		CSR_WRITE_1(sc, RTK_IDR0 + i, LLADDR(ifp->if_sadl)[i]);
   1390   1.1      haya 	}
   1391   1.1      haya 
   1392   1.1      haya 	/* Init the RX buffer pointer register. */
   1393   1.4   tsutsui 	bus_dmamap_sync(sc->sc_dmat, sc->recv_dmamap, 0,
   1394   1.4   tsutsui 	    sc->recv_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
   1395  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_RXADDR, sc->recv_dmamap->dm_segs[0].ds_addr);
   1396   1.1      haya 
   1397   1.1      haya 	/* Init TX descriptors. */
   1398   1.8   thorpej 	rtk_list_tx_init(sc);
   1399   1.1      haya 
   1400  1.36   kanaoka 	/* Init Early TX threshold. */
   1401  1.36   kanaoka 	sc->sc_txthresh = TXTH_256;
   1402   1.1      haya 	/*
   1403   1.1      haya 	 * Enable transmit and receive.
   1404   1.1      haya 	 */
   1405  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB|RTK_CMD_RX_ENB);
   1406   1.1      haya 
   1407   1.1      haya 	/*
   1408   1.1      haya 	 * Set the initial TX and RX configuration.
   1409   1.1      haya 	 */
   1410  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_TXCFG, RTK_TXCFG_CONFIG);
   1411  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_RXCFG, RTK_RXCFG_CONFIG);
   1412   1.1      haya 
   1413   1.1      haya 	/* Set the individual bit to receive frames for this host only. */
   1414  1.10   tsutsui 	rxcfg = CSR_READ_4(sc, RTK_RXCFG);
   1415  1.10   tsutsui 	rxcfg |= RTK_RXCFG_RX_INDIV;
   1416   1.1      haya 
   1417   1.1      haya 	/* If we want promiscuous mode, set the allframes bit. */
   1418   1.1      haya 	if (ifp->if_flags & IFF_PROMISC) {
   1419  1.10   tsutsui 		rxcfg |= RTK_RXCFG_RX_ALLPHYS;
   1420  1.10   tsutsui 		CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
   1421   1.1      haya 	} else {
   1422  1.10   tsutsui 		rxcfg &= ~RTK_RXCFG_RX_ALLPHYS;
   1423  1.10   tsutsui 		CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
   1424   1.1      haya 	}
   1425   1.1      haya 
   1426   1.1      haya 	/*
   1427   1.1      haya 	 * Set capture broadcast bit to capture broadcast frames.
   1428   1.1      haya 	 */
   1429   1.1      haya 	if (ifp->if_flags & IFF_BROADCAST) {
   1430  1.10   tsutsui 		rxcfg |= RTK_RXCFG_RX_BROAD;
   1431  1.10   tsutsui 		CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
   1432   1.1      haya 	} else {
   1433  1.10   tsutsui 		rxcfg &= ~RTK_RXCFG_RX_BROAD;
   1434  1.10   tsutsui 		CSR_WRITE_4(sc, RTK_RXCFG, rxcfg);
   1435   1.1      haya 	}
   1436   1.1      haya 
   1437   1.1      haya 	/*
   1438   1.1      haya 	 * Program the multicast filter, if necessary.
   1439   1.1      haya 	 */
   1440   1.8   thorpej 	rtk_setmulti(sc);
   1441   1.1      haya 
   1442   1.1      haya 	/*
   1443   1.1      haya 	 * Enable interrupts.
   1444   1.1      haya 	 */
   1445  1.10   tsutsui 	CSR_WRITE_2(sc, RTK_IMR, RTK_INTRS);
   1446   1.1      haya 
   1447   1.1      haya 	/* Start RX/TX process. */
   1448  1.10   tsutsui 	CSR_WRITE_4(sc, RTK_MISSEDPKT, 0);
   1449   1.1      haya 
   1450   1.1      haya 	/* Enable receiver and transmitter. */
   1451  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_COMMAND, RTK_CMD_TX_ENB|RTK_CMD_RX_ENB);
   1452   1.1      haya 
   1453  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_CFG1, RTK_CFG1_DRVLOAD|RTK_CFG1_FULLDUPLEX);
   1454   1.1      haya 
   1455   1.1      haya 	/*
   1456   1.1      haya 	 * Set current media.
   1457   1.1      haya 	 */
   1458   1.1      haya 	mii_mediachg(&sc->mii);
   1459   1.1      haya 
   1460   1.1      haya 	ifp->if_flags |= IFF_RUNNING;
   1461   1.1      haya 	ifp->if_flags &= ~IFF_OACTIVE;
   1462   1.1      haya 
   1463  1.15   thorpej 	callout_reset(&sc->rtk_tick_ch, hz, rtk_tick, sc);
   1464   1.1      haya 
   1465  1.15   thorpej  out:
   1466  1.15   thorpej 	if (error) {
   1467  1.15   thorpej 		ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1468  1.15   thorpej 		ifp->if_timer = 0;
   1469  1.15   thorpej 		printf("%s: interface not running\n", sc->sc_dev.dv_xname);
   1470  1.15   thorpej 	}
   1471  1.15   thorpej 	return (error);
   1472   1.1      haya }
   1473   1.1      haya 
   1474   1.1      haya /*
   1475   1.1      haya  * Set media options.
   1476   1.1      haya  */
   1477   1.8   thorpej STATIC int rtk_ifmedia_upd(ifp)
   1478   1.1      haya 	struct ifnet		*ifp;
   1479   1.1      haya {
   1480  1.10   tsutsui 	struct rtk_softc	*sc;
   1481   1.1      haya 
   1482   1.1      haya 	sc = ifp->if_softc;
   1483   1.1      haya 
   1484   1.1      haya 	return (mii_mediachg(&sc->mii));
   1485   1.1      haya }
   1486   1.1      haya 
   1487   1.1      haya /*
   1488   1.1      haya  * Report current media status.
   1489   1.1      haya  */
   1490   1.8   thorpej STATIC void rtk_ifmedia_sts(ifp, ifmr)
   1491   1.1      haya 	struct ifnet		*ifp;
   1492   1.1      haya 	struct ifmediareq	*ifmr;
   1493   1.1      haya {
   1494  1.10   tsutsui 	struct rtk_softc	*sc;
   1495   1.1      haya 
   1496   1.1      haya 	sc = ifp->if_softc;
   1497   1.1      haya 
   1498   1.1      haya 	mii_pollstat(&sc->mii);
   1499   1.1      haya 	ifmr->ifm_status = sc->mii.mii_media_status;
   1500   1.1      haya 	ifmr->ifm_active = sc->mii.mii_media_active;
   1501   1.1      haya }
   1502   1.1      haya 
   1503   1.8   thorpej STATIC int rtk_ioctl(ifp, command, data)
   1504   1.1      haya 	struct ifnet		*ifp;
   1505   1.1      haya 	u_long			command;
   1506   1.1      haya 	caddr_t			data;
   1507   1.1      haya {
   1508  1.10   tsutsui 	struct rtk_softc	*sc = ifp->if_softc;
   1509   1.1      haya 	struct ifreq		*ifr = (struct ifreq *) data;
   1510   1.1      haya 	int			s, error = 0;
   1511   1.1      haya 
   1512   1.9   thorpej 	s = splnet();
   1513   1.1      haya 
   1514  1.12  drochner 	switch (command) {
   1515   1.1      haya 	case SIOCGIFMEDIA:
   1516   1.1      haya 	case SIOCSIFMEDIA:
   1517   1.1      haya 		error = ifmedia_ioctl(ifp, ifr, &sc->mii.mii_media, command);
   1518   1.1      haya 		break;
   1519  1.15   thorpej 
   1520   1.1      haya 	default:
   1521  1.15   thorpej 		error = ether_ioctl(ifp, command, data);
   1522  1.15   thorpej 		if (error == ENETRESET) {
   1523  1.15   thorpej 			if (RTK_IS_ENABLED(sc)) {
   1524  1.15   thorpej 				/*
   1525  1.15   thorpej 				 * Multicast list has changed.  Set the
   1526  1.15   thorpej 				 * hardware filter accordingly.
   1527  1.15   thorpej 				 */
   1528  1.15   thorpej 				rtk_setmulti(sc);
   1529  1.15   thorpej 			}
   1530  1.15   thorpej 			error = 0;
   1531  1.15   thorpej 		}
   1532   1.1      haya 		break;
   1533   1.1      haya 	}
   1534   1.1      haya 
   1535  1.12  drochner 	splx(s);
   1536   1.1      haya 
   1537  1.23   tsutsui 	return (error);
   1538   1.1      haya }
   1539   1.1      haya 
   1540   1.8   thorpej STATIC void rtk_watchdog(ifp)
   1541   1.1      haya 	struct ifnet		*ifp;
   1542   1.1      haya {
   1543  1.10   tsutsui 	struct rtk_softc	*sc;
   1544   1.1      haya 
   1545   1.1      haya 	sc = ifp->if_softc;
   1546   1.1      haya 
   1547   1.1      haya 	printf("%s: watchdog timeout\n", sc->sc_dev.dv_xname);
   1548   1.1      haya 	ifp->if_oerrors++;
   1549   1.8   thorpej 	rtk_txeof(sc);
   1550   1.8   thorpej 	rtk_rxeof(sc);
   1551  1.15   thorpej 	rtk_init(ifp);
   1552   1.1      haya }
   1553   1.1      haya 
   1554   1.1      haya /*
   1555   1.1      haya  * Stop the adapter and free any mbufs allocated to the
   1556   1.1      haya  * RX and TX lists.
   1557   1.1      haya  */
   1558  1.15   thorpej STATIC void rtk_stop(ifp, disable)
   1559  1.15   thorpej 	struct ifnet *ifp;
   1560  1.15   thorpej 	int disable;
   1561   1.1      haya {
   1562  1.15   thorpej 	struct rtk_softc *sc = ifp->if_softc;
   1563  1.31   thorpej 	struct rtk_tx_desc *txd;
   1564   1.1      haya 
   1565   1.8   thorpej 	callout_stop(&sc->rtk_tick_ch);
   1566   1.1      haya 
   1567   1.1      haya 	mii_down(&sc->mii);
   1568   1.1      haya 
   1569  1.10   tsutsui 	CSR_WRITE_1(sc, RTK_COMMAND, 0x00);
   1570  1.10   tsutsui 	CSR_WRITE_2(sc, RTK_IMR, 0x0000);
   1571   1.1      haya 
   1572   1.1      haya 	/*
   1573   1.1      haya 	 * Free the TX list buffers.
   1574   1.1      haya 	 */
   1575  1.31   thorpej 	while ((txd = SIMPLEQ_FIRST(&sc->rtk_tx_dirty)) != NULL) {
   1576  1.31   thorpej 		SIMPLEQ_REMOVE_HEAD(&sc->rtk_tx_dirty, txd, txd_q);
   1577  1.31   thorpej 		bus_dmamap_unload(sc->sc_dmat, txd->txd_dmamap);
   1578  1.31   thorpej 		m_freem(txd->txd_mbuf);
   1579  1.31   thorpej 		txd->txd_mbuf = NULL;
   1580  1.31   thorpej 		CSR_WRITE_4(sc, txd->txd_txaddr, 0);
   1581   1.1      haya 	}
   1582   1.1      haya 
   1583  1.15   thorpej 	if (disable)
   1584  1.15   thorpej 		rtk_disable(sc);
   1585  1.15   thorpej 
   1586   1.1      haya 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1587  1.15   thorpej 	ifp->if_timer = 0;
   1588   1.1      haya }
   1589   1.1      haya 
   1590   1.1      haya /*
   1591   1.1      haya  * Stop all chip I/O so that the kernel's probe routines don't
   1592   1.1      haya  * get confused by errant DMAs when rebooting.
   1593   1.1      haya  */
   1594   1.8   thorpej STATIC void rtk_shutdown(vsc)
   1595   1.1      haya 	void			*vsc;
   1596   1.1      haya {
   1597  1.10   tsutsui 	struct rtk_softc	*sc = (struct rtk_softc *)vsc;
   1598   1.1      haya 
   1599  1.15   thorpej 	rtk_stop(&sc->ethercom.ec_if, 0);
   1600   1.1      haya }
   1601   1.1      haya 
   1602   1.1      haya STATIC void
   1603   1.8   thorpej rtk_tick(arg)
   1604   1.1      haya 	void *arg;
   1605   1.1      haya {
   1606   1.8   thorpej 	struct rtk_softc *sc = arg;
   1607   1.1      haya 	int s = splnet();
   1608   1.1      haya 
   1609   1.1      haya 	mii_tick(&sc->mii);
   1610   1.1      haya 	splx(s);
   1611   1.1      haya 
   1612   1.8   thorpej 	callout_reset(&sc->rtk_tick_ch, hz, rtk_tick, sc);
   1613   1.1      haya }
   1614