rtl81x9var.h revision 1.10.20.5
1 /* $NetBSD: rtl81x9var.h,v 1.10.20.5 2005/01/24 08:35:19 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998 5 * Bill Paul <wpaul (at) ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * FreeBSD Id: if_rlreg.h,v 1.9 1999/06/20 18:56:09 wpaul Exp 35 */ 36 37 #include "rnd.h" 38 39 #if NRND > 0 40 #include <sys/rnd.h> 41 #endif 42 43 #define RTK_ETHER_ALIGN 2 44 #define RTK_RXSTAT_LEN 4 45 46 struct rtk_type { 47 u_int16_t rtk_vid; 48 u_int16_t rtk_did; 49 int rtk_basetype; 50 const char *rtk_name; 51 }; 52 53 struct rtk_hwrev { 54 uint32_t rtk_rev; 55 int rtk_type; 56 char *rtk_desc; 57 }; 58 59 struct rtk_mii_frame { 60 u_int8_t mii_stdelim; 61 u_int8_t mii_opcode; 62 u_int8_t mii_phyaddr; 63 u_int8_t mii_regaddr; 64 u_int8_t mii_turnaround; 65 u_int16_t mii_data; 66 }; 67 68 /* 69 * MII constants 70 */ 71 #define RTK_MII_STARTDELIM 0x01 72 #define RTK_MII_READOP 0x02 73 #define RTK_MII_WRITEOP 0x01 74 #define RTK_MII_TURNAROUND 0x02 75 76 #define RTK_8129 1 77 #define RTK_8139 2 78 #define RTK_8139CPLUS 3 79 #define RTK_8169 4 80 81 #define RTK_ISCPLUS(x) ((x)->rtk_type == RTK_8139CPLUS || \ 82 (x)->rtk_type == RTK_8169) 83 84 /* 85 * The 8139C+ and 8160 gigE chips support descriptor-based TX 86 * and RX. In fact, they even support TCP large send. Descriptors 87 * must be allocated in contiguous blocks that are aligned on a 88 * 256-byte boundary. The rings can hold a maximum of 64 descriptors. 89 */ 90 91 struct rtk_list_data { 92 struct mbuf *rtk_tx_mbuf[RTK_TX_DESC_CNT]; 93 struct mbuf *rtk_rx_mbuf[RTK_RX_DESC_CNT]; 94 int rtk_tx_prodidx; 95 int rtk_rx_prodidx; 96 int rtk_tx_considx; 97 int rtk_tx_free; 98 bus_dmamap_t rtk_tx_dmamap[RTK_TX_DESC_CNT]; 99 bus_dmamap_t rtk_rx_dmamap[RTK_RX_DESC_CNT]; 100 bus_dmamap_t rtk_rx_list_map; 101 struct rtk_desc *rtk_rx_list; 102 bus_dma_segment_t rtk_rx_listseg; 103 int rtk_rx_listnseg; 104 bus_dmamap_t rtk_tx_list_map; 105 struct rtk_desc *rtk_tx_list; 106 bus_dma_segment_t rtk_tx_listseg; 107 int rtk_tx_listnseg; 108 }; 109 struct rtk_tx_desc { 110 SIMPLEQ_ENTRY(rtk_tx_desc) txd_q; 111 struct mbuf *txd_mbuf; 112 bus_dmamap_t txd_dmamap; 113 bus_addr_t txd_txaddr; 114 bus_addr_t txd_txstat; 115 }; 116 117 struct rtk_softc { 118 struct device sc_dev; /* generic device structures */ 119 struct ethercom ethercom; /* interface info */ 120 struct mii_data mii; 121 struct callout rtk_tick_ch; /* tick callout */ 122 bus_space_handle_t rtk_bhandle; /* bus space handle */ 123 bus_space_tag_t rtk_btag; /* bus space tag */ 124 int rtk_type; 125 bus_dma_tag_t sc_dmat; 126 bus_dma_segment_t sc_dmaseg; 127 int sc_dmanseg; 128 129 bus_dmamap_t recv_dmamap; 130 caddr_t rtk_rx_buf; 131 132 struct rtk_tx_desc rtk_tx_descs[RTK_TX_LIST_CNT]; 133 SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_free; 134 SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_dirty; 135 struct rtk_list_data rtk_ldata; 136 struct mbuf *rtk_head; 137 struct mbuf *rtk_tail; 138 u_int32_t rtk_rxlenmask; 139 int rtk_testmode; 140 141 int sc_flags; /* misc flags */ 142 int sc_txthresh; /* Early tx threshold */ 143 int sc_rev; /* revision within rtk_type */ 144 145 void *sc_sdhook; /* shutdown hook */ 146 void *sc_powerhook; /* power management hook */ 147 148 /* Power management hooks. */ 149 int (*sc_enable) __P((struct rtk_softc *)); 150 void (*sc_disable) __P((struct rtk_softc *)); 151 void (*sc_power) __P((struct rtk_softc *, int)); 152 #if NRND > 0 153 rndsource_element_t rnd_source; 154 #endif 155 }; 156 157 #define RTK_ATTACHED 0x00000001 /* attach has succeeded */ 158 #define RTK_ENABLED 0x00000002 /* chip is enabled */ 159 160 #define RTK_IS_ENABLED(sc) ((sc)->sc_flags & RTK_ENABLED) 161 #define RTK_TX_THRESH(sc) (((sc)->sc_txthresh << 16) & 0x003F0000) 162 163 #define TXTH_256 8 164 #define TXTH_MAX 48 165 166 /* 167 * register space access macros 168 */ 169 #define CSR_WRITE_4(sc, reg, val) \ 170 bus_space_write_4(sc->rtk_btag, sc->rtk_bhandle, reg, val) 171 #define CSR_WRITE_2(sc, reg, val) \ 172 bus_space_write_2(sc->rtk_btag, sc->rtk_bhandle, reg, val) 173 #define CSR_WRITE_1(sc, reg, val) \ 174 bus_space_write_1(sc->rtk_btag, sc->rtk_bhandle, reg, val) 175 #define CSR_WRITE_STREAM_4(sc, reg, val) \ 176 bus_space_write_stream_4(sc->rtk_btag, sc->rtk_bhandle, reg, val) 177 178 179 #define CSR_READ_4(sc, reg) \ 180 bus_space_read_4(sc->rtk_btag, sc->rtk_bhandle, reg) 181 #define CSR_READ_2(sc, reg) \ 182 bus_space_read_2(sc->rtk_btag, sc->rtk_bhandle, reg) 183 #define CSR_READ_1(sc, reg) \ 184 bus_space_read_1(sc->rtk_btag, sc->rtk_bhandle, reg) 185 186 #define RTK_TIMEOUT 1000 187 188 /* 189 * PCI low memory base and low I/O base register, and 190 * other PCI registers. 191 */ 192 193 #define RTK_PCI_LOIO 0x10 194 #define RTK_PCI_LOMEM 0x14 195 196 #define RTK_PSTATE_MASK 0x0003 197 #define RTK_PSTATE_D0 0x0000 198 #define RTK_PSTATE_D1 0x0002 199 #define RTK_PSTATE_D2 0x0002 200 #define RTK_PSTATE_D3 0x0003 201 #define RTK_PME_EN 0x0010 202 #define RTK_PME_STATUS 0x8000 203 204 #ifdef _KERNEL 205 u_int16_t rtk_read_eeprom __P((struct rtk_softc *, int, int)); 206 void rtk_setmulti __P((struct rtk_softc *)); 207 void rtk_attach __P((struct rtk_softc *)); 208 int rtk_detach __P((struct rtk_softc *)); 209 int rtk_activate __P((struct device *, enum devact)); 210 int rtk_intr __P((void *)); 211 #endif /* _KERNEL */ 212
Indexes created Sat Oct 18 21:09:54 GMT 2025