rtl81x9var.h revision 1.31
1 /* $NetBSD: rtl81x9var.h,v 1.31 2006/11/05 15:49:41 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1998 5 * Bill Paul <wpaul (at) ctr.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * FreeBSD Id: if_rlreg.h,v 1.9 1999/06/20 18:56:09 wpaul Exp 35 */ 36 37 #include "rnd.h" 38 39 #if NRND > 0 40 #include <sys/rnd.h> 41 #endif 42 43 #ifdef __NO_STRICT_ALIGNMENT 44 #define RTK_ETHER_ALIGN 0 45 #else 46 #define RTK_ETHER_ALIGN 2 47 #endif 48 #define RTK_RXSTAT_LEN 4 49 50 struct rtk_type { 51 uint16_t rtk_vid; 52 uint16_t rtk_did; 53 int rtk_basetype; 54 const char *rtk_name; 55 }; 56 57 struct rtk_hwrev { 58 uint32_t rtk_rev; 59 int rtk_type; 60 const char *rtk_desc; 61 }; 62 63 #define RTK_8129 1 64 #define RTK_8139 2 65 #define RTK_8139CPLUS 3 66 #define RTK_8169 4 67 68 #define RTK_ISCPLUS(x) ((x)->rtk_type == RTK_8139CPLUS || \ 69 (x)->rtk_type == RTK_8169) 70 71 72 struct rtk_mii_frame { 73 uint8_t mii_stdelim; 74 uint8_t mii_opcode; 75 uint8_t mii_phyaddr; 76 uint8_t mii_regaddr; 77 uint8_t mii_turnaround; 78 uint16_t mii_data; 79 }; 80 81 /* 82 * MII constants 83 */ 84 #define RTK_MII_STARTDELIM 0x01 85 #define RTK_MII_READOP 0x02 86 #define RTK_MII_WRITEOP 0x01 87 #define RTK_MII_TURNAROUND 0x02 88 89 90 /* 91 * The RealTek doesn't use a fragment-based descriptor mechanism. 92 * Instead, there are only four register sets, each or which represents 93 * one 'descriptor.' Basically, each TX descriptor is just a contiguous 94 * packet buffer (32-bit aligned!) and we place the buffer addresses in 95 * the registers so the chip knows where they are. 96 * 97 * We can sort of kludge together the same kind of buffer management 98 * used in previous drivers, but we have to do buffer copies almost all 99 * the time, so it doesn't really buy us much. 100 * 101 * For reception, there's just one large buffer where the chip stores 102 * all received packets. 103 */ 104 105 #ifdef dreamcast 106 #define RTK_RX_BUF_SZ RTK_RXBUF_16 107 #else 108 #define RTK_RX_BUF_SZ RTK_RXBUF_64 109 #endif 110 #define RTK_RXBUFLEN RTK_RXBUF_LEN(RTK_RX_BUF_SZ) 111 #define RTK_TX_LIST_CNT 4 112 113 /* 114 * The 8139C+ and 8169 gigE chips support descriptor-based TX 115 * and RX. In fact, they even support TCP large send. Descriptors 116 * must be allocated in contiguous blocks that are aligned on a 117 * 256-byte boundary. The RX rings can hold a maximum of 64 descriptors. 118 * The TX rings can hold upto 64 descriptors on 8139C+, and 119 * 1024 descriptors on 8169 gigE chips. 120 */ 121 #define RTK_RING_ALIGN 256 122 123 #define RTK_RX_DESC_CNT 64 124 #define RTK_TX_DESC_CNT_8139 64 125 #define RTK_TX_DESC_CNT_8169 1024 126 #define RTK_TX_QLEN 64 127 128 struct rtk_rxsoft { 129 struct mbuf *rxs_mbuf; 130 bus_dmamap_t rxs_dmamap; 131 }; 132 133 struct rtk_list_data { 134 struct rtk_txq { 135 struct mbuf *txq_mbuf; 136 bus_dmamap_t txq_dmamap; 137 int txq_descidx; 138 } rtk_txq[RTK_TX_QLEN]; 139 int rtk_txq_considx; 140 int rtk_txq_prodidx; 141 bus_dmamap_t rtk_tx_list_map; 142 struct rtk_desc *rtk_tx_list; 143 bus_dma_segment_t rtk_tx_listseg; 144 int rtk_tx_free; /* # of free descriptors */ 145 int rtk_tx_nextfree; /* next descriptor to use */ 146 int rtk_tx_desc_cnt; /* # of descriptors */ 147 int rtk_tx_listnseg; 148 149 struct rtk_rxsoft rtk_rxsoft[RTK_RX_DESC_CNT]; 150 bus_dmamap_t rtk_rx_list_map; 151 struct rtk_desc *rtk_rx_list; 152 bus_dma_segment_t rtk_rx_listseg; 153 int rtk_rx_prodidx; 154 int rtk_rx_listnseg; 155 }; 156 struct rtk_tx_desc { 157 SIMPLEQ_ENTRY(rtk_tx_desc) txd_q; 158 struct mbuf *txd_mbuf; 159 bus_dmamap_t txd_dmamap; 160 bus_addr_t txd_txaddr; 161 bus_addr_t txd_txstat; 162 }; 163 164 struct rtk_softc { 165 struct device sc_dev; /* generic device structures */ 166 struct ethercom ethercom; /* interface info */ 167 struct mii_data mii; 168 struct callout rtk_tick_ch; /* tick callout */ 169 bus_space_handle_t rtk_bhandle; /* bus space handle */ 170 bus_space_tag_t rtk_btag; /* bus space tag */ 171 int rtk_type; 172 bus_dma_tag_t sc_dmat; 173 bus_dma_segment_t sc_dmaseg; 174 int sc_dmanseg; 175 176 bus_dmamap_t recv_dmamap; 177 caddr_t rtk_rx_buf; 178 179 struct rtk_tx_desc rtk_tx_descs[RTK_TX_LIST_CNT]; 180 SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_free; 181 SIMPLEQ_HEAD(, rtk_tx_desc) rtk_tx_dirty; 182 struct rtk_list_data rtk_ldata; 183 struct mbuf *rtk_head; 184 struct mbuf *rtk_tail; 185 uint32_t rtk_rxlenmask; 186 int rtk_testmode; 187 188 int sc_flags; /* misc flags */ 189 int sc_txthresh; /* Early tx threshold */ 190 int sc_rev; /* revision within rtk_type */ 191 192 void *sc_sdhook; /* shutdown hook */ 193 void *sc_powerhook; /* power management hook */ 194 195 /* Power management hooks. */ 196 int (*sc_enable) (struct rtk_softc *); 197 void (*sc_disable) (struct rtk_softc *); 198 void (*sc_power) (struct rtk_softc *, int); 199 #if NRND > 0 200 rndsource_element_t rnd_source; 201 #endif 202 }; 203 204 #define RTK_TX_DESC_CNT(sc) ((sc)->rtk_ldata.rtk_tx_desc_cnt) 205 #define RTK_TX_LIST_SZ(sc) (RTK_TX_DESC_CNT(sc) * sizeof(struct rtk_desc)) 206 #define RTK_NEXT_TX_DESC(sc, x) (((x) + 1) % RTK_TX_DESC_CNT(sc)) 207 208 #define RTK_RX_LIST_SZ (RTK_RX_DESC_CNT * sizeof(struct rtk_desc)) 209 #define RTK_NEXT_RX_DESC(sc, x) (((x) + 1) % RTK_RX_DESC_CNT) 210 211 #define RTK_NEXT_TXQ(sc, x) (((x) + 1) % RTK_TX_QLEN) 212 213 #define RTK_TXDESCSYNC(sc, idx, ops) \ 214 bus_dmamap_sync((sc)->sc_dmat, \ 215 (sc)->rtk_ldata.rtk_tx_list_map, \ 216 sizeof(struct rtk_desc) * (idx), \ 217 sizeof(struct rtk_desc), \ 218 (ops)) 219 #define RTK_RXDESCSYNC(sc, idx, ops) \ 220 bus_dmamap_sync((sc)->sc_dmat, \ 221 (sc)->rtk_ldata.rtk_rx_list_map, \ 222 sizeof(struct rtk_desc) * (idx), \ 223 sizeof(struct rtk_desc), \ 224 (ops)) 225 226 #define RTK_ATTACHED 0x00000001 /* attach has succeeded */ 227 #define RTK_ENABLED 0x00000002 /* chip is enabled */ 228 229 #define RTK_IS_ENABLED(sc) ((sc)->sc_flags & RTK_ENABLED) 230 231 #define RTK_TXTH_MAX RTK_TXTH_1536 232 233 /* 234 * register space access macros 235 */ 236 #define CSR_WRITE_4(sc, reg, val) \ 237 bus_space_write_4(sc->rtk_btag, sc->rtk_bhandle, reg, val) 238 #define CSR_WRITE_2(sc, reg, val) \ 239 bus_space_write_2(sc->rtk_btag, sc->rtk_bhandle, reg, val) 240 #define CSR_WRITE_1(sc, reg, val) \ 241 bus_space_write_1(sc->rtk_btag, sc->rtk_bhandle, reg, val) 242 243 #define CSR_READ_4(sc, reg) \ 244 bus_space_read_4(sc->rtk_btag, sc->rtk_bhandle, reg) 245 #define CSR_READ_2(sc, reg) \ 246 bus_space_read_2(sc->rtk_btag, sc->rtk_bhandle, reg) 247 #define CSR_READ_1(sc, reg) \ 248 bus_space_read_1(sc->rtk_btag, sc->rtk_bhandle, reg) 249 250 #define RTK_TIMEOUT 1000 251 252 /* 253 * PCI low memory base and low I/O base registers 254 */ 255 256 #define RTK_PCI_LOIO 0x10 257 #define RTK_PCI_LOMEM 0x14 258 259 #ifdef _KERNEL 260 uint16_t rtk_read_eeprom(struct rtk_softc *, int, int); 261 void rtk_setmulti(struct rtk_softc *); 262 void rtk_attach(struct rtk_softc *); 263 int rtk_detach(struct rtk_softc *); 264 int rtk_activate(struct device *, enum devact); 265 int rtk_intr(void *); 266 #endif /* _KERNEL */ 267
Indexes created Sun Sep 28 12:09:53 GMT 2025