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rtw.c revision 1.1.2.5
      1  1.1.2.5  skrll /* $NetBSD: rtw.c,v 1.1.2.5 2005/01/17 19:30:40 skrll Exp $ */
      2  1.1.2.2  skrll /*-
      3  1.1.2.2  skrll  * Copyright (c) 2004, 2005 David Young.  All rights reserved.
      4  1.1.2.2  skrll  *
      5  1.1.2.2  skrll  * Programmed for NetBSD by David Young.
      6  1.1.2.2  skrll  *
      7  1.1.2.2  skrll  * Redistribution and use in source and binary forms, with or without
      8  1.1.2.2  skrll  * modification, are permitted provided that the following conditions
      9  1.1.2.2  skrll  * are met:
     10  1.1.2.2  skrll  * 1. Redistributions of source code must retain the above copyright
     11  1.1.2.2  skrll  *    notice, this list of conditions and the following disclaimer.
     12  1.1.2.2  skrll  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.1.2.2  skrll  *    notice, this list of conditions and the following disclaimer in the
     14  1.1.2.2  skrll  *    documentation and/or other materials provided with the distribution.
     15  1.1.2.2  skrll  * 3. The name of David Young may not be used to endorse or promote
     16  1.1.2.2  skrll  *    products derived from this software without specific prior
     17  1.1.2.2  skrll  *    written permission.
     18  1.1.2.2  skrll  *
     19  1.1.2.2  skrll  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
     20  1.1.2.2  skrll  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     21  1.1.2.2  skrll  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
     22  1.1.2.2  skrll  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
     23  1.1.2.2  skrll  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     24  1.1.2.2  skrll  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
     25  1.1.2.2  skrll  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  1.1.2.2  skrll  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     27  1.1.2.2  skrll  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     28  1.1.2.2  skrll  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     29  1.1.2.2  skrll  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
     30  1.1.2.2  skrll  * OF SUCH DAMAGE.
     31  1.1.2.2  skrll  */
     32  1.1.2.2  skrll /*
     33  1.1.2.2  skrll  * Device driver for the Realtek RTL8180 802.11 MAC/BBP.
     34  1.1.2.2  skrll  */
     35  1.1.2.2  skrll 
     36  1.1.2.2  skrll #include <sys/cdefs.h>
     37  1.1.2.5  skrll __KERNEL_RCSID(0, "$NetBSD: rtw.c,v 1.1.2.5 2005/01/17 19:30:40 skrll Exp $");
     38  1.1.2.2  skrll 
     39  1.1.2.2  skrll #include "bpfilter.h"
     40  1.1.2.2  skrll 
     41  1.1.2.2  skrll #include <sys/param.h>
     42  1.1.2.4  skrll #include <sys/sysctl.h>
     43  1.1.2.2  skrll #include <sys/systm.h>
     44  1.1.2.2  skrll #include <sys/callout.h>
     45  1.1.2.2  skrll #include <sys/mbuf.h>
     46  1.1.2.2  skrll #include <sys/malloc.h>
     47  1.1.2.2  skrll #include <sys/kernel.h>
     48  1.1.2.2  skrll #include <sys/time.h>
     49  1.1.2.2  skrll #include <sys/types.h>
     50  1.1.2.2  skrll 
     51  1.1.2.2  skrll #include <machine/endian.h>
     52  1.1.2.2  skrll #include <machine/bus.h>
     53  1.1.2.2  skrll #include <machine/intr.h>	/* splnet */
     54  1.1.2.2  skrll 
     55  1.1.2.2  skrll #include <uvm/uvm_extern.h>
     56  1.1.2.2  skrll 
     57  1.1.2.2  skrll #include <net/if.h>
     58  1.1.2.2  skrll #include <net/if_media.h>
     59  1.1.2.2  skrll #include <net/if_ether.h>
     60  1.1.2.2  skrll 
     61  1.1.2.2  skrll #include <net80211/ieee80211_var.h>
     62  1.1.2.2  skrll #include <net80211/ieee80211_compat.h>
     63  1.1.2.2  skrll #include <net80211/ieee80211_radiotap.h>
     64  1.1.2.2  skrll 
     65  1.1.2.2  skrll #if NBPFILTER > 0
     66  1.1.2.2  skrll #include <net/bpf.h>
     67  1.1.2.2  skrll #endif
     68  1.1.2.2  skrll 
     69  1.1.2.2  skrll #include <dev/ic/rtwreg.h>
     70  1.1.2.2  skrll #include <dev/ic/rtwvar.h>
     71  1.1.2.2  skrll #include <dev/ic/rtwphyio.h>
     72  1.1.2.2  skrll #include <dev/ic/rtwphy.h>
     73  1.1.2.2  skrll 
     74  1.1.2.2  skrll #include <dev/ic/smc93cx6var.h>
     75  1.1.2.2  skrll 
     76  1.1.2.2  skrll #define	KASSERT2(__cond, __msg)		\
     77  1.1.2.2  skrll 	do {				\
     78  1.1.2.2  skrll 		if (!(__cond))		\
     79  1.1.2.2  skrll 			panic __msg ;	\
     80  1.1.2.2  skrll 	} while (0)
     81  1.1.2.2  skrll 
     82  1.1.2.4  skrll int rtw_rfprog_fallback = 0;
     83  1.1.2.4  skrll int rtw_host_rfio = 0;
     84  1.1.2.4  skrll 
     85  1.1.2.2  skrll #ifdef RTW_DEBUG
     86  1.1.2.5  skrll int rtw_debug = 0;
     87  1.1.2.5  skrll int rtw_rxbufs_limit = RTW_RXQLEN;
     88  1.1.2.2  skrll #endif /* RTW_DEBUG */
     89  1.1.2.2  skrll 
     90  1.1.2.5  skrll #define NEXT_ATTACH_STATE(sc, state) do {			\
     91  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_ATTACH,				\
     92  1.1.2.5  skrll 	    ("%s: attach state %s\n", __func__, #state));	\
     93  1.1.2.5  skrll 	sc->sc_attach_state = state;				\
     94  1.1.2.2  skrll } while (0)
     95  1.1.2.2  skrll 
     96  1.1.2.5  skrll int rtw_dwelltime = 200;	/* milliseconds */
     97  1.1.2.5  skrll 
     98  1.1.2.5  skrll static void rtw_start(struct ifnet *);
     99  1.1.2.5  skrll 
    100  1.1.2.5  skrll static void rtw_led_attach(struct rtw_softc *);
    101  1.1.2.5  skrll static void rtw_led_init(struct rtw_regs *);
    102  1.1.2.5  skrll static void rtw_led_slowblink(void *);
    103  1.1.2.5  skrll static void rtw_led_fastblink(void *);
    104  1.1.2.5  skrll static void rtw_led_set(struct rtw_led_state *, struct rtw_regs *, int);
    105  1.1.2.2  skrll 
    106  1.1.2.4  skrll static int rtw_sysctl_verify_rfio(SYSCTLFN_PROTO);
    107  1.1.2.4  skrll static int rtw_sysctl_verify_rfprog(SYSCTLFN_PROTO);
    108  1.1.2.2  skrll #ifdef RTW_DEBUG
    109  1.1.2.5  skrll static void rtw_print_txdesc(struct rtw_softc *, const char *,
    110  1.1.2.5  skrll     struct rtw_txsoft *, struct rtw_txdesc_blk *, int);
    111  1.1.2.4  skrll static int rtw_sysctl_verify_debug(SYSCTLFN_PROTO);
    112  1.1.2.5  skrll static int rtw_sysctl_verify_rxbufs_limit(SYSCTLFN_PROTO);
    113  1.1.2.4  skrll #endif /* RTW_DEBUG */
    114  1.1.2.4  skrll 
    115  1.1.2.4  skrll /*
    116  1.1.2.4  skrll  * Setup sysctl(3) MIB, hw.rtw.*
    117  1.1.2.4  skrll  *
    118  1.1.2.4  skrll  * TBD condition CTLFLAG_PERMANENT on being an LKM or not
    119  1.1.2.4  skrll  */
    120  1.1.2.4  skrll SYSCTL_SETUP(sysctl_rtw, "sysctl rtw(4) subtree setup")
    121  1.1.2.4  skrll {
    122  1.1.2.4  skrll 	int rc;
    123  1.1.2.4  skrll 	struct sysctlnode *cnode, *rnode;
    124  1.1.2.4  skrll 
    125  1.1.2.4  skrll 	if ((rc = sysctl_createv(clog, 0, NULL, &rnode,
    126  1.1.2.4  skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
    127  1.1.2.4  skrll 	    NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0)
    128  1.1.2.4  skrll 		goto err;
    129  1.1.2.4  skrll 
    130  1.1.2.4  skrll 	if ((rc = sysctl_createv(clog, 0, &rnode, &rnode,
    131  1.1.2.4  skrll 	    CTLFLAG_PERMANENT, CTLTYPE_NODE, "rtw",
    132  1.1.2.4  skrll 	    "Realtek RTL818x 802.11 controls",
    133  1.1.2.4  skrll 	    NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL)) != 0)
    134  1.1.2.4  skrll 		goto err;
    135  1.1.2.4  skrll 
    136  1.1.2.4  skrll #ifdef RTW_DEBUG
    137  1.1.2.4  skrll 	/* control debugging printfs */
    138  1.1.2.4  skrll 	if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
    139  1.1.2.4  skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    140  1.1.2.4  skrll 	    "debug", SYSCTL_DESCR("Enable RTL818x debugging output"),
    141  1.1.2.4  skrll 	    rtw_sysctl_verify_debug, 0, &rtw_debug, 0,
    142  1.1.2.4  skrll 	    CTL_CREATE, CTL_EOL)) != 0)
    143  1.1.2.4  skrll 		goto err;
    144  1.1.2.5  skrll 
    145  1.1.2.5  skrll 	/* Limit rx buffers, for simulating resource exhaustion. */
    146  1.1.2.4  skrll 	if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
    147  1.1.2.4  skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    148  1.1.2.5  skrll 	    "rxbufs_limit",
    149  1.1.2.5  skrll 	    SYSCTL_DESCR("Set rx buffers limit"),
    150  1.1.2.5  skrll 	    rtw_sysctl_verify_rxbufs_limit, 0, &rtw_rxbufs_limit, 0,
    151  1.1.2.4  skrll 	    CTL_CREATE, CTL_EOL)) != 0)
    152  1.1.2.4  skrll 		goto err;
    153  1.1.2.4  skrll 
    154  1.1.2.5  skrll #endif /* RTW_DEBUG */
    155  1.1.2.5  skrll 	/* set fallback RF programming method */
    156  1.1.2.4  skrll 	if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
    157  1.1.2.4  skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    158  1.1.2.5  skrll 	    "rfprog_fallback",
    159  1.1.2.5  skrll 	    SYSCTL_DESCR("Set fallback RF programming method"),
    160  1.1.2.5  skrll 	    rtw_sysctl_verify_rfprog, 0, &rtw_rfprog_fallback, 0,
    161  1.1.2.4  skrll 	    CTL_CREATE, CTL_EOL)) != 0)
    162  1.1.2.4  skrll 		goto err;
    163  1.1.2.4  skrll 
    164  1.1.2.4  skrll 	/* force host to control RF I/O bus */
    165  1.1.2.4  skrll 	if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
    166  1.1.2.4  skrll 	    CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
    167  1.1.2.4  skrll 	    "host_rfio", SYSCTL_DESCR("Enable host control of RF I/O"),
    168  1.1.2.4  skrll 	    rtw_sysctl_verify_rfio, 0, &rtw_host_rfio, 0,
    169  1.1.2.4  skrll 	    CTL_CREATE, CTL_EOL)) != 0)
    170  1.1.2.4  skrll 		goto err;
    171  1.1.2.4  skrll 
    172  1.1.2.4  skrll 	return;
    173  1.1.2.4  skrll err:
    174  1.1.2.4  skrll 	printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
    175  1.1.2.4  skrll }
    176  1.1.2.4  skrll 
    177  1.1.2.4  skrll static int
    178  1.1.2.4  skrll rtw_sysctl_verify(SYSCTLFN_ARGS, int lower, int upper)
    179  1.1.2.4  skrll {
    180  1.1.2.4  skrll 	int error, t;
    181  1.1.2.4  skrll 	struct sysctlnode node;
    182  1.1.2.4  skrll 
    183  1.1.2.4  skrll 	node = *rnode;
    184  1.1.2.4  skrll 	t = *(int*)rnode->sysctl_data;
    185  1.1.2.4  skrll 	node.sysctl_data = &t;
    186  1.1.2.4  skrll 	error = sysctl_lookup(SYSCTLFN_CALL(&node));
    187  1.1.2.4  skrll 	if (error || newp == NULL)
    188  1.1.2.4  skrll 		return (error);
    189  1.1.2.4  skrll 
    190  1.1.2.4  skrll 	if (t < lower || t > upper)
    191  1.1.2.4  skrll 		return (EINVAL);
    192  1.1.2.4  skrll 
    193  1.1.2.4  skrll 	*(int*)rnode->sysctl_data = t;
    194  1.1.2.4  skrll 
    195  1.1.2.4  skrll 	return (0);
    196  1.1.2.4  skrll }
    197  1.1.2.4  skrll 
    198  1.1.2.4  skrll static int
    199  1.1.2.4  skrll rtw_sysctl_verify_rfprog(SYSCTLFN_ARGS)
    200  1.1.2.4  skrll {
    201  1.1.2.4  skrll 	return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0,
    202  1.1.2.4  skrll 	    MASK_AND_RSHIFT(RTW_CONFIG4_RFTYPE_MASK, RTW_CONFIG4_RFTYPE_MASK));
    203  1.1.2.4  skrll }
    204  1.1.2.4  skrll 
    205  1.1.2.4  skrll static int
    206  1.1.2.4  skrll rtw_sysctl_verify_rfio(SYSCTLFN_ARGS)
    207  1.1.2.4  skrll {
    208  1.1.2.4  skrll 	return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0, 1);
    209  1.1.2.4  skrll }
    210  1.1.2.4  skrll 
    211  1.1.2.4  skrll #ifdef RTW_DEBUG
    212  1.1.2.4  skrll static int
    213  1.1.2.4  skrll rtw_sysctl_verify_debug(SYSCTLFN_ARGS)
    214  1.1.2.4  skrll {
    215  1.1.2.5  skrll 	return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0, RTW_DEBUG_MAX);
    216  1.1.2.5  skrll }
    217  1.1.2.5  skrll 
    218  1.1.2.5  skrll static int
    219  1.1.2.5  skrll rtw_sysctl_verify_rxbufs_limit(SYSCTLFN_ARGS)
    220  1.1.2.5  skrll {
    221  1.1.2.5  skrll 	return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0, RTW_RXQLEN);
    222  1.1.2.4  skrll }
    223  1.1.2.4  skrll 
    224  1.1.2.2  skrll static void
    225  1.1.2.2  skrll rtw_print_regs(struct rtw_regs *regs, const char *dvname, const char *where)
    226  1.1.2.2  skrll {
    227  1.1.2.5  skrll #define PRINTREG32(sc, reg)				\
    228  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_REGDUMP,			\
    229  1.1.2.5  skrll 	    ("%s: reg[ " #reg " / %03x ] = %08x\n",	\
    230  1.1.2.2  skrll 	    dvname, reg, RTW_READ(regs, reg)))
    231  1.1.2.2  skrll 
    232  1.1.2.5  skrll #define PRINTREG16(sc, reg)				\
    233  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_REGDUMP,			\
    234  1.1.2.5  skrll 	    ("%s: reg[ " #reg " / %03x ] = %04x\n",	\
    235  1.1.2.2  skrll 	    dvname, reg, RTW_READ16(regs, reg)))
    236  1.1.2.2  skrll 
    237  1.1.2.5  skrll #define PRINTREG8(sc, reg)				\
    238  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_REGDUMP,			\
    239  1.1.2.5  skrll 	    ("%s: reg[ " #reg " / %03x ] = %02x\n",	\
    240  1.1.2.2  skrll 	    dvname, reg, RTW_READ8(regs, reg)))
    241  1.1.2.2  skrll 
    242  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_REGDUMP, ("%s: %s\n", dvname, where));
    243  1.1.2.2  skrll 
    244  1.1.2.2  skrll 	PRINTREG32(regs, RTW_IDR0);
    245  1.1.2.2  skrll 	PRINTREG32(regs, RTW_IDR1);
    246  1.1.2.2  skrll 	PRINTREG32(regs, RTW_MAR0);
    247  1.1.2.2  skrll 	PRINTREG32(regs, RTW_MAR1);
    248  1.1.2.2  skrll 	PRINTREG32(regs, RTW_TSFTRL);
    249  1.1.2.2  skrll 	PRINTREG32(regs, RTW_TSFTRH);
    250  1.1.2.2  skrll 	PRINTREG32(regs, RTW_TLPDA);
    251  1.1.2.2  skrll 	PRINTREG32(regs, RTW_TNPDA);
    252  1.1.2.2  skrll 	PRINTREG32(regs, RTW_THPDA);
    253  1.1.2.2  skrll 	PRINTREG32(regs, RTW_TCR);
    254  1.1.2.2  skrll 	PRINTREG32(regs, RTW_RCR);
    255  1.1.2.2  skrll 	PRINTREG32(regs, RTW_TINT);
    256  1.1.2.2  skrll 	PRINTREG32(regs, RTW_TBDA);
    257  1.1.2.2  skrll 	PRINTREG32(regs, RTW_ANAPARM);
    258  1.1.2.2  skrll 	PRINTREG32(regs, RTW_BB);
    259  1.1.2.2  skrll 	PRINTREG32(regs, RTW_PHYCFG);
    260  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP0L);
    261  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP0H);
    262  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP1L);
    263  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP1H);
    264  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP2LL);
    265  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP2LH);
    266  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP2HL);
    267  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP2HH);
    268  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP3LL);
    269  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP3LH);
    270  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP3HL);
    271  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP3HH);
    272  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP4LL);
    273  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP4LH);
    274  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP4HL);
    275  1.1.2.2  skrll 	PRINTREG32(regs, RTW_WAKEUP4HH);
    276  1.1.2.2  skrll 	PRINTREG32(regs, RTW_DK0);
    277  1.1.2.2  skrll 	PRINTREG32(regs, RTW_DK1);
    278  1.1.2.2  skrll 	PRINTREG32(regs, RTW_DK2);
    279  1.1.2.2  skrll 	PRINTREG32(regs, RTW_DK3);
    280  1.1.2.2  skrll 	PRINTREG32(regs, RTW_RETRYCTR);
    281  1.1.2.2  skrll 	PRINTREG32(regs, RTW_RDSAR);
    282  1.1.2.2  skrll 	PRINTREG32(regs, RTW_FER);
    283  1.1.2.2  skrll 	PRINTREG32(regs, RTW_FEMR);
    284  1.1.2.2  skrll 	PRINTREG32(regs, RTW_FPSR);
    285  1.1.2.2  skrll 	PRINTREG32(regs, RTW_FFER);
    286  1.1.2.2  skrll 
    287  1.1.2.2  skrll 	/* 16-bit registers */
    288  1.1.2.2  skrll 	PRINTREG16(regs, RTW_BRSR);
    289  1.1.2.2  skrll 	PRINTREG16(regs, RTW_IMR);
    290  1.1.2.2  skrll 	PRINTREG16(regs, RTW_ISR);
    291  1.1.2.2  skrll 	PRINTREG16(regs, RTW_BCNITV);
    292  1.1.2.2  skrll 	PRINTREG16(regs, RTW_ATIMWND);
    293  1.1.2.2  skrll 	PRINTREG16(regs, RTW_BINTRITV);
    294  1.1.2.2  skrll 	PRINTREG16(regs, RTW_ATIMTRITV);
    295  1.1.2.2  skrll 	PRINTREG16(regs, RTW_CRC16ERR);
    296  1.1.2.2  skrll 	PRINTREG16(regs, RTW_CRC0);
    297  1.1.2.2  skrll 	PRINTREG16(regs, RTW_CRC1);
    298  1.1.2.2  skrll 	PRINTREG16(regs, RTW_CRC2);
    299  1.1.2.2  skrll 	PRINTREG16(regs, RTW_CRC3);
    300  1.1.2.2  skrll 	PRINTREG16(regs, RTW_CRC4);
    301  1.1.2.2  skrll 	PRINTREG16(regs, RTW_CWR);
    302  1.1.2.2  skrll 
    303  1.1.2.2  skrll 	/* 8-bit registers */
    304  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CR);
    305  1.1.2.2  skrll 	PRINTREG8(regs, RTW_9346CR);
    306  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CONFIG0);
    307  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CONFIG1);
    308  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CONFIG2);
    309  1.1.2.2  skrll 	PRINTREG8(regs, RTW_MSR);
    310  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CONFIG3);
    311  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CONFIG4);
    312  1.1.2.2  skrll 	PRINTREG8(regs, RTW_TESTR);
    313  1.1.2.2  skrll 	PRINTREG8(regs, RTW_PSR);
    314  1.1.2.2  skrll 	PRINTREG8(regs, RTW_SCR);
    315  1.1.2.2  skrll 	PRINTREG8(regs, RTW_PHYDELAY);
    316  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CRCOUNT);
    317  1.1.2.2  skrll 	PRINTREG8(regs, RTW_PHYADDR);
    318  1.1.2.2  skrll 	PRINTREG8(regs, RTW_PHYDATAW);
    319  1.1.2.2  skrll 	PRINTREG8(regs, RTW_PHYDATAR);
    320  1.1.2.2  skrll 	PRINTREG8(regs, RTW_CONFIG5);
    321  1.1.2.2  skrll 	PRINTREG8(regs, RTW_TPPOLL);
    322  1.1.2.2  skrll 
    323  1.1.2.2  skrll 	PRINTREG16(regs, RTW_BSSID16);
    324  1.1.2.2  skrll 	PRINTREG32(regs, RTW_BSSID32);
    325  1.1.2.2  skrll #undef PRINTREG32
    326  1.1.2.2  skrll #undef PRINTREG16
    327  1.1.2.2  skrll #undef PRINTREG8
    328  1.1.2.2  skrll }
    329  1.1.2.2  skrll #endif /* RTW_DEBUG */
    330  1.1.2.2  skrll 
    331  1.1.2.2  skrll void
    332  1.1.2.4  skrll rtw_continuous_tx_enable(struct rtw_softc *sc, int enable)
    333  1.1.2.2  skrll {
    334  1.1.2.4  skrll 	struct rtw_regs *regs = &sc->sc_regs;
    335  1.1.2.4  skrll 
    336  1.1.2.5  skrll 	uint32_t tcr;
    337  1.1.2.2  skrll 	tcr = RTW_READ(regs, RTW_TCR);
    338  1.1.2.2  skrll 	tcr &= ~RTW_TCR_LBK_MASK;
    339  1.1.2.2  skrll 	if (enable)
    340  1.1.2.2  skrll 		tcr |= RTW_TCR_LBK_CONT;
    341  1.1.2.2  skrll 	else
    342  1.1.2.2  skrll 		tcr |= RTW_TCR_LBK_NORMAL;
    343  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_TCR, tcr);
    344  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_TCR, RTW_TCR);
    345  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_ANAPARM);
    346  1.1.2.4  skrll 	rtw_txdac_enable(sc, !enable);
    347  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_ANAPARM);/* XXX Voodoo from Linux. */
    348  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_NONE);
    349  1.1.2.4  skrll }
    350  1.1.2.4  skrll 
    351  1.1.2.5  skrll #ifdef RTW_DEBUG
    352  1.1.2.4  skrll static const char *
    353  1.1.2.4  skrll rtw_access_string(enum rtw_access access)
    354  1.1.2.4  skrll {
    355  1.1.2.4  skrll 	switch (access) {
    356  1.1.2.4  skrll 	case RTW_ACCESS_NONE:
    357  1.1.2.4  skrll 		return "none";
    358  1.1.2.4  skrll 	case RTW_ACCESS_CONFIG:
    359  1.1.2.4  skrll 		return "config";
    360  1.1.2.4  skrll 	case RTW_ACCESS_ANAPARM:
    361  1.1.2.4  skrll 		return "anaparm";
    362  1.1.2.4  skrll 	default:
    363  1.1.2.4  skrll 		return "unknown";
    364  1.1.2.2  skrll 	}
    365  1.1.2.2  skrll }
    366  1.1.2.5  skrll #endif /* RTW_DEBUG */
    367  1.1.2.2  skrll 
    368  1.1.2.4  skrll static void
    369  1.1.2.5  skrll rtw_set_access1(struct rtw_regs *regs, enum rtw_access naccess)
    370  1.1.2.4  skrll {
    371  1.1.2.4  skrll 	KASSERT(naccess >= RTW_ACCESS_NONE && naccess <= RTW_ACCESS_ANAPARM);
    372  1.1.2.5  skrll 	KASSERT(regs->r_access >= RTW_ACCESS_NONE &&
    373  1.1.2.5  skrll 	        regs->r_access <= RTW_ACCESS_ANAPARM);
    374  1.1.2.4  skrll 
    375  1.1.2.5  skrll 	if (naccess == regs->r_access)
    376  1.1.2.4  skrll 		return;
    377  1.1.2.4  skrll 
    378  1.1.2.4  skrll 	switch (naccess) {
    379  1.1.2.4  skrll 	case RTW_ACCESS_NONE:
    380  1.1.2.5  skrll 		switch (regs->r_access) {
    381  1.1.2.4  skrll 		case RTW_ACCESS_ANAPARM:
    382  1.1.2.4  skrll 			rtw_anaparm_enable(regs, 0);
    383  1.1.2.4  skrll 			/*FALLTHROUGH*/
    384  1.1.2.4  skrll 		case RTW_ACCESS_CONFIG:
    385  1.1.2.4  skrll 			rtw_config0123_enable(regs, 0);
    386  1.1.2.4  skrll 			/*FALLTHROUGH*/
    387  1.1.2.4  skrll 		case RTW_ACCESS_NONE:
    388  1.1.2.4  skrll 			break;
    389  1.1.2.4  skrll 		}
    390  1.1.2.4  skrll 		break;
    391  1.1.2.4  skrll 	case RTW_ACCESS_CONFIG:
    392  1.1.2.5  skrll 		switch (regs->r_access) {
    393  1.1.2.4  skrll 		case RTW_ACCESS_NONE:
    394  1.1.2.4  skrll 			rtw_config0123_enable(regs, 1);
    395  1.1.2.4  skrll 			/*FALLTHROUGH*/
    396  1.1.2.4  skrll 		case RTW_ACCESS_CONFIG:
    397  1.1.2.4  skrll 			break;
    398  1.1.2.4  skrll 		case RTW_ACCESS_ANAPARM:
    399  1.1.2.4  skrll 			rtw_anaparm_enable(regs, 0);
    400  1.1.2.4  skrll 			break;
    401  1.1.2.4  skrll 		}
    402  1.1.2.4  skrll 		break;
    403  1.1.2.4  skrll 	case RTW_ACCESS_ANAPARM:
    404  1.1.2.5  skrll 		switch (regs->r_access) {
    405  1.1.2.4  skrll 		case RTW_ACCESS_NONE:
    406  1.1.2.4  skrll 			rtw_config0123_enable(regs, 1);
    407  1.1.2.4  skrll 			/*FALLTHROUGH*/
    408  1.1.2.4  skrll 		case RTW_ACCESS_CONFIG:
    409  1.1.2.4  skrll 			rtw_anaparm_enable(regs, 1);
    410  1.1.2.4  skrll 			/*FALLTHROUGH*/
    411  1.1.2.4  skrll 		case RTW_ACCESS_ANAPARM:
    412  1.1.2.4  skrll 			break;
    413  1.1.2.4  skrll 		}
    414  1.1.2.4  skrll 		break;
    415  1.1.2.4  skrll 	}
    416  1.1.2.4  skrll }
    417  1.1.2.4  skrll 
    418  1.1.2.4  skrll void
    419  1.1.2.5  skrll rtw_set_access(struct rtw_regs *regs, enum rtw_access access)
    420  1.1.2.4  skrll {
    421  1.1.2.5  skrll 	rtw_set_access1(regs, access);
    422  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_ACCESS,
    423  1.1.2.5  skrll 	    ("%s: access %s -> %s\n", __func__,
    424  1.1.2.5  skrll 	    rtw_access_string(regs->r_access),
    425  1.1.2.4  skrll 	    rtw_access_string(access)));
    426  1.1.2.5  skrll 	regs->r_access = access;
    427  1.1.2.4  skrll }
    428  1.1.2.4  skrll 
    429  1.1.2.2  skrll /*
    430  1.1.2.2  skrll  * Enable registers, switch register banks.
    431  1.1.2.2  skrll  */
    432  1.1.2.2  skrll void
    433  1.1.2.2  skrll rtw_config0123_enable(struct rtw_regs *regs, int enable)
    434  1.1.2.2  skrll {
    435  1.1.2.5  skrll 	uint8_t ecr;
    436  1.1.2.2  skrll 	ecr = RTW_READ8(regs, RTW_9346CR);
    437  1.1.2.2  skrll 	ecr &= ~(RTW_9346CR_EEM_MASK | RTW_9346CR_EECS | RTW_9346CR_EESK);
    438  1.1.2.2  skrll 	if (enable)
    439  1.1.2.2  skrll 		ecr |= RTW_9346CR_EEM_CONFIG;
    440  1.1.2.5  skrll 	else {
    441  1.1.2.5  skrll 		RTW_WBW(regs, RTW_9346CR, MAX(RTW_CONFIG0, RTW_CONFIG3));
    442  1.1.2.2  skrll 		ecr |= RTW_9346CR_EEM_NORMAL;
    443  1.1.2.5  skrll 	}
    444  1.1.2.2  skrll 	RTW_WRITE8(regs, RTW_9346CR, ecr);
    445  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_9346CR, RTW_9346CR);
    446  1.1.2.2  skrll }
    447  1.1.2.2  skrll 
    448  1.1.2.2  skrll /* requires rtw_config0123_enable(, 1) */
    449  1.1.2.2  skrll void
    450  1.1.2.2  skrll rtw_anaparm_enable(struct rtw_regs *regs, int enable)
    451  1.1.2.2  skrll {
    452  1.1.2.5  skrll 	uint8_t cfg3;
    453  1.1.2.2  skrll 
    454  1.1.2.2  skrll 	cfg3 = RTW_READ8(regs, RTW_CONFIG3);
    455  1.1.2.4  skrll 	cfg3 |= RTW_CONFIG3_CLKRUNEN;
    456  1.1.2.4  skrll 	if (enable)
    457  1.1.2.4  skrll 		cfg3 |= RTW_CONFIG3_PARMEN;
    458  1.1.2.4  skrll 	else
    459  1.1.2.2  skrll 		cfg3 &= ~RTW_CONFIG3_PARMEN;
    460  1.1.2.2  skrll 	RTW_WRITE8(regs, RTW_CONFIG3, cfg3);
    461  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_CONFIG3, RTW_CONFIG3);
    462  1.1.2.2  skrll }
    463  1.1.2.2  skrll 
    464  1.1.2.2  skrll /* requires rtw_anaparm_enable(, 1) */
    465  1.1.2.2  skrll void
    466  1.1.2.4  skrll rtw_txdac_enable(struct rtw_softc *sc, int enable)
    467  1.1.2.2  skrll {
    468  1.1.2.5  skrll 	uint32_t anaparm;
    469  1.1.2.4  skrll 	struct rtw_regs *regs = &sc->sc_regs;
    470  1.1.2.2  skrll 
    471  1.1.2.2  skrll 	anaparm = RTW_READ(regs, RTW_ANAPARM);
    472  1.1.2.2  skrll 	if (enable)
    473  1.1.2.2  skrll 		anaparm &= ~RTW_ANAPARM_TXDACOFF;
    474  1.1.2.2  skrll 	else
    475  1.1.2.2  skrll 		anaparm |= RTW_ANAPARM_TXDACOFF;
    476  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_ANAPARM, anaparm);
    477  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
    478  1.1.2.2  skrll }
    479  1.1.2.2  skrll 
    480  1.1.2.2  skrll static __inline int
    481  1.1.2.5  skrll rtw_chip_reset1(struct rtw_regs *regs, const char *dvname)
    482  1.1.2.2  skrll {
    483  1.1.2.5  skrll 	uint8_t cr;
    484  1.1.2.4  skrll 	int i;
    485  1.1.2.2  skrll 
    486  1.1.2.2  skrll 	RTW_WRITE8(regs, RTW_CR, RTW_CR_RST);
    487  1.1.2.2  skrll 
    488  1.1.2.2  skrll 	RTW_WBR(regs, RTW_CR, RTW_CR);
    489  1.1.2.2  skrll 
    490  1.1.2.5  skrll 	for (i = 0; i < 1000; i++) {
    491  1.1.2.2  skrll 		if ((cr = RTW_READ8(regs, RTW_CR) & RTW_CR_RST) == 0) {
    492  1.1.2.5  skrll 			RTW_DPRINTF(RTW_DEBUG_RESET,
    493  1.1.2.5  skrll 			    ("%s: reset in %dus\n", dvname, i));
    494  1.1.2.2  skrll 			return 0;
    495  1.1.2.2  skrll 		}
    496  1.1.2.2  skrll 		RTW_RBR(regs, RTW_CR, RTW_CR);
    497  1.1.2.5  skrll 		DELAY(10); /* 10us */
    498  1.1.2.2  skrll 	}
    499  1.1.2.2  skrll 
    500  1.1.2.5  skrll 	printf("%s: reset failed\n", dvname);
    501  1.1.2.2  skrll 	return ETIMEDOUT;
    502  1.1.2.2  skrll }
    503  1.1.2.2  skrll 
    504  1.1.2.2  skrll static __inline int
    505  1.1.2.5  skrll rtw_chip_reset(struct rtw_regs *regs, const char *dvname)
    506  1.1.2.4  skrll {
    507  1.1.2.4  skrll 	uint32_t tcr;
    508  1.1.2.4  skrll 
    509  1.1.2.4  skrll 	/* from Linux driver */
    510  1.1.2.4  skrll 	tcr = RTW_TCR_CWMIN | RTW_TCR_MXDMA_2048 |
    511  1.1.2.4  skrll 	      LSHIFT(7, RTW_TCR_SRL_MASK) | LSHIFT(7, RTW_TCR_LRL_MASK);
    512  1.1.2.4  skrll 
    513  1.1.2.4  skrll 	RTW_WRITE(regs, RTW_TCR, tcr);
    514  1.1.2.4  skrll 
    515  1.1.2.4  skrll 	RTW_WBW(regs, RTW_CR, RTW_TCR);
    516  1.1.2.4  skrll 
    517  1.1.2.4  skrll 	return rtw_chip_reset1(regs, dvname);
    518  1.1.2.4  skrll }
    519  1.1.2.4  skrll 
    520  1.1.2.5  skrll static void
    521  1.1.2.5  skrll rtw_wep_setkeys(struct rtw_softc *sc, struct ieee80211_wepkey *wk, int txkey)
    522  1.1.2.5  skrll {
    523  1.1.2.5  skrll 	uint8_t cfg0, scr;
    524  1.1.2.5  skrll 	int i, j, tx_key_len;
    525  1.1.2.5  skrll 	struct rtw_regs *regs;
    526  1.1.2.5  skrll 	union rtw_keys *rk;
    527  1.1.2.5  skrll 
    528  1.1.2.5  skrll 	regs = &sc->sc_regs;
    529  1.1.2.5  skrll 	rk = &sc->sc_keys;
    530  1.1.2.5  skrll 
    531  1.1.2.5  skrll 	(void)memset(rk->rk_keys, 0, sizeof(rk->rk_keys));
    532  1.1.2.5  skrll 
    533  1.1.2.5  skrll 	scr = RTW_READ8(regs, RTW_SCR);
    534  1.1.2.5  skrll 	cfg0 = RTW_READ8(regs, RTW_CONFIG0);
    535  1.1.2.5  skrll 	scr &= ~(RTW_SCR_KM_MASK | RTW_SCR_TXSECON | RTW_SCR_RXSECON);
    536  1.1.2.5  skrll 	cfg0 &= ~(RTW_CONFIG0_WEP104 | RTW_CONFIG0_WEP40);
    537  1.1.2.5  skrll 
    538  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_CONFIG);
    539  1.1.2.5  skrll 
    540  1.1.2.5  skrll 	if ((sc->sc_ic.ic_flags & IEEE80211_F_PRIVACY) == 0)
    541  1.1.2.5  skrll 		goto out;
    542  1.1.2.5  skrll 
    543  1.1.2.5  skrll 	tx_key_len = wk[txkey].wk_len;
    544  1.1.2.5  skrll 
    545  1.1.2.5  skrll 	switch (tx_key_len) {
    546  1.1.2.5  skrll 	case 5:
    547  1.1.2.5  skrll 		scr |= RTW_SCR_TXSECON | RTW_SCR_RXSECON | RTW_SCR_KM_WEP40;
    548  1.1.2.5  skrll 		break;
    549  1.1.2.5  skrll 	case 13:
    550  1.1.2.5  skrll 		scr |= RTW_SCR_TXSECON | RTW_SCR_RXSECON | RTW_SCR_KM_WEP104;
    551  1.1.2.5  skrll 		break;
    552  1.1.2.5  skrll 	default:
    553  1.1.2.5  skrll 		goto out;
    554  1.1.2.5  skrll 	}
    555  1.1.2.5  skrll 
    556  1.1.2.5  skrll 	cfg0 |= RTW_CONFIG0_WEP104 | RTW_CONFIG0_WEP40;
    557  1.1.2.5  skrll 
    558  1.1.2.5  skrll 	for (i = j = 0; i < IEEE80211_WEP_NKID; i++) {
    559  1.1.2.5  skrll 		if (i == txkey)
    560  1.1.2.5  skrll 			sc->sc_txkey = j;
    561  1.1.2.5  skrll 		else if (wk[i].wk_len != tx_key_len)
    562  1.1.2.5  skrll 			continue;
    563  1.1.2.5  skrll 		(void)memcpy(rk->rk_keys[j++], wk[i].wk_key, wk[i].wk_len);
    564  1.1.2.5  skrll 	}
    565  1.1.2.5  skrll 
    566  1.1.2.5  skrll out:
    567  1.1.2.5  skrll 	bus_space_write_region_4(regs->r_bt, regs->r_bh,
    568  1.1.2.5  skrll 	    RTW_DK0, rk->rk_words,
    569  1.1.2.5  skrll 	    sizeof(rk->rk_words) / sizeof(rk->rk_words[0]));
    570  1.1.2.5  skrll 
    571  1.1.2.5  skrll 	bus_space_barrier(regs->r_bt, regs->r_bh, RTW_DK0,
    572  1.1.2.5  skrll 	    sizeof(rk->rk_words) / sizeof(rk->rk_words[0]),
    573  1.1.2.5  skrll 	    BUS_SPACE_BARRIER_SYNC);
    574  1.1.2.5  skrll 
    575  1.1.2.5  skrll 	RTW_WRITE8(regs, RTW_CONFIG0, cfg0);
    576  1.1.2.5  skrll 	RTW_WBW(regs, RTW_CONFIG0, RTW_SCR);
    577  1.1.2.5  skrll 	RTW_WRITE8(regs, RTW_SCR, scr);
    578  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_SCR, RTW_SCR);
    579  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_NONE);
    580  1.1.2.5  skrll }
    581  1.1.2.5  skrll 
    582  1.1.2.4  skrll static __inline int
    583  1.1.2.5  skrll rtw_recall_eeprom(struct rtw_regs *regs, const char *dvname)
    584  1.1.2.2  skrll {
    585  1.1.2.2  skrll 	int i;
    586  1.1.2.5  skrll 	uint8_t ecr;
    587  1.1.2.2  skrll 
    588  1.1.2.2  skrll 	ecr = RTW_READ8(regs, RTW_9346CR);
    589  1.1.2.2  skrll 	ecr = (ecr & ~RTW_9346CR_EEM_MASK) | RTW_9346CR_EEM_AUTOLOAD;
    590  1.1.2.2  skrll 	RTW_WRITE8(regs, RTW_9346CR, ecr);
    591  1.1.2.2  skrll 
    592  1.1.2.2  skrll 	RTW_WBR(regs, RTW_9346CR, RTW_9346CR);
    593  1.1.2.2  skrll 
    594  1.1.2.2  skrll 	/* wait 2.5ms for completion */
    595  1.1.2.2  skrll 	for (i = 0; i < 25; i++) {
    596  1.1.2.2  skrll 		ecr = RTW_READ8(regs, RTW_9346CR);
    597  1.1.2.2  skrll 		if ((ecr & RTW_9346CR_EEM_MASK) == RTW_9346CR_EEM_NORMAL) {
    598  1.1.2.5  skrll 			RTW_DPRINTF(RTW_DEBUG_RESET,
    599  1.1.2.5  skrll 			    ("%s: recall EEPROM in %dus\n", dvname, i * 100));
    600  1.1.2.2  skrll 			return 0;
    601  1.1.2.2  skrll 		}
    602  1.1.2.2  skrll 		RTW_RBR(regs, RTW_9346CR, RTW_9346CR);
    603  1.1.2.2  skrll 		DELAY(100);
    604  1.1.2.2  skrll 	}
    605  1.1.2.5  skrll 	printf("%s: recall EEPROM failed\n", dvname);
    606  1.1.2.2  skrll 	return ETIMEDOUT;
    607  1.1.2.2  skrll }
    608  1.1.2.2  skrll 
    609  1.1.2.2  skrll static __inline int
    610  1.1.2.2  skrll rtw_reset(struct rtw_softc *sc)
    611  1.1.2.2  skrll {
    612  1.1.2.2  skrll 	int rc;
    613  1.1.2.4  skrll 	uint8_t config1;
    614  1.1.2.2  skrll 
    615  1.1.2.5  skrll 	if ((rc = rtw_chip_reset(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
    616  1.1.2.2  skrll 		return rc;
    617  1.1.2.2  skrll 
    618  1.1.2.5  skrll 	if ((rc = rtw_recall_eeprom(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
    619  1.1.2.2  skrll 		;
    620  1.1.2.2  skrll 
    621  1.1.2.4  skrll 	config1 = RTW_READ8(&sc->sc_regs, RTW_CONFIG1);
    622  1.1.2.4  skrll 	RTW_WRITE8(&sc->sc_regs, RTW_CONFIG1, config1 & ~RTW_CONFIG1_PMEN);
    623  1.1.2.2  skrll 	/* TBD turn off maximum power saving? */
    624  1.1.2.2  skrll 
    625  1.1.2.2  skrll 	return 0;
    626  1.1.2.2  skrll }
    627  1.1.2.2  skrll 
    628  1.1.2.2  skrll static __inline int
    629  1.1.2.5  skrll rtw_txdesc_dmamaps_create(bus_dma_tag_t dmat, struct rtw_txsoft *descs,
    630  1.1.2.2  skrll     u_int ndescs)
    631  1.1.2.2  skrll {
    632  1.1.2.2  skrll 	int i, rc = 0;
    633  1.1.2.2  skrll 	for (i = 0; i < ndescs; i++) {
    634  1.1.2.2  skrll 		rc = bus_dmamap_create(dmat, MCLBYTES, RTW_MAXPKTSEGS, MCLBYTES,
    635  1.1.2.5  skrll 		    0, 0, &descs[i].ts_dmamap);
    636  1.1.2.2  skrll 		if (rc != 0)
    637  1.1.2.2  skrll 			break;
    638  1.1.2.2  skrll 	}
    639  1.1.2.2  skrll 	return rc;
    640  1.1.2.2  skrll }
    641  1.1.2.2  skrll 
    642  1.1.2.2  skrll static __inline int
    643  1.1.2.5  skrll rtw_rxdesc_dmamaps_create(bus_dma_tag_t dmat, struct rtw_rxsoft *descs,
    644  1.1.2.2  skrll     u_int ndescs)
    645  1.1.2.2  skrll {
    646  1.1.2.2  skrll 	int i, rc = 0;
    647  1.1.2.2  skrll 	for (i = 0; i < ndescs; i++) {
    648  1.1.2.2  skrll 		rc = bus_dmamap_create(dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
    649  1.1.2.5  skrll 		    &descs[i].rs_dmamap);
    650  1.1.2.2  skrll 		if (rc != 0)
    651  1.1.2.2  skrll 			break;
    652  1.1.2.2  skrll 	}
    653  1.1.2.2  skrll 	return rc;
    654  1.1.2.2  skrll }
    655  1.1.2.2  skrll 
    656  1.1.2.2  skrll static __inline void
    657  1.1.2.5  skrll rtw_rxdesc_dmamaps_destroy(bus_dma_tag_t dmat, struct rtw_rxsoft *descs,
    658  1.1.2.2  skrll     u_int ndescs)
    659  1.1.2.2  skrll {
    660  1.1.2.2  skrll 	int i;
    661  1.1.2.2  skrll 	for (i = 0; i < ndescs; i++) {
    662  1.1.2.5  skrll 		if (descs[i].rs_dmamap != NULL)
    663  1.1.2.5  skrll 			bus_dmamap_destroy(dmat, descs[i].rs_dmamap);
    664  1.1.2.2  skrll 	}
    665  1.1.2.2  skrll }
    666  1.1.2.2  skrll 
    667  1.1.2.2  skrll static __inline void
    668  1.1.2.5  skrll rtw_txdesc_dmamaps_destroy(bus_dma_tag_t dmat, struct rtw_txsoft *descs,
    669  1.1.2.2  skrll     u_int ndescs)
    670  1.1.2.2  skrll {
    671  1.1.2.2  skrll 	int i;
    672  1.1.2.2  skrll 	for (i = 0; i < ndescs; i++) {
    673  1.1.2.5  skrll 		if (descs[i].ts_dmamap != NULL)
    674  1.1.2.5  skrll 			bus_dmamap_destroy(dmat, descs[i].ts_dmamap);
    675  1.1.2.2  skrll 	}
    676  1.1.2.2  skrll }
    677  1.1.2.2  skrll 
    678  1.1.2.2  skrll static __inline void
    679  1.1.2.2  skrll rtw_srom_free(struct rtw_srom *sr)
    680  1.1.2.2  skrll {
    681  1.1.2.2  skrll 	sr->sr_size = 0;
    682  1.1.2.2  skrll 	if (sr->sr_content == NULL)
    683  1.1.2.2  skrll 		return;
    684  1.1.2.2  skrll 	free(sr->sr_content, M_DEVBUF);
    685  1.1.2.2  skrll 	sr->sr_content = NULL;
    686  1.1.2.2  skrll }
    687  1.1.2.2  skrll 
    688  1.1.2.2  skrll static void
    689  1.1.2.5  skrll rtw_srom_defaults(struct rtw_srom *sr, uint32_t *flags, uint8_t *cs_threshold,
    690  1.1.2.5  skrll     enum rtw_rfchipid *rfchipid, uint32_t *rcr)
    691  1.1.2.2  skrll {
    692  1.1.2.2  skrll 	*flags |= (RTW_F_DIGPHY|RTW_F_ANTDIV);
    693  1.1.2.2  skrll 	*cs_threshold = RTW_SR_ENERGYDETTHR_DEFAULT;
    694  1.1.2.2  skrll 	*rcr |= RTW_RCR_ENCS1;
    695  1.1.2.2  skrll 	*rfchipid = RTW_RFCHIPID_PHILIPS;
    696  1.1.2.2  skrll }
    697  1.1.2.2  skrll 
    698  1.1.2.2  skrll static int
    699  1.1.2.5  skrll rtw_srom_parse(struct rtw_srom *sr, uint32_t *flags, uint8_t *cs_threshold,
    700  1.1.2.5  skrll     enum rtw_rfchipid *rfchipid, uint32_t *rcr, enum rtw_locale *locale,
    701  1.1.2.5  skrll     const char *dvname)
    702  1.1.2.2  skrll {
    703  1.1.2.2  skrll 	int i;
    704  1.1.2.2  skrll 	const char *rfname, *paname;
    705  1.1.2.2  skrll 	char scratch[sizeof("unknown 0xXX")];
    706  1.1.2.5  skrll 	uint16_t version;
    707  1.1.2.5  skrll 	uint8_t mac[IEEE80211_ADDR_LEN];
    708  1.1.2.2  skrll 
    709  1.1.2.2  skrll 	*flags &= ~(RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV);
    710  1.1.2.2  skrll 	*rcr &= ~(RTW_RCR_ENCS1 | RTW_RCR_ENCS2);
    711  1.1.2.2  skrll 
    712  1.1.2.2  skrll 	version = RTW_SR_GET16(sr, RTW_SR_VERSION);
    713  1.1.2.5  skrll 	printf("%s: SROM version %d.%d", dvname, version >> 8, version & 0xff);
    714  1.1.2.2  skrll 
    715  1.1.2.2  skrll 	if (version <= 0x0101) {
    716  1.1.2.2  skrll 		printf(" is not understood, limping along with defaults\n");
    717  1.1.2.5  skrll 		rtw_srom_defaults(sr, flags, cs_threshold, rfchipid, rcr);
    718  1.1.2.2  skrll 		return 0;
    719  1.1.2.2  skrll 	}
    720  1.1.2.2  skrll 	printf("\n");
    721  1.1.2.2  skrll 
    722  1.1.2.2  skrll 	for (i = 0; i < IEEE80211_ADDR_LEN; i++)
    723  1.1.2.2  skrll 		mac[i] = RTW_SR_GET(sr, RTW_SR_MAC + i);
    724  1.1.2.2  skrll 
    725  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_ATTACH,
    726  1.1.2.5  skrll 	    ("%s: EEPROM MAC %s\n", dvname, ether_sprintf(mac)));
    727  1.1.2.2  skrll 
    728  1.1.2.2  skrll 	*cs_threshold = RTW_SR_GET(sr, RTW_SR_ENERGYDETTHR);
    729  1.1.2.2  skrll 
    730  1.1.2.2  skrll 	if ((RTW_SR_GET(sr, RTW_SR_CONFIG2) & RTW_CONFIG2_ANT) != 0)
    731  1.1.2.2  skrll 		*flags |= RTW_F_ANTDIV;
    732  1.1.2.2  skrll 
    733  1.1.2.5  skrll 	/* Note well: the sense of the RTW_SR_RFPARM_DIGPHY bit seems
    734  1.1.2.5  skrll 	 * to be reversed.
    735  1.1.2.5  skrll 	 */
    736  1.1.2.5  skrll 	if ((RTW_SR_GET(sr, RTW_SR_RFPARM) & RTW_SR_RFPARM_DIGPHY) == 0)
    737  1.1.2.2  skrll 		*flags |= RTW_F_DIGPHY;
    738  1.1.2.2  skrll 	if ((RTW_SR_GET(sr, RTW_SR_RFPARM) & RTW_SR_RFPARM_DFLANTB) != 0)
    739  1.1.2.2  skrll 		*flags |= RTW_F_DFLANTB;
    740  1.1.2.2  skrll 
    741  1.1.2.2  skrll 	*rcr |= LSHIFT(MASK_AND_RSHIFT(RTW_SR_GET(sr, RTW_SR_RFPARM),
    742  1.1.2.2  skrll 	    RTW_SR_RFPARM_CS_MASK), RTW_RCR_ENCS1);
    743  1.1.2.2  skrll 
    744  1.1.2.2  skrll 	*rfchipid = RTW_SR_GET(sr, RTW_SR_RFCHIPID);
    745  1.1.2.2  skrll 	switch (*rfchipid) {
    746  1.1.2.2  skrll 	case RTW_RFCHIPID_GCT:		/* this combo seen in the wild */
    747  1.1.2.2  skrll 		rfname = "GCT GRF5101";
    748  1.1.2.2  skrll 		paname = "Winspring WS9901";
    749  1.1.2.2  skrll 		break;
    750  1.1.2.2  skrll 	case RTW_RFCHIPID_MAXIM:
    751  1.1.2.2  skrll 		rfname = "Maxim MAX2820";	/* guess */
    752  1.1.2.2  skrll 		paname = "Maxim MAX2422";	/* guess */
    753  1.1.2.2  skrll 		break;
    754  1.1.2.2  skrll 	case RTW_RFCHIPID_INTERSIL:
    755  1.1.2.2  skrll 		rfname = "Intersil HFA3873";	/* guess */
    756  1.1.2.2  skrll 		paname = "Intersil <unknown>";
    757  1.1.2.2  skrll 		break;
    758  1.1.2.2  skrll 	case RTW_RFCHIPID_PHILIPS:	/* this combo seen in the wild */
    759  1.1.2.2  skrll 		rfname = "Philips SA2400A";
    760  1.1.2.2  skrll 		paname = "Philips SA2411";
    761  1.1.2.2  skrll 		break;
    762  1.1.2.2  skrll 	case RTW_RFCHIPID_RFMD:
    763  1.1.2.2  skrll 		/* this is the same front-end as an atw(4)! */
    764  1.1.2.2  skrll 		rfname = "RFMD RF2948B, "	/* mentioned in Realtek docs */
    765  1.1.2.2  skrll 			 "LNA: RFMD RF2494, "	/* mentioned in Realtek docs */
    766  1.1.2.2  skrll 			 "SYN: Silicon Labs Si4126";	/* inferred from
    767  1.1.2.2  skrll 			 				 * reference driver
    768  1.1.2.2  skrll 							 */
    769  1.1.2.2  skrll 		paname = "RFMD RF2189";		/* mentioned in Realtek docs */
    770  1.1.2.2  skrll 		break;
    771  1.1.2.2  skrll 	case RTW_RFCHIPID_RESERVED:
    772  1.1.2.2  skrll 		rfname = paname = "reserved";
    773  1.1.2.2  skrll 		break;
    774  1.1.2.2  skrll 	default:
    775  1.1.2.2  skrll 		snprintf(scratch, sizeof(scratch), "unknown 0x%02x", *rfchipid);
    776  1.1.2.2  skrll 		rfname = paname = scratch;
    777  1.1.2.2  skrll 	}
    778  1.1.2.5  skrll 	printf("%s: RF: %s, PA: %s\n", dvname, rfname, paname);
    779  1.1.2.2  skrll 
    780  1.1.2.2  skrll 	switch (RTW_SR_GET(sr, RTW_SR_CONFIG0) & RTW_CONFIG0_GL_MASK) {
    781  1.1.2.2  skrll 	case RTW_CONFIG0_GL_USA:
    782  1.1.2.2  skrll 		*locale = RTW_LOCALE_USA;
    783  1.1.2.2  skrll 		break;
    784  1.1.2.2  skrll 	case RTW_CONFIG0_GL_EUROPE:
    785  1.1.2.2  skrll 		*locale = RTW_LOCALE_EUROPE;
    786  1.1.2.2  skrll 		break;
    787  1.1.2.2  skrll 	case RTW_CONFIG0_GL_JAPAN:
    788  1.1.2.2  skrll 		*locale = RTW_LOCALE_JAPAN;
    789  1.1.2.2  skrll 		break;
    790  1.1.2.2  skrll 	default:
    791  1.1.2.2  skrll 		*locale = RTW_LOCALE_UNKNOWN;
    792  1.1.2.2  skrll 		break;
    793  1.1.2.2  skrll 	}
    794  1.1.2.2  skrll 	return 0;
    795  1.1.2.2  skrll }
    796  1.1.2.2  skrll 
    797  1.1.2.2  skrll /* Returns -1 on failure. */
    798  1.1.2.2  skrll static int
    799  1.1.2.5  skrll rtw_srom_read(struct rtw_regs *regs, uint32_t flags, struct rtw_srom *sr,
    800  1.1.2.5  skrll     const char *dvname)
    801  1.1.2.2  skrll {
    802  1.1.2.2  skrll 	int rc;
    803  1.1.2.2  skrll 	struct seeprom_descriptor sd;
    804  1.1.2.5  skrll 	uint8_t ecr;
    805  1.1.2.2  skrll 
    806  1.1.2.2  skrll 	(void)memset(&sd, 0, sizeof(sd));
    807  1.1.2.2  skrll 
    808  1.1.2.2  skrll 	ecr = RTW_READ8(regs, RTW_9346CR);
    809  1.1.2.2  skrll 
    810  1.1.2.2  skrll 	if ((flags & RTW_F_9356SROM) != 0) {
    811  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_ATTACH, ("%s: 93c56 SROM\n", dvname));
    812  1.1.2.2  skrll 		sr->sr_size = 256;
    813  1.1.2.2  skrll 		sd.sd_chip = C56_66;
    814  1.1.2.2  skrll 	} else {
    815  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_ATTACH, ("%s: 93c46 SROM\n", dvname));
    816  1.1.2.2  skrll 		sr->sr_size = 128;
    817  1.1.2.2  skrll 		sd.sd_chip = C46;
    818  1.1.2.2  skrll 	}
    819  1.1.2.2  skrll 
    820  1.1.2.2  skrll 	ecr &= ~(RTW_9346CR_EEDI | RTW_9346CR_EEDO | RTW_9346CR_EESK |
    821  1.1.2.5  skrll 	    RTW_9346CR_EEM_MASK | RTW_9346CR_EECS);
    822  1.1.2.2  skrll 	ecr |= RTW_9346CR_EEM_PROGRAM;
    823  1.1.2.2  skrll 
    824  1.1.2.2  skrll 	RTW_WRITE8(regs, RTW_9346CR, ecr);
    825  1.1.2.2  skrll 
    826  1.1.2.2  skrll 	sr->sr_content = malloc(sr->sr_size, M_DEVBUF, M_NOWAIT);
    827  1.1.2.2  skrll 
    828  1.1.2.2  skrll 	if (sr->sr_content == NULL) {
    829  1.1.2.5  skrll 		printf("%s: unable to allocate SROM buffer\n", dvname);
    830  1.1.2.2  skrll 		return ENOMEM;
    831  1.1.2.2  skrll 	}
    832  1.1.2.2  skrll 
    833  1.1.2.2  skrll 	(void)memset(sr->sr_content, 0, sr->sr_size);
    834  1.1.2.2  skrll 
    835  1.1.2.2  skrll 	/* RTL8180 has a single 8-bit register for controlling the
    836  1.1.2.2  skrll 	 * 93cx6 SROM.  There is no "ready" bit. The RTL8180
    837  1.1.2.2  skrll 	 * input/output sense is the reverse of read_seeprom's.
    838  1.1.2.2  skrll 	 */
    839  1.1.2.2  skrll 	sd.sd_tag = regs->r_bt;
    840  1.1.2.2  skrll 	sd.sd_bsh = regs->r_bh;
    841  1.1.2.2  skrll 	sd.sd_regsize = 1;
    842  1.1.2.2  skrll 	sd.sd_control_offset = RTW_9346CR;
    843  1.1.2.2  skrll 	sd.sd_status_offset = RTW_9346CR;
    844  1.1.2.2  skrll 	sd.sd_dataout_offset = RTW_9346CR;
    845  1.1.2.2  skrll 	sd.sd_CK = RTW_9346CR_EESK;
    846  1.1.2.2  skrll 	sd.sd_CS = RTW_9346CR_EECS;
    847  1.1.2.2  skrll 	sd.sd_DI = RTW_9346CR_EEDO;
    848  1.1.2.2  skrll 	sd.sd_DO = RTW_9346CR_EEDI;
    849  1.1.2.2  skrll 	/* make read_seeprom enter EEPROM read/write mode */
    850  1.1.2.2  skrll 	sd.sd_MS = ecr;
    851  1.1.2.2  skrll 	sd.sd_RDY = 0;
    852  1.1.2.2  skrll 
    853  1.1.2.5  skrll 	/* TBD bus barriers */
    854  1.1.2.2  skrll 	if (!read_seeprom(&sd, sr->sr_content, 0, sr->sr_size/2)) {
    855  1.1.2.5  skrll 		printf("%s: could not read SROM\n", dvname);
    856  1.1.2.2  skrll 		free(sr->sr_content, M_DEVBUF);
    857  1.1.2.2  skrll 		sr->sr_content = NULL;
    858  1.1.2.2  skrll 		return -1;	/* XXX */
    859  1.1.2.2  skrll 	}
    860  1.1.2.2  skrll 
    861  1.1.2.2  skrll 	/* end EEPROM read/write mode */
    862  1.1.2.2  skrll 	RTW_WRITE8(regs, RTW_9346CR,
    863  1.1.2.2  skrll 	    (ecr & ~RTW_9346CR_EEM_MASK) | RTW_9346CR_EEM_NORMAL);
    864  1.1.2.2  skrll 	RTW_WBRW(regs, RTW_9346CR, RTW_9346CR);
    865  1.1.2.2  skrll 
    866  1.1.2.2  skrll 	if ((rc = rtw_recall_eeprom(regs, dvname)) != 0)
    867  1.1.2.2  skrll 		return rc;
    868  1.1.2.2  skrll 
    869  1.1.2.2  skrll #ifdef RTW_DEBUG
    870  1.1.2.2  skrll 	{
    871  1.1.2.2  skrll 		int i;
    872  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_ATTACH,
    873  1.1.2.5  skrll 		    ("\n%s: serial ROM:\n\t", dvname));
    874  1.1.2.2  skrll 		for (i = 0; i < sr->sr_size/2; i++) {
    875  1.1.2.2  skrll 			if (((i % 8) == 0) && (i != 0))
    876  1.1.2.5  skrll 				RTW_DPRINTF(RTW_DEBUG_ATTACH, ("\n\t"));
    877  1.1.2.5  skrll 			RTW_DPRINTF(RTW_DEBUG_ATTACH,
    878  1.1.2.5  skrll 			    (" %04x", sr->sr_content[i]));
    879  1.1.2.2  skrll 		}
    880  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_ATTACH, ("\n"));
    881  1.1.2.2  skrll 	}
    882  1.1.2.2  skrll #endif /* RTW_DEBUG */
    883  1.1.2.2  skrll 	return 0;
    884  1.1.2.2  skrll }
    885  1.1.2.2  skrll 
    886  1.1.2.4  skrll static void
    887  1.1.2.4  skrll rtw_set_rfprog(struct rtw_regs *regs, enum rtw_rfchipid rfchipid,
    888  1.1.2.4  skrll     const char *dvname)
    889  1.1.2.4  skrll {
    890  1.1.2.5  skrll 	uint8_t cfg4;
    891  1.1.2.4  skrll 	const char *method;
    892  1.1.2.4  skrll 
    893  1.1.2.4  skrll 	cfg4 = RTW_READ8(regs, RTW_CONFIG4) & ~RTW_CONFIG4_RFTYPE_MASK;
    894  1.1.2.4  skrll 
    895  1.1.2.4  skrll 	switch (rfchipid) {
    896  1.1.2.4  skrll 	default:
    897  1.1.2.4  skrll 		cfg4 |= LSHIFT(rtw_rfprog_fallback, RTW_CONFIG4_RFTYPE_MASK);
    898  1.1.2.4  skrll 		method = "fallback";
    899  1.1.2.4  skrll 		break;
    900  1.1.2.4  skrll 	case RTW_RFCHIPID_INTERSIL:
    901  1.1.2.4  skrll 		cfg4 |= RTW_CONFIG4_RFTYPE_INTERSIL;
    902  1.1.2.4  skrll 		method = "Intersil";
    903  1.1.2.4  skrll 		break;
    904  1.1.2.4  skrll 	case RTW_RFCHIPID_PHILIPS:
    905  1.1.2.4  skrll 		cfg4 |= RTW_CONFIG4_RFTYPE_PHILIPS;
    906  1.1.2.4  skrll 		method = "Philips";
    907  1.1.2.4  skrll 		break;
    908  1.1.2.5  skrll 	case RTW_RFCHIPID_GCT:	/* XXX a guess */
    909  1.1.2.4  skrll 	case RTW_RFCHIPID_RFMD:
    910  1.1.2.4  skrll 		cfg4 |= RTW_CONFIG4_RFTYPE_RFMD;
    911  1.1.2.4  skrll 		method = "RFMD";
    912  1.1.2.4  skrll 		break;
    913  1.1.2.4  skrll 	}
    914  1.1.2.4  skrll 
    915  1.1.2.4  skrll 	RTW_WRITE8(regs, RTW_CONFIG4, cfg4);
    916  1.1.2.4  skrll 
    917  1.1.2.5  skrll 	RTW_WBR(regs, RTW_CONFIG4, RTW_CONFIG4);
    918  1.1.2.2  skrll 
    919  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_INIT,
    920  1.1.2.5  skrll 	    ("%s: %s RF programming method, %#02x\n", dvname, method,
    921  1.1.2.5  skrll 	    RTW_READ8(regs, RTW_CONFIG4)));
    922  1.1.2.2  skrll }
    923  1.1.2.2  skrll 
    924  1.1.2.2  skrll static __inline void
    925  1.1.2.2  skrll rtw_init_channels(enum rtw_locale locale,
    926  1.1.2.2  skrll     struct ieee80211_channel (*chans)[IEEE80211_CHAN_MAX+1],
    927  1.1.2.5  skrll     const char *dvname)
    928  1.1.2.2  skrll {
    929  1.1.2.2  skrll 	int i;
    930  1.1.2.2  skrll 	const char *name = NULL;
    931  1.1.2.2  skrll #define ADD_CHANNEL(_chans, _chan) do {			\
    932  1.1.2.2  skrll 	(*_chans)[_chan].ic_flags = IEEE80211_CHAN_B;		\
    933  1.1.2.2  skrll 	(*_chans)[_chan].ic_freq =				\
    934  1.1.2.2  skrll 	    ieee80211_ieee2mhz(_chan, (*_chans)[_chan].ic_flags);\
    935  1.1.2.2  skrll } while (0)
    936  1.1.2.2  skrll 
    937  1.1.2.2  skrll 	switch (locale) {
    938  1.1.2.2  skrll 	case RTW_LOCALE_USA:	/* 1-11 */
    939  1.1.2.2  skrll 		name = "USA";
    940  1.1.2.2  skrll 		for (i = 1; i <= 11; i++)
    941  1.1.2.2  skrll 			ADD_CHANNEL(chans, i);
    942  1.1.2.2  skrll 		break;
    943  1.1.2.2  skrll 	case RTW_LOCALE_JAPAN:	/* 1-14 */
    944  1.1.2.2  skrll 		name = "Japan";
    945  1.1.2.2  skrll 		ADD_CHANNEL(chans, 14);
    946  1.1.2.2  skrll 		for (i = 1; i <= 14; i++)
    947  1.1.2.2  skrll 			ADD_CHANNEL(chans, i);
    948  1.1.2.2  skrll 		break;
    949  1.1.2.2  skrll 	case RTW_LOCALE_EUROPE:	/* 1-13 */
    950  1.1.2.2  skrll 		name = "Europe";
    951  1.1.2.2  skrll 		for (i = 1; i <= 13; i++)
    952  1.1.2.2  skrll 			ADD_CHANNEL(chans, i);
    953  1.1.2.2  skrll 		break;
    954  1.1.2.2  skrll 	default:			/* 10-11 allowed by most countries */
    955  1.1.2.2  skrll 		name = "<unknown>";
    956  1.1.2.2  skrll 		for (i = 10; i <= 11; i++)
    957  1.1.2.2  skrll 			ADD_CHANNEL(chans, i);
    958  1.1.2.2  skrll 		break;
    959  1.1.2.2  skrll 	}
    960  1.1.2.5  skrll 	printf("%s: Geographic Location %s\n", dvname, name);
    961  1.1.2.2  skrll #undef ADD_CHANNEL
    962  1.1.2.2  skrll }
    963  1.1.2.2  skrll 
    964  1.1.2.2  skrll static __inline void
    965  1.1.2.2  skrll rtw_identify_country(struct rtw_regs *regs, enum rtw_locale *locale,
    966  1.1.2.5  skrll     const char *dvname)
    967  1.1.2.2  skrll {
    968  1.1.2.5  skrll 	uint8_t cfg0 = RTW_READ8(regs, RTW_CONFIG0);
    969  1.1.2.2  skrll 
    970  1.1.2.2  skrll 	switch (cfg0 & RTW_CONFIG0_GL_MASK) {
    971  1.1.2.2  skrll 	case RTW_CONFIG0_GL_USA:
    972  1.1.2.2  skrll 		*locale = RTW_LOCALE_USA;
    973  1.1.2.2  skrll 		break;
    974  1.1.2.2  skrll 	case RTW_CONFIG0_GL_JAPAN:
    975  1.1.2.2  skrll 		*locale = RTW_LOCALE_JAPAN;
    976  1.1.2.2  skrll 		break;
    977  1.1.2.2  skrll 	case RTW_CONFIG0_GL_EUROPE:
    978  1.1.2.2  skrll 		*locale = RTW_LOCALE_EUROPE;
    979  1.1.2.2  skrll 		break;
    980  1.1.2.2  skrll 	default:
    981  1.1.2.2  skrll 		*locale = RTW_LOCALE_UNKNOWN;
    982  1.1.2.2  skrll 		break;
    983  1.1.2.2  skrll 	}
    984  1.1.2.2  skrll }
    985  1.1.2.2  skrll 
    986  1.1.2.2  skrll static __inline int
    987  1.1.2.5  skrll rtw_identify_sta(struct rtw_regs *regs, uint8_t (*addr)[IEEE80211_ADDR_LEN],
    988  1.1.2.5  skrll     const char *dvname)
    989  1.1.2.2  skrll {
    990  1.1.2.5  skrll 	static const uint8_t empty_macaddr[IEEE80211_ADDR_LEN] = {
    991  1.1.2.2  skrll 		0x00, 0x00, 0x00, 0x00, 0x00, 0x00
    992  1.1.2.2  skrll 	};
    993  1.1.2.5  skrll 	uint32_t idr0 = RTW_READ(regs, RTW_IDR0),
    994  1.1.2.2  skrll 	          idr1 = RTW_READ(regs, RTW_IDR1);
    995  1.1.2.2  skrll 
    996  1.1.2.2  skrll 	(*addr)[0] = MASK_AND_RSHIFT(idr0, BITS(0,  7));
    997  1.1.2.2  skrll 	(*addr)[1] = MASK_AND_RSHIFT(idr0, BITS(8,  15));
    998  1.1.2.2  skrll 	(*addr)[2] = MASK_AND_RSHIFT(idr0, BITS(16, 23));
    999  1.1.2.2  skrll 	(*addr)[3] = MASK_AND_RSHIFT(idr0, BITS(24 ,31));
   1000  1.1.2.2  skrll 
   1001  1.1.2.2  skrll 	(*addr)[4] = MASK_AND_RSHIFT(idr1, BITS(0,  7));
   1002  1.1.2.2  skrll 	(*addr)[5] = MASK_AND_RSHIFT(idr1, BITS(8, 15));
   1003  1.1.2.2  skrll 
   1004  1.1.2.2  skrll 	if (IEEE80211_ADDR_EQ(addr, empty_macaddr)) {
   1005  1.1.2.2  skrll 		printf("%s: could not get mac address, attach failed\n",
   1006  1.1.2.5  skrll 		    dvname);
   1007  1.1.2.2  skrll 		return ENXIO;
   1008  1.1.2.2  skrll 	}
   1009  1.1.2.2  skrll 
   1010  1.1.2.5  skrll 	printf("%s: 802.11 address %s\n", dvname, ether_sprintf(*addr));
   1011  1.1.2.2  skrll 
   1012  1.1.2.2  skrll 	return 0;
   1013  1.1.2.2  skrll }
   1014  1.1.2.2  skrll 
   1015  1.1.2.5  skrll static uint8_t
   1016  1.1.2.2  skrll rtw_chan2txpower(struct rtw_srom *sr, struct ieee80211com *ic,
   1017  1.1.2.2  skrll     struct ieee80211_channel *chan)
   1018  1.1.2.2  skrll {
   1019  1.1.2.2  skrll 	u_int idx = RTW_SR_TXPOWER1 + ieee80211_chan2ieee(ic, chan) - 1;
   1020  1.1.2.2  skrll 	KASSERT2(idx >= RTW_SR_TXPOWER1 && idx <= RTW_SR_TXPOWER14,
   1021  1.1.2.2  skrll 	    ("%s: channel %d out of range", __func__,
   1022  1.1.2.2  skrll 	     idx - RTW_SR_TXPOWER1 + 1));
   1023  1.1.2.2  skrll 	return RTW_SR_GET(sr, idx);
   1024  1.1.2.2  skrll }
   1025  1.1.2.2  skrll 
   1026  1.1.2.2  skrll static void
   1027  1.1.2.5  skrll rtw_txdesc_blk_init_all(struct rtw_txdesc_blk *tdb)
   1028  1.1.2.2  skrll {
   1029  1.1.2.2  skrll 	int pri;
   1030  1.1.2.2  skrll 	u_int ndesc[RTW_NTXPRI] =
   1031  1.1.2.2  skrll 	    {RTW_NTXDESCLO, RTW_NTXDESCMD, RTW_NTXDESCHI, RTW_NTXDESCBCN};
   1032  1.1.2.2  skrll 
   1033  1.1.2.2  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   1034  1.1.2.5  skrll 		tdb[pri].tdb_nfree = ndesc[pri];
   1035  1.1.2.5  skrll 		tdb[pri].tdb_next = 0;
   1036  1.1.2.2  skrll 	}
   1037  1.1.2.2  skrll }
   1038  1.1.2.2  skrll 
   1039  1.1.2.2  skrll static int
   1040  1.1.2.5  skrll rtw_txsoft_blk_init(struct rtw_txsoft_blk *tsb)
   1041  1.1.2.2  skrll {
   1042  1.1.2.2  skrll 	int i;
   1043  1.1.2.5  skrll 	struct rtw_txsoft *ts;
   1044  1.1.2.2  skrll 
   1045  1.1.2.5  skrll 	SIMPLEQ_INIT(&tsb->tsb_dirtyq);
   1046  1.1.2.5  skrll 	SIMPLEQ_INIT(&tsb->tsb_freeq);
   1047  1.1.2.5  skrll 	for (i = 0; i < tsb->tsb_ndesc; i++) {
   1048  1.1.2.5  skrll 		ts = &tsb->tsb_desc[i];
   1049  1.1.2.5  skrll 		ts->ts_mbuf = NULL;
   1050  1.1.2.5  skrll 		SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
   1051  1.1.2.2  skrll 	}
   1052  1.1.2.2  skrll 	return 0;
   1053  1.1.2.2  skrll }
   1054  1.1.2.2  skrll 
   1055  1.1.2.2  skrll static void
   1056  1.1.2.5  skrll rtw_txsoft_blk_init_all(struct rtw_txsoft_blk *tsb)
   1057  1.1.2.2  skrll {
   1058  1.1.2.2  skrll 	int pri;
   1059  1.1.2.4  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++)
   1060  1.1.2.5  skrll 		rtw_txsoft_blk_init(&tsb[pri]);
   1061  1.1.2.2  skrll }
   1062  1.1.2.2  skrll 
   1063  1.1.2.2  skrll static __inline void
   1064  1.1.2.5  skrll rtw_rxdescs_sync(struct rtw_rxdesc_blk *rdb, int desc0, int nsync, int ops)
   1065  1.1.2.2  skrll {
   1066  1.1.2.5  skrll 	KASSERT(nsync <= rdb->rdb_ndesc);
   1067  1.1.2.2  skrll 	/* sync to end of ring */
   1068  1.1.2.5  skrll 	if (desc0 + nsync > rdb->rdb_ndesc) {
   1069  1.1.2.5  skrll 		bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
   1070  1.1.2.2  skrll 		    offsetof(struct rtw_descs, hd_rx[desc0]),
   1071  1.1.2.5  skrll 		    sizeof(struct rtw_rxdesc) * (rdb->rdb_ndesc - desc0), ops);
   1072  1.1.2.5  skrll 		nsync -= (rdb->rdb_ndesc - desc0);
   1073  1.1.2.2  skrll 		desc0 = 0;
   1074  1.1.2.2  skrll 	}
   1075  1.1.2.2  skrll 
   1076  1.1.2.5  skrll 	KASSERT(desc0 < rdb->rdb_ndesc);
   1077  1.1.2.5  skrll 	KASSERT(nsync <= rdb->rdb_ndesc);
   1078  1.1.2.5  skrll 	KASSERT(desc0 + nsync <= rdb->rdb_ndesc);
   1079  1.1.2.5  skrll 
   1080  1.1.2.2  skrll 	/* sync what remains */
   1081  1.1.2.5  skrll 	bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
   1082  1.1.2.2  skrll 	    offsetof(struct rtw_descs, hd_rx[desc0]),
   1083  1.1.2.2  skrll 	    sizeof(struct rtw_rxdesc) * nsync, ops);
   1084  1.1.2.2  skrll }
   1085  1.1.2.2  skrll 
   1086  1.1.2.2  skrll static void
   1087  1.1.2.5  skrll rtw_txdescs_sync(struct rtw_txdesc_blk *tdb, u_int desc0, u_int nsync, int ops)
   1088  1.1.2.2  skrll {
   1089  1.1.2.2  skrll 	/* sync to end of ring */
   1090  1.1.2.5  skrll 	if (desc0 + nsync > tdb->tdb_ndesc) {
   1091  1.1.2.5  skrll 		bus_dmamap_sync(tdb->tdb_dmat, tdb->tdb_dmamap,
   1092  1.1.2.5  skrll 		    tdb->tdb_ofs + sizeof(struct rtw_txdesc) * desc0,
   1093  1.1.2.5  skrll 		    sizeof(struct rtw_txdesc) * (tdb->tdb_ndesc - desc0),
   1094  1.1.2.2  skrll 		    ops);
   1095  1.1.2.5  skrll 		nsync -= (tdb->tdb_ndesc - desc0);
   1096  1.1.2.2  skrll 		desc0 = 0;
   1097  1.1.2.2  skrll 	}
   1098  1.1.2.2  skrll 
   1099  1.1.2.2  skrll 	/* sync what remains */
   1100  1.1.2.5  skrll 	bus_dmamap_sync(tdb->tdb_dmat, tdb->tdb_dmamap,
   1101  1.1.2.5  skrll 	    tdb->tdb_ofs + sizeof(struct rtw_txdesc) * desc0,
   1102  1.1.2.2  skrll 	    sizeof(struct rtw_txdesc) * nsync, ops);
   1103  1.1.2.2  skrll }
   1104  1.1.2.2  skrll 
   1105  1.1.2.2  skrll static void
   1106  1.1.2.5  skrll rtw_txdescs_sync_all(struct rtw_txdesc_blk *tdb)
   1107  1.1.2.2  skrll {
   1108  1.1.2.2  skrll 	int pri;
   1109  1.1.2.2  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   1110  1.1.2.5  skrll 		rtw_txdescs_sync(&tdb[pri], 0, tdb[pri].tdb_ndesc,
   1111  1.1.2.2  skrll 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1112  1.1.2.2  skrll 	}
   1113  1.1.2.2  skrll }
   1114  1.1.2.2  skrll 
   1115  1.1.2.2  skrll static void
   1116  1.1.2.5  skrll rtw_rxbufs_release(bus_dma_tag_t dmat, struct rtw_rxsoft *desc)
   1117  1.1.2.2  skrll {
   1118  1.1.2.2  skrll 	int i;
   1119  1.1.2.5  skrll 	struct rtw_rxsoft *rs;
   1120  1.1.2.2  skrll 
   1121  1.1.2.5  skrll 	for (i = 0; i < RTW_RXQLEN; i++) {
   1122  1.1.2.5  skrll 		rs = &desc[i];
   1123  1.1.2.5  skrll 		if (rs->rs_mbuf == NULL)
   1124  1.1.2.5  skrll 			continue;
   1125  1.1.2.5  skrll 		bus_dmamap_sync(dmat, rs->rs_dmamap, 0,
   1126  1.1.2.5  skrll 		    rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
   1127  1.1.2.5  skrll 		bus_dmamap_unload(dmat, rs->rs_dmamap);
   1128  1.1.2.5  skrll 		m_freem(rs->rs_mbuf);
   1129  1.1.2.5  skrll 		rs->rs_mbuf = NULL;
   1130  1.1.2.2  skrll 	}
   1131  1.1.2.2  skrll }
   1132  1.1.2.2  skrll 
   1133  1.1.2.2  skrll static __inline int
   1134  1.1.2.5  skrll rtw_rxsoft_alloc(bus_dma_tag_t dmat, struct rtw_rxsoft *rs)
   1135  1.1.2.2  skrll {
   1136  1.1.2.2  skrll 	int rc;
   1137  1.1.2.2  skrll 	struct mbuf *m;
   1138  1.1.2.2  skrll 
   1139  1.1.2.2  skrll 	MGETHDR(m, M_DONTWAIT, MT_DATA);
   1140  1.1.2.2  skrll 	if (m == NULL)
   1141  1.1.2.5  skrll 		return ENOBUFS;
   1142  1.1.2.2  skrll 
   1143  1.1.2.2  skrll 	MCLGET(m, M_DONTWAIT);
   1144  1.1.2.5  skrll 	if ((m->m_flags & M_EXT) == 0) {
   1145  1.1.2.5  skrll 		m_freem(m);
   1146  1.1.2.5  skrll 		return ENOBUFS;
   1147  1.1.2.5  skrll 	}
   1148  1.1.2.2  skrll 
   1149  1.1.2.2  skrll 	m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
   1150  1.1.2.2  skrll 
   1151  1.1.2.5  skrll 	if (rs->rs_mbuf != NULL)
   1152  1.1.2.5  skrll 		bus_dmamap_unload(dmat, rs->rs_dmamap);
   1153  1.1.2.5  skrll 
   1154  1.1.2.5  skrll 	rs->rs_mbuf = NULL;
   1155  1.1.2.5  skrll 
   1156  1.1.2.5  skrll 	rc = bus_dmamap_load_mbuf(dmat, rs->rs_dmamap, m, BUS_DMA_NOWAIT);
   1157  1.1.2.5  skrll 	if (rc != 0) {
   1158  1.1.2.5  skrll 		m_freem(m);
   1159  1.1.2.5  skrll 		return -1;
   1160  1.1.2.5  skrll 	}
   1161  1.1.2.2  skrll 
   1162  1.1.2.5  skrll 	rs->rs_mbuf = m;
   1163  1.1.2.2  skrll 
   1164  1.1.2.2  skrll 	return 0;
   1165  1.1.2.2  skrll }
   1166  1.1.2.2  skrll 
   1167  1.1.2.2  skrll static int
   1168  1.1.2.5  skrll rtw_rxsoft_init_all(bus_dma_tag_t dmat, struct rtw_rxsoft *desc,
   1169  1.1.2.5  skrll     int *ndesc, const char *dvname)
   1170  1.1.2.2  skrll {
   1171  1.1.2.5  skrll 	int i, rc = 0;
   1172  1.1.2.5  skrll 	struct rtw_rxsoft *rs;
   1173  1.1.2.2  skrll 
   1174  1.1.2.5  skrll 	for (i = 0; i < RTW_RXQLEN; i++) {
   1175  1.1.2.5  skrll 		rs = &desc[i];
   1176  1.1.2.5  skrll 		/* we're in rtw_init, so there should be no mbufs allocated */
   1177  1.1.2.5  skrll 		KASSERT(rs->rs_mbuf == NULL);
   1178  1.1.2.5  skrll #ifdef RTW_DEBUG
   1179  1.1.2.5  skrll 		if (i == rtw_rxbufs_limit) {
   1180  1.1.2.5  skrll 			printf("%s: TEST hit %d-buffer limit\n", dvname, i);
   1181  1.1.2.5  skrll 			rc = ENOBUFS;
   1182  1.1.2.5  skrll 			break;
   1183  1.1.2.5  skrll 		}
   1184  1.1.2.5  skrll #endif /* RTW_DEBUG */
   1185  1.1.2.5  skrll 		if ((rc = rtw_rxsoft_alloc(dmat, rs)) != 0) {
   1186  1.1.2.5  skrll 			printf("%s: rtw_rxsoft_alloc failed, %d buffers, "
   1187  1.1.2.5  skrll 			       "rc %d\n", dvname, i, rc);
   1188  1.1.2.5  skrll 			break;
   1189  1.1.2.2  skrll 		}
   1190  1.1.2.2  skrll 	}
   1191  1.1.2.5  skrll 	*ndesc = i;
   1192  1.1.2.5  skrll 	return rc;
   1193  1.1.2.2  skrll }
   1194  1.1.2.2  skrll 
   1195  1.1.2.2  skrll static __inline void
   1196  1.1.2.5  skrll rtw_rxdesc_init(struct rtw_rxdesc_blk *rdb, struct rtw_rxsoft *rs,
   1197  1.1.2.5  skrll     int idx, int kick)
   1198  1.1.2.2  skrll {
   1199  1.1.2.5  skrll 	int is_last = (idx == rdb->rdb_ndesc - 1);
   1200  1.1.2.5  skrll 	uint32_t ctl, octl, obuf;
   1201  1.1.2.5  skrll 	struct rtw_rxdesc *rd = &rdb->rdb_desc[idx];
   1202  1.1.2.2  skrll 
   1203  1.1.2.5  skrll 	obuf = rd->rd_buf;
   1204  1.1.2.5  skrll 	rd->rd_buf = htole32(rs->rs_dmamap->dm_segs[0].ds_addr);
   1205  1.1.2.2  skrll 
   1206  1.1.2.5  skrll 	ctl = LSHIFT(rs->rs_mbuf->m_len, RTW_RXCTL_LENGTH_MASK) |
   1207  1.1.2.2  skrll 	    RTW_RXCTL_OWN | RTW_RXCTL_FS | RTW_RXCTL_LS;
   1208  1.1.2.2  skrll 
   1209  1.1.2.2  skrll 	if (is_last)
   1210  1.1.2.2  skrll 		ctl |= RTW_RXCTL_EOR;
   1211  1.1.2.2  skrll 
   1212  1.1.2.5  skrll 	octl = rd->rd_ctl;
   1213  1.1.2.5  skrll 	rd->rd_ctl = htole32(ctl);
   1214  1.1.2.5  skrll 
   1215  1.1.2.5  skrll 	RTW_DPRINTF(
   1216  1.1.2.5  skrll 	    kick ? (RTW_DEBUG_RECV_DESC | RTW_DEBUG_IO_KICK)
   1217  1.1.2.5  skrll 	         : RTW_DEBUG_RECV_DESC,
   1218  1.1.2.5  skrll 	    ("%s: rd %p buf %08x -> %08x ctl %08x -> %08x\n", __func__, rd,
   1219  1.1.2.5  skrll 	     le32toh(obuf), le32toh(rd->rd_buf), le32toh(octl),
   1220  1.1.2.5  skrll 	     le32toh(rd->rd_ctl)));
   1221  1.1.2.2  skrll 
   1222  1.1.2.2  skrll 	/* sync the mbuf */
   1223  1.1.2.5  skrll 	bus_dmamap_sync(rdb->rdb_dmat, rs->rs_dmamap, 0,
   1224  1.1.2.5  skrll 	    rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
   1225  1.1.2.2  skrll 
   1226  1.1.2.2  skrll 	/* sync the descriptor */
   1227  1.1.2.5  skrll 	bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
   1228  1.1.2.5  skrll 	    RTW_DESC_OFFSET(hd_rx, idx), sizeof(struct rtw_rxdesc),
   1229  1.1.2.2  skrll 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   1230  1.1.2.2  skrll }
   1231  1.1.2.2  skrll 
   1232  1.1.2.2  skrll static void
   1233  1.1.2.5  skrll rtw_rxdesc_init_all(struct rtw_rxdesc_blk *rdb, struct rtw_rxsoft *ctl, int kick)
   1234  1.1.2.2  skrll {
   1235  1.1.2.2  skrll 	int i;
   1236  1.1.2.5  skrll 	struct rtw_rxdesc *rd;
   1237  1.1.2.5  skrll 	struct rtw_rxsoft *rs;
   1238  1.1.2.2  skrll 
   1239  1.1.2.5  skrll 	for (i = 0; i < rdb->rdb_ndesc; i++) {
   1240  1.1.2.5  skrll 		rd = &rdb->rdb_desc[i];
   1241  1.1.2.5  skrll 		rs = &ctl[i];
   1242  1.1.2.5  skrll 		rtw_rxdesc_init(rdb, rs, i, kick);
   1243  1.1.2.2  skrll 	}
   1244  1.1.2.5  skrll 	rdb->rdb_next = 0;
   1245  1.1.2.2  skrll }
   1246  1.1.2.2  skrll 
   1247  1.1.2.2  skrll static void
   1248  1.1.2.5  skrll rtw_io_enable(struct rtw_regs *regs, uint8_t flags, int enable)
   1249  1.1.2.2  skrll {
   1250  1.1.2.5  skrll 	uint8_t cr;
   1251  1.1.2.2  skrll 
   1252  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_IOSTATE, ("%s: %s 0x%02x\n", __func__,
   1253  1.1.2.2  skrll 	    enable ? "enable" : "disable", flags));
   1254  1.1.2.2  skrll 
   1255  1.1.2.2  skrll 	cr = RTW_READ8(regs, RTW_CR);
   1256  1.1.2.2  skrll 
   1257  1.1.2.2  skrll 	/* XXX reference source does not enable MULRW */
   1258  1.1.2.2  skrll #if 0
   1259  1.1.2.2  skrll 	/* enable PCI Read/Write Multiple */
   1260  1.1.2.2  skrll 	cr |= RTW_CR_MULRW;
   1261  1.1.2.2  skrll #endif
   1262  1.1.2.2  skrll 
   1263  1.1.2.2  skrll 	RTW_RBW(regs, RTW_CR, RTW_CR);	/* XXX paranoia? */
   1264  1.1.2.2  skrll 	if (enable)
   1265  1.1.2.2  skrll 		cr |= flags;
   1266  1.1.2.2  skrll 	else
   1267  1.1.2.2  skrll 		cr &= ~flags;
   1268  1.1.2.2  skrll 	RTW_WRITE8(regs, RTW_CR, cr);
   1269  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_CR, RTW_CR);
   1270  1.1.2.2  skrll }
   1271  1.1.2.2  skrll 
   1272  1.1.2.2  skrll static void
   1273  1.1.2.5  skrll rtw_intr_rx(struct rtw_softc *sc, uint16_t isr)
   1274  1.1.2.2  skrll {
   1275  1.1.2.5  skrll #define	IS_BEACON(__fc0)						\
   1276  1.1.2.5  skrll     ((__fc0 & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==\
   1277  1.1.2.5  skrll      (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_BEACON))
   1278  1.1.2.5  skrll 
   1279  1.1.2.5  skrll 	static const int ratetbl[4] = {2, 4, 11, 22};	/* convert rates:
   1280  1.1.2.5  skrll 							 * hardware -> net80211
   1281  1.1.2.5  skrll 							 */
   1282  1.1.2.5  skrll 	u_int next, nproc = 0;
   1283  1.1.2.5  skrll 	int hwrate, len, rate, rssi, sq;
   1284  1.1.2.5  skrll 	uint32_t hrssi, hstat, htsfth, htsftl;
   1285  1.1.2.5  skrll 	struct rtw_rxdesc *rd;
   1286  1.1.2.5  skrll 	struct rtw_rxsoft *rs;
   1287  1.1.2.5  skrll 	struct rtw_rxdesc_blk *rdb;
   1288  1.1.2.2  skrll 	struct mbuf *m;
   1289  1.1.2.2  skrll 
   1290  1.1.2.2  skrll 	struct ieee80211_node *ni;
   1291  1.1.2.2  skrll 	struct ieee80211_frame *wh;
   1292  1.1.2.2  skrll 
   1293  1.1.2.5  skrll 	rdb = &sc->sc_rxdesc_blk;
   1294  1.1.2.2  skrll 
   1295  1.1.2.5  skrll 	KASSERT(rdb->rdb_next < rdb->rdb_ndesc);
   1296  1.1.2.5  skrll 
   1297  1.1.2.5  skrll 	for (next = rdb->rdb_next; ; next = (next + 1) % rdb->rdb_ndesc) {
   1298  1.1.2.5  skrll 		rtw_rxdescs_sync(rdb, next, 1,
   1299  1.1.2.5  skrll 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1300  1.1.2.5  skrll 		rd = &rdb->rdb_desc[next];
   1301  1.1.2.5  skrll 		rs = &sc->sc_rxsoft[next];
   1302  1.1.2.5  skrll 
   1303  1.1.2.5  skrll 		hstat = le32toh(rd->rd_stat);
   1304  1.1.2.5  skrll 		hrssi = le32toh(rd->rd_rssi);
   1305  1.1.2.5  skrll 		htsfth = le32toh(rd->rd_tsfth);
   1306  1.1.2.5  skrll 		htsftl = le32toh(rd->rd_tsftl);
   1307  1.1.2.5  skrll 
   1308  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
   1309  1.1.2.5  skrll 		    ("%s: rxdesc[%d] hstat %08x hrssi %08x htsft %08x%08x\n",
   1310  1.1.2.5  skrll 		    __func__, next, hstat, hrssi, htsfth, htsftl));
   1311  1.1.2.5  skrll 
   1312  1.1.2.5  skrll 		++nproc;
   1313  1.1.2.5  skrll 
   1314  1.1.2.5  skrll 		/* still belongs to NIC */
   1315  1.1.2.5  skrll 		if ((hstat & RTW_RXSTAT_OWN) != 0) {
   1316  1.1.2.5  skrll 			if (nproc > 1)
   1317  1.1.2.5  skrll 				break;
   1318  1.1.2.5  skrll 
   1319  1.1.2.5  skrll 			/* sometimes the NIC skips to the 0th descriptor */
   1320  1.1.2.5  skrll 			rtw_rxdescs_sync(rdb, 0, 1,
   1321  1.1.2.5  skrll 			    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1322  1.1.2.5  skrll 			rd = &rdb->rdb_desc[0];
   1323  1.1.2.5  skrll 			if ((rd->rd_stat & htole32(RTW_RXSTAT_OWN)) != 0)
   1324  1.1.2.5  skrll 				break;
   1325  1.1.2.5  skrll 			RTW_DPRINTF(RTW_DEBUG_BUGS,
   1326  1.1.2.5  skrll 			    ("%s: NIC skipped to rxdesc[0]\n",
   1327  1.1.2.5  skrll 			     sc->sc_dev.dv_xname));
   1328  1.1.2.5  skrll 			next = 0;
   1329  1.1.2.5  skrll 			continue;
   1330  1.1.2.5  skrll 		}
   1331  1.1.2.2  skrll 
   1332  1.1.2.2  skrll 		if ((hstat & RTW_RXSTAT_IOERROR) != 0) {
   1333  1.1.2.2  skrll 			printf("%s: DMA error/FIFO overflow %08x, "
   1334  1.1.2.2  skrll 			    "rx descriptor %d\n", sc->sc_dev.dv_xname,
   1335  1.1.2.2  skrll 			    hstat & RTW_RXSTAT_IOERROR, next);
   1336  1.1.2.5  skrll 			sc->sc_if.if_ierrors++;
   1337  1.1.2.2  skrll 			goto next;
   1338  1.1.2.2  skrll 		}
   1339  1.1.2.2  skrll 
   1340  1.1.2.5  skrll 		len = MASK_AND_RSHIFT(hstat, RTW_RXSTAT_LENGTH_MASK);
   1341  1.1.2.5  skrll 		if (len < IEEE80211_MIN_LEN) {
   1342  1.1.2.5  skrll 			sc->sc_ic.ic_stats.is_rx_tooshort++;
   1343  1.1.2.5  skrll 			goto next;
   1344  1.1.2.2  skrll 		}
   1345  1.1.2.2  skrll 
   1346  1.1.2.5  skrll 		hwrate = MASK_AND_RSHIFT(hstat, RTW_RXSTAT_RATE_MASK);
   1347  1.1.2.5  skrll 		if (hwrate >= sizeof(ratetbl) / sizeof(ratetbl[0])) {
   1348  1.1.2.5  skrll 			printf("%s: unknown rate #%d\n", sc->sc_dev.dv_xname,
   1349  1.1.2.5  skrll 			    MASK_AND_RSHIFT(hstat, RTW_RXSTAT_RATE_MASK));
   1350  1.1.2.5  skrll 			sc->sc_if.if_ierrors++;
   1351  1.1.2.5  skrll 			goto next;
   1352  1.1.2.5  skrll 		}
   1353  1.1.2.5  skrll 		rate = ratetbl[hwrate];
   1354  1.1.2.2  skrll 
   1355  1.1.2.2  skrll #ifdef RTW_DEBUG
   1356  1.1.2.2  skrll #define PRINTSTAT(flag) do { \
   1357  1.1.2.2  skrll 	if ((hstat & flag) != 0) { \
   1358  1.1.2.2  skrll 		printf("%s" #flag, delim); \
   1359  1.1.2.2  skrll 		delim = ","; \
   1360  1.1.2.2  skrll 	} \
   1361  1.1.2.2  skrll } while (0)
   1362  1.1.2.5  skrll 		if ((rtw_debug & RTW_DEBUG_RECV_DESC) != 0) {
   1363  1.1.2.2  skrll 			const char *delim = "<";
   1364  1.1.2.2  skrll 			printf("%s: ", sc->sc_dev.dv_xname);
   1365  1.1.2.2  skrll 			if ((hstat & RTW_RXSTAT_DEBUG) != 0) {
   1366  1.1.2.5  skrll 				printf("status %08x", hstat);
   1367  1.1.2.2  skrll 				PRINTSTAT(RTW_RXSTAT_SPLCP);
   1368  1.1.2.2  skrll 				PRINTSTAT(RTW_RXSTAT_MAR);
   1369  1.1.2.2  skrll 				PRINTSTAT(RTW_RXSTAT_PAR);
   1370  1.1.2.2  skrll 				PRINTSTAT(RTW_RXSTAT_BAR);
   1371  1.1.2.2  skrll 				PRINTSTAT(RTW_RXSTAT_PWRMGT);
   1372  1.1.2.2  skrll 				PRINTSTAT(RTW_RXSTAT_CRC32);
   1373  1.1.2.2  skrll 				PRINTSTAT(RTW_RXSTAT_ICV);
   1374  1.1.2.2  skrll 				printf(">, ");
   1375  1.1.2.2  skrll 			}
   1376  1.1.2.2  skrll 			printf("rate %d.%d Mb/s, time %08x%08x\n",
   1377  1.1.2.5  skrll 			    (rate * 5) / 10, (rate * 5) % 10, htsfth, htsftl);
   1378  1.1.2.2  skrll 		}
   1379  1.1.2.2  skrll #endif /* RTW_DEBUG */
   1380  1.1.2.2  skrll 
   1381  1.1.2.2  skrll 		if ((hstat & RTW_RXSTAT_RES) != 0 &&
   1382  1.1.2.2  skrll 		    sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR)
   1383  1.1.2.2  skrll 			goto next;
   1384  1.1.2.2  skrll 
   1385  1.1.2.2  skrll 		/* if bad flags, skip descriptor */
   1386  1.1.2.2  skrll 		if ((hstat & RTW_RXSTAT_ONESEG) != RTW_RXSTAT_ONESEG) {
   1387  1.1.2.2  skrll 			printf("%s: too many rx segments\n",
   1388  1.1.2.2  skrll 			    sc->sc_dev.dv_xname);
   1389  1.1.2.2  skrll 			goto next;
   1390  1.1.2.2  skrll 		}
   1391  1.1.2.2  skrll 
   1392  1.1.2.5  skrll 		bus_dmamap_sync(sc->sc_dmat, rs->rs_dmamap, 0,
   1393  1.1.2.5  skrll 		    rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
   1394  1.1.2.5  skrll 
   1395  1.1.2.5  skrll 		m = rs->rs_mbuf;
   1396  1.1.2.2  skrll 
   1397  1.1.2.2  skrll 		/* if temporarily out of memory, re-use mbuf */
   1398  1.1.2.5  skrll 		switch (rtw_rxsoft_alloc(sc->sc_dmat, rs)) {
   1399  1.1.2.5  skrll 		case 0:
   1400  1.1.2.5  skrll 			break;
   1401  1.1.2.5  skrll 		case ENOBUFS:
   1402  1.1.2.5  skrll 			printf("%s: rtw_rxsoft_alloc(, %d) failed, "
   1403  1.1.2.5  skrll 			    "dropping packet\n", sc->sc_dev.dv_xname, next);
   1404  1.1.2.2  skrll 			goto next;
   1405  1.1.2.5  skrll 		default:
   1406  1.1.2.5  skrll 			/* XXX shorten rx ring, instead? */
   1407  1.1.2.5  skrll 			panic("%s: could not load DMA map\n",
   1408  1.1.2.5  skrll 			    sc->sc_dev.dv_xname);
   1409  1.1.2.2  skrll 		}
   1410  1.1.2.2  skrll 
   1411  1.1.2.2  skrll 		if (sc->sc_rfchipid == RTW_RFCHIPID_PHILIPS)
   1412  1.1.2.2  skrll 			rssi = MASK_AND_RSHIFT(hrssi, RTW_RXRSSI_RSSI);
   1413  1.1.2.2  skrll 		else {
   1414  1.1.2.2  skrll 			rssi = MASK_AND_RSHIFT(hrssi, RTW_RXRSSI_IMR_RSSI);
   1415  1.1.2.2  skrll 			/* TBD find out each front-end's LNA gain in the
   1416  1.1.2.2  skrll 			 * front-end's units
   1417  1.1.2.2  skrll 			 */
   1418  1.1.2.2  skrll 			if ((hrssi & RTW_RXRSSI_IMR_LNA) == 0)
   1419  1.1.2.2  skrll 				rssi |= 0x80;
   1420  1.1.2.2  skrll 		}
   1421  1.1.2.5  skrll 		sq = MASK_AND_RSHIFT(hrssi, RTW_RXRSSI_SQ);
   1422  1.1.2.2  skrll 
   1423  1.1.2.5  skrll 		/* Note well: now we cannot recycle the rs_mbuf unless
   1424  1.1.2.5  skrll 		 * we restore its original length.
   1425  1.1.2.5  skrll 		 */
   1426  1.1.2.5  skrll 		m->m_pkthdr.rcvif = &sc->sc_if;
   1427  1.1.2.5  skrll 		m->m_pkthdr.len = m->m_len = len;
   1428  1.1.2.2  skrll 		m->m_flags |= M_HASFCS;
   1429  1.1.2.2  skrll 
   1430  1.1.2.2  skrll 		wh = mtod(m, struct ieee80211_frame *);
   1431  1.1.2.5  skrll 
   1432  1.1.2.5  skrll 		if (!IS_BEACON(wh->i_fc[0]))
   1433  1.1.2.5  skrll 			sc->sc_led_state.ls_event |= RTW_LED_S_RX;
   1434  1.1.2.2  skrll 		/* TBD use _MAR, _BAR, _PAR flags as hints to _find_rxnode? */
   1435  1.1.2.2  skrll 		ni = ieee80211_find_rxnode(&sc->sc_ic, wh);
   1436  1.1.2.2  skrll 
   1437  1.1.2.2  skrll 		sc->sc_tsfth = htsfth;
   1438  1.1.2.2  skrll 
   1439  1.1.2.5  skrll #ifdef RTW_DEBUG
   1440  1.1.2.5  skrll 		if ((sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
   1441  1.1.2.5  skrll 		    (IFF_DEBUG|IFF_LINK2)) {
   1442  1.1.2.5  skrll 			ieee80211_dump_pkt(mtod(m, uint8_t *), m->m_pkthdr.len,
   1443  1.1.2.5  skrll 			    rate, rssi);
   1444  1.1.2.5  skrll 		}
   1445  1.1.2.5  skrll #endif /* RTW_DEBUG */
   1446  1.1.2.5  skrll 
   1447  1.1.2.5  skrll #if NBPFILTER > 0
   1448  1.1.2.5  skrll 		if (sc->sc_radiobpf != NULL) {
   1449  1.1.2.5  skrll 			struct ieee80211com *ic = &sc->sc_ic;
   1450  1.1.2.5  skrll 			struct rtw_rx_radiotap_header *rr = &sc->sc_rxtap;
   1451  1.1.2.5  skrll 
   1452  1.1.2.5  skrll 			rr->rr_tsft =
   1453  1.1.2.5  skrll 			    htole64(((uint64_t)htsfth << 32) | htsftl);
   1454  1.1.2.5  skrll 
   1455  1.1.2.5  skrll 			if ((hstat & RTW_RXSTAT_SPLCP) != 0)
   1456  1.1.2.5  skrll 				rr->rr_flags = IEEE80211_RADIOTAP_F_SHORTPRE;
   1457  1.1.2.5  skrll 
   1458  1.1.2.5  skrll 			rr->rr_flags = 0;
   1459  1.1.2.5  skrll 			rr->rr_rate = rate;
   1460  1.1.2.5  skrll 			rr->rr_chan_freq =
   1461  1.1.2.5  skrll 			    htole16(ic->ic_bss->ni_chan->ic_freq);
   1462  1.1.2.5  skrll 			rr->rr_chan_flags =
   1463  1.1.2.5  skrll 			    htole16(ic->ic_bss->ni_chan->ic_flags);
   1464  1.1.2.5  skrll 			rr->rr_antsignal = rssi;
   1465  1.1.2.5  skrll 			rr->rr_barker_lock = htole16(sq);
   1466  1.1.2.5  skrll 
   1467  1.1.2.5  skrll 			bpf_mtap2(sc->sc_radiobpf, (caddr_t)rr,
   1468  1.1.2.5  skrll 			    sizeof(sc->sc_rxtapu), m);
   1469  1.1.2.5  skrll 		}
   1470  1.1.2.5  skrll #endif /* NPBFILTER > 0 */
   1471  1.1.2.5  skrll 
   1472  1.1.2.2  skrll 		ieee80211_input(&sc->sc_if, m, ni, rssi, htsftl);
   1473  1.1.2.2  skrll 		ieee80211_release_node(&sc->sc_ic, ni);
   1474  1.1.2.2  skrll next:
   1475  1.1.2.5  skrll 		rtw_rxdesc_init(rdb, rs, next, 0);
   1476  1.1.2.2  skrll 	}
   1477  1.1.2.5  skrll 	rdb->rdb_next = next;
   1478  1.1.2.5  skrll 
   1479  1.1.2.5  skrll 	KASSERT(rdb->rdb_next < rdb->rdb_ndesc);
   1480  1.1.2.4  skrll 
   1481  1.1.2.2  skrll 	return;
   1482  1.1.2.5  skrll #undef IS_BEACON
   1483  1.1.2.5  skrll }
   1484  1.1.2.5  skrll 
   1485  1.1.2.5  skrll static void
   1486  1.1.2.5  skrll rtw_txsoft_release(bus_dma_tag_t dmat, struct ieee80211com *ic,
   1487  1.1.2.5  skrll     struct rtw_txsoft *ts)
   1488  1.1.2.5  skrll {
   1489  1.1.2.5  skrll 	struct mbuf *m;
   1490  1.1.2.5  skrll 	struct ieee80211_node *ni;
   1491  1.1.2.5  skrll 
   1492  1.1.2.5  skrll 	m = ts->ts_mbuf;
   1493  1.1.2.5  skrll 	ni = ts->ts_ni;
   1494  1.1.2.5  skrll 	KASSERT(m != NULL);
   1495  1.1.2.5  skrll 	KASSERT(ni != NULL);
   1496  1.1.2.5  skrll 	ts->ts_mbuf = NULL;
   1497  1.1.2.5  skrll 	ts->ts_ni = NULL;
   1498  1.1.2.5  skrll 
   1499  1.1.2.5  skrll 	bus_dmamap_sync(dmat, ts->ts_dmamap, 0, ts->ts_dmamap->dm_mapsize,
   1500  1.1.2.5  skrll 	    BUS_DMASYNC_POSTWRITE);
   1501  1.1.2.5  skrll 	bus_dmamap_unload(dmat, ts->ts_dmamap);
   1502  1.1.2.5  skrll 	m_freem(m);
   1503  1.1.2.5  skrll 	ieee80211_release_node(ic, ni);
   1504  1.1.2.5  skrll }
   1505  1.1.2.5  skrll 
   1506  1.1.2.5  skrll static void
   1507  1.1.2.5  skrll rtw_txsofts_release(bus_dma_tag_t dmat, struct ieee80211com *ic,
   1508  1.1.2.5  skrll     struct rtw_txsoft_blk *tsb)
   1509  1.1.2.5  skrll {
   1510  1.1.2.5  skrll 	struct rtw_txsoft *ts;
   1511  1.1.2.5  skrll 
   1512  1.1.2.5  skrll 	while ((ts = SIMPLEQ_FIRST(&tsb->tsb_dirtyq)) != NULL) {
   1513  1.1.2.5  skrll 		rtw_txsoft_release(dmat, ic, ts);
   1514  1.1.2.5  skrll 		SIMPLEQ_REMOVE_HEAD(&tsb->tsb_dirtyq, ts_q);
   1515  1.1.2.5  skrll 		SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
   1516  1.1.2.5  skrll 	}
   1517  1.1.2.5  skrll }
   1518  1.1.2.5  skrll 
   1519  1.1.2.5  skrll static __inline void
   1520  1.1.2.5  skrll rtw_collect_txpkt(struct rtw_softc *sc, struct rtw_txdesc_blk *tdb,
   1521  1.1.2.5  skrll     struct rtw_txsoft *ts, int ndesc)
   1522  1.1.2.5  skrll {
   1523  1.1.2.5  skrll 	uint32_t hstat;
   1524  1.1.2.5  skrll 	int data_retry, rts_retry;
   1525  1.1.2.5  skrll 	struct rtw_txdesc *tdn;
   1526  1.1.2.5  skrll 	const char *condstring;
   1527  1.1.2.5  skrll 
   1528  1.1.2.5  skrll 	rtw_txsoft_release(sc->sc_dmat, &sc->sc_ic, ts);
   1529  1.1.2.5  skrll 
   1530  1.1.2.5  skrll 	tdb->tdb_nfree += ndesc;
   1531  1.1.2.5  skrll 
   1532  1.1.2.5  skrll 	tdn = &tdb->tdb_desc[ts->ts_last];
   1533  1.1.2.5  skrll 
   1534  1.1.2.5  skrll 	hstat = le32toh(tdn->td_stat);
   1535  1.1.2.5  skrll 	rts_retry = MASK_AND_RSHIFT(hstat, RTW_TXSTAT_RTSRETRY_MASK);
   1536  1.1.2.5  skrll 	data_retry = MASK_AND_RSHIFT(hstat, RTW_TXSTAT_DRC_MASK);
   1537  1.1.2.5  skrll 
   1538  1.1.2.5  skrll 	sc->sc_if.if_collisions += rts_retry + data_retry;
   1539  1.1.2.5  skrll 
   1540  1.1.2.5  skrll 	if ((hstat & RTW_TXSTAT_TOK) != 0)
   1541  1.1.2.5  skrll 		condstring = "ok";
   1542  1.1.2.5  skrll 	else {
   1543  1.1.2.5  skrll 		sc->sc_if.if_oerrors++;
   1544  1.1.2.5  skrll 		condstring = "error";
   1545  1.1.2.5  skrll 	}
   1546  1.1.2.5  skrll 
   1547  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
   1548  1.1.2.5  skrll 	    ("%s: ts %p txdesc[%d, %d] %s tries rts %u data %u\n",
   1549  1.1.2.5  skrll 	    sc->sc_dev.dv_xname, ts, ts->ts_first, ts->ts_last,
   1550  1.1.2.5  skrll 	    condstring, rts_retry, data_retry));
   1551  1.1.2.5  skrll }
   1552  1.1.2.5  skrll 
   1553  1.1.2.5  skrll /* Collect transmitted packets. */
   1554  1.1.2.5  skrll static __inline void
   1555  1.1.2.5  skrll rtw_collect_txring(struct rtw_softc *sc, struct rtw_txsoft_blk *tsb,
   1556  1.1.2.5  skrll     struct rtw_txdesc_blk *tdb)
   1557  1.1.2.5  skrll {
   1558  1.1.2.5  skrll 	int ndesc;
   1559  1.1.2.5  skrll 	struct rtw_txsoft *ts;
   1560  1.1.2.5  skrll 
   1561  1.1.2.5  skrll 	while ((ts = SIMPLEQ_FIRST(&tsb->tsb_dirtyq)) != NULL) {
   1562  1.1.2.5  skrll 		ndesc = 1 + ts->ts_last - ts->ts_first;
   1563  1.1.2.5  skrll 		if (ts->ts_last < ts->ts_first)
   1564  1.1.2.5  skrll 			ndesc += tdb->tdb_ndesc;
   1565  1.1.2.5  skrll 
   1566  1.1.2.5  skrll 		KASSERT(ndesc > 0);
   1567  1.1.2.5  skrll 
   1568  1.1.2.5  skrll 		rtw_txdescs_sync(tdb, ts->ts_first, ndesc,
   1569  1.1.2.5  skrll 		    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1570  1.1.2.5  skrll 
   1571  1.1.2.5  skrll 		if ((tdb->tdb_desc[ts->ts_last].td_stat &
   1572  1.1.2.5  skrll 		    htole32(RTW_TXSTAT_OWN)) != 0)
   1573  1.1.2.5  skrll 			break;
   1574  1.1.2.5  skrll 
   1575  1.1.2.5  skrll 		rtw_collect_txpkt(sc, tdb, ts, ndesc);
   1576  1.1.2.5  skrll 		SIMPLEQ_REMOVE_HEAD(&tsb->tsb_dirtyq, ts_q);
   1577  1.1.2.5  skrll 		SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
   1578  1.1.2.5  skrll 		sc->sc_if.if_flags &= ~IFF_OACTIVE;
   1579  1.1.2.5  skrll 	}
   1580  1.1.2.5  skrll 	if (ts == NULL)
   1581  1.1.2.5  skrll 		tsb->tsb_tx_timer = 0;
   1582  1.1.2.2  skrll }
   1583  1.1.2.2  skrll 
   1584  1.1.2.2  skrll static void
   1585  1.1.2.5  skrll rtw_intr_tx(struct rtw_softc *sc, uint16_t isr)
   1586  1.1.2.2  skrll {
   1587  1.1.2.5  skrll 	int pri;
   1588  1.1.2.5  skrll 	struct rtw_txsoft_blk	*tsb;
   1589  1.1.2.5  skrll 	struct rtw_txdesc_blk	*tdb;
   1590  1.1.2.5  skrll 
   1591  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   1592  1.1.2.5  skrll 		tsb = &sc->sc_txsoft_blk[pri];
   1593  1.1.2.5  skrll 		tdb = &sc->sc_txdesc_blk[pri];
   1594  1.1.2.5  skrll 
   1595  1.1.2.5  skrll 		rtw_collect_txring(sc, tsb, tdb);
   1596  1.1.2.5  skrll 
   1597  1.1.2.5  skrll 		if ((isr & RTW_INTR_TX) != 0)
   1598  1.1.2.5  skrll 			rtw_start(&sc->sc_if);
   1599  1.1.2.5  skrll 	}
   1600  1.1.2.5  skrll 
   1601  1.1.2.2  skrll 	/* TBD */
   1602  1.1.2.2  skrll 	return;
   1603  1.1.2.2  skrll }
   1604  1.1.2.2  skrll 
   1605  1.1.2.2  skrll static void
   1606  1.1.2.5  skrll rtw_intr_beacon(struct rtw_softc *sc, uint16_t isr)
   1607  1.1.2.2  skrll {
   1608  1.1.2.2  skrll 	/* TBD */
   1609  1.1.2.2  skrll 	return;
   1610  1.1.2.2  skrll }
   1611  1.1.2.2  skrll 
   1612  1.1.2.2  skrll static void
   1613  1.1.2.2  skrll rtw_intr_atim(struct rtw_softc *sc)
   1614  1.1.2.2  skrll {
   1615  1.1.2.2  skrll 	/* TBD */
   1616  1.1.2.2  skrll 	return;
   1617  1.1.2.2  skrll }
   1618  1.1.2.2  skrll 
   1619  1.1.2.5  skrll #ifdef RTW_DEBUG
   1620  1.1.2.5  skrll static void
   1621  1.1.2.5  skrll rtw_dump_rings(struct rtw_softc *sc)
   1622  1.1.2.5  skrll {
   1623  1.1.2.5  skrll 	struct rtw_txdesc_blk *tdb;
   1624  1.1.2.5  skrll 	struct rtw_rxdesc *rd;
   1625  1.1.2.5  skrll 	struct rtw_rxdesc_blk *rdb;
   1626  1.1.2.5  skrll 	int desc, pri;
   1627  1.1.2.5  skrll 
   1628  1.1.2.5  skrll 	if ((rtw_debug & RTW_DEBUG_IO_KICK) == 0)
   1629  1.1.2.5  skrll 		return;
   1630  1.1.2.5  skrll 
   1631  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   1632  1.1.2.5  skrll 		tdb = &sc->sc_txdesc_blk[pri];
   1633  1.1.2.5  skrll 		printf("%s: txpri %d ndesc %d nfree %d\n", __func__, pri,
   1634  1.1.2.5  skrll 		    tdb->tdb_ndesc, tdb->tdb_nfree);
   1635  1.1.2.5  skrll 		for (desc = 0; desc < tdb->tdb_ndesc; desc++)
   1636  1.1.2.5  skrll 			rtw_print_txdesc(sc, ".", NULL, tdb, desc);
   1637  1.1.2.5  skrll 	}
   1638  1.1.2.5  skrll 
   1639  1.1.2.5  skrll 	rdb = &sc->sc_rxdesc_blk;
   1640  1.1.2.5  skrll 
   1641  1.1.2.5  skrll 	for (desc = 0; desc < RTW_RXQLEN; desc++) {
   1642  1.1.2.5  skrll 		rd = &rdb->rdb_desc[desc];
   1643  1.1.2.5  skrll 		printf("%s: %sctl %08x rsvd0/rssi %08x buf/tsftl %08x "
   1644  1.1.2.5  skrll 		    "rsvd1/tsfth %08x\n", __func__,
   1645  1.1.2.5  skrll 		    (desc >= rdb->rdb_ndesc) ? "UNUSED " : "",
   1646  1.1.2.5  skrll 		    le32toh(rd->rd_ctl), le32toh(rd->rd_rssi),
   1647  1.1.2.5  skrll 		    le32toh(rd->rd_buf), le32toh(rd->rd_tsfth));
   1648  1.1.2.5  skrll 	}
   1649  1.1.2.5  skrll }
   1650  1.1.2.5  skrll #endif /* RTW_DEBUG */
   1651  1.1.2.5  skrll 
   1652  1.1.2.2  skrll static void
   1653  1.1.2.4  skrll rtw_hwring_setup(struct rtw_softc *sc)
   1654  1.1.2.4  skrll {
   1655  1.1.2.4  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   1656  1.1.2.4  skrll 	RTW_WRITE(regs, RTW_RDSAR, RTW_RING_BASE(sc, hd_rx));
   1657  1.1.2.4  skrll 	RTW_WRITE(regs, RTW_TLPDA, RTW_RING_BASE(sc, hd_txlo));
   1658  1.1.2.4  skrll 	RTW_WRITE(regs, RTW_TNPDA, RTW_RING_BASE(sc, hd_txmd));
   1659  1.1.2.4  skrll 	RTW_WRITE(regs, RTW_THPDA, RTW_RING_BASE(sc, hd_txhi));
   1660  1.1.2.4  skrll 	RTW_WRITE(regs, RTW_TBDA, RTW_RING_BASE(sc, hd_bcn));
   1661  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_TLPDA, RTW_RDSAR);
   1662  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
   1663  1.1.2.5  skrll 	    ("%s: reg[TLPDA] <- %" PRIxPTR "\n", __func__,
   1664  1.1.2.5  skrll 	     (uintptr_t)RTW_RING_BASE(sc, hd_txlo)));
   1665  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
   1666  1.1.2.5  skrll 	    ("%s: reg[TNPDA] <- %" PRIxPTR "\n", __func__,
   1667  1.1.2.5  skrll 	     (uintptr_t)RTW_RING_BASE(sc, hd_txmd)));
   1668  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
   1669  1.1.2.5  skrll 	    ("%s: reg[THPDA] <- %" PRIxPTR "\n", __func__,
   1670  1.1.2.5  skrll 	     (uintptr_t)RTW_RING_BASE(sc, hd_txhi)));
   1671  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
   1672  1.1.2.5  skrll 	    ("%s: reg[TBDA] <- %" PRIxPTR "\n", __func__,
   1673  1.1.2.5  skrll 	     (uintptr_t)RTW_RING_BASE(sc, hd_bcn)));
   1674  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
   1675  1.1.2.5  skrll 	    ("%s: reg[RDSAR] <- %" PRIxPTR "\n", __func__,
   1676  1.1.2.5  skrll 	     (uintptr_t)RTW_RING_BASE(sc, hd_rx)));
   1677  1.1.2.4  skrll }
   1678  1.1.2.4  skrll 
   1679  1.1.2.5  skrll static int
   1680  1.1.2.4  skrll rtw_swring_setup(struct rtw_softc *sc)
   1681  1.1.2.4  skrll {
   1682  1.1.2.5  skrll 	int rc;
   1683  1.1.2.5  skrll 	struct rtw_rxdesc_blk *rdb;
   1684  1.1.2.5  skrll 
   1685  1.1.2.4  skrll 	rtw_txdesc_blk_init_all(&sc->sc_txdesc_blk[0]);
   1686  1.1.2.4  skrll 
   1687  1.1.2.5  skrll 	rtw_txsoft_blk_init_all(&sc->sc_txsoft_blk[0]);
   1688  1.1.2.4  skrll 
   1689  1.1.2.5  skrll 	rdb = &sc->sc_rxdesc_blk;
   1690  1.1.2.5  skrll 	if ((rc = rtw_rxsoft_init_all(sc->sc_dmat, sc->sc_rxsoft, &rdb->rdb_ndesc,
   1691  1.1.2.5  skrll 	     sc->sc_dev.dv_xname)) != 0 && rdb->rdb_ndesc == 0) {
   1692  1.1.2.5  skrll 		printf("%s: could not allocate rx buffers\n",
   1693  1.1.2.5  skrll 		    sc->sc_dev.dv_xname);
   1694  1.1.2.5  skrll 		return rc;
   1695  1.1.2.5  skrll 	}
   1696  1.1.2.5  skrll 
   1697  1.1.2.5  skrll 	rdb = &sc->sc_rxdesc_blk;
   1698  1.1.2.5  skrll 	rtw_rxdescs_sync(rdb, 0, rdb->rdb_ndesc,
   1699  1.1.2.5  skrll 	    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
   1700  1.1.2.5  skrll 	rtw_rxdesc_init_all(rdb, sc->sc_rxsoft, 1);
   1701  1.1.2.5  skrll 
   1702  1.1.2.5  skrll 	rtw_txdescs_sync_all(&sc->sc_txdesc_blk[0]);
   1703  1.1.2.5  skrll 	return 0;
   1704  1.1.2.4  skrll }
   1705  1.1.2.4  skrll 
   1706  1.1.2.4  skrll static void
   1707  1.1.2.5  skrll rtw_txdesc_blk_reset(struct rtw_txdesc_blk *tdb)
   1708  1.1.2.4  skrll {
   1709  1.1.2.5  skrll 	int i;
   1710  1.1.2.5  skrll 
   1711  1.1.2.5  skrll 	(void)memset(tdb->tdb_desc, 0,
   1712  1.1.2.5  skrll 	    sizeof(tdb->tdb_desc[0]) * tdb->tdb_ndesc);
   1713  1.1.2.5  skrll 	for (i = 0; i < tdb->tdb_ndesc; i++)
   1714  1.1.2.5  skrll 		tdb->tdb_desc[i].td_next = htole32(RTW_NEXT_DESC(tdb, i));
   1715  1.1.2.5  skrll 	tdb->tdb_nfree = tdb->tdb_ndesc;
   1716  1.1.2.5  skrll 	tdb->tdb_next = 0;
   1717  1.1.2.4  skrll }
   1718  1.1.2.4  skrll 
   1719  1.1.2.4  skrll static void
   1720  1.1.2.5  skrll rtw_txdescs_reset(struct rtw_softc *sc)
   1721  1.1.2.2  skrll {
   1722  1.1.2.5  skrll 	int pri;
   1723  1.1.2.5  skrll 	struct rtw_txdesc_blk *tdb;
   1724  1.1.2.5  skrll 
   1725  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   1726  1.1.2.5  skrll 		tdb = &sc->sc_txdesc_blk[pri];
   1727  1.1.2.5  skrll 		rtw_txsofts_release(sc->sc_dmat, &sc->sc_ic,
   1728  1.1.2.5  skrll 		    &sc->sc_txsoft_blk[pri]);
   1729  1.1.2.5  skrll 		rtw_txdesc_blk_reset(tdb);
   1730  1.1.2.5  skrll 		rtw_txdescs_sync(tdb, 0, tdb->tdb_ndesc,
   1731  1.1.2.5  skrll 		    BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
   1732  1.1.2.2  skrll 	}
   1733  1.1.2.5  skrll }
   1734  1.1.2.5  skrll 
   1735  1.1.2.5  skrll static void
   1736  1.1.2.5  skrll rtw_rxdescs_reset(struct rtw_softc *sc)
   1737  1.1.2.5  skrll {
   1738  1.1.2.5  skrll 	rtw_rxdesc_init_all(&sc->sc_rxdesc_blk, &sc->sc_rxsoft[0], 1);
   1739  1.1.2.5  skrll }
   1740  1.1.2.5  skrll 
   1741  1.1.2.5  skrll static void
   1742  1.1.2.5  skrll rtw_intr_ioerror(struct rtw_softc *sc, uint16_t isr)
   1743  1.1.2.5  skrll {
   1744  1.1.2.5  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   1745  1.1.2.5  skrll 
   1746  1.1.2.2  skrll 	if ((isr & RTW_INTR_TXFOVW) != 0)
   1747  1.1.2.5  skrll 		printf("%s: tx fifo overflow\n", sc->sc_dev.dv_xname);
   1748  1.1.2.5  skrll 
   1749  1.1.2.5  skrll 	if ((isr & (RTW_INTR_RDU|RTW_INTR_RXFOVW)) == 0)
   1750  1.1.2.5  skrll 		return;
   1751  1.1.2.5  skrll 
   1752  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_BUGS, ("%s: restarting xmit/recv\n",
   1753  1.1.2.5  skrll 	    sc->sc_dev.dv_xname));
   1754  1.1.2.5  skrll 
   1755  1.1.2.5  skrll #ifdef RTW_DEBUG
   1756  1.1.2.5  skrll 	rtw_dump_rings(sc);
   1757  1.1.2.5  skrll #endif /* RTW_DEBUG */
   1758  1.1.2.5  skrll 
   1759  1.1.2.5  skrll 	rtw_io_enable(regs, RTW_CR_RE | RTW_CR_TE, 0);
   1760  1.1.2.5  skrll 
   1761  1.1.2.5  skrll 	/* Collect rx'd packets.  Refresh rx buffers. */
   1762  1.1.2.5  skrll 	rtw_intr_rx(sc, 0);
   1763  1.1.2.5  skrll 	/* Collect tx'd packets. */
   1764  1.1.2.5  skrll 	rtw_intr_tx(sc, 0);
   1765  1.1.2.5  skrll 
   1766  1.1.2.5  skrll 	RTW_WRITE16(regs, RTW_IMR, 0);
   1767  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_IMR, RTW_IMR);
   1768  1.1.2.5  skrll 
   1769  1.1.2.5  skrll 	rtw_chip_reset1(regs, sc->sc_dev.dv_xname);
   1770  1.1.2.5  skrll 
   1771  1.1.2.5  skrll 	rtw_rxdescs_reset(sc);
   1772  1.1.2.5  skrll 	rtw_txdescs_reset(sc);
   1773  1.1.2.5  skrll 
   1774  1.1.2.5  skrll 	rtw_hwring_setup(sc);
   1775  1.1.2.5  skrll 
   1776  1.1.2.5  skrll #ifdef RTW_DEBUG
   1777  1.1.2.5  skrll 	rtw_dump_rings(sc);
   1778  1.1.2.5  skrll #endif /* RTW_DEBUG */
   1779  1.1.2.5  skrll 
   1780  1.1.2.5  skrll 	RTW_WRITE16(regs, RTW_IMR, sc->sc_inten);
   1781  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_IMR, RTW_IMR);
   1782  1.1.2.5  skrll 	rtw_io_enable(regs, RTW_CR_RE | RTW_CR_TE, 1);
   1783  1.1.2.2  skrll }
   1784  1.1.2.2  skrll 
   1785  1.1.2.2  skrll static __inline void
   1786  1.1.2.2  skrll rtw_suspend_ticks(struct rtw_softc *sc)
   1787  1.1.2.2  skrll {
   1788  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_TIMEOUT,
   1789  1.1.2.5  skrll 	    ("%s: suspending ticks\n", sc->sc_dev.dv_xname));
   1790  1.1.2.2  skrll 	sc->sc_do_tick = 0;
   1791  1.1.2.2  skrll }
   1792  1.1.2.2  skrll 
   1793  1.1.2.2  skrll static __inline void
   1794  1.1.2.2  skrll rtw_resume_ticks(struct rtw_softc *sc)
   1795  1.1.2.2  skrll {
   1796  1.1.2.5  skrll 	uint32_t tsftrl0, tsftrl1, next_tick;
   1797  1.1.2.2  skrll 
   1798  1.1.2.2  skrll 	tsftrl0 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
   1799  1.1.2.2  skrll 
   1800  1.1.2.2  skrll 	tsftrl1 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
   1801  1.1.2.4  skrll 	next_tick = tsftrl1 + 1000000;
   1802  1.1.2.2  skrll 	RTW_WRITE(&sc->sc_regs, RTW_TINT, next_tick);
   1803  1.1.2.2  skrll 
   1804  1.1.2.2  skrll 	sc->sc_do_tick = 1;
   1805  1.1.2.2  skrll 
   1806  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_TIMEOUT,
   1807  1.1.2.5  skrll 	    ("%s: resume ticks delta %#08x now %#08x next %#08x\n",
   1808  1.1.2.5  skrll 	    sc->sc_dev.dv_xname, tsftrl1 - tsftrl0, tsftrl1, next_tick));
   1809  1.1.2.2  skrll }
   1810  1.1.2.2  skrll 
   1811  1.1.2.2  skrll static void
   1812  1.1.2.2  skrll rtw_intr_timeout(struct rtw_softc *sc)
   1813  1.1.2.2  skrll {
   1814  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_TIMEOUT, ("%s: timeout\n", sc->sc_dev.dv_xname));
   1815  1.1.2.2  skrll 	if (sc->sc_do_tick)
   1816  1.1.2.2  skrll 		rtw_resume_ticks(sc);
   1817  1.1.2.2  skrll 	return;
   1818  1.1.2.2  skrll }
   1819  1.1.2.2  skrll 
   1820  1.1.2.2  skrll int
   1821  1.1.2.2  skrll rtw_intr(void *arg)
   1822  1.1.2.2  skrll {
   1823  1.1.2.4  skrll 	int i;
   1824  1.1.2.2  skrll 	struct rtw_softc *sc = arg;
   1825  1.1.2.2  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   1826  1.1.2.5  skrll 	uint16_t isr;
   1827  1.1.2.2  skrll 
   1828  1.1.2.2  skrll 	/*
   1829  1.1.2.2  skrll 	 * If the interface isn't running, the interrupt couldn't
   1830  1.1.2.2  skrll 	 * possibly have come from us.
   1831  1.1.2.2  skrll 	 */
   1832  1.1.2.4  skrll 	if ((sc->sc_flags & RTW_F_ENABLED) == 0 ||
   1833  1.1.2.4  skrll 	    (sc->sc_if.if_flags & IFF_RUNNING) == 0 ||
   1834  1.1.2.2  skrll 	    (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
   1835  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_INTR, ("%s: stray interrupt\n", sc->sc_dev.dv_xname));
   1836  1.1.2.2  skrll 		return (0);
   1837  1.1.2.2  skrll 	}
   1838  1.1.2.2  skrll 
   1839  1.1.2.4  skrll 	for (i = 0; i < 10; i++) {
   1840  1.1.2.2  skrll 		isr = RTW_READ16(regs, RTW_ISR);
   1841  1.1.2.2  skrll 
   1842  1.1.2.2  skrll 		RTW_WRITE16(regs, RTW_ISR, isr);
   1843  1.1.2.5  skrll 		RTW_WBR(regs, RTW_ISR, RTW_ISR);
   1844  1.1.2.2  skrll 
   1845  1.1.2.2  skrll 		if (sc->sc_intr_ack != NULL)
   1846  1.1.2.2  skrll 			(*sc->sc_intr_ack)(regs);
   1847  1.1.2.2  skrll 
   1848  1.1.2.2  skrll 		if (isr == 0)
   1849  1.1.2.2  skrll 			break;
   1850  1.1.2.2  skrll 
   1851  1.1.2.2  skrll #ifdef RTW_DEBUG
   1852  1.1.2.2  skrll #define PRINTINTR(flag) do { \
   1853  1.1.2.2  skrll 	if ((isr & flag) != 0) { \
   1854  1.1.2.2  skrll 		printf("%s" #flag, delim); \
   1855  1.1.2.2  skrll 		delim = ","; \
   1856  1.1.2.2  skrll 	} \
   1857  1.1.2.2  skrll } while (0)
   1858  1.1.2.2  skrll 
   1859  1.1.2.5  skrll 		if ((rtw_debug & RTW_DEBUG_INTR) != 0 && isr != 0) {
   1860  1.1.2.2  skrll 			const char *delim = "<";
   1861  1.1.2.2  skrll 
   1862  1.1.2.2  skrll 			printf("%s: reg[ISR] = %x", sc->sc_dev.dv_xname, isr);
   1863  1.1.2.2  skrll 
   1864  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TXFOVW);
   1865  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TIMEOUT);
   1866  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_BCNINT);
   1867  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_ATIMINT);
   1868  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TBDER);
   1869  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TBDOK);
   1870  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_THPDER);
   1871  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_THPDOK);
   1872  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TNPDER);
   1873  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TNPDOK);
   1874  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_RXFOVW);
   1875  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_RDU);
   1876  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TLPDER);
   1877  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_TLPDOK);
   1878  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_RER);
   1879  1.1.2.2  skrll 			PRINTINTR(RTW_INTR_ROK);
   1880  1.1.2.2  skrll 
   1881  1.1.2.2  skrll 			printf(">\n");
   1882  1.1.2.2  skrll 		}
   1883  1.1.2.2  skrll #undef PRINTINTR
   1884  1.1.2.2  skrll #endif /* RTW_DEBUG */
   1885  1.1.2.2  skrll 
   1886  1.1.2.2  skrll 		if ((isr & RTW_INTR_RX) != 0)
   1887  1.1.2.2  skrll 			rtw_intr_rx(sc, isr & RTW_INTR_RX);
   1888  1.1.2.2  skrll 		if ((isr & RTW_INTR_TX) != 0)
   1889  1.1.2.2  skrll 			rtw_intr_tx(sc, isr & RTW_INTR_TX);
   1890  1.1.2.2  skrll 		if ((isr & RTW_INTR_BEACON) != 0)
   1891  1.1.2.2  skrll 			rtw_intr_beacon(sc, isr & RTW_INTR_BEACON);
   1892  1.1.2.2  skrll 		if ((isr & RTW_INTR_ATIMINT) != 0)
   1893  1.1.2.2  skrll 			rtw_intr_atim(sc);
   1894  1.1.2.2  skrll 		if ((isr & RTW_INTR_IOERROR) != 0)
   1895  1.1.2.2  skrll 			rtw_intr_ioerror(sc, isr & RTW_INTR_IOERROR);
   1896  1.1.2.2  skrll 		if ((isr & RTW_INTR_TIMEOUT) != 0)
   1897  1.1.2.2  skrll 			rtw_intr_timeout(sc);
   1898  1.1.2.2  skrll 	}
   1899  1.1.2.2  skrll 
   1900  1.1.2.2  skrll 	return 1;
   1901  1.1.2.2  skrll }
   1902  1.1.2.2  skrll 
   1903  1.1.2.5  skrll /* Must be called at splnet. */
   1904  1.1.2.2  skrll static void
   1905  1.1.2.2  skrll rtw_stop(struct ifnet *ifp, int disable)
   1906  1.1.2.2  skrll {
   1907  1.1.2.5  skrll 	int pri;
   1908  1.1.2.2  skrll 	struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
   1909  1.1.2.2  skrll 	struct ieee80211com *ic = &sc->sc_ic;
   1910  1.1.2.2  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   1911  1.1.2.2  skrll 
   1912  1.1.2.4  skrll 	if ((sc->sc_flags & RTW_F_ENABLED) == 0)
   1913  1.1.2.4  skrll 		return;
   1914  1.1.2.4  skrll 
   1915  1.1.2.2  skrll 	rtw_suspend_ticks(sc);
   1916  1.1.2.2  skrll 
   1917  1.1.2.2  skrll 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
   1918  1.1.2.2  skrll 
   1919  1.1.2.4  skrll 	if ((sc->sc_flags & RTW_F_INVALID) == 0) {
   1920  1.1.2.4  skrll 		/* Disable interrupts. */
   1921  1.1.2.4  skrll 		RTW_WRITE16(regs, RTW_IMR, 0);
   1922  1.1.2.4  skrll 
   1923  1.1.2.5  skrll 		RTW_WBW(regs, RTW_TPPOLL, RTW_IMR);
   1924  1.1.2.5  skrll 
   1925  1.1.2.4  skrll 		/* Stop the transmit and receive processes. First stop DMA,
   1926  1.1.2.4  skrll 		 * then disable receiver and transmitter.
   1927  1.1.2.4  skrll 		 */
   1928  1.1.2.5  skrll 		RTW_WRITE8(regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
   1929  1.1.2.5  skrll 
   1930  1.1.2.5  skrll 		RTW_SYNC(regs, RTW_TPPOLL, RTW_IMR);
   1931  1.1.2.2  skrll 
   1932  1.1.2.4  skrll 		rtw_io_enable(&sc->sc_regs, RTW_CR_RE|RTW_CR_TE, 0);
   1933  1.1.2.4  skrll 	}
   1934  1.1.2.2  skrll 
   1935  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   1936  1.1.2.5  skrll 		rtw_txsofts_release(sc->sc_dmat, &sc->sc_ic,
   1937  1.1.2.5  skrll 		    &sc->sc_txsoft_blk[pri]);
   1938  1.1.2.5  skrll 	}
   1939  1.1.2.2  skrll 
   1940  1.1.2.5  skrll 	rtw_rxbufs_release(sc->sc_dmat, &sc->sc_rxsoft[0]);
   1941  1.1.2.5  skrll 
   1942  1.1.2.5  skrll 	if (disable)
   1943  1.1.2.2  skrll 		rtw_disable(sc);
   1944  1.1.2.2  skrll 
   1945  1.1.2.2  skrll 	/* Mark the interface as not running.  Cancel the watchdog timer. */
   1946  1.1.2.5  skrll 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
   1947  1.1.2.2  skrll 	ifp->if_timer = 0;
   1948  1.1.2.4  skrll 
   1949  1.1.2.2  skrll 	return;
   1950  1.1.2.2  skrll }
   1951  1.1.2.2  skrll 
   1952  1.1.2.2  skrll const char *
   1953  1.1.2.2  skrll rtw_pwrstate_string(enum rtw_pwrstate power)
   1954  1.1.2.2  skrll {
   1955  1.1.2.2  skrll 	switch (power) {
   1956  1.1.2.2  skrll 	case RTW_ON:
   1957  1.1.2.2  skrll 		return "on";
   1958  1.1.2.2  skrll 	case RTW_SLEEP:
   1959  1.1.2.2  skrll 		return "sleep";
   1960  1.1.2.2  skrll 	case RTW_OFF:
   1961  1.1.2.2  skrll 		return "off";
   1962  1.1.2.2  skrll 	default:
   1963  1.1.2.2  skrll 		return "unknown";
   1964  1.1.2.2  skrll 	}
   1965  1.1.2.2  skrll }
   1966  1.1.2.2  skrll 
   1967  1.1.2.5  skrll /* XXX For Maxim, I am using the RFMD settings gleaned from the
   1968  1.1.2.5  skrll  * reference driver, plus a magic Maxim "ON" value that comes from
   1969  1.1.2.5  skrll  * the Realtek document "Windows PG for Rtl8180."
   1970  1.1.2.2  skrll  */
   1971  1.1.2.2  skrll static void
   1972  1.1.2.2  skrll rtw_maxim_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
   1973  1.1.2.5  skrll     int before_rf, int digphy)
   1974  1.1.2.2  skrll {
   1975  1.1.2.5  skrll 	uint32_t anaparm;
   1976  1.1.2.5  skrll 
   1977  1.1.2.5  skrll 	anaparm = RTW_READ(regs, RTW_ANAPARM);
   1978  1.1.2.5  skrll 	anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
   1979  1.1.2.5  skrll 
   1980  1.1.2.5  skrll 	switch (power) {
   1981  1.1.2.5  skrll 	case RTW_OFF:
   1982  1.1.2.5  skrll 		if (before_rf)
   1983  1.1.2.5  skrll 			return;
   1984  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_MAXIM_OFF;
   1985  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_TXDACOFF;
   1986  1.1.2.5  skrll 		break;
   1987  1.1.2.5  skrll 	case RTW_SLEEP:
   1988  1.1.2.5  skrll 		if (!before_rf)
   1989  1.1.2.5  skrll 			return;
   1990  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_MAXIM_SLEEP;
   1991  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_TXDACOFF;
   1992  1.1.2.5  skrll 		break;
   1993  1.1.2.5  skrll 	case RTW_ON:
   1994  1.1.2.5  skrll 		if (!before_rf)
   1995  1.1.2.5  skrll 			return;
   1996  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_MAXIM_ON;
   1997  1.1.2.5  skrll 		break;
   1998  1.1.2.5  skrll 	}
   1999  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_PWR,
   2000  1.1.2.5  skrll 	    ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
   2001  1.1.2.5  skrll 	    __func__, rtw_pwrstate_string(power),
   2002  1.1.2.5  skrll 	    (before_rf) ? "before" : "after", anaparm));
   2003  1.1.2.2  skrll 
   2004  1.1.2.5  skrll 	RTW_WRITE(regs, RTW_ANAPARM, anaparm);
   2005  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
   2006  1.1.2.5  skrll }
   2007  1.1.2.5  skrll 
   2008  1.1.2.5  skrll /* XXX I am using the RFMD settings gleaned from the reference
   2009  1.1.2.5  skrll  * driver.  They agree
   2010  1.1.2.5  skrll  */
   2011  1.1.2.5  skrll static void
   2012  1.1.2.5  skrll rtw_rfmd_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
   2013  1.1.2.5  skrll     int before_rf, int digphy)
   2014  1.1.2.5  skrll {
   2015  1.1.2.5  skrll 	uint32_t anaparm;
   2016  1.1.2.2  skrll 
   2017  1.1.2.2  skrll 	anaparm = RTW_READ(regs, RTW_ANAPARM);
   2018  1.1.2.5  skrll 	anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
   2019  1.1.2.2  skrll 
   2020  1.1.2.2  skrll 	switch (power) {
   2021  1.1.2.2  skrll 	case RTW_OFF:
   2022  1.1.2.2  skrll 		if (before_rf)
   2023  1.1.2.2  skrll 			return;
   2024  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_RFMD_OFF;
   2025  1.1.2.2  skrll 		anaparm |= RTW_ANAPARM_TXDACOFF;
   2026  1.1.2.2  skrll 		break;
   2027  1.1.2.2  skrll 	case RTW_SLEEP:
   2028  1.1.2.2  skrll 		if (!before_rf)
   2029  1.1.2.2  skrll 			return;
   2030  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_RFMD_SLEEP;
   2031  1.1.2.2  skrll 		anaparm |= RTW_ANAPARM_TXDACOFF;
   2032  1.1.2.2  skrll 		break;
   2033  1.1.2.2  skrll 	case RTW_ON:
   2034  1.1.2.2  skrll 		if (!before_rf)
   2035  1.1.2.2  skrll 			return;
   2036  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_RFMD_ON;
   2037  1.1.2.2  skrll 		break;
   2038  1.1.2.2  skrll 	}
   2039  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_PWR,
   2040  1.1.2.5  skrll 	    ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
   2041  1.1.2.5  skrll 	    __func__, rtw_pwrstate_string(power),
   2042  1.1.2.5  skrll 	    (before_rf) ? "before" : "after", anaparm));
   2043  1.1.2.5  skrll 
   2044  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_ANAPARM, anaparm);
   2045  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
   2046  1.1.2.2  skrll }
   2047  1.1.2.2  skrll 
   2048  1.1.2.2  skrll static void
   2049  1.1.2.2  skrll rtw_philips_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
   2050  1.1.2.5  skrll     int before_rf, int digphy)
   2051  1.1.2.2  skrll {
   2052  1.1.2.5  skrll 	uint32_t anaparm;
   2053  1.1.2.2  skrll 
   2054  1.1.2.2  skrll 	anaparm = RTW_READ(regs, RTW_ANAPARM);
   2055  1.1.2.5  skrll 	anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
   2056  1.1.2.2  skrll 
   2057  1.1.2.2  skrll 	switch (power) {
   2058  1.1.2.2  skrll 	case RTW_OFF:
   2059  1.1.2.2  skrll 		if (before_rf)
   2060  1.1.2.2  skrll 			return;
   2061  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_PHILIPS_OFF;
   2062  1.1.2.2  skrll 		anaparm |= RTW_ANAPARM_TXDACOFF;
   2063  1.1.2.2  skrll 		break;
   2064  1.1.2.2  skrll 	case RTW_SLEEP:
   2065  1.1.2.2  skrll 		if (!before_rf)
   2066  1.1.2.2  skrll 			return;
   2067  1.1.2.5  skrll 		anaparm |= RTW_ANAPARM_RFPOW_PHILIPS_SLEEP;
   2068  1.1.2.2  skrll 		anaparm |= RTW_ANAPARM_TXDACOFF;
   2069  1.1.2.2  skrll 		break;
   2070  1.1.2.2  skrll 	case RTW_ON:
   2071  1.1.2.2  skrll 		if (!before_rf)
   2072  1.1.2.2  skrll 			return;
   2073  1.1.2.5  skrll 		if (digphy) {
   2074  1.1.2.5  skrll 			anaparm |= RTW_ANAPARM_RFPOW_DIG_PHILIPS_ON;
   2075  1.1.2.5  skrll 			/* XXX guess */
   2076  1.1.2.5  skrll 			anaparm |= RTW_ANAPARM_TXDACOFF;
   2077  1.1.2.5  skrll 		} else
   2078  1.1.2.5  skrll 			anaparm |= RTW_ANAPARM_RFPOW_ANA_PHILIPS_ON;
   2079  1.1.2.2  skrll 		break;
   2080  1.1.2.2  skrll 	}
   2081  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_PWR,
   2082  1.1.2.5  skrll 	    ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
   2083  1.1.2.5  skrll 	    __func__, rtw_pwrstate_string(power),
   2084  1.1.2.5  skrll 	    (before_rf) ? "before" : "after", anaparm));
   2085  1.1.2.5  skrll 
   2086  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_ANAPARM, anaparm);
   2087  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
   2088  1.1.2.2  skrll }
   2089  1.1.2.2  skrll 
   2090  1.1.2.2  skrll static void
   2091  1.1.2.5  skrll rtw_pwrstate0(struct rtw_softc *sc, enum rtw_pwrstate power, int before_rf,
   2092  1.1.2.5  skrll     int digphy)
   2093  1.1.2.2  skrll {
   2094  1.1.2.2  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   2095  1.1.2.2  skrll 
   2096  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_ANAPARM);
   2097  1.1.2.2  skrll 
   2098  1.1.2.5  skrll 	(*sc->sc_pwrstate_cb)(regs, power, before_rf, digphy);
   2099  1.1.2.2  skrll 
   2100  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_NONE);
   2101  1.1.2.2  skrll 
   2102  1.1.2.2  skrll 	return;
   2103  1.1.2.2  skrll }
   2104  1.1.2.2  skrll 
   2105  1.1.2.2  skrll static int
   2106  1.1.2.2  skrll rtw_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
   2107  1.1.2.2  skrll {
   2108  1.1.2.2  skrll 	int rc;
   2109  1.1.2.2  skrll 
   2110  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_PWR,
   2111  1.1.2.5  skrll 	    ("%s: %s->%s\n", __func__,
   2112  1.1.2.2  skrll 	    rtw_pwrstate_string(sc->sc_pwrstate), rtw_pwrstate_string(power)));
   2113  1.1.2.2  skrll 
   2114  1.1.2.2  skrll 	if (sc->sc_pwrstate == power)
   2115  1.1.2.2  skrll 		return 0;
   2116  1.1.2.2  skrll 
   2117  1.1.2.5  skrll 	rtw_pwrstate0(sc, power, 1, sc->sc_flags & RTW_F_DIGPHY);
   2118  1.1.2.2  skrll 	rc = rtw_rf_pwrstate(sc->sc_rf, power);
   2119  1.1.2.5  skrll 	rtw_pwrstate0(sc, power, 0, sc->sc_flags & RTW_F_DIGPHY);
   2120  1.1.2.2  skrll 
   2121  1.1.2.2  skrll 	switch (power) {
   2122  1.1.2.2  skrll 	case RTW_ON:
   2123  1.1.2.4  skrll 		/* TBD set LEDs */
   2124  1.1.2.2  skrll 		break;
   2125  1.1.2.2  skrll 	case RTW_SLEEP:
   2126  1.1.2.2  skrll 		/* TBD */
   2127  1.1.2.2  skrll 		break;
   2128  1.1.2.2  skrll 	case RTW_OFF:
   2129  1.1.2.2  skrll 		/* TBD */
   2130  1.1.2.2  skrll 		break;
   2131  1.1.2.2  skrll 	}
   2132  1.1.2.2  skrll 	if (rc == 0)
   2133  1.1.2.2  skrll 		sc->sc_pwrstate = power;
   2134  1.1.2.2  skrll 	else
   2135  1.1.2.2  skrll 		sc->sc_pwrstate = RTW_OFF;
   2136  1.1.2.2  skrll 	return rc;
   2137  1.1.2.2  skrll }
   2138  1.1.2.2  skrll 
   2139  1.1.2.2  skrll static int
   2140  1.1.2.2  skrll rtw_tune(struct rtw_softc *sc)
   2141  1.1.2.2  skrll {
   2142  1.1.2.2  skrll 	struct ieee80211com *ic = &sc->sc_ic;
   2143  1.1.2.2  skrll 	u_int chan;
   2144  1.1.2.2  skrll 	int rc;
   2145  1.1.2.2  skrll 	int antdiv = sc->sc_flags & RTW_F_ANTDIV,
   2146  1.1.2.2  skrll 	    dflantb = sc->sc_flags & RTW_F_DFLANTB;
   2147  1.1.2.2  skrll 
   2148  1.1.2.2  skrll 	KASSERT(ic->ic_bss->ni_chan != NULL);
   2149  1.1.2.2  skrll 
   2150  1.1.2.2  skrll 	chan = ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan);
   2151  1.1.2.2  skrll 	if (chan == IEEE80211_CHAN_ANY)
   2152  1.1.2.2  skrll 		panic("%s: chan == IEEE80211_CHAN_ANY\n", __func__);
   2153  1.1.2.2  skrll 
   2154  1.1.2.2  skrll 	if (chan == sc->sc_cur_chan) {
   2155  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_TUNE,
   2156  1.1.2.5  skrll 		    ("%s: already tuned chan #%d\n", __func__, chan));
   2157  1.1.2.2  skrll 		return 0;
   2158  1.1.2.2  skrll 	}
   2159  1.1.2.2  skrll 
   2160  1.1.2.2  skrll 	rtw_suspend_ticks(sc);
   2161  1.1.2.2  skrll 
   2162  1.1.2.2  skrll 	rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 0);
   2163  1.1.2.2  skrll 
   2164  1.1.2.2  skrll 	/* TBD wait for Tx to complete */
   2165  1.1.2.2  skrll 
   2166  1.1.2.2  skrll 	KASSERT((sc->sc_flags & RTW_F_ENABLED) != 0);
   2167  1.1.2.2  skrll 
   2168  1.1.2.2  skrll 	if ((rc = rtw_phy_init(&sc->sc_regs, sc->sc_rf,
   2169  1.1.2.2  skrll 	    rtw_chan2txpower(&sc->sc_srom, ic, ic->ic_bss->ni_chan),
   2170  1.1.2.2  skrll 	    sc->sc_csthr, ic->ic_bss->ni_chan->ic_freq, antdiv,
   2171  1.1.2.2  skrll 	    dflantb, RTW_ON)) != 0) {
   2172  1.1.2.2  skrll 		/* XXX condition on powersaving */
   2173  1.1.2.2  skrll 		printf("%s: phy init failed\n", sc->sc_dev.dv_xname);
   2174  1.1.2.2  skrll 	}
   2175  1.1.2.2  skrll 
   2176  1.1.2.2  skrll 	sc->sc_cur_chan = chan;
   2177  1.1.2.2  skrll 
   2178  1.1.2.2  skrll 	rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 1);
   2179  1.1.2.2  skrll 
   2180  1.1.2.2  skrll 	rtw_resume_ticks(sc);
   2181  1.1.2.2  skrll 
   2182  1.1.2.2  skrll 	return rc;
   2183  1.1.2.2  skrll }
   2184  1.1.2.2  skrll 
   2185  1.1.2.2  skrll void
   2186  1.1.2.2  skrll rtw_disable(struct rtw_softc *sc)
   2187  1.1.2.2  skrll {
   2188  1.1.2.2  skrll 	int rc;
   2189  1.1.2.2  skrll 
   2190  1.1.2.2  skrll 	if ((sc->sc_flags & RTW_F_ENABLED) == 0)
   2191  1.1.2.2  skrll 		return;
   2192  1.1.2.2  skrll 
   2193  1.1.2.2  skrll 	/* turn off PHY */
   2194  1.1.2.5  skrll 	if ((sc->sc_flags & RTW_F_INVALID) == 0 &&
   2195  1.1.2.5  skrll 	    (rc = rtw_pwrstate(sc, RTW_OFF)) != 0) {
   2196  1.1.2.2  skrll 		printf("%s: failed to turn off PHY (%d)\n",
   2197  1.1.2.2  skrll 		    sc->sc_dev.dv_xname, rc);
   2198  1.1.2.5  skrll 	}
   2199  1.1.2.2  skrll 
   2200  1.1.2.2  skrll 	if (sc->sc_disable != NULL)
   2201  1.1.2.2  skrll 		(*sc->sc_disable)(sc);
   2202  1.1.2.2  skrll 
   2203  1.1.2.2  skrll 	sc->sc_flags &= ~RTW_F_ENABLED;
   2204  1.1.2.2  skrll }
   2205  1.1.2.2  skrll 
   2206  1.1.2.2  skrll int
   2207  1.1.2.2  skrll rtw_enable(struct rtw_softc *sc)
   2208  1.1.2.2  skrll {
   2209  1.1.2.2  skrll 	if ((sc->sc_flags & RTW_F_ENABLED) == 0) {
   2210  1.1.2.2  skrll 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
   2211  1.1.2.2  skrll 			printf("%s: device enable failed\n",
   2212  1.1.2.2  skrll 			    sc->sc_dev.dv_xname);
   2213  1.1.2.2  skrll 			return (EIO);
   2214  1.1.2.2  skrll 		}
   2215  1.1.2.2  skrll 		sc->sc_flags |= RTW_F_ENABLED;
   2216  1.1.2.2  skrll 	}
   2217  1.1.2.2  skrll 	return (0);
   2218  1.1.2.2  skrll }
   2219  1.1.2.2  skrll 
   2220  1.1.2.2  skrll static void
   2221  1.1.2.2  skrll rtw_transmit_config(struct rtw_regs *regs)
   2222  1.1.2.2  skrll {
   2223  1.1.2.5  skrll 	uint32_t tcr;
   2224  1.1.2.2  skrll 
   2225  1.1.2.2  skrll 	tcr = RTW_READ(regs, RTW_TCR);
   2226  1.1.2.2  skrll 
   2227  1.1.2.5  skrll 	tcr |= RTW_TCR_CWMIN;
   2228  1.1.2.5  skrll 	tcr &= ~RTW_TCR_MXDMA_MASK;
   2229  1.1.2.5  skrll 	tcr |= RTW_TCR_MXDMA_256;
   2230  1.1.2.2  skrll 	tcr |= RTW_TCR_SAT;		/* send ACK as fast as possible */
   2231  1.1.2.2  skrll 	tcr &= ~RTW_TCR_LBK_MASK;
   2232  1.1.2.2  skrll 	tcr |= RTW_TCR_LBK_NORMAL;	/* normal operating mode */
   2233  1.1.2.2  skrll 
   2234  1.1.2.2  skrll 	/* set short/long retry limits */
   2235  1.1.2.2  skrll 	tcr &= ~(RTW_TCR_SRL_MASK|RTW_TCR_LRL_MASK);
   2236  1.1.2.5  skrll 	tcr |= LSHIFT(4, RTW_TCR_SRL_MASK) | LSHIFT(4, RTW_TCR_LRL_MASK);
   2237  1.1.2.2  skrll 
   2238  1.1.2.5  skrll 	tcr &= ~RTW_TCR_CRC;	/* NIC appends CRC32 */
   2239  1.1.2.2  skrll 
   2240  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_TCR, tcr);
   2241  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_TCR, RTW_TCR);
   2242  1.1.2.2  skrll }
   2243  1.1.2.2  skrll 
   2244  1.1.2.2  skrll static __inline void
   2245  1.1.2.2  skrll rtw_enable_interrupts(struct rtw_softc *sc)
   2246  1.1.2.2  skrll {
   2247  1.1.2.2  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   2248  1.1.2.2  skrll 
   2249  1.1.2.2  skrll 	sc->sc_inten = RTW_INTR_RX|RTW_INTR_TX|RTW_INTR_BEACON|RTW_INTR_ATIMINT;
   2250  1.1.2.2  skrll 	sc->sc_inten |= RTW_INTR_IOERROR|RTW_INTR_TIMEOUT;
   2251  1.1.2.2  skrll 
   2252  1.1.2.2  skrll 	RTW_WRITE16(regs, RTW_IMR, sc->sc_inten);
   2253  1.1.2.5  skrll 	RTW_WBW(regs, RTW_IMR, RTW_ISR);
   2254  1.1.2.2  skrll 	RTW_WRITE16(regs, RTW_ISR, 0xffff);
   2255  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_IMR, RTW_ISR);
   2256  1.1.2.2  skrll 
   2257  1.1.2.2  skrll 	/* XXX necessary? */
   2258  1.1.2.2  skrll 	if (sc->sc_intr_ack != NULL)
   2259  1.1.2.2  skrll 		(*sc->sc_intr_ack)(regs);
   2260  1.1.2.2  skrll }
   2261  1.1.2.2  skrll 
   2262  1.1.2.5  skrll static void
   2263  1.1.2.5  skrll rtw_set_nettype(struct rtw_softc *sc, enum ieee80211_opmode opmode)
   2264  1.1.2.5  skrll {
   2265  1.1.2.5  skrll 	uint8_t msr;
   2266  1.1.2.5  skrll 
   2267  1.1.2.5  skrll 	/* I'm guessing that MSR is protected as CONFIG[0123] are. */
   2268  1.1.2.5  skrll 	rtw_set_access(&sc->sc_regs, RTW_ACCESS_CONFIG);
   2269  1.1.2.5  skrll 
   2270  1.1.2.5  skrll 	msr = RTW_READ8(&sc->sc_regs, RTW_MSR) & ~RTW_MSR_NETYPE_MASK;
   2271  1.1.2.5  skrll 
   2272  1.1.2.5  skrll 	switch (opmode) {
   2273  1.1.2.5  skrll 	case IEEE80211_M_AHDEMO:
   2274  1.1.2.5  skrll 	case IEEE80211_M_IBSS:
   2275  1.1.2.5  skrll 		msr |= RTW_MSR_NETYPE_ADHOC_OK;
   2276  1.1.2.5  skrll 		break;
   2277  1.1.2.5  skrll 	case IEEE80211_M_HOSTAP:
   2278  1.1.2.5  skrll 		msr |= RTW_MSR_NETYPE_AP_OK;
   2279  1.1.2.5  skrll 		break;
   2280  1.1.2.5  skrll 	case IEEE80211_M_MONITOR:
   2281  1.1.2.5  skrll 		/* XXX */
   2282  1.1.2.5  skrll 		msr |= RTW_MSR_NETYPE_NOLINK;
   2283  1.1.2.5  skrll 		break;
   2284  1.1.2.5  skrll 	case IEEE80211_M_STA:
   2285  1.1.2.5  skrll 		msr |= RTW_MSR_NETYPE_INFRA_OK;
   2286  1.1.2.5  skrll 		break;
   2287  1.1.2.5  skrll 	}
   2288  1.1.2.5  skrll 	RTW_WRITE8(&sc->sc_regs, RTW_MSR, msr);
   2289  1.1.2.5  skrll 
   2290  1.1.2.5  skrll 	rtw_set_access(&sc->sc_regs, RTW_ACCESS_NONE);
   2291  1.1.2.5  skrll }
   2292  1.1.2.5  skrll 
   2293  1.1.2.2  skrll #define	rtw_calchash(addr) \
   2294  1.1.2.5  skrll 	(ether_crc32_be((addr), IEEE80211_ADDR_LEN) >> 26)
   2295  1.1.2.2  skrll 
   2296  1.1.2.2  skrll static void
   2297  1.1.2.2  skrll rtw_pktfilt_load(struct rtw_softc *sc)
   2298  1.1.2.2  skrll {
   2299  1.1.2.2  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   2300  1.1.2.2  skrll 	struct ieee80211com *ic = &sc->sc_ic;
   2301  1.1.2.2  skrll 	struct ethercom *ec = &ic->ic_ec;
   2302  1.1.2.2  skrll 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   2303  1.1.2.2  skrll 	int hash;
   2304  1.1.2.5  skrll 	uint32_t hashes[2] = { 0, 0 };
   2305  1.1.2.2  skrll 	struct ether_multi *enm;
   2306  1.1.2.2  skrll 	struct ether_multistep step;
   2307  1.1.2.2  skrll 
   2308  1.1.2.2  skrll 	/* XXX might be necessary to stop Rx/Tx engines while setting filters */
   2309  1.1.2.2  skrll 
   2310  1.1.2.5  skrll 	sc->sc_rcr &= ~RTW_RCR_PKTFILTER_MASK;
   2311  1.1.2.5  skrll 	sc->sc_rcr &= ~(RTW_RCR_MXDMA_MASK | RTW_RCR_RXFTH_MASK);
   2312  1.1.2.2  skrll 
   2313  1.1.2.5  skrll 	sc->sc_rcr |= RTW_RCR_PKTFILTER_DEFAULT;
   2314  1.1.2.5  skrll 	/* MAC auto-reset PHY (huh?) */
   2315  1.1.2.5  skrll 	sc->sc_rcr |= RTW_RCR_ENMARP;
   2316  1.1.2.5  skrll 	/* DMA whole Rx packets, only.  Set Tx DMA burst size to 1024 bytes. */
   2317  1.1.2.5  skrll 	sc->sc_rcr |= RTW_RCR_MXDMA_1024 | RTW_RCR_RXFTH_WHOLE;
   2318  1.1.2.2  skrll 
   2319  1.1.2.5  skrll 	switch (ic->ic_opmode) {
   2320  1.1.2.5  skrll 	case IEEE80211_M_MONITOR:
   2321  1.1.2.5  skrll 		sc->sc_rcr |= RTW_RCR_MONITOR;
   2322  1.1.2.5  skrll 		break;
   2323  1.1.2.5  skrll 	case IEEE80211_M_AHDEMO:
   2324  1.1.2.5  skrll 	case IEEE80211_M_IBSS:
   2325  1.1.2.5  skrll 		/* receive broadcasts in our BSS */
   2326  1.1.2.5  skrll 		sc->sc_rcr |= RTW_RCR_ADD3;
   2327  1.1.2.5  skrll 		break;
   2328  1.1.2.5  skrll 	default:
   2329  1.1.2.5  skrll 		break;
   2330  1.1.2.5  skrll 	}
   2331  1.1.2.2  skrll 
   2332  1.1.2.2  skrll 	ifp->if_flags &= ~IFF_ALLMULTI;
   2333  1.1.2.2  skrll 
   2334  1.1.2.5  skrll 	/* XXX accept all broadcast if scanning */
   2335  1.1.2.5  skrll 	if ((ifp->if_flags & IFF_BROADCAST) != 0)
   2336  1.1.2.5  skrll 		sc->sc_rcr |= RTW_RCR_AB;	/* accept all broadcast */
   2337  1.1.2.5  skrll 
   2338  1.1.2.2  skrll 	if (ifp->if_flags & IFF_PROMISC) {
   2339  1.1.2.2  skrll 		sc->sc_rcr |= RTW_RCR_AB;	/* accept all broadcast */
   2340  1.1.2.2  skrll allmulti:
   2341  1.1.2.2  skrll 		ifp->if_flags |= IFF_ALLMULTI;
   2342  1.1.2.2  skrll 		goto setit;
   2343  1.1.2.2  skrll 	}
   2344  1.1.2.2  skrll 
   2345  1.1.2.2  skrll 	/*
   2346  1.1.2.2  skrll 	 * Program the 64-bit multicast hash filter.
   2347  1.1.2.2  skrll 	 */
   2348  1.1.2.2  skrll 	ETHER_FIRST_MULTI(step, ec, enm);
   2349  1.1.2.2  skrll 	while (enm != NULL) {
   2350  1.1.2.2  skrll 		/* XXX */
   2351  1.1.2.2  skrll 		if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
   2352  1.1.2.2  skrll 		    ETHER_ADDR_LEN) != 0)
   2353  1.1.2.2  skrll 			goto allmulti;
   2354  1.1.2.2  skrll 
   2355  1.1.2.2  skrll 		hash = rtw_calchash(enm->enm_addrlo);
   2356  1.1.2.5  skrll 		hashes[hash >> 5] |= (1 << (hash & 0x1f));
   2357  1.1.2.5  skrll 		sc->sc_rcr |= RTW_RCR_AM;
   2358  1.1.2.2  skrll 		ETHER_NEXT_MULTI(step, enm);
   2359  1.1.2.2  skrll 	}
   2360  1.1.2.2  skrll 
   2361  1.1.2.2  skrll 	/* all bits set => hash is useless */
   2362  1.1.2.2  skrll 	if (~(hashes[0] & hashes[1]) == 0)
   2363  1.1.2.2  skrll 		goto allmulti;
   2364  1.1.2.2  skrll 
   2365  1.1.2.2  skrll  setit:
   2366  1.1.2.5  skrll 	if (ifp->if_flags & IFF_ALLMULTI) {
   2367  1.1.2.2  skrll 		sc->sc_rcr |= RTW_RCR_AM;	/* accept all multicast */
   2368  1.1.2.5  skrll 		hashes[0] = hashes[1] = 0xffffffff;
   2369  1.1.2.5  skrll 	}
   2370  1.1.2.2  skrll 
   2371  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_MAR0, hashes[0]);
   2372  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_MAR1, hashes[1]);
   2373  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_RCR, sc->sc_rcr);
   2374  1.1.2.2  skrll 	RTW_SYNC(regs, RTW_MAR0, RTW_RCR); /* RTW_MAR0 < RTW_MAR1 < RTW_RCR */
   2375  1.1.2.2  skrll 
   2376  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_PKTFILT,
   2377  1.1.2.5  skrll 	    ("%s: RTW_MAR0 %08x RTW_MAR1 %08x RTW_RCR %08x\n",
   2378  1.1.2.2  skrll 	    sc->sc_dev.dv_xname, RTW_READ(regs, RTW_MAR0),
   2379  1.1.2.2  skrll 	    RTW_READ(regs, RTW_MAR1), RTW_READ(regs, RTW_RCR)));
   2380  1.1.2.2  skrll 
   2381  1.1.2.2  skrll 	return;
   2382  1.1.2.2  skrll }
   2383  1.1.2.2  skrll 
   2384  1.1.2.5  skrll #define	IEEE80211_BEACON_TIMESTAMP_LEN		8
   2385  1.1.2.5  skrll #define	IEEE80211_BEACON_BINTVL_LEN		2
   2386  1.1.2.5  skrll #define	IEEE80211_BEACON_CAPINFO_LEN		2
   2387  1.1.2.5  skrll #define	IEEE80211_TLV_SSID_LEN(__esslen)	(2 + (__esslen))
   2388  1.1.2.5  skrll #define	IEEE80211_TLV_SUPRATES_LEN(__nrates)	(2 + (__nrates))
   2389  1.1.2.5  skrll #define	IEEE80211_TLV_XSUPRATES_LEN(__nrates)	(2 + (__nrates))
   2390  1.1.2.5  skrll #define	IEEE80211_TLV_DSPARMS_LEN		3
   2391  1.1.2.5  skrll #define	IEEE80211_TLV_IBSSPARMS			4
   2392  1.1.2.5  skrll #define	IEEE80211_TLV_MIN_TIM			6
   2393  1.1.2.5  skrll 
   2394  1.1.2.5  skrll #define	IEEE80211_TLV_ALLRATES_LEN(__nrates)	\
   2395  1.1.2.5  skrll 	(((__nrates) > IEEE80211_RATE_SIZE) ? 4 + (__nrates) : 2 + (__nrates))
   2396  1.1.2.5  skrll 
   2397  1.1.2.5  skrll /* TBD factor with ieee80211_getmbuf */
   2398  1.1.2.5  skrll static struct mbuf *
   2399  1.1.2.5  skrll rtw_getmbuf(int flags, int type, u_int pktlen)
   2400  1.1.2.5  skrll {
   2401  1.1.2.5  skrll 	struct mbuf *m;
   2402  1.1.2.5  skrll 
   2403  1.1.2.5  skrll 	KASSERT2(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
   2404  1.1.2.5  skrll 	MGETHDR(m, flags, type);
   2405  1.1.2.5  skrll 	if (m == NULL || pktlen <= MHLEN)
   2406  1.1.2.5  skrll 		return m;
   2407  1.1.2.5  skrll 	MCLGET(m, flags);
   2408  1.1.2.5  skrll 	if ((m->m_flags & M_EXT) != 0)
   2409  1.1.2.5  skrll 		return m;
   2410  1.1.2.5  skrll 	m_free(m);
   2411  1.1.2.5  skrll 	return NULL;
   2412  1.1.2.5  skrll }
   2413  1.1.2.5  skrll 
   2414  1.1.2.5  skrll /* TBD factor with ath_beacon_alloc */
   2415  1.1.2.5  skrll static struct mbuf *
   2416  1.1.2.5  skrll rtw_beacon_alloc(struct rtw_softc *sc, struct ieee80211_node *ni)
   2417  1.1.2.5  skrll {
   2418  1.1.2.5  skrll 	struct ieee80211com *ic = &sc->sc_ic;
   2419  1.1.2.5  skrll 	struct ifnet *ifp = &ic->ic_if;
   2420  1.1.2.5  skrll 	struct ieee80211_frame *wh;
   2421  1.1.2.5  skrll 	struct mbuf *m;
   2422  1.1.2.5  skrll 	int pktlen;
   2423  1.1.2.5  skrll 	uint8_t *frm;
   2424  1.1.2.5  skrll 	uint16_t capinfo;
   2425  1.1.2.5  skrll 	struct ieee80211_rateset *rs;
   2426  1.1.2.5  skrll 
   2427  1.1.2.5  skrll 	/*
   2428  1.1.2.5  skrll 	 * NB: the beacon data buffer must be 32-bit aligned;
   2429  1.1.2.5  skrll 	 * we assume the mbuf routines will return us something
   2430  1.1.2.5  skrll 	 * with this alignment (perhaps should assert).
   2431  1.1.2.5  skrll 	 */
   2432  1.1.2.5  skrll 	rs = &ni->ni_rates;
   2433  1.1.2.5  skrll 	pktlen = sizeof(struct ieee80211_frame)
   2434  1.1.2.5  skrll 	       + IEEE80211_BEACON_TIMESTAMP_LEN
   2435  1.1.2.5  skrll 	       + IEEE80211_BEACON_BINTVL_LEN
   2436  1.1.2.5  skrll 	       + IEEE80211_BEACON_CAPINFO_LEN
   2437  1.1.2.5  skrll 	       + IEEE80211_TLV_SSID_LEN(ni->ni_esslen)
   2438  1.1.2.5  skrll 	       + IEEE80211_TLV_ALLRATES_LEN(rs->rs_nrates)
   2439  1.1.2.5  skrll 	       + IEEE80211_TLV_DSPARMS_LEN
   2440  1.1.2.5  skrll 	       + MAX(IEEE80211_TLV_IBSSPARMS, IEEE80211_TLV_MIN_TIM);
   2441  1.1.2.5  skrll 
   2442  1.1.2.5  skrll 	m = rtw_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
   2443  1.1.2.5  skrll 	if (m == NULL) {
   2444  1.1.2.5  skrll 		RTW_DPRINTF(RTW_DEBUG_BEACON,
   2445  1.1.2.5  skrll 			("%s: cannot get mbuf/cluster; size %u\n",
   2446  1.1.2.5  skrll 			__func__, pktlen));
   2447  1.1.2.5  skrll #if 0
   2448  1.1.2.5  skrll 		sc->sc_stats.ast_be_nombuf++;
   2449  1.1.2.5  skrll #endif
   2450  1.1.2.5  skrll 		return NULL;
   2451  1.1.2.5  skrll 	}
   2452  1.1.2.5  skrll 
   2453  1.1.2.5  skrll 	wh = mtod(m, struct ieee80211_frame *);
   2454  1.1.2.5  skrll 	wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
   2455  1.1.2.5  skrll 	    IEEE80211_FC0_SUBTYPE_BEACON;
   2456  1.1.2.5  skrll 	wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
   2457  1.1.2.5  skrll 	*(u_int16_t *)wh->i_dur = 0;
   2458  1.1.2.5  skrll 	memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
   2459  1.1.2.5  skrll 	memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
   2460  1.1.2.5  skrll 	memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
   2461  1.1.2.5  skrll 	*(u_int16_t *)wh->i_seq = 0;
   2462  1.1.2.5  skrll 
   2463  1.1.2.5  skrll 	/*
   2464  1.1.2.5  skrll 	 * beacon frame format
   2465  1.1.2.5  skrll 	 *	[8] time stamp
   2466  1.1.2.5  skrll 	 *	[2] beacon interval
   2467  1.1.2.5  skrll 	 *	[2] cabability information
   2468  1.1.2.5  skrll 	 *	[tlv] ssid
   2469  1.1.2.5  skrll 	 *	[tlv] supported rates
   2470  1.1.2.5  skrll 	 *	[tlv] parameter set (IBSS)
   2471  1.1.2.5  skrll 	 *	[tlv] extended supported rates
   2472  1.1.2.5  skrll 	 */
   2473  1.1.2.5  skrll 	frm = (u_int8_t *)&wh[1];
   2474  1.1.2.5  skrll 	/* timestamp is set by hardware */
   2475  1.1.2.5  skrll 	memset(frm, 0, IEEE80211_BEACON_TIMESTAMP_LEN);
   2476  1.1.2.5  skrll 	frm += IEEE80211_BEACON_TIMESTAMP_LEN;
   2477  1.1.2.5  skrll 	*(u_int16_t *)frm = htole16(ni->ni_intval);
   2478  1.1.2.5  skrll 	frm += IEEE80211_BEACON_BINTVL_LEN;
   2479  1.1.2.5  skrll 	if (ic->ic_opmode == IEEE80211_M_IBSS)
   2480  1.1.2.5  skrll 		capinfo = IEEE80211_CAPINFO_IBSS;
   2481  1.1.2.5  skrll 	else
   2482  1.1.2.5  skrll 		capinfo = IEEE80211_CAPINFO_ESS;
   2483  1.1.2.5  skrll 	if (ic->ic_flags & IEEE80211_F_PRIVACY)
   2484  1.1.2.5  skrll 		capinfo |= IEEE80211_CAPINFO_PRIVACY;
   2485  1.1.2.5  skrll 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
   2486  1.1.2.5  skrll 	    IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
   2487  1.1.2.5  skrll 		capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
   2488  1.1.2.5  skrll 	if (ic->ic_flags & IEEE80211_F_SHSLOT)
   2489  1.1.2.5  skrll 		capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
   2490  1.1.2.5  skrll 	*(u_int16_t *)frm = htole16(capinfo);
   2491  1.1.2.5  skrll 	frm += IEEE80211_BEACON_CAPINFO_LEN;
   2492  1.1.2.5  skrll 	*frm++ = IEEE80211_ELEMID_SSID;
   2493  1.1.2.5  skrll 	*frm++ = ni->ni_esslen;
   2494  1.1.2.5  skrll 	memcpy(frm, ni->ni_essid, ni->ni_esslen);
   2495  1.1.2.5  skrll 	frm += ni->ni_esslen;
   2496  1.1.2.5  skrll 	frm = ieee80211_add_rates(frm, rs);
   2497  1.1.2.5  skrll 	*frm++ = IEEE80211_ELEMID_DSPARMS;
   2498  1.1.2.5  skrll 	*frm++ = 1;
   2499  1.1.2.5  skrll 	*frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
   2500  1.1.2.5  skrll 	if (ic->ic_opmode == IEEE80211_M_IBSS) {
   2501  1.1.2.5  skrll 		*frm++ = IEEE80211_ELEMID_IBSSPARMS;
   2502  1.1.2.5  skrll 		*frm++ = 2;
   2503  1.1.2.5  skrll 		*frm++ = 0; *frm++ = 0;		/* TODO: ATIM window */
   2504  1.1.2.5  skrll 	} else {
   2505  1.1.2.5  skrll 		/* TODO: TIM */
   2506  1.1.2.5  skrll 		*frm++ = IEEE80211_ELEMID_TIM;
   2507  1.1.2.5  skrll 		*frm++ = 4;	/* length */
   2508  1.1.2.5  skrll 		*frm++ = 0;	/* DTIM count */
   2509  1.1.2.5  skrll 		*frm++ = 1;	/* DTIM period */
   2510  1.1.2.5  skrll 		*frm++ = 0;	/* bitmap control */
   2511  1.1.2.5  skrll 		*frm++ = 0;	/* Partial Virtual Bitmap (variable length) */
   2512  1.1.2.5  skrll 	}
   2513  1.1.2.5  skrll 	frm = ieee80211_add_xrates(frm, rs);
   2514  1.1.2.5  skrll 	m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
   2515  1.1.2.5  skrll 	m->m_pkthdr.rcvif = (void *)ni;
   2516  1.1.2.5  skrll 	KASSERT2(m->m_pkthdr.len <= pktlen,
   2517  1.1.2.5  skrll 		("beacon bigger than expected, len %u calculated %u",
   2518  1.1.2.5  skrll 		m->m_pkthdr.len, pktlen));
   2519  1.1.2.5  skrll 
   2520  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_BEACON,
   2521  1.1.2.5  skrll 	    ("%s: m %p len %u\n", __func__, m, m->m_len));
   2522  1.1.2.5  skrll 
   2523  1.1.2.5  skrll 	return m;
   2524  1.1.2.5  skrll }
   2525  1.1.2.5  skrll 
   2526  1.1.2.5  skrll /* Must be called at splnet. */
   2527  1.1.2.2  skrll static int
   2528  1.1.2.2  skrll rtw_init(struct ifnet *ifp)
   2529  1.1.2.2  skrll {
   2530  1.1.2.2  skrll 	struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
   2531  1.1.2.2  skrll 	struct ieee80211com *ic = &sc->sc_ic;
   2532  1.1.2.2  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   2533  1.1.2.4  skrll 	int rc = 0;
   2534  1.1.2.2  skrll 
   2535  1.1.2.2  skrll 	if ((rc = rtw_enable(sc)) != 0)
   2536  1.1.2.2  skrll 		goto out;
   2537  1.1.2.2  skrll 
   2538  1.1.2.2  skrll 	/* Cancel pending I/O and reset. */
   2539  1.1.2.2  skrll 	rtw_stop(ifp, 0);
   2540  1.1.2.2  skrll 
   2541  1.1.2.2  skrll 	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
   2542  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_TUNE, ("%s: channel %d freq %d flags 0x%04x\n",
   2543  1.1.2.2  skrll 	    __func__, ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan),
   2544  1.1.2.2  skrll 	    ic->ic_bss->ni_chan->ic_freq, ic->ic_bss->ni_chan->ic_flags));
   2545  1.1.2.2  skrll 
   2546  1.1.2.2  skrll 	if ((rc = rtw_pwrstate(sc, RTW_OFF)) != 0)
   2547  1.1.2.2  skrll 		goto out;
   2548  1.1.2.2  skrll 
   2549  1.1.2.5  skrll 	if ((rc = rtw_swring_setup(sc)) != 0)
   2550  1.1.2.5  skrll 		goto out;
   2551  1.1.2.2  skrll 
   2552  1.1.2.2  skrll 	rtw_transmit_config(regs);
   2553  1.1.2.2  skrll 
   2554  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_CONFIG);
   2555  1.1.2.2  skrll 
   2556  1.1.2.4  skrll 	RTW_WRITE8(regs, RTW_MSR, 0x0);	/* no link */
   2557  1.1.2.5  skrll 	RTW_WBW(regs, RTW_MSR, RTW_BRSR);
   2558  1.1.2.2  skrll 
   2559  1.1.2.5  skrll 	/* long PLCP header, 1Mb/2Mb basic rate */
   2560  1.1.2.5  skrll 	RTW_WRITE16(regs, RTW_BRSR, RTW_BRSR_MBR8180_2MBPS);
   2561  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_BRSR, RTW_BRSR);
   2562  1.1.2.2  skrll 
   2563  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_ANAPARM);
   2564  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_NONE);
   2565  1.1.2.2  skrll 
   2566  1.1.2.2  skrll 	/* XXX from reference sources */
   2567  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_FEMR, 0xffff);
   2568  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_FEMR, RTW_FEMR);
   2569  1.1.2.2  skrll 
   2570  1.1.2.4  skrll 	rtw_set_rfprog(regs, sc->sc_rfchipid, sc->sc_dev.dv_xname);
   2571  1.1.2.4  skrll 
   2572  1.1.2.4  skrll 	RTW_WRITE8(regs, RTW_PHYDELAY, sc->sc_phydelay);
   2573  1.1.2.2  skrll 	/* from Linux driver */
   2574  1.1.2.4  skrll 	RTW_WRITE8(regs, RTW_CRCOUNT, RTW_CRCOUNT_MAGIC);
   2575  1.1.2.2  skrll 
   2576  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_PHYDELAY, RTW_CRCOUNT);
   2577  1.1.2.5  skrll 
   2578  1.1.2.2  skrll 	rtw_enable_interrupts(sc);
   2579  1.1.2.2  skrll 
   2580  1.1.2.2  skrll 	rtw_pktfilt_load(sc);
   2581  1.1.2.2  skrll 
   2582  1.1.2.4  skrll 	rtw_hwring_setup(sc);
   2583  1.1.2.2  skrll 
   2584  1.1.2.5  skrll 	rtw_wep_setkeys(sc, ic->ic_nw_keys, ic->ic_wep_txkey);
   2585  1.1.2.5  skrll 
   2586  1.1.2.2  skrll 	rtw_io_enable(regs, RTW_CR_RE|RTW_CR_TE, 1);
   2587  1.1.2.2  skrll 
   2588  1.1.2.2  skrll 	ifp->if_flags |= IFF_RUNNING;
   2589  1.1.2.2  skrll 	ic->ic_state = IEEE80211_S_INIT;
   2590  1.1.2.2  skrll 
   2591  1.1.2.2  skrll 	RTW_WRITE16(regs, RTW_BSSID16, 0x0);
   2592  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_BSSID32, 0x0);
   2593  1.1.2.2  skrll 
   2594  1.1.2.2  skrll 	rtw_resume_ticks(sc);
   2595  1.1.2.2  skrll 
   2596  1.1.2.5  skrll 	rtw_set_nettype(sc, IEEE80211_M_MONITOR);
   2597  1.1.2.4  skrll 
   2598  1.1.2.4  skrll 	if (ic->ic_opmode == IEEE80211_M_MONITOR)
   2599  1.1.2.4  skrll 		return ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
   2600  1.1.2.4  skrll 	else
   2601  1.1.2.4  skrll 		return ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
   2602  1.1.2.4  skrll 
   2603  1.1.2.2  skrll out:
   2604  1.1.2.5  skrll 	printf("%s: interface not running\n", sc->sc_dev.dv_xname);
   2605  1.1.2.2  skrll 	return rc;
   2606  1.1.2.2  skrll }
   2607  1.1.2.2  skrll 
   2608  1.1.2.5  skrll static __inline void
   2609  1.1.2.5  skrll rtw_led_init(struct rtw_regs *regs)
   2610  1.1.2.5  skrll {
   2611  1.1.2.5  skrll 	uint8_t cfg0, cfg1;
   2612  1.1.2.5  skrll 
   2613  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_CONFIG);
   2614  1.1.2.5  skrll 
   2615  1.1.2.5  skrll 	cfg0 = RTW_READ8(regs, RTW_CONFIG0);
   2616  1.1.2.5  skrll 	cfg0 |= RTW_CONFIG0_LEDGPOEN;
   2617  1.1.2.5  skrll 	RTW_WRITE8(regs, RTW_CONFIG0, cfg0);
   2618  1.1.2.5  skrll 
   2619  1.1.2.5  skrll 	cfg1 = RTW_READ8(regs, RTW_CONFIG1);
   2620  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_LED,
   2621  1.1.2.5  skrll 	    ("%s: read %" PRIx8 " from reg[CONFIG1]\n", __func__, cfg1));
   2622  1.1.2.5  skrll 
   2623  1.1.2.5  skrll 	cfg1 &= ~RTW_CONFIG1_LEDS_MASK;
   2624  1.1.2.5  skrll 	cfg1 |= RTW_CONFIG1_LEDS_TX_RX;
   2625  1.1.2.5  skrll 	RTW_WRITE8(regs, RTW_CONFIG1, cfg1);
   2626  1.1.2.5  skrll 
   2627  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_NONE);
   2628  1.1.2.5  skrll }
   2629  1.1.2.5  skrll 
   2630  1.1.2.5  skrll /*
   2631  1.1.2.5  skrll  * IEEE80211_S_INIT: 		LED1 off
   2632  1.1.2.5  skrll  *
   2633  1.1.2.5  skrll  * IEEE80211_S_AUTH,
   2634  1.1.2.5  skrll  * IEEE80211_S_ASSOC,
   2635  1.1.2.5  skrll  * IEEE80211_S_SCAN: 		LED1 blinks @ 1 Hz, blinks at 5Hz for tx/rx
   2636  1.1.2.5  skrll  *
   2637  1.1.2.5  skrll  * IEEE80211_S_RUN: 		LED1 on, blinks @ 5Hz for tx/rx
   2638  1.1.2.5  skrll  */
   2639  1.1.2.5  skrll static void
   2640  1.1.2.5  skrll rtw_led_newstate(struct rtw_softc *sc, enum ieee80211_state nstate)
   2641  1.1.2.5  skrll {
   2642  1.1.2.5  skrll 	struct rtw_led_state *ls;
   2643  1.1.2.5  skrll 
   2644  1.1.2.5  skrll 	ls = &sc->sc_led_state;
   2645  1.1.2.5  skrll 
   2646  1.1.2.5  skrll 	switch (nstate) {
   2647  1.1.2.5  skrll 	case IEEE80211_S_INIT:
   2648  1.1.2.5  skrll 		rtw_led_init(&sc->sc_regs);
   2649  1.1.2.5  skrll 		callout_stop(&ls->ls_slow_ch);
   2650  1.1.2.5  skrll 		callout_stop(&ls->ls_fast_ch);
   2651  1.1.2.5  skrll 		ls->ls_slowblink = 0;
   2652  1.1.2.5  skrll 		ls->ls_actblink = 0;
   2653  1.1.2.5  skrll 		ls->ls_default = 0;
   2654  1.1.2.5  skrll 		break;
   2655  1.1.2.5  skrll 	case IEEE80211_S_SCAN:
   2656  1.1.2.5  skrll 		callout_schedule(&ls->ls_slow_ch, RTW_LED_SLOW_TICKS);
   2657  1.1.2.5  skrll 		callout_schedule(&ls->ls_fast_ch, RTW_LED_FAST_TICKS);
   2658  1.1.2.5  skrll 		/*FALLTHROUGH*/
   2659  1.1.2.5  skrll 	case IEEE80211_S_AUTH:
   2660  1.1.2.5  skrll 	case IEEE80211_S_ASSOC:
   2661  1.1.2.5  skrll 		ls->ls_default = RTW_LED1;
   2662  1.1.2.5  skrll 		ls->ls_actblink = RTW_LED1;
   2663  1.1.2.5  skrll 		ls->ls_slowblink = RTW_LED1;
   2664  1.1.2.5  skrll 		break;
   2665  1.1.2.5  skrll 	case IEEE80211_S_RUN:
   2666  1.1.2.5  skrll 		ls->ls_slowblink = 0;
   2667  1.1.2.5  skrll 		break;
   2668  1.1.2.5  skrll 	}
   2669  1.1.2.5  skrll 	rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
   2670  1.1.2.5  skrll }
   2671  1.1.2.5  skrll 
   2672  1.1.2.5  skrll static void
   2673  1.1.2.5  skrll rtw_led_set(struct rtw_led_state *ls, struct rtw_regs *regs, int hwverid)
   2674  1.1.2.5  skrll {
   2675  1.1.2.5  skrll 	uint8_t led_condition;
   2676  1.1.2.5  skrll 	bus_size_t ofs;
   2677  1.1.2.5  skrll 	uint8_t mask, newval, val;
   2678  1.1.2.5  skrll 
   2679  1.1.2.5  skrll 	led_condition = ls->ls_default;
   2680  1.1.2.5  skrll 
   2681  1.1.2.5  skrll 	if (ls->ls_state & RTW_LED_S_SLOW)
   2682  1.1.2.5  skrll 		led_condition ^= ls->ls_slowblink;
   2683  1.1.2.5  skrll 	if (ls->ls_state & (RTW_LED_S_RX|RTW_LED_S_TX))
   2684  1.1.2.5  skrll 		led_condition ^= ls->ls_actblink;
   2685  1.1.2.5  skrll 
   2686  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_LED,
   2687  1.1.2.5  skrll 	    ("%s: LED condition %" PRIx8 "\n", __func__, led_condition));
   2688  1.1.2.5  skrll 
   2689  1.1.2.5  skrll 	switch (hwverid) {
   2690  1.1.2.5  skrll 	default:
   2691  1.1.2.5  skrll 	case 'F':
   2692  1.1.2.5  skrll 		ofs = RTW_PSR;
   2693  1.1.2.5  skrll 		newval = mask = RTW_PSR_LEDGPO0 | RTW_PSR_LEDGPO1;
   2694  1.1.2.5  skrll 		if (led_condition & RTW_LED0)
   2695  1.1.2.5  skrll 			newval &= ~RTW_PSR_LEDGPO0;
   2696  1.1.2.5  skrll 		if (led_condition & RTW_LED1)
   2697  1.1.2.5  skrll 			newval &= ~RTW_PSR_LEDGPO1;
   2698  1.1.2.5  skrll 		break;
   2699  1.1.2.5  skrll 	case 'D':
   2700  1.1.2.5  skrll 		ofs = RTW_9346CR;
   2701  1.1.2.5  skrll 		mask = RTW_9346CR_EEM_MASK | RTW_9346CR_EEDI | RTW_9346CR_EECS;
   2702  1.1.2.5  skrll 		newval = RTW_9346CR_EEM_PROGRAM;
   2703  1.1.2.5  skrll 		if (led_condition & RTW_LED0)
   2704  1.1.2.5  skrll 			newval |= RTW_9346CR_EEDI;
   2705  1.1.2.5  skrll 		if (led_condition & RTW_LED1)
   2706  1.1.2.5  skrll 			newval |= RTW_9346CR_EECS;
   2707  1.1.2.5  skrll 		break;
   2708  1.1.2.5  skrll 	}
   2709  1.1.2.5  skrll 	val = RTW_READ8(regs, ofs);
   2710  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_LED,
   2711  1.1.2.5  skrll 	    ("%s: read %" PRIx8 " from reg[%#02x]\n", __func__, val, ofs));
   2712  1.1.2.5  skrll 	val &= ~mask;
   2713  1.1.2.5  skrll 	val |= newval;
   2714  1.1.2.5  skrll 	RTW_WRITE8(regs, ofs, val);
   2715  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_LED,
   2716  1.1.2.5  skrll 	    ("%s: wrote %" PRIx8 " to reg[%#02x]\n", __func__, val, ofs));
   2717  1.1.2.5  skrll 	RTW_SYNC(regs, ofs, ofs);
   2718  1.1.2.5  skrll }
   2719  1.1.2.5  skrll 
   2720  1.1.2.5  skrll static void
   2721  1.1.2.5  skrll rtw_led_fastblink(void *arg)
   2722  1.1.2.5  skrll {
   2723  1.1.2.5  skrll 	int ostate, s;
   2724  1.1.2.5  skrll 	struct rtw_softc *sc = (struct rtw_softc *)arg;
   2725  1.1.2.5  skrll 	struct rtw_led_state *ls = &sc->sc_led_state;
   2726  1.1.2.5  skrll 
   2727  1.1.2.5  skrll 	s = splnet();
   2728  1.1.2.5  skrll 	ostate = ls->ls_state;
   2729  1.1.2.5  skrll 	ls->ls_state ^= ls->ls_event;
   2730  1.1.2.5  skrll 
   2731  1.1.2.5  skrll 	if ((ls->ls_event & RTW_LED_S_TX) == 0)
   2732  1.1.2.5  skrll 		ls->ls_state &= ~RTW_LED_S_TX;
   2733  1.1.2.5  skrll 
   2734  1.1.2.5  skrll 	if ((ls->ls_event & RTW_LED_S_RX) == 0)
   2735  1.1.2.5  skrll 		ls->ls_state &= ~RTW_LED_S_RX;
   2736  1.1.2.5  skrll 
   2737  1.1.2.5  skrll 	ls->ls_event = 0;
   2738  1.1.2.5  skrll 
   2739  1.1.2.5  skrll 	if (ostate != ls->ls_state)
   2740  1.1.2.5  skrll 		rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
   2741  1.1.2.5  skrll 	splx(s);
   2742  1.1.2.5  skrll 
   2743  1.1.2.5  skrll 	callout_schedule(&ls->ls_fast_ch, RTW_LED_FAST_TICKS);
   2744  1.1.2.5  skrll }
   2745  1.1.2.5  skrll 
   2746  1.1.2.5  skrll static void
   2747  1.1.2.5  skrll rtw_led_slowblink(void *arg)
   2748  1.1.2.5  skrll {
   2749  1.1.2.5  skrll 	int s;
   2750  1.1.2.5  skrll 	struct rtw_softc *sc = (struct rtw_softc *)arg;
   2751  1.1.2.5  skrll 	struct rtw_led_state *ls = &sc->sc_led_state;
   2752  1.1.2.5  skrll 
   2753  1.1.2.5  skrll 	s = splnet();
   2754  1.1.2.5  skrll 	ls->ls_state ^= RTW_LED_S_SLOW;
   2755  1.1.2.5  skrll 	rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
   2756  1.1.2.5  skrll 	splx(s);
   2757  1.1.2.5  skrll 	callout_schedule(&ls->ls_slow_ch, RTW_LED_SLOW_TICKS);
   2758  1.1.2.5  skrll }
   2759  1.1.2.5  skrll 
   2760  1.1.2.5  skrll static __inline void
   2761  1.1.2.5  skrll rtw_led_attach(struct rtw_softc *sc)
   2762  1.1.2.5  skrll {
   2763  1.1.2.5  skrll 	struct rtw_led_state *ls = &sc->sc_led_state;
   2764  1.1.2.5  skrll 
   2765  1.1.2.5  skrll 	callout_init(&ls->ls_fast_ch);
   2766  1.1.2.5  skrll 	callout_init(&ls->ls_slow_ch);
   2767  1.1.2.5  skrll 	callout_setfunc(&ls->ls_fast_ch, rtw_led_fastblink, (void *)sc);
   2768  1.1.2.5  skrll 	callout_setfunc(&ls->ls_slow_ch, rtw_led_slowblink, (void *)sc);
   2769  1.1.2.5  skrll }
   2770  1.1.2.5  skrll 
   2771  1.1.2.2  skrll static int
   2772  1.1.2.2  skrll rtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
   2773  1.1.2.2  skrll {
   2774  1.1.2.5  skrll 	int rc = 0, s;
   2775  1.1.2.2  skrll 	struct rtw_softc *sc = ifp->if_softc;
   2776  1.1.2.2  skrll 	struct ifreq *ifr = (struct ifreq *)data;
   2777  1.1.2.2  skrll 
   2778  1.1.2.5  skrll 	s = splnet();
   2779  1.1.2.2  skrll 	switch (cmd) {
   2780  1.1.2.2  skrll 	case SIOCSIFFLAGS:
   2781  1.1.2.2  skrll 		if ((ifp->if_flags & IFF_UP) != 0) {
   2782  1.1.2.2  skrll 			if ((sc->sc_flags & RTW_F_ENABLED) != 0) {
   2783  1.1.2.2  skrll 				rtw_pktfilt_load(sc);
   2784  1.1.2.2  skrll 			} else
   2785  1.1.2.2  skrll 				rc = rtw_init(ifp);
   2786  1.1.2.5  skrll 			RTW_PRINT_REGS(&sc->sc_regs, ifp->if_xname, __func__);
   2787  1.1.2.2  skrll 		} else if ((sc->sc_flags & RTW_F_ENABLED) != 0) {
   2788  1.1.2.5  skrll 			RTW_PRINT_REGS(&sc->sc_regs, ifp->if_xname, __func__);
   2789  1.1.2.2  skrll 			rtw_stop(ifp, 1);
   2790  1.1.2.2  skrll 		}
   2791  1.1.2.2  skrll 		break;
   2792  1.1.2.2  skrll 	case SIOCADDMULTI:
   2793  1.1.2.2  skrll 	case SIOCDELMULTI:
   2794  1.1.2.2  skrll 		if (cmd == SIOCADDMULTI)
   2795  1.1.2.2  skrll 			rc = ether_addmulti(ifr, &sc->sc_ic.ic_ec);
   2796  1.1.2.2  skrll 		else
   2797  1.1.2.2  skrll 			rc = ether_delmulti(ifr, &sc->sc_ic.ic_ec);
   2798  1.1.2.5  skrll 		if (rc != ENETRESET)
   2799  1.1.2.5  skrll 			break;
   2800  1.1.2.5  skrll 		if (ifp->if_flags & IFF_RUNNING)
   2801  1.1.2.5  skrll 			rtw_pktfilt_load(sc);
   2802  1.1.2.5  skrll 		rc = 0;
   2803  1.1.2.5  skrll 		break;
   2804  1.1.2.5  skrll 	case SIOCS80211NWKEY:
   2805  1.1.2.5  skrll 		if ((rc = ieee80211_ioctl(ifp, cmd, data)) != ENETRESET)
   2806  1.1.2.5  skrll 			break;
   2807  1.1.2.5  skrll 		rc = 0;
   2808  1.1.2.5  skrll 		if ((ifp->if_flags & IFF_RUNNING) == 0)
   2809  1.1.2.5  skrll 			break;
   2810  1.1.2.5  skrll 		rtw_wep_setkeys(sc, sc->sc_ic.ic_nw_keys,
   2811  1.1.2.5  skrll 		    sc->sc_ic.ic_wep_txkey);
   2812  1.1.2.2  skrll 		break;
   2813  1.1.2.2  skrll 	default:
   2814  1.1.2.5  skrll 		if ((rc = ieee80211_ioctl(ifp, cmd, data)) != ENETRESET)
   2815  1.1.2.5  skrll 			break;
   2816  1.1.2.5  skrll 		if ((sc->sc_flags & RTW_F_ENABLED) != 0)
   2817  1.1.2.5  skrll 			rc = rtw_init(ifp);
   2818  1.1.2.5  skrll 		else
   2819  1.1.2.5  skrll 			rc = 0;
   2820  1.1.2.2  skrll 		break;
   2821  1.1.2.2  skrll 	}
   2822  1.1.2.5  skrll 	splx(s);
   2823  1.1.2.2  skrll 	return rc;
   2824  1.1.2.2  skrll }
   2825  1.1.2.2  skrll 
   2826  1.1.2.5  skrll /* Select a transmit ring with at least one h/w and s/w descriptor free.
   2827  1.1.2.5  skrll  * Return 0 on success, -1 on failure.
   2828  1.1.2.5  skrll  */
   2829  1.1.2.5  skrll static __inline int
   2830  1.1.2.5  skrll rtw_txring_choose(struct rtw_softc *sc, struct rtw_txsoft_blk **tsbp,
   2831  1.1.2.5  skrll     struct rtw_txdesc_blk **tdbp, int pri)
   2832  1.1.2.5  skrll {
   2833  1.1.2.5  skrll 	struct rtw_txsoft_blk *tsb;
   2834  1.1.2.5  skrll 	struct rtw_txdesc_blk *tdb;
   2835  1.1.2.5  skrll 
   2836  1.1.2.5  skrll 	KASSERT(pri >= 0 && pri < RTW_NTXPRI);
   2837  1.1.2.5  skrll 
   2838  1.1.2.5  skrll 	tsb = &sc->sc_txsoft_blk[pri];
   2839  1.1.2.5  skrll 	tdb = &sc->sc_txdesc_blk[pri];
   2840  1.1.2.5  skrll 
   2841  1.1.2.5  skrll 	if (SIMPLEQ_EMPTY(&tsb->tsb_freeq) || tdb->tdb_nfree == 0) {
   2842  1.1.2.5  skrll 		*tsbp = NULL;
   2843  1.1.2.5  skrll 		*tdbp = NULL;
   2844  1.1.2.5  skrll 		return -1;
   2845  1.1.2.5  skrll 	}
   2846  1.1.2.5  skrll 	*tsbp = tsb;
   2847  1.1.2.5  skrll 	*tdbp = tdb;
   2848  1.1.2.5  skrll 	return 0;
   2849  1.1.2.5  skrll }
   2850  1.1.2.5  skrll 
   2851  1.1.2.5  skrll static __inline struct mbuf *
   2852  1.1.2.5  skrll rtw_80211_dequeue(struct rtw_softc *sc, struct ifqueue *ifq, int pri,
   2853  1.1.2.5  skrll     struct rtw_txsoft_blk **tsbp, struct rtw_txdesc_blk **tdbp,
   2854  1.1.2.5  skrll     struct ieee80211_node **nip, short *if_flagsp)
   2855  1.1.2.5  skrll {
   2856  1.1.2.5  skrll 	struct mbuf *m;
   2857  1.1.2.5  skrll 
   2858  1.1.2.5  skrll 	if (IF_IS_EMPTY(ifq))
   2859  1.1.2.5  skrll 		return NULL;
   2860  1.1.2.5  skrll 	if (rtw_txring_choose(sc, tsbp, tdbp, pri) == -1) {
   2861  1.1.2.5  skrll 		*if_flagsp |= IFF_OACTIVE;
   2862  1.1.2.5  skrll 		return NULL;
   2863  1.1.2.5  skrll 	}
   2864  1.1.2.5  skrll 	IF_DEQUEUE(ifq, m);
   2865  1.1.2.5  skrll 	*nip = (struct ieee80211_node *)m->m_pkthdr.rcvif;
   2866  1.1.2.5  skrll 	m->m_pkthdr.rcvif = NULL;
   2867  1.1.2.5  skrll 	return m;
   2868  1.1.2.5  skrll }
   2869  1.1.2.5  skrll 
   2870  1.1.2.5  skrll /* Point *mp at the next 802.11 frame to transmit.  Point *tsbp
   2871  1.1.2.2  skrll  * at the driver's selection of transmit control block for the packet.
   2872  1.1.2.2  skrll  */
   2873  1.1.2.2  skrll static __inline int
   2874  1.1.2.5  skrll rtw_dequeue(struct ifnet *ifp, struct rtw_txsoft_blk **tsbp,
   2875  1.1.2.5  skrll     struct rtw_txdesc_blk **tdbp, struct mbuf **mp,
   2876  1.1.2.2  skrll     struct ieee80211_node **nip)
   2877  1.1.2.2  skrll {
   2878  1.1.2.2  skrll 	struct mbuf *m0;
   2879  1.1.2.2  skrll 	struct rtw_softc *sc;
   2880  1.1.2.5  skrll 	short *if_flagsp;
   2881  1.1.2.2  skrll 
   2882  1.1.2.2  skrll 	sc = (struct rtw_softc *)ifp->if_softc;
   2883  1.1.2.5  skrll 
   2884  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_XMIT,
   2885  1.1.2.5  skrll 	    ("%s: enter %s\n", sc->sc_dev.dv_xname, __func__));
   2886  1.1.2.5  skrll 
   2887  1.1.2.5  skrll 	if_flagsp = &ifp->if_flags;
   2888  1.1.2.5  skrll 
   2889  1.1.2.5  skrll 	if (sc->sc_ic.ic_state == IEEE80211_S_RUN &&
   2890  1.1.2.5  skrll 	    (*mp = rtw_80211_dequeue(sc, &sc->sc_beaconq, RTW_TXPRIBCN, tsbp,
   2891  1.1.2.5  skrll 		                     tdbp, nip, if_flagsp)) != NULL) {
   2892  1.1.2.5  skrll 		DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue beacon frame\n",
   2893  1.1.2.5  skrll 		    __func__));
   2894  1.1.2.5  skrll 		return 0;
   2895  1.1.2.5  skrll 	}
   2896  1.1.2.5  skrll 
   2897  1.1.2.5  skrll 	if ((*mp = rtw_80211_dequeue(sc, &sc->sc_ic.ic_mgtq, RTW_TXPRIMD, tsbp,
   2898  1.1.2.5  skrll 		                     tdbp, nip, if_flagsp)) != NULL) {
   2899  1.1.2.5  skrll 		DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue mgt frame\n",
   2900  1.1.2.5  skrll 		    __func__));
   2901  1.1.2.5  skrll 		return 0;
   2902  1.1.2.5  skrll 	}
   2903  1.1.2.5  skrll 
   2904  1.1.2.5  skrll 	if (sc->sc_ic.ic_state != IEEE80211_S_RUN) {
   2905  1.1.2.5  skrll 		DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: not running\n", __func__));
   2906  1.1.2.5  skrll 		return 0;
   2907  1.1.2.5  skrll 	}
   2908  1.1.2.5  skrll 
   2909  1.1.2.5  skrll 	if ((*mp = rtw_80211_dequeue(sc, &sc->sc_ic.ic_pwrsaveq, RTW_TXPRIHI,
   2910  1.1.2.5  skrll 	                             tsbp, tdbp, nip, if_flagsp)) != NULL) {
   2911  1.1.2.5  skrll 		DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue pwrsave frame\n",
   2912  1.1.2.5  skrll 		    __func__));
   2913  1.1.2.5  skrll 		return 0;
   2914  1.1.2.5  skrll 	}
   2915  1.1.2.5  skrll 
   2916  1.1.2.5  skrll 	if (rtw_txring_choose(sc, tsbp, tdbp, RTW_TXPRIMD) == -1) {
   2917  1.1.2.5  skrll 		DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no descriptor\n", __func__));
   2918  1.1.2.5  skrll 		*if_flagsp |= IFF_OACTIVE;
   2919  1.1.2.5  skrll 		return 0;
   2920  1.1.2.5  skrll 	}
   2921  1.1.2.2  skrll 
   2922  1.1.2.2  skrll 	*mp = NULL;
   2923  1.1.2.2  skrll 
   2924  1.1.2.5  skrll 	IFQ_DEQUEUE(&ifp->if_snd, m0);
   2925  1.1.2.5  skrll 	if (m0 == NULL) {
   2926  1.1.2.5  skrll 		DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no frame/ring ready\n",
   2927  1.1.2.5  skrll 		    __func__));
   2928  1.1.2.2  skrll 		return 0;
   2929  1.1.2.5  skrll 	}
   2930  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue data frame\n", __func__));
   2931  1.1.2.5  skrll 	ifp->if_opackets++;
   2932  1.1.2.2  skrll #if NBPFILTER > 0
   2933  1.1.2.5  skrll 	if (ifp->if_bpf)
   2934  1.1.2.5  skrll 		bpf_mtap(ifp->if_bpf, m0);
   2935  1.1.2.2  skrll #endif
   2936  1.1.2.5  skrll 	if ((m0 = ieee80211_encap(ifp, m0, nip)) == NULL) {
   2937  1.1.2.5  skrll 		DPRINTF(sc, RTW_DEBUG_XMIT,
   2938  1.1.2.5  skrll 		    ("%s: encap error\n", __func__));
   2939  1.1.2.5  skrll 		ifp->if_oerrors++;
   2940  1.1.2.5  skrll 		return -1;
   2941  1.1.2.2  skrll 	}
   2942  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
   2943  1.1.2.2  skrll 	*mp = m0;
   2944  1.1.2.2  skrll 	return 0;
   2945  1.1.2.2  skrll }
   2946  1.1.2.2  skrll 
   2947  1.1.2.5  skrll static int
   2948  1.1.2.5  skrll rtw_seg_too_short(bus_dmamap_t dmamap)
   2949  1.1.2.5  skrll {
   2950  1.1.2.5  skrll 	int i;
   2951  1.1.2.5  skrll 	for (i = 0; i < dmamap->dm_nsegs; i++) {
   2952  1.1.2.5  skrll 		if (dmamap->dm_segs[i].ds_len < 4) {
   2953  1.1.2.5  skrll 			printf("%s: segment too short\n", __func__);
   2954  1.1.2.5  skrll 			return 1;
   2955  1.1.2.5  skrll 		}
   2956  1.1.2.5  skrll 	}
   2957  1.1.2.5  skrll 	return 0;
   2958  1.1.2.5  skrll }
   2959  1.1.2.5  skrll 
   2960  1.1.2.5  skrll /* TBD factor with atw_start */
   2961  1.1.2.5  skrll static struct mbuf *
   2962  1.1.2.5  skrll rtw_dmamap_load_txbuf(bus_dma_tag_t dmat, bus_dmamap_t dmam, struct mbuf *chain,
   2963  1.1.2.5  skrll     u_int ndescfree, short *ifflagsp, const char *dvname)
   2964  1.1.2.5  skrll {
   2965  1.1.2.5  skrll 	int first, rc;
   2966  1.1.2.5  skrll 	struct mbuf *m, *m0;
   2967  1.1.2.5  skrll 
   2968  1.1.2.5  skrll 	m0 = chain;
   2969  1.1.2.5  skrll 
   2970  1.1.2.5  skrll 	/*
   2971  1.1.2.5  skrll 	 * Load the DMA map.  Copy and try (once) again if the packet
   2972  1.1.2.5  skrll 	 * didn't fit in the alloted number of segments.
   2973  1.1.2.5  skrll 	 */
   2974  1.1.2.5  skrll 	for (first = 1;
   2975  1.1.2.5  skrll 	     ((rc = bus_dmamap_load_mbuf(dmat, dmam, m0,
   2976  1.1.2.5  skrll 			  BUS_DMA_WRITE|BUS_DMA_NOWAIT)) != 0 ||
   2977  1.1.2.5  skrll 	      dmam->dm_nsegs > ndescfree || rtw_seg_too_short(dmam)) && first;
   2978  1.1.2.5  skrll 	     first = 0) {
   2979  1.1.2.5  skrll 		if (rc == 0)
   2980  1.1.2.5  skrll 			bus_dmamap_unload(dmat, dmam);
   2981  1.1.2.5  skrll 		MGETHDR(m, M_DONTWAIT, MT_DATA);
   2982  1.1.2.5  skrll 		if (m == NULL) {
   2983  1.1.2.5  skrll 			printf("%s: unable to allocate Tx mbuf\n",
   2984  1.1.2.5  skrll 			    dvname);
   2985  1.1.2.5  skrll 			break;
   2986  1.1.2.5  skrll 		}
   2987  1.1.2.5  skrll 		if (m0->m_pkthdr.len > MHLEN) {
   2988  1.1.2.5  skrll 			MCLGET(m, M_DONTWAIT);
   2989  1.1.2.5  skrll 			if ((m->m_flags & M_EXT) == 0) {
   2990  1.1.2.5  skrll 				printf("%s: cannot allocate Tx cluster\n",
   2991  1.1.2.5  skrll 				    dvname);
   2992  1.1.2.5  skrll 				m_freem(m);
   2993  1.1.2.5  skrll 				break;
   2994  1.1.2.5  skrll 			}
   2995  1.1.2.5  skrll 		}
   2996  1.1.2.5  skrll 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
   2997  1.1.2.5  skrll 		m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
   2998  1.1.2.5  skrll 		m_freem(m0);
   2999  1.1.2.5  skrll 		m0 = m;
   3000  1.1.2.5  skrll 		m = NULL;
   3001  1.1.2.5  skrll 	}
   3002  1.1.2.5  skrll 	if (rc != 0) {
   3003  1.1.2.5  skrll 		printf("%s: cannot load Tx buffer, rc = %d\n", dvname, rc);
   3004  1.1.2.5  skrll 		m_freem(m0);
   3005  1.1.2.5  skrll 		return NULL;
   3006  1.1.2.5  skrll 	} else if (rtw_seg_too_short(dmam)) {
   3007  1.1.2.5  skrll 		printf("%s: cannot load Tx buffer, segment too short\n",
   3008  1.1.2.5  skrll 		    dvname);
   3009  1.1.2.5  skrll 		bus_dmamap_unload(dmat, dmam);
   3010  1.1.2.5  skrll 		m_freem(m0);
   3011  1.1.2.5  skrll 		return NULL;
   3012  1.1.2.5  skrll 	} else if (dmam->dm_nsegs > ndescfree) {
   3013  1.1.2.5  skrll 		*ifflagsp |= IFF_OACTIVE;
   3014  1.1.2.5  skrll 		bus_dmamap_unload(dmat, dmam);
   3015  1.1.2.5  skrll 		m_freem(m0);
   3016  1.1.2.5  skrll 		return NULL;
   3017  1.1.2.5  skrll 	}
   3018  1.1.2.5  skrll 	return m0;
   3019  1.1.2.5  skrll }
   3020  1.1.2.5  skrll 
   3021  1.1.2.5  skrll #ifdef RTW_DEBUG
   3022  1.1.2.5  skrll static void
   3023  1.1.2.5  skrll rtw_print_txdesc(struct rtw_softc *sc, const char *action,
   3024  1.1.2.5  skrll     struct rtw_txsoft *ts, struct rtw_txdesc_blk *tdb, int desc)
   3025  1.1.2.5  skrll {
   3026  1.1.2.5  skrll 	struct rtw_txdesc *td = &tdb->tdb_desc[desc];
   3027  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_XMIT_DESC, ("%s: %p %s txdesc[%d] ctl0 %#08x "
   3028  1.1.2.5  skrll 	    "ctl1 %#08x buf %#08x len %#08x\n",
   3029  1.1.2.5  skrll 	    sc->sc_dev.dv_xname, ts, action, desc,
   3030  1.1.2.5  skrll 	    le32toh(td->td_ctl0),
   3031  1.1.2.5  skrll 	    le32toh(td->td_ctl1), le32toh(td->td_buf),
   3032  1.1.2.5  skrll 	    le32toh(td->td_len)));
   3033  1.1.2.5  skrll }
   3034  1.1.2.5  skrll #endif /* RTW_DEBUG */
   3035  1.1.2.5  skrll 
   3036  1.1.2.2  skrll static void
   3037  1.1.2.2  skrll rtw_start(struct ifnet *ifp)
   3038  1.1.2.2  skrll {
   3039  1.1.2.5  skrll 	uint8_t tppoll;
   3040  1.1.2.5  skrll 	int desc, i, lastdesc, npkt, rate;
   3041  1.1.2.5  skrll 	uint32_t proto_ctl0, ctl0, ctl1;
   3042  1.1.2.5  skrll 	bus_dmamap_t		dmamap;
   3043  1.1.2.5  skrll 	struct ieee80211com	*ic;
   3044  1.1.2.5  skrll 	struct ieee80211_duration *d0;
   3045  1.1.2.5  skrll 	struct ieee80211_frame	*wh;
   3046  1.1.2.5  skrll 	struct ieee80211_node	*ni;
   3047  1.1.2.5  skrll 	struct mbuf		*m0;
   3048  1.1.2.5  skrll 	struct rtw_softc	*sc;
   3049  1.1.2.5  skrll 	struct rtw_txsoft_blk	*tsb;
   3050  1.1.2.5  skrll 	struct rtw_txdesc_blk	*tdb;
   3051  1.1.2.5  skrll 	struct rtw_txsoft	*ts;
   3052  1.1.2.5  skrll 	struct rtw_txdesc	*td;
   3053  1.1.2.2  skrll 
   3054  1.1.2.2  skrll 	sc = (struct rtw_softc *)ifp->if_softc;
   3055  1.1.2.5  skrll 	ic = &sc->sc_ic;
   3056  1.1.2.2  skrll 
   3057  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_XMIT,
   3058  1.1.2.5  skrll 	    ("%s: enter %s\n", sc->sc_dev.dv_xname, __func__));
   3059  1.1.2.5  skrll 
   3060  1.1.2.5  skrll 	if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
   3061  1.1.2.5  skrll 		goto out;
   3062  1.1.2.5  skrll 
   3063  1.1.2.5  skrll 	/* XXX do real rate control */
   3064  1.1.2.5  skrll 	proto_ctl0 = RTW_TXCTL0_RTSRATE_1MBPS;
   3065  1.1.2.5  skrll 
   3066  1.1.2.5  skrll 	rate = MAX(2, ieee80211_get_rate(ic));
   3067  1.1.2.5  skrll 
   3068  1.1.2.5  skrll 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0)
   3069  1.1.2.5  skrll 		proto_ctl0 |= RTW_TXCTL0_SPLCP;
   3070  1.1.2.5  skrll 
   3071  1.1.2.5  skrll 	for (;;) {
   3072  1.1.2.5  skrll 		if (rtw_dequeue(ifp, &tsb, &tdb, &m0, &ni) == -1)
   3073  1.1.2.2  skrll 			continue;
   3074  1.1.2.2  skrll 		if (m0 == NULL)
   3075  1.1.2.2  skrll 			break;
   3076  1.1.2.5  skrll 		ts = SIMPLEQ_FIRST(&tsb->tsb_freeq);
   3077  1.1.2.5  skrll 
   3078  1.1.2.5  skrll 		dmamap = ts->ts_dmamap;
   3079  1.1.2.5  skrll 
   3080  1.1.2.5  skrll 		m0 = rtw_dmamap_load_txbuf(sc->sc_dmat, dmamap, m0,
   3081  1.1.2.5  skrll 		    tdb->tdb_nfree, &ifp->if_flags, sc->sc_dev.dv_xname);
   3082  1.1.2.5  skrll 
   3083  1.1.2.5  skrll 		if (m0 == NULL || dmamap->dm_nsegs == 0) {
   3084  1.1.2.5  skrll 			DPRINTF(sc, RTW_DEBUG_XMIT,
   3085  1.1.2.5  skrll 			    ("%s: fail dmamap load\n", __func__));
   3086  1.1.2.5  skrll 			goto post_dequeue_err;
   3087  1.1.2.5  skrll 		}
   3088  1.1.2.5  skrll 
   3089  1.1.2.5  skrll #ifdef RTW_DEBUG
   3090  1.1.2.5  skrll 		if ((sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
   3091  1.1.2.5  skrll 		    (IFF_DEBUG|IFF_LINK2)) {
   3092  1.1.2.5  skrll 			ieee80211_dump_pkt(mtod(m0, uint8_t *),
   3093  1.1.2.5  skrll 			    (dmamap->dm_nsegs == 1) ? m0->m_pkthdr.len
   3094  1.1.2.5  skrll 			                            : sizeof(wh),
   3095  1.1.2.5  skrll 			    rate, 0);
   3096  1.1.2.5  skrll 		}
   3097  1.1.2.5  skrll #endif /* RTW_DEBUG */
   3098  1.1.2.5  skrll 		ctl0 = proto_ctl0 |
   3099  1.1.2.5  skrll 		    LSHIFT(m0->m_pkthdr.len, RTW_TXCTL0_TPKTSIZE_MASK);
   3100  1.1.2.5  skrll 
   3101  1.1.2.5  skrll 		wh = mtod(m0, struct ieee80211_frame *);
   3102  1.1.2.5  skrll 
   3103  1.1.2.5  skrll 		if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
   3104  1.1.2.5  skrll 		    IEEE80211_FC0_TYPE_MGT) {
   3105  1.1.2.5  skrll 			ctl0 |= RTW_TXCTL0_RATE_1MBPS;
   3106  1.1.2.5  skrll 		} else switch (rate) {
   3107  1.1.2.5  skrll 		default:
   3108  1.1.2.5  skrll 		case 2:
   3109  1.1.2.5  skrll 			ctl0 |= RTW_TXCTL0_RATE_1MBPS;
   3110  1.1.2.5  skrll 			break;
   3111  1.1.2.5  skrll 		case 4:
   3112  1.1.2.5  skrll 			ctl0 |= RTW_TXCTL0_RATE_2MBPS;
   3113  1.1.2.5  skrll 			break;
   3114  1.1.2.5  skrll 		case 11:
   3115  1.1.2.5  skrll 			ctl0 |= RTW_TXCTL0_RATE_5MBPS;
   3116  1.1.2.5  skrll 			break;
   3117  1.1.2.5  skrll 		case 22:
   3118  1.1.2.5  skrll 			ctl0 |= RTW_TXCTL0_RATE_11MBPS;
   3119  1.1.2.5  skrll 			break;
   3120  1.1.2.5  skrll 		}
   3121  1.1.2.5  skrll 
   3122  1.1.2.5  skrll 		if ((wh->i_fc[1] & IEEE80211_FC1_WEP) != 0)
   3123  1.1.2.5  skrll 			ctl0 |= LSHIFT(sc->sc_txkey, RTW_TXCTL0_KEYID_MASK);
   3124  1.1.2.5  skrll 
   3125  1.1.2.5  skrll 		if (ieee80211_compute_duration(wh, m0->m_pkthdr.len,
   3126  1.1.2.5  skrll 		    ic->ic_flags, ic->ic_fragthreshold,
   3127  1.1.2.5  skrll 		    rate, &ts->ts_d0, &ts->ts_dn, &npkt,
   3128  1.1.2.5  skrll 		    (sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
   3129  1.1.2.5  skrll 		    (IFF_DEBUG|IFF_LINK2)) == -1) {
   3130  1.1.2.5  skrll 			DPRINTF(sc, RTW_DEBUG_XMIT,
   3131  1.1.2.5  skrll 			    ("%s: fail compute duration\n", __func__));
   3132  1.1.2.5  skrll 			goto post_load_err;
   3133  1.1.2.5  skrll 		}
   3134  1.1.2.5  skrll 
   3135  1.1.2.5  skrll 		/* XXX >= ? */
   3136  1.1.2.5  skrll 		if (m0->m_pkthdr.len > ic->ic_rtsthreshold)
   3137  1.1.2.5  skrll 			ctl0 |= RTW_TXCTL0_RTSEN;
   3138  1.1.2.5  skrll 
   3139  1.1.2.5  skrll 		d0 = &ts->ts_d0;
   3140  1.1.2.5  skrll 
   3141  1.1.2.5  skrll 		*(uint16_t*)wh->i_dur = htole16(d0->d_data_dur);
   3142  1.1.2.5  skrll 
   3143  1.1.2.5  skrll 		ctl1 = LSHIFT(d0->d_plcp_len, RTW_TXCTL1_LENGTH_MASK) |
   3144  1.1.2.5  skrll 		    LSHIFT(d0->d_rts_dur, RTW_TXCTL1_RTSDUR_MASK);
   3145  1.1.2.5  skrll 
   3146  1.1.2.5  skrll 		if (d0->d_residue)
   3147  1.1.2.5  skrll 			ctl1 |= RTW_TXCTL1_LENGEXT;
   3148  1.1.2.5  skrll 
   3149  1.1.2.5  skrll 		/* TBD fragmentation */
   3150  1.1.2.5  skrll 
   3151  1.1.2.5  skrll 		ts->ts_first = tdb->tdb_next;
   3152  1.1.2.5  skrll 
   3153  1.1.2.5  skrll 		rtw_txdescs_sync(tdb, ts->ts_first, dmamap->dm_nsegs,
   3154  1.1.2.5  skrll 		    BUS_DMASYNC_PREWRITE);
   3155  1.1.2.5  skrll 
   3156  1.1.2.5  skrll 		KASSERT(ts->ts_first < tdb->tdb_ndesc);
   3157  1.1.2.5  skrll 
   3158  1.1.2.5  skrll #if NBPFILTER > 0
   3159  1.1.2.5  skrll 		if (ic->ic_rawbpf != NULL)
   3160  1.1.2.5  skrll 			bpf_mtap((caddr_t)ic->ic_rawbpf, m0);
   3161  1.1.2.5  skrll 
   3162  1.1.2.5  skrll 		if (sc->sc_radiobpf != NULL) {
   3163  1.1.2.5  skrll 			struct rtw_tx_radiotap_header *rt = &sc->sc_txtap;
   3164  1.1.2.5  skrll 
   3165  1.1.2.5  skrll 			rt->rt_flags = 0;
   3166  1.1.2.5  skrll 			rt->rt_rate = rate;
   3167  1.1.2.5  skrll 			rt->rt_chan_freq =
   3168  1.1.2.5  skrll 			    htole16(ic->ic_bss->ni_chan->ic_freq);
   3169  1.1.2.5  skrll 			rt->rt_chan_flags =
   3170  1.1.2.5  skrll 			    htole16(ic->ic_bss->ni_chan->ic_flags);
   3171  1.1.2.5  skrll 
   3172  1.1.2.5  skrll 			bpf_mtap2(sc->sc_radiobpf, (caddr_t)rt,
   3173  1.1.2.5  skrll 			    sizeof(sc->sc_txtapu), m0);
   3174  1.1.2.5  skrll 		}
   3175  1.1.2.5  skrll #endif /* NPBFILTER > 0 */
   3176  1.1.2.5  skrll 
   3177  1.1.2.5  skrll 		for (i = 0, lastdesc = desc = ts->ts_first;
   3178  1.1.2.5  skrll 		     i < dmamap->dm_nsegs;
   3179  1.1.2.5  skrll 		     i++, desc = RTW_NEXT_IDX(tdb, desc)) {
   3180  1.1.2.5  skrll 			if (dmamap->dm_segs[i].ds_len > RTW_TXLEN_LENGTH_MASK) {
   3181  1.1.2.5  skrll 				DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
   3182  1.1.2.5  skrll 				    ("%s: seg too long\n", __func__));
   3183  1.1.2.5  skrll 				goto post_load_err;
   3184  1.1.2.5  skrll 			}
   3185  1.1.2.5  skrll 			td = &tdb->tdb_desc[desc];
   3186  1.1.2.5  skrll 			td->td_ctl0 = htole32(ctl0);
   3187  1.1.2.5  skrll 			if (i != 0)
   3188  1.1.2.5  skrll 				td->td_ctl0 |= htole32(RTW_TXCTL0_OWN);
   3189  1.1.2.5  skrll 			td->td_ctl1 = htole32(ctl1);
   3190  1.1.2.5  skrll 			td->td_buf = htole32(dmamap->dm_segs[i].ds_addr);
   3191  1.1.2.5  skrll 			td->td_len = htole32(dmamap->dm_segs[i].ds_len);
   3192  1.1.2.5  skrll 			lastdesc = desc;
   3193  1.1.2.5  skrll #ifdef RTW_DEBUG
   3194  1.1.2.5  skrll 			rtw_print_txdesc(sc, "load", ts, tdb, desc);
   3195  1.1.2.5  skrll #endif /* RTW_DEBUG */
   3196  1.1.2.5  skrll 		}
   3197  1.1.2.5  skrll 
   3198  1.1.2.5  skrll 		KASSERT(desc < tdb->tdb_ndesc);
   3199  1.1.2.5  skrll 
   3200  1.1.2.5  skrll 		ts->ts_ni = ni;
   3201  1.1.2.5  skrll 		ts->ts_mbuf = m0;
   3202  1.1.2.5  skrll 		ts->ts_last = lastdesc;
   3203  1.1.2.5  skrll 		tdb->tdb_desc[ts->ts_last].td_ctl0 |= htole32(RTW_TXCTL0_LS);
   3204  1.1.2.5  skrll 		tdb->tdb_desc[ts->ts_first].td_ctl0 |=
   3205  1.1.2.5  skrll 		   htole32(RTW_TXCTL0_FS);
   3206  1.1.2.5  skrll 
   3207  1.1.2.5  skrll #ifdef RTW_DEBUG
   3208  1.1.2.5  skrll 		rtw_print_txdesc(sc, "FS on", ts, tdb, ts->ts_first);
   3209  1.1.2.5  skrll 		rtw_print_txdesc(sc, "LS on", ts, tdb, ts->ts_last);
   3210  1.1.2.5  skrll #endif /* RTW_DEBUG */
   3211  1.1.2.5  skrll 
   3212  1.1.2.5  skrll 		tdb->tdb_nfree -= dmamap->dm_nsegs;
   3213  1.1.2.5  skrll 		tdb->tdb_next = desc;
   3214  1.1.2.5  skrll 
   3215  1.1.2.5  skrll 		rtw_txdescs_sync(tdb, ts->ts_first, dmamap->dm_nsegs,
   3216  1.1.2.5  skrll 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3217  1.1.2.5  skrll 
   3218  1.1.2.5  skrll 		tdb->tdb_desc[ts->ts_first].td_ctl0 |=
   3219  1.1.2.5  skrll 		    htole32(RTW_TXCTL0_OWN);
   3220  1.1.2.5  skrll 
   3221  1.1.2.5  skrll #ifdef RTW_DEBUG
   3222  1.1.2.5  skrll 		rtw_print_txdesc(sc, "OWN on", ts, tdb, ts->ts_first);
   3223  1.1.2.5  skrll #endif /* RTW_DEBUG */
   3224  1.1.2.5  skrll 
   3225  1.1.2.5  skrll 		rtw_txdescs_sync(tdb, ts->ts_first, 1,
   3226  1.1.2.5  skrll 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
   3227  1.1.2.5  skrll 
   3228  1.1.2.5  skrll 		SIMPLEQ_REMOVE_HEAD(&tsb->tsb_freeq, ts_q);
   3229  1.1.2.5  skrll 		SIMPLEQ_INSERT_TAIL(&tsb->tsb_dirtyq, ts, ts_q);
   3230  1.1.2.5  skrll 
   3231  1.1.2.5  skrll 		if (tsb != &sc->sc_txsoft_blk[RTW_TXPRIBCN]) {
   3232  1.1.2.5  skrll 			sc->sc_led_state.ls_event |= RTW_LED_S_TX;
   3233  1.1.2.5  skrll 			tsb->tsb_tx_timer = 5;
   3234  1.1.2.5  skrll 			ifp->if_timer = 1;
   3235  1.1.2.5  skrll 		}
   3236  1.1.2.5  skrll 
   3237  1.1.2.5  skrll 		tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
   3238  1.1.2.5  skrll 		RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL,
   3239  1.1.2.5  skrll 		    tppoll | (tsb->tsb_poll & RTW_TPPOLL_ALL));
   3240  1.1.2.5  skrll 		RTW_SYNC(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL);
   3241  1.1.2.2  skrll 	}
   3242  1.1.2.5  skrll out:
   3243  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
   3244  1.1.2.5  skrll 	return;
   3245  1.1.2.5  skrll post_load_err:
   3246  1.1.2.5  skrll 	bus_dmamap_unload(sc->sc_dmat, dmamap);
   3247  1.1.2.5  skrll 	m_freem(m0);
   3248  1.1.2.5  skrll post_dequeue_err:
   3249  1.1.2.5  skrll 	ieee80211_release_node(&sc->sc_ic, ni);
   3250  1.1.2.2  skrll 	return;
   3251  1.1.2.2  skrll }
   3252  1.1.2.2  skrll 
   3253  1.1.2.2  skrll static void
   3254  1.1.2.2  skrll rtw_watchdog(struct ifnet *ifp)
   3255  1.1.2.2  skrll {
   3256  1.1.2.5  skrll 	uint8_t tppoll;
   3257  1.1.2.5  skrll 	int pri;
   3258  1.1.2.5  skrll 	struct rtw_softc *sc;
   3259  1.1.2.5  skrll 	struct rtw_txsoft_blk *tsb;
   3260  1.1.2.5  skrll 
   3261  1.1.2.5  skrll 	sc = ifp->if_softc;
   3262  1.1.2.5  skrll 
   3263  1.1.2.5  skrll 	ifp->if_timer = 0;
   3264  1.1.2.5  skrll 
   3265  1.1.2.5  skrll 	if ((sc->sc_flags & RTW_F_ENABLED) == 0)
   3266  1.1.2.5  skrll 		return;
   3267  1.1.2.5  skrll 
   3268  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   3269  1.1.2.5  skrll 		tsb = &sc->sc_txsoft_blk[pri];
   3270  1.1.2.5  skrll 
   3271  1.1.2.5  skrll 		if (tsb->tsb_tx_timer == 0)
   3272  1.1.2.5  skrll 			continue;
   3273  1.1.2.5  skrll 
   3274  1.1.2.5  skrll 		if (--tsb->tsb_tx_timer == 0) {
   3275  1.1.2.5  skrll 			if (SIMPLEQ_EMPTY(&tsb->tsb_dirtyq))
   3276  1.1.2.5  skrll 				continue;
   3277  1.1.2.5  skrll 			printf("%s: transmit timeout, priority %d\n",
   3278  1.1.2.5  skrll 			    ifp->if_xname, pri);
   3279  1.1.2.5  skrll 			ifp->if_oerrors++;
   3280  1.1.2.5  skrll 			/* Stop Tx DMA, disable transmitter, clear
   3281  1.1.2.5  skrll 			 * Tx rings, and restart.
   3282  1.1.2.5  skrll 			 *
   3283  1.1.2.5  skrll 			 * TBD Stop/restart just the broken ring?
   3284  1.1.2.5  skrll 			 */
   3285  1.1.2.5  skrll 			tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
   3286  1.1.2.5  skrll 			RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL,
   3287  1.1.2.5  skrll 			    tppoll | RTW_TPPOLL_SALL);
   3288  1.1.2.5  skrll 			RTW_SYNC(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL);
   3289  1.1.2.5  skrll 			rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 0);
   3290  1.1.2.5  skrll 			rtw_txdescs_reset(sc);
   3291  1.1.2.5  skrll 			rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 1);
   3292  1.1.2.5  skrll 			rtw_start(ifp);
   3293  1.1.2.5  skrll 		} else
   3294  1.1.2.5  skrll 			ifp->if_timer = 1;
   3295  1.1.2.5  skrll 	}
   3296  1.1.2.5  skrll 	ieee80211_watchdog(ifp);
   3297  1.1.2.2  skrll 	return;
   3298  1.1.2.2  skrll }
   3299  1.1.2.2  skrll 
   3300  1.1.2.2  skrll static void
   3301  1.1.2.2  skrll rtw_start_beacon(struct rtw_softc *sc, int enable)
   3302  1.1.2.2  skrll {
   3303  1.1.2.2  skrll 	/* TBD */
   3304  1.1.2.2  skrll 	return;
   3305  1.1.2.2  skrll }
   3306  1.1.2.2  skrll 
   3307  1.1.2.2  skrll static void
   3308  1.1.2.2  skrll rtw_next_scan(void *arg)
   3309  1.1.2.2  skrll {
   3310  1.1.2.2  skrll 	struct ieee80211com *ic = arg;
   3311  1.1.2.2  skrll 	int s;
   3312  1.1.2.2  skrll 
   3313  1.1.2.2  skrll 	/* don't call rtw_start w/o network interrupts blocked */
   3314  1.1.2.2  skrll 	s = splnet();
   3315  1.1.2.2  skrll 	if (ic->ic_state == IEEE80211_S_SCAN)
   3316  1.1.2.2  skrll 		ieee80211_next_scan(ic);
   3317  1.1.2.2  skrll 	splx(s);
   3318  1.1.2.2  skrll }
   3319  1.1.2.2  skrll 
   3320  1.1.2.5  skrll static void
   3321  1.1.2.5  skrll rtw_join_bss(struct rtw_softc *sc, uint8_t *bssid, enum ieee80211_opmode opmode,
   3322  1.1.2.5  skrll     uint16_t intval0)
   3323  1.1.2.5  skrll {
   3324  1.1.2.5  skrll 	uint16_t bcnitv, intval;
   3325  1.1.2.5  skrll 	int i;
   3326  1.1.2.5  skrll 	struct rtw_regs *regs = &sc->sc_regs;
   3327  1.1.2.5  skrll 
   3328  1.1.2.5  skrll 	for (i = 0; i < IEEE80211_ADDR_LEN; i++)
   3329  1.1.2.5  skrll 		RTW_WRITE8(regs, RTW_BSSID + i, bssid[i]);
   3330  1.1.2.5  skrll 
   3331  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_BSSID16, RTW_BSSID32);
   3332  1.1.2.5  skrll 
   3333  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_CONFIG);
   3334  1.1.2.5  skrll 
   3335  1.1.2.5  skrll 	intval = MIN(intval0, PRESHIFT(RTW_BCNITV_BCNITV_MASK));
   3336  1.1.2.5  skrll 
   3337  1.1.2.5  skrll 	bcnitv = RTW_READ16(regs, RTW_BCNITV) & ~RTW_BCNITV_BCNITV_MASK;
   3338  1.1.2.5  skrll 	bcnitv |= LSHIFT(intval, RTW_BCNITV_BCNITV_MASK);
   3339  1.1.2.5  skrll 	RTW_WRITE16(regs, RTW_BCNITV, bcnitv);
   3340  1.1.2.5  skrll 	/* magic from Linux */
   3341  1.1.2.5  skrll 	RTW_WRITE16(regs, RTW_ATIMWND, LSHIFT(1, RTW_ATIMWND_ATIMWND));
   3342  1.1.2.5  skrll 	RTW_WRITE16(regs, RTW_ATIMTRITV, LSHIFT(2, RTW_ATIMTRITV_ATIMTRITV));
   3343  1.1.2.5  skrll 
   3344  1.1.2.5  skrll 	rtw_set_nettype(sc, opmode);
   3345  1.1.2.5  skrll 
   3346  1.1.2.5  skrll 	rtw_set_access(regs, RTW_ACCESS_NONE);
   3347  1.1.2.5  skrll 
   3348  1.1.2.5  skrll 	/* TBD WEP */
   3349  1.1.2.5  skrll 	RTW_WRITE8(regs, RTW_SCR, 0);
   3350  1.1.2.5  skrll 
   3351  1.1.2.5  skrll 	rtw_io_enable(regs, RTW_CR_RE | RTW_CR_TE, 1);
   3352  1.1.2.5  skrll }
   3353  1.1.2.5  skrll 
   3354  1.1.2.2  skrll /* Synchronize the hardware state with the software state. */
   3355  1.1.2.2  skrll static int
   3356  1.1.2.2  skrll rtw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
   3357  1.1.2.2  skrll {
   3358  1.1.2.2  skrll 	struct ifnet *ifp = &ic->ic_if;
   3359  1.1.2.2  skrll 	struct rtw_softc *sc = ifp->if_softc;
   3360  1.1.2.5  skrll 	struct mbuf *m;
   3361  1.1.2.2  skrll 	enum ieee80211_state ostate;
   3362  1.1.2.2  skrll 	int error;
   3363  1.1.2.2  skrll 
   3364  1.1.2.2  skrll 	ostate = ic->ic_state;
   3365  1.1.2.2  skrll 
   3366  1.1.2.5  skrll 	rtw_led_newstate(sc, nstate);
   3367  1.1.2.5  skrll 
   3368  1.1.2.2  skrll 	if (nstate == IEEE80211_S_INIT) {
   3369  1.1.2.2  skrll 		callout_stop(&sc->sc_scan_ch);
   3370  1.1.2.2  skrll 		sc->sc_cur_chan = IEEE80211_CHAN_ANY;
   3371  1.1.2.2  skrll 		rtw_start_beacon(sc, 0);
   3372  1.1.2.2  skrll 		return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
   3373  1.1.2.2  skrll 	}
   3374  1.1.2.2  skrll 
   3375  1.1.2.2  skrll 	if (ostate == IEEE80211_S_INIT && nstate != IEEE80211_S_INIT)
   3376  1.1.2.2  skrll 		rtw_pwrstate(sc, RTW_ON);
   3377  1.1.2.2  skrll 
   3378  1.1.2.2  skrll 	if ((error = rtw_tune(sc)) != 0)
   3379  1.1.2.2  skrll 		return error;
   3380  1.1.2.2  skrll 
   3381  1.1.2.2  skrll 	switch (nstate) {
   3382  1.1.2.2  skrll 	case IEEE80211_S_ASSOC:
   3383  1.1.2.5  skrll 		rtw_join_bss(sc, ic->ic_bss->ni_bssid, ic->ic_opmode,
   3384  1.1.2.5  skrll 		    ic->ic_bss->ni_intval);
   3385  1.1.2.2  skrll 		break;
   3386  1.1.2.2  skrll 	case IEEE80211_S_INIT:
   3387  1.1.2.2  skrll 		panic("%s: unexpected state IEEE80211_S_INIT\n", __func__);
   3388  1.1.2.2  skrll 		break;
   3389  1.1.2.2  skrll 	case IEEE80211_S_SCAN:
   3390  1.1.2.5  skrll 		if (ostate != IEEE80211_S_SCAN) {
   3391  1.1.2.5  skrll 			(void)memset(ic->ic_bss->ni_bssid, 0,
   3392  1.1.2.5  skrll 			    IEEE80211_ADDR_LEN);
   3393  1.1.2.5  skrll 			rtw_join_bss(sc, ic->ic_bss->ni_bssid, ic->ic_opmode,
   3394  1.1.2.5  skrll 			    ic->ic_bss->ni_intval);
   3395  1.1.2.5  skrll 		}
   3396  1.1.2.2  skrll 
   3397  1.1.2.2  skrll 		callout_reset(&sc->sc_scan_ch, rtw_dwelltime * hz / 1000,
   3398  1.1.2.2  skrll 		    rtw_next_scan, ic);
   3399  1.1.2.2  skrll 
   3400  1.1.2.2  skrll 		break;
   3401  1.1.2.2  skrll 	case IEEE80211_S_RUN:
   3402  1.1.2.5  skrll 		switch (ic->ic_opmode) {
   3403  1.1.2.5  skrll 		case IEEE80211_M_HOSTAP:
   3404  1.1.2.5  skrll 		case IEEE80211_M_IBSS:
   3405  1.1.2.5  skrll 			m = rtw_beacon_alloc(sc, ic->ic_bss);
   3406  1.1.2.5  skrll 			if (m == NULL) {
   3407  1.1.2.5  skrll 				printf("%s: could not allocate beacon\n",
   3408  1.1.2.5  skrll 				    sc->sc_dev.dv_xname);
   3409  1.1.2.5  skrll 			} else
   3410  1.1.2.5  skrll 				IF_ENQUEUE(&sc->sc_beaconq, m);
   3411  1.1.2.5  skrll 			/*FALLTHROUGH*/
   3412  1.1.2.5  skrll 		case IEEE80211_M_AHDEMO:
   3413  1.1.2.5  skrll 			rtw_join_bss(sc, ic->ic_bss->ni_bssid, ic->ic_opmode,
   3414  1.1.2.5  skrll 			    ic->ic_bss->ni_intval);
   3415  1.1.2.2  skrll 			break;
   3416  1.1.2.5  skrll 		case IEEE80211_M_MONITOR:
   3417  1.1.2.5  skrll 		case IEEE80211_M_STA:
   3418  1.1.2.2  skrll 			break;
   3419  1.1.2.5  skrll 		}
   3420  1.1.2.5  skrll 		break;
   3421  1.1.2.5  skrll 	case IEEE80211_S_AUTH:
   3422  1.1.2.2  skrll 		break;
   3423  1.1.2.2  skrll 	}
   3424  1.1.2.2  skrll 
   3425  1.1.2.2  skrll 	if (nstate != IEEE80211_S_SCAN)
   3426  1.1.2.2  skrll 		callout_stop(&sc->sc_scan_ch);
   3427  1.1.2.2  skrll 
   3428  1.1.2.2  skrll 	if (nstate == IEEE80211_S_RUN &&
   3429  1.1.2.2  skrll 	    (ic->ic_opmode == IEEE80211_M_HOSTAP ||
   3430  1.1.2.2  skrll 	     ic->ic_opmode == IEEE80211_M_IBSS))
   3431  1.1.2.2  skrll 		rtw_start_beacon(sc, 1);
   3432  1.1.2.2  skrll 	else
   3433  1.1.2.2  skrll 		rtw_start_beacon(sc, 0);
   3434  1.1.2.2  skrll 
   3435  1.1.2.2  skrll 	return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
   3436  1.1.2.2  skrll }
   3437  1.1.2.2  skrll 
   3438  1.1.2.5  skrll /* Extend a 32-bit TSF timestamp to a 64-bit timestamp. */
   3439  1.1.2.5  skrll static uint64_t
   3440  1.1.2.5  skrll rtw_tsf_extend(struct rtw_regs *regs, uint32_t rstamp)
   3441  1.1.2.5  skrll {
   3442  1.1.2.5  skrll 	uint32_t tsftl, tsfth;
   3443  1.1.2.5  skrll 
   3444  1.1.2.5  skrll 	tsfth = RTW_READ(regs, RTW_TSFTRH);
   3445  1.1.2.5  skrll 	tsftl = RTW_READ(regs, RTW_TSFTRL);
   3446  1.1.2.5  skrll 	if (tsftl < rstamp)	/* Compensate for rollover. */
   3447  1.1.2.5  skrll 		tsfth--;
   3448  1.1.2.5  skrll 	return ((uint64_t)tsfth << 32) | rstamp;
   3449  1.1.2.5  skrll }
   3450  1.1.2.5  skrll 
   3451  1.1.2.2  skrll static void
   3452  1.1.2.5  skrll rtw_ibss_merge(struct rtw_softc *sc, struct ieee80211_node *ni, uint32_t rstamp)
   3453  1.1.2.2  skrll {
   3454  1.1.2.5  skrll 	struct ieee80211com *ic = &sc->sc_ic;
   3455  1.1.2.5  skrll 
   3456  1.1.2.5  skrll 	if (le64toh(ni->ni_tsf) >= rtw_tsf_extend(&sc->sc_regs, rstamp) &&
   3457  1.1.2.5  skrll 	    ieee80211_ibss_merge(ic, ni) == ENETRESET) {
   3458  1.1.2.5  skrll 		rtw_join_bss(sc, ic->ic_bss->ni_bssid, ic->ic_opmode,
   3459  1.1.2.5  skrll 		    ic->ic_bss->ni_intval);
   3460  1.1.2.5  skrll 	}
   3461  1.1.2.2  skrll 	return;
   3462  1.1.2.2  skrll }
   3463  1.1.2.2  skrll 
   3464  1.1.2.2  skrll static void
   3465  1.1.2.2  skrll rtw_recv_mgmt(struct ieee80211com *ic, struct mbuf *m,
   3466  1.1.2.5  skrll     struct ieee80211_node *ni, int subtype, int rssi, uint32_t rstamp)
   3467  1.1.2.2  skrll {
   3468  1.1.2.2  skrll 	struct rtw_softc *sc = (struct rtw_softc*)ic->ic_softc;
   3469  1.1.2.2  skrll 
   3470  1.1.2.5  skrll 	(*sc->sc_mtbl.mt_recv_mgmt)(ic, m, ni, subtype, rssi, rstamp);
   3471  1.1.2.5  skrll 
   3472  1.1.2.2  skrll 	switch (subtype) {
   3473  1.1.2.2  skrll 	case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
   3474  1.1.2.2  skrll 	case IEEE80211_FC0_SUBTYPE_BEACON:
   3475  1.1.2.5  skrll 		if (ic->ic_opmode != IEEE80211_M_IBSS ||
   3476  1.1.2.5  skrll 		    ic->ic_state != IEEE80211_S_RUN)
   3477  1.1.2.5  skrll 			return;
   3478  1.1.2.5  skrll 		rtw_ibss_merge(sc, ni, rstamp);
   3479  1.1.2.2  skrll 		break;
   3480  1.1.2.2  skrll 	default:
   3481  1.1.2.2  skrll 		break;
   3482  1.1.2.2  skrll 	}
   3483  1.1.2.2  skrll 	return;
   3484  1.1.2.2  skrll }
   3485  1.1.2.2  skrll 
   3486  1.1.2.2  skrll static struct ieee80211_node *
   3487  1.1.2.2  skrll rtw_node_alloc(struct ieee80211com *ic)
   3488  1.1.2.2  skrll {
   3489  1.1.2.2  skrll 	struct rtw_softc *sc = (struct rtw_softc *)ic->ic_if.if_softc;
   3490  1.1.2.2  skrll 	struct ieee80211_node *ni = (*sc->sc_mtbl.mt_node_alloc)(ic);
   3491  1.1.2.2  skrll 
   3492  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_NODE,
   3493  1.1.2.5  skrll 	    ("%s: alloc node %p\n", sc->sc_dev.dv_xname, ni));
   3494  1.1.2.2  skrll 	return ni;
   3495  1.1.2.2  skrll }
   3496  1.1.2.2  skrll 
   3497  1.1.2.2  skrll static void
   3498  1.1.2.2  skrll rtw_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
   3499  1.1.2.2  skrll {
   3500  1.1.2.2  skrll 	struct rtw_softc *sc = (struct rtw_softc *)ic->ic_if.if_softc;
   3501  1.1.2.2  skrll 
   3502  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_NODE,
   3503  1.1.2.5  skrll 	    ("%s: freeing node %p %s\n", sc->sc_dev.dv_xname, ni,
   3504  1.1.2.2  skrll 	    ether_sprintf(ni->ni_bssid)));
   3505  1.1.2.2  skrll 	(*sc->sc_mtbl.mt_node_free)(ic, ni);
   3506  1.1.2.2  skrll }
   3507  1.1.2.2  skrll 
   3508  1.1.2.2  skrll static int
   3509  1.1.2.2  skrll rtw_media_change(struct ifnet *ifp)
   3510  1.1.2.2  skrll {
   3511  1.1.2.2  skrll 	int error;
   3512  1.1.2.2  skrll 
   3513  1.1.2.2  skrll 	error = ieee80211_media_change(ifp);
   3514  1.1.2.2  skrll 	if (error == ENETRESET) {
   3515  1.1.2.2  skrll 		if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
   3516  1.1.2.2  skrll 		    (IFF_RUNNING|IFF_UP))
   3517  1.1.2.2  skrll 			rtw_init(ifp);		/* XXX lose error */
   3518  1.1.2.2  skrll 		error = 0;
   3519  1.1.2.2  skrll 	}
   3520  1.1.2.2  skrll 	return error;
   3521  1.1.2.2  skrll }
   3522  1.1.2.2  skrll 
   3523  1.1.2.2  skrll static void
   3524  1.1.2.2  skrll rtw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
   3525  1.1.2.2  skrll {
   3526  1.1.2.2  skrll 	struct rtw_softc *sc = ifp->if_softc;
   3527  1.1.2.2  skrll 
   3528  1.1.2.2  skrll 	if ((sc->sc_flags & RTW_F_ENABLED) == 0) {
   3529  1.1.2.2  skrll 		imr->ifm_active = IFM_IEEE80211 | IFM_NONE;
   3530  1.1.2.2  skrll 		imr->ifm_status = 0;
   3531  1.1.2.2  skrll 		return;
   3532  1.1.2.2  skrll 	}
   3533  1.1.2.2  skrll 	ieee80211_media_status(ifp, imr);
   3534  1.1.2.2  skrll }
   3535  1.1.2.2  skrll 
   3536  1.1.2.2  skrll void
   3537  1.1.2.2  skrll rtw_power(int why, void *arg)
   3538  1.1.2.2  skrll {
   3539  1.1.2.2  skrll 	struct rtw_softc *sc = arg;
   3540  1.1.2.2  skrll 	struct ifnet *ifp = &sc->sc_ic.ic_if;
   3541  1.1.2.2  skrll 	int s;
   3542  1.1.2.2  skrll 
   3543  1.1.2.5  skrll 	DPRINTF(sc, RTW_DEBUG_PWR,
   3544  1.1.2.5  skrll 	    ("%s: rtw_power(%d,)\n", sc->sc_dev.dv_xname, why));
   3545  1.1.2.2  skrll 
   3546  1.1.2.2  skrll 	s = splnet();
   3547  1.1.2.2  skrll 	switch (why) {
   3548  1.1.2.2  skrll 	case PWR_STANDBY:
   3549  1.1.2.2  skrll 		/* XXX do nothing. */
   3550  1.1.2.2  skrll 		break;
   3551  1.1.2.2  skrll 	case PWR_SUSPEND:
   3552  1.1.2.2  skrll 		rtw_stop(ifp, 0);
   3553  1.1.2.2  skrll 		if (sc->sc_power != NULL)
   3554  1.1.2.2  skrll 			(*sc->sc_power)(sc, why);
   3555  1.1.2.2  skrll 		break;
   3556  1.1.2.2  skrll 	case PWR_RESUME:
   3557  1.1.2.2  skrll 		if (ifp->if_flags & IFF_UP) {
   3558  1.1.2.2  skrll 			if (sc->sc_power != NULL)
   3559  1.1.2.2  skrll 				(*sc->sc_power)(sc, why);
   3560  1.1.2.2  skrll 			rtw_init(ifp);
   3561  1.1.2.2  skrll 		}
   3562  1.1.2.2  skrll 		break;
   3563  1.1.2.2  skrll 	case PWR_SOFTSUSPEND:
   3564  1.1.2.2  skrll 	case PWR_SOFTSTANDBY:
   3565  1.1.2.2  skrll 	case PWR_SOFTRESUME:
   3566  1.1.2.2  skrll 		break;
   3567  1.1.2.2  skrll 	}
   3568  1.1.2.2  skrll 	splx(s);
   3569  1.1.2.2  skrll }
   3570  1.1.2.2  skrll 
   3571  1.1.2.2  skrll /* rtw_shutdown: make sure the interface is stopped at reboot time. */
   3572  1.1.2.2  skrll void
   3573  1.1.2.2  skrll rtw_shutdown(void *arg)
   3574  1.1.2.2  skrll {
   3575  1.1.2.2  skrll 	struct rtw_softc *sc = arg;
   3576  1.1.2.2  skrll 
   3577  1.1.2.2  skrll 	rtw_stop(&sc->sc_ic.ic_if, 1);
   3578  1.1.2.2  skrll }
   3579  1.1.2.2  skrll 
   3580  1.1.2.2  skrll static __inline void
   3581  1.1.2.5  skrll rtw_setifprops(struct ifnet *ifp, const char *dvname, void *softc)
   3582  1.1.2.2  skrll {
   3583  1.1.2.5  skrll 	(void)memcpy(ifp->if_xname, dvname, IFNAMSIZ);
   3584  1.1.2.2  skrll 	ifp->if_softc = softc;
   3585  1.1.2.2  skrll 	ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST |
   3586  1.1.2.2  skrll 	    IFF_NOTRAILERS;
   3587  1.1.2.2  skrll 	ifp->if_ioctl = rtw_ioctl;
   3588  1.1.2.2  skrll 	ifp->if_start = rtw_start;
   3589  1.1.2.2  skrll 	ifp->if_watchdog = rtw_watchdog;
   3590  1.1.2.2  skrll 	ifp->if_init = rtw_init;
   3591  1.1.2.2  skrll 	ifp->if_stop = rtw_stop;
   3592  1.1.2.2  skrll }
   3593  1.1.2.2  skrll 
   3594  1.1.2.2  skrll static __inline void
   3595  1.1.2.2  skrll rtw_set80211props(struct ieee80211com *ic)
   3596  1.1.2.2  skrll {
   3597  1.1.2.2  skrll 	int nrate;
   3598  1.1.2.2  skrll 	ic->ic_phytype = IEEE80211_T_DS;
   3599  1.1.2.2  skrll 	ic->ic_opmode = IEEE80211_M_STA;
   3600  1.1.2.2  skrll 	ic->ic_caps = IEEE80211_C_PMGT | IEEE80211_C_IBSS |
   3601  1.1.2.2  skrll 	    IEEE80211_C_HOSTAP | IEEE80211_C_MONITOR | IEEE80211_C_WEP;
   3602  1.1.2.2  skrll 
   3603  1.1.2.2  skrll 	nrate = 0;
   3604  1.1.2.5  skrll 	ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] =
   3605  1.1.2.5  skrll 	    IEEE80211_RATE_BASIC | 2;
   3606  1.1.2.5  skrll 	ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] =
   3607  1.1.2.5  skrll 	    IEEE80211_RATE_BASIC | 4;
   3608  1.1.2.2  skrll 	ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] = 11;
   3609  1.1.2.2  skrll 	ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] = 22;
   3610  1.1.2.2  skrll 	ic->ic_sup_rates[IEEE80211_MODE_11B].rs_nrates = nrate;
   3611  1.1.2.2  skrll }
   3612  1.1.2.2  skrll 
   3613  1.1.2.2  skrll static __inline void
   3614  1.1.2.2  skrll rtw_set80211methods(struct rtw_mtbl *mtbl, struct ieee80211com *ic)
   3615  1.1.2.2  skrll {
   3616  1.1.2.2  skrll 	mtbl->mt_newstate = ic->ic_newstate;
   3617  1.1.2.2  skrll 	ic->ic_newstate = rtw_newstate;
   3618  1.1.2.2  skrll 
   3619  1.1.2.2  skrll 	mtbl->mt_recv_mgmt = ic->ic_recv_mgmt;
   3620  1.1.2.2  skrll 	ic->ic_recv_mgmt = rtw_recv_mgmt;
   3621  1.1.2.2  skrll 
   3622  1.1.2.2  skrll 	mtbl->mt_node_free = ic->ic_node_free;
   3623  1.1.2.2  skrll 	ic->ic_node_free = rtw_node_free;
   3624  1.1.2.2  skrll 
   3625  1.1.2.2  skrll 	mtbl->mt_node_alloc = ic->ic_node_alloc;
   3626  1.1.2.2  skrll 	ic->ic_node_alloc = rtw_node_alloc;
   3627  1.1.2.2  skrll }
   3628  1.1.2.2  skrll 
   3629  1.1.2.2  skrll static __inline void
   3630  1.1.2.5  skrll rtw_establish_hooks(struct rtw_hooks *hooks, const char *dvname,
   3631  1.1.2.2  skrll     void *arg)
   3632  1.1.2.2  skrll {
   3633  1.1.2.2  skrll 	/*
   3634  1.1.2.2  skrll 	 * Make sure the interface is shutdown during reboot.
   3635  1.1.2.2  skrll 	 */
   3636  1.1.2.2  skrll 	hooks->rh_shutdown = shutdownhook_establish(rtw_shutdown, arg);
   3637  1.1.2.2  skrll 	if (hooks->rh_shutdown == NULL)
   3638  1.1.2.2  skrll 		printf("%s: WARNING: unable to establish shutdown hook\n",
   3639  1.1.2.5  skrll 		    dvname);
   3640  1.1.2.2  skrll 
   3641  1.1.2.2  skrll 	/*
   3642  1.1.2.2  skrll 	 * Add a suspend hook to make sure we come back up after a
   3643  1.1.2.2  skrll 	 * resume.
   3644  1.1.2.2  skrll 	 */
   3645  1.1.2.2  skrll 	hooks->rh_power = powerhook_establish(rtw_power, arg);
   3646  1.1.2.2  skrll 	if (hooks->rh_power == NULL)
   3647  1.1.2.2  skrll 		printf("%s: WARNING: unable to establish power hook\n",
   3648  1.1.2.5  skrll 		    dvname);
   3649  1.1.2.2  skrll }
   3650  1.1.2.2  skrll 
   3651  1.1.2.2  skrll static __inline void
   3652  1.1.2.5  skrll rtw_disestablish_hooks(struct rtw_hooks *hooks, const char *dvname,
   3653  1.1.2.2  skrll     void *arg)
   3654  1.1.2.2  skrll {
   3655  1.1.2.2  skrll 	if (hooks->rh_shutdown != NULL)
   3656  1.1.2.2  skrll 		shutdownhook_disestablish(hooks->rh_shutdown);
   3657  1.1.2.2  skrll 
   3658  1.1.2.2  skrll 	if (hooks->rh_power != NULL)
   3659  1.1.2.2  skrll 		powerhook_disestablish(hooks->rh_power);
   3660  1.1.2.2  skrll }
   3661  1.1.2.2  skrll 
   3662  1.1.2.2  skrll static __inline void
   3663  1.1.2.2  skrll rtw_init_radiotap(struct rtw_softc *sc)
   3664  1.1.2.2  skrll {
   3665  1.1.2.2  skrll 	memset(&sc->sc_rxtapu, 0, sizeof(sc->sc_rxtapu));
   3666  1.1.2.5  skrll 	sc->sc_rxtap.rr_ihdr.it_len = htole16(sizeof(sc->sc_rxtapu));
   3667  1.1.2.5  skrll 	sc->sc_rxtap.rr_ihdr.it_present = htole32(RTW_RX_RADIOTAP_PRESENT);
   3668  1.1.2.2  skrll 
   3669  1.1.2.2  skrll 	memset(&sc->sc_txtapu, 0, sizeof(sc->sc_txtapu));
   3670  1.1.2.5  skrll 	sc->sc_txtap.rt_ihdr.it_len = htole16(sizeof(sc->sc_txtapu));
   3671  1.1.2.5  skrll 	sc->sc_txtap.rt_ihdr.it_present = htole32(RTW_TX_RADIOTAP_PRESENT);
   3672  1.1.2.2  skrll }
   3673  1.1.2.2  skrll 
   3674  1.1.2.2  skrll static int
   3675  1.1.2.5  skrll rtw_txsoft_blk_setup(struct rtw_txsoft_blk *tsb, u_int qlen)
   3676  1.1.2.2  skrll {
   3677  1.1.2.5  skrll 	SIMPLEQ_INIT(&tsb->tsb_dirtyq);
   3678  1.1.2.5  skrll 	SIMPLEQ_INIT(&tsb->tsb_freeq);
   3679  1.1.2.5  skrll 	tsb->tsb_ndesc = qlen;
   3680  1.1.2.5  skrll 	tsb->tsb_desc = malloc(qlen * sizeof(*tsb->tsb_desc), M_DEVBUF,
   3681  1.1.2.2  skrll 	    M_NOWAIT);
   3682  1.1.2.5  skrll 	if (tsb->tsb_desc == NULL)
   3683  1.1.2.2  skrll 		return ENOMEM;
   3684  1.1.2.2  skrll 	return 0;
   3685  1.1.2.2  skrll }
   3686  1.1.2.2  skrll 
   3687  1.1.2.2  skrll static void
   3688  1.1.2.5  skrll rtw_txsoft_blk_cleanup_all(struct rtw_softc *sc)
   3689  1.1.2.2  skrll {
   3690  1.1.2.2  skrll 	int pri;
   3691  1.1.2.5  skrll 	struct rtw_txsoft_blk *tsb;
   3692  1.1.2.2  skrll 
   3693  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   3694  1.1.2.5  skrll 		tsb = &sc->sc_txsoft_blk[pri];
   3695  1.1.2.5  skrll 		free(tsb->tsb_desc, M_DEVBUF);
   3696  1.1.2.5  skrll 		tsb->tsb_desc = NULL;
   3697  1.1.2.2  skrll 	}
   3698  1.1.2.2  skrll }
   3699  1.1.2.2  skrll 
   3700  1.1.2.2  skrll static int
   3701  1.1.2.5  skrll rtw_txsoft_blk_setup_all(struct rtw_softc *sc)
   3702  1.1.2.2  skrll {
   3703  1.1.2.2  skrll 	int pri, rc = 0;
   3704  1.1.2.2  skrll 	int qlen[RTW_NTXPRI] =
   3705  1.1.2.2  skrll 	     {RTW_TXQLENLO, RTW_TXQLENMD, RTW_TXQLENHI, RTW_TXQLENBCN};
   3706  1.1.2.5  skrll 	struct rtw_txsoft_blk *tsbs;
   3707  1.1.2.2  skrll 
   3708  1.1.2.5  skrll 	tsbs = sc->sc_txsoft_blk;
   3709  1.1.2.5  skrll 
   3710  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   3711  1.1.2.5  skrll 		rc = rtw_txsoft_blk_setup(&tsbs[pri], qlen[pri]);
   3712  1.1.2.2  skrll 		if (rc != 0)
   3713  1.1.2.2  skrll 			break;
   3714  1.1.2.2  skrll 	}
   3715  1.1.2.5  skrll 	tsbs[RTW_TXPRILO].tsb_poll = RTW_TPPOLL_LPQ | RTW_TPPOLL_SLPQ;
   3716  1.1.2.5  skrll 	tsbs[RTW_TXPRIMD].tsb_poll = RTW_TPPOLL_NPQ | RTW_TPPOLL_SNPQ;
   3717  1.1.2.5  skrll 	tsbs[RTW_TXPRIHI].tsb_poll = RTW_TPPOLL_HPQ | RTW_TPPOLL_SHPQ;
   3718  1.1.2.5  skrll 	tsbs[RTW_TXPRIBCN].tsb_poll = RTW_TPPOLL_BQ | RTW_TPPOLL_SBQ;
   3719  1.1.2.2  skrll 	return rc;
   3720  1.1.2.2  skrll }
   3721  1.1.2.2  skrll 
   3722  1.1.2.2  skrll static void
   3723  1.1.2.5  skrll rtw_txdesc_blk_setup(struct rtw_txdesc_blk *tdb, struct rtw_txdesc *desc,
   3724  1.1.2.2  skrll     u_int ndesc, bus_addr_t ofs, bus_addr_t physbase)
   3725  1.1.2.2  skrll {
   3726  1.1.2.5  skrll 	tdb->tdb_ndesc = ndesc;
   3727  1.1.2.5  skrll 	tdb->tdb_desc = desc;
   3728  1.1.2.5  skrll 	tdb->tdb_physbase = physbase;
   3729  1.1.2.5  skrll 	tdb->tdb_ofs = ofs;
   3730  1.1.2.2  skrll 
   3731  1.1.2.5  skrll 	(void)memset(tdb->tdb_desc, 0,
   3732  1.1.2.5  skrll 	    sizeof(tdb->tdb_desc[0]) * tdb->tdb_ndesc);
   3733  1.1.2.2  skrll 
   3734  1.1.2.5  skrll 	rtw_txdesc_blk_reset(tdb);
   3735  1.1.2.2  skrll }
   3736  1.1.2.2  skrll 
   3737  1.1.2.2  skrll static void
   3738  1.1.2.2  skrll rtw_txdesc_blk_setup_all(struct rtw_softc *sc)
   3739  1.1.2.2  skrll {
   3740  1.1.2.2  skrll 	rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRILO],
   3741  1.1.2.2  skrll 	    &sc->sc_descs->hd_txlo[0], RTW_NTXDESCLO,
   3742  1.1.2.2  skrll 	    RTW_RING_OFFSET(hd_txlo), RTW_RING_BASE(sc, hd_txlo));
   3743  1.1.2.2  skrll 
   3744  1.1.2.2  skrll 	rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIMD],
   3745  1.1.2.2  skrll 	    &sc->sc_descs->hd_txmd[0], RTW_NTXDESCMD,
   3746  1.1.2.2  skrll 	    RTW_RING_OFFSET(hd_txmd), RTW_RING_BASE(sc, hd_txmd));
   3747  1.1.2.2  skrll 
   3748  1.1.2.2  skrll 	rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIHI],
   3749  1.1.2.2  skrll 	    &sc->sc_descs->hd_txhi[0], RTW_NTXDESCHI,
   3750  1.1.2.2  skrll 	    RTW_RING_OFFSET(hd_txhi), RTW_RING_BASE(sc, hd_txhi));
   3751  1.1.2.2  skrll 
   3752  1.1.2.2  skrll 	rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIBCN],
   3753  1.1.2.2  skrll 	    &sc->sc_descs->hd_bcn[0], RTW_NTXDESCBCN,
   3754  1.1.2.2  skrll 	    RTW_RING_OFFSET(hd_bcn), RTW_RING_BASE(sc, hd_bcn));
   3755  1.1.2.2  skrll }
   3756  1.1.2.2  skrll 
   3757  1.1.2.2  skrll static struct rtw_rf *
   3758  1.1.2.5  skrll rtw_rf_attach(struct rtw_softc *sc, enum rtw_rfchipid rfchipid, int digphy)
   3759  1.1.2.2  skrll {
   3760  1.1.2.5  skrll 	rtw_rf_write_t rf_write;
   3761  1.1.2.2  skrll 	struct rtw_rf *rf;
   3762  1.1.2.2  skrll 
   3763  1.1.2.2  skrll 	switch (rfchipid) {
   3764  1.1.2.5  skrll 	default:
   3765  1.1.2.5  skrll 		rf_write = rtw_rf_hostwrite;
   3766  1.1.2.5  skrll 		break;
   3767  1.1.2.5  skrll 	case RTW_RFCHIPID_INTERSIL:
   3768  1.1.2.5  skrll 	case RTW_RFCHIPID_PHILIPS:
   3769  1.1.2.5  skrll 	case RTW_RFCHIPID_GCT:	/* XXX a guess */
   3770  1.1.2.5  skrll 	case RTW_RFCHIPID_RFMD:
   3771  1.1.2.5  skrll 		rf_write = (rtw_host_rfio) ? rtw_rf_hostwrite : rtw_rf_macwrite;
   3772  1.1.2.5  skrll 		break;
   3773  1.1.2.5  skrll 	}
   3774  1.1.2.5  skrll 
   3775  1.1.2.5  skrll 	switch (rfchipid) {
   3776  1.1.2.2  skrll 	case RTW_RFCHIPID_MAXIM:
   3777  1.1.2.2  skrll 		rf = rtw_max2820_create(&sc->sc_regs, rf_write, 0);
   3778  1.1.2.2  skrll 		sc->sc_pwrstate_cb = rtw_maxim_pwrstate;
   3779  1.1.2.2  skrll 		break;
   3780  1.1.2.2  skrll 	case RTW_RFCHIPID_PHILIPS:
   3781  1.1.2.2  skrll 		rf = rtw_sa2400_create(&sc->sc_regs, rf_write, digphy);
   3782  1.1.2.2  skrll 		sc->sc_pwrstate_cb = rtw_philips_pwrstate;
   3783  1.1.2.2  skrll 		break;
   3784  1.1.2.5  skrll 	case RTW_RFCHIPID_RFMD:
   3785  1.1.2.5  skrll 		/* XXX RFMD has no RF constructor */
   3786  1.1.2.5  skrll 		sc->sc_pwrstate_cb = rtw_rfmd_pwrstate;
   3787  1.1.2.5  skrll 		/*FALLTHROUGH*/
   3788  1.1.2.2  skrll 	default:
   3789  1.1.2.2  skrll 		return NULL;
   3790  1.1.2.2  skrll 	}
   3791  1.1.2.2  skrll 	rf->rf_continuous_tx_cb =
   3792  1.1.2.2  skrll 	    (rtw_continuous_tx_cb_t)rtw_continuous_tx_enable;
   3793  1.1.2.2  skrll 	rf->rf_continuous_tx_arg = (void *)sc;
   3794  1.1.2.2  skrll 	return rf;
   3795  1.1.2.2  skrll }
   3796  1.1.2.2  skrll 
   3797  1.1.2.2  skrll /* Revision C and later use a different PHY delay setting than
   3798  1.1.2.2  skrll  * revisions A and B.
   3799  1.1.2.2  skrll  */
   3800  1.1.2.5  skrll static uint8_t
   3801  1.1.2.5  skrll rtw_check_phydelay(struct rtw_regs *regs, uint32_t rcr0)
   3802  1.1.2.2  skrll {
   3803  1.1.2.2  skrll #define REVAB (RTW_RCR_MXDMA_UNLIMITED | RTW_RCR_AICV)
   3804  1.1.2.2  skrll #define REVC (REVAB | RTW_RCR_RXFTH_WHOLE)
   3805  1.1.2.2  skrll 
   3806  1.1.2.5  skrll 	uint8_t phydelay = LSHIFT(0x6, RTW_PHYDELAY_PHYDELAY);
   3807  1.1.2.2  skrll 
   3808  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_RCR, REVAB);
   3809  1.1.2.5  skrll 	RTW_WBW(regs, RTW_RCR, RTW_RCR);
   3810  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_RCR, REVC);
   3811  1.1.2.2  skrll 
   3812  1.1.2.2  skrll 	RTW_WBR(regs, RTW_RCR, RTW_RCR);
   3813  1.1.2.2  skrll 	if ((RTW_READ(regs, RTW_RCR) & REVC) == REVC)
   3814  1.1.2.2  skrll 		phydelay |= RTW_PHYDELAY_REVC_MAGIC;
   3815  1.1.2.2  skrll 
   3816  1.1.2.2  skrll 	RTW_WRITE(regs, RTW_RCR, rcr0);	/* restore RCR */
   3817  1.1.2.5  skrll 	RTW_SYNC(regs, RTW_RCR, RTW_RCR);
   3818  1.1.2.2  skrll 
   3819  1.1.2.2  skrll 	return phydelay;
   3820  1.1.2.2  skrll #undef REVC
   3821  1.1.2.2  skrll }
   3822  1.1.2.2  skrll 
   3823  1.1.2.2  skrll void
   3824  1.1.2.2  skrll rtw_attach(struct rtw_softc *sc)
   3825  1.1.2.2  skrll {
   3826  1.1.2.5  skrll 	struct rtw_txsoft_blk *tsb;
   3827  1.1.2.5  skrll 	int pri, rc;
   3828  1.1.2.2  skrll 
   3829  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, DETACHED);
   3830  1.1.2.2  skrll 
   3831  1.1.2.2  skrll 	switch (RTW_READ(&sc->sc_regs, RTW_TCR) & RTW_TCR_HWVERID_MASK) {
   3832  1.1.2.2  skrll 	case RTW_TCR_HWVERID_F:
   3833  1.1.2.5  skrll 		sc->sc_hwverid = 'F';
   3834  1.1.2.2  skrll 		break;
   3835  1.1.2.2  skrll 	case RTW_TCR_HWVERID_D:
   3836  1.1.2.5  skrll 		sc->sc_hwverid = 'D';
   3837  1.1.2.2  skrll 		break;
   3838  1.1.2.2  skrll 	default:
   3839  1.1.2.5  skrll 		sc->sc_hwverid = '?';
   3840  1.1.2.2  skrll 		break;
   3841  1.1.2.2  skrll 	}
   3842  1.1.2.5  skrll 	printf("%s: hardware version %c\n", sc->sc_dev.dv_xname,
   3843  1.1.2.5  skrll 	    sc->sc_hwverid);
   3844  1.1.2.2  skrll 
   3845  1.1.2.2  skrll 	rc = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct rtw_descs),
   3846  1.1.2.2  skrll 	    RTW_DESC_ALIGNMENT, 0, &sc->sc_desc_segs, 1, &sc->sc_desc_nsegs,
   3847  1.1.2.2  skrll 	    0);
   3848  1.1.2.2  skrll 
   3849  1.1.2.2  skrll 	if (rc != 0) {
   3850  1.1.2.2  skrll 		printf("%s: could not allocate hw descriptors, error %d\n",
   3851  1.1.2.2  skrll 		     sc->sc_dev.dv_xname, rc);
   3852  1.1.2.2  skrll 		goto err;
   3853  1.1.2.2  skrll 	}
   3854  1.1.2.2  skrll 
   3855  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_DESC_ALLOC);
   3856  1.1.2.2  skrll 
   3857  1.1.2.2  skrll 	rc = bus_dmamem_map(sc->sc_dmat, &sc->sc_desc_segs,
   3858  1.1.2.2  skrll 	    sc->sc_desc_nsegs, sizeof(struct rtw_descs),
   3859  1.1.2.2  skrll 	    (caddr_t*)&sc->sc_descs, BUS_DMA_COHERENT);
   3860  1.1.2.2  skrll 
   3861  1.1.2.2  skrll 	if (rc != 0) {
   3862  1.1.2.2  skrll 		printf("%s: could not map hw descriptors, error %d\n",
   3863  1.1.2.2  skrll 		    sc->sc_dev.dv_xname, rc);
   3864  1.1.2.2  skrll 		goto err;
   3865  1.1.2.2  skrll 	}
   3866  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_DESC_MAP);
   3867  1.1.2.2  skrll 
   3868  1.1.2.2  skrll 	rc = bus_dmamap_create(sc->sc_dmat, sizeof(struct rtw_descs), 1,
   3869  1.1.2.2  skrll 	    sizeof(struct rtw_descs), 0, 0, &sc->sc_desc_dmamap);
   3870  1.1.2.2  skrll 
   3871  1.1.2.2  skrll 	if (rc != 0) {
   3872  1.1.2.2  skrll 		printf("%s: could not create DMA map for hw descriptors, "
   3873  1.1.2.2  skrll 		    "error %d\n", sc->sc_dev.dv_xname, rc);
   3874  1.1.2.2  skrll 		goto err;
   3875  1.1.2.2  skrll 	}
   3876  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_DESCMAP_CREATE);
   3877  1.1.2.2  skrll 
   3878  1.1.2.5  skrll 	sc->sc_rxdesc_blk.rdb_dmat = sc->sc_dmat;
   3879  1.1.2.5  skrll 	sc->sc_rxdesc_blk.rdb_dmamap = sc->sc_desc_dmamap;
   3880  1.1.2.5  skrll 
   3881  1.1.2.5  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   3882  1.1.2.5  skrll 		sc->sc_txdesc_blk[pri].tdb_dmat = sc->sc_dmat;
   3883  1.1.2.5  skrll 		sc->sc_txdesc_blk[pri].tdb_dmamap = sc->sc_desc_dmamap;
   3884  1.1.2.5  skrll 	}
   3885  1.1.2.5  skrll 
   3886  1.1.2.2  skrll 	rc = bus_dmamap_load(sc->sc_dmat, sc->sc_desc_dmamap, sc->sc_descs,
   3887  1.1.2.2  skrll 	    sizeof(struct rtw_descs), NULL, 0);
   3888  1.1.2.2  skrll 
   3889  1.1.2.2  skrll 	if (rc != 0) {
   3890  1.1.2.2  skrll 		printf("%s: could not load DMA map for hw descriptors, "
   3891  1.1.2.2  skrll 		    "error %d\n", sc->sc_dev.dv_xname, rc);
   3892  1.1.2.2  skrll 		goto err;
   3893  1.1.2.2  skrll 	}
   3894  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_DESCMAP_LOAD);
   3895  1.1.2.2  skrll 
   3896  1.1.2.5  skrll 	if (rtw_txsoft_blk_setup_all(sc) != 0)
   3897  1.1.2.2  skrll 		goto err;
   3898  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_TXCTLBLK_SETUP);
   3899  1.1.2.2  skrll 
   3900  1.1.2.2  skrll 	rtw_txdesc_blk_setup_all(sc);
   3901  1.1.2.2  skrll 
   3902  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_TXDESCBLK_SETUP);
   3903  1.1.2.2  skrll 
   3904  1.1.2.5  skrll 	sc->sc_rxdesc_blk.rdb_desc = &sc->sc_descs->hd_rx[0];
   3905  1.1.2.2  skrll 
   3906  1.1.2.2  skrll 	for (pri = 0; pri < RTW_NTXPRI; pri++) {
   3907  1.1.2.5  skrll 		tsb = &sc->sc_txsoft_blk[pri];
   3908  1.1.2.2  skrll 
   3909  1.1.2.2  skrll 		if ((rc = rtw_txdesc_dmamaps_create(sc->sc_dmat,
   3910  1.1.2.5  skrll 		    &tsb->tsb_desc[0], tsb->tsb_ndesc)) != 0) {
   3911  1.1.2.2  skrll 			printf("%s: could not load DMA map for "
   3912  1.1.2.2  skrll 			    "hw tx descriptors, error %d\n",
   3913  1.1.2.2  skrll 			    sc->sc_dev.dv_xname, rc);
   3914  1.1.2.2  skrll 			goto err;
   3915  1.1.2.2  skrll 		}
   3916  1.1.2.2  skrll 	}
   3917  1.1.2.2  skrll 
   3918  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_TXMAPS_CREATE);
   3919  1.1.2.5  skrll 	if ((rc = rtw_rxdesc_dmamaps_create(sc->sc_dmat, &sc->sc_rxsoft[0],
   3920  1.1.2.2  skrll 	                                    RTW_RXQLEN)) != 0) {
   3921  1.1.2.2  skrll 		printf("%s: could not load DMA map for hw rx descriptors, "
   3922  1.1.2.2  skrll 		    "error %d\n", sc->sc_dev.dv_xname, rc);
   3923  1.1.2.2  skrll 		goto err;
   3924  1.1.2.2  skrll 	}
   3925  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_RXMAPS_CREATE);
   3926  1.1.2.2  skrll 
   3927  1.1.2.2  skrll 	/* Reset the chip to a known state. */
   3928  1.1.2.2  skrll 	if (rtw_reset(sc) != 0)
   3929  1.1.2.2  skrll 		goto err;
   3930  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_RESET);
   3931  1.1.2.2  skrll 
   3932  1.1.2.2  skrll 	sc->sc_rcr = RTW_READ(&sc->sc_regs, RTW_RCR);
   3933  1.1.2.2  skrll 
   3934  1.1.2.2  skrll 	if ((sc->sc_rcr & RTW_RCR_9356SEL) != 0)
   3935  1.1.2.2  skrll 		sc->sc_flags |= RTW_F_9356SROM;
   3936  1.1.2.2  skrll 
   3937  1.1.2.2  skrll 	if (rtw_srom_read(&sc->sc_regs, sc->sc_flags, &sc->sc_srom,
   3938  1.1.2.5  skrll 	    sc->sc_dev.dv_xname) != 0)
   3939  1.1.2.2  skrll 		goto err;
   3940  1.1.2.2  skrll 
   3941  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_READ_SROM);
   3942  1.1.2.2  skrll 
   3943  1.1.2.2  skrll 	if (rtw_srom_parse(&sc->sc_srom, &sc->sc_flags, &sc->sc_csthr,
   3944  1.1.2.2  skrll 	    &sc->sc_rfchipid, &sc->sc_rcr, &sc->sc_locale,
   3945  1.1.2.5  skrll 	    sc->sc_dev.dv_xname) != 0) {
   3946  1.1.2.2  skrll 		printf("%s: attach failed, malformed serial ROM\n",
   3947  1.1.2.2  skrll 		    sc->sc_dev.dv_xname);
   3948  1.1.2.2  skrll 		goto err;
   3949  1.1.2.2  skrll 	}
   3950  1.1.2.2  skrll 
   3951  1.1.2.5  skrll 	printf("%s: %s PHY\n", sc->sc_dev.dv_xname,
   3952  1.1.2.5  skrll 	    ((sc->sc_flags & RTW_F_DIGPHY) != 0) ? "digital" : "analog");
   3953  1.1.2.5  skrll 
   3954  1.1.2.5  skrll 	printf("%s: CS threshold %u\n", sc->sc_dev.dv_xname, sc->sc_csthr);
   3955  1.1.2.2  skrll 
   3956  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_PARSE_SROM);
   3957  1.1.2.2  skrll 
   3958  1.1.2.5  skrll 	sc->sc_rf = rtw_rf_attach(sc, sc->sc_rfchipid,
   3959  1.1.2.2  skrll 	    sc->sc_flags & RTW_F_DIGPHY);
   3960  1.1.2.2  skrll 
   3961  1.1.2.2  skrll 	if (sc->sc_rf == NULL) {
   3962  1.1.2.2  skrll 		printf("%s: attach failed, could not attach RF\n",
   3963  1.1.2.2  skrll 		    sc->sc_dev.dv_xname);
   3964  1.1.2.2  skrll 		goto err;
   3965  1.1.2.2  skrll 	}
   3966  1.1.2.2  skrll 
   3967  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_RF_ATTACH);
   3968  1.1.2.2  skrll 
   3969  1.1.2.2  skrll 	sc->sc_phydelay = rtw_check_phydelay(&sc->sc_regs, sc->sc_rcr);
   3970  1.1.2.2  skrll 
   3971  1.1.2.5  skrll 	RTW_DPRINTF(RTW_DEBUG_ATTACH,
   3972  1.1.2.5  skrll 	    ("%s: PHY delay %d\n", sc->sc_dev.dv_xname, sc->sc_phydelay));
   3973  1.1.2.2  skrll 
   3974  1.1.2.2  skrll 	if (sc->sc_locale == RTW_LOCALE_UNKNOWN)
   3975  1.1.2.2  skrll 		rtw_identify_country(&sc->sc_regs, &sc->sc_locale,
   3976  1.1.2.5  skrll 		    sc->sc_dev.dv_xname);
   3977  1.1.2.2  skrll 
   3978  1.1.2.2  skrll 	rtw_init_channels(sc->sc_locale, &sc->sc_ic.ic_channels,
   3979  1.1.2.5  skrll 	    sc->sc_dev.dv_xname);
   3980  1.1.2.2  skrll 
   3981  1.1.2.2  skrll 	if (rtw_identify_sta(&sc->sc_regs, &sc->sc_ic.ic_myaddr,
   3982  1.1.2.5  skrll 	    sc->sc_dev.dv_xname) != 0)
   3983  1.1.2.2  skrll 		goto err;
   3984  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISH_ID_STA);
   3985  1.1.2.2  skrll 
   3986  1.1.2.5  skrll 	rtw_setifprops(&sc->sc_if, sc->sc_dev.dv_xname, (void*)sc);
   3987  1.1.2.2  skrll 
   3988  1.1.2.2  skrll 	IFQ_SET_READY(&sc->sc_if.if_snd);
   3989  1.1.2.2  skrll 
   3990  1.1.2.2  skrll 	rtw_set80211props(&sc->sc_ic);
   3991  1.1.2.2  skrll 
   3992  1.1.2.5  skrll 	rtw_led_attach(sc);
   3993  1.1.2.5  skrll 
   3994  1.1.2.2  skrll 	/*
   3995  1.1.2.2  skrll 	 * Call MI attach routines.
   3996  1.1.2.2  skrll 	 */
   3997  1.1.2.2  skrll 	if_attach(&sc->sc_if);
   3998  1.1.2.2  skrll 	ieee80211_ifattach(&sc->sc_if);
   3999  1.1.2.2  skrll 
   4000  1.1.2.2  skrll 	rtw_set80211methods(&sc->sc_mtbl, &sc->sc_ic);
   4001  1.1.2.2  skrll 
   4002  1.1.2.2  skrll 	/* possibly we should fill in our own sc_send_prresp, since
   4003  1.1.2.2  skrll 	 * the RTL8180 is probably sending probe responses in ad hoc
   4004  1.1.2.2  skrll 	 * mode.
   4005  1.1.2.2  skrll 	 */
   4006  1.1.2.2  skrll 
   4007  1.1.2.2  skrll 	/* complete initialization */
   4008  1.1.2.2  skrll 	ieee80211_media_init(&sc->sc_if, rtw_media_change, rtw_media_status);
   4009  1.1.2.2  skrll 	callout_init(&sc->sc_scan_ch);
   4010  1.1.2.2  skrll 
   4011  1.1.2.5  skrll 	rtw_init_radiotap(sc);
   4012  1.1.2.5  skrll 
   4013  1.1.2.2  skrll #if NBPFILTER > 0
   4014  1.1.2.2  skrll 	bpfattach2(&sc->sc_if, DLT_IEEE802_11_RADIO,
   4015  1.1.2.2  skrll 	    sizeof(struct ieee80211_frame) + 64, &sc->sc_radiobpf);
   4016  1.1.2.2  skrll #endif
   4017  1.1.2.2  skrll 
   4018  1.1.2.5  skrll 	rtw_establish_hooks(&sc->sc_hooks, sc->sc_dev.dv_xname, (void*)sc);
   4019  1.1.2.2  skrll 
   4020  1.1.2.2  skrll 	NEXT_ATTACH_STATE(sc, FINISHED);
   4021  1.1.2.2  skrll 
   4022  1.1.2.2  skrll 	return;
   4023  1.1.2.2  skrll err:
   4024  1.1.2.2  skrll 	rtw_detach(sc);
   4025  1.1.2.2  skrll 	return;
   4026  1.1.2.2  skrll }
   4027  1.1.2.2  skrll 
   4028  1.1.2.2  skrll int
   4029  1.1.2.2  skrll rtw_detach(struct rtw_softc *sc)
   4030  1.1.2.2  skrll {
   4031  1.1.2.2  skrll 	int pri;
   4032  1.1.2.2  skrll 
   4033  1.1.2.5  skrll 	sc->sc_flags |= RTW_F_INVALID;
   4034  1.1.2.5  skrll 
   4035  1.1.2.2  skrll 	switch (sc->sc_attach_state) {
   4036  1.1.2.2  skrll 	case FINISHED:
   4037  1.1.2.4  skrll 		rtw_stop(&sc->sc_if, 1);
   4038  1.1.2.4  skrll 
   4039  1.1.2.5  skrll 		rtw_disestablish_hooks(&sc->sc_hooks, sc->sc_dev.dv_xname,
   4040  1.1.2.2  skrll 		    (void*)sc);
   4041  1.1.2.2  skrll 		callout_stop(&sc->sc_scan_ch);
   4042  1.1.2.2  skrll 		ieee80211_ifdetach(&sc->sc_if);
   4043  1.1.2.2  skrll 		if_detach(&sc->sc_if);
   4044  1.1.2.2  skrll 		break;
   4045  1.1.2.2  skrll 	case FINISH_ID_STA:
   4046  1.1.2.2  skrll 	case FINISH_RF_ATTACH:
   4047  1.1.2.2  skrll 		rtw_rf_destroy(sc->sc_rf);
   4048  1.1.2.2  skrll 		sc->sc_rf = NULL;
   4049  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4050  1.1.2.2  skrll 	case FINISH_PARSE_SROM:
   4051  1.1.2.2  skrll 	case FINISH_READ_SROM:
   4052  1.1.2.2  skrll 		rtw_srom_free(&sc->sc_srom);
   4053  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4054  1.1.2.2  skrll 	case FINISH_RESET:
   4055  1.1.2.2  skrll 	case FINISH_RXMAPS_CREATE:
   4056  1.1.2.5  skrll 		rtw_rxdesc_dmamaps_destroy(sc->sc_dmat, &sc->sc_rxsoft[0],
   4057  1.1.2.2  skrll 		    RTW_RXQLEN);
   4058  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4059  1.1.2.2  skrll 	case FINISH_TXMAPS_CREATE:
   4060  1.1.2.2  skrll 		for (pri = 0; pri < RTW_NTXPRI; pri++) {
   4061  1.1.2.2  skrll 			rtw_txdesc_dmamaps_destroy(sc->sc_dmat,
   4062  1.1.2.5  skrll 			    sc->sc_txsoft_blk[pri].tsb_desc,
   4063  1.1.2.5  skrll 			    sc->sc_txsoft_blk[pri].tsb_ndesc);
   4064  1.1.2.2  skrll 		}
   4065  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4066  1.1.2.2  skrll 	case FINISH_TXDESCBLK_SETUP:
   4067  1.1.2.2  skrll 	case FINISH_TXCTLBLK_SETUP:
   4068  1.1.2.5  skrll 		rtw_txsoft_blk_cleanup_all(sc);
   4069  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4070  1.1.2.2  skrll 	case FINISH_DESCMAP_LOAD:
   4071  1.1.2.2  skrll 		bus_dmamap_unload(sc->sc_dmat, sc->sc_desc_dmamap);
   4072  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4073  1.1.2.2  skrll 	case FINISH_DESCMAP_CREATE:
   4074  1.1.2.2  skrll 		bus_dmamap_destroy(sc->sc_dmat, sc->sc_desc_dmamap);
   4075  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4076  1.1.2.2  skrll 	case FINISH_DESC_MAP:
   4077  1.1.2.2  skrll 		bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_descs,
   4078  1.1.2.2  skrll 		    sizeof(struct rtw_descs));
   4079  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4080  1.1.2.2  skrll 	case FINISH_DESC_ALLOC:
   4081  1.1.2.2  skrll 		bus_dmamem_free(sc->sc_dmat, &sc->sc_desc_segs,
   4082  1.1.2.2  skrll 		    sc->sc_desc_nsegs);
   4083  1.1.2.2  skrll 		/*FALLTHROUGH*/
   4084  1.1.2.2  skrll 	case DETACHED:
   4085  1.1.2.2  skrll 		NEXT_ATTACH_STATE(sc, DETACHED);
   4086  1.1.2.2  skrll 		break;
   4087  1.1.2.2  skrll 	}
   4088  1.1.2.2  skrll 	return 0;
   4089  1.1.2.2  skrll }
   4090  1.1.2.2  skrll 
   4091  1.1.2.2  skrll int
   4092  1.1.2.2  skrll rtw_activate(struct device *self, enum devact act)
   4093  1.1.2.2  skrll {
   4094  1.1.2.2  skrll 	struct rtw_softc *sc = (struct rtw_softc *)self;
   4095  1.1.2.2  skrll 	int rc = 0, s;
   4096  1.1.2.2  skrll 
   4097  1.1.2.2  skrll 	s = splnet();
   4098  1.1.2.2  skrll 	switch (act) {
   4099  1.1.2.2  skrll 	case DVACT_ACTIVATE:
   4100  1.1.2.2  skrll 		rc = EOPNOTSUPP;
   4101  1.1.2.2  skrll 		break;
   4102  1.1.2.2  skrll 
   4103  1.1.2.2  skrll 	case DVACT_DEACTIVATE:
   4104  1.1.2.2  skrll 		if_deactivate(&sc->sc_ic.ic_if);
   4105  1.1.2.2  skrll 		break;
   4106  1.1.2.2  skrll 	}
   4107  1.1.2.2  skrll 	splx(s);
   4108  1.1.2.2  skrll 	return rc;
   4109  1.1.2.2  skrll }
   4110