rtw.c revision 1.101 1 1.101 dyoung /* $NetBSD: rtw.c,v 1.101 2008/03/12 18:02:21 dyoung Exp $ */
2 1.1 dyoung /*-
3 1.93 dyoung * Copyright (c) 2004, 2005, 2006, 2007 David Young. All rights
4 1.93 dyoung * reserved.
5 1.1 dyoung *
6 1.1 dyoung * Programmed for NetBSD by David Young.
7 1.1 dyoung *
8 1.1 dyoung * Redistribution and use in source and binary forms, with or without
9 1.1 dyoung * modification, are permitted provided that the following conditions
10 1.1 dyoung * are met:
11 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
12 1.1 dyoung * notice, this list of conditions and the following disclaimer.
13 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
15 1.1 dyoung * documentation and/or other materials provided with the distribution.
16 1.1 dyoung * 3. The name of David Young may not be used to endorse or promote
17 1.1 dyoung * products derived from this software without specific prior
18 1.1 dyoung * written permission.
19 1.1 dyoung *
20 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
21 1.1 dyoung * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
22 1.1 dyoung * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
23 1.1 dyoung * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
24 1.1 dyoung * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
25 1.1 dyoung * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
26 1.1 dyoung * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 dyoung * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 1.1 dyoung * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 1.1 dyoung * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 1.1 dyoung * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
31 1.1 dyoung * OF SUCH DAMAGE.
32 1.1 dyoung */
33 1.1 dyoung /*
34 1.1 dyoung * Device driver for the Realtek RTL8180 802.11 MAC/BBP.
35 1.1 dyoung */
36 1.1 dyoung
37 1.1 dyoung #include <sys/cdefs.h>
38 1.101 dyoung __KERNEL_RCSID(0, "$NetBSD: rtw.c,v 1.101 2008/03/12 18:02:21 dyoung Exp $");
39 1.1 dyoung
40 1.1 dyoung #include "bpfilter.h"
41 1.1 dyoung
42 1.1 dyoung #include <sys/param.h>
43 1.4 dyoung #include <sys/sysctl.h>
44 1.44 perry #include <sys/systm.h>
45 1.1 dyoung #include <sys/callout.h>
46 1.44 perry #include <sys/mbuf.h>
47 1.1 dyoung #include <sys/malloc.h>
48 1.1 dyoung #include <sys/kernel.h>
49 1.1 dyoung #include <sys/time.h>
50 1.1 dyoung #include <sys/types.h>
51 1.99 tsutsui #include <sys/device.h>
52 1.1 dyoung
53 1.1 dyoung #include <machine/endian.h>
54 1.91 ad #include <sys/bus.h>
55 1.91 ad #include <sys/intr.h> /* splnet */
56 1.1 dyoung
57 1.1 dyoung #include <uvm/uvm_extern.h>
58 1.44 perry
59 1.1 dyoung #include <net/if.h>
60 1.1 dyoung #include <net/if_media.h>
61 1.1 dyoung #include <net/if_ether.h>
62 1.1 dyoung
63 1.48 dyoung #include <net80211/ieee80211_netbsd.h>
64 1.1 dyoung #include <net80211/ieee80211_var.h>
65 1.1 dyoung #include <net80211/ieee80211_radiotap.h>
66 1.1 dyoung
67 1.44 perry #if NBPFILTER > 0
68 1.1 dyoung #include <net/bpf.h>
69 1.44 perry #endif
70 1.1 dyoung
71 1.1 dyoung #include <dev/ic/rtwreg.h>
72 1.1 dyoung #include <dev/ic/rtwvar.h>
73 1.1 dyoung #include <dev/ic/rtwphyio.h>
74 1.1 dyoung #include <dev/ic/rtwphy.h>
75 1.1 dyoung
76 1.1 dyoung #include <dev/ic/smc93cx6var.h>
77 1.1 dyoung
78 1.58 dyoung static int rtw_rfprog_fallback = 0;
79 1.58 dyoung static int rtw_host_rfio = 0;
80 1.4 dyoung
81 1.1 dyoung #ifdef RTW_DEBUG
82 1.21 dyoung int rtw_debug = 0;
83 1.58 dyoung static int rtw_rxbufs_limit = RTW_RXQLEN;
84 1.1 dyoung #endif /* RTW_DEBUG */
85 1.1 dyoung
86 1.21 dyoung #define NEXT_ATTACH_STATE(sc, state) do { \
87 1.21 dyoung DPRINTF(sc, RTW_DEBUG_ATTACH, \
88 1.21 dyoung ("%s: attach state %s\n", __func__, #state)); \
89 1.21 dyoung sc->sc_attach_state = state; \
90 1.1 dyoung } while (0)
91 1.1 dyoung
92 1.26 dyoung int rtw_dwelltime = 200; /* milliseconds */
93 1.50 dyoung static struct ieee80211_cipher rtw_cipher_wep;
94 1.1 dyoung
95 1.101 dyoung static void rtw_disable_interrupts(struct rtw_regs *);
96 1.101 dyoung static void rtw_enable_interrupts(struct rtw_softc *);
97 1.101 dyoung
98 1.101 dyoung static int rtw_init(struct ifnet *);
99 1.101 dyoung
100 1.5 dyoung static void rtw_start(struct ifnet *);
101 1.58 dyoung static void rtw_reset_oactive(struct rtw_softc *);
102 1.58 dyoung static struct mbuf *rtw_beacon_alloc(struct rtw_softc *,
103 1.58 dyoung struct ieee80211_node *);
104 1.58 dyoung static u_int rtw_txring_next(struct rtw_regs *, struct rtw_txdesc_blk *);
105 1.5 dyoung
106 1.83 dyoung static void rtw_io_enable(struct rtw_softc *, uint8_t, int);
107 1.49 dyoung static int rtw_key_delete(struct ieee80211com *, const struct ieee80211_key *);
108 1.49 dyoung static int rtw_key_set(struct ieee80211com *, const struct ieee80211_key *,
109 1.49 dyoung const u_int8_t[IEEE80211_ADDR_LEN]);
110 1.49 dyoung static void rtw_key_update_end(struct ieee80211com *);
111 1.49 dyoung static void rtw_key_update_begin(struct ieee80211com *);
112 1.54 dogcow static int rtw_wep_decap(struct ieee80211_key *, struct mbuf *, int);
113 1.49 dyoung static void rtw_wep_setkeys(struct rtw_softc *, struct ieee80211_key *, int);
114 1.49 dyoung
115 1.45 dyoung static void rtw_led_attach(struct rtw_led_state *, void *);
116 1.101 dyoung static void rtw_led_detach(struct rtw_led_state *);
117 1.42 dyoung static void rtw_led_init(struct rtw_regs *);
118 1.42 dyoung static void rtw_led_slowblink(void *);
119 1.42 dyoung static void rtw_led_fastblink(void *);
120 1.42 dyoung static void rtw_led_set(struct rtw_led_state *, struct rtw_regs *, int);
121 1.42 dyoung
122 1.4 dyoung static int rtw_sysctl_verify_rfio(SYSCTLFN_PROTO);
123 1.4 dyoung static int rtw_sysctl_verify_rfprog(SYSCTLFN_PROTO);
124 1.4 dyoung #ifdef RTW_DEBUG
125 1.83 dyoung static void rtw_dump_rings(struct rtw_softc *sc);
126 1.21 dyoung static void rtw_print_txdesc(struct rtw_softc *, const char *,
127 1.34 dyoung struct rtw_txsoft *, struct rtw_txdesc_blk *, int);
128 1.4 dyoung static int rtw_sysctl_verify_debug(SYSCTLFN_PROTO);
129 1.31 dyoung static int rtw_sysctl_verify_rxbufs_limit(SYSCTLFN_PROTO);
130 1.4 dyoung #endif /* RTW_DEBUG */
131 1.83 dyoung #ifdef RTW_DIAG
132 1.83 dyoung static void rtw_txring_fixup(struct rtw_softc *sc, const char *fn, int ln);
133 1.83 dyoung #endif /* RTW_DIAG */
134 1.4 dyoung
135 1.4 dyoung /*
136 1.4 dyoung * Setup sysctl(3) MIB, hw.rtw.*
137 1.4 dyoung *
138 1.4 dyoung * TBD condition CTLFLAG_PERMANENT on being an LKM or not
139 1.4 dyoung */
140 1.4 dyoung SYSCTL_SETUP(sysctl_rtw, "sysctl rtw(4) subtree setup")
141 1.4 dyoung {
142 1.4 dyoung int rc;
143 1.47 atatat const struct sysctlnode *cnode, *rnode;
144 1.4 dyoung
145 1.4 dyoung if ((rc = sysctl_createv(clog, 0, NULL, &rnode,
146 1.4 dyoung CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
147 1.4 dyoung NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0)
148 1.4 dyoung goto err;
149 1.4 dyoung
150 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &rnode,
151 1.4 dyoung CTLFLAG_PERMANENT, CTLTYPE_NODE, "rtw",
152 1.4 dyoung "Realtek RTL818x 802.11 controls",
153 1.4 dyoung NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL)) != 0)
154 1.4 dyoung goto err;
155 1.4 dyoung
156 1.4 dyoung #ifdef RTW_DEBUG
157 1.4 dyoung /* control debugging printfs */
158 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
159 1.4 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
160 1.4 dyoung "debug", SYSCTL_DESCR("Enable RTL818x debugging output"),
161 1.4 dyoung rtw_sysctl_verify_debug, 0, &rtw_debug, 0,
162 1.4 dyoung CTL_CREATE, CTL_EOL)) != 0)
163 1.4 dyoung goto err;
164 1.31 dyoung
165 1.31 dyoung /* Limit rx buffers, for simulating resource exhaustion. */
166 1.31 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
167 1.31 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
168 1.31 dyoung "rxbufs_limit",
169 1.31 dyoung SYSCTL_DESCR("Set rx buffers limit"),
170 1.31 dyoung rtw_sysctl_verify_rxbufs_limit, 0, &rtw_rxbufs_limit, 0,
171 1.31 dyoung CTL_CREATE, CTL_EOL)) != 0)
172 1.31 dyoung goto err;
173 1.31 dyoung
174 1.4 dyoung #endif /* RTW_DEBUG */
175 1.4 dyoung /* set fallback RF programming method */
176 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
177 1.4 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
178 1.4 dyoung "rfprog_fallback",
179 1.4 dyoung SYSCTL_DESCR("Set fallback RF programming method"),
180 1.4 dyoung rtw_sysctl_verify_rfprog, 0, &rtw_rfprog_fallback, 0,
181 1.4 dyoung CTL_CREATE, CTL_EOL)) != 0)
182 1.4 dyoung goto err;
183 1.4 dyoung
184 1.4 dyoung /* force host to control RF I/O bus */
185 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
186 1.4 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
187 1.4 dyoung "host_rfio", SYSCTL_DESCR("Enable host control of RF I/O"),
188 1.4 dyoung rtw_sysctl_verify_rfio, 0, &rtw_host_rfio, 0,
189 1.4 dyoung CTL_CREATE, CTL_EOL)) != 0)
190 1.4 dyoung goto err;
191 1.4 dyoung
192 1.4 dyoung return;
193 1.4 dyoung err:
194 1.4 dyoung printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
195 1.4 dyoung }
196 1.4 dyoung
197 1.4 dyoung static int
198 1.4 dyoung rtw_sysctl_verify(SYSCTLFN_ARGS, int lower, int upper)
199 1.4 dyoung {
200 1.4 dyoung int error, t;
201 1.4 dyoung struct sysctlnode node;
202 1.4 dyoung
203 1.4 dyoung node = *rnode;
204 1.4 dyoung t = *(int*)rnode->sysctl_data;
205 1.4 dyoung node.sysctl_data = &t;
206 1.4 dyoung error = sysctl_lookup(SYSCTLFN_CALL(&node));
207 1.4 dyoung if (error || newp == NULL)
208 1.4 dyoung return (error);
209 1.4 dyoung
210 1.4 dyoung if (t < lower || t > upper)
211 1.4 dyoung return (EINVAL);
212 1.4 dyoung
213 1.4 dyoung *(int*)rnode->sysctl_data = t;
214 1.4 dyoung
215 1.4 dyoung return (0);
216 1.4 dyoung }
217 1.4 dyoung
218 1.4 dyoung static int
219 1.4 dyoung rtw_sysctl_verify_rfprog(SYSCTLFN_ARGS)
220 1.4 dyoung {
221 1.46 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(__UNCONST(rnode)), 0,
222 1.75 dyoung __SHIFTOUT(RTW_CONFIG4_RFTYPE_MASK, RTW_CONFIG4_RFTYPE_MASK));
223 1.4 dyoung }
224 1.4 dyoung
225 1.4 dyoung static int
226 1.4 dyoung rtw_sysctl_verify_rfio(SYSCTLFN_ARGS)
227 1.4 dyoung {
228 1.46 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(__UNCONST(rnode)), 0, 1);
229 1.4 dyoung }
230 1.4 dyoung
231 1.1 dyoung #ifdef RTW_DEBUG
232 1.4 dyoung static int
233 1.4 dyoung rtw_sysctl_verify_debug(SYSCTLFN_ARGS)
234 1.4 dyoung {
235 1.46 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(__UNCONST(rnode)),
236 1.46 dyoung 0, RTW_DEBUG_MAX);
237 1.4 dyoung }
238 1.4 dyoung
239 1.31 dyoung static int
240 1.31 dyoung rtw_sysctl_verify_rxbufs_limit(SYSCTLFN_ARGS)
241 1.31 dyoung {
242 1.46 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(__UNCONST(rnode)),
243 1.46 dyoung 0, RTW_RXQLEN);
244 1.31 dyoung }
245 1.31 dyoung
246 1.1 dyoung static void
247 1.1 dyoung rtw_print_regs(struct rtw_regs *regs, const char *dvname, const char *where)
248 1.1 dyoung {
249 1.21 dyoung #define PRINTREG32(sc, reg) \
250 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
251 1.21 dyoung ("%s: reg[ " #reg " / %03x ] = %08x\n", \
252 1.1 dyoung dvname, reg, RTW_READ(regs, reg)))
253 1.1 dyoung
254 1.21 dyoung #define PRINTREG16(sc, reg) \
255 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
256 1.21 dyoung ("%s: reg[ " #reg " / %03x ] = %04x\n", \
257 1.1 dyoung dvname, reg, RTW_READ16(regs, reg)))
258 1.1 dyoung
259 1.21 dyoung #define PRINTREG8(sc, reg) \
260 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
261 1.21 dyoung ("%s: reg[ " #reg " / %03x ] = %02x\n", \
262 1.1 dyoung dvname, reg, RTW_READ8(regs, reg)))
263 1.1 dyoung
264 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, ("%s: %s\n", dvname, where));
265 1.1 dyoung
266 1.1 dyoung PRINTREG32(regs, RTW_IDR0);
267 1.1 dyoung PRINTREG32(regs, RTW_IDR1);
268 1.1 dyoung PRINTREG32(regs, RTW_MAR0);
269 1.1 dyoung PRINTREG32(regs, RTW_MAR1);
270 1.1 dyoung PRINTREG32(regs, RTW_TSFTRL);
271 1.1 dyoung PRINTREG32(regs, RTW_TSFTRH);
272 1.1 dyoung PRINTREG32(regs, RTW_TLPDA);
273 1.1 dyoung PRINTREG32(regs, RTW_TNPDA);
274 1.1 dyoung PRINTREG32(regs, RTW_THPDA);
275 1.1 dyoung PRINTREG32(regs, RTW_TCR);
276 1.1 dyoung PRINTREG32(regs, RTW_RCR);
277 1.1 dyoung PRINTREG32(regs, RTW_TINT);
278 1.1 dyoung PRINTREG32(regs, RTW_TBDA);
279 1.1 dyoung PRINTREG32(regs, RTW_ANAPARM);
280 1.1 dyoung PRINTREG32(regs, RTW_BB);
281 1.1 dyoung PRINTREG32(regs, RTW_PHYCFG);
282 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP0L);
283 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP0H);
284 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP1L);
285 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP1H);
286 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2LL);
287 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2LH);
288 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2HL);
289 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2HH);
290 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3LL);
291 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3LH);
292 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3HL);
293 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3HH);
294 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4LL);
295 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4LH);
296 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4HL);
297 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4HH);
298 1.1 dyoung PRINTREG32(regs, RTW_DK0);
299 1.1 dyoung PRINTREG32(regs, RTW_DK1);
300 1.1 dyoung PRINTREG32(regs, RTW_DK2);
301 1.1 dyoung PRINTREG32(regs, RTW_DK3);
302 1.1 dyoung PRINTREG32(regs, RTW_RETRYCTR);
303 1.1 dyoung PRINTREG32(regs, RTW_RDSAR);
304 1.1 dyoung PRINTREG32(regs, RTW_FER);
305 1.1 dyoung PRINTREG32(regs, RTW_FEMR);
306 1.1 dyoung PRINTREG32(regs, RTW_FPSR);
307 1.1 dyoung PRINTREG32(regs, RTW_FFER);
308 1.1 dyoung
309 1.1 dyoung /* 16-bit registers */
310 1.1 dyoung PRINTREG16(regs, RTW_BRSR);
311 1.1 dyoung PRINTREG16(regs, RTW_IMR);
312 1.1 dyoung PRINTREG16(regs, RTW_ISR);
313 1.1 dyoung PRINTREG16(regs, RTW_BCNITV);
314 1.1 dyoung PRINTREG16(regs, RTW_ATIMWND);
315 1.1 dyoung PRINTREG16(regs, RTW_BINTRITV);
316 1.1 dyoung PRINTREG16(regs, RTW_ATIMTRITV);
317 1.1 dyoung PRINTREG16(regs, RTW_CRC16ERR);
318 1.1 dyoung PRINTREG16(regs, RTW_CRC0);
319 1.1 dyoung PRINTREG16(regs, RTW_CRC1);
320 1.1 dyoung PRINTREG16(regs, RTW_CRC2);
321 1.1 dyoung PRINTREG16(regs, RTW_CRC3);
322 1.1 dyoung PRINTREG16(regs, RTW_CRC4);
323 1.1 dyoung PRINTREG16(regs, RTW_CWR);
324 1.1 dyoung
325 1.1 dyoung /* 8-bit registers */
326 1.1 dyoung PRINTREG8(regs, RTW_CR);
327 1.1 dyoung PRINTREG8(regs, RTW_9346CR);
328 1.1 dyoung PRINTREG8(regs, RTW_CONFIG0);
329 1.1 dyoung PRINTREG8(regs, RTW_CONFIG1);
330 1.1 dyoung PRINTREG8(regs, RTW_CONFIG2);
331 1.1 dyoung PRINTREG8(regs, RTW_MSR);
332 1.1 dyoung PRINTREG8(regs, RTW_CONFIG3);
333 1.1 dyoung PRINTREG8(regs, RTW_CONFIG4);
334 1.1 dyoung PRINTREG8(regs, RTW_TESTR);
335 1.1 dyoung PRINTREG8(regs, RTW_PSR);
336 1.1 dyoung PRINTREG8(regs, RTW_SCR);
337 1.1 dyoung PRINTREG8(regs, RTW_PHYDELAY);
338 1.1 dyoung PRINTREG8(regs, RTW_CRCOUNT);
339 1.1 dyoung PRINTREG8(regs, RTW_PHYADDR);
340 1.1 dyoung PRINTREG8(regs, RTW_PHYDATAW);
341 1.1 dyoung PRINTREG8(regs, RTW_PHYDATAR);
342 1.1 dyoung PRINTREG8(regs, RTW_CONFIG5);
343 1.1 dyoung PRINTREG8(regs, RTW_TPPOLL);
344 1.1 dyoung
345 1.1 dyoung PRINTREG16(regs, RTW_BSSID16);
346 1.1 dyoung PRINTREG32(regs, RTW_BSSID32);
347 1.1 dyoung #undef PRINTREG32
348 1.1 dyoung #undef PRINTREG16
349 1.1 dyoung #undef PRINTREG8
350 1.1 dyoung }
351 1.1 dyoung #endif /* RTW_DEBUG */
352 1.1 dyoung
353 1.1 dyoung void
354 1.3 dyoung rtw_continuous_tx_enable(struct rtw_softc *sc, int enable)
355 1.1 dyoung {
356 1.3 dyoung struct rtw_regs *regs = &sc->sc_regs;
357 1.3 dyoung
358 1.37 dyoung uint32_t tcr;
359 1.1 dyoung tcr = RTW_READ(regs, RTW_TCR);
360 1.1 dyoung tcr &= ~RTW_TCR_LBK_MASK;
361 1.1 dyoung if (enable)
362 1.1 dyoung tcr |= RTW_TCR_LBK_CONT;
363 1.1 dyoung else
364 1.1 dyoung tcr |= RTW_TCR_LBK_NORMAL;
365 1.1 dyoung RTW_WRITE(regs, RTW_TCR, tcr);
366 1.1 dyoung RTW_SYNC(regs, RTW_TCR, RTW_TCR);
367 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);
368 1.4 dyoung rtw_txdac_enable(sc, !enable);
369 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);/* XXX Voodoo from Linux. */
370 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
371 1.3 dyoung }
372 1.3 dyoung
373 1.24 dyoung #ifdef RTW_DEBUG
374 1.3 dyoung static const char *
375 1.3 dyoung rtw_access_string(enum rtw_access access)
376 1.3 dyoung {
377 1.3 dyoung switch (access) {
378 1.3 dyoung case RTW_ACCESS_NONE:
379 1.3 dyoung return "none";
380 1.3 dyoung case RTW_ACCESS_CONFIG:
381 1.3 dyoung return "config";
382 1.3 dyoung case RTW_ACCESS_ANAPARM:
383 1.3 dyoung return "anaparm";
384 1.3 dyoung default:
385 1.3 dyoung return "unknown";
386 1.3 dyoung }
387 1.3 dyoung }
388 1.24 dyoung #endif /* RTW_DEBUG */
389 1.3 dyoung
390 1.3 dyoung static void
391 1.42 dyoung rtw_set_access1(struct rtw_regs *regs, enum rtw_access naccess)
392 1.3 dyoung {
393 1.76 christos KASSERT(/* naccess >= RTW_ACCESS_NONE && */
394 1.76 christos naccess <= RTW_ACCESS_ANAPARM);
395 1.76 christos KASSERT(/* regs->r_access >= RTW_ACCESS_NONE && */
396 1.76 christos regs->r_access <= RTW_ACCESS_ANAPARM);
397 1.3 dyoung
398 1.42 dyoung if (naccess == regs->r_access)
399 1.3 dyoung return;
400 1.3 dyoung
401 1.3 dyoung switch (naccess) {
402 1.3 dyoung case RTW_ACCESS_NONE:
403 1.42 dyoung switch (regs->r_access) {
404 1.3 dyoung case RTW_ACCESS_ANAPARM:
405 1.3 dyoung rtw_anaparm_enable(regs, 0);
406 1.3 dyoung /*FALLTHROUGH*/
407 1.3 dyoung case RTW_ACCESS_CONFIG:
408 1.3 dyoung rtw_config0123_enable(regs, 0);
409 1.3 dyoung /*FALLTHROUGH*/
410 1.3 dyoung case RTW_ACCESS_NONE:
411 1.3 dyoung break;
412 1.3 dyoung }
413 1.3 dyoung break;
414 1.3 dyoung case RTW_ACCESS_CONFIG:
415 1.42 dyoung switch (regs->r_access) {
416 1.3 dyoung case RTW_ACCESS_NONE:
417 1.3 dyoung rtw_config0123_enable(regs, 1);
418 1.3 dyoung /*FALLTHROUGH*/
419 1.3 dyoung case RTW_ACCESS_CONFIG:
420 1.3 dyoung break;
421 1.3 dyoung case RTW_ACCESS_ANAPARM:
422 1.3 dyoung rtw_anaparm_enable(regs, 0);
423 1.3 dyoung break;
424 1.3 dyoung }
425 1.3 dyoung break;
426 1.3 dyoung case RTW_ACCESS_ANAPARM:
427 1.42 dyoung switch (regs->r_access) {
428 1.3 dyoung case RTW_ACCESS_NONE:
429 1.3 dyoung rtw_config0123_enable(regs, 1);
430 1.3 dyoung /*FALLTHROUGH*/
431 1.3 dyoung case RTW_ACCESS_CONFIG:
432 1.3 dyoung rtw_anaparm_enable(regs, 1);
433 1.3 dyoung /*FALLTHROUGH*/
434 1.3 dyoung case RTW_ACCESS_ANAPARM:
435 1.3 dyoung break;
436 1.3 dyoung }
437 1.3 dyoung break;
438 1.1 dyoung }
439 1.1 dyoung }
440 1.1 dyoung
441 1.3 dyoung void
442 1.42 dyoung rtw_set_access(struct rtw_regs *regs, enum rtw_access access)
443 1.3 dyoung {
444 1.42 dyoung rtw_set_access1(regs, access);
445 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ACCESS,
446 1.42 dyoung ("%s: access %s -> %s\n", __func__,
447 1.42 dyoung rtw_access_string(regs->r_access),
448 1.3 dyoung rtw_access_string(access)));
449 1.42 dyoung regs->r_access = access;
450 1.3 dyoung }
451 1.3 dyoung
452 1.1 dyoung /*
453 1.1 dyoung * Enable registers, switch register banks.
454 1.1 dyoung */
455 1.1 dyoung void
456 1.1 dyoung rtw_config0123_enable(struct rtw_regs *regs, int enable)
457 1.1 dyoung {
458 1.37 dyoung uint8_t ecr;
459 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
460 1.1 dyoung ecr &= ~(RTW_9346CR_EEM_MASK | RTW_9346CR_EECS | RTW_9346CR_EESK);
461 1.1 dyoung if (enable)
462 1.1 dyoung ecr |= RTW_9346CR_EEM_CONFIG;
463 1.8 dyoung else {
464 1.8 dyoung RTW_WBW(regs, RTW_9346CR, MAX(RTW_CONFIG0, RTW_CONFIG3));
465 1.1 dyoung ecr |= RTW_9346CR_EEM_NORMAL;
466 1.8 dyoung }
467 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR, ecr);
468 1.1 dyoung RTW_SYNC(regs, RTW_9346CR, RTW_9346CR);
469 1.1 dyoung }
470 1.1 dyoung
471 1.1 dyoung /* requires rtw_config0123_enable(, 1) */
472 1.1 dyoung void
473 1.1 dyoung rtw_anaparm_enable(struct rtw_regs *regs, int enable)
474 1.1 dyoung {
475 1.37 dyoung uint8_t cfg3;
476 1.1 dyoung
477 1.1 dyoung cfg3 = RTW_READ8(regs, RTW_CONFIG3);
478 1.3 dyoung cfg3 |= RTW_CONFIG3_CLKRUNEN;
479 1.3 dyoung if (enable)
480 1.3 dyoung cfg3 |= RTW_CONFIG3_PARMEN;
481 1.3 dyoung else
482 1.1 dyoung cfg3 &= ~RTW_CONFIG3_PARMEN;
483 1.1 dyoung RTW_WRITE8(regs, RTW_CONFIG3, cfg3);
484 1.1 dyoung RTW_SYNC(regs, RTW_CONFIG3, RTW_CONFIG3);
485 1.1 dyoung }
486 1.1 dyoung
487 1.1 dyoung /* requires rtw_anaparm_enable(, 1) */
488 1.1 dyoung void
489 1.4 dyoung rtw_txdac_enable(struct rtw_softc *sc, int enable)
490 1.1 dyoung {
491 1.37 dyoung uint32_t anaparm;
492 1.4 dyoung struct rtw_regs *regs = &sc->sc_regs;
493 1.1 dyoung
494 1.1 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
495 1.1 dyoung if (enable)
496 1.1 dyoung anaparm &= ~RTW_ANAPARM_TXDACOFF;
497 1.1 dyoung else
498 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
499 1.1 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
500 1.1 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
501 1.1 dyoung }
502 1.1 dyoung
503 1.61 perry static inline int
504 1.98 dyoung rtw_chip_reset1(struct rtw_regs *regs, device_t dev)
505 1.1 dyoung {
506 1.37 dyoung uint8_t cr;
507 1.1 dyoung int i;
508 1.1 dyoung
509 1.1 dyoung RTW_WRITE8(regs, RTW_CR, RTW_CR_RST);
510 1.1 dyoung
511 1.1 dyoung RTW_WBR(regs, RTW_CR, RTW_CR);
512 1.1 dyoung
513 1.21 dyoung for (i = 0; i < 1000; i++) {
514 1.1 dyoung if ((cr = RTW_READ8(regs, RTW_CR) & RTW_CR_RST) == 0) {
515 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RESET,
516 1.98 dyoung ("%s: reset in %dus\n", device_xname(dev), i));
517 1.1 dyoung return 0;
518 1.1 dyoung }
519 1.1 dyoung RTW_RBR(regs, RTW_CR, RTW_CR);
520 1.21 dyoung DELAY(10); /* 10us */
521 1.1 dyoung }
522 1.1 dyoung
523 1.98 dyoung aprint_error_dev(dev, "reset failed\n");
524 1.1 dyoung return ETIMEDOUT;
525 1.1 dyoung }
526 1.1 dyoung
527 1.61 perry static inline int
528 1.98 dyoung rtw_chip_reset(struct rtw_regs *regs, device_t dev)
529 1.3 dyoung {
530 1.3 dyoung uint32_t tcr;
531 1.3 dyoung
532 1.3 dyoung /* from Linux driver */
533 1.3 dyoung tcr = RTW_TCR_CWMIN | RTW_TCR_MXDMA_2048 |
534 1.75 dyoung __SHIFTIN(7, RTW_TCR_SRL_MASK) | __SHIFTIN(7, RTW_TCR_LRL_MASK);
535 1.3 dyoung
536 1.3 dyoung RTW_WRITE(regs, RTW_TCR, tcr);
537 1.3 dyoung
538 1.3 dyoung RTW_WBW(regs, RTW_CR, RTW_TCR);
539 1.3 dyoung
540 1.98 dyoung return rtw_chip_reset1(regs, dev);
541 1.3 dyoung }
542 1.3 dyoung
543 1.49 dyoung static int
544 1.58 dyoung rtw_wep_decap(struct ieee80211_key *k, struct mbuf *m, int hdrlen)
545 1.50 dyoung {
546 1.50 dyoung struct ieee80211_key keycopy;
547 1.50 dyoung
548 1.50 dyoung RTW_DPRINTF(RTW_DEBUG_KEY, ("%s:\n", __func__));
549 1.50 dyoung
550 1.50 dyoung keycopy = *k;
551 1.50 dyoung keycopy.wk_flags &= ~IEEE80211_KEY_SWCRYPT;
552 1.50 dyoung
553 1.58 dyoung return (*ieee80211_cipher_wep.ic_decap)(&keycopy, m, hdrlen);
554 1.50 dyoung }
555 1.50 dyoung
556 1.50 dyoung static int
557 1.49 dyoung rtw_key_delete(struct ieee80211com *ic, const struct ieee80211_key *k)
558 1.49 dyoung {
559 1.49 dyoung struct rtw_softc *sc = ic->ic_ifp->if_softc;
560 1.49 dyoung u_int keyix = k->wk_keyix;
561 1.49 dyoung
562 1.49 dyoung DPRINTF(sc, RTW_DEBUG_KEY, ("%s: delete key %u\n", __func__, keyix));
563 1.49 dyoung
564 1.49 dyoung if (keyix >= IEEE80211_WEP_NKID)
565 1.49 dyoung return 0;
566 1.49 dyoung if (k->wk_keylen != 0)
567 1.49 dyoung sc->sc_flags &= ~RTW_F_DK_VALID;
568 1.49 dyoung
569 1.49 dyoung return 1;
570 1.49 dyoung }
571 1.49 dyoung
572 1.49 dyoung static int
573 1.49 dyoung rtw_key_set(struct ieee80211com *ic, const struct ieee80211_key *k,
574 1.81 christos const u_int8_t mac[IEEE80211_ADDR_LEN])
575 1.49 dyoung {
576 1.49 dyoung struct rtw_softc *sc = ic->ic_ifp->if_softc;
577 1.49 dyoung
578 1.49 dyoung DPRINTF(sc, RTW_DEBUG_KEY, ("%s: set key %u\n", __func__, k->wk_keyix));
579 1.49 dyoung
580 1.49 dyoung if (k->wk_keyix >= IEEE80211_WEP_NKID)
581 1.49 dyoung return 0;
582 1.49 dyoung
583 1.49 dyoung sc->sc_flags &= ~RTW_F_DK_VALID;
584 1.49 dyoung
585 1.49 dyoung return 1;
586 1.49 dyoung }
587 1.49 dyoung
588 1.49 dyoung static void
589 1.81 christos rtw_key_update_begin(struct ieee80211com *ic)
590 1.49 dyoung {
591 1.55 dogcow #ifdef RTW_DEBUG
592 1.49 dyoung struct ifnet *ifp = ic->ic_ifp;
593 1.49 dyoung struct rtw_softc *sc = ifp->if_softc;
594 1.49 dyoung #endif
595 1.49 dyoung
596 1.49 dyoung DPRINTF(sc, RTW_DEBUG_KEY, ("%s:\n", __func__));
597 1.49 dyoung }
598 1.49 dyoung
599 1.49 dyoung static void
600 1.49 dyoung rtw_key_update_end(struct ieee80211com *ic)
601 1.49 dyoung {
602 1.49 dyoung struct ifnet *ifp = ic->ic_ifp;
603 1.49 dyoung struct rtw_softc *sc = ifp->if_softc;
604 1.49 dyoung
605 1.49 dyoung DPRINTF(sc, RTW_DEBUG_KEY, ("%s:\n", __func__));
606 1.49 dyoung
607 1.58 dyoung if ((sc->sc_flags & RTW_F_DK_VALID) != 0 ||
608 1.101 dyoung !device_is_active(sc->sc_dev))
609 1.49 dyoung return;
610 1.49 dyoung
611 1.83 dyoung rtw_io_enable(sc, RTW_CR_RE | RTW_CR_TE, 0);
612 1.49 dyoung rtw_wep_setkeys(sc, ic->ic_nw_keys, ic->ic_def_txkey);
613 1.83 dyoung rtw_io_enable(sc, RTW_CR_RE | RTW_CR_TE,
614 1.49 dyoung (ifp->if_flags & IFF_RUNNING) != 0);
615 1.49 dyoung }
616 1.49 dyoung
617 1.61 perry static inline int
618 1.58 dyoung rtw_key_hwsupp(uint32_t flags, const struct ieee80211_key *k)
619 1.58 dyoung {
620 1.58 dyoung if (k->wk_cipher->ic_cipher != IEEE80211_CIPHER_WEP)
621 1.58 dyoung return 0;
622 1.58 dyoung
623 1.58 dyoung return ((flags & RTW_C_RXWEP_40) != 0 && k->wk_keylen == 5) ||
624 1.58 dyoung ((flags & RTW_C_RXWEP_104) != 0 && k->wk_keylen == 13);
625 1.58 dyoung }
626 1.58 dyoung
627 1.42 dyoung static void
628 1.48 dyoung rtw_wep_setkeys(struct rtw_softc *sc, struct ieee80211_key *wk, int txkey)
629 1.42 dyoung {
630 1.58 dyoung uint8_t psr, scr;
631 1.66 dyoung int i, keylen;
632 1.42 dyoung struct rtw_regs *regs;
633 1.42 dyoung union rtw_keys *rk;
634 1.42 dyoung
635 1.42 dyoung regs = &sc->sc_regs;
636 1.42 dyoung rk = &sc->sc_keys;
637 1.42 dyoung
638 1.87 dyoung (void)memset(rk, 0, sizeof(rk));
639 1.42 dyoung
640 1.58 dyoung /* Temporarily use software crypto for all keys. */
641 1.58 dyoung for (i = 0; i < IEEE80211_WEP_NKID; i++) {
642 1.58 dyoung if (wk[i].wk_cipher == &rtw_cipher_wep)
643 1.58 dyoung wk[i].wk_cipher = &ieee80211_cipher_wep;
644 1.58 dyoung }
645 1.58 dyoung
646 1.50 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
647 1.50 dyoung
648 1.50 dyoung psr = RTW_READ8(regs, RTW_PSR);
649 1.42 dyoung scr = RTW_READ8(regs, RTW_SCR);
650 1.42 dyoung scr &= ~(RTW_SCR_KM_MASK | RTW_SCR_TXSECON | RTW_SCR_RXSECON);
651 1.42 dyoung
652 1.42 dyoung if ((sc->sc_ic.ic_flags & IEEE80211_F_PRIVACY) == 0)
653 1.42 dyoung goto out;
654 1.42 dyoung
655 1.66 dyoung for (keylen = i = 0; i < IEEE80211_WEP_NKID; i++) {
656 1.66 dyoung if (!rtw_key_hwsupp(sc->sc_flags, &wk[i]))
657 1.66 dyoung continue;
658 1.66 dyoung if (i == txkey) {
659 1.66 dyoung keylen = wk[i].wk_keylen;
660 1.66 dyoung break;
661 1.66 dyoung }
662 1.66 dyoung keylen = MAX(keylen, wk[i].wk_keylen);
663 1.42 dyoung }
664 1.42 dyoung
665 1.66 dyoung if (keylen == 5)
666 1.66 dyoung scr |= RTW_SCR_KM_WEP40 | RTW_SCR_RXSECON;
667 1.66 dyoung else if (keylen == 13)
668 1.66 dyoung scr |= RTW_SCR_KM_WEP104 | RTW_SCR_RXSECON;
669 1.42 dyoung
670 1.49 dyoung for (i = 0; i < IEEE80211_WEP_NKID; i++) {
671 1.66 dyoung if (wk[i].wk_keylen != keylen ||
672 1.58 dyoung wk[i].wk_cipher->ic_cipher != IEEE80211_CIPHER_WEP)
673 1.42 dyoung continue;
674 1.58 dyoung /* h/w will decrypt, s/w still strips headers */
675 1.58 dyoung wk[i].wk_cipher = &rtw_cipher_wep;
676 1.49 dyoung (void)memcpy(rk->rk_keys[i], wk[i].wk_key, wk[i].wk_keylen);
677 1.42 dyoung }
678 1.42 dyoung
679 1.42 dyoung out:
680 1.50 dyoung RTW_WRITE8(regs, RTW_PSR, psr & ~RTW_PSR_PSEN);
681 1.50 dyoung
682 1.88 dyoung bus_space_write_region_stream_4(regs->r_bt, regs->r_bh,
683 1.87 dyoung RTW_DK0, rk->rk_words, __arraycount(rk->rk_words));
684 1.42 dyoung
685 1.50 dyoung bus_space_barrier(regs->r_bt, regs->r_bh, RTW_DK0, sizeof(rk->rk_words),
686 1.42 dyoung BUS_SPACE_BARRIER_SYNC);
687 1.42 dyoung
688 1.58 dyoung RTW_WBW(regs, RTW_DK0, RTW_PSR);
689 1.50 dyoung RTW_WRITE8(regs, RTW_PSR, psr);
690 1.58 dyoung RTW_WBW(regs, RTW_PSR, RTW_SCR);
691 1.42 dyoung RTW_WRITE8(regs, RTW_SCR, scr);
692 1.42 dyoung RTW_SYNC(regs, RTW_SCR, RTW_SCR);
693 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
694 1.49 dyoung sc->sc_flags |= RTW_F_DK_VALID;
695 1.42 dyoung }
696 1.42 dyoung
697 1.61 perry static inline int
698 1.98 dyoung rtw_recall_eeprom(struct rtw_regs *regs, device_t dev)
699 1.1 dyoung {
700 1.1 dyoung int i;
701 1.37 dyoung uint8_t ecr;
702 1.1 dyoung
703 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
704 1.1 dyoung ecr = (ecr & ~RTW_9346CR_EEM_MASK) | RTW_9346CR_EEM_AUTOLOAD;
705 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR, ecr);
706 1.1 dyoung
707 1.1 dyoung RTW_WBR(regs, RTW_9346CR, RTW_9346CR);
708 1.1 dyoung
709 1.55 dogcow /* wait 25ms for completion */
710 1.55 dogcow for (i = 0; i < 250; i++) {
711 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
712 1.1 dyoung if ((ecr & RTW_9346CR_EEM_MASK) == RTW_9346CR_EEM_NORMAL) {
713 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RESET,
714 1.98 dyoung ("%s: recall EEPROM in %dus\n", device_xname(dev),
715 1.98 dyoung i * 100));
716 1.1 dyoung return 0;
717 1.1 dyoung }
718 1.1 dyoung RTW_RBR(regs, RTW_9346CR, RTW_9346CR);
719 1.1 dyoung DELAY(100);
720 1.1 dyoung }
721 1.98 dyoung aprint_error_dev(dev, "recall EEPROM failed\n");
722 1.1 dyoung return ETIMEDOUT;
723 1.1 dyoung }
724 1.1 dyoung
725 1.61 perry static inline int
726 1.1 dyoung rtw_reset(struct rtw_softc *sc)
727 1.1 dyoung {
728 1.1 dyoung int rc;
729 1.4 dyoung uint8_t config1;
730 1.1 dyoung
731 1.49 dyoung sc->sc_flags &= ~RTW_F_DK_VALID;
732 1.49 dyoung
733 1.98 dyoung if ((rc = rtw_chip_reset(&sc->sc_regs, sc->sc_dev)) != 0)
734 1.1 dyoung return rc;
735 1.1 dyoung
736 1.98 dyoung rc = rtw_recall_eeprom(&sc->sc_regs, sc->sc_dev);
737 1.1 dyoung
738 1.4 dyoung config1 = RTW_READ8(&sc->sc_regs, RTW_CONFIG1);
739 1.4 dyoung RTW_WRITE8(&sc->sc_regs, RTW_CONFIG1, config1 & ~RTW_CONFIG1_PMEN);
740 1.1 dyoung /* TBD turn off maximum power saving? */
741 1.1 dyoung
742 1.1 dyoung return 0;
743 1.1 dyoung }
744 1.1 dyoung
745 1.61 perry static inline int
746 1.34 dyoung rtw_txdesc_dmamaps_create(bus_dma_tag_t dmat, struct rtw_txsoft *descs,
747 1.1 dyoung u_int ndescs)
748 1.1 dyoung {
749 1.1 dyoung int i, rc = 0;
750 1.1 dyoung for (i = 0; i < ndescs; i++) {
751 1.1 dyoung rc = bus_dmamap_create(dmat, MCLBYTES, RTW_MAXPKTSEGS, MCLBYTES,
752 1.34 dyoung 0, 0, &descs[i].ts_dmamap);
753 1.1 dyoung if (rc != 0)
754 1.1 dyoung break;
755 1.1 dyoung }
756 1.1 dyoung return rc;
757 1.1 dyoung }
758 1.1 dyoung
759 1.61 perry static inline int
760 1.34 dyoung rtw_rxdesc_dmamaps_create(bus_dma_tag_t dmat, struct rtw_rxsoft *descs,
761 1.1 dyoung u_int ndescs)
762 1.1 dyoung {
763 1.1 dyoung int i, rc = 0;
764 1.1 dyoung for (i = 0; i < ndescs; i++) {
765 1.1 dyoung rc = bus_dmamap_create(dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
766 1.34 dyoung &descs[i].rs_dmamap);
767 1.1 dyoung if (rc != 0)
768 1.1 dyoung break;
769 1.1 dyoung }
770 1.1 dyoung return rc;
771 1.1 dyoung }
772 1.1 dyoung
773 1.61 perry static inline void
774 1.34 dyoung rtw_rxdesc_dmamaps_destroy(bus_dma_tag_t dmat, struct rtw_rxsoft *descs,
775 1.1 dyoung u_int ndescs)
776 1.1 dyoung {
777 1.1 dyoung int i;
778 1.1 dyoung for (i = 0; i < ndescs; i++) {
779 1.34 dyoung if (descs[i].rs_dmamap != NULL)
780 1.34 dyoung bus_dmamap_destroy(dmat, descs[i].rs_dmamap);
781 1.1 dyoung }
782 1.1 dyoung }
783 1.1 dyoung
784 1.61 perry static inline void
785 1.34 dyoung rtw_txdesc_dmamaps_destroy(bus_dma_tag_t dmat, struct rtw_txsoft *descs,
786 1.1 dyoung u_int ndescs)
787 1.1 dyoung {
788 1.1 dyoung int i;
789 1.1 dyoung for (i = 0; i < ndescs; i++) {
790 1.34 dyoung if (descs[i].ts_dmamap != NULL)
791 1.34 dyoung bus_dmamap_destroy(dmat, descs[i].ts_dmamap);
792 1.1 dyoung }
793 1.1 dyoung }
794 1.1 dyoung
795 1.61 perry static inline void
796 1.1 dyoung rtw_srom_free(struct rtw_srom *sr)
797 1.1 dyoung {
798 1.1 dyoung sr->sr_size = 0;
799 1.1 dyoung if (sr->sr_content == NULL)
800 1.1 dyoung return;
801 1.1 dyoung free(sr->sr_content, M_DEVBUF);
802 1.1 dyoung sr->sr_content = NULL;
803 1.1 dyoung }
804 1.1 dyoung
805 1.1 dyoung static void
806 1.81 christos rtw_srom_defaults(struct rtw_srom *sr, uint32_t *flags,
807 1.78 christos uint8_t *cs_threshold, enum rtw_rfchipid *rfchipid, uint32_t *rcr)
808 1.1 dyoung {
809 1.1 dyoung *flags |= (RTW_F_DIGPHY|RTW_F_ANTDIV);
810 1.1 dyoung *cs_threshold = RTW_SR_ENERGYDETTHR_DEFAULT;
811 1.1 dyoung *rcr |= RTW_RCR_ENCS1;
812 1.1 dyoung *rfchipid = RTW_RFCHIPID_PHILIPS;
813 1.1 dyoung }
814 1.1 dyoung
815 1.1 dyoung static int
816 1.37 dyoung rtw_srom_parse(struct rtw_srom *sr, uint32_t *flags, uint8_t *cs_threshold,
817 1.37 dyoung enum rtw_rfchipid *rfchipid, uint32_t *rcr, enum rtw_locale *locale,
818 1.98 dyoung device_t dev)
819 1.1 dyoung {
820 1.1 dyoung int i;
821 1.1 dyoung const char *rfname, *paname;
822 1.1 dyoung char scratch[sizeof("unknown 0xXX")];
823 1.46 dyoung uint16_t srom_version;
824 1.37 dyoung uint8_t mac[IEEE80211_ADDR_LEN];
825 1.1 dyoung
826 1.1 dyoung *flags &= ~(RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV);
827 1.1 dyoung *rcr &= ~(RTW_RCR_ENCS1 | RTW_RCR_ENCS2);
828 1.1 dyoung
829 1.46 dyoung srom_version = RTW_SR_GET16(sr, RTW_SR_VERSION);
830 1.1 dyoung
831 1.46 dyoung if (srom_version <= 0x0101) {
832 1.98 dyoung aprint_error_dev(dev,
833 1.98 dyoung "SROM version %d.%d is not understood, "
834 1.98 dyoung "limping along with defaults\n",
835 1.98 dyoung srom_version >> 8, srom_version & 0xff);
836 1.7 dyoung rtw_srom_defaults(sr, flags, cs_threshold, rfchipid, rcr);
837 1.1 dyoung return 0;
838 1.98 dyoung } else {
839 1.98 dyoung aprint_verbose_dev(dev, "SROM version %d.%d",
840 1.98 dyoung srom_version >> 8, srom_version & 0xff);
841 1.1 dyoung }
842 1.1 dyoung
843 1.1 dyoung for (i = 0; i < IEEE80211_ADDR_LEN; i++)
844 1.1 dyoung mac[i] = RTW_SR_GET(sr, RTW_SR_MAC + i);
845 1.1 dyoung
846 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
847 1.98 dyoung ("%s: EEPROM MAC %s\n", device_xname(dev), ether_sprintf(mac)));
848 1.1 dyoung
849 1.1 dyoung *cs_threshold = RTW_SR_GET(sr, RTW_SR_ENERGYDETTHR);
850 1.1 dyoung
851 1.1 dyoung if ((RTW_SR_GET(sr, RTW_SR_CONFIG2) & RTW_CONFIG2_ANT) != 0)
852 1.1 dyoung *flags |= RTW_F_ANTDIV;
853 1.1 dyoung
854 1.10 dyoung /* Note well: the sense of the RTW_SR_RFPARM_DIGPHY bit seems
855 1.10 dyoung * to be reversed.
856 1.10 dyoung */
857 1.10 dyoung if ((RTW_SR_GET(sr, RTW_SR_RFPARM) & RTW_SR_RFPARM_DIGPHY) == 0)
858 1.1 dyoung *flags |= RTW_F_DIGPHY;
859 1.1 dyoung if ((RTW_SR_GET(sr, RTW_SR_RFPARM) & RTW_SR_RFPARM_DFLANTB) != 0)
860 1.1 dyoung *flags |= RTW_F_DFLANTB;
861 1.1 dyoung
862 1.75 dyoung *rcr |= __SHIFTIN(__SHIFTOUT(RTW_SR_GET(sr, RTW_SR_RFPARM),
863 1.1 dyoung RTW_SR_RFPARM_CS_MASK), RTW_RCR_ENCS1);
864 1.1 dyoung
865 1.58 dyoung if ((RTW_SR_GET(sr, RTW_SR_CONFIG0) & RTW_CONFIG0_WEP104) != 0)
866 1.58 dyoung *flags |= RTW_C_RXWEP_104;
867 1.58 dyoung
868 1.58 dyoung *flags |= RTW_C_RXWEP_40; /* XXX */
869 1.58 dyoung
870 1.1 dyoung *rfchipid = RTW_SR_GET(sr, RTW_SR_RFCHIPID);
871 1.1 dyoung switch (*rfchipid) {
872 1.1 dyoung case RTW_RFCHIPID_GCT: /* this combo seen in the wild */
873 1.1 dyoung rfname = "GCT GRF5101";
874 1.1 dyoung paname = "Winspring WS9901";
875 1.1 dyoung break;
876 1.1 dyoung case RTW_RFCHIPID_MAXIM:
877 1.1 dyoung rfname = "Maxim MAX2820"; /* guess */
878 1.1 dyoung paname = "Maxim MAX2422"; /* guess */
879 1.1 dyoung break;
880 1.1 dyoung case RTW_RFCHIPID_INTERSIL:
881 1.1 dyoung rfname = "Intersil HFA3873"; /* guess */
882 1.1 dyoung paname = "Intersil <unknown>";
883 1.1 dyoung break;
884 1.1 dyoung case RTW_RFCHIPID_PHILIPS: /* this combo seen in the wild */
885 1.1 dyoung rfname = "Philips SA2400A";
886 1.1 dyoung paname = "Philips SA2411";
887 1.1 dyoung break;
888 1.1 dyoung case RTW_RFCHIPID_RFMD:
889 1.1 dyoung /* this is the same front-end as an atw(4)! */
890 1.1 dyoung rfname = "RFMD RF2948B, " /* mentioned in Realtek docs */
891 1.1 dyoung "LNA: RFMD RF2494, " /* mentioned in Realtek docs */
892 1.1 dyoung "SYN: Silicon Labs Si4126"; /* inferred from
893 1.1 dyoung * reference driver
894 1.1 dyoung */
895 1.1 dyoung paname = "RFMD RF2189"; /* mentioned in Realtek docs */
896 1.1 dyoung break;
897 1.1 dyoung case RTW_RFCHIPID_RESERVED:
898 1.1 dyoung rfname = paname = "reserved";
899 1.1 dyoung break;
900 1.1 dyoung default:
901 1.1 dyoung snprintf(scratch, sizeof(scratch), "unknown 0x%02x", *rfchipid);
902 1.1 dyoung rfname = paname = scratch;
903 1.1 dyoung }
904 1.98 dyoung aprint_normal_dev(dev, "RF: %s, PA: %s\n", rfname, paname);
905 1.1 dyoung
906 1.1 dyoung switch (RTW_SR_GET(sr, RTW_SR_CONFIG0) & RTW_CONFIG0_GL_MASK) {
907 1.1 dyoung case RTW_CONFIG0_GL_USA:
908 1.55 dogcow case _RTW_CONFIG0_GL_USA:
909 1.1 dyoung *locale = RTW_LOCALE_USA;
910 1.1 dyoung break;
911 1.1 dyoung case RTW_CONFIG0_GL_EUROPE:
912 1.1 dyoung *locale = RTW_LOCALE_EUROPE;
913 1.1 dyoung break;
914 1.1 dyoung case RTW_CONFIG0_GL_JAPAN:
915 1.1 dyoung *locale = RTW_LOCALE_JAPAN;
916 1.1 dyoung break;
917 1.1 dyoung default:
918 1.1 dyoung *locale = RTW_LOCALE_UNKNOWN;
919 1.1 dyoung break;
920 1.1 dyoung }
921 1.1 dyoung return 0;
922 1.1 dyoung }
923 1.1 dyoung
924 1.1 dyoung /* Returns -1 on failure. */
925 1.1 dyoung static int
926 1.37 dyoung rtw_srom_read(struct rtw_regs *regs, uint32_t flags, struct rtw_srom *sr,
927 1.98 dyoung device_t dev)
928 1.1 dyoung {
929 1.1 dyoung int rc;
930 1.1 dyoung struct seeprom_descriptor sd;
931 1.37 dyoung uint8_t ecr;
932 1.1 dyoung
933 1.1 dyoung (void)memset(&sd, 0, sizeof(sd));
934 1.1 dyoung
935 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
936 1.1 dyoung
937 1.1 dyoung if ((flags & RTW_F_9356SROM) != 0) {
938 1.98 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("%s: 93c56 SROM\n",
939 1.98 dyoung device_xname(dev)));
940 1.1 dyoung sr->sr_size = 256;
941 1.1 dyoung sd.sd_chip = C56_66;
942 1.1 dyoung } else {
943 1.98 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("%s: 93c46 SROM\n",
944 1.98 dyoung device_xname(dev)));
945 1.1 dyoung sr->sr_size = 128;
946 1.1 dyoung sd.sd_chip = C46;
947 1.1 dyoung }
948 1.1 dyoung
949 1.1 dyoung ecr &= ~(RTW_9346CR_EEDI | RTW_9346CR_EEDO | RTW_9346CR_EESK |
950 1.41 dyoung RTW_9346CR_EEM_MASK | RTW_9346CR_EECS);
951 1.1 dyoung ecr |= RTW_9346CR_EEM_PROGRAM;
952 1.1 dyoung
953 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR, ecr);
954 1.1 dyoung
955 1.1 dyoung sr->sr_content = malloc(sr->sr_size, M_DEVBUF, M_NOWAIT);
956 1.1 dyoung
957 1.1 dyoung if (sr->sr_content == NULL) {
958 1.98 dyoung aprint_error_dev(dev, "unable to allocate SROM buffer\n");
959 1.1 dyoung return ENOMEM;
960 1.1 dyoung }
961 1.1 dyoung
962 1.1 dyoung (void)memset(sr->sr_content, 0, sr->sr_size);
963 1.1 dyoung
964 1.1 dyoung /* RTL8180 has a single 8-bit register for controlling the
965 1.1 dyoung * 93cx6 SROM. There is no "ready" bit. The RTL8180
966 1.1 dyoung * input/output sense is the reverse of read_seeprom's.
967 1.1 dyoung */
968 1.1 dyoung sd.sd_tag = regs->r_bt;
969 1.1 dyoung sd.sd_bsh = regs->r_bh;
970 1.1 dyoung sd.sd_regsize = 1;
971 1.1 dyoung sd.sd_control_offset = RTW_9346CR;
972 1.1 dyoung sd.sd_status_offset = RTW_9346CR;
973 1.1 dyoung sd.sd_dataout_offset = RTW_9346CR;
974 1.1 dyoung sd.sd_CK = RTW_9346CR_EESK;
975 1.1 dyoung sd.sd_CS = RTW_9346CR_EECS;
976 1.1 dyoung sd.sd_DI = RTW_9346CR_EEDO;
977 1.1 dyoung sd.sd_DO = RTW_9346CR_EEDI;
978 1.44 perry /* make read_seeprom enter EEPROM read/write mode */
979 1.1 dyoung sd.sd_MS = ecr;
980 1.1 dyoung sd.sd_RDY = 0;
981 1.1 dyoung
982 1.8 dyoung /* TBD bus barriers */
983 1.1 dyoung if (!read_seeprom(&sd, sr->sr_content, 0, sr->sr_size/2)) {
984 1.98 dyoung aprint_error_dev(dev, "could not read SROM\n");
985 1.1 dyoung free(sr->sr_content, M_DEVBUF);
986 1.1 dyoung sr->sr_content = NULL;
987 1.1 dyoung return -1; /* XXX */
988 1.1 dyoung }
989 1.1 dyoung
990 1.44 perry /* end EEPROM read/write mode */
991 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR,
992 1.1 dyoung (ecr & ~RTW_9346CR_EEM_MASK) | RTW_9346CR_EEM_NORMAL);
993 1.1 dyoung RTW_WBRW(regs, RTW_9346CR, RTW_9346CR);
994 1.1 dyoung
995 1.98 dyoung if ((rc = rtw_recall_eeprom(regs, dev)) != 0)
996 1.1 dyoung return rc;
997 1.1 dyoung
998 1.1 dyoung #ifdef RTW_DEBUG
999 1.1 dyoung {
1000 1.1 dyoung int i;
1001 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
1002 1.98 dyoung ("\n%s: serial ROM:\n\t", device_xname(dev)));
1003 1.1 dyoung for (i = 0; i < sr->sr_size/2; i++) {
1004 1.1 dyoung if (((i % 8) == 0) && (i != 0))
1005 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("\n\t"));
1006 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
1007 1.21 dyoung (" %04x", sr->sr_content[i]));
1008 1.1 dyoung }
1009 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("\n"));
1010 1.1 dyoung }
1011 1.1 dyoung #endif /* RTW_DEBUG */
1012 1.1 dyoung return 0;
1013 1.1 dyoung }
1014 1.1 dyoung
1015 1.4 dyoung static void
1016 1.4 dyoung rtw_set_rfprog(struct rtw_regs *regs, enum rtw_rfchipid rfchipid,
1017 1.98 dyoung device_t dev)
1018 1.4 dyoung {
1019 1.37 dyoung uint8_t cfg4;
1020 1.4 dyoung const char *method;
1021 1.4 dyoung
1022 1.4 dyoung cfg4 = RTW_READ8(regs, RTW_CONFIG4) & ~RTW_CONFIG4_RFTYPE_MASK;
1023 1.4 dyoung
1024 1.4 dyoung switch (rfchipid) {
1025 1.4 dyoung default:
1026 1.75 dyoung cfg4 |= __SHIFTIN(rtw_rfprog_fallback, RTW_CONFIG4_RFTYPE_MASK);
1027 1.4 dyoung method = "fallback";
1028 1.4 dyoung break;
1029 1.4 dyoung case RTW_RFCHIPID_INTERSIL:
1030 1.4 dyoung cfg4 |= RTW_CONFIG4_RFTYPE_INTERSIL;
1031 1.4 dyoung method = "Intersil";
1032 1.4 dyoung break;
1033 1.4 dyoung case RTW_RFCHIPID_PHILIPS:
1034 1.4 dyoung cfg4 |= RTW_CONFIG4_RFTYPE_PHILIPS;
1035 1.4 dyoung method = "Philips";
1036 1.4 dyoung break;
1037 1.42 dyoung case RTW_RFCHIPID_GCT: /* XXX a guess */
1038 1.4 dyoung case RTW_RFCHIPID_RFMD:
1039 1.4 dyoung cfg4 |= RTW_CONFIG4_RFTYPE_RFMD;
1040 1.4 dyoung method = "RFMD";
1041 1.4 dyoung break;
1042 1.4 dyoung }
1043 1.4 dyoung
1044 1.4 dyoung RTW_WRITE8(regs, RTW_CONFIG4, cfg4);
1045 1.4 dyoung
1046 1.8 dyoung RTW_WBR(regs, RTW_CONFIG4, RTW_CONFIG4);
1047 1.8 dyoung
1048 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_INIT,
1049 1.98 dyoung ("%s: %s RF programming method, %#02x\n", device_xname(dev), method,
1050 1.10 dyoung RTW_READ8(regs, RTW_CONFIG4)));
1051 1.4 dyoung }
1052 1.4 dyoung
1053 1.61 perry static inline void
1054 1.1 dyoung rtw_init_channels(enum rtw_locale locale,
1055 1.98 dyoung struct ieee80211_channel (*chans)[IEEE80211_CHAN_MAX+1], device_t dev)
1056 1.1 dyoung {
1057 1.1 dyoung int i;
1058 1.1 dyoung const char *name = NULL;
1059 1.1 dyoung #define ADD_CHANNEL(_chans, _chan) do { \
1060 1.1 dyoung (*_chans)[_chan].ic_flags = IEEE80211_CHAN_B; \
1061 1.1 dyoung (*_chans)[_chan].ic_freq = \
1062 1.1 dyoung ieee80211_ieee2mhz(_chan, (*_chans)[_chan].ic_flags);\
1063 1.1 dyoung } while (0)
1064 1.1 dyoung
1065 1.1 dyoung switch (locale) {
1066 1.1 dyoung case RTW_LOCALE_USA: /* 1-11 */
1067 1.1 dyoung name = "USA";
1068 1.1 dyoung for (i = 1; i <= 11; i++)
1069 1.1 dyoung ADD_CHANNEL(chans, i);
1070 1.1 dyoung break;
1071 1.1 dyoung case RTW_LOCALE_JAPAN: /* 1-14 */
1072 1.1 dyoung name = "Japan";
1073 1.1 dyoung ADD_CHANNEL(chans, 14);
1074 1.1 dyoung for (i = 1; i <= 14; i++)
1075 1.1 dyoung ADD_CHANNEL(chans, i);
1076 1.1 dyoung break;
1077 1.1 dyoung case RTW_LOCALE_EUROPE: /* 1-13 */
1078 1.1 dyoung name = "Europe";
1079 1.1 dyoung for (i = 1; i <= 13; i++)
1080 1.1 dyoung ADD_CHANNEL(chans, i);
1081 1.1 dyoung break;
1082 1.1 dyoung default: /* 10-11 allowed by most countries */
1083 1.1 dyoung name = "<unknown>";
1084 1.1 dyoung for (i = 10; i <= 11; i++)
1085 1.1 dyoung ADD_CHANNEL(chans, i);
1086 1.1 dyoung break;
1087 1.1 dyoung }
1088 1.98 dyoung aprint_normal_dev(dev, "Geographic Location %s\n", name);
1089 1.1 dyoung #undef ADD_CHANNEL
1090 1.1 dyoung }
1091 1.1 dyoung
1092 1.58 dyoung
1093 1.61 perry static inline void
1094 1.58 dyoung rtw_identify_country(struct rtw_regs *regs, enum rtw_locale *locale)
1095 1.1 dyoung {
1096 1.37 dyoung uint8_t cfg0 = RTW_READ8(regs, RTW_CONFIG0);
1097 1.1 dyoung
1098 1.1 dyoung switch (cfg0 & RTW_CONFIG0_GL_MASK) {
1099 1.1 dyoung case RTW_CONFIG0_GL_USA:
1100 1.55 dogcow case _RTW_CONFIG0_GL_USA:
1101 1.1 dyoung *locale = RTW_LOCALE_USA;
1102 1.1 dyoung break;
1103 1.1 dyoung case RTW_CONFIG0_GL_JAPAN:
1104 1.1 dyoung *locale = RTW_LOCALE_JAPAN;
1105 1.1 dyoung break;
1106 1.1 dyoung case RTW_CONFIG0_GL_EUROPE:
1107 1.1 dyoung *locale = RTW_LOCALE_EUROPE;
1108 1.1 dyoung break;
1109 1.1 dyoung default:
1110 1.1 dyoung *locale = RTW_LOCALE_UNKNOWN;
1111 1.1 dyoung break;
1112 1.1 dyoung }
1113 1.1 dyoung }
1114 1.1 dyoung
1115 1.61 perry static inline int
1116 1.37 dyoung rtw_identify_sta(struct rtw_regs *regs, uint8_t (*addr)[IEEE80211_ADDR_LEN],
1117 1.98 dyoung device_t dev)
1118 1.1 dyoung {
1119 1.37 dyoung static const uint8_t empty_macaddr[IEEE80211_ADDR_LEN] = {
1120 1.1 dyoung 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
1121 1.1 dyoung };
1122 1.37 dyoung uint32_t idr0 = RTW_READ(regs, RTW_IDR0),
1123 1.1 dyoung idr1 = RTW_READ(regs, RTW_IDR1);
1124 1.1 dyoung
1125 1.75 dyoung (*addr)[0] = __SHIFTOUT(idr0, __BITS(0, 7));
1126 1.75 dyoung (*addr)[1] = __SHIFTOUT(idr0, __BITS(8, 15));
1127 1.75 dyoung (*addr)[2] = __SHIFTOUT(idr0, __BITS(16, 23));
1128 1.75 dyoung (*addr)[3] = __SHIFTOUT(idr0, __BITS(24 ,31));
1129 1.1 dyoung
1130 1.75 dyoung (*addr)[4] = __SHIFTOUT(idr1, __BITS(0, 7));
1131 1.75 dyoung (*addr)[5] = __SHIFTOUT(idr1, __BITS(8, 15));
1132 1.1 dyoung
1133 1.1 dyoung if (IEEE80211_ADDR_EQ(addr, empty_macaddr)) {
1134 1.98 dyoung aprint_error_dev(dev,
1135 1.98 dyoung "could not get mac address, attach failed\n");
1136 1.1 dyoung return ENXIO;
1137 1.1 dyoung }
1138 1.1 dyoung
1139 1.98 dyoung aprint_normal_dev(dev, "802.11 address %s\n", ether_sprintf(*addr));
1140 1.1 dyoung
1141 1.1 dyoung return 0;
1142 1.1 dyoung }
1143 1.1 dyoung
1144 1.37 dyoung static uint8_t
1145 1.1 dyoung rtw_chan2txpower(struct rtw_srom *sr, struct ieee80211com *ic,
1146 1.1 dyoung struct ieee80211_channel *chan)
1147 1.1 dyoung {
1148 1.1 dyoung u_int idx = RTW_SR_TXPOWER1 + ieee80211_chan2ieee(ic, chan) - 1;
1149 1.97 dyoung KASSERT(idx >= RTW_SR_TXPOWER1 && idx <= RTW_SR_TXPOWER14);
1150 1.1 dyoung return RTW_SR_GET(sr, idx);
1151 1.1 dyoung }
1152 1.1 dyoung
1153 1.1 dyoung static void
1154 1.34 dyoung rtw_txdesc_blk_init_all(struct rtw_txdesc_blk *tdb)
1155 1.1 dyoung {
1156 1.1 dyoung int pri;
1157 1.58 dyoung /* nfree: the number of free descriptors in each ring.
1158 1.58 dyoung * The beacon ring is a special case: I do not let the
1159 1.58 dyoung * driver use all of the descriptors on the beacon ring.
1160 1.58 dyoung * The reasons are two-fold:
1161 1.58 dyoung *
1162 1.58 dyoung * (1) A BEACON descriptor's OWN bit is (apparently) not
1163 1.58 dyoung * updated, so the driver cannot easily know if the descriptor
1164 1.58 dyoung * belongs to it, or if it is racing the NIC. If the NIC
1165 1.58 dyoung * does not OWN every descriptor, then the driver can safely
1166 1.58 dyoung * update the descriptors when RTW_TBDA points at tdb_next.
1167 1.58 dyoung *
1168 1.58 dyoung * (2) I hope that the NIC will process more than one BEACON
1169 1.58 dyoung * descriptor in a single beacon interval, since that will
1170 1.58 dyoung * enable multiple-BSS support. Since the NIC does not
1171 1.58 dyoung * clear the OWN bit, there is no natural place for it to
1172 1.58 dyoung * stop processing BEACON desciptors. Maybe it will *not*
1173 1.58 dyoung * stop processing them! I do not want to chance the NIC
1174 1.58 dyoung * looping around and around a saturated beacon ring, so
1175 1.58 dyoung * I will leave one descriptor unOWNed at all times.
1176 1.58 dyoung */
1177 1.58 dyoung u_int nfree[RTW_NTXPRI] =
1178 1.58 dyoung {RTW_NTXDESCLO, RTW_NTXDESCMD, RTW_NTXDESCHI,
1179 1.58 dyoung RTW_NTXDESCBCN - 1};
1180 1.1 dyoung
1181 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1182 1.58 dyoung tdb[pri].tdb_nfree = nfree[pri];
1183 1.34 dyoung tdb[pri].tdb_next = 0;
1184 1.1 dyoung }
1185 1.1 dyoung }
1186 1.1 dyoung
1187 1.1 dyoung static int
1188 1.34 dyoung rtw_txsoft_blk_init(struct rtw_txsoft_blk *tsb)
1189 1.1 dyoung {
1190 1.1 dyoung int i;
1191 1.34 dyoung struct rtw_txsoft *ts;
1192 1.1 dyoung
1193 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_dirtyq);
1194 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_freeq);
1195 1.34 dyoung for (i = 0; i < tsb->tsb_ndesc; i++) {
1196 1.34 dyoung ts = &tsb->tsb_desc[i];
1197 1.34 dyoung ts->ts_mbuf = NULL;
1198 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
1199 1.1 dyoung }
1200 1.58 dyoung tsb->tsb_tx_timer = 0;
1201 1.1 dyoung return 0;
1202 1.1 dyoung }
1203 1.1 dyoung
1204 1.1 dyoung static void
1205 1.34 dyoung rtw_txsoft_blk_init_all(struct rtw_txsoft_blk *tsb)
1206 1.1 dyoung {
1207 1.1 dyoung int pri;
1208 1.3 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++)
1209 1.34 dyoung rtw_txsoft_blk_init(&tsb[pri]);
1210 1.1 dyoung }
1211 1.1 dyoung
1212 1.61 perry static inline void
1213 1.34 dyoung rtw_rxdescs_sync(struct rtw_rxdesc_blk *rdb, int desc0, int nsync, int ops)
1214 1.1 dyoung {
1215 1.34 dyoung KASSERT(nsync <= rdb->rdb_ndesc);
1216 1.1 dyoung /* sync to end of ring */
1217 1.34 dyoung if (desc0 + nsync > rdb->rdb_ndesc) {
1218 1.34 dyoung bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
1219 1.1 dyoung offsetof(struct rtw_descs, hd_rx[desc0]),
1220 1.34 dyoung sizeof(struct rtw_rxdesc) * (rdb->rdb_ndesc - desc0), ops);
1221 1.34 dyoung nsync -= (rdb->rdb_ndesc - desc0);
1222 1.1 dyoung desc0 = 0;
1223 1.1 dyoung }
1224 1.1 dyoung
1225 1.34 dyoung KASSERT(desc0 < rdb->rdb_ndesc);
1226 1.34 dyoung KASSERT(nsync <= rdb->rdb_ndesc);
1227 1.34 dyoung KASSERT(desc0 + nsync <= rdb->rdb_ndesc);
1228 1.21 dyoung
1229 1.1 dyoung /* sync what remains */
1230 1.34 dyoung bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
1231 1.1 dyoung offsetof(struct rtw_descs, hd_rx[desc0]),
1232 1.1 dyoung sizeof(struct rtw_rxdesc) * nsync, ops);
1233 1.1 dyoung }
1234 1.1 dyoung
1235 1.1 dyoung static void
1236 1.34 dyoung rtw_txdescs_sync(struct rtw_txdesc_blk *tdb, u_int desc0, u_int nsync, int ops)
1237 1.1 dyoung {
1238 1.1 dyoung /* sync to end of ring */
1239 1.34 dyoung if (desc0 + nsync > tdb->tdb_ndesc) {
1240 1.34 dyoung bus_dmamap_sync(tdb->tdb_dmat, tdb->tdb_dmamap,
1241 1.34 dyoung tdb->tdb_ofs + sizeof(struct rtw_txdesc) * desc0,
1242 1.34 dyoung sizeof(struct rtw_txdesc) * (tdb->tdb_ndesc - desc0),
1243 1.1 dyoung ops);
1244 1.34 dyoung nsync -= (tdb->tdb_ndesc - desc0);
1245 1.1 dyoung desc0 = 0;
1246 1.1 dyoung }
1247 1.1 dyoung
1248 1.1 dyoung /* sync what remains */
1249 1.34 dyoung bus_dmamap_sync(tdb->tdb_dmat, tdb->tdb_dmamap,
1250 1.34 dyoung tdb->tdb_ofs + sizeof(struct rtw_txdesc) * desc0,
1251 1.1 dyoung sizeof(struct rtw_txdesc) * nsync, ops);
1252 1.1 dyoung }
1253 1.1 dyoung
1254 1.1 dyoung static void
1255 1.34 dyoung rtw_txdescs_sync_all(struct rtw_txdesc_blk *tdb)
1256 1.1 dyoung {
1257 1.1 dyoung int pri;
1258 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1259 1.34 dyoung rtw_txdescs_sync(&tdb[pri], 0, tdb[pri].tdb_ndesc,
1260 1.1 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1261 1.1 dyoung }
1262 1.1 dyoung }
1263 1.1 dyoung
1264 1.1 dyoung static void
1265 1.34 dyoung rtw_rxbufs_release(bus_dma_tag_t dmat, struct rtw_rxsoft *desc)
1266 1.1 dyoung {
1267 1.1 dyoung int i;
1268 1.34 dyoung struct rtw_rxsoft *rs;
1269 1.1 dyoung
1270 1.21 dyoung for (i = 0; i < RTW_RXQLEN; i++) {
1271 1.34 dyoung rs = &desc[i];
1272 1.34 dyoung if (rs->rs_mbuf == NULL)
1273 1.31 dyoung continue;
1274 1.34 dyoung bus_dmamap_sync(dmat, rs->rs_dmamap, 0,
1275 1.34 dyoung rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1276 1.34 dyoung bus_dmamap_unload(dmat, rs->rs_dmamap);
1277 1.34 dyoung m_freem(rs->rs_mbuf);
1278 1.34 dyoung rs->rs_mbuf = NULL;
1279 1.1 dyoung }
1280 1.1 dyoung }
1281 1.1 dyoung
1282 1.61 perry static inline int
1283 1.34 dyoung rtw_rxsoft_alloc(bus_dma_tag_t dmat, struct rtw_rxsoft *rs)
1284 1.1 dyoung {
1285 1.1 dyoung int rc;
1286 1.1 dyoung struct mbuf *m;
1287 1.1 dyoung
1288 1.44 perry MGETHDR(m, M_DONTWAIT, MT_DATA);
1289 1.1 dyoung if (m == NULL)
1290 1.18 dyoung return ENOBUFS;
1291 1.1 dyoung
1292 1.44 perry MCLGET(m, M_DONTWAIT);
1293 1.31 dyoung if ((m->m_flags & M_EXT) == 0) {
1294 1.31 dyoung m_freem(m);
1295 1.18 dyoung return ENOBUFS;
1296 1.31 dyoung }
1297 1.1 dyoung
1298 1.1 dyoung m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
1299 1.1 dyoung
1300 1.34 dyoung if (rs->rs_mbuf != NULL)
1301 1.34 dyoung bus_dmamap_unload(dmat, rs->rs_dmamap);
1302 1.18 dyoung
1303 1.34 dyoung rs->rs_mbuf = NULL;
1304 1.18 dyoung
1305 1.34 dyoung rc = bus_dmamap_load_mbuf(dmat, rs->rs_dmamap, m, BUS_DMA_NOWAIT);
1306 1.18 dyoung if (rc != 0) {
1307 1.18 dyoung m_freem(m);
1308 1.18 dyoung return -1;
1309 1.18 dyoung }
1310 1.1 dyoung
1311 1.34 dyoung rs->rs_mbuf = m;
1312 1.1 dyoung
1313 1.1 dyoung return 0;
1314 1.1 dyoung }
1315 1.1 dyoung
1316 1.1 dyoung static int
1317 1.34 dyoung rtw_rxsoft_init_all(bus_dma_tag_t dmat, struct rtw_rxsoft *desc,
1318 1.98 dyoung int *ndesc, device_t dev)
1319 1.1 dyoung {
1320 1.31 dyoung int i, rc = 0;
1321 1.34 dyoung struct rtw_rxsoft *rs;
1322 1.1 dyoung
1323 1.21 dyoung for (i = 0; i < RTW_RXQLEN; i++) {
1324 1.34 dyoung rs = &desc[i];
1325 1.31 dyoung /* we're in rtw_init, so there should be no mbufs allocated */
1326 1.34 dyoung KASSERT(rs->rs_mbuf == NULL);
1327 1.31 dyoung #ifdef RTW_DEBUG
1328 1.31 dyoung if (i == rtw_rxbufs_limit) {
1329 1.98 dyoung aprint_error_dev(dev, "TEST hit %d-buffer limit\n", i);
1330 1.31 dyoung rc = ENOBUFS;
1331 1.31 dyoung break;
1332 1.31 dyoung }
1333 1.31 dyoung #endif /* RTW_DEBUG */
1334 1.34 dyoung if ((rc = rtw_rxsoft_alloc(dmat, rs)) != 0) {
1335 1.98 dyoung aprint_error_dev(dev,
1336 1.98 dyoung "rtw_rxsoft_alloc failed, %d buffers, rc %d\n",
1337 1.98 dyoung i, rc);
1338 1.31 dyoung break;
1339 1.1 dyoung }
1340 1.1 dyoung }
1341 1.31 dyoung *ndesc = i;
1342 1.31 dyoung return rc;
1343 1.1 dyoung }
1344 1.1 dyoung
1345 1.61 perry static inline void
1346 1.34 dyoung rtw_rxdesc_init(struct rtw_rxdesc_blk *rdb, struct rtw_rxsoft *rs,
1347 1.81 christos int idx, int kick)
1348 1.1 dyoung {
1349 1.34 dyoung int is_last = (idx == rdb->rdb_ndesc - 1);
1350 1.21 dyoung uint32_t ctl, octl, obuf;
1351 1.34 dyoung struct rtw_rxdesc *rd = &rdb->rdb_desc[idx];
1352 1.1 dyoung
1353 1.92 dyoung /* sync the mbuf before the descriptor */
1354 1.92 dyoung bus_dmamap_sync(rdb->rdb_dmat, rs->rs_dmamap, 0,
1355 1.92 dyoung rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1356 1.92 dyoung
1357 1.34 dyoung obuf = rd->rd_buf;
1358 1.34 dyoung rd->rd_buf = htole32(rs->rs_dmamap->dm_segs[0].ds_addr);
1359 1.1 dyoung
1360 1.75 dyoung ctl = __SHIFTIN(rs->rs_mbuf->m_len, RTW_RXCTL_LENGTH_MASK) |
1361 1.1 dyoung RTW_RXCTL_OWN | RTW_RXCTL_FS | RTW_RXCTL_LS;
1362 1.1 dyoung
1363 1.1 dyoung if (is_last)
1364 1.1 dyoung ctl |= RTW_RXCTL_EOR;
1365 1.1 dyoung
1366 1.34 dyoung octl = rd->rd_ctl;
1367 1.34 dyoung rd->rd_ctl = htole32(ctl);
1368 1.1 dyoung
1369 1.24 dyoung RTW_DPRINTF(
1370 1.24 dyoung kick ? (RTW_DEBUG_RECV_DESC | RTW_DEBUG_IO_KICK)
1371 1.24 dyoung : RTW_DEBUG_RECV_DESC,
1372 1.34 dyoung ("%s: rd %p buf %08x -> %08x ctl %08x -> %08x\n", __func__, rd,
1373 1.34 dyoung le32toh(obuf), le32toh(rd->rd_buf), le32toh(octl),
1374 1.34 dyoung le32toh(rd->rd_ctl)));
1375 1.21 dyoung
1376 1.1 dyoung /* sync the descriptor */
1377 1.34 dyoung bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
1378 1.33 dyoung RTW_DESC_OFFSET(hd_rx, idx), sizeof(struct rtw_rxdesc),
1379 1.1 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1380 1.1 dyoung }
1381 1.1 dyoung
1382 1.1 dyoung static void
1383 1.34 dyoung rtw_rxdesc_init_all(struct rtw_rxdesc_blk *rdb, struct rtw_rxsoft *ctl, int kick)
1384 1.1 dyoung {
1385 1.1 dyoung int i;
1386 1.34 dyoung struct rtw_rxdesc *rd;
1387 1.34 dyoung struct rtw_rxsoft *rs;
1388 1.1 dyoung
1389 1.34 dyoung for (i = 0; i < rdb->rdb_ndesc; i++) {
1390 1.34 dyoung rd = &rdb->rdb_desc[i];
1391 1.34 dyoung rs = &ctl[i];
1392 1.34 dyoung rtw_rxdesc_init(rdb, rs, i, kick);
1393 1.1 dyoung }
1394 1.1 dyoung }
1395 1.1 dyoung
1396 1.1 dyoung static void
1397 1.83 dyoung rtw_io_enable(struct rtw_softc *sc, uint8_t flags, int enable)
1398 1.1 dyoung {
1399 1.83 dyoung struct rtw_regs *regs = &sc->sc_regs;
1400 1.37 dyoung uint8_t cr;
1401 1.1 dyoung
1402 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_IOSTATE, ("%s: %s 0x%02x\n", __func__,
1403 1.1 dyoung enable ? "enable" : "disable", flags));
1404 1.1 dyoung
1405 1.1 dyoung cr = RTW_READ8(regs, RTW_CR);
1406 1.1 dyoung
1407 1.1 dyoung /* XXX reference source does not enable MULRW */
1408 1.1 dyoung /* enable PCI Read/Write Multiple */
1409 1.1 dyoung cr |= RTW_CR_MULRW;
1410 1.83 dyoung
1411 1.83 dyoung /* The receive engine will always start at RDSAR. */
1412 1.83 dyoung if (enable && (flags & ~cr & RTW_CR_RE)) {
1413 1.83 dyoung struct rtw_rxdesc_blk *rdb;
1414 1.83 dyoung rdb = &sc->sc_rxdesc_blk;
1415 1.83 dyoung rdb->rdb_next = 0;
1416 1.83 dyoung }
1417 1.1 dyoung
1418 1.1 dyoung RTW_RBW(regs, RTW_CR, RTW_CR); /* XXX paranoia? */
1419 1.1 dyoung if (enable)
1420 1.1 dyoung cr |= flags;
1421 1.1 dyoung else
1422 1.1 dyoung cr &= ~flags;
1423 1.1 dyoung RTW_WRITE8(regs, RTW_CR, cr);
1424 1.1 dyoung RTW_SYNC(regs, RTW_CR, RTW_CR);
1425 1.83 dyoung
1426 1.83 dyoung #ifdef RTW_DIAG
1427 1.83 dyoung if (cr & RTW_CR_TE)
1428 1.83 dyoung rtw_txring_fixup(sc, __func__, __LINE__);
1429 1.83 dyoung #endif
1430 1.1 dyoung }
1431 1.1 dyoung
1432 1.1 dyoung static void
1433 1.81 christos rtw_intr_rx(struct rtw_softc *sc, uint16_t isr)
1434 1.1 dyoung {
1435 1.42 dyoung #define IS_BEACON(__fc0) \
1436 1.42 dyoung ((__fc0 & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==\
1437 1.42 dyoung (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_BEACON))
1438 1.42 dyoung
1439 1.30 dyoung static const int ratetbl[4] = {2, 4, 11, 22}; /* convert rates:
1440 1.30 dyoung * hardware -> net80211
1441 1.30 dyoung */
1442 1.21 dyoung u_int next, nproc = 0;
1443 1.32 dyoung int hwrate, len, rate, rssi, sq;
1444 1.37 dyoung uint32_t hrssi, hstat, htsfth, htsftl;
1445 1.34 dyoung struct rtw_rxdesc *rd;
1446 1.34 dyoung struct rtw_rxsoft *rs;
1447 1.34 dyoung struct rtw_rxdesc_blk *rdb;
1448 1.1 dyoung struct mbuf *m;
1449 1.48 dyoung struct ifnet *ifp = &sc->sc_if;
1450 1.1 dyoung
1451 1.1 dyoung struct ieee80211_node *ni;
1452 1.48 dyoung struct ieee80211_frame_min *wh;
1453 1.1 dyoung
1454 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1455 1.21 dyoung
1456 1.83 dyoung for (next = rdb->rdb_next; ; next = rdb->rdb_next) {
1457 1.83 dyoung KASSERT(next < rdb->rdb_ndesc);
1458 1.93 dyoung
1459 1.34 dyoung rtw_rxdescs_sync(rdb, next, 1,
1460 1.31 dyoung BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1461 1.34 dyoung rd = &rdb->rdb_desc[next];
1462 1.34 dyoung rs = &sc->sc_rxsoft[next];
1463 1.1 dyoung
1464 1.34 dyoung hstat = le32toh(rd->rd_stat);
1465 1.34 dyoung hrssi = le32toh(rd->rd_rssi);
1466 1.34 dyoung htsfth = le32toh(rd->rd_tsfth);
1467 1.34 dyoung htsftl = le32toh(rd->rd_tsftl);
1468 1.1 dyoung
1469 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
1470 1.21 dyoung ("%s: rxdesc[%d] hstat %08x hrssi %08x htsft %08x%08x\n",
1471 1.21 dyoung __func__, next, hstat, hrssi, htsfth, htsftl));
1472 1.21 dyoung
1473 1.21 dyoung ++nproc;
1474 1.21 dyoung
1475 1.21 dyoung /* still belongs to NIC */
1476 1.21 dyoung if ((hstat & RTW_RXSTAT_OWN) != 0) {
1477 1.82 dyoung rtw_rxdescs_sync(rdb, next, 1, BUS_DMASYNC_PREREAD);
1478 1.83 dyoung break;
1479 1.83 dyoung }
1480 1.1 dyoung
1481 1.83 dyoung /* ieee80211_input() might reset the receive engine
1482 1.83 dyoung * (e.g. by indirectly calling rtw_tune()), so save
1483 1.83 dyoung * the next pointer here and retrieve it again on
1484 1.83 dyoung * the next round.
1485 1.83 dyoung */
1486 1.83 dyoung rdb->rdb_next = (next + 1) % rdb->rdb_ndesc;
1487 1.1 dyoung
1488 1.45 dyoung #ifdef RTW_DEBUG
1489 1.45 dyoung #define PRINTSTAT(flag) do { \
1490 1.45 dyoung if ((hstat & flag) != 0) { \
1491 1.45 dyoung printf("%s" #flag, delim); \
1492 1.45 dyoung delim = ","; \
1493 1.45 dyoung } \
1494 1.45 dyoung } while (0)
1495 1.45 dyoung if ((rtw_debug & RTW_DEBUG_RECV_DESC) != 0) {
1496 1.45 dyoung const char *delim = "<";
1497 1.98 dyoung printf("%s: ", device_xname(sc->sc_dev));
1498 1.45 dyoung if ((hstat & RTW_RXSTAT_DEBUG) != 0) {
1499 1.45 dyoung printf("status %08x", hstat);
1500 1.45 dyoung PRINTSTAT(RTW_RXSTAT_SPLCP);
1501 1.45 dyoung PRINTSTAT(RTW_RXSTAT_MAR);
1502 1.45 dyoung PRINTSTAT(RTW_RXSTAT_PAR);
1503 1.45 dyoung PRINTSTAT(RTW_RXSTAT_BAR);
1504 1.45 dyoung PRINTSTAT(RTW_RXSTAT_PWRMGT);
1505 1.45 dyoung PRINTSTAT(RTW_RXSTAT_CRC32);
1506 1.45 dyoung PRINTSTAT(RTW_RXSTAT_ICV);
1507 1.45 dyoung printf(">, ");
1508 1.45 dyoung }
1509 1.45 dyoung }
1510 1.45 dyoung #endif /* RTW_DEBUG */
1511 1.45 dyoung
1512 1.1 dyoung if ((hstat & RTW_RXSTAT_IOERROR) != 0) {
1513 1.98 dyoung aprint_error_dev(sc->sc_dev,
1514 1.98 dyoung "DMA error/FIFO overflow %08" PRIx32 ", "
1515 1.98 dyoung "rx descriptor %d\n", hstat, next);
1516 1.48 dyoung ifp->if_ierrors++;
1517 1.1 dyoung goto next;
1518 1.1 dyoung }
1519 1.1 dyoung
1520 1.75 dyoung len = __SHIFTOUT(hstat, RTW_RXSTAT_LENGTH_MASK);
1521 1.22 dyoung if (len < IEEE80211_MIN_LEN) {
1522 1.22 dyoung sc->sc_ic.ic_stats.is_rx_tooshort++;
1523 1.22 dyoung goto next;
1524 1.22 dyoung }
1525 1.98 dyoung if (len > rs->rs_mbuf->m_len) {
1526 1.101 dyoung aprint_error_dev(sc->sc_dev,
1527 1.101 dyoung "rx frame too long, %d > %d, %08" PRIx32
1528 1.101 dyoung ", desc %d\n",
1529 1.101 dyoung len, rs->rs_mbuf->m_len, hstat, next);
1530 1.98 dyoung ifp->if_ierrors++;
1531 1.98 dyoung goto next;
1532 1.98 dyoung }
1533 1.43 thorpej
1534 1.75 dyoung hwrate = __SHIFTOUT(hstat, RTW_RXSTAT_RATE_MASK);
1535 1.87 dyoung if (hwrate >= __arraycount(ratetbl)) {
1536 1.98 dyoung aprint_error_dev(sc->sc_dev,
1537 1.98 dyoung "unknown rate #%" __PRIuBITS "\n",
1538 1.75 dyoung __SHIFTOUT(hstat, RTW_RXSTAT_RATE_MASK));
1539 1.48 dyoung ifp->if_ierrors++;
1540 1.22 dyoung goto next;
1541 1.1 dyoung }
1542 1.30 dyoung rate = ratetbl[hwrate];
1543 1.1 dyoung
1544 1.1 dyoung #ifdef RTW_DEBUG
1545 1.45 dyoung RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
1546 1.45 dyoung ("rate %d.%d Mb/s, time %08x%08x\n", (rate * 5) / 10,
1547 1.45 dyoung (rate * 5) % 10, htsfth, htsftl));
1548 1.1 dyoung #endif /* RTW_DEBUG */
1549 1.1 dyoung
1550 1.1 dyoung /* if bad flags, skip descriptor */
1551 1.1 dyoung if ((hstat & RTW_RXSTAT_ONESEG) != RTW_RXSTAT_ONESEG) {
1552 1.98 dyoung aprint_error_dev(sc->sc_dev, "too many rx segments, "
1553 1.98 dyoung "next=%d, %08" PRIx32 "\n", next, hstat);
1554 1.1 dyoung goto next;
1555 1.1 dyoung }
1556 1.1 dyoung
1557 1.34 dyoung bus_dmamap_sync(sc->sc_dmat, rs->rs_dmamap, 0,
1558 1.34 dyoung rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1559 1.18 dyoung
1560 1.34 dyoung m = rs->rs_mbuf;
1561 1.1 dyoung
1562 1.1 dyoung /* if temporarily out of memory, re-use mbuf */
1563 1.34 dyoung switch (rtw_rxsoft_alloc(sc->sc_dmat, rs)) {
1564 1.18 dyoung case 0:
1565 1.18 dyoung break;
1566 1.18 dyoung case ENOBUFS:
1567 1.98 dyoung aprint_error_dev(sc->sc_dev,
1568 1.98 dyoung "rtw_rxsoft_alloc(, %d) failed, dropping packet\n",
1569 1.98 dyoung next);
1570 1.1 dyoung goto next;
1571 1.18 dyoung default:
1572 1.18 dyoung /* XXX shorten rx ring, instead? */
1573 1.98 dyoung aprint_error_dev(sc->sc_dev,
1574 1.98 dyoung "could not load DMA map\n");
1575 1.1 dyoung }
1576 1.1 dyoung
1577 1.93 dyoung sq = __SHIFTOUT(hrssi, RTW_RXRSSI_SQ);
1578 1.93 dyoung
1579 1.1 dyoung if (sc->sc_rfchipid == RTW_RFCHIPID_PHILIPS)
1580 1.93 dyoung rssi = UINT8_MAX - sq;
1581 1.1 dyoung else {
1582 1.75 dyoung rssi = __SHIFTOUT(hrssi, RTW_RXRSSI_IMR_RSSI);
1583 1.1 dyoung /* TBD find out each front-end's LNA gain in the
1584 1.1 dyoung * front-end's units
1585 1.1 dyoung */
1586 1.1 dyoung if ((hrssi & RTW_RXRSSI_IMR_LNA) == 0)
1587 1.1 dyoung rssi |= 0x80;
1588 1.1 dyoung }
1589 1.1 dyoung
1590 1.34 dyoung /* Note well: now we cannot recycle the rs_mbuf unless
1591 1.32 dyoung * we restore its original length.
1592 1.32 dyoung */
1593 1.48 dyoung m->m_pkthdr.rcvif = ifp;
1594 1.22 dyoung m->m_pkthdr.len = m->m_len = len;
1595 1.1 dyoung
1596 1.48 dyoung wh = mtod(m, struct ieee80211_frame_min *);
1597 1.42 dyoung
1598 1.42 dyoung if (!IS_BEACON(wh->i_fc[0]))
1599 1.42 dyoung sc->sc_led_state.ls_event |= RTW_LED_S_RX;
1600 1.1 dyoung
1601 1.1 dyoung sc->sc_tsfth = htsfth;
1602 1.1 dyoung
1603 1.10 dyoung #ifdef RTW_DEBUG
1604 1.48 dyoung if ((ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) ==
1605 1.10 dyoung (IFF_DEBUG|IFF_LINK2)) {
1606 1.10 dyoung ieee80211_dump_pkt(mtod(m, uint8_t *), m->m_pkthdr.len,
1607 1.10 dyoung rate, rssi);
1608 1.10 dyoung }
1609 1.10 dyoung #endif /* RTW_DEBUG */
1610 1.32 dyoung
1611 1.32 dyoung #if NBPFILTER > 0
1612 1.32 dyoung if (sc->sc_radiobpf != NULL) {
1613 1.32 dyoung struct rtw_rx_radiotap_header *rr = &sc->sc_rxtap;
1614 1.32 dyoung
1615 1.32 dyoung rr->rr_tsft =
1616 1.32 dyoung htole64(((uint64_t)htsfth << 32) | htsftl);
1617 1.32 dyoung
1618 1.93 dyoung rr->rr_flags = IEEE80211_RADIOTAP_F_FCS;
1619 1.93 dyoung
1620 1.32 dyoung if ((hstat & RTW_RXSTAT_SPLCP) != 0)
1621 1.93 dyoung rr->rr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1622 1.93 dyoung if ((hstat & RTW_RXSTAT_CRC32) != 0)
1623 1.93 dyoung rr->rr_flags |= IEEE80211_RADIOTAP_F_BADFCS;
1624 1.32 dyoung
1625 1.32 dyoung rr->rr_rate = rate;
1626 1.32 dyoung
1627 1.93 dyoung if (sc->sc_rfchipid == RTW_RFCHIPID_PHILIPS)
1628 1.93 dyoung rr->rr_u.u_philips.p_antsignal = rssi;
1629 1.93 dyoung else {
1630 1.93 dyoung rr->rr_u.u_other.o_antsignal = rssi;
1631 1.93 dyoung rr->rr_u.u_other.o_barker_lock =
1632 1.93 dyoung htole16(UINT8_MAX - sq);
1633 1.93 dyoung }
1634 1.93 dyoung
1635 1.93 dyoung bpf_mtap2(sc->sc_radiobpf, rr,
1636 1.32 dyoung sizeof(sc->sc_rxtapu), m);
1637 1.32 dyoung }
1638 1.90 scw #endif /* NBPFILTER > 0 */
1639 1.32 dyoung
1640 1.93 dyoung if ((hstat & RTW_RXSTAT_RES) != 0) {
1641 1.93 dyoung m_freem(m);
1642 1.93 dyoung goto next;
1643 1.93 dyoung }
1644 1.93 dyoung
1645 1.93 dyoung /* CRC is included with the packet; trim it off. */
1646 1.93 dyoung m_adj(m, -IEEE80211_CRC_LEN);
1647 1.93 dyoung
1648 1.93 dyoung /* TBD use _MAR, _BAR, _PAR flags as hints to _find_rxnode? */
1649 1.93 dyoung ni = ieee80211_find_rxnode(&sc->sc_ic, wh);
1650 1.48 dyoung ieee80211_input(&sc->sc_ic, m, ni, rssi, htsftl);
1651 1.48 dyoung ieee80211_free_node(ni);
1652 1.1 dyoung next:
1653 1.34 dyoung rtw_rxdesc_init(rdb, rs, next, 0);
1654 1.1 dyoung }
1655 1.42 dyoung #undef IS_BEACON
1656 1.1 dyoung }
1657 1.1 dyoung
1658 1.1 dyoung static void
1659 1.81 christos rtw_txsoft_release(bus_dma_tag_t dmat, struct ieee80211com *ic,
1660 1.34 dyoung struct rtw_txsoft *ts)
1661 1.5 dyoung {
1662 1.5 dyoung struct mbuf *m;
1663 1.5 dyoung struct ieee80211_node *ni;
1664 1.5 dyoung
1665 1.34 dyoung m = ts->ts_mbuf;
1666 1.34 dyoung ni = ts->ts_ni;
1667 1.21 dyoung KASSERT(m != NULL);
1668 1.21 dyoung KASSERT(ni != NULL);
1669 1.34 dyoung ts->ts_mbuf = NULL;
1670 1.34 dyoung ts->ts_ni = NULL;
1671 1.5 dyoung
1672 1.34 dyoung bus_dmamap_sync(dmat, ts->ts_dmamap, 0, ts->ts_dmamap->dm_mapsize,
1673 1.5 dyoung BUS_DMASYNC_POSTWRITE);
1674 1.34 dyoung bus_dmamap_unload(dmat, ts->ts_dmamap);
1675 1.5 dyoung m_freem(m);
1676 1.48 dyoung ieee80211_free_node(ni);
1677 1.5 dyoung }
1678 1.5 dyoung
1679 1.5 dyoung static void
1680 1.34 dyoung rtw_txsofts_release(bus_dma_tag_t dmat, struct ieee80211com *ic,
1681 1.34 dyoung struct rtw_txsoft_blk *tsb)
1682 1.5 dyoung {
1683 1.34 dyoung struct rtw_txsoft *ts;
1684 1.5 dyoung
1685 1.34 dyoung while ((ts = SIMPLEQ_FIRST(&tsb->tsb_dirtyq)) != NULL) {
1686 1.34 dyoung rtw_txsoft_release(dmat, ic, ts);
1687 1.34 dyoung SIMPLEQ_REMOVE_HEAD(&tsb->tsb_dirtyq, ts_q);
1688 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
1689 1.5 dyoung }
1690 1.58 dyoung tsb->tsb_tx_timer = 0;
1691 1.5 dyoung }
1692 1.5 dyoung
1693 1.61 perry static inline void
1694 1.34 dyoung rtw_collect_txpkt(struct rtw_softc *sc, struct rtw_txdesc_blk *tdb,
1695 1.34 dyoung struct rtw_txsoft *ts, int ndesc)
1696 1.5 dyoung {
1697 1.11 dyoung uint32_t hstat;
1698 1.5 dyoung int data_retry, rts_retry;
1699 1.34 dyoung struct rtw_txdesc *tdn;
1700 1.5 dyoung const char *condstring;
1701 1.48 dyoung struct ifnet *ifp = &sc->sc_if;
1702 1.5 dyoung
1703 1.34 dyoung rtw_txsoft_release(sc->sc_dmat, &sc->sc_ic, ts);
1704 1.5 dyoung
1705 1.34 dyoung tdb->tdb_nfree += ndesc;
1706 1.5 dyoung
1707 1.34 dyoung tdn = &tdb->tdb_desc[ts->ts_last];
1708 1.5 dyoung
1709 1.34 dyoung hstat = le32toh(tdn->td_stat);
1710 1.75 dyoung rts_retry = __SHIFTOUT(hstat, RTW_TXSTAT_RTSRETRY_MASK);
1711 1.75 dyoung data_retry = __SHIFTOUT(hstat, RTW_TXSTAT_DRC_MASK);
1712 1.5 dyoung
1713 1.48 dyoung ifp->if_collisions += rts_retry + data_retry;
1714 1.5 dyoung
1715 1.11 dyoung if ((hstat & RTW_TXSTAT_TOK) != 0)
1716 1.5 dyoung condstring = "ok";
1717 1.5 dyoung else {
1718 1.48 dyoung ifp->if_oerrors++;
1719 1.5 dyoung condstring = "error";
1720 1.5 dyoung }
1721 1.5 dyoung
1722 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
1723 1.34 dyoung ("%s: ts %p txdesc[%d, %d] %s tries rts %u data %u\n",
1724 1.98 dyoung device_xname(sc->sc_dev), ts, ts->ts_first, ts->ts_last,
1725 1.5 dyoung condstring, rts_retry, data_retry));
1726 1.5 dyoung }
1727 1.5 dyoung
1728 1.58 dyoung static void
1729 1.58 dyoung rtw_reset_oactive(struct rtw_softc *sc)
1730 1.58 dyoung {
1731 1.58 dyoung short oflags;
1732 1.58 dyoung int pri;
1733 1.58 dyoung struct rtw_txsoft_blk *tsb;
1734 1.58 dyoung struct rtw_txdesc_blk *tdb;
1735 1.58 dyoung oflags = sc->sc_if.if_flags;
1736 1.58 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1737 1.58 dyoung tsb = &sc->sc_txsoft_blk[pri];
1738 1.58 dyoung tdb = &sc->sc_txdesc_blk[pri];
1739 1.58 dyoung if (!SIMPLEQ_EMPTY(&tsb->tsb_freeq) && tdb->tdb_nfree > 0)
1740 1.58 dyoung sc->sc_if.if_flags &= ~IFF_OACTIVE;
1741 1.58 dyoung }
1742 1.58 dyoung if (oflags != sc->sc_if.if_flags) {
1743 1.58 dyoung DPRINTF(sc, RTW_DEBUG_OACTIVE,
1744 1.58 dyoung ("%s: reset OACTIVE\n", __func__));
1745 1.58 dyoung }
1746 1.58 dyoung }
1747 1.58 dyoung
1748 1.5 dyoung /* Collect transmitted packets. */
1749 1.92 dyoung static void
1750 1.34 dyoung rtw_collect_txring(struct rtw_softc *sc, struct rtw_txsoft_blk *tsb,
1751 1.58 dyoung struct rtw_txdesc_blk *tdb, int force)
1752 1.5 dyoung {
1753 1.5 dyoung int ndesc;
1754 1.34 dyoung struct rtw_txsoft *ts;
1755 1.5 dyoung
1756 1.83 dyoung #ifdef RTW_DEBUG
1757 1.83 dyoung rtw_dump_rings(sc);
1758 1.83 dyoung #endif
1759 1.83 dyoung
1760 1.34 dyoung while ((ts = SIMPLEQ_FIRST(&tsb->tsb_dirtyq)) != NULL) {
1761 1.83 dyoung /* If we're clearing a failed transmission, only clear
1762 1.83 dyoung up to the last packet the hardware has processed. */
1763 1.83 dyoung if (ts->ts_first == rtw_txring_next(&sc->sc_regs, tdb))
1764 1.83 dyoung break;
1765 1.83 dyoung
1766 1.34 dyoung ndesc = 1 + ts->ts_last - ts->ts_first;
1767 1.34 dyoung if (ts->ts_last < ts->ts_first)
1768 1.34 dyoung ndesc += tdb->tdb_ndesc;
1769 1.5 dyoung
1770 1.6 dyoung KASSERT(ndesc > 0);
1771 1.6 dyoung
1772 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, ndesc,
1773 1.5 dyoung BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1774 1.5 dyoung
1775 1.58 dyoung if (force) {
1776 1.83 dyoung int next;
1777 1.83 dyoung #ifdef RTW_DIAG
1778 1.83 dyoung printf("%s: clearing packet, stats", __func__);
1779 1.83 dyoung #endif
1780 1.83 dyoung for (next = ts->ts_first; ;
1781 1.83 dyoung next = RTW_NEXT_IDX(tdb, next)) {
1782 1.83 dyoung #ifdef RTW_DIAG
1783 1.83 dyoung printf(" %" PRIx32 "/%" PRIx32 "/%" PRIx32 "/%" PRIu32 "/%" PRIx32, le32toh(tdb->tdb_desc[next].td_stat), le32toh(tdb->tdb_desc[next].td_ctl1), le32toh(tdb->tdb_desc[next].td_buf), le32toh(tdb->tdb_desc[next].td_len), le32toh(tdb->tdb_desc[next].td_next));
1784 1.83 dyoung #endif
1785 1.83 dyoung tdb->tdb_desc[next].td_stat &=
1786 1.58 dyoung ~htole32(RTW_TXSTAT_OWN);
1787 1.83 dyoung if (next == ts->ts_last)
1788 1.58 dyoung break;
1789 1.58 dyoung }
1790 1.58 dyoung rtw_txdescs_sync(tdb, ts->ts_first, ndesc,
1791 1.58 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1792 1.83 dyoung #ifdef RTW_DIAG
1793 1.83 dyoung next = RTW_NEXT_IDX(tdb, next);
1794 1.83 dyoung printf(" -> end %u stat %" PRIx32 ", was %u\n", next,
1795 1.83 dyoung le32toh(tdb->tdb_desc[next].td_stat),
1796 1.83 dyoung rtw_txring_next(&sc->sc_regs, tdb));
1797 1.83 dyoung #endif
1798 1.58 dyoung } else if ((tdb->tdb_desc[ts->ts_last].td_stat &
1799 1.82 dyoung htole32(RTW_TXSTAT_OWN)) != 0) {
1800 1.82 dyoung rtw_txdescs_sync(tdb, ts->ts_last, 1,
1801 1.82 dyoung BUS_DMASYNC_PREREAD);
1802 1.5 dyoung break;
1803 1.82 dyoung }
1804 1.5 dyoung
1805 1.34 dyoung rtw_collect_txpkt(sc, tdb, ts, ndesc);
1806 1.34 dyoung SIMPLEQ_REMOVE_HEAD(&tsb->tsb_dirtyq, ts_q);
1807 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
1808 1.5 dyoung }
1809 1.83 dyoung
1810 1.74 blymn /* no more pending transmissions, cancel watchdog */
1811 1.34 dyoung if (ts == NULL)
1812 1.34 dyoung tsb->tsb_tx_timer = 0;
1813 1.58 dyoung rtw_reset_oactive(sc);
1814 1.5 dyoung }
1815 1.5 dyoung
1816 1.5 dyoung static void
1817 1.37 dyoung rtw_intr_tx(struct rtw_softc *sc, uint16_t isr)
1818 1.1 dyoung {
1819 1.5 dyoung int pri;
1820 1.34 dyoung struct rtw_txsoft_blk *tsb;
1821 1.34 dyoung struct rtw_txdesc_blk *tdb;
1822 1.48 dyoung struct ifnet *ifp = &sc->sc_if;
1823 1.5 dyoung
1824 1.5 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1825 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
1826 1.34 dyoung tdb = &sc->sc_txdesc_blk[pri];
1827 1.58 dyoung rtw_collect_txring(sc, tsb, tdb, 0);
1828 1.58 dyoung }
1829 1.5 dyoung
1830 1.58 dyoung if ((isr & RTW_INTR_TX) != 0)
1831 1.58 dyoung rtw_start(ifp);
1832 1.5 dyoung
1833 1.1 dyoung return;
1834 1.1 dyoung }
1835 1.1 dyoung
1836 1.1 dyoung static void
1837 1.37 dyoung rtw_intr_beacon(struct rtw_softc *sc, uint16_t isr)
1838 1.1 dyoung {
1839 1.58 dyoung u_int next;
1840 1.58 dyoung uint32_t tsfth, tsftl;
1841 1.58 dyoung struct ieee80211com *ic;
1842 1.58 dyoung struct rtw_txdesc_blk *tdb = &sc->sc_txdesc_blk[RTW_TXPRIBCN];
1843 1.58 dyoung struct rtw_txsoft_blk *tsb = &sc->sc_txsoft_blk[RTW_TXPRIBCN];
1844 1.58 dyoung struct mbuf *m;
1845 1.58 dyoung
1846 1.58 dyoung tsfth = RTW_READ(&sc->sc_regs, RTW_TSFTRH);
1847 1.58 dyoung tsftl = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
1848 1.58 dyoung
1849 1.58 dyoung if ((isr & (RTW_INTR_TBDOK|RTW_INTR_TBDER)) != 0) {
1850 1.58 dyoung next = rtw_txring_next(&sc->sc_regs, tdb);
1851 1.58 dyoung RTW_DPRINTF(RTW_DEBUG_BEACON,
1852 1.58 dyoung ("%s: beacon ring %sprocessed, isr = %#04" PRIx16
1853 1.58 dyoung ", next %u expected %u, %" PRIu64 "\n", __func__,
1854 1.58 dyoung (next == tdb->tdb_next) ? "" : "un", isr, next,
1855 1.58 dyoung tdb->tdb_next, (uint64_t)tsfth << 32 | tsftl));
1856 1.83 dyoung if ((RTW_READ8(&sc->sc_regs, RTW_TPPOLL) & RTW_TPPOLL_BQ) == 0)
1857 1.58 dyoung rtw_collect_txring(sc, tsb, tdb, 1);
1858 1.58 dyoung }
1859 1.58 dyoung /* Start beacon transmission. */
1860 1.58 dyoung
1861 1.58 dyoung if ((isr & RTW_INTR_BCNINT) != 0 &&
1862 1.58 dyoung sc->sc_ic.ic_state == IEEE80211_S_RUN &&
1863 1.58 dyoung SIMPLEQ_EMPTY(&tsb->tsb_dirtyq)) {
1864 1.58 dyoung RTW_DPRINTF(RTW_DEBUG_BEACON,
1865 1.58 dyoung ("%s: beacon prep. time, isr = %#04" PRIx16
1866 1.58 dyoung ", %16" PRIu64 "\n", __func__, isr,
1867 1.58 dyoung (uint64_t)tsfth << 32 | tsftl));
1868 1.58 dyoung ic = &sc->sc_ic;
1869 1.58 dyoung m = rtw_beacon_alloc(sc, ic->ic_bss);
1870 1.58 dyoung
1871 1.58 dyoung if (m == NULL) {
1872 1.98 dyoung aprint_error_dev(sc->sc_dev,
1873 1.98 dyoung "could not allocate beacon\n");
1874 1.58 dyoung return;
1875 1.58 dyoung }
1876 1.58 dyoung m->m_pkthdr.rcvif = (void *)ieee80211_ref_node(ic->ic_bss);
1877 1.58 dyoung IF_ENQUEUE(&sc->sc_beaconq, m);
1878 1.58 dyoung rtw_start(&sc->sc_if);
1879 1.58 dyoung }
1880 1.1 dyoung }
1881 1.1 dyoung
1882 1.1 dyoung static void
1883 1.81 christos rtw_intr_atim(struct rtw_softc *sc)
1884 1.1 dyoung {
1885 1.1 dyoung /* TBD */
1886 1.1 dyoung return;
1887 1.1 dyoung }
1888 1.1 dyoung
1889 1.21 dyoung #ifdef RTW_DEBUG
1890 1.21 dyoung static void
1891 1.21 dyoung rtw_dump_rings(struct rtw_softc *sc)
1892 1.21 dyoung {
1893 1.34 dyoung struct rtw_txdesc_blk *tdb;
1894 1.34 dyoung struct rtw_rxdesc *rd;
1895 1.34 dyoung struct rtw_rxdesc_blk *rdb;
1896 1.21 dyoung int desc, pri;
1897 1.21 dyoung
1898 1.21 dyoung if ((rtw_debug & RTW_DEBUG_IO_KICK) == 0)
1899 1.21 dyoung return;
1900 1.21 dyoung
1901 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1902 1.34 dyoung tdb = &sc->sc_txdesc_blk[pri];
1903 1.21 dyoung printf("%s: txpri %d ndesc %d nfree %d\n", __func__, pri,
1904 1.34 dyoung tdb->tdb_ndesc, tdb->tdb_nfree);
1905 1.34 dyoung for (desc = 0; desc < tdb->tdb_ndesc; desc++)
1906 1.34 dyoung rtw_print_txdesc(sc, ".", NULL, tdb, desc);
1907 1.21 dyoung }
1908 1.21 dyoung
1909 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1910 1.33 dyoung
1911 1.21 dyoung for (desc = 0; desc < RTW_RXQLEN; desc++) {
1912 1.34 dyoung rd = &rdb->rdb_desc[desc];
1913 1.31 dyoung printf("%s: %sctl %08x rsvd0/rssi %08x buf/tsftl %08x "
1914 1.21 dyoung "rsvd1/tsfth %08x\n", __func__,
1915 1.34 dyoung (desc >= rdb->rdb_ndesc) ? "UNUSED " : "",
1916 1.34 dyoung le32toh(rd->rd_ctl), le32toh(rd->rd_rssi),
1917 1.34 dyoung le32toh(rd->rd_buf), le32toh(rd->rd_tsfth));
1918 1.21 dyoung }
1919 1.21 dyoung }
1920 1.21 dyoung #endif /* RTW_DEBUG */
1921 1.21 dyoung
1922 1.1 dyoung static void
1923 1.3 dyoung rtw_hwring_setup(struct rtw_softc *sc)
1924 1.3 dyoung {
1925 1.58 dyoung int pri;
1926 1.3 dyoung struct rtw_regs *regs = &sc->sc_regs;
1927 1.58 dyoung struct rtw_txdesc_blk *tdb;
1928 1.58 dyoung
1929 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRILO].tdb_basereg = RTW_TLPDA;
1930 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRILO].tdb_base = RTW_RING_BASE(sc, hd_txlo);
1931 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRIMD].tdb_basereg = RTW_TNPDA;
1932 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRIMD].tdb_base = RTW_RING_BASE(sc, hd_txmd);
1933 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRIHI].tdb_basereg = RTW_THPDA;
1934 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRIHI].tdb_base = RTW_RING_BASE(sc, hd_txhi);
1935 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRIBCN].tdb_basereg = RTW_TBDA;
1936 1.58 dyoung sc->sc_txdesc_blk[RTW_TXPRIBCN].tdb_base = RTW_RING_BASE(sc, hd_bcn);
1937 1.58 dyoung
1938 1.58 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1939 1.58 dyoung tdb = &sc->sc_txdesc_blk[pri];
1940 1.58 dyoung RTW_WRITE(regs, tdb->tdb_basereg, tdb->tdb_base);
1941 1.58 dyoung RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
1942 1.58 dyoung ("%s: reg[tdb->tdb_basereg] <- %" PRIxPTR "\n", __func__,
1943 1.58 dyoung (uintptr_t)tdb->tdb_base));
1944 1.58 dyoung }
1945 1.58 dyoung
1946 1.3 dyoung RTW_WRITE(regs, RTW_RDSAR, RTW_RING_BASE(sc, hd_rx));
1947 1.58 dyoung
1948 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
1949 1.21 dyoung ("%s: reg[RDSAR] <- %" PRIxPTR "\n", __func__,
1950 1.21 dyoung (uintptr_t)RTW_RING_BASE(sc, hd_rx)));
1951 1.58 dyoung
1952 1.58 dyoung RTW_SYNC(regs, RTW_TLPDA, RTW_RDSAR);
1953 1.58 dyoung
1954 1.3 dyoung }
1955 1.3 dyoung
1956 1.31 dyoung static int
1957 1.3 dyoung rtw_swring_setup(struct rtw_softc *sc)
1958 1.3 dyoung {
1959 1.31 dyoung int rc;
1960 1.34 dyoung struct rtw_rxdesc_blk *rdb;
1961 1.33 dyoung
1962 1.3 dyoung rtw_txdesc_blk_init_all(&sc->sc_txdesc_blk[0]);
1963 1.3 dyoung
1964 1.34 dyoung rtw_txsoft_blk_init_all(&sc->sc_txsoft_blk[0]);
1965 1.3 dyoung
1966 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1967 1.34 dyoung if ((rc = rtw_rxsoft_init_all(sc->sc_dmat, sc->sc_rxsoft, &rdb->rdb_ndesc,
1968 1.98 dyoung sc->sc_dev)) != 0 && rdb->rdb_ndesc == 0) {
1969 1.98 dyoung aprint_error_dev(sc->sc_dev, "could not allocate rx buffers\n");
1970 1.31 dyoung return rc;
1971 1.31 dyoung }
1972 1.44 perry
1973 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1974 1.34 dyoung rtw_rxdescs_sync(rdb, 0, rdb->rdb_ndesc,
1975 1.31 dyoung BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1976 1.34 dyoung rtw_rxdesc_init_all(rdb, sc->sc_rxsoft, 1);
1977 1.58 dyoung rdb->rdb_next = 0;
1978 1.3 dyoung
1979 1.33 dyoung rtw_txdescs_sync_all(&sc->sc_txdesc_blk[0]);
1980 1.31 dyoung return 0;
1981 1.3 dyoung }
1982 1.3 dyoung
1983 1.3 dyoung static void
1984 1.58 dyoung rtw_txdesc_blk_init(struct rtw_txdesc_blk *tdb)
1985 1.21 dyoung {
1986 1.21 dyoung int i;
1987 1.21 dyoung
1988 1.34 dyoung (void)memset(tdb->tdb_desc, 0,
1989 1.34 dyoung sizeof(tdb->tdb_desc[0]) * tdb->tdb_ndesc);
1990 1.34 dyoung for (i = 0; i < tdb->tdb_ndesc; i++)
1991 1.34 dyoung tdb->tdb_desc[i].td_next = htole32(RTW_NEXT_DESC(tdb, i));
1992 1.58 dyoung }
1993 1.58 dyoung
1994 1.58 dyoung static u_int
1995 1.58 dyoung rtw_txring_next(struct rtw_regs *regs, struct rtw_txdesc_blk *tdb)
1996 1.58 dyoung {
1997 1.58 dyoung return (le32toh(RTW_READ(regs, tdb->tdb_basereg)) - tdb->tdb_base) /
1998 1.58 dyoung sizeof(struct rtw_txdesc);
1999 1.21 dyoung }
2000 1.21 dyoung
2001 1.83 dyoung #ifdef RTW_DIAG
2002 1.21 dyoung static void
2003 1.83 dyoung rtw_txring_fixup(struct rtw_softc *sc, const char *fn, int ln)
2004 1.3 dyoung {
2005 1.5 dyoung int pri;
2006 1.58 dyoung u_int next;
2007 1.34 dyoung struct rtw_txdesc_blk *tdb;
2008 1.58 dyoung struct rtw_regs *regs = &sc->sc_regs;
2009 1.21 dyoung
2010 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
2011 1.83 dyoung int i;
2012 1.34 dyoung tdb = &sc->sc_txdesc_blk[pri];
2013 1.58 dyoung next = rtw_txring_next(regs, tdb);
2014 1.58 dyoung if (tdb->tdb_next == next)
2015 1.58 dyoung continue;
2016 1.83 dyoung for (i = 0; next != tdb->tdb_next;
2017 1.83 dyoung next = RTW_NEXT_IDX(tdb, next), i++) {
2018 1.83 dyoung if ((tdb->tdb_desc[next].td_stat & htole32(RTW_TXSTAT_OWN)) == 0)
2019 1.83 dyoung break;
2020 1.83 dyoung }
2021 1.83 dyoung printf("%s:%d: tx-ring %d expected next %u, read %u+%d -> %s\n", fn,
2022 1.83 dyoung ln, pri, tdb->tdb_next, next, i, tdb->tdb_next == next ? "okay" : "BAD");
2023 1.83 dyoung if (tdb->tdb_next == next)
2024 1.83 dyoung continue;
2025 1.65 dyoung tdb->tdb_next = MIN(next, tdb->tdb_ndesc - 1);
2026 1.58 dyoung }
2027 1.58 dyoung }
2028 1.83 dyoung #endif
2029 1.21 dyoung
2030 1.21 dyoung static void
2031 1.58 dyoung rtw_txdescs_reset(struct rtw_softc *sc)
2032 1.21 dyoung {
2033 1.58 dyoung int pri;
2034 1.83 dyoung struct rtw_txsoft_blk *tsb;
2035 1.83 dyoung struct rtw_txdesc_blk *tdb;
2036 1.58 dyoung
2037 1.58 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
2038 1.83 dyoung tsb = &sc->sc_txsoft_blk[pri];
2039 1.83 dyoung tdb = &sc->sc_txdesc_blk[pri];
2040 1.83 dyoung rtw_collect_txring(sc, tsb, tdb, 1);
2041 1.83 dyoung #ifdef RTW_DIAG
2042 1.83 dyoung if (!SIMPLEQ_EMPTY(&tsb->tsb_dirtyq))
2043 1.83 dyoung printf("%s: packets left in ring %d\n", __func__, pri);
2044 1.83 dyoung #endif
2045 1.58 dyoung }
2046 1.21 dyoung }
2047 1.21 dyoung
2048 1.21 dyoung static void
2049 1.21 dyoung rtw_intr_ioerror(struct rtw_softc *sc, uint16_t isr)
2050 1.21 dyoung {
2051 1.98 dyoung aprint_error_dev(sc->sc_dev, "tx fifo underflow\n");
2052 1.5 dyoung
2053 1.83 dyoung RTW_DPRINTF(RTW_DEBUG_BUGS, ("%s: cleaning up xmit, isr %" PRIx16
2054 1.98 dyoung "\n", device_xname(sc->sc_dev), isr));
2055 1.15 dyoung
2056 1.24 dyoung #ifdef RTW_DEBUG
2057 1.21 dyoung rtw_dump_rings(sc);
2058 1.24 dyoung #endif /* RTW_DEBUG */
2059 1.15 dyoung
2060 1.58 dyoung /* Collect tx'd packets. XXX let's hope this stops the transmit
2061 1.58 dyoung * timeouts.
2062 1.58 dyoung */
2063 1.83 dyoung rtw_txdescs_reset(sc);
2064 1.21 dyoung
2065 1.24 dyoung #ifdef RTW_DEBUG
2066 1.21 dyoung rtw_dump_rings(sc);
2067 1.24 dyoung #endif /* RTW_DEBUG */
2068 1.3 dyoung }
2069 1.3 dyoung
2070 1.61 perry static inline void
2071 1.1 dyoung rtw_suspend_ticks(struct rtw_softc *sc)
2072 1.1 dyoung {
2073 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_TIMEOUT,
2074 1.98 dyoung ("%s: suspending ticks\n", device_xname(sc->sc_dev)));
2075 1.1 dyoung sc->sc_do_tick = 0;
2076 1.1 dyoung }
2077 1.1 dyoung
2078 1.61 perry static inline void
2079 1.1 dyoung rtw_resume_ticks(struct rtw_softc *sc)
2080 1.1 dyoung {
2081 1.37 dyoung uint32_t tsftrl0, tsftrl1, next_tick;
2082 1.1 dyoung
2083 1.1 dyoung tsftrl0 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
2084 1.1 dyoung
2085 1.1 dyoung tsftrl1 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
2086 1.4 dyoung next_tick = tsftrl1 + 1000000;
2087 1.1 dyoung RTW_WRITE(&sc->sc_regs, RTW_TINT, next_tick);
2088 1.1 dyoung
2089 1.1 dyoung sc->sc_do_tick = 1;
2090 1.1 dyoung
2091 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_TIMEOUT,
2092 1.21 dyoung ("%s: resume ticks delta %#08x now %#08x next %#08x\n",
2093 1.98 dyoung device_xname(sc->sc_dev), tsftrl1 - tsftrl0, tsftrl1, next_tick));
2094 1.1 dyoung }
2095 1.1 dyoung
2096 1.1 dyoung static void
2097 1.1 dyoung rtw_intr_timeout(struct rtw_softc *sc)
2098 1.1 dyoung {
2099 1.98 dyoung RTW_DPRINTF(RTW_DEBUG_TIMEOUT, ("%s: timeout\n", device_xname(sc->sc_dev)));
2100 1.1 dyoung if (sc->sc_do_tick)
2101 1.1 dyoung rtw_resume_ticks(sc);
2102 1.1 dyoung return;
2103 1.1 dyoung }
2104 1.1 dyoung
2105 1.1 dyoung int
2106 1.1 dyoung rtw_intr(void *arg)
2107 1.1 dyoung {
2108 1.3 dyoung int i;
2109 1.1 dyoung struct rtw_softc *sc = arg;
2110 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2111 1.37 dyoung uint16_t isr;
2112 1.48 dyoung struct ifnet *ifp = &sc->sc_if;
2113 1.1 dyoung
2114 1.1 dyoung /*
2115 1.1 dyoung * If the interface isn't running, the interrupt couldn't
2116 1.1 dyoung * possibly have come from us.
2117 1.1 dyoung */
2118 1.101 dyoung if ((ifp->if_flags & IFF_RUNNING) == 0 ||
2119 1.98 dyoung !device_is_active(sc->sc_dev)) {
2120 1.98 dyoung RTW_DPRINTF(RTW_DEBUG_INTR, ("%s: stray interrupt\n",
2121 1.98 dyoung device_xname(sc->sc_dev)));
2122 1.1 dyoung return (0);
2123 1.1 dyoung }
2124 1.1 dyoung
2125 1.3 dyoung for (i = 0; i < 10; i++) {
2126 1.1 dyoung isr = RTW_READ16(regs, RTW_ISR);
2127 1.1 dyoung
2128 1.1 dyoung RTW_WRITE16(regs, RTW_ISR, isr);
2129 1.8 dyoung RTW_WBR(regs, RTW_ISR, RTW_ISR);
2130 1.1 dyoung
2131 1.1 dyoung if (sc->sc_intr_ack != NULL)
2132 1.1 dyoung (*sc->sc_intr_ack)(regs);
2133 1.1 dyoung
2134 1.1 dyoung if (isr == 0)
2135 1.1 dyoung break;
2136 1.1 dyoung
2137 1.1 dyoung #ifdef RTW_DEBUG
2138 1.1 dyoung #define PRINTINTR(flag) do { \
2139 1.1 dyoung if ((isr & flag) != 0) { \
2140 1.1 dyoung printf("%s" #flag, delim); \
2141 1.1 dyoung delim = ","; \
2142 1.1 dyoung } \
2143 1.1 dyoung } while (0)
2144 1.1 dyoung
2145 1.21 dyoung if ((rtw_debug & RTW_DEBUG_INTR) != 0 && isr != 0) {
2146 1.1 dyoung const char *delim = "<";
2147 1.1 dyoung
2148 1.98 dyoung printf("%s: reg[ISR] = %x", device_xname(sc->sc_dev),
2149 1.98 dyoung isr);
2150 1.1 dyoung
2151 1.1 dyoung PRINTINTR(RTW_INTR_TXFOVW);
2152 1.1 dyoung PRINTINTR(RTW_INTR_TIMEOUT);
2153 1.1 dyoung PRINTINTR(RTW_INTR_BCNINT);
2154 1.1 dyoung PRINTINTR(RTW_INTR_ATIMINT);
2155 1.1 dyoung PRINTINTR(RTW_INTR_TBDER);
2156 1.1 dyoung PRINTINTR(RTW_INTR_TBDOK);
2157 1.1 dyoung PRINTINTR(RTW_INTR_THPDER);
2158 1.1 dyoung PRINTINTR(RTW_INTR_THPDOK);
2159 1.1 dyoung PRINTINTR(RTW_INTR_TNPDER);
2160 1.1 dyoung PRINTINTR(RTW_INTR_TNPDOK);
2161 1.1 dyoung PRINTINTR(RTW_INTR_RXFOVW);
2162 1.1 dyoung PRINTINTR(RTW_INTR_RDU);
2163 1.1 dyoung PRINTINTR(RTW_INTR_TLPDER);
2164 1.1 dyoung PRINTINTR(RTW_INTR_TLPDOK);
2165 1.1 dyoung PRINTINTR(RTW_INTR_RER);
2166 1.1 dyoung PRINTINTR(RTW_INTR_ROK);
2167 1.1 dyoung
2168 1.1 dyoung printf(">\n");
2169 1.1 dyoung }
2170 1.1 dyoung #undef PRINTINTR
2171 1.1 dyoung #endif /* RTW_DEBUG */
2172 1.1 dyoung
2173 1.1 dyoung if ((isr & RTW_INTR_RX) != 0)
2174 1.83 dyoung rtw_intr_rx(sc, isr);
2175 1.1 dyoung if ((isr & RTW_INTR_TX) != 0)
2176 1.83 dyoung rtw_intr_tx(sc, isr);
2177 1.1 dyoung if ((isr & RTW_INTR_BEACON) != 0)
2178 1.83 dyoung rtw_intr_beacon(sc, isr);
2179 1.1 dyoung if ((isr & RTW_INTR_ATIMINT) != 0)
2180 1.1 dyoung rtw_intr_atim(sc);
2181 1.1 dyoung if ((isr & RTW_INTR_IOERROR) != 0)
2182 1.83 dyoung rtw_intr_ioerror(sc, isr);
2183 1.1 dyoung if ((isr & RTW_INTR_TIMEOUT) != 0)
2184 1.1 dyoung rtw_intr_timeout(sc);
2185 1.1 dyoung }
2186 1.1 dyoung
2187 1.1 dyoung return 1;
2188 1.1 dyoung }
2189 1.1 dyoung
2190 1.21 dyoung /* Must be called at splnet. */
2191 1.1 dyoung static void
2192 1.1 dyoung rtw_stop(struct ifnet *ifp, int disable)
2193 1.1 dyoung {
2194 1.21 dyoung int pri;
2195 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
2196 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2197 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2198 1.1 dyoung
2199 1.1 dyoung rtw_suspend_ticks(sc);
2200 1.1 dyoung
2201 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2202 1.1 dyoung
2203 1.101 dyoung if (device_has_power(sc->sc_dev)) {
2204 1.3 dyoung /* Disable interrupts. */
2205 1.3 dyoung RTW_WRITE16(regs, RTW_IMR, 0);
2206 1.3 dyoung
2207 1.8 dyoung RTW_WBW(regs, RTW_TPPOLL, RTW_IMR);
2208 1.8 dyoung
2209 1.3 dyoung /* Stop the transmit and receive processes. First stop DMA,
2210 1.3 dyoung * then disable receiver and transmitter.
2211 1.3 dyoung */
2212 1.42 dyoung RTW_WRITE8(regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
2213 1.1 dyoung
2214 1.8 dyoung RTW_SYNC(regs, RTW_TPPOLL, RTW_IMR);
2215 1.8 dyoung
2216 1.83 dyoung rtw_io_enable(sc, RTW_CR_RE | RTW_CR_TE, 0);
2217 1.3 dyoung }
2218 1.1 dyoung
2219 1.5 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
2220 1.34 dyoung rtw_txsofts_release(sc->sc_dmat, &sc->sc_ic,
2221 1.34 dyoung &sc->sc_txsoft_blk[pri]);
2222 1.5 dyoung }
2223 1.1 dyoung
2224 1.34 dyoung rtw_rxbufs_release(sc->sc_dmat, &sc->sc_rxsoft[0]);
2225 1.31 dyoung
2226 1.1 dyoung /* Mark the interface as not running. Cancel the watchdog timer. */
2227 1.21 dyoung ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2228 1.1 dyoung ifp->if_timer = 0;
2229 1.3 dyoung
2230 1.101 dyoung if (disable)
2231 1.101 dyoung pmf_device_suspend_self(sc->sc_dev);
2232 1.101 dyoung
2233 1.1 dyoung return;
2234 1.1 dyoung }
2235 1.1 dyoung
2236 1.1 dyoung const char *
2237 1.1 dyoung rtw_pwrstate_string(enum rtw_pwrstate power)
2238 1.1 dyoung {
2239 1.1 dyoung switch (power) {
2240 1.1 dyoung case RTW_ON:
2241 1.1 dyoung return "on";
2242 1.1 dyoung case RTW_SLEEP:
2243 1.1 dyoung return "sleep";
2244 1.1 dyoung case RTW_OFF:
2245 1.1 dyoung return "off";
2246 1.1 dyoung default:
2247 1.1 dyoung return "unknown";
2248 1.1 dyoung }
2249 1.1 dyoung }
2250 1.1 dyoung
2251 1.10 dyoung /* XXX For Maxim, I am using the RFMD settings gleaned from the
2252 1.10 dyoung * reference driver, plus a magic Maxim "ON" value that comes from
2253 1.10 dyoung * the Realtek document "Windows PG for Rtl8180."
2254 1.1 dyoung */
2255 1.1 dyoung static void
2256 1.1 dyoung rtw_maxim_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
2257 1.81 christos int before_rf, int digphy)
2258 1.1 dyoung {
2259 1.37 dyoung uint32_t anaparm;
2260 1.1 dyoung
2261 1.10 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
2262 1.10 dyoung anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
2263 1.10 dyoung
2264 1.10 dyoung switch (power) {
2265 1.10 dyoung case RTW_OFF:
2266 1.10 dyoung if (before_rf)
2267 1.10 dyoung return;
2268 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_MAXIM_OFF;
2269 1.10 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2270 1.10 dyoung break;
2271 1.10 dyoung case RTW_SLEEP:
2272 1.10 dyoung if (!before_rf)
2273 1.10 dyoung return;
2274 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_MAXIM_SLEEP;
2275 1.10 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2276 1.10 dyoung break;
2277 1.10 dyoung case RTW_ON:
2278 1.10 dyoung if (!before_rf)
2279 1.10 dyoung return;
2280 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_MAXIM_ON;
2281 1.10 dyoung break;
2282 1.10 dyoung }
2283 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2284 1.21 dyoung ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2285 1.10 dyoung __func__, rtw_pwrstate_string(power),
2286 1.10 dyoung (before_rf) ? "before" : "after", anaparm));
2287 1.10 dyoung
2288 1.10 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
2289 1.10 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
2290 1.10 dyoung }
2291 1.10 dyoung
2292 1.10 dyoung /* XXX I am using the RFMD settings gleaned from the reference
2293 1.44 perry * driver. They agree
2294 1.10 dyoung */
2295 1.10 dyoung static void
2296 1.10 dyoung rtw_rfmd_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
2297 1.81 christos int before_rf, int digphy)
2298 1.10 dyoung {
2299 1.37 dyoung uint32_t anaparm;
2300 1.1 dyoung
2301 1.1 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
2302 1.10 dyoung anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
2303 1.1 dyoung
2304 1.1 dyoung switch (power) {
2305 1.1 dyoung case RTW_OFF:
2306 1.1 dyoung if (before_rf)
2307 1.1 dyoung return;
2308 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_RFMD_OFF;
2309 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2310 1.1 dyoung break;
2311 1.1 dyoung case RTW_SLEEP:
2312 1.1 dyoung if (!before_rf)
2313 1.1 dyoung return;
2314 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_RFMD_SLEEP;
2315 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2316 1.1 dyoung break;
2317 1.1 dyoung case RTW_ON:
2318 1.1 dyoung if (!before_rf)
2319 1.1 dyoung return;
2320 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_RFMD_ON;
2321 1.1 dyoung break;
2322 1.1 dyoung }
2323 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2324 1.21 dyoung ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2325 1.10 dyoung __func__, rtw_pwrstate_string(power),
2326 1.10 dyoung (before_rf) ? "before" : "after", anaparm));
2327 1.10 dyoung
2328 1.1 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
2329 1.1 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
2330 1.1 dyoung }
2331 1.1 dyoung
2332 1.1 dyoung static void
2333 1.1 dyoung rtw_philips_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
2334 1.10 dyoung int before_rf, int digphy)
2335 1.1 dyoung {
2336 1.37 dyoung uint32_t anaparm;
2337 1.1 dyoung
2338 1.1 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
2339 1.10 dyoung anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
2340 1.1 dyoung
2341 1.1 dyoung switch (power) {
2342 1.1 dyoung case RTW_OFF:
2343 1.1 dyoung if (before_rf)
2344 1.1 dyoung return;
2345 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_PHILIPS_OFF;
2346 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2347 1.1 dyoung break;
2348 1.1 dyoung case RTW_SLEEP:
2349 1.1 dyoung if (!before_rf)
2350 1.1 dyoung return;
2351 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_PHILIPS_SLEEP;
2352 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2353 1.1 dyoung break;
2354 1.1 dyoung case RTW_ON:
2355 1.1 dyoung if (!before_rf)
2356 1.1 dyoung return;
2357 1.10 dyoung if (digphy) {
2358 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_DIG_PHILIPS_ON;
2359 1.10 dyoung /* XXX guess */
2360 1.10 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2361 1.10 dyoung } else
2362 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_ANA_PHILIPS_ON;
2363 1.1 dyoung break;
2364 1.1 dyoung }
2365 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2366 1.21 dyoung ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2367 1.10 dyoung __func__, rtw_pwrstate_string(power),
2368 1.10 dyoung (before_rf) ? "before" : "after", anaparm));
2369 1.10 dyoung
2370 1.1 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
2371 1.1 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
2372 1.1 dyoung }
2373 1.1 dyoung
2374 1.1 dyoung static void
2375 1.10 dyoung rtw_pwrstate0(struct rtw_softc *sc, enum rtw_pwrstate power, int before_rf,
2376 1.10 dyoung int digphy)
2377 1.1 dyoung {
2378 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2379 1.1 dyoung
2380 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);
2381 1.1 dyoung
2382 1.10 dyoung (*sc->sc_pwrstate_cb)(regs, power, before_rf, digphy);
2383 1.1 dyoung
2384 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
2385 1.1 dyoung
2386 1.1 dyoung return;
2387 1.1 dyoung }
2388 1.1 dyoung
2389 1.1 dyoung static int
2390 1.1 dyoung rtw_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
2391 1.1 dyoung {
2392 1.1 dyoung int rc;
2393 1.1 dyoung
2394 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2395 1.21 dyoung ("%s: %s->%s\n", __func__,
2396 1.1 dyoung rtw_pwrstate_string(sc->sc_pwrstate), rtw_pwrstate_string(power)));
2397 1.1 dyoung
2398 1.1 dyoung if (sc->sc_pwrstate == power)
2399 1.1 dyoung return 0;
2400 1.1 dyoung
2401 1.10 dyoung rtw_pwrstate0(sc, power, 1, sc->sc_flags & RTW_F_DIGPHY);
2402 1.1 dyoung rc = rtw_rf_pwrstate(sc->sc_rf, power);
2403 1.10 dyoung rtw_pwrstate0(sc, power, 0, sc->sc_flags & RTW_F_DIGPHY);
2404 1.1 dyoung
2405 1.1 dyoung switch (power) {
2406 1.1 dyoung case RTW_ON:
2407 1.4 dyoung /* TBD set LEDs */
2408 1.1 dyoung break;
2409 1.1 dyoung case RTW_SLEEP:
2410 1.1 dyoung /* TBD */
2411 1.1 dyoung break;
2412 1.1 dyoung case RTW_OFF:
2413 1.1 dyoung /* TBD */
2414 1.1 dyoung break;
2415 1.1 dyoung }
2416 1.1 dyoung if (rc == 0)
2417 1.1 dyoung sc->sc_pwrstate = power;
2418 1.1 dyoung else
2419 1.1 dyoung sc->sc_pwrstate = RTW_OFF;
2420 1.1 dyoung return rc;
2421 1.1 dyoung }
2422 1.1 dyoung
2423 1.1 dyoung static int
2424 1.1 dyoung rtw_tune(struct rtw_softc *sc)
2425 1.1 dyoung {
2426 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2427 1.71 dyoung struct rtw_tx_radiotap_header *rt = &sc->sc_txtap;
2428 1.71 dyoung struct rtw_rx_radiotap_header *rr = &sc->sc_rxtap;
2429 1.1 dyoung u_int chan;
2430 1.1 dyoung int rc;
2431 1.1 dyoung int antdiv = sc->sc_flags & RTW_F_ANTDIV,
2432 1.1 dyoung dflantb = sc->sc_flags & RTW_F_DFLANTB;
2433 1.1 dyoung
2434 1.57 skrll chan = ieee80211_chan2ieee(ic, ic->ic_curchan);
2435 1.97 dyoung KASSERT(chan != IEEE80211_CHAN_ANY);
2436 1.1 dyoung
2437 1.71 dyoung rt->rt_chan_freq = htole16(ic->ic_curchan->ic_freq);
2438 1.71 dyoung rt->rt_chan_flags = htole16(ic->ic_curchan->ic_flags);
2439 1.71 dyoung
2440 1.71 dyoung rr->rr_chan_freq = htole16(ic->ic_curchan->ic_freq);
2441 1.71 dyoung rr->rr_chan_flags = htole16(ic->ic_curchan->ic_flags);
2442 1.71 dyoung
2443 1.1 dyoung if (chan == sc->sc_cur_chan) {
2444 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_TUNE,
2445 1.44 perry ("%s: already tuned chan #%d\n", __func__, chan));
2446 1.1 dyoung return 0;
2447 1.1 dyoung }
2448 1.1 dyoung
2449 1.1 dyoung rtw_suspend_ticks(sc);
2450 1.1 dyoung
2451 1.83 dyoung rtw_io_enable(sc, RTW_CR_RE | RTW_CR_TE, 0);
2452 1.1 dyoung
2453 1.1 dyoung /* TBD wait for Tx to complete */
2454 1.1 dyoung
2455 1.101 dyoung KASSERT(device_has_power(sc->sc_dev));
2456 1.1 dyoung
2457 1.1 dyoung if ((rc = rtw_phy_init(&sc->sc_regs, sc->sc_rf,
2458 1.57 skrll rtw_chan2txpower(&sc->sc_srom, ic, ic->ic_curchan), sc->sc_csthr,
2459 1.57 skrll ic->ic_curchan->ic_freq, antdiv, dflantb, RTW_ON)) != 0) {
2460 1.1 dyoung /* XXX condition on powersaving */
2461 1.98 dyoung aprint_error_dev(sc->sc_dev, "phy init failed\n");
2462 1.1 dyoung }
2463 1.1 dyoung
2464 1.1 dyoung sc->sc_cur_chan = chan;
2465 1.1 dyoung
2466 1.83 dyoung rtw_io_enable(sc, RTW_CR_RE | RTW_CR_TE, 1);
2467 1.1 dyoung
2468 1.1 dyoung rtw_resume_ticks(sc);
2469 1.1 dyoung
2470 1.1 dyoung return rc;
2471 1.1 dyoung }
2472 1.1 dyoung
2473 1.101 dyoung bool
2474 1.101 dyoung rtw_suspend(device_t self PMF_FN_ARGS)
2475 1.1 dyoung {
2476 1.1 dyoung int rc;
2477 1.101 dyoung struct rtw_softc *sc = device_private(self);
2478 1.101 dyoung
2479 1.101 dyoung sc->sc_flags &= ~RTW_F_DK_VALID;
2480 1.1 dyoung
2481 1.101 dyoung if (!device_has_power(self))
2482 1.101 dyoung return false;
2483 1.1 dyoung
2484 1.1 dyoung /* turn off PHY */
2485 1.101 dyoung if ((rc = rtw_pwrstate(sc, RTW_OFF)) != 0) {
2486 1.101 dyoung aprint_error_dev(self, "failed to turn off PHY (%d)\n", rc);
2487 1.101 dyoung return false;
2488 1.36 dyoung }
2489 1.1 dyoung
2490 1.101 dyoung rtw_disable_interrupts(&sc->sc_regs);
2491 1.1 dyoung
2492 1.101 dyoung return true;
2493 1.1 dyoung }
2494 1.1 dyoung
2495 1.101 dyoung bool
2496 1.101 dyoung rtw_resume(device_t self PMF_FN_ARGS)
2497 1.1 dyoung {
2498 1.101 dyoung struct rtw_softc *sc = device_private(self);
2499 1.101 dyoung
2500 1.101 dyoung /* Power may have been removed, resetting WEP keys.
2501 1.101 dyoung */
2502 1.101 dyoung sc->sc_flags &= ~RTW_F_DK_VALID;
2503 1.101 dyoung rtw_enable_interrupts(sc);
2504 1.101 dyoung
2505 1.101 dyoung return true;
2506 1.1 dyoung }
2507 1.1 dyoung
2508 1.1 dyoung static void
2509 1.1 dyoung rtw_transmit_config(struct rtw_regs *regs)
2510 1.1 dyoung {
2511 1.37 dyoung uint32_t tcr;
2512 1.1 dyoung
2513 1.1 dyoung tcr = RTW_READ(regs, RTW_TCR);
2514 1.1 dyoung
2515 1.10 dyoung tcr |= RTW_TCR_CWMIN;
2516 1.10 dyoung tcr &= ~RTW_TCR_MXDMA_MASK;
2517 1.10 dyoung tcr |= RTW_TCR_MXDMA_256;
2518 1.1 dyoung tcr |= RTW_TCR_SAT; /* send ACK as fast as possible */
2519 1.1 dyoung tcr &= ~RTW_TCR_LBK_MASK;
2520 1.1 dyoung tcr |= RTW_TCR_LBK_NORMAL; /* normal operating mode */
2521 1.1 dyoung
2522 1.1 dyoung /* set short/long retry limits */
2523 1.1 dyoung tcr &= ~(RTW_TCR_SRL_MASK|RTW_TCR_LRL_MASK);
2524 1.75 dyoung tcr |= __SHIFTIN(4, RTW_TCR_SRL_MASK) | __SHIFTIN(4, RTW_TCR_LRL_MASK);
2525 1.1 dyoung
2526 1.13 dyoung tcr &= ~RTW_TCR_CRC; /* NIC appends CRC32 */
2527 1.1 dyoung
2528 1.1 dyoung RTW_WRITE(regs, RTW_TCR, tcr);
2529 1.8 dyoung RTW_SYNC(regs, RTW_TCR, RTW_TCR);
2530 1.1 dyoung }
2531 1.1 dyoung
2532 1.101 dyoung static void
2533 1.101 dyoung rtw_disable_interrupts(struct rtw_regs *regs)
2534 1.101 dyoung {
2535 1.101 dyoung RTW_WRITE16(regs, RTW_IMR, 0);
2536 1.101 dyoung RTW_WBW(regs, RTW_IMR, RTW_ISR);
2537 1.101 dyoung RTW_WRITE16(regs, RTW_ISR, 0xffff);
2538 1.101 dyoung RTW_SYNC(regs, RTW_IMR, RTW_ISR);
2539 1.101 dyoung }
2540 1.101 dyoung
2541 1.101 dyoung static void
2542 1.1 dyoung rtw_enable_interrupts(struct rtw_softc *sc)
2543 1.1 dyoung {
2544 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2545 1.1 dyoung
2546 1.1 dyoung sc->sc_inten = RTW_INTR_RX|RTW_INTR_TX|RTW_INTR_BEACON|RTW_INTR_ATIMINT;
2547 1.1 dyoung sc->sc_inten |= RTW_INTR_IOERROR|RTW_INTR_TIMEOUT;
2548 1.1 dyoung
2549 1.1 dyoung RTW_WRITE16(regs, RTW_IMR, sc->sc_inten);
2550 1.8 dyoung RTW_WBW(regs, RTW_IMR, RTW_ISR);
2551 1.1 dyoung RTW_WRITE16(regs, RTW_ISR, 0xffff);
2552 1.8 dyoung RTW_SYNC(regs, RTW_IMR, RTW_ISR);
2553 1.1 dyoung
2554 1.1 dyoung /* XXX necessary? */
2555 1.1 dyoung if (sc->sc_intr_ack != NULL)
2556 1.1 dyoung (*sc->sc_intr_ack)(regs);
2557 1.1 dyoung }
2558 1.1 dyoung
2559 1.10 dyoung static void
2560 1.10 dyoung rtw_set_nettype(struct rtw_softc *sc, enum ieee80211_opmode opmode)
2561 1.10 dyoung {
2562 1.10 dyoung uint8_t msr;
2563 1.10 dyoung
2564 1.10 dyoung /* I'm guessing that MSR is protected as CONFIG[0123] are. */
2565 1.42 dyoung rtw_set_access(&sc->sc_regs, RTW_ACCESS_CONFIG);
2566 1.10 dyoung
2567 1.10 dyoung msr = RTW_READ8(&sc->sc_regs, RTW_MSR) & ~RTW_MSR_NETYPE_MASK;
2568 1.10 dyoung
2569 1.10 dyoung switch (opmode) {
2570 1.10 dyoung case IEEE80211_M_AHDEMO:
2571 1.10 dyoung case IEEE80211_M_IBSS:
2572 1.10 dyoung msr |= RTW_MSR_NETYPE_ADHOC_OK;
2573 1.10 dyoung break;
2574 1.10 dyoung case IEEE80211_M_HOSTAP:
2575 1.10 dyoung msr |= RTW_MSR_NETYPE_AP_OK;
2576 1.10 dyoung break;
2577 1.10 dyoung case IEEE80211_M_MONITOR:
2578 1.10 dyoung /* XXX */
2579 1.10 dyoung msr |= RTW_MSR_NETYPE_NOLINK;
2580 1.10 dyoung break;
2581 1.10 dyoung case IEEE80211_M_STA:
2582 1.10 dyoung msr |= RTW_MSR_NETYPE_INFRA_OK;
2583 1.10 dyoung break;
2584 1.10 dyoung }
2585 1.10 dyoung RTW_WRITE8(&sc->sc_regs, RTW_MSR, msr);
2586 1.10 dyoung
2587 1.42 dyoung rtw_set_access(&sc->sc_regs, RTW_ACCESS_NONE);
2588 1.10 dyoung }
2589 1.10 dyoung
2590 1.1 dyoung #define rtw_calchash(addr) \
2591 1.38 dyoung (ether_crc32_be((addr), IEEE80211_ADDR_LEN) >> 26)
2592 1.1 dyoung
2593 1.1 dyoung static void
2594 1.1 dyoung rtw_pktfilt_load(struct rtw_softc *sc)
2595 1.1 dyoung {
2596 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2597 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2598 1.48 dyoung struct ethercom *ec = &sc->sc_ec;
2599 1.48 dyoung struct ifnet *ifp = &sc->sc_if;
2600 1.1 dyoung int hash;
2601 1.37 dyoung uint32_t hashes[2] = { 0, 0 };
2602 1.1 dyoung struct ether_multi *enm;
2603 1.1 dyoung struct ether_multistep step;
2604 1.1 dyoung
2605 1.1 dyoung /* XXX might be necessary to stop Rx/Tx engines while setting filters */
2606 1.1 dyoung
2607 1.38 dyoung sc->sc_rcr &= ~RTW_RCR_PKTFILTER_MASK;
2608 1.38 dyoung sc->sc_rcr &= ~(RTW_RCR_MXDMA_MASK | RTW_RCR_RXFTH_MASK);
2609 1.1 dyoung
2610 1.38 dyoung sc->sc_rcr |= RTW_RCR_PKTFILTER_DEFAULT;
2611 1.38 dyoung /* MAC auto-reset PHY (huh?) */
2612 1.10 dyoung sc->sc_rcr |= RTW_RCR_ENMARP;
2613 1.38 dyoung /* DMA whole Rx packets, only. Set Tx DMA burst size to 1024 bytes. */
2614 1.38 dyoung sc->sc_rcr |= RTW_RCR_MXDMA_1024 | RTW_RCR_RXFTH_WHOLE;
2615 1.1 dyoung
2616 1.38 dyoung switch (ic->ic_opmode) {
2617 1.38 dyoung case IEEE80211_M_MONITOR:
2618 1.38 dyoung sc->sc_rcr |= RTW_RCR_MONITOR;
2619 1.38 dyoung break;
2620 1.38 dyoung case IEEE80211_M_AHDEMO:
2621 1.38 dyoung case IEEE80211_M_IBSS:
2622 1.38 dyoung /* receive broadcasts in our BSS */
2623 1.38 dyoung sc->sc_rcr |= RTW_RCR_ADD3;
2624 1.38 dyoung break;
2625 1.38 dyoung default:
2626 1.38 dyoung break;
2627 1.38 dyoung }
2628 1.1 dyoung
2629 1.1 dyoung ifp->if_flags &= ~IFF_ALLMULTI;
2630 1.1 dyoung
2631 1.1 dyoung /*
2632 1.1 dyoung * Program the 64-bit multicast hash filter.
2633 1.1 dyoung */
2634 1.1 dyoung ETHER_FIRST_MULTI(step, ec, enm);
2635 1.1 dyoung while (enm != NULL) {
2636 1.1 dyoung /* XXX */
2637 1.1 dyoung if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
2638 1.86 dyoung ETHER_ADDR_LEN) != 0) {
2639 1.86 dyoung ifp->if_flags |= IFF_ALLMULTI;
2640 1.86 dyoung break;
2641 1.86 dyoung }
2642 1.1 dyoung
2643 1.1 dyoung hash = rtw_calchash(enm->enm_addrlo);
2644 1.38 dyoung hashes[hash >> 5] |= (1 << (hash & 0x1f));
2645 1.1 dyoung ETHER_NEXT_MULTI(step, enm);
2646 1.1 dyoung }
2647 1.1 dyoung
2648 1.86 dyoung /* XXX accept all broadcast if scanning */
2649 1.86 dyoung if ((ifp->if_flags & IFF_BROADCAST) != 0)
2650 1.86 dyoung sc->sc_rcr |= RTW_RCR_AB; /* accept all broadcast */
2651 1.86 dyoung
2652 1.86 dyoung if (ifp->if_flags & IFF_PROMISC) {
2653 1.86 dyoung sc->sc_rcr |= RTW_RCR_AB; /* accept all broadcast */
2654 1.93 dyoung sc->sc_rcr |= RTW_RCR_ACRC32; /* accept frames failing CRC */
2655 1.93 dyoung sc->sc_rcr |= RTW_RCR_AICV; /* accept frames failing ICV */
2656 1.86 dyoung ifp->if_flags |= IFF_ALLMULTI;
2657 1.86 dyoung }
2658 1.86 dyoung
2659 1.86 dyoung if (ifp->if_flags & IFF_ALLMULTI)
2660 1.38 dyoung hashes[0] = hashes[1] = 0xffffffff;
2661 1.86 dyoung
2662 1.86 dyoung if ((hashes[0] | hashes[1]) != 0)
2663 1.86 dyoung sc->sc_rcr |= RTW_RCR_AM; /* accept multicast */
2664 1.1 dyoung
2665 1.1 dyoung RTW_WRITE(regs, RTW_MAR0, hashes[0]);
2666 1.1 dyoung RTW_WRITE(regs, RTW_MAR1, hashes[1]);
2667 1.1 dyoung RTW_WRITE(regs, RTW_RCR, sc->sc_rcr);
2668 1.1 dyoung RTW_SYNC(regs, RTW_MAR0, RTW_RCR); /* RTW_MAR0 < RTW_MAR1 < RTW_RCR */
2669 1.1 dyoung
2670 1.21 dyoung DPRINTF(sc, RTW_DEBUG_PKTFILT,
2671 1.21 dyoung ("%s: RTW_MAR0 %08x RTW_MAR1 %08x RTW_RCR %08x\n",
2672 1.98 dyoung device_xname(sc->sc_dev), RTW_READ(regs, RTW_MAR0),
2673 1.1 dyoung RTW_READ(regs, RTW_MAR1), RTW_READ(regs, RTW_RCR)));
2674 1.1 dyoung }
2675 1.1 dyoung
2676 1.42 dyoung static struct mbuf *
2677 1.42 dyoung rtw_beacon_alloc(struct rtw_softc *sc, struct ieee80211_node *ni)
2678 1.42 dyoung {
2679 1.42 dyoung struct ieee80211com *ic = &sc->sc_ic;
2680 1.42 dyoung struct mbuf *m;
2681 1.48 dyoung struct ieee80211_beacon_offsets boff;
2682 1.42 dyoung
2683 1.58 dyoung if ((m = ieee80211_beacon_alloc(ic, ni, &boff)) != NULL) {
2684 1.58 dyoung RTW_DPRINTF(RTW_DEBUG_BEACON,
2685 1.58 dyoung ("%s: m %p len %u\n", __func__, m, m->m_len));
2686 1.58 dyoung }
2687 1.42 dyoung return m;
2688 1.42 dyoung }
2689 1.42 dyoung
2690 1.21 dyoung /* Must be called at splnet. */
2691 1.1 dyoung static int
2692 1.1 dyoung rtw_init(struct ifnet *ifp)
2693 1.1 dyoung {
2694 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
2695 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2696 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2697 1.101 dyoung int rc;
2698 1.1 dyoung
2699 1.101 dyoung if (device_is_active(sc->sc_dev)) {
2700 1.101 dyoung /* Cancel pending I/O and reset. */
2701 1.101 dyoung rtw_stop(ifp, 0);
2702 1.101 dyoung } else if (!pmf_device_resume_self(sc->sc_dev))
2703 1.101 dyoung return 0; /* XXX error? */
2704 1.1 dyoung
2705 1.21 dyoung DPRINTF(sc, RTW_DEBUG_TUNE, ("%s: channel %d freq %d flags 0x%04x\n",
2706 1.57 skrll __func__, ieee80211_chan2ieee(ic, ic->ic_curchan),
2707 1.57 skrll ic->ic_curchan->ic_freq, ic->ic_curchan->ic_flags));
2708 1.1 dyoung
2709 1.1 dyoung if ((rc = rtw_pwrstate(sc, RTW_OFF)) != 0)
2710 1.1 dyoung goto out;
2711 1.1 dyoung
2712 1.31 dyoung if ((rc = rtw_swring_setup(sc)) != 0)
2713 1.31 dyoung goto out;
2714 1.1 dyoung
2715 1.1 dyoung rtw_transmit_config(regs);
2716 1.1 dyoung
2717 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
2718 1.1 dyoung
2719 1.4 dyoung RTW_WRITE8(regs, RTW_MSR, 0x0); /* no link */
2720 1.8 dyoung RTW_WBW(regs, RTW_MSR, RTW_BRSR);
2721 1.1 dyoung
2722 1.27 mycroft /* long PLCP header, 1Mb/2Mb basic rate */
2723 1.27 mycroft RTW_WRITE16(regs, RTW_BRSR, RTW_BRSR_MBR8180_2MBPS);
2724 1.8 dyoung RTW_SYNC(regs, RTW_BRSR, RTW_BRSR);
2725 1.1 dyoung
2726 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);
2727 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
2728 1.1 dyoung
2729 1.1 dyoung /* XXX from reference sources */
2730 1.1 dyoung RTW_WRITE(regs, RTW_FEMR, 0xffff);
2731 1.8 dyoung RTW_SYNC(regs, RTW_FEMR, RTW_FEMR);
2732 1.1 dyoung
2733 1.98 dyoung rtw_set_rfprog(regs, sc->sc_rfchipid, sc->sc_dev);
2734 1.4 dyoung
2735 1.4 dyoung RTW_WRITE8(regs, RTW_PHYDELAY, sc->sc_phydelay);
2736 1.1 dyoung /* from Linux driver */
2737 1.4 dyoung RTW_WRITE8(regs, RTW_CRCOUNT, RTW_CRCOUNT_MAGIC);
2738 1.1 dyoung
2739 1.8 dyoung RTW_SYNC(regs, RTW_PHYDELAY, RTW_CRCOUNT);
2740 1.8 dyoung
2741 1.1 dyoung rtw_enable_interrupts(sc);
2742 1.1 dyoung
2743 1.1 dyoung rtw_pktfilt_load(sc);
2744 1.1 dyoung
2745 1.3 dyoung rtw_hwring_setup(sc);
2746 1.1 dyoung
2747 1.48 dyoung rtw_wep_setkeys(sc, ic->ic_nw_keys, ic->ic_def_txkey);
2748 1.42 dyoung
2749 1.83 dyoung rtw_io_enable(sc, RTW_CR_RE | RTW_CR_TE, 1);
2750 1.1 dyoung
2751 1.1 dyoung ifp->if_flags |= IFF_RUNNING;
2752 1.1 dyoung ic->ic_state = IEEE80211_S_INIT;
2753 1.1 dyoung
2754 1.1 dyoung RTW_WRITE16(regs, RTW_BSSID16, 0x0);
2755 1.1 dyoung RTW_WRITE(regs, RTW_BSSID32, 0x0);
2756 1.1 dyoung
2757 1.4 dyoung rtw_resume_ticks(sc);
2758 1.1 dyoung
2759 1.10 dyoung rtw_set_nettype(sc, IEEE80211_M_MONITOR);
2760 1.4 dyoung
2761 1.4 dyoung if (ic->ic_opmode == IEEE80211_M_MONITOR)
2762 1.4 dyoung return ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2763 1.4 dyoung else
2764 1.4 dyoung return ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2765 1.4 dyoung
2766 1.1 dyoung out:
2767 1.98 dyoung aprint_error_dev(sc->sc_dev, "interface not running\n");
2768 1.1 dyoung return rc;
2769 1.1 dyoung }
2770 1.1 dyoung
2771 1.61 perry static inline void
2772 1.42 dyoung rtw_led_init(struct rtw_regs *regs)
2773 1.42 dyoung {
2774 1.42 dyoung uint8_t cfg0, cfg1;
2775 1.42 dyoung
2776 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
2777 1.42 dyoung
2778 1.42 dyoung cfg0 = RTW_READ8(regs, RTW_CONFIG0);
2779 1.42 dyoung cfg0 |= RTW_CONFIG0_LEDGPOEN;
2780 1.42 dyoung RTW_WRITE8(regs, RTW_CONFIG0, cfg0);
2781 1.42 dyoung
2782 1.42 dyoung cfg1 = RTW_READ8(regs, RTW_CONFIG1);
2783 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2784 1.42 dyoung ("%s: read %" PRIx8 " from reg[CONFIG1]\n", __func__, cfg1));
2785 1.42 dyoung
2786 1.42 dyoung cfg1 &= ~RTW_CONFIG1_LEDS_MASK;
2787 1.42 dyoung cfg1 |= RTW_CONFIG1_LEDS_TX_RX;
2788 1.42 dyoung RTW_WRITE8(regs, RTW_CONFIG1, cfg1);
2789 1.42 dyoung
2790 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
2791 1.42 dyoung }
2792 1.42 dyoung
2793 1.44 perry /*
2794 1.42 dyoung * IEEE80211_S_INIT: LED1 off
2795 1.42 dyoung *
2796 1.42 dyoung * IEEE80211_S_AUTH,
2797 1.42 dyoung * IEEE80211_S_ASSOC,
2798 1.42 dyoung * IEEE80211_S_SCAN: LED1 blinks @ 1 Hz, blinks at 5Hz for tx/rx
2799 1.42 dyoung *
2800 1.42 dyoung * IEEE80211_S_RUN: LED1 on, blinks @ 5Hz for tx/rx
2801 1.42 dyoung */
2802 1.42 dyoung static void
2803 1.42 dyoung rtw_led_newstate(struct rtw_softc *sc, enum ieee80211_state nstate)
2804 1.42 dyoung {
2805 1.42 dyoung struct rtw_led_state *ls;
2806 1.42 dyoung
2807 1.42 dyoung ls = &sc->sc_led_state;
2808 1.42 dyoung
2809 1.42 dyoung switch (nstate) {
2810 1.42 dyoung case IEEE80211_S_INIT:
2811 1.42 dyoung rtw_led_init(&sc->sc_regs);
2812 1.101 dyoung aprint_debug_dev(sc->sc_dev, "stopping blink\n");
2813 1.42 dyoung callout_stop(&ls->ls_slow_ch);
2814 1.42 dyoung callout_stop(&ls->ls_fast_ch);
2815 1.42 dyoung ls->ls_slowblink = 0;
2816 1.42 dyoung ls->ls_actblink = 0;
2817 1.42 dyoung ls->ls_default = 0;
2818 1.42 dyoung break;
2819 1.42 dyoung case IEEE80211_S_SCAN:
2820 1.101 dyoung aprint_debug_dev(sc->sc_dev, "scheduling blink\n");
2821 1.42 dyoung callout_schedule(&ls->ls_slow_ch, RTW_LED_SLOW_TICKS);
2822 1.42 dyoung callout_schedule(&ls->ls_fast_ch, RTW_LED_FAST_TICKS);
2823 1.42 dyoung /*FALLTHROUGH*/
2824 1.42 dyoung case IEEE80211_S_AUTH:
2825 1.42 dyoung case IEEE80211_S_ASSOC:
2826 1.42 dyoung ls->ls_default = RTW_LED1;
2827 1.42 dyoung ls->ls_actblink = RTW_LED1;
2828 1.42 dyoung ls->ls_slowblink = RTW_LED1;
2829 1.42 dyoung break;
2830 1.42 dyoung case IEEE80211_S_RUN:
2831 1.42 dyoung ls->ls_slowblink = 0;
2832 1.42 dyoung break;
2833 1.42 dyoung }
2834 1.42 dyoung rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
2835 1.42 dyoung }
2836 1.42 dyoung
2837 1.42 dyoung static void
2838 1.42 dyoung rtw_led_set(struct rtw_led_state *ls, struct rtw_regs *regs, int hwverid)
2839 1.42 dyoung {
2840 1.42 dyoung uint8_t led_condition;
2841 1.42 dyoung bus_size_t ofs;
2842 1.42 dyoung uint8_t mask, newval, val;
2843 1.42 dyoung
2844 1.42 dyoung led_condition = ls->ls_default;
2845 1.42 dyoung
2846 1.42 dyoung if (ls->ls_state & RTW_LED_S_SLOW)
2847 1.42 dyoung led_condition ^= ls->ls_slowblink;
2848 1.42 dyoung if (ls->ls_state & (RTW_LED_S_RX|RTW_LED_S_TX))
2849 1.42 dyoung led_condition ^= ls->ls_actblink;
2850 1.42 dyoung
2851 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2852 1.42 dyoung ("%s: LED condition %" PRIx8 "\n", __func__, led_condition));
2853 1.42 dyoung
2854 1.42 dyoung switch (hwverid) {
2855 1.42 dyoung default:
2856 1.42 dyoung case 'F':
2857 1.42 dyoung ofs = RTW_PSR;
2858 1.42 dyoung newval = mask = RTW_PSR_LEDGPO0 | RTW_PSR_LEDGPO1;
2859 1.42 dyoung if (led_condition & RTW_LED0)
2860 1.42 dyoung newval &= ~RTW_PSR_LEDGPO0;
2861 1.42 dyoung if (led_condition & RTW_LED1)
2862 1.42 dyoung newval &= ~RTW_PSR_LEDGPO1;
2863 1.42 dyoung break;
2864 1.42 dyoung case 'D':
2865 1.42 dyoung ofs = RTW_9346CR;
2866 1.42 dyoung mask = RTW_9346CR_EEM_MASK | RTW_9346CR_EEDI | RTW_9346CR_EECS;
2867 1.42 dyoung newval = RTW_9346CR_EEM_PROGRAM;
2868 1.42 dyoung if (led_condition & RTW_LED0)
2869 1.42 dyoung newval |= RTW_9346CR_EEDI;
2870 1.42 dyoung if (led_condition & RTW_LED1)
2871 1.42 dyoung newval |= RTW_9346CR_EECS;
2872 1.42 dyoung break;
2873 1.42 dyoung }
2874 1.42 dyoung val = RTW_READ8(regs, ofs);
2875 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2876 1.45 dyoung ("%s: read %" PRIx8 " from reg[%#02" PRIxPTR "]\n", __func__, val,
2877 1.45 dyoung (uintptr_t)ofs));
2878 1.42 dyoung val &= ~mask;
2879 1.42 dyoung val |= newval;
2880 1.42 dyoung RTW_WRITE8(regs, ofs, val);
2881 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2882 1.45 dyoung ("%s: wrote %" PRIx8 " to reg[%#02" PRIxPTR "]\n", __func__, val,
2883 1.45 dyoung (uintptr_t)ofs));
2884 1.42 dyoung RTW_SYNC(regs, ofs, ofs);
2885 1.42 dyoung }
2886 1.42 dyoung
2887 1.42 dyoung static void
2888 1.42 dyoung rtw_led_fastblink(void *arg)
2889 1.42 dyoung {
2890 1.42 dyoung int ostate, s;
2891 1.42 dyoung struct rtw_softc *sc = (struct rtw_softc *)arg;
2892 1.42 dyoung struct rtw_led_state *ls = &sc->sc_led_state;
2893 1.42 dyoung
2894 1.42 dyoung s = splnet();
2895 1.42 dyoung ostate = ls->ls_state;
2896 1.42 dyoung ls->ls_state ^= ls->ls_event;
2897 1.42 dyoung
2898 1.42 dyoung if ((ls->ls_event & RTW_LED_S_TX) == 0)
2899 1.42 dyoung ls->ls_state &= ~RTW_LED_S_TX;
2900 1.42 dyoung
2901 1.42 dyoung if ((ls->ls_event & RTW_LED_S_RX) == 0)
2902 1.42 dyoung ls->ls_state &= ~RTW_LED_S_RX;
2903 1.42 dyoung
2904 1.42 dyoung ls->ls_event = 0;
2905 1.42 dyoung
2906 1.42 dyoung if (ostate != ls->ls_state)
2907 1.42 dyoung rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
2908 1.42 dyoung splx(s);
2909 1.42 dyoung
2910 1.101 dyoung aprint_debug_dev(sc->sc_dev, "scheduling fast blink\n");
2911 1.42 dyoung callout_schedule(&ls->ls_fast_ch, RTW_LED_FAST_TICKS);
2912 1.42 dyoung }
2913 1.42 dyoung
2914 1.42 dyoung static void
2915 1.42 dyoung rtw_led_slowblink(void *arg)
2916 1.42 dyoung {
2917 1.42 dyoung int s;
2918 1.42 dyoung struct rtw_softc *sc = (struct rtw_softc *)arg;
2919 1.42 dyoung struct rtw_led_state *ls = &sc->sc_led_state;
2920 1.42 dyoung
2921 1.42 dyoung s = splnet();
2922 1.42 dyoung ls->ls_state ^= RTW_LED_S_SLOW;
2923 1.42 dyoung rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
2924 1.42 dyoung splx(s);
2925 1.101 dyoung aprint_debug_dev(sc->sc_dev, "scheduling slow blink\n");
2926 1.42 dyoung callout_schedule(&ls->ls_slow_ch, RTW_LED_SLOW_TICKS);
2927 1.42 dyoung }
2928 1.42 dyoung
2929 1.101 dyoung static void
2930 1.101 dyoung rtw_led_detach(struct rtw_led_state *ls)
2931 1.101 dyoung {
2932 1.101 dyoung callout_destroy(&ls->ls_fast_ch);
2933 1.101 dyoung callout_destroy(&ls->ls_slow_ch);
2934 1.101 dyoung }
2935 1.101 dyoung
2936 1.101 dyoung static void
2937 1.45 dyoung rtw_led_attach(struct rtw_led_state *ls, void *arg)
2938 1.42 dyoung {
2939 1.89 ad callout_init(&ls->ls_fast_ch, 0);
2940 1.89 ad callout_init(&ls->ls_slow_ch, 0);
2941 1.45 dyoung callout_setfunc(&ls->ls_fast_ch, rtw_led_fastblink, arg);
2942 1.45 dyoung callout_setfunc(&ls->ls_slow_ch, rtw_led_slowblink, arg);
2943 1.42 dyoung }
2944 1.42 dyoung
2945 1.1 dyoung static int
2946 1.85 christos rtw_ioctl(struct ifnet *ifp, u_long cmd, void *data)
2947 1.1 dyoung {
2948 1.21 dyoung int rc = 0, s;
2949 1.1 dyoung struct rtw_softc *sc = ifp->if_softc;
2950 1.1 dyoung
2951 1.21 dyoung s = splnet();
2952 1.86 dyoung if (cmd == SIOCSIFFLAGS) {
2953 1.1 dyoung if ((ifp->if_flags & IFF_UP) != 0) {
2954 1.101 dyoung if (device_is_active(sc->sc_dev))
2955 1.1 dyoung rtw_pktfilt_load(sc);
2956 1.86 dyoung else
2957 1.1 dyoung rc = rtw_init(ifp);
2958 1.39 dyoung RTW_PRINT_REGS(&sc->sc_regs, ifp->if_xname, __func__);
2959 1.101 dyoung } else if (device_is_active(sc->sc_dev)) {
2960 1.39 dyoung RTW_PRINT_REGS(&sc->sc_regs, ifp->if_xname, __func__);
2961 1.1 dyoung rtw_stop(ifp, 1);
2962 1.1 dyoung }
2963 1.86 dyoung } else if ((rc = ieee80211_ioctl(&sc->sc_ic, cmd, data)) != ENETRESET)
2964 1.86 dyoung ; /* nothing to do */
2965 1.86 dyoung else if (cmd == SIOCADDMULTI || cmd == SIOCDELMULTI) {
2966 1.86 dyoung /* reload packet filter if running */
2967 1.39 dyoung if (ifp->if_flags & IFF_RUNNING)
2968 1.39 dyoung rtw_pktfilt_load(sc);
2969 1.39 dyoung rc = 0;
2970 1.101 dyoung } else if ((ifp->if_flags & IFF_UP) != 0)
2971 1.86 dyoung rc = rtw_init(ifp);
2972 1.86 dyoung else
2973 1.86 dyoung rc = 0;
2974 1.21 dyoung splx(s);
2975 1.1 dyoung return rc;
2976 1.1 dyoung }
2977 1.1 dyoung
2978 1.42 dyoung /* Select a transmit ring with at least one h/w and s/w descriptor free.
2979 1.42 dyoung * Return 0 on success, -1 on failure.
2980 1.42 dyoung */
2981 1.61 perry static inline int
2982 1.42 dyoung rtw_txring_choose(struct rtw_softc *sc, struct rtw_txsoft_blk **tsbp,
2983 1.42 dyoung struct rtw_txdesc_blk **tdbp, int pri)
2984 1.42 dyoung {
2985 1.42 dyoung struct rtw_txsoft_blk *tsb;
2986 1.42 dyoung struct rtw_txdesc_blk *tdb;
2987 1.42 dyoung
2988 1.42 dyoung KASSERT(pri >= 0 && pri < RTW_NTXPRI);
2989 1.42 dyoung
2990 1.42 dyoung tsb = &sc->sc_txsoft_blk[pri];
2991 1.42 dyoung tdb = &sc->sc_txdesc_blk[pri];
2992 1.42 dyoung
2993 1.42 dyoung if (SIMPLEQ_EMPTY(&tsb->tsb_freeq) || tdb->tdb_nfree == 0) {
2994 1.58 dyoung if (tsb->tsb_tx_timer == 0)
2995 1.58 dyoung tsb->tsb_tx_timer = 5;
2996 1.42 dyoung *tsbp = NULL;
2997 1.42 dyoung *tdbp = NULL;
2998 1.42 dyoung return -1;
2999 1.42 dyoung }
3000 1.42 dyoung *tsbp = tsb;
3001 1.42 dyoung *tdbp = tdb;
3002 1.42 dyoung return 0;
3003 1.42 dyoung }
3004 1.42 dyoung
3005 1.61 perry static inline struct mbuf *
3006 1.42 dyoung rtw_80211_dequeue(struct rtw_softc *sc, struct ifqueue *ifq, int pri,
3007 1.42 dyoung struct rtw_txsoft_blk **tsbp, struct rtw_txdesc_blk **tdbp,
3008 1.42 dyoung struct ieee80211_node **nip, short *if_flagsp)
3009 1.42 dyoung {
3010 1.42 dyoung struct mbuf *m;
3011 1.42 dyoung
3012 1.42 dyoung if (IF_IS_EMPTY(ifq))
3013 1.42 dyoung return NULL;
3014 1.42 dyoung if (rtw_txring_choose(sc, tsbp, tdbp, pri) == -1) {
3015 1.58 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_RSRC, ("%s: no ring %d descriptor\n",
3016 1.58 dyoung __func__, pri));
3017 1.42 dyoung *if_flagsp |= IFF_OACTIVE;
3018 1.58 dyoung sc->sc_if.if_timer = 1;
3019 1.42 dyoung return NULL;
3020 1.42 dyoung }
3021 1.42 dyoung IF_DEQUEUE(ifq, m);
3022 1.42 dyoung *nip = (struct ieee80211_node *)m->m_pkthdr.rcvif;
3023 1.42 dyoung m->m_pkthdr.rcvif = NULL;
3024 1.48 dyoung KASSERT(*nip != NULL);
3025 1.42 dyoung return m;
3026 1.42 dyoung }
3027 1.42 dyoung
3028 1.34 dyoung /* Point *mp at the next 802.11 frame to transmit. Point *tsbp
3029 1.1 dyoung * at the driver's selection of transmit control block for the packet.
3030 1.1 dyoung */
3031 1.61 perry static inline int
3032 1.34 dyoung rtw_dequeue(struct ifnet *ifp, struct rtw_txsoft_blk **tsbp,
3033 1.34 dyoung struct rtw_txdesc_blk **tdbp, struct mbuf **mp,
3034 1.1 dyoung struct ieee80211_node **nip)
3035 1.1 dyoung {
3036 1.48 dyoung int pri;
3037 1.48 dyoung struct ether_header *eh;
3038 1.1 dyoung struct mbuf *m0;
3039 1.1 dyoung struct rtw_softc *sc;
3040 1.42 dyoung short *if_flagsp;
3041 1.1 dyoung
3042 1.84 dyoung *mp = NULL;
3043 1.84 dyoung
3044 1.1 dyoung sc = (struct rtw_softc *)ifp->if_softc;
3045 1.1 dyoung
3046 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
3047 1.98 dyoung ("%s: enter %s\n", device_xname(sc->sc_dev), __func__));
3048 1.1 dyoung
3049 1.42 dyoung if_flagsp = &ifp->if_flags;
3050 1.5 dyoung
3051 1.42 dyoung if (sc->sc_ic.ic_state == IEEE80211_S_RUN &&
3052 1.42 dyoung (*mp = rtw_80211_dequeue(sc, &sc->sc_beaconq, RTW_TXPRIBCN, tsbp,
3053 1.42 dyoung tdbp, nip, if_flagsp)) != NULL) {
3054 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue beacon frame\n",
3055 1.42 dyoung __func__));
3056 1.5 dyoung return 0;
3057 1.5 dyoung }
3058 1.5 dyoung
3059 1.42 dyoung if ((*mp = rtw_80211_dequeue(sc, &sc->sc_ic.ic_mgtq, RTW_TXPRIMD, tsbp,
3060 1.42 dyoung tdbp, nip, if_flagsp)) != NULL) {
3061 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue mgt frame\n",
3062 1.42 dyoung __func__));
3063 1.42 dyoung return 0;
3064 1.42 dyoung }
3065 1.5 dyoung
3066 1.42 dyoung if (sc->sc_ic.ic_state != IEEE80211_S_RUN) {
3067 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: not running\n", __func__));
3068 1.1 dyoung return 0;
3069 1.42 dyoung }
3070 1.42 dyoung
3071 1.48 dyoung IFQ_POLL(&ifp->if_snd, m0);
3072 1.48 dyoung if (m0 == NULL) {
3073 1.48 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no frame ready\n",
3074 1.42 dyoung __func__));
3075 1.42 dyoung return 0;
3076 1.42 dyoung }
3077 1.42 dyoung
3078 1.48 dyoung pri = ((m0->m_flags & M_PWR_SAV) != 0) ? RTW_TXPRIHI : RTW_TXPRIMD;
3079 1.48 dyoung
3080 1.48 dyoung if (rtw_txring_choose(sc, tsbp, tdbp, pri) == -1) {
3081 1.58 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_RSRC, ("%s: no ring %d descriptor\n",
3082 1.58 dyoung __func__, pri));
3083 1.42 dyoung *if_flagsp |= IFF_OACTIVE;
3084 1.58 dyoung sc->sc_if.if_timer = 1;
3085 1.42 dyoung return 0;
3086 1.42 dyoung }
3087 1.42 dyoung
3088 1.42 dyoung IFQ_DEQUEUE(&ifp->if_snd, m0);
3089 1.42 dyoung if (m0 == NULL) {
3090 1.48 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no frame ready\n",
3091 1.42 dyoung __func__));
3092 1.42 dyoung return 0;
3093 1.42 dyoung }
3094 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue data frame\n", __func__));
3095 1.42 dyoung ifp->if_opackets++;
3096 1.1 dyoung #if NBPFILTER > 0
3097 1.42 dyoung if (ifp->if_bpf)
3098 1.42 dyoung bpf_mtap(ifp->if_bpf, m0);
3099 1.1 dyoung #endif
3100 1.48 dyoung eh = mtod(m0, struct ether_header *);
3101 1.48 dyoung *nip = ieee80211_find_txnode(&sc->sc_ic, eh->ether_dhost);
3102 1.48 dyoung if (*nip == NULL) {
3103 1.48 dyoung /* NB: ieee80211_find_txnode does stat+msg */
3104 1.48 dyoung m_freem(m0);
3105 1.48 dyoung return -1;
3106 1.48 dyoung }
3107 1.48 dyoung if ((m0 = ieee80211_encap(&sc->sc_ic, m0, *nip)) == NULL) {
3108 1.48 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: encap error\n", __func__));
3109 1.42 dyoung ifp->if_oerrors++;
3110 1.42 dyoung return -1;
3111 1.1 dyoung }
3112 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
3113 1.1 dyoung *mp = m0;
3114 1.1 dyoung return 0;
3115 1.1 dyoung }
3116 1.1 dyoung
3117 1.21 dyoung static int
3118 1.21 dyoung rtw_seg_too_short(bus_dmamap_t dmamap)
3119 1.21 dyoung {
3120 1.21 dyoung int i;
3121 1.21 dyoung for (i = 0; i < dmamap->dm_nsegs; i++) {
3122 1.83 dyoung if (dmamap->dm_segs[i].ds_len < 4)
3123 1.21 dyoung return 1;
3124 1.21 dyoung }
3125 1.21 dyoung return 0;
3126 1.21 dyoung }
3127 1.21 dyoung
3128 1.5 dyoung /* TBD factor with atw_start */
3129 1.5 dyoung static struct mbuf *
3130 1.5 dyoung rtw_dmamap_load_txbuf(bus_dma_tag_t dmat, bus_dmamap_t dmam, struct mbuf *chain,
3131 1.98 dyoung u_int ndescfree, device_t dev)
3132 1.5 dyoung {
3133 1.5 dyoung int first, rc;
3134 1.5 dyoung struct mbuf *m, *m0;
3135 1.5 dyoung
3136 1.5 dyoung m0 = chain;
3137 1.5 dyoung
3138 1.5 dyoung /*
3139 1.5 dyoung * Load the DMA map. Copy and try (once) again if the packet
3140 1.5 dyoung * didn't fit in the alloted number of segments.
3141 1.5 dyoung */
3142 1.5 dyoung for (first = 1;
3143 1.5 dyoung ((rc = bus_dmamap_load_mbuf(dmat, dmam, m0,
3144 1.5 dyoung BUS_DMA_WRITE|BUS_DMA_NOWAIT)) != 0 ||
3145 1.21 dyoung dmam->dm_nsegs > ndescfree || rtw_seg_too_short(dmam)) && first;
3146 1.5 dyoung first = 0) {
3147 1.83 dyoung if (rc == 0) {
3148 1.83 dyoung #ifdef RTW_DIAGxxx
3149 1.83 dyoung if (rtw_seg_too_short(dmam)) {
3150 1.83 dyoung printf("%s: short segment, mbuf lengths:", __func__);
3151 1.83 dyoung for (m = m0; m; m = m->m_next)
3152 1.83 dyoung printf(" %d", m->m_len);
3153 1.83 dyoung printf("\n");
3154 1.83 dyoung }
3155 1.83 dyoung #endif
3156 1.5 dyoung bus_dmamap_unload(dmat, dmam);
3157 1.83 dyoung }
3158 1.5 dyoung MGETHDR(m, M_DONTWAIT, MT_DATA);
3159 1.5 dyoung if (m == NULL) {
3160 1.98 dyoung aprint_error_dev(dev, "unable to allocate Tx mbuf\n");
3161 1.5 dyoung break;
3162 1.5 dyoung }
3163 1.5 dyoung if (m0->m_pkthdr.len > MHLEN) {
3164 1.5 dyoung MCLGET(m, M_DONTWAIT);
3165 1.5 dyoung if ((m->m_flags & M_EXT) == 0) {
3166 1.98 dyoung aprint_error_dev(dev,
3167 1.98 dyoung "cannot allocate Tx cluster\n");
3168 1.5 dyoung m_freem(m);
3169 1.5 dyoung break;
3170 1.5 dyoung }
3171 1.5 dyoung }
3172 1.85 christos m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, void *));
3173 1.5 dyoung m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
3174 1.5 dyoung m_freem(m0);
3175 1.5 dyoung m0 = m;
3176 1.5 dyoung m = NULL;
3177 1.5 dyoung }
3178 1.5 dyoung if (rc != 0) {
3179 1.98 dyoung aprint_error_dev(dev, "cannot load Tx buffer, rc = %d\n", rc);
3180 1.5 dyoung m_freem(m0);
3181 1.5 dyoung return NULL;
3182 1.21 dyoung } else if (rtw_seg_too_short(dmam)) {
3183 1.98 dyoung aprint_error_dev(dev,
3184 1.98 dyoung "cannot load Tx buffer, segment too short\n");
3185 1.21 dyoung bus_dmamap_unload(dmat, dmam);
3186 1.21 dyoung m_freem(m0);
3187 1.21 dyoung return NULL;
3188 1.5 dyoung } else if (dmam->dm_nsegs > ndescfree) {
3189 1.98 dyoung aprint_error_dev(dev, "too many tx segments\n");
3190 1.5 dyoung bus_dmamap_unload(dmat, dmam);
3191 1.5 dyoung m_freem(m0);
3192 1.5 dyoung return NULL;
3193 1.5 dyoung }
3194 1.5 dyoung return m0;
3195 1.5 dyoung }
3196 1.5 dyoung
3197 1.21 dyoung #ifdef RTW_DEBUG
3198 1.1 dyoung static void
3199 1.16 dyoung rtw_print_txdesc(struct rtw_softc *sc, const char *action,
3200 1.34 dyoung struct rtw_txsoft *ts, struct rtw_txdesc_blk *tdb, int desc)
3201 1.16 dyoung {
3202 1.34 dyoung struct rtw_txdesc *td = &tdb->tdb_desc[desc];
3203 1.58 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_DESC, ("%s: %p %s txdesc[%d] next %#08x "
3204 1.58 dyoung "buf %#08x ctl0 %#08x ctl1 %#08x len %#08x\n",
3205 1.98 dyoung device_xname(sc->sc_dev), ts, action, desc,
3206 1.58 dyoung le32toh(td->td_buf), le32toh(td->td_next),
3207 1.58 dyoung le32toh(td->td_ctl0), le32toh(td->td_ctl1),
3208 1.34 dyoung le32toh(td->td_len)));
3209 1.16 dyoung }
3210 1.21 dyoung #endif /* RTW_DEBUG */
3211 1.16 dyoung
3212 1.16 dyoung static void
3213 1.1 dyoung rtw_start(struct ifnet *ifp)
3214 1.1 dyoung {
3215 1.10 dyoung uint8_t tppoll;
3216 1.5 dyoung int desc, i, lastdesc, npkt, rate;
3217 1.14 dyoung uint32_t proto_ctl0, ctl0, ctl1;
3218 1.5 dyoung bus_dmamap_t dmamap;
3219 1.5 dyoung struct ieee80211com *ic;
3220 1.5 dyoung struct ieee80211_duration *d0;
3221 1.49 dyoung struct ieee80211_frame_min *wh;
3222 1.73 christos struct ieee80211_node *ni = NULL; /* XXX: GCC */
3223 1.5 dyoung struct mbuf *m0;
3224 1.5 dyoung struct rtw_softc *sc;
3225 1.73 christos struct rtw_txsoft_blk *tsb = NULL; /* XXX: GCC */
3226 1.73 christos struct rtw_txdesc_blk *tdb = NULL; /* XXX: GCC */
3227 1.34 dyoung struct rtw_txsoft *ts;
3228 1.34 dyoung struct rtw_txdesc *td;
3229 1.49 dyoung struct ieee80211_key *k;
3230 1.1 dyoung
3231 1.1 dyoung sc = (struct rtw_softc *)ifp->if_softc;
3232 1.5 dyoung ic = &sc->sc_ic;
3233 1.1 dyoung
3234 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
3235 1.98 dyoung ("%s: enter %s\n", device_xname(sc->sc_dev), __func__));
3236 1.5 dyoung
3237 1.31 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
3238 1.31 dyoung goto out;
3239 1.31 dyoung
3240 1.5 dyoung /* XXX do real rate control */
3241 1.14 dyoung proto_ctl0 = RTW_TXCTL0_RTSRATE_1MBPS;
3242 1.5 dyoung
3243 1.5 dyoung if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0)
3244 1.14 dyoung proto_ctl0 |= RTW_TXCTL0_SPLCP;
3245 1.5 dyoung
3246 1.5 dyoung for (;;) {
3247 1.34 dyoung if (rtw_dequeue(ifp, &tsb, &tdb, &m0, &ni) == -1)
3248 1.1 dyoung continue;
3249 1.1 dyoung if (m0 == NULL)
3250 1.1 dyoung break;
3251 1.49 dyoung
3252 1.49 dyoung wh = mtod(m0, struct ieee80211_frame_min *);
3253 1.49 dyoung
3254 1.49 dyoung if ((wh->i_fc[1] & IEEE80211_FC1_WEP) != 0 &&
3255 1.49 dyoung (k = ieee80211_crypto_encap(ic, ni, m0)) == NULL) {
3256 1.51 dyoung m_freem(m0);
3257 1.49 dyoung break;
3258 1.49 dyoung } else
3259 1.49 dyoung k = NULL;
3260 1.49 dyoung
3261 1.34 dyoung ts = SIMPLEQ_FIRST(&tsb->tsb_freeq);
3262 1.5 dyoung
3263 1.34 dyoung dmamap = ts->ts_dmamap;
3264 1.5 dyoung
3265 1.5 dyoung m0 = rtw_dmamap_load_txbuf(sc->sc_dmat, dmamap, m0,
3266 1.98 dyoung tdb->tdb_nfree, sc->sc_dev);
3267 1.5 dyoung
3268 1.5 dyoung if (m0 == NULL || dmamap->dm_nsegs == 0) {
3269 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
3270 1.21 dyoung ("%s: fail dmamap load\n", __func__));
3271 1.5 dyoung goto post_dequeue_err;
3272 1.5 dyoung }
3273 1.5 dyoung
3274 1.49 dyoung /* Note well: rtw_dmamap_load_txbuf may have created
3275 1.49 dyoung * a new chain, so we must find the header once
3276 1.49 dyoung * more.
3277 1.49 dyoung */
3278 1.49 dyoung wh = mtod(m0, struct ieee80211_frame_min *);
3279 1.45 dyoung
3280 1.45 dyoung /* XXX do real rate control */
3281 1.45 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
3282 1.45 dyoung IEEE80211_FC0_TYPE_MGT)
3283 1.45 dyoung rate = 2;
3284 1.45 dyoung else
3285 1.72 dyoung rate = MAX(2, ieee80211_get_rate(ni));
3286 1.45 dyoung
3287 1.16 dyoung #ifdef RTW_DEBUG
3288 1.48 dyoung if ((ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) ==
3289 1.16 dyoung (IFF_DEBUG|IFF_LINK2)) {
3290 1.16 dyoung ieee80211_dump_pkt(mtod(m0, uint8_t *),
3291 1.16 dyoung (dmamap->dm_nsegs == 1) ? m0->m_pkthdr.len
3292 1.16 dyoung : sizeof(wh),
3293 1.16 dyoung rate, 0);
3294 1.16 dyoung }
3295 1.16 dyoung #endif /* RTW_DEBUG */
3296 1.14 dyoung ctl0 = proto_ctl0 |
3297 1.75 dyoung __SHIFTIN(m0->m_pkthdr.len, RTW_TXCTL0_TPKTSIZE_MASK);
3298 1.5 dyoung
3299 1.45 dyoung switch (rate) {
3300 1.42 dyoung default:
3301 1.42 dyoung case 2:
3302 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_1MBPS;
3303 1.42 dyoung break;
3304 1.42 dyoung case 4:
3305 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_2MBPS;
3306 1.42 dyoung break;
3307 1.42 dyoung case 11:
3308 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_5MBPS;
3309 1.42 dyoung break;
3310 1.42 dyoung case 22:
3311 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_11MBPS;
3312 1.42 dyoung break;
3313 1.42 dyoung }
3314 1.45 dyoung /* XXX >= ? Compare after fragmentation? */
3315 1.45 dyoung if (m0->m_pkthdr.len > ic->ic_rtsthreshold)
3316 1.45 dyoung ctl0 |= RTW_TXCTL0_RTSEN;
3317 1.45 dyoung
3318 1.66 dyoung /* XXX Sometimes writes a bogus keyid; h/w doesn't
3319 1.66 dyoung * seem to care, since we don't activate h/w Tx
3320 1.66 dyoung * encryption.
3321 1.66 dyoung */
3322 1.49 dyoung if (k != NULL) {
3323 1.75 dyoung ctl0 |= __SHIFTIN(k->wk_keyix, RTW_TXCTL0_KEYID_MASK) &
3324 1.49 dyoung RTW_TXCTL0_KEYID_MASK;
3325 1.49 dyoung }
3326 1.42 dyoung
3327 1.45 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
3328 1.45 dyoung IEEE80211_FC0_TYPE_MGT) {
3329 1.45 dyoung ctl0 &= ~(RTW_TXCTL0_SPLCP | RTW_TXCTL0_RTSEN);
3330 1.45 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
3331 1.45 dyoung IEEE80211_FC0_SUBTYPE_BEACON)
3332 1.45 dyoung ctl0 |= RTW_TXCTL0_BEACON;
3333 1.45 dyoung }
3334 1.45 dyoung
3335 1.62 dyoung if (ieee80211_compute_duration(wh, k, m0->m_pkthdr.len,
3336 1.5 dyoung ic->ic_flags, ic->ic_fragthreshold,
3337 1.34 dyoung rate, &ts->ts_d0, &ts->ts_dn, &npkt,
3338 1.48 dyoung (ifp->if_flags & (IFF_DEBUG|IFF_LINK2)) ==
3339 1.19 dyoung (IFF_DEBUG|IFF_LINK2)) == -1) {
3340 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
3341 1.21 dyoung ("%s: fail compute duration\n", __func__));
3342 1.5 dyoung goto post_load_err;
3343 1.5 dyoung }
3344 1.5 dyoung
3345 1.34 dyoung d0 = &ts->ts_d0;
3346 1.5 dyoung
3347 1.20 dyoung *(uint16_t*)wh->i_dur = htole16(d0->d_data_dur);
3348 1.20 dyoung
3349 1.75 dyoung ctl1 = __SHIFTIN(d0->d_plcp_len, RTW_TXCTL1_LENGTH_MASK) |
3350 1.75 dyoung __SHIFTIN(d0->d_rts_dur, RTW_TXCTL1_RTSDUR_MASK);
3351 1.5 dyoung
3352 1.25 mycroft if (d0->d_residue)
3353 1.14 dyoung ctl1 |= RTW_TXCTL1_LENGEXT;
3354 1.5 dyoung
3355 1.5 dyoung /* TBD fragmentation */
3356 1.5 dyoung
3357 1.34 dyoung ts->ts_first = tdb->tdb_next;
3358 1.5 dyoung
3359 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, dmamap->dm_nsegs,
3360 1.5 dyoung BUS_DMASYNC_PREWRITE);
3361 1.5 dyoung
3362 1.34 dyoung KASSERT(ts->ts_first < tdb->tdb_ndesc);
3363 1.21 dyoung
3364 1.32 dyoung #if NBPFILTER > 0
3365 1.32 dyoung if (ic->ic_rawbpf != NULL)
3366 1.85 christos bpf_mtap((void *)ic->ic_rawbpf, m0);
3367 1.32 dyoung
3368 1.32 dyoung if (sc->sc_radiobpf != NULL) {
3369 1.32 dyoung struct rtw_tx_radiotap_header *rt = &sc->sc_txtap;
3370 1.32 dyoung
3371 1.32 dyoung rt->rt_rate = rate;
3372 1.32 dyoung
3373 1.85 christos bpf_mtap2(sc->sc_radiobpf, (void *)rt,
3374 1.32 dyoung sizeof(sc->sc_txtapu), m0);
3375 1.32 dyoung }
3376 1.90 scw #endif /* NBPFILTER > 0 */
3377 1.32 dyoung
3378 1.34 dyoung for (i = 0, lastdesc = desc = ts->ts_first;
3379 1.5 dyoung i < dmamap->dm_nsegs;
3380 1.34 dyoung i++, desc = RTW_NEXT_IDX(tdb, desc)) {
3381 1.5 dyoung if (dmamap->dm_segs[i].ds_len > RTW_TXLEN_LENGTH_MASK) {
3382 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
3383 1.21 dyoung ("%s: seg too long\n", __func__));
3384 1.5 dyoung goto post_load_err;
3385 1.5 dyoung }
3386 1.34 dyoung td = &tdb->tdb_desc[desc];
3387 1.34 dyoung td->td_ctl0 = htole32(ctl0);
3388 1.34 dyoung td->td_ctl1 = htole32(ctl1);
3389 1.34 dyoung td->td_buf = htole32(dmamap->dm_segs[i].ds_addr);
3390 1.34 dyoung td->td_len = htole32(dmamap->dm_segs[i].ds_len);
3391 1.92 dyoung td->td_next = htole32(RTW_NEXT_DESC(tdb, desc));
3392 1.92 dyoung if (i != 0)
3393 1.92 dyoung td->td_ctl0 |= htole32(RTW_TXCTL0_OWN);
3394 1.5 dyoung lastdesc = desc;
3395 1.16 dyoung #ifdef RTW_DEBUG
3396 1.34 dyoung rtw_print_txdesc(sc, "load", ts, tdb, desc);
3397 1.16 dyoung #endif /* RTW_DEBUG */
3398 1.5 dyoung }
3399 1.5 dyoung
3400 1.34 dyoung KASSERT(desc < tdb->tdb_ndesc);
3401 1.21 dyoung
3402 1.34 dyoung ts->ts_ni = ni;
3403 1.48 dyoung KASSERT(ni != NULL);
3404 1.34 dyoung ts->ts_mbuf = m0;
3405 1.34 dyoung ts->ts_last = lastdesc;
3406 1.34 dyoung tdb->tdb_desc[ts->ts_last].td_ctl0 |= htole32(RTW_TXCTL0_LS);
3407 1.34 dyoung tdb->tdb_desc[ts->ts_first].td_ctl0 |=
3408 1.5 dyoung htole32(RTW_TXCTL0_FS);
3409 1.5 dyoung
3410 1.16 dyoung #ifdef RTW_DEBUG
3411 1.34 dyoung rtw_print_txdesc(sc, "FS on", ts, tdb, ts->ts_first);
3412 1.34 dyoung rtw_print_txdesc(sc, "LS on", ts, tdb, ts->ts_last);
3413 1.16 dyoung #endif /* RTW_DEBUG */
3414 1.5 dyoung
3415 1.34 dyoung tdb->tdb_nfree -= dmamap->dm_nsegs;
3416 1.34 dyoung tdb->tdb_next = desc;
3417 1.5 dyoung
3418 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, dmamap->dm_nsegs,
3419 1.5 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3420 1.5 dyoung
3421 1.34 dyoung tdb->tdb_desc[ts->ts_first].td_ctl0 |=
3422 1.5 dyoung htole32(RTW_TXCTL0_OWN);
3423 1.5 dyoung
3424 1.16 dyoung #ifdef RTW_DEBUG
3425 1.34 dyoung rtw_print_txdesc(sc, "OWN on", ts, tdb, ts->ts_first);
3426 1.16 dyoung #endif /* RTW_DEBUG */
3427 1.5 dyoung
3428 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, 1,
3429 1.5 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3430 1.5 dyoung
3431 1.34 dyoung SIMPLEQ_REMOVE_HEAD(&tsb->tsb_freeq, ts_q);
3432 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_dirtyq, ts, ts_q);
3433 1.5 dyoung
3434 1.58 dyoung if (tsb != &sc->sc_txsoft_blk[RTW_TXPRIBCN])
3435 1.42 dyoung sc->sc_led_state.ls_event |= RTW_LED_S_TX;
3436 1.58 dyoung tsb->tsb_tx_timer = 5;
3437 1.58 dyoung ifp->if_timer = 1;
3438 1.10 dyoung tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
3439 1.45 dyoung tppoll &= ~RTW_TPPOLL_SALL;
3440 1.45 dyoung tppoll |= tsb->tsb_poll & RTW_TPPOLL_ALL;
3441 1.45 dyoung RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, tppoll);
3442 1.9 dyoung RTW_SYNC(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL);
3443 1.1 dyoung }
3444 1.31 dyoung out:
3445 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
3446 1.5 dyoung return;
3447 1.5 dyoung post_load_err:
3448 1.5 dyoung bus_dmamap_unload(sc->sc_dmat, dmamap);
3449 1.5 dyoung m_freem(m0);
3450 1.5 dyoung post_dequeue_err:
3451 1.48 dyoung ieee80211_free_node(ni);
3452 1.1 dyoung return;
3453 1.1 dyoung }
3454 1.1 dyoung
3455 1.1 dyoung static void
3456 1.58 dyoung rtw_idle(struct rtw_regs *regs)
3457 1.58 dyoung {
3458 1.58 dyoung int active;
3459 1.100 dyoung uint8_t tppoll;
3460 1.58 dyoung
3461 1.58 dyoung /* request stop DMA; wait for packets to stop transmitting. */
3462 1.58 dyoung
3463 1.58 dyoung RTW_WRITE8(regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
3464 1.58 dyoung RTW_WBR(regs, RTW_TPPOLL, RTW_TPPOLL);
3465 1.58 dyoung
3466 1.58 dyoung for (active = 0; active < 300 &&
3467 1.100 dyoung (tppoll = RTW_READ8(regs, RTW_TPPOLL) & RTW_TPPOLL_ACTIVE) != 0;
3468 1.100 dyoung active++)
3469 1.58 dyoung DELAY(10);
3470 1.100 dyoung printf("%s: transmit DMA idle in %dus, tppoll %02" PRIx8 "\n", __func__,
3471 1.100 dyoung active * 10, tppoll);
3472 1.58 dyoung }
3473 1.58 dyoung
3474 1.58 dyoung static void
3475 1.1 dyoung rtw_watchdog(struct ifnet *ifp)
3476 1.1 dyoung {
3477 1.58 dyoung int pri, tx_timeouts = 0;
3478 1.5 dyoung struct rtw_softc *sc;
3479 1.34 dyoung struct rtw_txsoft_blk *tsb;
3480 1.5 dyoung
3481 1.5 dyoung sc = ifp->if_softc;
3482 1.5 dyoung
3483 1.5 dyoung ifp->if_timer = 0;
3484 1.5 dyoung
3485 1.101 dyoung if (!device_is_active(sc->sc_dev))
3486 1.5 dyoung return;
3487 1.5 dyoung
3488 1.5 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3489 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
3490 1.5 dyoung
3491 1.34 dyoung if (tsb->tsb_tx_timer == 0)
3492 1.5 dyoung continue;
3493 1.58 dyoung else if (--tsb->tsb_tx_timer == 0) {
3494 1.34 dyoung if (SIMPLEQ_EMPTY(&tsb->tsb_dirtyq))
3495 1.5 dyoung continue;
3496 1.5 dyoung printf("%s: transmit timeout, priority %d\n",
3497 1.5 dyoung ifp->if_xname, pri);
3498 1.5 dyoung ifp->if_oerrors++;
3499 1.83 dyoung if (pri != RTW_TXPRIBCN)
3500 1.83 dyoung tx_timeouts++;
3501 1.5 dyoung } else
3502 1.5 dyoung ifp->if_timer = 1;
3503 1.5 dyoung }
3504 1.58 dyoung
3505 1.58 dyoung if (tx_timeouts > 0) {
3506 1.58 dyoung /* Stop Tx DMA, disable xmtr, flush Tx rings, enable xmtr,
3507 1.58 dyoung * reset s/w tx-ring pointers, and start transmission.
3508 1.58 dyoung *
3509 1.58 dyoung * TBD Stop/restart just the broken rings?
3510 1.58 dyoung */
3511 1.58 dyoung rtw_idle(&sc->sc_regs);
3512 1.83 dyoung rtw_io_enable(sc, RTW_CR_TE, 0);
3513 1.58 dyoung rtw_txdescs_reset(sc);
3514 1.83 dyoung rtw_io_enable(sc, RTW_CR_TE, 1);
3515 1.58 dyoung rtw_start(ifp);
3516 1.58 dyoung }
3517 1.48 dyoung ieee80211_watchdog(&sc->sc_ic);
3518 1.1 dyoung return;
3519 1.1 dyoung }
3520 1.1 dyoung
3521 1.1 dyoung static void
3522 1.1 dyoung rtw_next_scan(void *arg)
3523 1.1 dyoung {
3524 1.1 dyoung struct ieee80211com *ic = arg;
3525 1.1 dyoung int s;
3526 1.1 dyoung
3527 1.1 dyoung /* don't call rtw_start w/o network interrupts blocked */
3528 1.1 dyoung s = splnet();
3529 1.1 dyoung if (ic->ic_state == IEEE80211_S_SCAN)
3530 1.1 dyoung ieee80211_next_scan(ic);
3531 1.1 dyoung splx(s);
3532 1.1 dyoung }
3533 1.1 dyoung
3534 1.10 dyoung static void
3535 1.45 dyoung rtw_join_bss(struct rtw_softc *sc, uint8_t *bssid, uint16_t intval0)
3536 1.10 dyoung {
3537 1.58 dyoung uint16_t bcnitv, bintritv, intval;
3538 1.10 dyoung int i;
3539 1.10 dyoung struct rtw_regs *regs = &sc->sc_regs;
3540 1.10 dyoung
3541 1.10 dyoung for (i = 0; i < IEEE80211_ADDR_LEN; i++)
3542 1.10 dyoung RTW_WRITE8(regs, RTW_BSSID + i, bssid[i]);
3543 1.10 dyoung
3544 1.10 dyoung RTW_SYNC(regs, RTW_BSSID16, RTW_BSSID32);
3545 1.10 dyoung
3546 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
3547 1.10 dyoung
3548 1.75 dyoung intval = MIN(intval0, __SHIFTOUT_MASK(RTW_BCNITV_BCNITV_MASK));
3549 1.10 dyoung
3550 1.10 dyoung bcnitv = RTW_READ16(regs, RTW_BCNITV) & ~RTW_BCNITV_BCNITV_MASK;
3551 1.75 dyoung bcnitv |= __SHIFTIN(intval, RTW_BCNITV_BCNITV_MASK);
3552 1.10 dyoung RTW_WRITE16(regs, RTW_BCNITV, bcnitv);
3553 1.58 dyoung /* interrupt host 1ms before the TBTT */
3554 1.58 dyoung bintritv = RTW_READ16(regs, RTW_BINTRITV) & ~RTW_BINTRITV_BINTRITV;
3555 1.75 dyoung bintritv |= __SHIFTIN(1000, RTW_BINTRITV_BINTRITV);
3556 1.58 dyoung RTW_WRITE16(regs, RTW_BINTRITV, bintritv);
3557 1.10 dyoung /* magic from Linux */
3558 1.75 dyoung RTW_WRITE16(regs, RTW_ATIMWND, __SHIFTIN(1, RTW_ATIMWND_ATIMWND));
3559 1.75 dyoung RTW_WRITE16(regs, RTW_ATIMTRITV, __SHIFTIN(2, RTW_ATIMTRITV_ATIMTRITV));
3560 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
3561 1.10 dyoung
3562 1.83 dyoung rtw_io_enable(sc, RTW_CR_RE | RTW_CR_TE, 1);
3563 1.10 dyoung }
3564 1.10 dyoung
3565 1.1 dyoung /* Synchronize the hardware state with the software state. */
3566 1.1 dyoung static int
3567 1.1 dyoung rtw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
3568 1.1 dyoung {
3569 1.48 dyoung struct ifnet *ifp = ic->ic_ifp;
3570 1.48 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
3571 1.1 dyoung enum ieee80211_state ostate;
3572 1.1 dyoung int error;
3573 1.1 dyoung
3574 1.1 dyoung ostate = ic->ic_state;
3575 1.1 dyoung
3576 1.101 dyoung aprint_debug_dev(sc->sc_dev, "%s: l.%d\n", __func__, __LINE__);
3577 1.42 dyoung rtw_led_newstate(sc, nstate);
3578 1.42 dyoung
3579 1.101 dyoung aprint_debug_dev(sc->sc_dev, "%s: l.%d\n", __func__, __LINE__);
3580 1.1 dyoung if (nstate == IEEE80211_S_INIT) {
3581 1.1 dyoung callout_stop(&sc->sc_scan_ch);
3582 1.1 dyoung sc->sc_cur_chan = IEEE80211_CHAN_ANY;
3583 1.1 dyoung return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
3584 1.1 dyoung }
3585 1.1 dyoung
3586 1.1 dyoung if (ostate == IEEE80211_S_INIT && nstate != IEEE80211_S_INIT)
3587 1.1 dyoung rtw_pwrstate(sc, RTW_ON);
3588 1.1 dyoung
3589 1.1 dyoung if ((error = rtw_tune(sc)) != 0)
3590 1.1 dyoung return error;
3591 1.1 dyoung
3592 1.1 dyoung switch (nstate) {
3593 1.1 dyoung case IEEE80211_S_INIT:
3594 1.1 dyoung panic("%s: unexpected state IEEE80211_S_INIT\n", __func__);
3595 1.1 dyoung break;
3596 1.1 dyoung case IEEE80211_S_SCAN:
3597 1.21 dyoung if (ostate != IEEE80211_S_SCAN) {
3598 1.21 dyoung (void)memset(ic->ic_bss->ni_bssid, 0,
3599 1.21 dyoung IEEE80211_ADDR_LEN);
3600 1.45 dyoung rtw_set_nettype(sc, IEEE80211_M_MONITOR);
3601 1.21 dyoung }
3602 1.1 dyoung
3603 1.1 dyoung callout_reset(&sc->sc_scan_ch, rtw_dwelltime * hz / 1000,
3604 1.1 dyoung rtw_next_scan, ic);
3605 1.1 dyoung
3606 1.1 dyoung break;
3607 1.1 dyoung case IEEE80211_S_RUN:
3608 1.38 dyoung switch (ic->ic_opmode) {
3609 1.38 dyoung case IEEE80211_M_HOSTAP:
3610 1.38 dyoung case IEEE80211_M_IBSS:
3611 1.45 dyoung rtw_set_nettype(sc, IEEE80211_M_MONITOR);
3612 1.42 dyoung /*FALLTHROUGH*/
3613 1.42 dyoung case IEEE80211_M_AHDEMO:
3614 1.45 dyoung case IEEE80211_M_STA:
3615 1.45 dyoung rtw_join_bss(sc, ic->ic_bss->ni_bssid,
3616 1.38 dyoung ic->ic_bss->ni_intval);
3617 1.1 dyoung break;
3618 1.38 dyoung case IEEE80211_M_MONITOR:
3619 1.38 dyoung break;
3620 1.38 dyoung }
3621 1.45 dyoung rtw_set_nettype(sc, ic->ic_opmode);
3622 1.38 dyoung break;
3623 1.45 dyoung case IEEE80211_S_ASSOC:
3624 1.1 dyoung case IEEE80211_S_AUTH:
3625 1.1 dyoung break;
3626 1.1 dyoung }
3627 1.1 dyoung
3628 1.1 dyoung if (nstate != IEEE80211_S_SCAN)
3629 1.1 dyoung callout_stop(&sc->sc_scan_ch);
3630 1.1 dyoung
3631 1.1 dyoung return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
3632 1.1 dyoung }
3633 1.1 dyoung
3634 1.40 dyoung /* Extend a 32-bit TSF timestamp to a 64-bit timestamp. */
3635 1.40 dyoung static uint64_t
3636 1.40 dyoung rtw_tsf_extend(struct rtw_regs *regs, uint32_t rstamp)
3637 1.40 dyoung {
3638 1.40 dyoung uint32_t tsftl, tsfth;
3639 1.40 dyoung
3640 1.40 dyoung tsfth = RTW_READ(regs, RTW_TSFTRH);
3641 1.40 dyoung tsftl = RTW_READ(regs, RTW_TSFTRL);
3642 1.40 dyoung if (tsftl < rstamp) /* Compensate for rollover. */
3643 1.40 dyoung tsfth--;
3644 1.40 dyoung return ((uint64_t)tsfth << 32) | rstamp;
3645 1.40 dyoung }
3646 1.40 dyoung
3647 1.1 dyoung static void
3648 1.1 dyoung rtw_recv_mgmt(struct ieee80211com *ic, struct mbuf *m,
3649 1.37 dyoung struct ieee80211_node *ni, int subtype, int rssi, uint32_t rstamp)
3650 1.1 dyoung {
3651 1.48 dyoung struct ifnet *ifp = ic->ic_ifp;
3652 1.48 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
3653 1.1 dyoung
3654 1.40 dyoung (*sc->sc_mtbl.mt_recv_mgmt)(ic, m, ni, subtype, rssi, rstamp);
3655 1.40 dyoung
3656 1.1 dyoung switch (subtype) {
3657 1.1 dyoung case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
3658 1.1 dyoung case IEEE80211_FC0_SUBTYPE_BEACON:
3659 1.63 dyoung if (ic->ic_opmode == IEEE80211_M_IBSS &&
3660 1.101 dyoung ic->ic_state == IEEE80211_S_RUN &&
3661 1.101 dyoung device_is_active(sc->sc_dev)) {
3662 1.63 dyoung uint64_t tsf = rtw_tsf_extend(&sc->sc_regs, rstamp);
3663 1.63 dyoung if (le64toh(ni->ni_tstamp.tsf) >= tsf)
3664 1.63 dyoung (void)ieee80211_ibss_merge(ni);
3665 1.63 dyoung }
3666 1.1 dyoung break;
3667 1.1 dyoung default:
3668 1.1 dyoung break;
3669 1.1 dyoung }
3670 1.1 dyoung return;
3671 1.1 dyoung }
3672 1.1 dyoung
3673 1.1 dyoung static struct ieee80211_node *
3674 1.48 dyoung rtw_node_alloc(struct ieee80211_node_table *nt)
3675 1.1 dyoung {
3676 1.48 dyoung struct ifnet *ifp = nt->nt_ic->ic_ifp;
3677 1.48 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
3678 1.48 dyoung struct ieee80211_node *ni = (*sc->sc_mtbl.mt_node_alloc)(nt);
3679 1.1 dyoung
3680 1.21 dyoung DPRINTF(sc, RTW_DEBUG_NODE,
3681 1.98 dyoung ("%s: alloc node %p\n", device_xname(sc->sc_dev), ni));
3682 1.1 dyoung return ni;
3683 1.1 dyoung }
3684 1.1 dyoung
3685 1.1 dyoung static void
3686 1.48 dyoung rtw_node_free(struct ieee80211_node *ni)
3687 1.1 dyoung {
3688 1.48 dyoung struct ieee80211com *ic = ni->ni_ic;
3689 1.48 dyoung struct ifnet *ifp = ic->ic_ifp;
3690 1.48 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
3691 1.1 dyoung
3692 1.21 dyoung DPRINTF(sc, RTW_DEBUG_NODE,
3693 1.98 dyoung ("%s: freeing node %p %s\n", device_xname(sc->sc_dev), ni,
3694 1.1 dyoung ether_sprintf(ni->ni_bssid)));
3695 1.48 dyoung (*sc->sc_mtbl.mt_node_free)(ni);
3696 1.1 dyoung }
3697 1.1 dyoung
3698 1.1 dyoung static int
3699 1.1 dyoung rtw_media_change(struct ifnet *ifp)
3700 1.1 dyoung {
3701 1.1 dyoung int error;
3702 1.1 dyoung
3703 1.1 dyoung error = ieee80211_media_change(ifp);
3704 1.1 dyoung if (error == ENETRESET) {
3705 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
3706 1.1 dyoung (IFF_RUNNING|IFF_UP))
3707 1.1 dyoung rtw_init(ifp); /* XXX lose error */
3708 1.1 dyoung error = 0;
3709 1.1 dyoung }
3710 1.1 dyoung return error;
3711 1.1 dyoung }
3712 1.1 dyoung
3713 1.1 dyoung static void
3714 1.1 dyoung rtw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
3715 1.1 dyoung {
3716 1.1 dyoung struct rtw_softc *sc = ifp->if_softc;
3717 1.1 dyoung
3718 1.101 dyoung if (!device_is_active(sc->sc_dev)) {
3719 1.1 dyoung imr->ifm_active = IFM_IEEE80211 | IFM_NONE;
3720 1.1 dyoung imr->ifm_status = 0;
3721 1.1 dyoung return;
3722 1.1 dyoung }
3723 1.1 dyoung ieee80211_media_status(ifp, imr);
3724 1.1 dyoung }
3725 1.1 dyoung
3726 1.61 perry static inline void
3727 1.7 dyoung rtw_setifprops(struct ifnet *ifp, const char *dvname, void *softc)
3728 1.1 dyoung {
3729 1.98 dyoung (void)strlcpy(ifp->if_xname, dvname, IFNAMSIZ);
3730 1.1 dyoung ifp->if_softc = softc;
3731 1.1 dyoung ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST |
3732 1.1 dyoung IFF_NOTRAILERS;
3733 1.1 dyoung ifp->if_ioctl = rtw_ioctl;
3734 1.1 dyoung ifp->if_start = rtw_start;
3735 1.1 dyoung ifp->if_watchdog = rtw_watchdog;
3736 1.1 dyoung ifp->if_init = rtw_init;
3737 1.1 dyoung ifp->if_stop = rtw_stop;
3738 1.1 dyoung }
3739 1.1 dyoung
3740 1.61 perry static inline void
3741 1.1 dyoung rtw_set80211props(struct ieee80211com *ic)
3742 1.1 dyoung {
3743 1.1 dyoung int nrate;
3744 1.1 dyoung ic->ic_phytype = IEEE80211_T_DS;
3745 1.1 dyoung ic->ic_opmode = IEEE80211_M_STA;
3746 1.1 dyoung ic->ic_caps = IEEE80211_C_PMGT | IEEE80211_C_IBSS |
3747 1.49 dyoung IEEE80211_C_HOSTAP | IEEE80211_C_MONITOR;
3748 1.1 dyoung
3749 1.1 dyoung nrate = 0;
3750 1.12 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] =
3751 1.12 dyoung IEEE80211_RATE_BASIC | 2;
3752 1.12 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] =
3753 1.12 dyoung IEEE80211_RATE_BASIC | 4;
3754 1.1 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] = 11;
3755 1.1 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] = 22;
3756 1.1 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_nrates = nrate;
3757 1.1 dyoung }
3758 1.1 dyoung
3759 1.61 perry static inline void
3760 1.1 dyoung rtw_set80211methods(struct rtw_mtbl *mtbl, struct ieee80211com *ic)
3761 1.1 dyoung {
3762 1.1 dyoung mtbl->mt_newstate = ic->ic_newstate;
3763 1.1 dyoung ic->ic_newstate = rtw_newstate;
3764 1.1 dyoung
3765 1.1 dyoung mtbl->mt_recv_mgmt = ic->ic_recv_mgmt;
3766 1.1 dyoung ic->ic_recv_mgmt = rtw_recv_mgmt;
3767 1.1 dyoung
3768 1.1 dyoung mtbl->mt_node_free = ic->ic_node_free;
3769 1.1 dyoung ic->ic_node_free = rtw_node_free;
3770 1.1 dyoung
3771 1.1 dyoung mtbl->mt_node_alloc = ic->ic_node_alloc;
3772 1.1 dyoung ic->ic_node_alloc = rtw_node_alloc;
3773 1.49 dyoung
3774 1.49 dyoung ic->ic_crypto.cs_key_delete = rtw_key_delete;
3775 1.49 dyoung ic->ic_crypto.cs_key_set = rtw_key_set;
3776 1.49 dyoung ic->ic_crypto.cs_key_update_begin = rtw_key_update_begin;
3777 1.49 dyoung ic->ic_crypto.cs_key_update_end = rtw_key_update_end;
3778 1.1 dyoung }
3779 1.1 dyoung
3780 1.61 perry static inline void
3781 1.1 dyoung rtw_init_radiotap(struct rtw_softc *sc)
3782 1.1 dyoung {
3783 1.93 dyoung uint32_t present;
3784 1.93 dyoung
3785 1.1 dyoung memset(&sc->sc_rxtapu, 0, sizeof(sc->sc_rxtapu));
3786 1.32 dyoung sc->sc_rxtap.rr_ihdr.it_len = htole16(sizeof(sc->sc_rxtapu));
3787 1.93 dyoung
3788 1.93 dyoung if (sc->sc_rfchipid == RTW_RFCHIPID_PHILIPS)
3789 1.93 dyoung present = htole32(RTW_PHILIPS_RX_RADIOTAP_PRESENT);
3790 1.93 dyoung else
3791 1.93 dyoung present = htole32(RTW_RX_RADIOTAP_PRESENT);
3792 1.93 dyoung sc->sc_rxtap.rr_ihdr.it_present = present;
3793 1.1 dyoung
3794 1.1 dyoung memset(&sc->sc_txtapu, 0, sizeof(sc->sc_txtapu));
3795 1.32 dyoung sc->sc_txtap.rt_ihdr.it_len = htole16(sizeof(sc->sc_txtapu));
3796 1.32 dyoung sc->sc_txtap.rt_ihdr.it_present = htole32(RTW_TX_RADIOTAP_PRESENT);
3797 1.1 dyoung }
3798 1.1 dyoung
3799 1.1 dyoung static int
3800 1.34 dyoung rtw_txsoft_blk_setup(struct rtw_txsoft_blk *tsb, u_int qlen)
3801 1.1 dyoung {
3802 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_dirtyq);
3803 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_freeq);
3804 1.34 dyoung tsb->tsb_ndesc = qlen;
3805 1.34 dyoung tsb->tsb_desc = malloc(qlen * sizeof(*tsb->tsb_desc), M_DEVBUF,
3806 1.1 dyoung M_NOWAIT);
3807 1.34 dyoung if (tsb->tsb_desc == NULL)
3808 1.1 dyoung return ENOMEM;
3809 1.1 dyoung return 0;
3810 1.1 dyoung }
3811 1.1 dyoung
3812 1.1 dyoung static void
3813 1.34 dyoung rtw_txsoft_blk_cleanup_all(struct rtw_softc *sc)
3814 1.1 dyoung {
3815 1.21 dyoung int pri;
3816 1.34 dyoung struct rtw_txsoft_blk *tsb;
3817 1.1 dyoung
3818 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3819 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
3820 1.34 dyoung free(tsb->tsb_desc, M_DEVBUF);
3821 1.34 dyoung tsb->tsb_desc = NULL;
3822 1.1 dyoung }
3823 1.1 dyoung }
3824 1.1 dyoung
3825 1.1 dyoung static int
3826 1.34 dyoung rtw_txsoft_blk_setup_all(struct rtw_softc *sc)
3827 1.1 dyoung {
3828 1.1 dyoung int pri, rc = 0;
3829 1.1 dyoung int qlen[RTW_NTXPRI] =
3830 1.1 dyoung {RTW_TXQLENLO, RTW_TXQLENMD, RTW_TXQLENHI, RTW_TXQLENBCN};
3831 1.42 dyoung struct rtw_txsoft_blk *tsbs;
3832 1.42 dyoung
3833 1.42 dyoung tsbs = sc->sc_txsoft_blk;
3834 1.1 dyoung
3835 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3836 1.42 dyoung rc = rtw_txsoft_blk_setup(&tsbs[pri], qlen[pri]);
3837 1.1 dyoung if (rc != 0)
3838 1.1 dyoung break;
3839 1.1 dyoung }
3840 1.42 dyoung tsbs[RTW_TXPRILO].tsb_poll = RTW_TPPOLL_LPQ | RTW_TPPOLL_SLPQ;
3841 1.42 dyoung tsbs[RTW_TXPRIMD].tsb_poll = RTW_TPPOLL_NPQ | RTW_TPPOLL_SNPQ;
3842 1.42 dyoung tsbs[RTW_TXPRIHI].tsb_poll = RTW_TPPOLL_HPQ | RTW_TPPOLL_SHPQ;
3843 1.42 dyoung tsbs[RTW_TXPRIBCN].tsb_poll = RTW_TPPOLL_BQ | RTW_TPPOLL_SBQ;
3844 1.1 dyoung return rc;
3845 1.1 dyoung }
3846 1.1 dyoung
3847 1.1 dyoung static void
3848 1.34 dyoung rtw_txdesc_blk_setup(struct rtw_txdesc_blk *tdb, struct rtw_txdesc *desc,
3849 1.1 dyoung u_int ndesc, bus_addr_t ofs, bus_addr_t physbase)
3850 1.1 dyoung {
3851 1.34 dyoung tdb->tdb_ndesc = ndesc;
3852 1.34 dyoung tdb->tdb_desc = desc;
3853 1.34 dyoung tdb->tdb_physbase = physbase;
3854 1.34 dyoung tdb->tdb_ofs = ofs;
3855 1.1 dyoung
3856 1.34 dyoung (void)memset(tdb->tdb_desc, 0,
3857 1.34 dyoung sizeof(tdb->tdb_desc[0]) * tdb->tdb_ndesc);
3858 1.1 dyoung
3859 1.58 dyoung rtw_txdesc_blk_init(tdb);
3860 1.58 dyoung tdb->tdb_next = 0;
3861 1.1 dyoung }
3862 1.1 dyoung
3863 1.1 dyoung static void
3864 1.1 dyoung rtw_txdesc_blk_setup_all(struct rtw_softc *sc)
3865 1.1 dyoung {
3866 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRILO],
3867 1.1 dyoung &sc->sc_descs->hd_txlo[0], RTW_NTXDESCLO,
3868 1.1 dyoung RTW_RING_OFFSET(hd_txlo), RTW_RING_BASE(sc, hd_txlo));
3869 1.1 dyoung
3870 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIMD],
3871 1.1 dyoung &sc->sc_descs->hd_txmd[0], RTW_NTXDESCMD,
3872 1.1 dyoung RTW_RING_OFFSET(hd_txmd), RTW_RING_BASE(sc, hd_txmd));
3873 1.1 dyoung
3874 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIHI],
3875 1.1 dyoung &sc->sc_descs->hd_txhi[0], RTW_NTXDESCHI,
3876 1.1 dyoung RTW_RING_OFFSET(hd_txhi), RTW_RING_BASE(sc, hd_txhi));
3877 1.1 dyoung
3878 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIBCN],
3879 1.1 dyoung &sc->sc_descs->hd_bcn[0], RTW_NTXDESCBCN,
3880 1.1 dyoung RTW_RING_OFFSET(hd_bcn), RTW_RING_BASE(sc, hd_bcn));
3881 1.1 dyoung }
3882 1.1 dyoung
3883 1.1 dyoung static struct rtw_rf *
3884 1.42 dyoung rtw_rf_attach(struct rtw_softc *sc, enum rtw_rfchipid rfchipid, int digphy)
3885 1.1 dyoung {
3886 1.42 dyoung rtw_rf_write_t rf_write;
3887 1.1 dyoung struct rtw_rf *rf;
3888 1.1 dyoung
3889 1.1 dyoung switch (rfchipid) {
3890 1.42 dyoung default:
3891 1.42 dyoung rf_write = rtw_rf_hostwrite;
3892 1.42 dyoung break;
3893 1.42 dyoung case RTW_RFCHIPID_INTERSIL:
3894 1.42 dyoung case RTW_RFCHIPID_PHILIPS:
3895 1.42 dyoung case RTW_RFCHIPID_GCT: /* XXX a guess */
3896 1.42 dyoung case RTW_RFCHIPID_RFMD:
3897 1.42 dyoung rf_write = (rtw_host_rfio) ? rtw_rf_hostwrite : rtw_rf_macwrite;
3898 1.42 dyoung break;
3899 1.42 dyoung }
3900 1.42 dyoung
3901 1.42 dyoung switch (rfchipid) {
3902 1.64 dyoung case RTW_RFCHIPID_GCT:
3903 1.64 dyoung rf = rtw_grf5101_create(&sc->sc_regs, rf_write, 0);
3904 1.64 dyoung sc->sc_pwrstate_cb = rtw_maxim_pwrstate;
3905 1.64 dyoung break;
3906 1.1 dyoung case RTW_RFCHIPID_MAXIM:
3907 1.1 dyoung rf = rtw_max2820_create(&sc->sc_regs, rf_write, 0);
3908 1.1 dyoung sc->sc_pwrstate_cb = rtw_maxim_pwrstate;
3909 1.1 dyoung break;
3910 1.1 dyoung case RTW_RFCHIPID_PHILIPS:
3911 1.1 dyoung rf = rtw_sa2400_create(&sc->sc_regs, rf_write, digphy);
3912 1.1 dyoung sc->sc_pwrstate_cb = rtw_philips_pwrstate;
3913 1.1 dyoung break;
3914 1.10 dyoung case RTW_RFCHIPID_RFMD:
3915 1.10 dyoung /* XXX RFMD has no RF constructor */
3916 1.10 dyoung sc->sc_pwrstate_cb = rtw_rfmd_pwrstate;
3917 1.10 dyoung /*FALLTHROUGH*/
3918 1.1 dyoung default:
3919 1.1 dyoung return NULL;
3920 1.1 dyoung }
3921 1.1 dyoung rf->rf_continuous_tx_cb =
3922 1.1 dyoung (rtw_continuous_tx_cb_t)rtw_continuous_tx_enable;
3923 1.1 dyoung rf->rf_continuous_tx_arg = (void *)sc;
3924 1.1 dyoung return rf;
3925 1.1 dyoung }
3926 1.1 dyoung
3927 1.1 dyoung /* Revision C and later use a different PHY delay setting than
3928 1.1 dyoung * revisions A and B.
3929 1.1 dyoung */
3930 1.37 dyoung static uint8_t
3931 1.46 dyoung rtw_check_phydelay(struct rtw_regs *regs, uint32_t old_rcr)
3932 1.1 dyoung {
3933 1.1 dyoung #define REVAB (RTW_RCR_MXDMA_UNLIMITED | RTW_RCR_AICV)
3934 1.1 dyoung #define REVC (REVAB | RTW_RCR_RXFTH_WHOLE)
3935 1.1 dyoung
3936 1.75 dyoung uint8_t phydelay = __SHIFTIN(0x6, RTW_PHYDELAY_PHYDELAY);
3937 1.1 dyoung
3938 1.1 dyoung RTW_WRITE(regs, RTW_RCR, REVAB);
3939 1.8 dyoung RTW_WBW(regs, RTW_RCR, RTW_RCR);
3940 1.1 dyoung RTW_WRITE(regs, RTW_RCR, REVC);
3941 1.1 dyoung
3942 1.1 dyoung RTW_WBR(regs, RTW_RCR, RTW_RCR);
3943 1.1 dyoung if ((RTW_READ(regs, RTW_RCR) & REVC) == REVC)
3944 1.1 dyoung phydelay |= RTW_PHYDELAY_REVC_MAGIC;
3945 1.1 dyoung
3946 1.46 dyoung RTW_WRITE(regs, RTW_RCR, old_rcr); /* restore RCR */
3947 1.8 dyoung RTW_SYNC(regs, RTW_RCR, RTW_RCR);
3948 1.1 dyoung
3949 1.1 dyoung return phydelay;
3950 1.1 dyoung #undef REVC
3951 1.1 dyoung }
3952 1.1 dyoung
3953 1.1 dyoung void
3954 1.1 dyoung rtw_attach(struct rtw_softc *sc)
3955 1.1 dyoung {
3956 1.48 dyoung struct ifnet *ifp = &sc->sc_if;
3957 1.53 dyoung struct ieee80211com *ic = &sc->sc_ic;
3958 1.34 dyoung struct rtw_txsoft_blk *tsb;
3959 1.42 dyoung int pri, rc;
3960 1.1 dyoung
3961 1.58 dyoung rtw_cipher_wep = ieee80211_cipher_wep;
3962 1.58 dyoung rtw_cipher_wep.ic_decap = rtw_wep_decap;
3963 1.58 dyoung
3964 1.1 dyoung NEXT_ATTACH_STATE(sc, DETACHED);
3965 1.1 dyoung
3966 1.1 dyoung switch (RTW_READ(&sc->sc_regs, RTW_TCR) & RTW_TCR_HWVERID_MASK) {
3967 1.1 dyoung case RTW_TCR_HWVERID_F:
3968 1.42 dyoung sc->sc_hwverid = 'F';
3969 1.1 dyoung break;
3970 1.1 dyoung case RTW_TCR_HWVERID_D:
3971 1.42 dyoung sc->sc_hwverid = 'D';
3972 1.1 dyoung break;
3973 1.1 dyoung default:
3974 1.42 dyoung sc->sc_hwverid = '?';
3975 1.1 dyoung break;
3976 1.1 dyoung }
3977 1.98 dyoung aprint_verbose_dev(sc->sc_dev, "hardware version %c\n",
3978 1.42 dyoung sc->sc_hwverid);
3979 1.1 dyoung
3980 1.1 dyoung rc = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct rtw_descs),
3981 1.1 dyoung RTW_DESC_ALIGNMENT, 0, &sc->sc_desc_segs, 1, &sc->sc_desc_nsegs,
3982 1.1 dyoung 0);
3983 1.1 dyoung
3984 1.1 dyoung if (rc != 0) {
3985 1.98 dyoung aprint_error_dev(sc->sc_dev,
3986 1.98 dyoung "could not allocate hw descriptors, error %d\n", rc);
3987 1.1 dyoung goto err;
3988 1.1 dyoung }
3989 1.1 dyoung
3990 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESC_ALLOC);
3991 1.1 dyoung
3992 1.1 dyoung rc = bus_dmamem_map(sc->sc_dmat, &sc->sc_desc_segs,
3993 1.1 dyoung sc->sc_desc_nsegs, sizeof(struct rtw_descs),
3994 1.85 christos (void **)&sc->sc_descs, BUS_DMA_COHERENT);
3995 1.1 dyoung
3996 1.1 dyoung if (rc != 0) {
3997 1.98 dyoung aprint_error_dev(sc->sc_dev,
3998 1.98 dyoung "could not map hw descriptors, error %d\n", rc);
3999 1.1 dyoung goto err;
4000 1.1 dyoung }
4001 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESC_MAP);
4002 1.1 dyoung
4003 1.1 dyoung rc = bus_dmamap_create(sc->sc_dmat, sizeof(struct rtw_descs), 1,
4004 1.1 dyoung sizeof(struct rtw_descs), 0, 0, &sc->sc_desc_dmamap);
4005 1.1 dyoung
4006 1.1 dyoung if (rc != 0) {
4007 1.98 dyoung aprint_error_dev(sc->sc_dev,
4008 1.98 dyoung "could not create DMA map for hw descriptors, error %d\n",
4009 1.98 dyoung rc);
4010 1.1 dyoung goto err;
4011 1.1 dyoung }
4012 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESCMAP_CREATE);
4013 1.1 dyoung
4014 1.34 dyoung sc->sc_rxdesc_blk.rdb_dmat = sc->sc_dmat;
4015 1.34 dyoung sc->sc_rxdesc_blk.rdb_dmamap = sc->sc_desc_dmamap;
4016 1.33 dyoung
4017 1.33 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
4018 1.34 dyoung sc->sc_txdesc_blk[pri].tdb_dmat = sc->sc_dmat;
4019 1.34 dyoung sc->sc_txdesc_blk[pri].tdb_dmamap = sc->sc_desc_dmamap;
4020 1.33 dyoung }
4021 1.33 dyoung
4022 1.1 dyoung rc = bus_dmamap_load(sc->sc_dmat, sc->sc_desc_dmamap, sc->sc_descs,
4023 1.1 dyoung sizeof(struct rtw_descs), NULL, 0);
4024 1.1 dyoung
4025 1.1 dyoung if (rc != 0) {
4026 1.98 dyoung aprint_error_dev(sc->sc_dev,
4027 1.98 dyoung "could not load DMA map for hw descriptors, error %d\n",
4028 1.98 dyoung rc);
4029 1.1 dyoung goto err;
4030 1.1 dyoung }
4031 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESCMAP_LOAD);
4032 1.1 dyoung
4033 1.34 dyoung if (rtw_txsoft_blk_setup_all(sc) != 0)
4034 1.1 dyoung goto err;
4035 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_TXCTLBLK_SETUP);
4036 1.1 dyoung
4037 1.1 dyoung rtw_txdesc_blk_setup_all(sc);
4038 1.1 dyoung
4039 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_TXDESCBLK_SETUP);
4040 1.1 dyoung
4041 1.34 dyoung sc->sc_rxdesc_blk.rdb_desc = &sc->sc_descs->hd_rx[0];
4042 1.1 dyoung
4043 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
4044 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
4045 1.1 dyoung
4046 1.1 dyoung if ((rc = rtw_txdesc_dmamaps_create(sc->sc_dmat,
4047 1.34 dyoung &tsb->tsb_desc[0], tsb->tsb_ndesc)) != 0) {
4048 1.98 dyoung aprint_error_dev(sc->sc_dev,
4049 1.98 dyoung "could not load DMA map for hw tx descriptors, "
4050 1.98 dyoung "error %d\n", rc);
4051 1.1 dyoung goto err;
4052 1.1 dyoung }
4053 1.1 dyoung }
4054 1.1 dyoung
4055 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_TXMAPS_CREATE);
4056 1.34 dyoung if ((rc = rtw_rxdesc_dmamaps_create(sc->sc_dmat, &sc->sc_rxsoft[0],
4057 1.1 dyoung RTW_RXQLEN)) != 0) {
4058 1.98 dyoung aprint_error_dev(sc->sc_dev,
4059 1.98 dyoung "could not load DMA map for hw rx descriptors, error %d\n",
4060 1.98 dyoung rc);
4061 1.1 dyoung goto err;
4062 1.1 dyoung }
4063 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_RXMAPS_CREATE);
4064 1.1 dyoung
4065 1.1 dyoung /* Reset the chip to a known state. */
4066 1.1 dyoung if (rtw_reset(sc) != 0)
4067 1.1 dyoung goto err;
4068 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_RESET);
4069 1.1 dyoung
4070 1.1 dyoung sc->sc_rcr = RTW_READ(&sc->sc_regs, RTW_RCR);
4071 1.1 dyoung
4072 1.1 dyoung if ((sc->sc_rcr & RTW_RCR_9356SEL) != 0)
4073 1.1 dyoung sc->sc_flags |= RTW_F_9356SROM;
4074 1.1 dyoung
4075 1.1 dyoung if (rtw_srom_read(&sc->sc_regs, sc->sc_flags, &sc->sc_srom,
4076 1.98 dyoung sc->sc_dev) != 0)
4077 1.1 dyoung goto err;
4078 1.1 dyoung
4079 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_READ_SROM);
4080 1.1 dyoung
4081 1.1 dyoung if (rtw_srom_parse(&sc->sc_srom, &sc->sc_flags, &sc->sc_csthr,
4082 1.1 dyoung &sc->sc_rfchipid, &sc->sc_rcr, &sc->sc_locale,
4083 1.98 dyoung sc->sc_dev) != 0) {
4084 1.98 dyoung aprint_error_dev(sc->sc_dev,
4085 1.98 dyoung "attach failed, malformed serial ROM\n");
4086 1.1 dyoung goto err;
4087 1.1 dyoung }
4088 1.1 dyoung
4089 1.98 dyoung aprint_verbose_dev(sc->sc_dev, "%s PHY\n",
4090 1.10 dyoung ((sc->sc_flags & RTW_F_DIGPHY) != 0) ? "digital" : "analog");
4091 1.10 dyoung
4092 1.98 dyoung aprint_verbose_dev(sc->sc_dev, "carrier-sense threshold %u\n",
4093 1.98 dyoung sc->sc_csthr);
4094 1.1 dyoung
4095 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_PARSE_SROM);
4096 1.1 dyoung
4097 1.42 dyoung sc->sc_rf = rtw_rf_attach(sc, sc->sc_rfchipid,
4098 1.1 dyoung sc->sc_flags & RTW_F_DIGPHY);
4099 1.1 dyoung
4100 1.1 dyoung if (sc->sc_rf == NULL) {
4101 1.98 dyoung aprint_verbose_dev(sc->sc_dev,
4102 1.98 dyoung "attach failed, could not attach RF\n");
4103 1.1 dyoung goto err;
4104 1.1 dyoung }
4105 1.1 dyoung
4106 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_RF_ATTACH);
4107 1.1 dyoung
4108 1.1 dyoung sc->sc_phydelay = rtw_check_phydelay(&sc->sc_regs, sc->sc_rcr);
4109 1.1 dyoung
4110 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
4111 1.98 dyoung ("%s: PHY delay %d\n", device_xname(sc->sc_dev), sc->sc_phydelay));
4112 1.1 dyoung
4113 1.1 dyoung if (sc->sc_locale == RTW_LOCALE_UNKNOWN)
4114 1.58 dyoung rtw_identify_country(&sc->sc_regs, &sc->sc_locale);
4115 1.1 dyoung
4116 1.98 dyoung rtw_init_channels(sc->sc_locale, &sc->sc_ic.ic_channels, sc->sc_dev);
4117 1.1 dyoung
4118 1.1 dyoung if (rtw_identify_sta(&sc->sc_regs, &sc->sc_ic.ic_myaddr,
4119 1.98 dyoung sc->sc_dev) != 0)
4120 1.1 dyoung goto err;
4121 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_ID_STA);
4122 1.1 dyoung
4123 1.98 dyoung rtw_setifprops(ifp, device_xname(sc->sc_dev), (void*)sc);
4124 1.1 dyoung
4125 1.56 gdt IFQ_SET_READY(&ifp->if_snd);
4126 1.1 dyoung
4127 1.48 dyoung sc->sc_ic.ic_ifp = ifp;
4128 1.1 dyoung rtw_set80211props(&sc->sc_ic);
4129 1.1 dyoung
4130 1.45 dyoung rtw_led_attach(&sc->sc_led_state, (void *)sc);
4131 1.42 dyoung
4132 1.1 dyoung /*
4133 1.1 dyoung * Call MI attach routines.
4134 1.1 dyoung */
4135 1.48 dyoung if_attach(ifp);
4136 1.48 dyoung ieee80211_ifattach(&sc->sc_ic);
4137 1.1 dyoung
4138 1.1 dyoung rtw_set80211methods(&sc->sc_mtbl, &sc->sc_ic);
4139 1.1 dyoung
4140 1.1 dyoung /* possibly we should fill in our own sc_send_prresp, since
4141 1.1 dyoung * the RTL8180 is probably sending probe responses in ad hoc
4142 1.1 dyoung * mode.
4143 1.1 dyoung */
4144 1.1 dyoung
4145 1.1 dyoung /* complete initialization */
4146 1.48 dyoung ieee80211_media_init(&sc->sc_ic, rtw_media_change, rtw_media_status);
4147 1.89 ad callout_init(&sc->sc_scan_ch, 0);
4148 1.1 dyoung
4149 1.32 dyoung rtw_init_radiotap(sc);
4150 1.32 dyoung
4151 1.1 dyoung #if NBPFILTER > 0
4152 1.48 dyoung bpfattach2(ifp, DLT_IEEE802_11_RADIO,
4153 1.1 dyoung sizeof(struct ieee80211_frame) + 64, &sc->sc_radiobpf);
4154 1.1 dyoung #endif
4155 1.1 dyoung
4156 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISHED);
4157 1.1 dyoung
4158 1.52 dyoung ieee80211_announce(ic);
4159 1.1 dyoung return;
4160 1.1 dyoung err:
4161 1.1 dyoung rtw_detach(sc);
4162 1.1 dyoung return;
4163 1.1 dyoung }
4164 1.1 dyoung
4165 1.1 dyoung int
4166 1.1 dyoung rtw_detach(struct rtw_softc *sc)
4167 1.1 dyoung {
4168 1.48 dyoung struct ifnet *ifp = &sc->sc_if;
4169 1.95 dyoung int pri, s;
4170 1.1 dyoung
4171 1.95 dyoung s = splnet();
4172 1.36 dyoung
4173 1.1 dyoung switch (sc->sc_attach_state) {
4174 1.1 dyoung case FINISHED:
4175 1.48 dyoung rtw_stop(ifp, 1);
4176 1.3 dyoung
4177 1.98 dyoung pmf_device_deregister(sc->sc_dev);
4178 1.1 dyoung callout_stop(&sc->sc_scan_ch);
4179 1.48 dyoung ieee80211_ifdetach(&sc->sc_ic);
4180 1.48 dyoung if_detach(ifp);
4181 1.101 dyoung rtw_led_detach(&sc->sc_led_state);
4182 1.96 dyoung /*FALLTHROUGH*/
4183 1.1 dyoung case FINISH_ID_STA:
4184 1.1 dyoung case FINISH_RF_ATTACH:
4185 1.1 dyoung rtw_rf_destroy(sc->sc_rf);
4186 1.1 dyoung sc->sc_rf = NULL;
4187 1.1 dyoung /*FALLTHROUGH*/
4188 1.1 dyoung case FINISH_PARSE_SROM:
4189 1.1 dyoung case FINISH_READ_SROM:
4190 1.1 dyoung rtw_srom_free(&sc->sc_srom);
4191 1.1 dyoung /*FALLTHROUGH*/
4192 1.1 dyoung case FINISH_RESET:
4193 1.1 dyoung case FINISH_RXMAPS_CREATE:
4194 1.34 dyoung rtw_rxdesc_dmamaps_destroy(sc->sc_dmat, &sc->sc_rxsoft[0],
4195 1.1 dyoung RTW_RXQLEN);
4196 1.1 dyoung /*FALLTHROUGH*/
4197 1.1 dyoung case FINISH_TXMAPS_CREATE:
4198 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
4199 1.1 dyoung rtw_txdesc_dmamaps_destroy(sc->sc_dmat,
4200 1.34 dyoung sc->sc_txsoft_blk[pri].tsb_desc,
4201 1.34 dyoung sc->sc_txsoft_blk[pri].tsb_ndesc);
4202 1.1 dyoung }
4203 1.1 dyoung /*FALLTHROUGH*/
4204 1.1 dyoung case FINISH_TXDESCBLK_SETUP:
4205 1.1 dyoung case FINISH_TXCTLBLK_SETUP:
4206 1.34 dyoung rtw_txsoft_blk_cleanup_all(sc);
4207 1.1 dyoung /*FALLTHROUGH*/
4208 1.1 dyoung case FINISH_DESCMAP_LOAD:
4209 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_desc_dmamap);
4210 1.1 dyoung /*FALLTHROUGH*/
4211 1.1 dyoung case FINISH_DESCMAP_CREATE:
4212 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_desc_dmamap);
4213 1.1 dyoung /*FALLTHROUGH*/
4214 1.1 dyoung case FINISH_DESC_MAP:
4215 1.85 christos bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_descs,
4216 1.1 dyoung sizeof(struct rtw_descs));
4217 1.1 dyoung /*FALLTHROUGH*/
4218 1.1 dyoung case FINISH_DESC_ALLOC:
4219 1.1 dyoung bus_dmamem_free(sc->sc_dmat, &sc->sc_desc_segs,
4220 1.1 dyoung sc->sc_desc_nsegs);
4221 1.1 dyoung /*FALLTHROUGH*/
4222 1.1 dyoung case DETACHED:
4223 1.1 dyoung NEXT_ATTACH_STATE(sc, DETACHED);
4224 1.1 dyoung break;
4225 1.1 dyoung }
4226 1.95 dyoung splx(s);
4227 1.1 dyoung return 0;
4228 1.1 dyoung }
4229