rtw.c revision 1.45 1 1.45 dyoung /* $NetBSD: rtw.c,v 1.45 2005/03/02 05:20:43 dyoung Exp $ */
2 1.1 dyoung /*-
3 1.1 dyoung * Copyright (c) 2004, 2005 David Young. All rights reserved.
4 1.1 dyoung *
5 1.1 dyoung * Programmed for NetBSD by David Young.
6 1.1 dyoung *
7 1.1 dyoung * Redistribution and use in source and binary forms, with or without
8 1.1 dyoung * modification, are permitted provided that the following conditions
9 1.1 dyoung * are met:
10 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
11 1.1 dyoung * notice, this list of conditions and the following disclaimer.
12 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
14 1.1 dyoung * documentation and/or other materials provided with the distribution.
15 1.1 dyoung * 3. The name of David Young may not be used to endorse or promote
16 1.1 dyoung * products derived from this software without specific prior
17 1.1 dyoung * written permission.
18 1.1 dyoung *
19 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
20 1.1 dyoung * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 1.1 dyoung * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
22 1.1 dyoung * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
23 1.1 dyoung * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 1.1 dyoung * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
25 1.1 dyoung * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 dyoung * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
27 1.1 dyoung * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
28 1.1 dyoung * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 1.1 dyoung * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
30 1.1 dyoung * OF SUCH DAMAGE.
31 1.1 dyoung */
32 1.1 dyoung /*
33 1.1 dyoung * Device driver for the Realtek RTL8180 802.11 MAC/BBP.
34 1.1 dyoung */
35 1.1 dyoung
36 1.1 dyoung #include <sys/cdefs.h>
37 1.45 dyoung __KERNEL_RCSID(0, "$NetBSD: rtw.c,v 1.45 2005/03/02 05:20:43 dyoung Exp $");
38 1.1 dyoung
39 1.1 dyoung #include "bpfilter.h"
40 1.1 dyoung
41 1.1 dyoung #include <sys/param.h>
42 1.4 dyoung #include <sys/sysctl.h>
43 1.44 perry #include <sys/systm.h>
44 1.1 dyoung #include <sys/callout.h>
45 1.44 perry #include <sys/mbuf.h>
46 1.1 dyoung #include <sys/malloc.h>
47 1.1 dyoung #include <sys/kernel.h>
48 1.1 dyoung #include <sys/time.h>
49 1.1 dyoung #include <sys/types.h>
50 1.1 dyoung
51 1.1 dyoung #include <machine/endian.h>
52 1.1 dyoung #include <machine/bus.h>
53 1.1 dyoung #include <machine/intr.h> /* splnet */
54 1.1 dyoung
55 1.1 dyoung #include <uvm/uvm_extern.h>
56 1.44 perry
57 1.1 dyoung #include <net/if.h>
58 1.1 dyoung #include <net/if_media.h>
59 1.1 dyoung #include <net/if_ether.h>
60 1.1 dyoung
61 1.1 dyoung #include <net80211/ieee80211_var.h>
62 1.1 dyoung #include <net80211/ieee80211_compat.h>
63 1.1 dyoung #include <net80211/ieee80211_radiotap.h>
64 1.1 dyoung
65 1.44 perry #if NBPFILTER > 0
66 1.1 dyoung #include <net/bpf.h>
67 1.44 perry #endif
68 1.1 dyoung
69 1.1 dyoung #include <dev/ic/rtwreg.h>
70 1.1 dyoung #include <dev/ic/rtwvar.h>
71 1.1 dyoung #include <dev/ic/rtwphyio.h>
72 1.1 dyoung #include <dev/ic/rtwphy.h>
73 1.1 dyoung
74 1.1 dyoung #include <dev/ic/smc93cx6var.h>
75 1.1 dyoung
76 1.1 dyoung #define KASSERT2(__cond, __msg) \
77 1.1 dyoung do { \
78 1.1 dyoung if (!(__cond)) \
79 1.1 dyoung panic __msg ; \
80 1.1 dyoung } while (0)
81 1.1 dyoung
82 1.4 dyoung int rtw_rfprog_fallback = 0;
83 1.4 dyoung int rtw_host_rfio = 0;
84 1.4 dyoung
85 1.1 dyoung #ifdef RTW_DEBUG
86 1.21 dyoung int rtw_debug = 0;
87 1.31 dyoung int rtw_rxbufs_limit = RTW_RXQLEN;
88 1.1 dyoung #endif /* RTW_DEBUG */
89 1.1 dyoung
90 1.21 dyoung #define NEXT_ATTACH_STATE(sc, state) do { \
91 1.21 dyoung DPRINTF(sc, RTW_DEBUG_ATTACH, \
92 1.21 dyoung ("%s: attach state %s\n", __func__, #state)); \
93 1.21 dyoung sc->sc_attach_state = state; \
94 1.1 dyoung } while (0)
95 1.1 dyoung
96 1.26 dyoung int rtw_dwelltime = 200; /* milliseconds */
97 1.1 dyoung
98 1.5 dyoung static void rtw_start(struct ifnet *);
99 1.5 dyoung
100 1.45 dyoung static void rtw_led_attach(struct rtw_led_state *, void *);
101 1.42 dyoung static void rtw_led_init(struct rtw_regs *);
102 1.42 dyoung static void rtw_led_slowblink(void *);
103 1.42 dyoung static void rtw_led_fastblink(void *);
104 1.42 dyoung static void rtw_led_set(struct rtw_led_state *, struct rtw_regs *, int);
105 1.42 dyoung
106 1.4 dyoung static int rtw_sysctl_verify_rfio(SYSCTLFN_PROTO);
107 1.4 dyoung static int rtw_sysctl_verify_rfprog(SYSCTLFN_PROTO);
108 1.4 dyoung #ifdef RTW_DEBUG
109 1.21 dyoung static void rtw_print_txdesc(struct rtw_softc *, const char *,
110 1.34 dyoung struct rtw_txsoft *, struct rtw_txdesc_blk *, int);
111 1.4 dyoung static int rtw_sysctl_verify_debug(SYSCTLFN_PROTO);
112 1.31 dyoung static int rtw_sysctl_verify_rxbufs_limit(SYSCTLFN_PROTO);
113 1.4 dyoung #endif /* RTW_DEBUG */
114 1.4 dyoung
115 1.4 dyoung /*
116 1.4 dyoung * Setup sysctl(3) MIB, hw.rtw.*
117 1.4 dyoung *
118 1.4 dyoung * TBD condition CTLFLAG_PERMANENT on being an LKM or not
119 1.4 dyoung */
120 1.4 dyoung SYSCTL_SETUP(sysctl_rtw, "sysctl rtw(4) subtree setup")
121 1.4 dyoung {
122 1.4 dyoung int rc;
123 1.4 dyoung struct sysctlnode *cnode, *rnode;
124 1.4 dyoung
125 1.4 dyoung if ((rc = sysctl_createv(clog, 0, NULL, &rnode,
126 1.4 dyoung CTLFLAG_PERMANENT, CTLTYPE_NODE, "hw", NULL,
127 1.4 dyoung NULL, 0, NULL, 0, CTL_HW, CTL_EOL)) != 0)
128 1.4 dyoung goto err;
129 1.4 dyoung
130 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &rnode,
131 1.4 dyoung CTLFLAG_PERMANENT, CTLTYPE_NODE, "rtw",
132 1.4 dyoung "Realtek RTL818x 802.11 controls",
133 1.4 dyoung NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL)) != 0)
134 1.4 dyoung goto err;
135 1.4 dyoung
136 1.4 dyoung #ifdef RTW_DEBUG
137 1.4 dyoung /* control debugging printfs */
138 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
139 1.4 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
140 1.4 dyoung "debug", SYSCTL_DESCR("Enable RTL818x debugging output"),
141 1.4 dyoung rtw_sysctl_verify_debug, 0, &rtw_debug, 0,
142 1.4 dyoung CTL_CREATE, CTL_EOL)) != 0)
143 1.4 dyoung goto err;
144 1.31 dyoung
145 1.31 dyoung /* Limit rx buffers, for simulating resource exhaustion. */
146 1.31 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
147 1.31 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
148 1.31 dyoung "rxbufs_limit",
149 1.31 dyoung SYSCTL_DESCR("Set rx buffers limit"),
150 1.31 dyoung rtw_sysctl_verify_rxbufs_limit, 0, &rtw_rxbufs_limit, 0,
151 1.31 dyoung CTL_CREATE, CTL_EOL)) != 0)
152 1.31 dyoung goto err;
153 1.31 dyoung
154 1.4 dyoung #endif /* RTW_DEBUG */
155 1.4 dyoung /* set fallback RF programming method */
156 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
157 1.4 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
158 1.4 dyoung "rfprog_fallback",
159 1.4 dyoung SYSCTL_DESCR("Set fallback RF programming method"),
160 1.4 dyoung rtw_sysctl_verify_rfprog, 0, &rtw_rfprog_fallback, 0,
161 1.4 dyoung CTL_CREATE, CTL_EOL)) != 0)
162 1.4 dyoung goto err;
163 1.4 dyoung
164 1.4 dyoung /* force host to control RF I/O bus */
165 1.4 dyoung if ((rc = sysctl_createv(clog, 0, &rnode, &cnode,
166 1.4 dyoung CTLFLAG_PERMANENT|CTLFLAG_READWRITE, CTLTYPE_INT,
167 1.4 dyoung "host_rfio", SYSCTL_DESCR("Enable host control of RF I/O"),
168 1.4 dyoung rtw_sysctl_verify_rfio, 0, &rtw_host_rfio, 0,
169 1.4 dyoung CTL_CREATE, CTL_EOL)) != 0)
170 1.4 dyoung goto err;
171 1.4 dyoung
172 1.4 dyoung return;
173 1.4 dyoung err:
174 1.4 dyoung printf("%s: sysctl_createv failed (rc = %d)\n", __func__, rc);
175 1.4 dyoung }
176 1.4 dyoung
177 1.4 dyoung static int
178 1.4 dyoung rtw_sysctl_verify(SYSCTLFN_ARGS, int lower, int upper)
179 1.4 dyoung {
180 1.4 dyoung int error, t;
181 1.4 dyoung struct sysctlnode node;
182 1.4 dyoung
183 1.4 dyoung node = *rnode;
184 1.4 dyoung t = *(int*)rnode->sysctl_data;
185 1.4 dyoung node.sysctl_data = &t;
186 1.4 dyoung error = sysctl_lookup(SYSCTLFN_CALL(&node));
187 1.4 dyoung if (error || newp == NULL)
188 1.4 dyoung return (error);
189 1.4 dyoung
190 1.4 dyoung if (t < lower || t > upper)
191 1.4 dyoung return (EINVAL);
192 1.4 dyoung
193 1.4 dyoung *(int*)rnode->sysctl_data = t;
194 1.4 dyoung
195 1.4 dyoung return (0);
196 1.4 dyoung }
197 1.4 dyoung
198 1.4 dyoung static int
199 1.4 dyoung rtw_sysctl_verify_rfprog(SYSCTLFN_ARGS)
200 1.4 dyoung {
201 1.4 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0,
202 1.4 dyoung MASK_AND_RSHIFT(RTW_CONFIG4_RFTYPE_MASK, RTW_CONFIG4_RFTYPE_MASK));
203 1.4 dyoung }
204 1.4 dyoung
205 1.4 dyoung static int
206 1.4 dyoung rtw_sysctl_verify_rfio(SYSCTLFN_ARGS)
207 1.4 dyoung {
208 1.4 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0, 1);
209 1.4 dyoung }
210 1.4 dyoung
211 1.1 dyoung #ifdef RTW_DEBUG
212 1.4 dyoung static int
213 1.4 dyoung rtw_sysctl_verify_debug(SYSCTLFN_ARGS)
214 1.4 dyoung {
215 1.21 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0, RTW_DEBUG_MAX);
216 1.4 dyoung }
217 1.4 dyoung
218 1.31 dyoung static int
219 1.31 dyoung rtw_sysctl_verify_rxbufs_limit(SYSCTLFN_ARGS)
220 1.31 dyoung {
221 1.31 dyoung return rtw_sysctl_verify(SYSCTLFN_CALL(rnode), 0, RTW_RXQLEN);
222 1.31 dyoung }
223 1.31 dyoung
224 1.1 dyoung static void
225 1.1 dyoung rtw_print_regs(struct rtw_regs *regs, const char *dvname, const char *where)
226 1.1 dyoung {
227 1.21 dyoung #define PRINTREG32(sc, reg) \
228 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
229 1.21 dyoung ("%s: reg[ " #reg " / %03x ] = %08x\n", \
230 1.1 dyoung dvname, reg, RTW_READ(regs, reg)))
231 1.1 dyoung
232 1.21 dyoung #define PRINTREG16(sc, reg) \
233 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
234 1.21 dyoung ("%s: reg[ " #reg " / %03x ] = %04x\n", \
235 1.1 dyoung dvname, reg, RTW_READ16(regs, reg)))
236 1.1 dyoung
237 1.21 dyoung #define PRINTREG8(sc, reg) \
238 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, \
239 1.21 dyoung ("%s: reg[ " #reg " / %03x ] = %02x\n", \
240 1.1 dyoung dvname, reg, RTW_READ8(regs, reg)))
241 1.1 dyoung
242 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_REGDUMP, ("%s: %s\n", dvname, where));
243 1.1 dyoung
244 1.1 dyoung PRINTREG32(regs, RTW_IDR0);
245 1.1 dyoung PRINTREG32(regs, RTW_IDR1);
246 1.1 dyoung PRINTREG32(regs, RTW_MAR0);
247 1.1 dyoung PRINTREG32(regs, RTW_MAR1);
248 1.1 dyoung PRINTREG32(regs, RTW_TSFTRL);
249 1.1 dyoung PRINTREG32(regs, RTW_TSFTRH);
250 1.1 dyoung PRINTREG32(regs, RTW_TLPDA);
251 1.1 dyoung PRINTREG32(regs, RTW_TNPDA);
252 1.1 dyoung PRINTREG32(regs, RTW_THPDA);
253 1.1 dyoung PRINTREG32(regs, RTW_TCR);
254 1.1 dyoung PRINTREG32(regs, RTW_RCR);
255 1.1 dyoung PRINTREG32(regs, RTW_TINT);
256 1.1 dyoung PRINTREG32(regs, RTW_TBDA);
257 1.1 dyoung PRINTREG32(regs, RTW_ANAPARM);
258 1.1 dyoung PRINTREG32(regs, RTW_BB);
259 1.1 dyoung PRINTREG32(regs, RTW_PHYCFG);
260 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP0L);
261 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP0H);
262 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP1L);
263 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP1H);
264 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2LL);
265 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2LH);
266 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2HL);
267 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP2HH);
268 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3LL);
269 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3LH);
270 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3HL);
271 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP3HH);
272 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4LL);
273 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4LH);
274 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4HL);
275 1.1 dyoung PRINTREG32(regs, RTW_WAKEUP4HH);
276 1.1 dyoung PRINTREG32(regs, RTW_DK0);
277 1.1 dyoung PRINTREG32(regs, RTW_DK1);
278 1.1 dyoung PRINTREG32(regs, RTW_DK2);
279 1.1 dyoung PRINTREG32(regs, RTW_DK3);
280 1.1 dyoung PRINTREG32(regs, RTW_RETRYCTR);
281 1.1 dyoung PRINTREG32(regs, RTW_RDSAR);
282 1.1 dyoung PRINTREG32(regs, RTW_FER);
283 1.1 dyoung PRINTREG32(regs, RTW_FEMR);
284 1.1 dyoung PRINTREG32(regs, RTW_FPSR);
285 1.1 dyoung PRINTREG32(regs, RTW_FFER);
286 1.1 dyoung
287 1.1 dyoung /* 16-bit registers */
288 1.1 dyoung PRINTREG16(regs, RTW_BRSR);
289 1.1 dyoung PRINTREG16(regs, RTW_IMR);
290 1.1 dyoung PRINTREG16(regs, RTW_ISR);
291 1.1 dyoung PRINTREG16(regs, RTW_BCNITV);
292 1.1 dyoung PRINTREG16(regs, RTW_ATIMWND);
293 1.1 dyoung PRINTREG16(regs, RTW_BINTRITV);
294 1.1 dyoung PRINTREG16(regs, RTW_ATIMTRITV);
295 1.1 dyoung PRINTREG16(regs, RTW_CRC16ERR);
296 1.1 dyoung PRINTREG16(regs, RTW_CRC0);
297 1.1 dyoung PRINTREG16(regs, RTW_CRC1);
298 1.1 dyoung PRINTREG16(regs, RTW_CRC2);
299 1.1 dyoung PRINTREG16(regs, RTW_CRC3);
300 1.1 dyoung PRINTREG16(regs, RTW_CRC4);
301 1.1 dyoung PRINTREG16(regs, RTW_CWR);
302 1.1 dyoung
303 1.1 dyoung /* 8-bit registers */
304 1.1 dyoung PRINTREG8(regs, RTW_CR);
305 1.1 dyoung PRINTREG8(regs, RTW_9346CR);
306 1.1 dyoung PRINTREG8(regs, RTW_CONFIG0);
307 1.1 dyoung PRINTREG8(regs, RTW_CONFIG1);
308 1.1 dyoung PRINTREG8(regs, RTW_CONFIG2);
309 1.1 dyoung PRINTREG8(regs, RTW_MSR);
310 1.1 dyoung PRINTREG8(regs, RTW_CONFIG3);
311 1.1 dyoung PRINTREG8(regs, RTW_CONFIG4);
312 1.1 dyoung PRINTREG8(regs, RTW_TESTR);
313 1.1 dyoung PRINTREG8(regs, RTW_PSR);
314 1.1 dyoung PRINTREG8(regs, RTW_SCR);
315 1.1 dyoung PRINTREG8(regs, RTW_PHYDELAY);
316 1.1 dyoung PRINTREG8(regs, RTW_CRCOUNT);
317 1.1 dyoung PRINTREG8(regs, RTW_PHYADDR);
318 1.1 dyoung PRINTREG8(regs, RTW_PHYDATAW);
319 1.1 dyoung PRINTREG8(regs, RTW_PHYDATAR);
320 1.1 dyoung PRINTREG8(regs, RTW_CONFIG5);
321 1.1 dyoung PRINTREG8(regs, RTW_TPPOLL);
322 1.1 dyoung
323 1.1 dyoung PRINTREG16(regs, RTW_BSSID16);
324 1.1 dyoung PRINTREG32(regs, RTW_BSSID32);
325 1.1 dyoung #undef PRINTREG32
326 1.1 dyoung #undef PRINTREG16
327 1.1 dyoung #undef PRINTREG8
328 1.1 dyoung }
329 1.1 dyoung #endif /* RTW_DEBUG */
330 1.1 dyoung
331 1.1 dyoung void
332 1.3 dyoung rtw_continuous_tx_enable(struct rtw_softc *sc, int enable)
333 1.1 dyoung {
334 1.3 dyoung struct rtw_regs *regs = &sc->sc_regs;
335 1.3 dyoung
336 1.37 dyoung uint32_t tcr;
337 1.1 dyoung tcr = RTW_READ(regs, RTW_TCR);
338 1.1 dyoung tcr &= ~RTW_TCR_LBK_MASK;
339 1.1 dyoung if (enable)
340 1.1 dyoung tcr |= RTW_TCR_LBK_CONT;
341 1.1 dyoung else
342 1.1 dyoung tcr |= RTW_TCR_LBK_NORMAL;
343 1.1 dyoung RTW_WRITE(regs, RTW_TCR, tcr);
344 1.1 dyoung RTW_SYNC(regs, RTW_TCR, RTW_TCR);
345 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);
346 1.4 dyoung rtw_txdac_enable(sc, !enable);
347 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);/* XXX Voodoo from Linux. */
348 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
349 1.3 dyoung }
350 1.3 dyoung
351 1.24 dyoung #ifdef RTW_DEBUG
352 1.3 dyoung static const char *
353 1.3 dyoung rtw_access_string(enum rtw_access access)
354 1.3 dyoung {
355 1.3 dyoung switch (access) {
356 1.3 dyoung case RTW_ACCESS_NONE:
357 1.3 dyoung return "none";
358 1.3 dyoung case RTW_ACCESS_CONFIG:
359 1.3 dyoung return "config";
360 1.3 dyoung case RTW_ACCESS_ANAPARM:
361 1.3 dyoung return "anaparm";
362 1.3 dyoung default:
363 1.3 dyoung return "unknown";
364 1.3 dyoung }
365 1.3 dyoung }
366 1.24 dyoung #endif /* RTW_DEBUG */
367 1.3 dyoung
368 1.3 dyoung static void
369 1.42 dyoung rtw_set_access1(struct rtw_regs *regs, enum rtw_access naccess)
370 1.3 dyoung {
371 1.3 dyoung KASSERT(naccess >= RTW_ACCESS_NONE && naccess <= RTW_ACCESS_ANAPARM);
372 1.42 dyoung KASSERT(regs->r_access >= RTW_ACCESS_NONE &&
373 1.42 dyoung regs->r_access <= RTW_ACCESS_ANAPARM);
374 1.3 dyoung
375 1.42 dyoung if (naccess == regs->r_access)
376 1.3 dyoung return;
377 1.3 dyoung
378 1.3 dyoung switch (naccess) {
379 1.3 dyoung case RTW_ACCESS_NONE:
380 1.42 dyoung switch (regs->r_access) {
381 1.3 dyoung case RTW_ACCESS_ANAPARM:
382 1.3 dyoung rtw_anaparm_enable(regs, 0);
383 1.3 dyoung /*FALLTHROUGH*/
384 1.3 dyoung case RTW_ACCESS_CONFIG:
385 1.3 dyoung rtw_config0123_enable(regs, 0);
386 1.3 dyoung /*FALLTHROUGH*/
387 1.3 dyoung case RTW_ACCESS_NONE:
388 1.3 dyoung break;
389 1.3 dyoung }
390 1.3 dyoung break;
391 1.3 dyoung case RTW_ACCESS_CONFIG:
392 1.42 dyoung switch (regs->r_access) {
393 1.3 dyoung case RTW_ACCESS_NONE:
394 1.3 dyoung rtw_config0123_enable(regs, 1);
395 1.3 dyoung /*FALLTHROUGH*/
396 1.3 dyoung case RTW_ACCESS_CONFIG:
397 1.3 dyoung break;
398 1.3 dyoung case RTW_ACCESS_ANAPARM:
399 1.3 dyoung rtw_anaparm_enable(regs, 0);
400 1.3 dyoung break;
401 1.3 dyoung }
402 1.3 dyoung break;
403 1.3 dyoung case RTW_ACCESS_ANAPARM:
404 1.42 dyoung switch (regs->r_access) {
405 1.3 dyoung case RTW_ACCESS_NONE:
406 1.3 dyoung rtw_config0123_enable(regs, 1);
407 1.3 dyoung /*FALLTHROUGH*/
408 1.3 dyoung case RTW_ACCESS_CONFIG:
409 1.3 dyoung rtw_anaparm_enable(regs, 1);
410 1.3 dyoung /*FALLTHROUGH*/
411 1.3 dyoung case RTW_ACCESS_ANAPARM:
412 1.3 dyoung break;
413 1.3 dyoung }
414 1.3 dyoung break;
415 1.1 dyoung }
416 1.1 dyoung }
417 1.1 dyoung
418 1.3 dyoung void
419 1.42 dyoung rtw_set_access(struct rtw_regs *regs, enum rtw_access access)
420 1.3 dyoung {
421 1.42 dyoung rtw_set_access1(regs, access);
422 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ACCESS,
423 1.42 dyoung ("%s: access %s -> %s\n", __func__,
424 1.42 dyoung rtw_access_string(regs->r_access),
425 1.3 dyoung rtw_access_string(access)));
426 1.42 dyoung regs->r_access = access;
427 1.3 dyoung }
428 1.3 dyoung
429 1.1 dyoung /*
430 1.1 dyoung * Enable registers, switch register banks.
431 1.1 dyoung */
432 1.1 dyoung void
433 1.1 dyoung rtw_config0123_enable(struct rtw_regs *regs, int enable)
434 1.1 dyoung {
435 1.37 dyoung uint8_t ecr;
436 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
437 1.1 dyoung ecr &= ~(RTW_9346CR_EEM_MASK | RTW_9346CR_EECS | RTW_9346CR_EESK);
438 1.1 dyoung if (enable)
439 1.1 dyoung ecr |= RTW_9346CR_EEM_CONFIG;
440 1.8 dyoung else {
441 1.8 dyoung RTW_WBW(regs, RTW_9346CR, MAX(RTW_CONFIG0, RTW_CONFIG3));
442 1.1 dyoung ecr |= RTW_9346CR_EEM_NORMAL;
443 1.8 dyoung }
444 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR, ecr);
445 1.1 dyoung RTW_SYNC(regs, RTW_9346CR, RTW_9346CR);
446 1.1 dyoung }
447 1.1 dyoung
448 1.1 dyoung /* requires rtw_config0123_enable(, 1) */
449 1.1 dyoung void
450 1.1 dyoung rtw_anaparm_enable(struct rtw_regs *regs, int enable)
451 1.1 dyoung {
452 1.37 dyoung uint8_t cfg3;
453 1.1 dyoung
454 1.1 dyoung cfg3 = RTW_READ8(regs, RTW_CONFIG3);
455 1.3 dyoung cfg3 |= RTW_CONFIG3_CLKRUNEN;
456 1.3 dyoung if (enable)
457 1.3 dyoung cfg3 |= RTW_CONFIG3_PARMEN;
458 1.3 dyoung else
459 1.1 dyoung cfg3 &= ~RTW_CONFIG3_PARMEN;
460 1.1 dyoung RTW_WRITE8(regs, RTW_CONFIG3, cfg3);
461 1.1 dyoung RTW_SYNC(regs, RTW_CONFIG3, RTW_CONFIG3);
462 1.1 dyoung }
463 1.1 dyoung
464 1.1 dyoung /* requires rtw_anaparm_enable(, 1) */
465 1.1 dyoung void
466 1.4 dyoung rtw_txdac_enable(struct rtw_softc *sc, int enable)
467 1.1 dyoung {
468 1.37 dyoung uint32_t anaparm;
469 1.4 dyoung struct rtw_regs *regs = &sc->sc_regs;
470 1.1 dyoung
471 1.1 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
472 1.1 dyoung if (enable)
473 1.1 dyoung anaparm &= ~RTW_ANAPARM_TXDACOFF;
474 1.1 dyoung else
475 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
476 1.1 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
477 1.1 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
478 1.1 dyoung }
479 1.1 dyoung
480 1.1 dyoung static __inline int
481 1.7 dyoung rtw_chip_reset1(struct rtw_regs *regs, const char *dvname)
482 1.1 dyoung {
483 1.37 dyoung uint8_t cr;
484 1.1 dyoung int i;
485 1.1 dyoung
486 1.1 dyoung RTW_WRITE8(regs, RTW_CR, RTW_CR_RST);
487 1.1 dyoung
488 1.1 dyoung RTW_WBR(regs, RTW_CR, RTW_CR);
489 1.1 dyoung
490 1.21 dyoung for (i = 0; i < 1000; i++) {
491 1.1 dyoung if ((cr = RTW_READ8(regs, RTW_CR) & RTW_CR_RST) == 0) {
492 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RESET,
493 1.21 dyoung ("%s: reset in %dus\n", dvname, i));
494 1.1 dyoung return 0;
495 1.1 dyoung }
496 1.1 dyoung RTW_RBR(regs, RTW_CR, RTW_CR);
497 1.21 dyoung DELAY(10); /* 10us */
498 1.1 dyoung }
499 1.1 dyoung
500 1.7 dyoung printf("%s: reset failed\n", dvname);
501 1.1 dyoung return ETIMEDOUT;
502 1.1 dyoung }
503 1.1 dyoung
504 1.1 dyoung static __inline int
505 1.7 dyoung rtw_chip_reset(struct rtw_regs *regs, const char *dvname)
506 1.3 dyoung {
507 1.3 dyoung uint32_t tcr;
508 1.3 dyoung
509 1.3 dyoung /* from Linux driver */
510 1.3 dyoung tcr = RTW_TCR_CWMIN | RTW_TCR_MXDMA_2048 |
511 1.3 dyoung LSHIFT(7, RTW_TCR_SRL_MASK) | LSHIFT(7, RTW_TCR_LRL_MASK);
512 1.3 dyoung
513 1.3 dyoung RTW_WRITE(regs, RTW_TCR, tcr);
514 1.3 dyoung
515 1.3 dyoung RTW_WBW(regs, RTW_CR, RTW_TCR);
516 1.3 dyoung
517 1.3 dyoung return rtw_chip_reset1(regs, dvname);
518 1.3 dyoung }
519 1.3 dyoung
520 1.42 dyoung static void
521 1.42 dyoung rtw_wep_setkeys(struct rtw_softc *sc, struct ieee80211_wepkey *wk, int txkey)
522 1.42 dyoung {
523 1.42 dyoung uint8_t cfg0, scr;
524 1.42 dyoung int i, j, tx_key_len;
525 1.42 dyoung struct rtw_regs *regs;
526 1.42 dyoung union rtw_keys *rk;
527 1.42 dyoung
528 1.42 dyoung regs = &sc->sc_regs;
529 1.42 dyoung rk = &sc->sc_keys;
530 1.42 dyoung
531 1.42 dyoung (void)memset(rk->rk_keys, 0, sizeof(rk->rk_keys));
532 1.42 dyoung
533 1.42 dyoung scr = RTW_READ8(regs, RTW_SCR);
534 1.42 dyoung cfg0 = RTW_READ8(regs, RTW_CONFIG0);
535 1.42 dyoung scr &= ~(RTW_SCR_KM_MASK | RTW_SCR_TXSECON | RTW_SCR_RXSECON);
536 1.42 dyoung cfg0 &= ~(RTW_CONFIG0_WEP104 | RTW_CONFIG0_WEP40);
537 1.42 dyoung
538 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
539 1.42 dyoung
540 1.42 dyoung if ((sc->sc_ic.ic_flags & IEEE80211_F_PRIVACY) == 0)
541 1.42 dyoung goto out;
542 1.42 dyoung
543 1.42 dyoung tx_key_len = wk[txkey].wk_len;
544 1.42 dyoung
545 1.42 dyoung switch (tx_key_len) {
546 1.42 dyoung case 5:
547 1.42 dyoung scr |= RTW_SCR_TXSECON | RTW_SCR_RXSECON | RTW_SCR_KM_WEP40;
548 1.42 dyoung break;
549 1.42 dyoung case 13:
550 1.42 dyoung scr |= RTW_SCR_TXSECON | RTW_SCR_RXSECON | RTW_SCR_KM_WEP104;
551 1.42 dyoung break;
552 1.42 dyoung default:
553 1.42 dyoung goto out;
554 1.42 dyoung }
555 1.42 dyoung
556 1.42 dyoung cfg0 |= RTW_CONFIG0_WEP104 | RTW_CONFIG0_WEP40;
557 1.42 dyoung
558 1.42 dyoung for (i = j = 0; i < IEEE80211_WEP_NKID; i++) {
559 1.42 dyoung if (i == txkey)
560 1.42 dyoung sc->sc_txkey = j;
561 1.42 dyoung else if (wk[i].wk_len != tx_key_len)
562 1.42 dyoung continue;
563 1.42 dyoung (void)memcpy(rk->rk_keys[j++], wk[i].wk_key, wk[i].wk_len);
564 1.42 dyoung }
565 1.42 dyoung
566 1.42 dyoung out:
567 1.42 dyoung bus_space_write_region_4(regs->r_bt, regs->r_bh,
568 1.42 dyoung RTW_DK0, rk->rk_words,
569 1.42 dyoung sizeof(rk->rk_words) / sizeof(rk->rk_words[0]));
570 1.42 dyoung
571 1.42 dyoung bus_space_barrier(regs->r_bt, regs->r_bh, RTW_DK0,
572 1.42 dyoung sizeof(rk->rk_words) / sizeof(rk->rk_words[0]),
573 1.42 dyoung BUS_SPACE_BARRIER_SYNC);
574 1.42 dyoung
575 1.42 dyoung RTW_WRITE8(regs, RTW_CONFIG0, cfg0);
576 1.42 dyoung RTW_WBW(regs, RTW_CONFIG0, RTW_SCR);
577 1.42 dyoung RTW_WRITE8(regs, RTW_SCR, scr);
578 1.42 dyoung RTW_SYNC(regs, RTW_SCR, RTW_SCR);
579 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
580 1.42 dyoung }
581 1.42 dyoung
582 1.3 dyoung static __inline int
583 1.7 dyoung rtw_recall_eeprom(struct rtw_regs *regs, const char *dvname)
584 1.1 dyoung {
585 1.1 dyoung int i;
586 1.37 dyoung uint8_t ecr;
587 1.1 dyoung
588 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
589 1.1 dyoung ecr = (ecr & ~RTW_9346CR_EEM_MASK) | RTW_9346CR_EEM_AUTOLOAD;
590 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR, ecr);
591 1.1 dyoung
592 1.1 dyoung RTW_WBR(regs, RTW_9346CR, RTW_9346CR);
593 1.1 dyoung
594 1.1 dyoung /* wait 2.5ms for completion */
595 1.1 dyoung for (i = 0; i < 25; i++) {
596 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
597 1.1 dyoung if ((ecr & RTW_9346CR_EEM_MASK) == RTW_9346CR_EEM_NORMAL) {
598 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RESET,
599 1.21 dyoung ("%s: recall EEPROM in %dus\n", dvname, i * 100));
600 1.1 dyoung return 0;
601 1.1 dyoung }
602 1.1 dyoung RTW_RBR(regs, RTW_9346CR, RTW_9346CR);
603 1.1 dyoung DELAY(100);
604 1.1 dyoung }
605 1.7 dyoung printf("%s: recall EEPROM failed\n", dvname);
606 1.1 dyoung return ETIMEDOUT;
607 1.1 dyoung }
608 1.1 dyoung
609 1.1 dyoung static __inline int
610 1.1 dyoung rtw_reset(struct rtw_softc *sc)
611 1.1 dyoung {
612 1.1 dyoung int rc;
613 1.4 dyoung uint8_t config1;
614 1.1 dyoung
615 1.7 dyoung if ((rc = rtw_chip_reset(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
616 1.1 dyoung return rc;
617 1.1 dyoung
618 1.7 dyoung if ((rc = rtw_recall_eeprom(&sc->sc_regs, sc->sc_dev.dv_xname)) != 0)
619 1.1 dyoung ;
620 1.1 dyoung
621 1.4 dyoung config1 = RTW_READ8(&sc->sc_regs, RTW_CONFIG1);
622 1.4 dyoung RTW_WRITE8(&sc->sc_regs, RTW_CONFIG1, config1 & ~RTW_CONFIG1_PMEN);
623 1.1 dyoung /* TBD turn off maximum power saving? */
624 1.1 dyoung
625 1.1 dyoung return 0;
626 1.1 dyoung }
627 1.1 dyoung
628 1.1 dyoung static __inline int
629 1.34 dyoung rtw_txdesc_dmamaps_create(bus_dma_tag_t dmat, struct rtw_txsoft *descs,
630 1.1 dyoung u_int ndescs)
631 1.1 dyoung {
632 1.1 dyoung int i, rc = 0;
633 1.1 dyoung for (i = 0; i < ndescs; i++) {
634 1.1 dyoung rc = bus_dmamap_create(dmat, MCLBYTES, RTW_MAXPKTSEGS, MCLBYTES,
635 1.34 dyoung 0, 0, &descs[i].ts_dmamap);
636 1.1 dyoung if (rc != 0)
637 1.1 dyoung break;
638 1.1 dyoung }
639 1.1 dyoung return rc;
640 1.1 dyoung }
641 1.1 dyoung
642 1.1 dyoung static __inline int
643 1.34 dyoung rtw_rxdesc_dmamaps_create(bus_dma_tag_t dmat, struct rtw_rxsoft *descs,
644 1.1 dyoung u_int ndescs)
645 1.1 dyoung {
646 1.1 dyoung int i, rc = 0;
647 1.1 dyoung for (i = 0; i < ndescs; i++) {
648 1.1 dyoung rc = bus_dmamap_create(dmat, MCLBYTES, 1, MCLBYTES, 0, 0,
649 1.34 dyoung &descs[i].rs_dmamap);
650 1.1 dyoung if (rc != 0)
651 1.1 dyoung break;
652 1.1 dyoung }
653 1.1 dyoung return rc;
654 1.1 dyoung }
655 1.1 dyoung
656 1.1 dyoung static __inline void
657 1.34 dyoung rtw_rxdesc_dmamaps_destroy(bus_dma_tag_t dmat, struct rtw_rxsoft *descs,
658 1.1 dyoung u_int ndescs)
659 1.1 dyoung {
660 1.1 dyoung int i;
661 1.1 dyoung for (i = 0; i < ndescs; i++) {
662 1.34 dyoung if (descs[i].rs_dmamap != NULL)
663 1.34 dyoung bus_dmamap_destroy(dmat, descs[i].rs_dmamap);
664 1.1 dyoung }
665 1.1 dyoung }
666 1.1 dyoung
667 1.1 dyoung static __inline void
668 1.34 dyoung rtw_txdesc_dmamaps_destroy(bus_dma_tag_t dmat, struct rtw_txsoft *descs,
669 1.1 dyoung u_int ndescs)
670 1.1 dyoung {
671 1.1 dyoung int i;
672 1.1 dyoung for (i = 0; i < ndescs; i++) {
673 1.34 dyoung if (descs[i].ts_dmamap != NULL)
674 1.34 dyoung bus_dmamap_destroy(dmat, descs[i].ts_dmamap);
675 1.1 dyoung }
676 1.1 dyoung }
677 1.1 dyoung
678 1.1 dyoung static __inline void
679 1.1 dyoung rtw_srom_free(struct rtw_srom *sr)
680 1.1 dyoung {
681 1.1 dyoung sr->sr_size = 0;
682 1.1 dyoung if (sr->sr_content == NULL)
683 1.1 dyoung return;
684 1.1 dyoung free(sr->sr_content, M_DEVBUF);
685 1.1 dyoung sr->sr_content = NULL;
686 1.1 dyoung }
687 1.1 dyoung
688 1.1 dyoung static void
689 1.37 dyoung rtw_srom_defaults(struct rtw_srom *sr, uint32_t *flags, uint8_t *cs_threshold,
690 1.37 dyoung enum rtw_rfchipid *rfchipid, uint32_t *rcr)
691 1.1 dyoung {
692 1.1 dyoung *flags |= (RTW_F_DIGPHY|RTW_F_ANTDIV);
693 1.1 dyoung *cs_threshold = RTW_SR_ENERGYDETTHR_DEFAULT;
694 1.1 dyoung *rcr |= RTW_RCR_ENCS1;
695 1.1 dyoung *rfchipid = RTW_RFCHIPID_PHILIPS;
696 1.1 dyoung }
697 1.1 dyoung
698 1.1 dyoung static int
699 1.37 dyoung rtw_srom_parse(struct rtw_srom *sr, uint32_t *flags, uint8_t *cs_threshold,
700 1.37 dyoung enum rtw_rfchipid *rfchipid, uint32_t *rcr, enum rtw_locale *locale,
701 1.7 dyoung const char *dvname)
702 1.1 dyoung {
703 1.1 dyoung int i;
704 1.1 dyoung const char *rfname, *paname;
705 1.1 dyoung char scratch[sizeof("unknown 0xXX")];
706 1.37 dyoung uint16_t version;
707 1.37 dyoung uint8_t mac[IEEE80211_ADDR_LEN];
708 1.1 dyoung
709 1.1 dyoung *flags &= ~(RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV);
710 1.1 dyoung *rcr &= ~(RTW_RCR_ENCS1 | RTW_RCR_ENCS2);
711 1.1 dyoung
712 1.1 dyoung version = RTW_SR_GET16(sr, RTW_SR_VERSION);
713 1.7 dyoung printf("%s: SROM version %d.%d", dvname, version >> 8, version & 0xff);
714 1.1 dyoung
715 1.1 dyoung if (version <= 0x0101) {
716 1.1 dyoung printf(" is not understood, limping along with defaults\n");
717 1.7 dyoung rtw_srom_defaults(sr, flags, cs_threshold, rfchipid, rcr);
718 1.1 dyoung return 0;
719 1.1 dyoung }
720 1.1 dyoung printf("\n");
721 1.1 dyoung
722 1.1 dyoung for (i = 0; i < IEEE80211_ADDR_LEN; i++)
723 1.1 dyoung mac[i] = RTW_SR_GET(sr, RTW_SR_MAC + i);
724 1.1 dyoung
725 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
726 1.21 dyoung ("%s: EEPROM MAC %s\n", dvname, ether_sprintf(mac)));
727 1.1 dyoung
728 1.1 dyoung *cs_threshold = RTW_SR_GET(sr, RTW_SR_ENERGYDETTHR);
729 1.1 dyoung
730 1.1 dyoung if ((RTW_SR_GET(sr, RTW_SR_CONFIG2) & RTW_CONFIG2_ANT) != 0)
731 1.1 dyoung *flags |= RTW_F_ANTDIV;
732 1.1 dyoung
733 1.10 dyoung /* Note well: the sense of the RTW_SR_RFPARM_DIGPHY bit seems
734 1.10 dyoung * to be reversed.
735 1.10 dyoung */
736 1.10 dyoung if ((RTW_SR_GET(sr, RTW_SR_RFPARM) & RTW_SR_RFPARM_DIGPHY) == 0)
737 1.1 dyoung *flags |= RTW_F_DIGPHY;
738 1.1 dyoung if ((RTW_SR_GET(sr, RTW_SR_RFPARM) & RTW_SR_RFPARM_DFLANTB) != 0)
739 1.1 dyoung *flags |= RTW_F_DFLANTB;
740 1.1 dyoung
741 1.1 dyoung *rcr |= LSHIFT(MASK_AND_RSHIFT(RTW_SR_GET(sr, RTW_SR_RFPARM),
742 1.1 dyoung RTW_SR_RFPARM_CS_MASK), RTW_RCR_ENCS1);
743 1.1 dyoung
744 1.1 dyoung *rfchipid = RTW_SR_GET(sr, RTW_SR_RFCHIPID);
745 1.1 dyoung switch (*rfchipid) {
746 1.1 dyoung case RTW_RFCHIPID_GCT: /* this combo seen in the wild */
747 1.1 dyoung rfname = "GCT GRF5101";
748 1.1 dyoung paname = "Winspring WS9901";
749 1.1 dyoung break;
750 1.1 dyoung case RTW_RFCHIPID_MAXIM:
751 1.1 dyoung rfname = "Maxim MAX2820"; /* guess */
752 1.1 dyoung paname = "Maxim MAX2422"; /* guess */
753 1.1 dyoung break;
754 1.1 dyoung case RTW_RFCHIPID_INTERSIL:
755 1.1 dyoung rfname = "Intersil HFA3873"; /* guess */
756 1.1 dyoung paname = "Intersil <unknown>";
757 1.1 dyoung break;
758 1.1 dyoung case RTW_RFCHIPID_PHILIPS: /* this combo seen in the wild */
759 1.1 dyoung rfname = "Philips SA2400A";
760 1.1 dyoung paname = "Philips SA2411";
761 1.1 dyoung break;
762 1.1 dyoung case RTW_RFCHIPID_RFMD:
763 1.1 dyoung /* this is the same front-end as an atw(4)! */
764 1.1 dyoung rfname = "RFMD RF2948B, " /* mentioned in Realtek docs */
765 1.1 dyoung "LNA: RFMD RF2494, " /* mentioned in Realtek docs */
766 1.1 dyoung "SYN: Silicon Labs Si4126"; /* inferred from
767 1.1 dyoung * reference driver
768 1.1 dyoung */
769 1.1 dyoung paname = "RFMD RF2189"; /* mentioned in Realtek docs */
770 1.1 dyoung break;
771 1.1 dyoung case RTW_RFCHIPID_RESERVED:
772 1.1 dyoung rfname = paname = "reserved";
773 1.1 dyoung break;
774 1.1 dyoung default:
775 1.1 dyoung snprintf(scratch, sizeof(scratch), "unknown 0x%02x", *rfchipid);
776 1.1 dyoung rfname = paname = scratch;
777 1.1 dyoung }
778 1.7 dyoung printf("%s: RF: %s, PA: %s\n", dvname, rfname, paname);
779 1.1 dyoung
780 1.1 dyoung switch (RTW_SR_GET(sr, RTW_SR_CONFIG0) & RTW_CONFIG0_GL_MASK) {
781 1.1 dyoung case RTW_CONFIG0_GL_USA:
782 1.1 dyoung *locale = RTW_LOCALE_USA;
783 1.1 dyoung break;
784 1.1 dyoung case RTW_CONFIG0_GL_EUROPE:
785 1.1 dyoung *locale = RTW_LOCALE_EUROPE;
786 1.1 dyoung break;
787 1.1 dyoung case RTW_CONFIG0_GL_JAPAN:
788 1.1 dyoung *locale = RTW_LOCALE_JAPAN;
789 1.1 dyoung break;
790 1.1 dyoung default:
791 1.1 dyoung *locale = RTW_LOCALE_UNKNOWN;
792 1.1 dyoung break;
793 1.1 dyoung }
794 1.1 dyoung return 0;
795 1.1 dyoung }
796 1.1 dyoung
797 1.1 dyoung /* Returns -1 on failure. */
798 1.1 dyoung static int
799 1.37 dyoung rtw_srom_read(struct rtw_regs *regs, uint32_t flags, struct rtw_srom *sr,
800 1.7 dyoung const char *dvname)
801 1.1 dyoung {
802 1.1 dyoung int rc;
803 1.1 dyoung struct seeprom_descriptor sd;
804 1.37 dyoung uint8_t ecr;
805 1.1 dyoung
806 1.1 dyoung (void)memset(&sd, 0, sizeof(sd));
807 1.1 dyoung
808 1.1 dyoung ecr = RTW_READ8(regs, RTW_9346CR);
809 1.1 dyoung
810 1.1 dyoung if ((flags & RTW_F_9356SROM) != 0) {
811 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("%s: 93c56 SROM\n", dvname));
812 1.1 dyoung sr->sr_size = 256;
813 1.1 dyoung sd.sd_chip = C56_66;
814 1.1 dyoung } else {
815 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("%s: 93c46 SROM\n", dvname));
816 1.1 dyoung sr->sr_size = 128;
817 1.1 dyoung sd.sd_chip = C46;
818 1.1 dyoung }
819 1.1 dyoung
820 1.1 dyoung ecr &= ~(RTW_9346CR_EEDI | RTW_9346CR_EEDO | RTW_9346CR_EESK |
821 1.41 dyoung RTW_9346CR_EEM_MASK | RTW_9346CR_EECS);
822 1.1 dyoung ecr |= RTW_9346CR_EEM_PROGRAM;
823 1.1 dyoung
824 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR, ecr);
825 1.1 dyoung
826 1.1 dyoung sr->sr_content = malloc(sr->sr_size, M_DEVBUF, M_NOWAIT);
827 1.1 dyoung
828 1.1 dyoung if (sr->sr_content == NULL) {
829 1.7 dyoung printf("%s: unable to allocate SROM buffer\n", dvname);
830 1.1 dyoung return ENOMEM;
831 1.1 dyoung }
832 1.1 dyoung
833 1.1 dyoung (void)memset(sr->sr_content, 0, sr->sr_size);
834 1.1 dyoung
835 1.1 dyoung /* RTL8180 has a single 8-bit register for controlling the
836 1.1 dyoung * 93cx6 SROM. There is no "ready" bit. The RTL8180
837 1.1 dyoung * input/output sense is the reverse of read_seeprom's.
838 1.1 dyoung */
839 1.1 dyoung sd.sd_tag = regs->r_bt;
840 1.1 dyoung sd.sd_bsh = regs->r_bh;
841 1.1 dyoung sd.sd_regsize = 1;
842 1.1 dyoung sd.sd_control_offset = RTW_9346CR;
843 1.1 dyoung sd.sd_status_offset = RTW_9346CR;
844 1.1 dyoung sd.sd_dataout_offset = RTW_9346CR;
845 1.1 dyoung sd.sd_CK = RTW_9346CR_EESK;
846 1.1 dyoung sd.sd_CS = RTW_9346CR_EECS;
847 1.1 dyoung sd.sd_DI = RTW_9346CR_EEDO;
848 1.1 dyoung sd.sd_DO = RTW_9346CR_EEDI;
849 1.44 perry /* make read_seeprom enter EEPROM read/write mode */
850 1.1 dyoung sd.sd_MS = ecr;
851 1.1 dyoung sd.sd_RDY = 0;
852 1.1 dyoung
853 1.8 dyoung /* TBD bus barriers */
854 1.1 dyoung if (!read_seeprom(&sd, sr->sr_content, 0, sr->sr_size/2)) {
855 1.7 dyoung printf("%s: could not read SROM\n", dvname);
856 1.1 dyoung free(sr->sr_content, M_DEVBUF);
857 1.1 dyoung sr->sr_content = NULL;
858 1.1 dyoung return -1; /* XXX */
859 1.1 dyoung }
860 1.1 dyoung
861 1.44 perry /* end EEPROM read/write mode */
862 1.1 dyoung RTW_WRITE8(regs, RTW_9346CR,
863 1.1 dyoung (ecr & ~RTW_9346CR_EEM_MASK) | RTW_9346CR_EEM_NORMAL);
864 1.1 dyoung RTW_WBRW(regs, RTW_9346CR, RTW_9346CR);
865 1.1 dyoung
866 1.1 dyoung if ((rc = rtw_recall_eeprom(regs, dvname)) != 0)
867 1.1 dyoung return rc;
868 1.1 dyoung
869 1.1 dyoung #ifdef RTW_DEBUG
870 1.1 dyoung {
871 1.1 dyoung int i;
872 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
873 1.21 dyoung ("\n%s: serial ROM:\n\t", dvname));
874 1.1 dyoung for (i = 0; i < sr->sr_size/2; i++) {
875 1.1 dyoung if (((i % 8) == 0) && (i != 0))
876 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("\n\t"));
877 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
878 1.21 dyoung (" %04x", sr->sr_content[i]));
879 1.1 dyoung }
880 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH, ("\n"));
881 1.1 dyoung }
882 1.1 dyoung #endif /* RTW_DEBUG */
883 1.1 dyoung return 0;
884 1.1 dyoung }
885 1.1 dyoung
886 1.4 dyoung static void
887 1.4 dyoung rtw_set_rfprog(struct rtw_regs *regs, enum rtw_rfchipid rfchipid,
888 1.4 dyoung const char *dvname)
889 1.4 dyoung {
890 1.37 dyoung uint8_t cfg4;
891 1.4 dyoung const char *method;
892 1.4 dyoung
893 1.4 dyoung cfg4 = RTW_READ8(regs, RTW_CONFIG4) & ~RTW_CONFIG4_RFTYPE_MASK;
894 1.4 dyoung
895 1.4 dyoung switch (rfchipid) {
896 1.4 dyoung default:
897 1.4 dyoung cfg4 |= LSHIFT(rtw_rfprog_fallback, RTW_CONFIG4_RFTYPE_MASK);
898 1.4 dyoung method = "fallback";
899 1.4 dyoung break;
900 1.4 dyoung case RTW_RFCHIPID_INTERSIL:
901 1.4 dyoung cfg4 |= RTW_CONFIG4_RFTYPE_INTERSIL;
902 1.4 dyoung method = "Intersil";
903 1.4 dyoung break;
904 1.4 dyoung case RTW_RFCHIPID_PHILIPS:
905 1.4 dyoung cfg4 |= RTW_CONFIG4_RFTYPE_PHILIPS;
906 1.4 dyoung method = "Philips";
907 1.4 dyoung break;
908 1.42 dyoung case RTW_RFCHIPID_GCT: /* XXX a guess */
909 1.4 dyoung case RTW_RFCHIPID_RFMD:
910 1.4 dyoung cfg4 |= RTW_CONFIG4_RFTYPE_RFMD;
911 1.4 dyoung method = "RFMD";
912 1.4 dyoung break;
913 1.4 dyoung }
914 1.4 dyoung
915 1.4 dyoung RTW_WRITE8(regs, RTW_CONFIG4, cfg4);
916 1.4 dyoung
917 1.8 dyoung RTW_WBR(regs, RTW_CONFIG4, RTW_CONFIG4);
918 1.8 dyoung
919 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_INIT,
920 1.21 dyoung ("%s: %s RF programming method, %#02x\n", dvname, method,
921 1.10 dyoung RTW_READ8(regs, RTW_CONFIG4)));
922 1.4 dyoung }
923 1.4 dyoung
924 1.1 dyoung static __inline void
925 1.1 dyoung rtw_init_channels(enum rtw_locale locale,
926 1.1 dyoung struct ieee80211_channel (*chans)[IEEE80211_CHAN_MAX+1],
927 1.7 dyoung const char *dvname)
928 1.1 dyoung {
929 1.1 dyoung int i;
930 1.1 dyoung const char *name = NULL;
931 1.1 dyoung #define ADD_CHANNEL(_chans, _chan) do { \
932 1.1 dyoung (*_chans)[_chan].ic_flags = IEEE80211_CHAN_B; \
933 1.1 dyoung (*_chans)[_chan].ic_freq = \
934 1.1 dyoung ieee80211_ieee2mhz(_chan, (*_chans)[_chan].ic_flags);\
935 1.1 dyoung } while (0)
936 1.1 dyoung
937 1.1 dyoung switch (locale) {
938 1.1 dyoung case RTW_LOCALE_USA: /* 1-11 */
939 1.1 dyoung name = "USA";
940 1.1 dyoung for (i = 1; i <= 11; i++)
941 1.1 dyoung ADD_CHANNEL(chans, i);
942 1.1 dyoung break;
943 1.1 dyoung case RTW_LOCALE_JAPAN: /* 1-14 */
944 1.1 dyoung name = "Japan";
945 1.1 dyoung ADD_CHANNEL(chans, 14);
946 1.1 dyoung for (i = 1; i <= 14; i++)
947 1.1 dyoung ADD_CHANNEL(chans, i);
948 1.1 dyoung break;
949 1.1 dyoung case RTW_LOCALE_EUROPE: /* 1-13 */
950 1.1 dyoung name = "Europe";
951 1.1 dyoung for (i = 1; i <= 13; i++)
952 1.1 dyoung ADD_CHANNEL(chans, i);
953 1.1 dyoung break;
954 1.1 dyoung default: /* 10-11 allowed by most countries */
955 1.1 dyoung name = "<unknown>";
956 1.1 dyoung for (i = 10; i <= 11; i++)
957 1.1 dyoung ADD_CHANNEL(chans, i);
958 1.1 dyoung break;
959 1.1 dyoung }
960 1.7 dyoung printf("%s: Geographic Location %s\n", dvname, name);
961 1.1 dyoung #undef ADD_CHANNEL
962 1.1 dyoung }
963 1.1 dyoung
964 1.1 dyoung static __inline void
965 1.1 dyoung rtw_identify_country(struct rtw_regs *regs, enum rtw_locale *locale,
966 1.7 dyoung const char *dvname)
967 1.1 dyoung {
968 1.37 dyoung uint8_t cfg0 = RTW_READ8(regs, RTW_CONFIG0);
969 1.1 dyoung
970 1.1 dyoung switch (cfg0 & RTW_CONFIG0_GL_MASK) {
971 1.1 dyoung case RTW_CONFIG0_GL_USA:
972 1.1 dyoung *locale = RTW_LOCALE_USA;
973 1.1 dyoung break;
974 1.1 dyoung case RTW_CONFIG0_GL_JAPAN:
975 1.1 dyoung *locale = RTW_LOCALE_JAPAN;
976 1.1 dyoung break;
977 1.1 dyoung case RTW_CONFIG0_GL_EUROPE:
978 1.1 dyoung *locale = RTW_LOCALE_EUROPE;
979 1.1 dyoung break;
980 1.1 dyoung default:
981 1.1 dyoung *locale = RTW_LOCALE_UNKNOWN;
982 1.1 dyoung break;
983 1.1 dyoung }
984 1.1 dyoung }
985 1.1 dyoung
986 1.1 dyoung static __inline int
987 1.37 dyoung rtw_identify_sta(struct rtw_regs *regs, uint8_t (*addr)[IEEE80211_ADDR_LEN],
988 1.7 dyoung const char *dvname)
989 1.1 dyoung {
990 1.37 dyoung static const uint8_t empty_macaddr[IEEE80211_ADDR_LEN] = {
991 1.1 dyoung 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
992 1.1 dyoung };
993 1.37 dyoung uint32_t idr0 = RTW_READ(regs, RTW_IDR0),
994 1.1 dyoung idr1 = RTW_READ(regs, RTW_IDR1);
995 1.1 dyoung
996 1.1 dyoung (*addr)[0] = MASK_AND_RSHIFT(idr0, BITS(0, 7));
997 1.1 dyoung (*addr)[1] = MASK_AND_RSHIFT(idr0, BITS(8, 15));
998 1.1 dyoung (*addr)[2] = MASK_AND_RSHIFT(idr0, BITS(16, 23));
999 1.1 dyoung (*addr)[3] = MASK_AND_RSHIFT(idr0, BITS(24 ,31));
1000 1.1 dyoung
1001 1.1 dyoung (*addr)[4] = MASK_AND_RSHIFT(idr1, BITS(0, 7));
1002 1.1 dyoung (*addr)[5] = MASK_AND_RSHIFT(idr1, BITS(8, 15));
1003 1.1 dyoung
1004 1.1 dyoung if (IEEE80211_ADDR_EQ(addr, empty_macaddr)) {
1005 1.1 dyoung printf("%s: could not get mac address, attach failed\n",
1006 1.7 dyoung dvname);
1007 1.1 dyoung return ENXIO;
1008 1.1 dyoung }
1009 1.1 dyoung
1010 1.7 dyoung printf("%s: 802.11 address %s\n", dvname, ether_sprintf(*addr));
1011 1.1 dyoung
1012 1.1 dyoung return 0;
1013 1.1 dyoung }
1014 1.1 dyoung
1015 1.37 dyoung static uint8_t
1016 1.1 dyoung rtw_chan2txpower(struct rtw_srom *sr, struct ieee80211com *ic,
1017 1.1 dyoung struct ieee80211_channel *chan)
1018 1.1 dyoung {
1019 1.1 dyoung u_int idx = RTW_SR_TXPOWER1 + ieee80211_chan2ieee(ic, chan) - 1;
1020 1.1 dyoung KASSERT2(idx >= RTW_SR_TXPOWER1 && idx <= RTW_SR_TXPOWER14,
1021 1.1 dyoung ("%s: channel %d out of range", __func__,
1022 1.1 dyoung idx - RTW_SR_TXPOWER1 + 1));
1023 1.1 dyoung return RTW_SR_GET(sr, idx);
1024 1.1 dyoung }
1025 1.1 dyoung
1026 1.1 dyoung static void
1027 1.34 dyoung rtw_txdesc_blk_init_all(struct rtw_txdesc_blk *tdb)
1028 1.1 dyoung {
1029 1.1 dyoung int pri;
1030 1.1 dyoung u_int ndesc[RTW_NTXPRI] =
1031 1.1 dyoung {RTW_NTXDESCLO, RTW_NTXDESCMD, RTW_NTXDESCHI, RTW_NTXDESCBCN};
1032 1.1 dyoung
1033 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1034 1.34 dyoung tdb[pri].tdb_nfree = ndesc[pri];
1035 1.34 dyoung tdb[pri].tdb_next = 0;
1036 1.1 dyoung }
1037 1.1 dyoung }
1038 1.1 dyoung
1039 1.1 dyoung static int
1040 1.34 dyoung rtw_txsoft_blk_init(struct rtw_txsoft_blk *tsb)
1041 1.1 dyoung {
1042 1.1 dyoung int i;
1043 1.34 dyoung struct rtw_txsoft *ts;
1044 1.1 dyoung
1045 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_dirtyq);
1046 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_freeq);
1047 1.34 dyoung for (i = 0; i < tsb->tsb_ndesc; i++) {
1048 1.34 dyoung ts = &tsb->tsb_desc[i];
1049 1.34 dyoung ts->ts_mbuf = NULL;
1050 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
1051 1.1 dyoung }
1052 1.1 dyoung return 0;
1053 1.1 dyoung }
1054 1.1 dyoung
1055 1.1 dyoung static void
1056 1.34 dyoung rtw_txsoft_blk_init_all(struct rtw_txsoft_blk *tsb)
1057 1.1 dyoung {
1058 1.1 dyoung int pri;
1059 1.3 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++)
1060 1.34 dyoung rtw_txsoft_blk_init(&tsb[pri]);
1061 1.1 dyoung }
1062 1.1 dyoung
1063 1.1 dyoung static __inline void
1064 1.34 dyoung rtw_rxdescs_sync(struct rtw_rxdesc_blk *rdb, int desc0, int nsync, int ops)
1065 1.1 dyoung {
1066 1.34 dyoung KASSERT(nsync <= rdb->rdb_ndesc);
1067 1.1 dyoung /* sync to end of ring */
1068 1.34 dyoung if (desc0 + nsync > rdb->rdb_ndesc) {
1069 1.34 dyoung bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
1070 1.1 dyoung offsetof(struct rtw_descs, hd_rx[desc0]),
1071 1.34 dyoung sizeof(struct rtw_rxdesc) * (rdb->rdb_ndesc - desc0), ops);
1072 1.34 dyoung nsync -= (rdb->rdb_ndesc - desc0);
1073 1.1 dyoung desc0 = 0;
1074 1.1 dyoung }
1075 1.1 dyoung
1076 1.34 dyoung KASSERT(desc0 < rdb->rdb_ndesc);
1077 1.34 dyoung KASSERT(nsync <= rdb->rdb_ndesc);
1078 1.34 dyoung KASSERT(desc0 + nsync <= rdb->rdb_ndesc);
1079 1.21 dyoung
1080 1.1 dyoung /* sync what remains */
1081 1.34 dyoung bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
1082 1.1 dyoung offsetof(struct rtw_descs, hd_rx[desc0]),
1083 1.1 dyoung sizeof(struct rtw_rxdesc) * nsync, ops);
1084 1.1 dyoung }
1085 1.1 dyoung
1086 1.1 dyoung static void
1087 1.34 dyoung rtw_txdescs_sync(struct rtw_txdesc_blk *tdb, u_int desc0, u_int nsync, int ops)
1088 1.1 dyoung {
1089 1.1 dyoung /* sync to end of ring */
1090 1.34 dyoung if (desc0 + nsync > tdb->tdb_ndesc) {
1091 1.34 dyoung bus_dmamap_sync(tdb->tdb_dmat, tdb->tdb_dmamap,
1092 1.34 dyoung tdb->tdb_ofs + sizeof(struct rtw_txdesc) * desc0,
1093 1.34 dyoung sizeof(struct rtw_txdesc) * (tdb->tdb_ndesc - desc0),
1094 1.1 dyoung ops);
1095 1.34 dyoung nsync -= (tdb->tdb_ndesc - desc0);
1096 1.1 dyoung desc0 = 0;
1097 1.1 dyoung }
1098 1.1 dyoung
1099 1.1 dyoung /* sync what remains */
1100 1.34 dyoung bus_dmamap_sync(tdb->tdb_dmat, tdb->tdb_dmamap,
1101 1.34 dyoung tdb->tdb_ofs + sizeof(struct rtw_txdesc) * desc0,
1102 1.1 dyoung sizeof(struct rtw_txdesc) * nsync, ops);
1103 1.1 dyoung }
1104 1.1 dyoung
1105 1.1 dyoung static void
1106 1.34 dyoung rtw_txdescs_sync_all(struct rtw_txdesc_blk *tdb)
1107 1.1 dyoung {
1108 1.1 dyoung int pri;
1109 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1110 1.34 dyoung rtw_txdescs_sync(&tdb[pri], 0, tdb[pri].tdb_ndesc,
1111 1.1 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1112 1.1 dyoung }
1113 1.1 dyoung }
1114 1.1 dyoung
1115 1.1 dyoung static void
1116 1.34 dyoung rtw_rxbufs_release(bus_dma_tag_t dmat, struct rtw_rxsoft *desc)
1117 1.1 dyoung {
1118 1.1 dyoung int i;
1119 1.34 dyoung struct rtw_rxsoft *rs;
1120 1.1 dyoung
1121 1.21 dyoung for (i = 0; i < RTW_RXQLEN; i++) {
1122 1.34 dyoung rs = &desc[i];
1123 1.34 dyoung if (rs->rs_mbuf == NULL)
1124 1.31 dyoung continue;
1125 1.34 dyoung bus_dmamap_sync(dmat, rs->rs_dmamap, 0,
1126 1.34 dyoung rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1127 1.34 dyoung bus_dmamap_unload(dmat, rs->rs_dmamap);
1128 1.34 dyoung m_freem(rs->rs_mbuf);
1129 1.34 dyoung rs->rs_mbuf = NULL;
1130 1.1 dyoung }
1131 1.1 dyoung }
1132 1.1 dyoung
1133 1.1 dyoung static __inline int
1134 1.34 dyoung rtw_rxsoft_alloc(bus_dma_tag_t dmat, struct rtw_rxsoft *rs)
1135 1.1 dyoung {
1136 1.1 dyoung int rc;
1137 1.1 dyoung struct mbuf *m;
1138 1.1 dyoung
1139 1.44 perry MGETHDR(m, M_DONTWAIT, MT_DATA);
1140 1.1 dyoung if (m == NULL)
1141 1.18 dyoung return ENOBUFS;
1142 1.1 dyoung
1143 1.44 perry MCLGET(m, M_DONTWAIT);
1144 1.31 dyoung if ((m->m_flags & M_EXT) == 0) {
1145 1.31 dyoung m_freem(m);
1146 1.18 dyoung return ENOBUFS;
1147 1.31 dyoung }
1148 1.1 dyoung
1149 1.1 dyoung m->m_pkthdr.len = m->m_len = m->m_ext.ext_size;
1150 1.1 dyoung
1151 1.34 dyoung if (rs->rs_mbuf != NULL)
1152 1.34 dyoung bus_dmamap_unload(dmat, rs->rs_dmamap);
1153 1.18 dyoung
1154 1.34 dyoung rs->rs_mbuf = NULL;
1155 1.18 dyoung
1156 1.34 dyoung rc = bus_dmamap_load_mbuf(dmat, rs->rs_dmamap, m, BUS_DMA_NOWAIT);
1157 1.18 dyoung if (rc != 0) {
1158 1.18 dyoung m_freem(m);
1159 1.18 dyoung return -1;
1160 1.18 dyoung }
1161 1.1 dyoung
1162 1.34 dyoung rs->rs_mbuf = m;
1163 1.1 dyoung
1164 1.1 dyoung return 0;
1165 1.1 dyoung }
1166 1.1 dyoung
1167 1.1 dyoung static int
1168 1.34 dyoung rtw_rxsoft_init_all(bus_dma_tag_t dmat, struct rtw_rxsoft *desc,
1169 1.31 dyoung int *ndesc, const char *dvname)
1170 1.1 dyoung {
1171 1.31 dyoung int i, rc = 0;
1172 1.34 dyoung struct rtw_rxsoft *rs;
1173 1.1 dyoung
1174 1.21 dyoung for (i = 0; i < RTW_RXQLEN; i++) {
1175 1.34 dyoung rs = &desc[i];
1176 1.31 dyoung /* we're in rtw_init, so there should be no mbufs allocated */
1177 1.34 dyoung KASSERT(rs->rs_mbuf == NULL);
1178 1.31 dyoung #ifdef RTW_DEBUG
1179 1.31 dyoung if (i == rtw_rxbufs_limit) {
1180 1.31 dyoung printf("%s: TEST hit %d-buffer limit\n", dvname, i);
1181 1.31 dyoung rc = ENOBUFS;
1182 1.31 dyoung break;
1183 1.31 dyoung }
1184 1.31 dyoung #endif /* RTW_DEBUG */
1185 1.34 dyoung if ((rc = rtw_rxsoft_alloc(dmat, rs)) != 0) {
1186 1.34 dyoung printf("%s: rtw_rxsoft_alloc failed, %d buffers, "
1187 1.31 dyoung "rc %d\n", dvname, i, rc);
1188 1.31 dyoung break;
1189 1.1 dyoung }
1190 1.1 dyoung }
1191 1.31 dyoung *ndesc = i;
1192 1.31 dyoung return rc;
1193 1.1 dyoung }
1194 1.1 dyoung
1195 1.1 dyoung static __inline void
1196 1.34 dyoung rtw_rxdesc_init(struct rtw_rxdesc_blk *rdb, struct rtw_rxsoft *rs,
1197 1.33 dyoung int idx, int kick)
1198 1.1 dyoung {
1199 1.34 dyoung int is_last = (idx == rdb->rdb_ndesc - 1);
1200 1.21 dyoung uint32_t ctl, octl, obuf;
1201 1.34 dyoung struct rtw_rxdesc *rd = &rdb->rdb_desc[idx];
1202 1.1 dyoung
1203 1.34 dyoung obuf = rd->rd_buf;
1204 1.34 dyoung rd->rd_buf = htole32(rs->rs_dmamap->dm_segs[0].ds_addr);
1205 1.1 dyoung
1206 1.34 dyoung ctl = LSHIFT(rs->rs_mbuf->m_len, RTW_RXCTL_LENGTH_MASK) |
1207 1.1 dyoung RTW_RXCTL_OWN | RTW_RXCTL_FS | RTW_RXCTL_LS;
1208 1.1 dyoung
1209 1.1 dyoung if (is_last)
1210 1.1 dyoung ctl |= RTW_RXCTL_EOR;
1211 1.1 dyoung
1212 1.34 dyoung octl = rd->rd_ctl;
1213 1.34 dyoung rd->rd_ctl = htole32(ctl);
1214 1.1 dyoung
1215 1.24 dyoung RTW_DPRINTF(
1216 1.24 dyoung kick ? (RTW_DEBUG_RECV_DESC | RTW_DEBUG_IO_KICK)
1217 1.24 dyoung : RTW_DEBUG_RECV_DESC,
1218 1.34 dyoung ("%s: rd %p buf %08x -> %08x ctl %08x -> %08x\n", __func__, rd,
1219 1.34 dyoung le32toh(obuf), le32toh(rd->rd_buf), le32toh(octl),
1220 1.34 dyoung le32toh(rd->rd_ctl)));
1221 1.21 dyoung
1222 1.1 dyoung /* sync the mbuf */
1223 1.34 dyoung bus_dmamap_sync(rdb->rdb_dmat, rs->rs_dmamap, 0,
1224 1.34 dyoung rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_PREREAD);
1225 1.1 dyoung
1226 1.1 dyoung /* sync the descriptor */
1227 1.34 dyoung bus_dmamap_sync(rdb->rdb_dmat, rdb->rdb_dmamap,
1228 1.33 dyoung RTW_DESC_OFFSET(hd_rx, idx), sizeof(struct rtw_rxdesc),
1229 1.1 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1230 1.1 dyoung }
1231 1.1 dyoung
1232 1.1 dyoung static void
1233 1.34 dyoung rtw_rxdesc_init_all(struct rtw_rxdesc_blk *rdb, struct rtw_rxsoft *ctl, int kick)
1234 1.1 dyoung {
1235 1.1 dyoung int i;
1236 1.34 dyoung struct rtw_rxdesc *rd;
1237 1.34 dyoung struct rtw_rxsoft *rs;
1238 1.1 dyoung
1239 1.34 dyoung for (i = 0; i < rdb->rdb_ndesc; i++) {
1240 1.34 dyoung rd = &rdb->rdb_desc[i];
1241 1.34 dyoung rs = &ctl[i];
1242 1.34 dyoung rtw_rxdesc_init(rdb, rs, i, kick);
1243 1.1 dyoung }
1244 1.34 dyoung rdb->rdb_next = 0;
1245 1.1 dyoung }
1246 1.1 dyoung
1247 1.1 dyoung static void
1248 1.37 dyoung rtw_io_enable(struct rtw_regs *regs, uint8_t flags, int enable)
1249 1.1 dyoung {
1250 1.37 dyoung uint8_t cr;
1251 1.1 dyoung
1252 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_IOSTATE, ("%s: %s 0x%02x\n", __func__,
1253 1.1 dyoung enable ? "enable" : "disable", flags));
1254 1.1 dyoung
1255 1.1 dyoung cr = RTW_READ8(regs, RTW_CR);
1256 1.1 dyoung
1257 1.1 dyoung /* XXX reference source does not enable MULRW */
1258 1.1 dyoung #if 0
1259 1.1 dyoung /* enable PCI Read/Write Multiple */
1260 1.1 dyoung cr |= RTW_CR_MULRW;
1261 1.1 dyoung #endif
1262 1.1 dyoung
1263 1.1 dyoung RTW_RBW(regs, RTW_CR, RTW_CR); /* XXX paranoia? */
1264 1.1 dyoung if (enable)
1265 1.1 dyoung cr |= flags;
1266 1.1 dyoung else
1267 1.1 dyoung cr &= ~flags;
1268 1.1 dyoung RTW_WRITE8(regs, RTW_CR, cr);
1269 1.1 dyoung RTW_SYNC(regs, RTW_CR, RTW_CR);
1270 1.1 dyoung }
1271 1.1 dyoung
1272 1.1 dyoung static void
1273 1.37 dyoung rtw_intr_rx(struct rtw_softc *sc, uint16_t isr)
1274 1.1 dyoung {
1275 1.42 dyoung #define IS_BEACON(__fc0) \
1276 1.42 dyoung ((__fc0 & (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==\
1277 1.42 dyoung (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_BEACON))
1278 1.42 dyoung
1279 1.30 dyoung static const int ratetbl[4] = {2, 4, 11, 22}; /* convert rates:
1280 1.30 dyoung * hardware -> net80211
1281 1.30 dyoung */
1282 1.21 dyoung u_int next, nproc = 0;
1283 1.32 dyoung int hwrate, len, rate, rssi, sq;
1284 1.37 dyoung uint32_t hrssi, hstat, htsfth, htsftl;
1285 1.34 dyoung struct rtw_rxdesc *rd;
1286 1.34 dyoung struct rtw_rxsoft *rs;
1287 1.34 dyoung struct rtw_rxdesc_blk *rdb;
1288 1.1 dyoung struct mbuf *m;
1289 1.1 dyoung
1290 1.1 dyoung struct ieee80211_node *ni;
1291 1.1 dyoung struct ieee80211_frame *wh;
1292 1.1 dyoung
1293 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1294 1.21 dyoung
1295 1.34 dyoung KASSERT(rdb->rdb_next < rdb->rdb_ndesc);
1296 1.33 dyoung
1297 1.34 dyoung for (next = rdb->rdb_next; ; next = (next + 1) % rdb->rdb_ndesc) {
1298 1.34 dyoung rtw_rxdescs_sync(rdb, next, 1,
1299 1.31 dyoung BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1300 1.34 dyoung rd = &rdb->rdb_desc[next];
1301 1.34 dyoung rs = &sc->sc_rxsoft[next];
1302 1.1 dyoung
1303 1.34 dyoung hstat = le32toh(rd->rd_stat);
1304 1.34 dyoung hrssi = le32toh(rd->rd_rssi);
1305 1.34 dyoung htsfth = le32toh(rd->rd_tsfth);
1306 1.34 dyoung htsftl = le32toh(rd->rd_tsftl);
1307 1.1 dyoung
1308 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
1309 1.21 dyoung ("%s: rxdesc[%d] hstat %08x hrssi %08x htsft %08x%08x\n",
1310 1.21 dyoung __func__, next, hstat, hrssi, htsfth, htsftl));
1311 1.21 dyoung
1312 1.21 dyoung ++nproc;
1313 1.21 dyoung
1314 1.21 dyoung /* still belongs to NIC */
1315 1.21 dyoung if ((hstat & RTW_RXSTAT_OWN) != 0) {
1316 1.21 dyoung if (nproc > 1)
1317 1.21 dyoung break;
1318 1.1 dyoung
1319 1.21 dyoung /* sometimes the NIC skips to the 0th descriptor */
1320 1.34 dyoung rtw_rxdescs_sync(rdb, 0, 1,
1321 1.31 dyoung BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1322 1.34 dyoung rd = &rdb->rdb_desc[0];
1323 1.34 dyoung if ((rd->rd_stat & htole32(RTW_RXSTAT_OWN)) != 0)
1324 1.21 dyoung break;
1325 1.23 dyoung RTW_DPRINTF(RTW_DEBUG_BUGS,
1326 1.45 dyoung ("%s: NIC skipped from rxdesc[%u] to rxdesc[0]\n",
1327 1.45 dyoung sc->sc_dev.dv_xname, next));
1328 1.45 dyoung next = rdb->rdb_ndesc - 1;
1329 1.21 dyoung continue;
1330 1.21 dyoung }
1331 1.1 dyoung
1332 1.45 dyoung #ifdef RTW_DEBUG
1333 1.45 dyoung #define PRINTSTAT(flag) do { \
1334 1.45 dyoung if ((hstat & flag) != 0) { \
1335 1.45 dyoung printf("%s" #flag, delim); \
1336 1.45 dyoung delim = ","; \
1337 1.45 dyoung } \
1338 1.45 dyoung } while (0)
1339 1.45 dyoung if ((rtw_debug & RTW_DEBUG_RECV_DESC) != 0) {
1340 1.45 dyoung const char *delim = "<";
1341 1.45 dyoung printf("%s: ", sc->sc_dev.dv_xname);
1342 1.45 dyoung if ((hstat & RTW_RXSTAT_DEBUG) != 0) {
1343 1.45 dyoung printf("status %08x", hstat);
1344 1.45 dyoung PRINTSTAT(RTW_RXSTAT_SPLCP);
1345 1.45 dyoung PRINTSTAT(RTW_RXSTAT_MAR);
1346 1.45 dyoung PRINTSTAT(RTW_RXSTAT_PAR);
1347 1.45 dyoung PRINTSTAT(RTW_RXSTAT_BAR);
1348 1.45 dyoung PRINTSTAT(RTW_RXSTAT_PWRMGT);
1349 1.45 dyoung PRINTSTAT(RTW_RXSTAT_CRC32);
1350 1.45 dyoung PRINTSTAT(RTW_RXSTAT_ICV);
1351 1.45 dyoung printf(">, ");
1352 1.45 dyoung }
1353 1.45 dyoung }
1354 1.45 dyoung #endif /* RTW_DEBUG */
1355 1.45 dyoung
1356 1.1 dyoung if ((hstat & RTW_RXSTAT_IOERROR) != 0) {
1357 1.1 dyoung printf("%s: DMA error/FIFO overflow %08x, "
1358 1.1 dyoung "rx descriptor %d\n", sc->sc_dev.dv_xname,
1359 1.1 dyoung hstat & RTW_RXSTAT_IOERROR, next);
1360 1.30 dyoung sc->sc_if.if_ierrors++;
1361 1.1 dyoung goto next;
1362 1.1 dyoung }
1363 1.1 dyoung
1364 1.22 dyoung len = MASK_AND_RSHIFT(hstat, RTW_RXSTAT_LENGTH_MASK);
1365 1.22 dyoung if (len < IEEE80211_MIN_LEN) {
1366 1.22 dyoung sc->sc_ic.ic_stats.is_rx_tooshort++;
1367 1.22 dyoung goto next;
1368 1.22 dyoung }
1369 1.22 dyoung
1370 1.43 thorpej /* CRC is included with the packet; trim it off. */
1371 1.43 thorpej len -= IEEE80211_CRC_LEN;
1372 1.43 thorpej
1373 1.30 dyoung hwrate = MASK_AND_RSHIFT(hstat, RTW_RXSTAT_RATE_MASK);
1374 1.30 dyoung if (hwrate >= sizeof(ratetbl) / sizeof(ratetbl[0])) {
1375 1.22 dyoung printf("%s: unknown rate #%d\n", sc->sc_dev.dv_xname,
1376 1.22 dyoung MASK_AND_RSHIFT(hstat, RTW_RXSTAT_RATE_MASK));
1377 1.30 dyoung sc->sc_if.if_ierrors++;
1378 1.22 dyoung goto next;
1379 1.1 dyoung }
1380 1.30 dyoung rate = ratetbl[hwrate];
1381 1.1 dyoung
1382 1.1 dyoung #ifdef RTW_DEBUG
1383 1.45 dyoung RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
1384 1.45 dyoung ("rate %d.%d Mb/s, time %08x%08x\n", (rate * 5) / 10,
1385 1.45 dyoung (rate * 5) % 10, htsfth, htsftl));
1386 1.1 dyoung #endif /* RTW_DEBUG */
1387 1.1 dyoung
1388 1.1 dyoung if ((hstat & RTW_RXSTAT_RES) != 0 &&
1389 1.1 dyoung sc->sc_ic.ic_opmode != IEEE80211_M_MONITOR)
1390 1.1 dyoung goto next;
1391 1.1 dyoung
1392 1.1 dyoung /* if bad flags, skip descriptor */
1393 1.1 dyoung if ((hstat & RTW_RXSTAT_ONESEG) != RTW_RXSTAT_ONESEG) {
1394 1.1 dyoung printf("%s: too many rx segments\n",
1395 1.1 dyoung sc->sc_dev.dv_xname);
1396 1.1 dyoung goto next;
1397 1.1 dyoung }
1398 1.1 dyoung
1399 1.34 dyoung bus_dmamap_sync(sc->sc_dmat, rs->rs_dmamap, 0,
1400 1.34 dyoung rs->rs_dmamap->dm_mapsize, BUS_DMASYNC_POSTREAD);
1401 1.18 dyoung
1402 1.34 dyoung m = rs->rs_mbuf;
1403 1.1 dyoung
1404 1.1 dyoung /* if temporarily out of memory, re-use mbuf */
1405 1.34 dyoung switch (rtw_rxsoft_alloc(sc->sc_dmat, rs)) {
1406 1.18 dyoung case 0:
1407 1.18 dyoung break;
1408 1.18 dyoung case ENOBUFS:
1409 1.34 dyoung printf("%s: rtw_rxsoft_alloc(, %d) failed, "
1410 1.31 dyoung "dropping packet\n", sc->sc_dev.dv_xname, next);
1411 1.1 dyoung goto next;
1412 1.18 dyoung default:
1413 1.18 dyoung /* XXX shorten rx ring, instead? */
1414 1.18 dyoung panic("%s: could not load DMA map\n",
1415 1.18 dyoung sc->sc_dev.dv_xname);
1416 1.1 dyoung }
1417 1.1 dyoung
1418 1.1 dyoung if (sc->sc_rfchipid == RTW_RFCHIPID_PHILIPS)
1419 1.1 dyoung rssi = MASK_AND_RSHIFT(hrssi, RTW_RXRSSI_RSSI);
1420 1.1 dyoung else {
1421 1.1 dyoung rssi = MASK_AND_RSHIFT(hrssi, RTW_RXRSSI_IMR_RSSI);
1422 1.1 dyoung /* TBD find out each front-end's LNA gain in the
1423 1.1 dyoung * front-end's units
1424 1.1 dyoung */
1425 1.1 dyoung if ((hrssi & RTW_RXRSSI_IMR_LNA) == 0)
1426 1.1 dyoung rssi |= 0x80;
1427 1.1 dyoung }
1428 1.32 dyoung sq = MASK_AND_RSHIFT(hrssi, RTW_RXRSSI_SQ);
1429 1.1 dyoung
1430 1.34 dyoung /* Note well: now we cannot recycle the rs_mbuf unless
1431 1.32 dyoung * we restore its original length.
1432 1.32 dyoung */
1433 1.22 dyoung m->m_pkthdr.rcvif = &sc->sc_if;
1434 1.22 dyoung m->m_pkthdr.len = m->m_len = len;
1435 1.1 dyoung
1436 1.1 dyoung wh = mtod(m, struct ieee80211_frame *);
1437 1.42 dyoung
1438 1.42 dyoung if (!IS_BEACON(wh->i_fc[0]))
1439 1.42 dyoung sc->sc_led_state.ls_event |= RTW_LED_S_RX;
1440 1.1 dyoung /* TBD use _MAR, _BAR, _PAR flags as hints to _find_rxnode? */
1441 1.1 dyoung ni = ieee80211_find_rxnode(&sc->sc_ic, wh);
1442 1.1 dyoung
1443 1.1 dyoung sc->sc_tsfth = htsfth;
1444 1.1 dyoung
1445 1.10 dyoung #ifdef RTW_DEBUG
1446 1.10 dyoung if ((sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
1447 1.10 dyoung (IFF_DEBUG|IFF_LINK2)) {
1448 1.10 dyoung ieee80211_dump_pkt(mtod(m, uint8_t *), m->m_pkthdr.len,
1449 1.10 dyoung rate, rssi);
1450 1.10 dyoung }
1451 1.10 dyoung #endif /* RTW_DEBUG */
1452 1.32 dyoung
1453 1.32 dyoung #if NBPFILTER > 0
1454 1.32 dyoung if (sc->sc_radiobpf != NULL) {
1455 1.32 dyoung struct ieee80211com *ic = &sc->sc_ic;
1456 1.32 dyoung struct rtw_rx_radiotap_header *rr = &sc->sc_rxtap;
1457 1.32 dyoung
1458 1.32 dyoung rr->rr_tsft =
1459 1.32 dyoung htole64(((uint64_t)htsfth << 32) | htsftl);
1460 1.32 dyoung
1461 1.32 dyoung if ((hstat & RTW_RXSTAT_SPLCP) != 0)
1462 1.32 dyoung rr->rr_flags = IEEE80211_RADIOTAP_F_SHORTPRE;
1463 1.32 dyoung
1464 1.32 dyoung rr->rr_flags = 0;
1465 1.32 dyoung rr->rr_rate = rate;
1466 1.32 dyoung rr->rr_chan_freq =
1467 1.32 dyoung htole16(ic->ic_bss->ni_chan->ic_freq);
1468 1.32 dyoung rr->rr_chan_flags =
1469 1.32 dyoung htole16(ic->ic_bss->ni_chan->ic_flags);
1470 1.32 dyoung rr->rr_antsignal = rssi;
1471 1.36 dyoung rr->rr_barker_lock = htole16(sq);
1472 1.32 dyoung
1473 1.32 dyoung bpf_mtap2(sc->sc_radiobpf, (caddr_t)rr,
1474 1.32 dyoung sizeof(sc->sc_rxtapu), m);
1475 1.32 dyoung }
1476 1.32 dyoung #endif /* NPBFILTER > 0 */
1477 1.32 dyoung
1478 1.1 dyoung ieee80211_input(&sc->sc_if, m, ni, rssi, htsftl);
1479 1.1 dyoung ieee80211_release_node(&sc->sc_ic, ni);
1480 1.1 dyoung next:
1481 1.34 dyoung rtw_rxdesc_init(rdb, rs, next, 0);
1482 1.1 dyoung }
1483 1.34 dyoung rdb->rdb_next = next;
1484 1.21 dyoung
1485 1.34 dyoung KASSERT(rdb->rdb_next < rdb->rdb_ndesc);
1486 1.3 dyoung
1487 1.1 dyoung return;
1488 1.42 dyoung #undef IS_BEACON
1489 1.1 dyoung }
1490 1.1 dyoung
1491 1.1 dyoung static void
1492 1.34 dyoung rtw_txsoft_release(bus_dma_tag_t dmat, struct ieee80211com *ic,
1493 1.34 dyoung struct rtw_txsoft *ts)
1494 1.5 dyoung {
1495 1.5 dyoung struct mbuf *m;
1496 1.5 dyoung struct ieee80211_node *ni;
1497 1.5 dyoung
1498 1.34 dyoung m = ts->ts_mbuf;
1499 1.34 dyoung ni = ts->ts_ni;
1500 1.21 dyoung KASSERT(m != NULL);
1501 1.21 dyoung KASSERT(ni != NULL);
1502 1.34 dyoung ts->ts_mbuf = NULL;
1503 1.34 dyoung ts->ts_ni = NULL;
1504 1.5 dyoung
1505 1.34 dyoung bus_dmamap_sync(dmat, ts->ts_dmamap, 0, ts->ts_dmamap->dm_mapsize,
1506 1.5 dyoung BUS_DMASYNC_POSTWRITE);
1507 1.34 dyoung bus_dmamap_unload(dmat, ts->ts_dmamap);
1508 1.5 dyoung m_freem(m);
1509 1.5 dyoung ieee80211_release_node(ic, ni);
1510 1.5 dyoung }
1511 1.5 dyoung
1512 1.5 dyoung static void
1513 1.34 dyoung rtw_txsofts_release(bus_dma_tag_t dmat, struct ieee80211com *ic,
1514 1.34 dyoung struct rtw_txsoft_blk *tsb)
1515 1.5 dyoung {
1516 1.34 dyoung struct rtw_txsoft *ts;
1517 1.5 dyoung
1518 1.34 dyoung while ((ts = SIMPLEQ_FIRST(&tsb->tsb_dirtyq)) != NULL) {
1519 1.34 dyoung rtw_txsoft_release(dmat, ic, ts);
1520 1.34 dyoung SIMPLEQ_REMOVE_HEAD(&tsb->tsb_dirtyq, ts_q);
1521 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
1522 1.5 dyoung }
1523 1.5 dyoung }
1524 1.5 dyoung
1525 1.5 dyoung static __inline void
1526 1.34 dyoung rtw_collect_txpkt(struct rtw_softc *sc, struct rtw_txdesc_blk *tdb,
1527 1.34 dyoung struct rtw_txsoft *ts, int ndesc)
1528 1.5 dyoung {
1529 1.11 dyoung uint32_t hstat;
1530 1.5 dyoung int data_retry, rts_retry;
1531 1.34 dyoung struct rtw_txdesc *tdn;
1532 1.5 dyoung const char *condstring;
1533 1.5 dyoung
1534 1.34 dyoung rtw_txsoft_release(sc->sc_dmat, &sc->sc_ic, ts);
1535 1.5 dyoung
1536 1.34 dyoung tdb->tdb_nfree += ndesc;
1537 1.5 dyoung
1538 1.34 dyoung tdn = &tdb->tdb_desc[ts->ts_last];
1539 1.5 dyoung
1540 1.34 dyoung hstat = le32toh(tdn->td_stat);
1541 1.11 dyoung rts_retry = MASK_AND_RSHIFT(hstat, RTW_TXSTAT_RTSRETRY_MASK);
1542 1.11 dyoung data_retry = MASK_AND_RSHIFT(hstat, RTW_TXSTAT_DRC_MASK);
1543 1.5 dyoung
1544 1.5 dyoung sc->sc_if.if_collisions += rts_retry + data_retry;
1545 1.5 dyoung
1546 1.11 dyoung if ((hstat & RTW_TXSTAT_TOK) != 0)
1547 1.5 dyoung condstring = "ok";
1548 1.5 dyoung else {
1549 1.5 dyoung sc->sc_if.if_oerrors++;
1550 1.5 dyoung condstring = "error";
1551 1.5 dyoung }
1552 1.5 dyoung
1553 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
1554 1.34 dyoung ("%s: ts %p txdesc[%d, %d] %s tries rts %u data %u\n",
1555 1.34 dyoung sc->sc_dev.dv_xname, ts, ts->ts_first, ts->ts_last,
1556 1.5 dyoung condstring, rts_retry, data_retry));
1557 1.5 dyoung }
1558 1.5 dyoung
1559 1.5 dyoung /* Collect transmitted packets. */
1560 1.5 dyoung static __inline void
1561 1.34 dyoung rtw_collect_txring(struct rtw_softc *sc, struct rtw_txsoft_blk *tsb,
1562 1.34 dyoung struct rtw_txdesc_blk *tdb)
1563 1.5 dyoung {
1564 1.5 dyoung int ndesc;
1565 1.34 dyoung struct rtw_txsoft *ts;
1566 1.5 dyoung
1567 1.34 dyoung while ((ts = SIMPLEQ_FIRST(&tsb->tsb_dirtyq)) != NULL) {
1568 1.34 dyoung ndesc = 1 + ts->ts_last - ts->ts_first;
1569 1.34 dyoung if (ts->ts_last < ts->ts_first)
1570 1.34 dyoung ndesc += tdb->tdb_ndesc;
1571 1.5 dyoung
1572 1.6 dyoung KASSERT(ndesc > 0);
1573 1.6 dyoung
1574 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, ndesc,
1575 1.5 dyoung BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1576 1.5 dyoung
1577 1.34 dyoung if ((tdb->tdb_desc[ts->ts_last].td_stat &
1578 1.44 perry htole32(RTW_TXSTAT_OWN)) != 0)
1579 1.5 dyoung break;
1580 1.5 dyoung
1581 1.45 dyoung if (&sc->sc_txdesc_blk[RTW_TXPRIBCN] == tdb) {
1582 1.45 dyoung RTW_DPRINTF(RTW_DEBUG_BEACON,
1583 1.45 dyoung ("%s: collected beacon\n", __func__));
1584 1.45 dyoung }
1585 1.45 dyoung
1586 1.34 dyoung rtw_collect_txpkt(sc, tdb, ts, ndesc);
1587 1.34 dyoung SIMPLEQ_REMOVE_HEAD(&tsb->tsb_dirtyq, ts_q);
1588 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_freeq, ts, ts_q);
1589 1.5 dyoung sc->sc_if.if_flags &= ~IFF_OACTIVE;
1590 1.5 dyoung }
1591 1.34 dyoung if (ts == NULL)
1592 1.34 dyoung tsb->tsb_tx_timer = 0;
1593 1.5 dyoung }
1594 1.5 dyoung
1595 1.5 dyoung static void
1596 1.37 dyoung rtw_intr_tx(struct rtw_softc *sc, uint16_t isr)
1597 1.1 dyoung {
1598 1.5 dyoung int pri;
1599 1.34 dyoung struct rtw_txsoft_blk *tsb;
1600 1.34 dyoung struct rtw_txdesc_blk *tdb;
1601 1.5 dyoung
1602 1.5 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1603 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
1604 1.34 dyoung tdb = &sc->sc_txdesc_blk[pri];
1605 1.5 dyoung
1606 1.34 dyoung rtw_collect_txring(sc, tsb, tdb);
1607 1.5 dyoung
1608 1.21 dyoung if ((isr & RTW_INTR_TX) != 0)
1609 1.21 dyoung rtw_start(&sc->sc_if);
1610 1.5 dyoung }
1611 1.5 dyoung
1612 1.1 dyoung /* TBD */
1613 1.1 dyoung return;
1614 1.1 dyoung }
1615 1.1 dyoung
1616 1.1 dyoung static void
1617 1.37 dyoung rtw_intr_beacon(struct rtw_softc *sc, uint16_t isr)
1618 1.1 dyoung {
1619 1.1 dyoung /* TBD */
1620 1.1 dyoung return;
1621 1.1 dyoung }
1622 1.1 dyoung
1623 1.1 dyoung static void
1624 1.1 dyoung rtw_intr_atim(struct rtw_softc *sc)
1625 1.1 dyoung {
1626 1.1 dyoung /* TBD */
1627 1.1 dyoung return;
1628 1.1 dyoung }
1629 1.1 dyoung
1630 1.21 dyoung #ifdef RTW_DEBUG
1631 1.21 dyoung static void
1632 1.21 dyoung rtw_dump_rings(struct rtw_softc *sc)
1633 1.21 dyoung {
1634 1.34 dyoung struct rtw_txdesc_blk *tdb;
1635 1.34 dyoung struct rtw_rxdesc *rd;
1636 1.34 dyoung struct rtw_rxdesc_blk *rdb;
1637 1.21 dyoung int desc, pri;
1638 1.21 dyoung
1639 1.21 dyoung if ((rtw_debug & RTW_DEBUG_IO_KICK) == 0)
1640 1.21 dyoung return;
1641 1.21 dyoung
1642 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1643 1.34 dyoung tdb = &sc->sc_txdesc_blk[pri];
1644 1.21 dyoung printf("%s: txpri %d ndesc %d nfree %d\n", __func__, pri,
1645 1.34 dyoung tdb->tdb_ndesc, tdb->tdb_nfree);
1646 1.34 dyoung for (desc = 0; desc < tdb->tdb_ndesc; desc++)
1647 1.34 dyoung rtw_print_txdesc(sc, ".", NULL, tdb, desc);
1648 1.21 dyoung }
1649 1.21 dyoung
1650 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1651 1.33 dyoung
1652 1.21 dyoung for (desc = 0; desc < RTW_RXQLEN; desc++) {
1653 1.34 dyoung rd = &rdb->rdb_desc[desc];
1654 1.31 dyoung printf("%s: %sctl %08x rsvd0/rssi %08x buf/tsftl %08x "
1655 1.21 dyoung "rsvd1/tsfth %08x\n", __func__,
1656 1.34 dyoung (desc >= rdb->rdb_ndesc) ? "UNUSED " : "",
1657 1.34 dyoung le32toh(rd->rd_ctl), le32toh(rd->rd_rssi),
1658 1.34 dyoung le32toh(rd->rd_buf), le32toh(rd->rd_tsfth));
1659 1.21 dyoung }
1660 1.21 dyoung }
1661 1.21 dyoung #endif /* RTW_DEBUG */
1662 1.21 dyoung
1663 1.1 dyoung static void
1664 1.3 dyoung rtw_hwring_setup(struct rtw_softc *sc)
1665 1.3 dyoung {
1666 1.3 dyoung struct rtw_regs *regs = &sc->sc_regs;
1667 1.3 dyoung RTW_WRITE(regs, RTW_RDSAR, RTW_RING_BASE(sc, hd_rx));
1668 1.3 dyoung RTW_WRITE(regs, RTW_TLPDA, RTW_RING_BASE(sc, hd_txlo));
1669 1.3 dyoung RTW_WRITE(regs, RTW_TNPDA, RTW_RING_BASE(sc, hd_txmd));
1670 1.3 dyoung RTW_WRITE(regs, RTW_THPDA, RTW_RING_BASE(sc, hd_txhi));
1671 1.3 dyoung RTW_WRITE(regs, RTW_TBDA, RTW_RING_BASE(sc, hd_bcn));
1672 1.8 dyoung RTW_SYNC(regs, RTW_TLPDA, RTW_RDSAR);
1673 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
1674 1.21 dyoung ("%s: reg[TLPDA] <- %" PRIxPTR "\n", __func__,
1675 1.21 dyoung (uintptr_t)RTW_RING_BASE(sc, hd_txlo)));
1676 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
1677 1.21 dyoung ("%s: reg[TNPDA] <- %" PRIxPTR "\n", __func__,
1678 1.21 dyoung (uintptr_t)RTW_RING_BASE(sc, hd_txmd)));
1679 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
1680 1.21 dyoung ("%s: reg[THPDA] <- %" PRIxPTR "\n", __func__,
1681 1.21 dyoung (uintptr_t)RTW_RING_BASE(sc, hd_txhi)));
1682 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_XMIT_DESC,
1683 1.21 dyoung ("%s: reg[TBDA] <- %" PRIxPTR "\n", __func__,
1684 1.21 dyoung (uintptr_t)RTW_RING_BASE(sc, hd_bcn)));
1685 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_RECV_DESC,
1686 1.21 dyoung ("%s: reg[RDSAR] <- %" PRIxPTR "\n", __func__,
1687 1.21 dyoung (uintptr_t)RTW_RING_BASE(sc, hd_rx)));
1688 1.3 dyoung }
1689 1.3 dyoung
1690 1.31 dyoung static int
1691 1.3 dyoung rtw_swring_setup(struct rtw_softc *sc)
1692 1.3 dyoung {
1693 1.31 dyoung int rc;
1694 1.34 dyoung struct rtw_rxdesc_blk *rdb;
1695 1.33 dyoung
1696 1.3 dyoung rtw_txdesc_blk_init_all(&sc->sc_txdesc_blk[0]);
1697 1.3 dyoung
1698 1.34 dyoung rtw_txsoft_blk_init_all(&sc->sc_txsoft_blk[0]);
1699 1.3 dyoung
1700 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1701 1.34 dyoung if ((rc = rtw_rxsoft_init_all(sc->sc_dmat, sc->sc_rxsoft, &rdb->rdb_ndesc,
1702 1.34 dyoung sc->sc_dev.dv_xname)) != 0 && rdb->rdb_ndesc == 0) {
1703 1.31 dyoung printf("%s: could not allocate rx buffers\n",
1704 1.31 dyoung sc->sc_dev.dv_xname);
1705 1.31 dyoung return rc;
1706 1.31 dyoung }
1707 1.44 perry
1708 1.34 dyoung rdb = &sc->sc_rxdesc_blk;
1709 1.34 dyoung rtw_rxdescs_sync(rdb, 0, rdb->rdb_ndesc,
1710 1.31 dyoung BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
1711 1.34 dyoung rtw_rxdesc_init_all(rdb, sc->sc_rxsoft, 1);
1712 1.3 dyoung
1713 1.33 dyoung rtw_txdescs_sync_all(&sc->sc_txdesc_blk[0]);
1714 1.31 dyoung return 0;
1715 1.3 dyoung }
1716 1.3 dyoung
1717 1.3 dyoung static void
1718 1.34 dyoung rtw_txdesc_blk_reset(struct rtw_txdesc_blk *tdb)
1719 1.21 dyoung {
1720 1.21 dyoung int i;
1721 1.21 dyoung
1722 1.34 dyoung (void)memset(tdb->tdb_desc, 0,
1723 1.34 dyoung sizeof(tdb->tdb_desc[0]) * tdb->tdb_ndesc);
1724 1.34 dyoung for (i = 0; i < tdb->tdb_ndesc; i++)
1725 1.34 dyoung tdb->tdb_desc[i].td_next = htole32(RTW_NEXT_DESC(tdb, i));
1726 1.34 dyoung tdb->tdb_nfree = tdb->tdb_ndesc;
1727 1.34 dyoung tdb->tdb_next = 0;
1728 1.21 dyoung }
1729 1.21 dyoung
1730 1.21 dyoung static void
1731 1.21 dyoung rtw_txdescs_reset(struct rtw_softc *sc)
1732 1.3 dyoung {
1733 1.5 dyoung int pri;
1734 1.34 dyoung struct rtw_txdesc_blk *tdb;
1735 1.21 dyoung
1736 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1737 1.34 dyoung tdb = &sc->sc_txdesc_blk[pri];
1738 1.34 dyoung rtw_txsofts_release(sc->sc_dmat, &sc->sc_ic,
1739 1.34 dyoung &sc->sc_txsoft_blk[pri]);
1740 1.34 dyoung rtw_txdesc_blk_reset(tdb);
1741 1.34 dyoung rtw_txdescs_sync(tdb, 0, tdb->tdb_ndesc,
1742 1.29 dyoung BUS_DMASYNC_PREWRITE|BUS_DMASYNC_PREREAD);
1743 1.21 dyoung }
1744 1.21 dyoung }
1745 1.21 dyoung
1746 1.21 dyoung static void
1747 1.21 dyoung rtw_rxdescs_reset(struct rtw_softc *sc)
1748 1.21 dyoung {
1749 1.34 dyoung rtw_rxdesc_init_all(&sc->sc_rxdesc_blk, &sc->sc_rxsoft[0], 1);
1750 1.21 dyoung }
1751 1.21 dyoung
1752 1.21 dyoung static void
1753 1.21 dyoung rtw_intr_ioerror(struct rtw_softc *sc, uint16_t isr)
1754 1.21 dyoung {
1755 1.3 dyoung struct rtw_regs *regs = &sc->sc_regs;
1756 1.5 dyoung
1757 1.21 dyoung if ((isr & RTW_INTR_TXFOVW) != 0)
1758 1.21 dyoung printf("%s: tx fifo overflow\n", sc->sc_dev.dv_xname);
1759 1.21 dyoung
1760 1.21 dyoung if ((isr & (RTW_INTR_RDU|RTW_INTR_RXFOVW)) == 0)
1761 1.21 dyoung return;
1762 1.15 dyoung
1763 1.45 dyoung RTW_DPRINTF(RTW_DEBUG_BUGS, ("%s: restarting xmit/recv, isr %" PRIx16
1764 1.45 dyoung "\n", sc->sc_dev.dv_xname, isr));
1765 1.15 dyoung
1766 1.24 dyoung #ifdef RTW_DEBUG
1767 1.21 dyoung rtw_dump_rings(sc);
1768 1.24 dyoung #endif /* RTW_DEBUG */
1769 1.15 dyoung
1770 1.3 dyoung rtw_io_enable(regs, RTW_CR_RE | RTW_CR_TE, 0);
1771 1.15 dyoung
1772 1.44 perry /* Collect rx'd packets. Refresh rx buffers. */
1773 1.21 dyoung rtw_intr_rx(sc, 0);
1774 1.44 perry /* Collect tx'd packets. */
1775 1.21 dyoung rtw_intr_tx(sc, 0);
1776 1.21 dyoung
1777 1.21 dyoung RTW_WRITE16(regs, RTW_IMR, 0);
1778 1.21 dyoung RTW_SYNC(regs, RTW_IMR, RTW_IMR);
1779 1.21 dyoung
1780 1.21 dyoung rtw_chip_reset1(regs, sc->sc_dev.dv_xname);
1781 1.21 dyoung
1782 1.21 dyoung rtw_rxdescs_reset(sc);
1783 1.21 dyoung rtw_txdescs_reset(sc);
1784 1.21 dyoung
1785 1.3 dyoung rtw_hwring_setup(sc);
1786 1.21 dyoung
1787 1.24 dyoung #ifdef RTW_DEBUG
1788 1.21 dyoung rtw_dump_rings(sc);
1789 1.24 dyoung #endif /* RTW_DEBUG */
1790 1.21 dyoung
1791 1.3 dyoung RTW_WRITE16(regs, RTW_IMR, sc->sc_inten);
1792 1.8 dyoung RTW_SYNC(regs, RTW_IMR, RTW_IMR);
1793 1.3 dyoung rtw_io_enable(regs, RTW_CR_RE | RTW_CR_TE, 1);
1794 1.45 dyoung sc->sc_if.if_flags &= ~IFF_OACTIVE;
1795 1.3 dyoung }
1796 1.3 dyoung
1797 1.1 dyoung static __inline void
1798 1.1 dyoung rtw_suspend_ticks(struct rtw_softc *sc)
1799 1.1 dyoung {
1800 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_TIMEOUT,
1801 1.21 dyoung ("%s: suspending ticks\n", sc->sc_dev.dv_xname));
1802 1.1 dyoung sc->sc_do_tick = 0;
1803 1.1 dyoung }
1804 1.1 dyoung
1805 1.1 dyoung static __inline void
1806 1.1 dyoung rtw_resume_ticks(struct rtw_softc *sc)
1807 1.1 dyoung {
1808 1.37 dyoung uint32_t tsftrl0, tsftrl1, next_tick;
1809 1.1 dyoung
1810 1.1 dyoung tsftrl0 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
1811 1.1 dyoung
1812 1.1 dyoung tsftrl1 = RTW_READ(&sc->sc_regs, RTW_TSFTRL);
1813 1.4 dyoung next_tick = tsftrl1 + 1000000;
1814 1.1 dyoung RTW_WRITE(&sc->sc_regs, RTW_TINT, next_tick);
1815 1.1 dyoung
1816 1.1 dyoung sc->sc_do_tick = 1;
1817 1.1 dyoung
1818 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_TIMEOUT,
1819 1.21 dyoung ("%s: resume ticks delta %#08x now %#08x next %#08x\n",
1820 1.8 dyoung sc->sc_dev.dv_xname, tsftrl1 - tsftrl0, tsftrl1, next_tick));
1821 1.1 dyoung }
1822 1.1 dyoung
1823 1.1 dyoung static void
1824 1.1 dyoung rtw_intr_timeout(struct rtw_softc *sc)
1825 1.1 dyoung {
1826 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_TIMEOUT, ("%s: timeout\n", sc->sc_dev.dv_xname));
1827 1.1 dyoung if (sc->sc_do_tick)
1828 1.1 dyoung rtw_resume_ticks(sc);
1829 1.1 dyoung return;
1830 1.1 dyoung }
1831 1.1 dyoung
1832 1.1 dyoung int
1833 1.1 dyoung rtw_intr(void *arg)
1834 1.1 dyoung {
1835 1.3 dyoung int i;
1836 1.1 dyoung struct rtw_softc *sc = arg;
1837 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
1838 1.37 dyoung uint16_t isr;
1839 1.1 dyoung
1840 1.1 dyoung /*
1841 1.1 dyoung * If the interface isn't running, the interrupt couldn't
1842 1.1 dyoung * possibly have come from us.
1843 1.1 dyoung */
1844 1.3 dyoung if ((sc->sc_flags & RTW_F_ENABLED) == 0 ||
1845 1.3 dyoung (sc->sc_if.if_flags & IFF_RUNNING) == 0 ||
1846 1.1 dyoung (sc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
1847 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_INTR, ("%s: stray interrupt\n", sc->sc_dev.dv_xname));
1848 1.1 dyoung return (0);
1849 1.1 dyoung }
1850 1.1 dyoung
1851 1.3 dyoung for (i = 0; i < 10; i++) {
1852 1.1 dyoung isr = RTW_READ16(regs, RTW_ISR);
1853 1.1 dyoung
1854 1.1 dyoung RTW_WRITE16(regs, RTW_ISR, isr);
1855 1.8 dyoung RTW_WBR(regs, RTW_ISR, RTW_ISR);
1856 1.1 dyoung
1857 1.1 dyoung if (sc->sc_intr_ack != NULL)
1858 1.1 dyoung (*sc->sc_intr_ack)(regs);
1859 1.1 dyoung
1860 1.1 dyoung if (isr == 0)
1861 1.1 dyoung break;
1862 1.1 dyoung
1863 1.1 dyoung #ifdef RTW_DEBUG
1864 1.1 dyoung #define PRINTINTR(flag) do { \
1865 1.1 dyoung if ((isr & flag) != 0) { \
1866 1.1 dyoung printf("%s" #flag, delim); \
1867 1.1 dyoung delim = ","; \
1868 1.1 dyoung } \
1869 1.1 dyoung } while (0)
1870 1.1 dyoung
1871 1.21 dyoung if ((rtw_debug & RTW_DEBUG_INTR) != 0 && isr != 0) {
1872 1.1 dyoung const char *delim = "<";
1873 1.1 dyoung
1874 1.1 dyoung printf("%s: reg[ISR] = %x", sc->sc_dev.dv_xname, isr);
1875 1.1 dyoung
1876 1.1 dyoung PRINTINTR(RTW_INTR_TXFOVW);
1877 1.1 dyoung PRINTINTR(RTW_INTR_TIMEOUT);
1878 1.1 dyoung PRINTINTR(RTW_INTR_BCNINT);
1879 1.1 dyoung PRINTINTR(RTW_INTR_ATIMINT);
1880 1.1 dyoung PRINTINTR(RTW_INTR_TBDER);
1881 1.1 dyoung PRINTINTR(RTW_INTR_TBDOK);
1882 1.1 dyoung PRINTINTR(RTW_INTR_THPDER);
1883 1.1 dyoung PRINTINTR(RTW_INTR_THPDOK);
1884 1.1 dyoung PRINTINTR(RTW_INTR_TNPDER);
1885 1.1 dyoung PRINTINTR(RTW_INTR_TNPDOK);
1886 1.1 dyoung PRINTINTR(RTW_INTR_RXFOVW);
1887 1.1 dyoung PRINTINTR(RTW_INTR_RDU);
1888 1.1 dyoung PRINTINTR(RTW_INTR_TLPDER);
1889 1.1 dyoung PRINTINTR(RTW_INTR_TLPDOK);
1890 1.1 dyoung PRINTINTR(RTW_INTR_RER);
1891 1.1 dyoung PRINTINTR(RTW_INTR_ROK);
1892 1.1 dyoung
1893 1.1 dyoung printf(">\n");
1894 1.1 dyoung }
1895 1.1 dyoung #undef PRINTINTR
1896 1.1 dyoung #endif /* RTW_DEBUG */
1897 1.1 dyoung
1898 1.1 dyoung if ((isr & RTW_INTR_RX) != 0)
1899 1.1 dyoung rtw_intr_rx(sc, isr & RTW_INTR_RX);
1900 1.1 dyoung if ((isr & RTW_INTR_TX) != 0)
1901 1.1 dyoung rtw_intr_tx(sc, isr & RTW_INTR_TX);
1902 1.1 dyoung if ((isr & RTW_INTR_BEACON) != 0)
1903 1.1 dyoung rtw_intr_beacon(sc, isr & RTW_INTR_BEACON);
1904 1.1 dyoung if ((isr & RTW_INTR_ATIMINT) != 0)
1905 1.1 dyoung rtw_intr_atim(sc);
1906 1.1 dyoung if ((isr & RTW_INTR_IOERROR) != 0)
1907 1.1 dyoung rtw_intr_ioerror(sc, isr & RTW_INTR_IOERROR);
1908 1.1 dyoung if ((isr & RTW_INTR_TIMEOUT) != 0)
1909 1.1 dyoung rtw_intr_timeout(sc);
1910 1.1 dyoung }
1911 1.1 dyoung
1912 1.1 dyoung return 1;
1913 1.1 dyoung }
1914 1.1 dyoung
1915 1.21 dyoung /* Must be called at splnet. */
1916 1.1 dyoung static void
1917 1.1 dyoung rtw_stop(struct ifnet *ifp, int disable)
1918 1.1 dyoung {
1919 1.21 dyoung int pri;
1920 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
1921 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
1922 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
1923 1.1 dyoung
1924 1.3 dyoung if ((sc->sc_flags & RTW_F_ENABLED) == 0)
1925 1.3 dyoung return;
1926 1.3 dyoung
1927 1.1 dyoung rtw_suspend_ticks(sc);
1928 1.1 dyoung
1929 1.1 dyoung ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
1930 1.1 dyoung
1931 1.3 dyoung if ((sc->sc_flags & RTW_F_INVALID) == 0) {
1932 1.3 dyoung /* Disable interrupts. */
1933 1.3 dyoung RTW_WRITE16(regs, RTW_IMR, 0);
1934 1.3 dyoung
1935 1.8 dyoung RTW_WBW(regs, RTW_TPPOLL, RTW_IMR);
1936 1.8 dyoung
1937 1.3 dyoung /* Stop the transmit and receive processes. First stop DMA,
1938 1.3 dyoung * then disable receiver and transmitter.
1939 1.3 dyoung */
1940 1.42 dyoung RTW_WRITE8(regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
1941 1.1 dyoung
1942 1.8 dyoung RTW_SYNC(regs, RTW_TPPOLL, RTW_IMR);
1943 1.8 dyoung
1944 1.3 dyoung rtw_io_enable(&sc->sc_regs, RTW_CR_RE|RTW_CR_TE, 0);
1945 1.3 dyoung }
1946 1.1 dyoung
1947 1.5 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
1948 1.34 dyoung rtw_txsofts_release(sc->sc_dmat, &sc->sc_ic,
1949 1.34 dyoung &sc->sc_txsoft_blk[pri]);
1950 1.5 dyoung }
1951 1.1 dyoung
1952 1.34 dyoung rtw_rxbufs_release(sc->sc_dmat, &sc->sc_rxsoft[0]);
1953 1.31 dyoung
1954 1.31 dyoung if (disable)
1955 1.1 dyoung rtw_disable(sc);
1956 1.1 dyoung
1957 1.1 dyoung /* Mark the interface as not running. Cancel the watchdog timer. */
1958 1.21 dyoung ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1959 1.1 dyoung ifp->if_timer = 0;
1960 1.3 dyoung
1961 1.1 dyoung return;
1962 1.1 dyoung }
1963 1.1 dyoung
1964 1.1 dyoung const char *
1965 1.1 dyoung rtw_pwrstate_string(enum rtw_pwrstate power)
1966 1.1 dyoung {
1967 1.1 dyoung switch (power) {
1968 1.1 dyoung case RTW_ON:
1969 1.1 dyoung return "on";
1970 1.1 dyoung case RTW_SLEEP:
1971 1.1 dyoung return "sleep";
1972 1.1 dyoung case RTW_OFF:
1973 1.1 dyoung return "off";
1974 1.1 dyoung default:
1975 1.1 dyoung return "unknown";
1976 1.1 dyoung }
1977 1.1 dyoung }
1978 1.1 dyoung
1979 1.10 dyoung /* XXX For Maxim, I am using the RFMD settings gleaned from the
1980 1.10 dyoung * reference driver, plus a magic Maxim "ON" value that comes from
1981 1.10 dyoung * the Realtek document "Windows PG for Rtl8180."
1982 1.1 dyoung */
1983 1.1 dyoung static void
1984 1.1 dyoung rtw_maxim_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
1985 1.10 dyoung int before_rf, int digphy)
1986 1.1 dyoung {
1987 1.37 dyoung uint32_t anaparm;
1988 1.1 dyoung
1989 1.10 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
1990 1.10 dyoung anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
1991 1.10 dyoung
1992 1.10 dyoung switch (power) {
1993 1.10 dyoung case RTW_OFF:
1994 1.10 dyoung if (before_rf)
1995 1.10 dyoung return;
1996 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_MAXIM_OFF;
1997 1.10 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
1998 1.10 dyoung break;
1999 1.10 dyoung case RTW_SLEEP:
2000 1.10 dyoung if (!before_rf)
2001 1.10 dyoung return;
2002 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_MAXIM_SLEEP;
2003 1.10 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2004 1.10 dyoung break;
2005 1.10 dyoung case RTW_ON:
2006 1.10 dyoung if (!before_rf)
2007 1.10 dyoung return;
2008 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_MAXIM_ON;
2009 1.10 dyoung break;
2010 1.10 dyoung }
2011 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2012 1.21 dyoung ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2013 1.10 dyoung __func__, rtw_pwrstate_string(power),
2014 1.10 dyoung (before_rf) ? "before" : "after", anaparm));
2015 1.10 dyoung
2016 1.10 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
2017 1.10 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
2018 1.10 dyoung }
2019 1.10 dyoung
2020 1.10 dyoung /* XXX I am using the RFMD settings gleaned from the reference
2021 1.44 perry * driver. They agree
2022 1.10 dyoung */
2023 1.10 dyoung static void
2024 1.10 dyoung rtw_rfmd_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
2025 1.10 dyoung int before_rf, int digphy)
2026 1.10 dyoung {
2027 1.37 dyoung uint32_t anaparm;
2028 1.1 dyoung
2029 1.1 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
2030 1.10 dyoung anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
2031 1.1 dyoung
2032 1.1 dyoung switch (power) {
2033 1.1 dyoung case RTW_OFF:
2034 1.1 dyoung if (before_rf)
2035 1.1 dyoung return;
2036 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_RFMD_OFF;
2037 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2038 1.1 dyoung break;
2039 1.1 dyoung case RTW_SLEEP:
2040 1.1 dyoung if (!before_rf)
2041 1.1 dyoung return;
2042 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_RFMD_SLEEP;
2043 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2044 1.1 dyoung break;
2045 1.1 dyoung case RTW_ON:
2046 1.1 dyoung if (!before_rf)
2047 1.1 dyoung return;
2048 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_RFMD_ON;
2049 1.1 dyoung break;
2050 1.1 dyoung }
2051 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2052 1.21 dyoung ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2053 1.10 dyoung __func__, rtw_pwrstate_string(power),
2054 1.10 dyoung (before_rf) ? "before" : "after", anaparm));
2055 1.10 dyoung
2056 1.1 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
2057 1.1 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
2058 1.1 dyoung }
2059 1.1 dyoung
2060 1.1 dyoung static void
2061 1.1 dyoung rtw_philips_pwrstate(struct rtw_regs *regs, enum rtw_pwrstate power,
2062 1.10 dyoung int before_rf, int digphy)
2063 1.1 dyoung {
2064 1.37 dyoung uint32_t anaparm;
2065 1.1 dyoung
2066 1.1 dyoung anaparm = RTW_READ(regs, RTW_ANAPARM);
2067 1.10 dyoung anaparm &= ~(RTW_ANAPARM_RFPOW_MASK | RTW_ANAPARM_TXDACOFF);
2068 1.1 dyoung
2069 1.1 dyoung switch (power) {
2070 1.1 dyoung case RTW_OFF:
2071 1.1 dyoung if (before_rf)
2072 1.1 dyoung return;
2073 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_PHILIPS_OFF;
2074 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2075 1.1 dyoung break;
2076 1.1 dyoung case RTW_SLEEP:
2077 1.1 dyoung if (!before_rf)
2078 1.1 dyoung return;
2079 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_PHILIPS_SLEEP;
2080 1.1 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2081 1.1 dyoung break;
2082 1.1 dyoung case RTW_ON:
2083 1.1 dyoung if (!before_rf)
2084 1.1 dyoung return;
2085 1.10 dyoung if (digphy) {
2086 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_DIG_PHILIPS_ON;
2087 1.10 dyoung /* XXX guess */
2088 1.10 dyoung anaparm |= RTW_ANAPARM_TXDACOFF;
2089 1.10 dyoung } else
2090 1.10 dyoung anaparm |= RTW_ANAPARM_RFPOW_ANA_PHILIPS_ON;
2091 1.1 dyoung break;
2092 1.1 dyoung }
2093 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2094 1.21 dyoung ("%s: power state %s, %s RF, reg[ANAPARM] <- %08x\n",
2095 1.10 dyoung __func__, rtw_pwrstate_string(power),
2096 1.10 dyoung (before_rf) ? "before" : "after", anaparm));
2097 1.10 dyoung
2098 1.1 dyoung RTW_WRITE(regs, RTW_ANAPARM, anaparm);
2099 1.1 dyoung RTW_SYNC(regs, RTW_ANAPARM, RTW_ANAPARM);
2100 1.1 dyoung }
2101 1.1 dyoung
2102 1.1 dyoung static void
2103 1.10 dyoung rtw_pwrstate0(struct rtw_softc *sc, enum rtw_pwrstate power, int before_rf,
2104 1.10 dyoung int digphy)
2105 1.1 dyoung {
2106 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2107 1.1 dyoung
2108 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);
2109 1.1 dyoung
2110 1.10 dyoung (*sc->sc_pwrstate_cb)(regs, power, before_rf, digphy);
2111 1.1 dyoung
2112 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
2113 1.1 dyoung
2114 1.1 dyoung return;
2115 1.1 dyoung }
2116 1.1 dyoung
2117 1.1 dyoung static int
2118 1.1 dyoung rtw_pwrstate(struct rtw_softc *sc, enum rtw_pwrstate power)
2119 1.1 dyoung {
2120 1.1 dyoung int rc;
2121 1.1 dyoung
2122 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_PWR,
2123 1.21 dyoung ("%s: %s->%s\n", __func__,
2124 1.1 dyoung rtw_pwrstate_string(sc->sc_pwrstate), rtw_pwrstate_string(power)));
2125 1.1 dyoung
2126 1.1 dyoung if (sc->sc_pwrstate == power)
2127 1.1 dyoung return 0;
2128 1.1 dyoung
2129 1.10 dyoung rtw_pwrstate0(sc, power, 1, sc->sc_flags & RTW_F_DIGPHY);
2130 1.1 dyoung rc = rtw_rf_pwrstate(sc->sc_rf, power);
2131 1.10 dyoung rtw_pwrstate0(sc, power, 0, sc->sc_flags & RTW_F_DIGPHY);
2132 1.1 dyoung
2133 1.1 dyoung switch (power) {
2134 1.1 dyoung case RTW_ON:
2135 1.4 dyoung /* TBD set LEDs */
2136 1.1 dyoung break;
2137 1.1 dyoung case RTW_SLEEP:
2138 1.1 dyoung /* TBD */
2139 1.1 dyoung break;
2140 1.1 dyoung case RTW_OFF:
2141 1.1 dyoung /* TBD */
2142 1.1 dyoung break;
2143 1.1 dyoung }
2144 1.1 dyoung if (rc == 0)
2145 1.1 dyoung sc->sc_pwrstate = power;
2146 1.1 dyoung else
2147 1.1 dyoung sc->sc_pwrstate = RTW_OFF;
2148 1.1 dyoung return rc;
2149 1.1 dyoung }
2150 1.1 dyoung
2151 1.1 dyoung static int
2152 1.1 dyoung rtw_tune(struct rtw_softc *sc)
2153 1.1 dyoung {
2154 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2155 1.1 dyoung u_int chan;
2156 1.1 dyoung int rc;
2157 1.1 dyoung int antdiv = sc->sc_flags & RTW_F_ANTDIV,
2158 1.1 dyoung dflantb = sc->sc_flags & RTW_F_DFLANTB;
2159 1.1 dyoung
2160 1.1 dyoung KASSERT(ic->ic_bss->ni_chan != NULL);
2161 1.1 dyoung
2162 1.1 dyoung chan = ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan);
2163 1.1 dyoung if (chan == IEEE80211_CHAN_ANY)
2164 1.1 dyoung panic("%s: chan == IEEE80211_CHAN_ANY\n", __func__);
2165 1.1 dyoung
2166 1.1 dyoung if (chan == sc->sc_cur_chan) {
2167 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_TUNE,
2168 1.44 perry ("%s: already tuned chan #%d\n", __func__, chan));
2169 1.1 dyoung return 0;
2170 1.1 dyoung }
2171 1.1 dyoung
2172 1.1 dyoung rtw_suspend_ticks(sc);
2173 1.1 dyoung
2174 1.1 dyoung rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 0);
2175 1.1 dyoung
2176 1.1 dyoung /* TBD wait for Tx to complete */
2177 1.1 dyoung
2178 1.1 dyoung KASSERT((sc->sc_flags & RTW_F_ENABLED) != 0);
2179 1.1 dyoung
2180 1.1 dyoung if ((rc = rtw_phy_init(&sc->sc_regs, sc->sc_rf,
2181 1.1 dyoung rtw_chan2txpower(&sc->sc_srom, ic, ic->ic_bss->ni_chan),
2182 1.1 dyoung sc->sc_csthr, ic->ic_bss->ni_chan->ic_freq, antdiv,
2183 1.1 dyoung dflantb, RTW_ON)) != 0) {
2184 1.1 dyoung /* XXX condition on powersaving */
2185 1.1 dyoung printf("%s: phy init failed\n", sc->sc_dev.dv_xname);
2186 1.1 dyoung }
2187 1.1 dyoung
2188 1.1 dyoung sc->sc_cur_chan = chan;
2189 1.1 dyoung
2190 1.1 dyoung rtw_io_enable(&sc->sc_regs, RTW_CR_RE | RTW_CR_TE, 1);
2191 1.1 dyoung
2192 1.1 dyoung rtw_resume_ticks(sc);
2193 1.1 dyoung
2194 1.1 dyoung return rc;
2195 1.1 dyoung }
2196 1.1 dyoung
2197 1.1 dyoung void
2198 1.1 dyoung rtw_disable(struct rtw_softc *sc)
2199 1.1 dyoung {
2200 1.1 dyoung int rc;
2201 1.1 dyoung
2202 1.1 dyoung if ((sc->sc_flags & RTW_F_ENABLED) == 0)
2203 1.1 dyoung return;
2204 1.1 dyoung
2205 1.1 dyoung /* turn off PHY */
2206 1.36 dyoung if ((sc->sc_flags & RTW_F_INVALID) == 0 &&
2207 1.36 dyoung (rc = rtw_pwrstate(sc, RTW_OFF)) != 0) {
2208 1.1 dyoung printf("%s: failed to turn off PHY (%d)\n",
2209 1.1 dyoung sc->sc_dev.dv_xname, rc);
2210 1.36 dyoung }
2211 1.1 dyoung
2212 1.1 dyoung if (sc->sc_disable != NULL)
2213 1.1 dyoung (*sc->sc_disable)(sc);
2214 1.1 dyoung
2215 1.1 dyoung sc->sc_flags &= ~RTW_F_ENABLED;
2216 1.1 dyoung }
2217 1.1 dyoung
2218 1.1 dyoung int
2219 1.1 dyoung rtw_enable(struct rtw_softc *sc)
2220 1.1 dyoung {
2221 1.1 dyoung if ((sc->sc_flags & RTW_F_ENABLED) == 0) {
2222 1.1 dyoung if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
2223 1.1 dyoung printf("%s: device enable failed\n",
2224 1.1 dyoung sc->sc_dev.dv_xname);
2225 1.1 dyoung return (EIO);
2226 1.1 dyoung }
2227 1.1 dyoung sc->sc_flags |= RTW_F_ENABLED;
2228 1.1 dyoung }
2229 1.1 dyoung return (0);
2230 1.1 dyoung }
2231 1.1 dyoung
2232 1.1 dyoung static void
2233 1.1 dyoung rtw_transmit_config(struct rtw_regs *regs)
2234 1.1 dyoung {
2235 1.37 dyoung uint32_t tcr;
2236 1.1 dyoung
2237 1.1 dyoung tcr = RTW_READ(regs, RTW_TCR);
2238 1.1 dyoung
2239 1.10 dyoung tcr |= RTW_TCR_CWMIN;
2240 1.10 dyoung tcr &= ~RTW_TCR_MXDMA_MASK;
2241 1.10 dyoung tcr |= RTW_TCR_MXDMA_256;
2242 1.1 dyoung tcr |= RTW_TCR_SAT; /* send ACK as fast as possible */
2243 1.1 dyoung tcr &= ~RTW_TCR_LBK_MASK;
2244 1.1 dyoung tcr |= RTW_TCR_LBK_NORMAL; /* normal operating mode */
2245 1.1 dyoung
2246 1.1 dyoung /* set short/long retry limits */
2247 1.1 dyoung tcr &= ~(RTW_TCR_SRL_MASK|RTW_TCR_LRL_MASK);
2248 1.10 dyoung tcr |= LSHIFT(4, RTW_TCR_SRL_MASK) | LSHIFT(4, RTW_TCR_LRL_MASK);
2249 1.1 dyoung
2250 1.13 dyoung tcr &= ~RTW_TCR_CRC; /* NIC appends CRC32 */
2251 1.1 dyoung
2252 1.1 dyoung RTW_WRITE(regs, RTW_TCR, tcr);
2253 1.8 dyoung RTW_SYNC(regs, RTW_TCR, RTW_TCR);
2254 1.1 dyoung }
2255 1.1 dyoung
2256 1.1 dyoung static __inline void
2257 1.1 dyoung rtw_enable_interrupts(struct rtw_softc *sc)
2258 1.1 dyoung {
2259 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2260 1.1 dyoung
2261 1.1 dyoung sc->sc_inten = RTW_INTR_RX|RTW_INTR_TX|RTW_INTR_BEACON|RTW_INTR_ATIMINT;
2262 1.1 dyoung sc->sc_inten |= RTW_INTR_IOERROR|RTW_INTR_TIMEOUT;
2263 1.1 dyoung
2264 1.1 dyoung RTW_WRITE16(regs, RTW_IMR, sc->sc_inten);
2265 1.8 dyoung RTW_WBW(regs, RTW_IMR, RTW_ISR);
2266 1.1 dyoung RTW_WRITE16(regs, RTW_ISR, 0xffff);
2267 1.8 dyoung RTW_SYNC(regs, RTW_IMR, RTW_ISR);
2268 1.1 dyoung
2269 1.1 dyoung /* XXX necessary? */
2270 1.1 dyoung if (sc->sc_intr_ack != NULL)
2271 1.1 dyoung (*sc->sc_intr_ack)(regs);
2272 1.1 dyoung }
2273 1.1 dyoung
2274 1.10 dyoung static void
2275 1.10 dyoung rtw_set_nettype(struct rtw_softc *sc, enum ieee80211_opmode opmode)
2276 1.10 dyoung {
2277 1.10 dyoung uint8_t msr;
2278 1.10 dyoung
2279 1.10 dyoung /* I'm guessing that MSR is protected as CONFIG[0123] are. */
2280 1.42 dyoung rtw_set_access(&sc->sc_regs, RTW_ACCESS_CONFIG);
2281 1.10 dyoung
2282 1.10 dyoung msr = RTW_READ8(&sc->sc_regs, RTW_MSR) & ~RTW_MSR_NETYPE_MASK;
2283 1.10 dyoung
2284 1.10 dyoung switch (opmode) {
2285 1.10 dyoung case IEEE80211_M_AHDEMO:
2286 1.10 dyoung case IEEE80211_M_IBSS:
2287 1.10 dyoung msr |= RTW_MSR_NETYPE_ADHOC_OK;
2288 1.10 dyoung break;
2289 1.10 dyoung case IEEE80211_M_HOSTAP:
2290 1.10 dyoung msr |= RTW_MSR_NETYPE_AP_OK;
2291 1.10 dyoung break;
2292 1.10 dyoung case IEEE80211_M_MONITOR:
2293 1.10 dyoung /* XXX */
2294 1.10 dyoung msr |= RTW_MSR_NETYPE_NOLINK;
2295 1.10 dyoung break;
2296 1.10 dyoung case IEEE80211_M_STA:
2297 1.10 dyoung msr |= RTW_MSR_NETYPE_INFRA_OK;
2298 1.10 dyoung break;
2299 1.10 dyoung }
2300 1.10 dyoung RTW_WRITE8(&sc->sc_regs, RTW_MSR, msr);
2301 1.10 dyoung
2302 1.42 dyoung rtw_set_access(&sc->sc_regs, RTW_ACCESS_NONE);
2303 1.10 dyoung }
2304 1.10 dyoung
2305 1.1 dyoung #define rtw_calchash(addr) \
2306 1.38 dyoung (ether_crc32_be((addr), IEEE80211_ADDR_LEN) >> 26)
2307 1.1 dyoung
2308 1.1 dyoung static void
2309 1.1 dyoung rtw_pktfilt_load(struct rtw_softc *sc)
2310 1.1 dyoung {
2311 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2312 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2313 1.1 dyoung struct ethercom *ec = &ic->ic_ec;
2314 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
2315 1.1 dyoung int hash;
2316 1.37 dyoung uint32_t hashes[2] = { 0, 0 };
2317 1.1 dyoung struct ether_multi *enm;
2318 1.1 dyoung struct ether_multistep step;
2319 1.1 dyoung
2320 1.1 dyoung /* XXX might be necessary to stop Rx/Tx engines while setting filters */
2321 1.1 dyoung
2322 1.38 dyoung sc->sc_rcr &= ~RTW_RCR_PKTFILTER_MASK;
2323 1.38 dyoung sc->sc_rcr &= ~(RTW_RCR_MXDMA_MASK | RTW_RCR_RXFTH_MASK);
2324 1.1 dyoung
2325 1.38 dyoung sc->sc_rcr |= RTW_RCR_PKTFILTER_DEFAULT;
2326 1.38 dyoung /* MAC auto-reset PHY (huh?) */
2327 1.10 dyoung sc->sc_rcr |= RTW_RCR_ENMARP;
2328 1.38 dyoung /* DMA whole Rx packets, only. Set Tx DMA burst size to 1024 bytes. */
2329 1.38 dyoung sc->sc_rcr |= RTW_RCR_MXDMA_1024 | RTW_RCR_RXFTH_WHOLE;
2330 1.1 dyoung
2331 1.38 dyoung switch (ic->ic_opmode) {
2332 1.38 dyoung case IEEE80211_M_MONITOR:
2333 1.38 dyoung sc->sc_rcr |= RTW_RCR_MONITOR;
2334 1.38 dyoung break;
2335 1.38 dyoung case IEEE80211_M_AHDEMO:
2336 1.38 dyoung case IEEE80211_M_IBSS:
2337 1.38 dyoung /* receive broadcasts in our BSS */
2338 1.38 dyoung sc->sc_rcr |= RTW_RCR_ADD3;
2339 1.38 dyoung break;
2340 1.38 dyoung default:
2341 1.38 dyoung break;
2342 1.38 dyoung }
2343 1.1 dyoung
2344 1.1 dyoung ifp->if_flags &= ~IFF_ALLMULTI;
2345 1.1 dyoung
2346 1.38 dyoung /* XXX accept all broadcast if scanning */
2347 1.38 dyoung if ((ifp->if_flags & IFF_BROADCAST) != 0)
2348 1.38 dyoung sc->sc_rcr |= RTW_RCR_AB; /* accept all broadcast */
2349 1.38 dyoung
2350 1.1 dyoung if (ifp->if_flags & IFF_PROMISC) {
2351 1.1 dyoung sc->sc_rcr |= RTW_RCR_AB; /* accept all broadcast */
2352 1.1 dyoung allmulti:
2353 1.1 dyoung ifp->if_flags |= IFF_ALLMULTI;
2354 1.1 dyoung goto setit;
2355 1.1 dyoung }
2356 1.1 dyoung
2357 1.1 dyoung /*
2358 1.1 dyoung * Program the 64-bit multicast hash filter.
2359 1.1 dyoung */
2360 1.1 dyoung ETHER_FIRST_MULTI(step, ec, enm);
2361 1.1 dyoung while (enm != NULL) {
2362 1.1 dyoung /* XXX */
2363 1.1 dyoung if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
2364 1.1 dyoung ETHER_ADDR_LEN) != 0)
2365 1.1 dyoung goto allmulti;
2366 1.1 dyoung
2367 1.1 dyoung hash = rtw_calchash(enm->enm_addrlo);
2368 1.38 dyoung hashes[hash >> 5] |= (1 << (hash & 0x1f));
2369 1.38 dyoung sc->sc_rcr |= RTW_RCR_AM;
2370 1.1 dyoung ETHER_NEXT_MULTI(step, enm);
2371 1.1 dyoung }
2372 1.1 dyoung
2373 1.1 dyoung /* all bits set => hash is useless */
2374 1.1 dyoung if (~(hashes[0] & hashes[1]) == 0)
2375 1.1 dyoung goto allmulti;
2376 1.1 dyoung
2377 1.1 dyoung setit:
2378 1.38 dyoung if (ifp->if_flags & IFF_ALLMULTI) {
2379 1.1 dyoung sc->sc_rcr |= RTW_RCR_AM; /* accept all multicast */
2380 1.38 dyoung hashes[0] = hashes[1] = 0xffffffff;
2381 1.38 dyoung }
2382 1.1 dyoung
2383 1.1 dyoung RTW_WRITE(regs, RTW_MAR0, hashes[0]);
2384 1.1 dyoung RTW_WRITE(regs, RTW_MAR1, hashes[1]);
2385 1.1 dyoung RTW_WRITE(regs, RTW_RCR, sc->sc_rcr);
2386 1.1 dyoung RTW_SYNC(regs, RTW_MAR0, RTW_RCR); /* RTW_MAR0 < RTW_MAR1 < RTW_RCR */
2387 1.1 dyoung
2388 1.21 dyoung DPRINTF(sc, RTW_DEBUG_PKTFILT,
2389 1.21 dyoung ("%s: RTW_MAR0 %08x RTW_MAR1 %08x RTW_RCR %08x\n",
2390 1.1 dyoung sc->sc_dev.dv_xname, RTW_READ(regs, RTW_MAR0),
2391 1.1 dyoung RTW_READ(regs, RTW_MAR1), RTW_READ(regs, RTW_RCR)));
2392 1.1 dyoung
2393 1.1 dyoung return;
2394 1.1 dyoung }
2395 1.1 dyoung
2396 1.42 dyoung #define IEEE80211_BEACON_TIMESTAMP_LEN 8
2397 1.42 dyoung #define IEEE80211_BEACON_BINTVL_LEN 2
2398 1.42 dyoung #define IEEE80211_BEACON_CAPINFO_LEN 2
2399 1.42 dyoung #define IEEE80211_TLV_SSID_LEN(__esslen) (2 + (__esslen))
2400 1.42 dyoung #define IEEE80211_TLV_SUPRATES_LEN(__nrates) (2 + (__nrates))
2401 1.42 dyoung #define IEEE80211_TLV_XSUPRATES_LEN(__nrates) (2 + (__nrates))
2402 1.42 dyoung #define IEEE80211_TLV_DSPARMS_LEN 3
2403 1.42 dyoung #define IEEE80211_TLV_IBSSPARMS 4
2404 1.42 dyoung #define IEEE80211_TLV_MIN_TIM 6
2405 1.42 dyoung
2406 1.42 dyoung #define IEEE80211_TLV_ALLRATES_LEN(__nrates) \
2407 1.42 dyoung (((__nrates) > IEEE80211_RATE_SIZE) ? 4 + (__nrates) : 2 + (__nrates))
2408 1.42 dyoung
2409 1.42 dyoung /* TBD factor with ieee80211_getmbuf */
2410 1.42 dyoung static struct mbuf *
2411 1.42 dyoung rtw_getmbuf(int flags, int type, u_int pktlen)
2412 1.42 dyoung {
2413 1.42 dyoung struct mbuf *m;
2414 1.42 dyoung
2415 1.42 dyoung KASSERT2(pktlen <= MCLBYTES, ("802.11 packet too large: %u", pktlen));
2416 1.42 dyoung MGETHDR(m, flags, type);
2417 1.42 dyoung if (m == NULL || pktlen <= MHLEN)
2418 1.42 dyoung return m;
2419 1.42 dyoung MCLGET(m, flags);
2420 1.42 dyoung if ((m->m_flags & M_EXT) != 0)
2421 1.42 dyoung return m;
2422 1.42 dyoung m_free(m);
2423 1.42 dyoung return NULL;
2424 1.42 dyoung }
2425 1.42 dyoung
2426 1.42 dyoung /* TBD factor with ath_beacon_alloc */
2427 1.42 dyoung static struct mbuf *
2428 1.42 dyoung rtw_beacon_alloc(struct rtw_softc *sc, struct ieee80211_node *ni)
2429 1.42 dyoung {
2430 1.42 dyoung struct ieee80211com *ic = &sc->sc_ic;
2431 1.42 dyoung struct ifnet *ifp = &ic->ic_if;
2432 1.42 dyoung struct ieee80211_frame *wh;
2433 1.42 dyoung struct mbuf *m;
2434 1.42 dyoung int pktlen;
2435 1.42 dyoung uint8_t *frm;
2436 1.42 dyoung uint16_t capinfo;
2437 1.42 dyoung struct ieee80211_rateset *rs;
2438 1.42 dyoung
2439 1.42 dyoung /*
2440 1.42 dyoung * NB: the beacon data buffer must be 32-bit aligned;
2441 1.42 dyoung * we assume the mbuf routines will return us something
2442 1.42 dyoung * with this alignment (perhaps should assert).
2443 1.42 dyoung */
2444 1.42 dyoung rs = &ni->ni_rates;
2445 1.42 dyoung pktlen = sizeof(struct ieee80211_frame)
2446 1.42 dyoung + IEEE80211_BEACON_TIMESTAMP_LEN
2447 1.42 dyoung + IEEE80211_BEACON_BINTVL_LEN
2448 1.42 dyoung + IEEE80211_BEACON_CAPINFO_LEN
2449 1.42 dyoung + IEEE80211_TLV_SSID_LEN(ni->ni_esslen)
2450 1.42 dyoung + IEEE80211_TLV_ALLRATES_LEN(rs->rs_nrates)
2451 1.42 dyoung + IEEE80211_TLV_DSPARMS_LEN
2452 1.42 dyoung + MAX(IEEE80211_TLV_IBSSPARMS, IEEE80211_TLV_MIN_TIM);
2453 1.42 dyoung
2454 1.42 dyoung m = rtw_getmbuf(M_DONTWAIT, MT_DATA, pktlen);
2455 1.42 dyoung if (m == NULL) {
2456 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_BEACON,
2457 1.42 dyoung ("%s: cannot get mbuf/cluster; size %u\n",
2458 1.42 dyoung __func__, pktlen));
2459 1.42 dyoung #if 0
2460 1.42 dyoung sc->sc_stats.ast_be_nombuf++;
2461 1.42 dyoung #endif
2462 1.42 dyoung return NULL;
2463 1.42 dyoung }
2464 1.42 dyoung
2465 1.42 dyoung wh = mtod(m, struct ieee80211_frame *);
2466 1.42 dyoung wh->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_MGT |
2467 1.42 dyoung IEEE80211_FC0_SUBTYPE_BEACON;
2468 1.42 dyoung wh->i_fc[1] = IEEE80211_FC1_DIR_NODS;
2469 1.42 dyoung *(u_int16_t *)wh->i_dur = 0;
2470 1.42 dyoung memcpy(wh->i_addr1, ifp->if_broadcastaddr, IEEE80211_ADDR_LEN);
2471 1.42 dyoung memcpy(wh->i_addr2, ic->ic_myaddr, IEEE80211_ADDR_LEN);
2472 1.42 dyoung memcpy(wh->i_addr3, ni->ni_bssid, IEEE80211_ADDR_LEN);
2473 1.42 dyoung *(u_int16_t *)wh->i_seq = 0;
2474 1.42 dyoung
2475 1.42 dyoung /*
2476 1.42 dyoung * beacon frame format
2477 1.42 dyoung * [8] time stamp
2478 1.42 dyoung * [2] beacon interval
2479 1.42 dyoung * [2] cabability information
2480 1.42 dyoung * [tlv] ssid
2481 1.42 dyoung * [tlv] supported rates
2482 1.42 dyoung * [tlv] parameter set (IBSS)
2483 1.42 dyoung * [tlv] extended supported rates
2484 1.42 dyoung */
2485 1.42 dyoung frm = (u_int8_t *)&wh[1];
2486 1.42 dyoung /* timestamp is set by hardware */
2487 1.42 dyoung memset(frm, 0, IEEE80211_BEACON_TIMESTAMP_LEN);
2488 1.42 dyoung frm += IEEE80211_BEACON_TIMESTAMP_LEN;
2489 1.42 dyoung *(u_int16_t *)frm = htole16(ni->ni_intval);
2490 1.42 dyoung frm += IEEE80211_BEACON_BINTVL_LEN;
2491 1.42 dyoung if (ic->ic_opmode == IEEE80211_M_IBSS)
2492 1.42 dyoung capinfo = IEEE80211_CAPINFO_IBSS;
2493 1.42 dyoung else
2494 1.42 dyoung capinfo = IEEE80211_CAPINFO_ESS;
2495 1.42 dyoung if (ic->ic_flags & IEEE80211_F_PRIVACY)
2496 1.42 dyoung capinfo |= IEEE80211_CAPINFO_PRIVACY;
2497 1.42 dyoung if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
2498 1.42 dyoung IEEE80211_IS_CHAN_2GHZ(ni->ni_chan))
2499 1.42 dyoung capinfo |= IEEE80211_CAPINFO_SHORT_PREAMBLE;
2500 1.42 dyoung if (ic->ic_flags & IEEE80211_F_SHSLOT)
2501 1.42 dyoung capinfo |= IEEE80211_CAPINFO_SHORT_SLOTTIME;
2502 1.42 dyoung *(u_int16_t *)frm = htole16(capinfo);
2503 1.42 dyoung frm += IEEE80211_BEACON_CAPINFO_LEN;
2504 1.42 dyoung *frm++ = IEEE80211_ELEMID_SSID;
2505 1.42 dyoung *frm++ = ni->ni_esslen;
2506 1.42 dyoung memcpy(frm, ni->ni_essid, ni->ni_esslen);
2507 1.42 dyoung frm += ni->ni_esslen;
2508 1.42 dyoung frm = ieee80211_add_rates(frm, rs);
2509 1.42 dyoung *frm++ = IEEE80211_ELEMID_DSPARMS;
2510 1.42 dyoung *frm++ = 1;
2511 1.42 dyoung *frm++ = ieee80211_chan2ieee(ic, ni->ni_chan);
2512 1.42 dyoung if (ic->ic_opmode == IEEE80211_M_IBSS) {
2513 1.42 dyoung *frm++ = IEEE80211_ELEMID_IBSSPARMS;
2514 1.42 dyoung *frm++ = 2;
2515 1.42 dyoung *frm++ = 0; *frm++ = 0; /* TODO: ATIM window */
2516 1.42 dyoung } else {
2517 1.42 dyoung /* TODO: TIM */
2518 1.42 dyoung *frm++ = IEEE80211_ELEMID_TIM;
2519 1.42 dyoung *frm++ = 4; /* length */
2520 1.44 perry *frm++ = 0; /* DTIM count */
2521 1.42 dyoung *frm++ = 1; /* DTIM period */
2522 1.42 dyoung *frm++ = 0; /* bitmap control */
2523 1.42 dyoung *frm++ = 0; /* Partial Virtual Bitmap (variable length) */
2524 1.42 dyoung }
2525 1.42 dyoung frm = ieee80211_add_xrates(frm, rs);
2526 1.42 dyoung m->m_pkthdr.len = m->m_len = frm - mtod(m, u_int8_t *);
2527 1.42 dyoung m->m_pkthdr.rcvif = (void *)ni;
2528 1.42 dyoung KASSERT2(m->m_pkthdr.len <= pktlen,
2529 1.42 dyoung ("beacon bigger than expected, len %u calculated %u",
2530 1.42 dyoung m->m_pkthdr.len, pktlen));
2531 1.42 dyoung
2532 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_BEACON,
2533 1.42 dyoung ("%s: m %p len %u\n", __func__, m, m->m_len));
2534 1.42 dyoung
2535 1.42 dyoung return m;
2536 1.42 dyoung }
2537 1.42 dyoung
2538 1.21 dyoung /* Must be called at splnet. */
2539 1.1 dyoung static int
2540 1.1 dyoung rtw_init(struct ifnet *ifp)
2541 1.1 dyoung {
2542 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc *)ifp->if_softc;
2543 1.1 dyoung struct ieee80211com *ic = &sc->sc_ic;
2544 1.1 dyoung struct rtw_regs *regs = &sc->sc_regs;
2545 1.4 dyoung int rc = 0;
2546 1.1 dyoung
2547 1.1 dyoung if ((rc = rtw_enable(sc)) != 0)
2548 1.1 dyoung goto out;
2549 1.1 dyoung
2550 1.1 dyoung /* Cancel pending I/O and reset. */
2551 1.1 dyoung rtw_stop(ifp, 0);
2552 1.1 dyoung
2553 1.1 dyoung ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2554 1.21 dyoung DPRINTF(sc, RTW_DEBUG_TUNE, ("%s: channel %d freq %d flags 0x%04x\n",
2555 1.1 dyoung __func__, ieee80211_chan2ieee(ic, ic->ic_bss->ni_chan),
2556 1.1 dyoung ic->ic_bss->ni_chan->ic_freq, ic->ic_bss->ni_chan->ic_flags));
2557 1.1 dyoung
2558 1.1 dyoung if ((rc = rtw_pwrstate(sc, RTW_OFF)) != 0)
2559 1.1 dyoung goto out;
2560 1.1 dyoung
2561 1.31 dyoung if ((rc = rtw_swring_setup(sc)) != 0)
2562 1.31 dyoung goto out;
2563 1.1 dyoung
2564 1.1 dyoung rtw_transmit_config(regs);
2565 1.1 dyoung
2566 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
2567 1.1 dyoung
2568 1.4 dyoung RTW_WRITE8(regs, RTW_MSR, 0x0); /* no link */
2569 1.8 dyoung RTW_WBW(regs, RTW_MSR, RTW_BRSR);
2570 1.1 dyoung
2571 1.27 mycroft /* long PLCP header, 1Mb/2Mb basic rate */
2572 1.27 mycroft RTW_WRITE16(regs, RTW_BRSR, RTW_BRSR_MBR8180_2MBPS);
2573 1.8 dyoung RTW_SYNC(regs, RTW_BRSR, RTW_BRSR);
2574 1.1 dyoung
2575 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_ANAPARM);
2576 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
2577 1.1 dyoung
2578 1.1 dyoung /* XXX from reference sources */
2579 1.1 dyoung RTW_WRITE(regs, RTW_FEMR, 0xffff);
2580 1.8 dyoung RTW_SYNC(regs, RTW_FEMR, RTW_FEMR);
2581 1.1 dyoung
2582 1.4 dyoung rtw_set_rfprog(regs, sc->sc_rfchipid, sc->sc_dev.dv_xname);
2583 1.4 dyoung
2584 1.4 dyoung RTW_WRITE8(regs, RTW_PHYDELAY, sc->sc_phydelay);
2585 1.1 dyoung /* from Linux driver */
2586 1.4 dyoung RTW_WRITE8(regs, RTW_CRCOUNT, RTW_CRCOUNT_MAGIC);
2587 1.1 dyoung
2588 1.8 dyoung RTW_SYNC(regs, RTW_PHYDELAY, RTW_CRCOUNT);
2589 1.8 dyoung
2590 1.1 dyoung rtw_enable_interrupts(sc);
2591 1.1 dyoung
2592 1.1 dyoung rtw_pktfilt_load(sc);
2593 1.1 dyoung
2594 1.3 dyoung rtw_hwring_setup(sc);
2595 1.1 dyoung
2596 1.42 dyoung rtw_wep_setkeys(sc, ic->ic_nw_keys, ic->ic_wep_txkey);
2597 1.42 dyoung
2598 1.1 dyoung rtw_io_enable(regs, RTW_CR_RE|RTW_CR_TE, 1);
2599 1.1 dyoung
2600 1.1 dyoung ifp->if_flags |= IFF_RUNNING;
2601 1.1 dyoung ic->ic_state = IEEE80211_S_INIT;
2602 1.1 dyoung
2603 1.1 dyoung RTW_WRITE16(regs, RTW_BSSID16, 0x0);
2604 1.1 dyoung RTW_WRITE(regs, RTW_BSSID32, 0x0);
2605 1.1 dyoung
2606 1.4 dyoung rtw_resume_ticks(sc);
2607 1.1 dyoung
2608 1.10 dyoung rtw_set_nettype(sc, IEEE80211_M_MONITOR);
2609 1.4 dyoung
2610 1.4 dyoung if (ic->ic_opmode == IEEE80211_M_MONITOR)
2611 1.4 dyoung return ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2612 1.4 dyoung else
2613 1.4 dyoung return ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2614 1.4 dyoung
2615 1.1 dyoung out:
2616 1.31 dyoung printf("%s: interface not running\n", sc->sc_dev.dv_xname);
2617 1.1 dyoung return rc;
2618 1.1 dyoung }
2619 1.1 dyoung
2620 1.42 dyoung static __inline void
2621 1.42 dyoung rtw_led_init(struct rtw_regs *regs)
2622 1.42 dyoung {
2623 1.42 dyoung uint8_t cfg0, cfg1;
2624 1.42 dyoung
2625 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
2626 1.42 dyoung
2627 1.42 dyoung cfg0 = RTW_READ8(regs, RTW_CONFIG0);
2628 1.42 dyoung cfg0 |= RTW_CONFIG0_LEDGPOEN;
2629 1.42 dyoung RTW_WRITE8(regs, RTW_CONFIG0, cfg0);
2630 1.42 dyoung
2631 1.42 dyoung cfg1 = RTW_READ8(regs, RTW_CONFIG1);
2632 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2633 1.42 dyoung ("%s: read %" PRIx8 " from reg[CONFIG1]\n", __func__, cfg1));
2634 1.42 dyoung
2635 1.42 dyoung cfg1 &= ~RTW_CONFIG1_LEDS_MASK;
2636 1.42 dyoung cfg1 |= RTW_CONFIG1_LEDS_TX_RX;
2637 1.42 dyoung RTW_WRITE8(regs, RTW_CONFIG1, cfg1);
2638 1.42 dyoung
2639 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
2640 1.42 dyoung }
2641 1.42 dyoung
2642 1.44 perry /*
2643 1.42 dyoung * IEEE80211_S_INIT: LED1 off
2644 1.42 dyoung *
2645 1.42 dyoung * IEEE80211_S_AUTH,
2646 1.42 dyoung * IEEE80211_S_ASSOC,
2647 1.42 dyoung * IEEE80211_S_SCAN: LED1 blinks @ 1 Hz, blinks at 5Hz for tx/rx
2648 1.42 dyoung *
2649 1.42 dyoung * IEEE80211_S_RUN: LED1 on, blinks @ 5Hz for tx/rx
2650 1.42 dyoung */
2651 1.42 dyoung static void
2652 1.42 dyoung rtw_led_newstate(struct rtw_softc *sc, enum ieee80211_state nstate)
2653 1.42 dyoung {
2654 1.42 dyoung struct rtw_led_state *ls;
2655 1.42 dyoung
2656 1.42 dyoung ls = &sc->sc_led_state;
2657 1.42 dyoung
2658 1.42 dyoung switch (nstate) {
2659 1.42 dyoung case IEEE80211_S_INIT:
2660 1.42 dyoung rtw_led_init(&sc->sc_regs);
2661 1.42 dyoung callout_stop(&ls->ls_slow_ch);
2662 1.42 dyoung callout_stop(&ls->ls_fast_ch);
2663 1.42 dyoung ls->ls_slowblink = 0;
2664 1.42 dyoung ls->ls_actblink = 0;
2665 1.42 dyoung ls->ls_default = 0;
2666 1.42 dyoung break;
2667 1.42 dyoung case IEEE80211_S_SCAN:
2668 1.42 dyoung callout_schedule(&ls->ls_slow_ch, RTW_LED_SLOW_TICKS);
2669 1.42 dyoung callout_schedule(&ls->ls_fast_ch, RTW_LED_FAST_TICKS);
2670 1.42 dyoung /*FALLTHROUGH*/
2671 1.42 dyoung case IEEE80211_S_AUTH:
2672 1.42 dyoung case IEEE80211_S_ASSOC:
2673 1.42 dyoung ls->ls_default = RTW_LED1;
2674 1.42 dyoung ls->ls_actblink = RTW_LED1;
2675 1.42 dyoung ls->ls_slowblink = RTW_LED1;
2676 1.42 dyoung break;
2677 1.42 dyoung case IEEE80211_S_RUN:
2678 1.42 dyoung ls->ls_slowblink = 0;
2679 1.42 dyoung break;
2680 1.42 dyoung }
2681 1.42 dyoung rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
2682 1.42 dyoung }
2683 1.42 dyoung
2684 1.42 dyoung static void
2685 1.42 dyoung rtw_led_set(struct rtw_led_state *ls, struct rtw_regs *regs, int hwverid)
2686 1.42 dyoung {
2687 1.42 dyoung uint8_t led_condition;
2688 1.42 dyoung bus_size_t ofs;
2689 1.42 dyoung uint8_t mask, newval, val;
2690 1.42 dyoung
2691 1.42 dyoung led_condition = ls->ls_default;
2692 1.42 dyoung
2693 1.42 dyoung if (ls->ls_state & RTW_LED_S_SLOW)
2694 1.42 dyoung led_condition ^= ls->ls_slowblink;
2695 1.42 dyoung if (ls->ls_state & (RTW_LED_S_RX|RTW_LED_S_TX))
2696 1.42 dyoung led_condition ^= ls->ls_actblink;
2697 1.42 dyoung
2698 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2699 1.42 dyoung ("%s: LED condition %" PRIx8 "\n", __func__, led_condition));
2700 1.42 dyoung
2701 1.42 dyoung switch (hwverid) {
2702 1.42 dyoung default:
2703 1.42 dyoung case 'F':
2704 1.42 dyoung ofs = RTW_PSR;
2705 1.42 dyoung newval = mask = RTW_PSR_LEDGPO0 | RTW_PSR_LEDGPO1;
2706 1.42 dyoung if (led_condition & RTW_LED0)
2707 1.42 dyoung newval &= ~RTW_PSR_LEDGPO0;
2708 1.42 dyoung if (led_condition & RTW_LED1)
2709 1.42 dyoung newval &= ~RTW_PSR_LEDGPO1;
2710 1.42 dyoung break;
2711 1.42 dyoung case 'D':
2712 1.42 dyoung ofs = RTW_9346CR;
2713 1.42 dyoung mask = RTW_9346CR_EEM_MASK | RTW_9346CR_EEDI | RTW_9346CR_EECS;
2714 1.42 dyoung newval = RTW_9346CR_EEM_PROGRAM;
2715 1.42 dyoung if (led_condition & RTW_LED0)
2716 1.42 dyoung newval |= RTW_9346CR_EEDI;
2717 1.42 dyoung if (led_condition & RTW_LED1)
2718 1.42 dyoung newval |= RTW_9346CR_EECS;
2719 1.42 dyoung break;
2720 1.42 dyoung }
2721 1.42 dyoung val = RTW_READ8(regs, ofs);
2722 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2723 1.45 dyoung ("%s: read %" PRIx8 " from reg[%#02" PRIxPTR "]\n", __func__, val,
2724 1.45 dyoung (uintptr_t)ofs));
2725 1.42 dyoung val &= ~mask;
2726 1.42 dyoung val |= newval;
2727 1.42 dyoung RTW_WRITE8(regs, ofs, val);
2728 1.42 dyoung RTW_DPRINTF(RTW_DEBUG_LED,
2729 1.45 dyoung ("%s: wrote %" PRIx8 " to reg[%#02" PRIxPTR "]\n", __func__, val,
2730 1.45 dyoung (uintptr_t)ofs));
2731 1.42 dyoung RTW_SYNC(regs, ofs, ofs);
2732 1.42 dyoung }
2733 1.42 dyoung
2734 1.42 dyoung static void
2735 1.42 dyoung rtw_led_fastblink(void *arg)
2736 1.42 dyoung {
2737 1.42 dyoung int ostate, s;
2738 1.42 dyoung struct rtw_softc *sc = (struct rtw_softc *)arg;
2739 1.42 dyoung struct rtw_led_state *ls = &sc->sc_led_state;
2740 1.42 dyoung
2741 1.42 dyoung s = splnet();
2742 1.42 dyoung ostate = ls->ls_state;
2743 1.42 dyoung ls->ls_state ^= ls->ls_event;
2744 1.42 dyoung
2745 1.42 dyoung if ((ls->ls_event & RTW_LED_S_TX) == 0)
2746 1.42 dyoung ls->ls_state &= ~RTW_LED_S_TX;
2747 1.42 dyoung
2748 1.42 dyoung if ((ls->ls_event & RTW_LED_S_RX) == 0)
2749 1.42 dyoung ls->ls_state &= ~RTW_LED_S_RX;
2750 1.42 dyoung
2751 1.42 dyoung ls->ls_event = 0;
2752 1.42 dyoung
2753 1.42 dyoung if (ostate != ls->ls_state)
2754 1.42 dyoung rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
2755 1.42 dyoung splx(s);
2756 1.42 dyoung
2757 1.42 dyoung callout_schedule(&ls->ls_fast_ch, RTW_LED_FAST_TICKS);
2758 1.42 dyoung }
2759 1.42 dyoung
2760 1.42 dyoung static void
2761 1.42 dyoung rtw_led_slowblink(void *arg)
2762 1.42 dyoung {
2763 1.42 dyoung int s;
2764 1.42 dyoung struct rtw_softc *sc = (struct rtw_softc *)arg;
2765 1.42 dyoung struct rtw_led_state *ls = &sc->sc_led_state;
2766 1.42 dyoung
2767 1.42 dyoung s = splnet();
2768 1.42 dyoung ls->ls_state ^= RTW_LED_S_SLOW;
2769 1.42 dyoung rtw_led_set(ls, &sc->sc_regs, sc->sc_hwverid);
2770 1.42 dyoung splx(s);
2771 1.42 dyoung callout_schedule(&ls->ls_slow_ch, RTW_LED_SLOW_TICKS);
2772 1.42 dyoung }
2773 1.42 dyoung
2774 1.42 dyoung static __inline void
2775 1.45 dyoung rtw_led_attach(struct rtw_led_state *ls, void *arg)
2776 1.42 dyoung {
2777 1.42 dyoung callout_init(&ls->ls_fast_ch);
2778 1.42 dyoung callout_init(&ls->ls_slow_ch);
2779 1.45 dyoung callout_setfunc(&ls->ls_fast_ch, rtw_led_fastblink, arg);
2780 1.45 dyoung callout_setfunc(&ls->ls_slow_ch, rtw_led_slowblink, arg);
2781 1.42 dyoung }
2782 1.42 dyoung
2783 1.1 dyoung static int
2784 1.1 dyoung rtw_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
2785 1.1 dyoung {
2786 1.21 dyoung int rc = 0, s;
2787 1.1 dyoung struct rtw_softc *sc = ifp->if_softc;
2788 1.1 dyoung struct ifreq *ifr = (struct ifreq *)data;
2789 1.1 dyoung
2790 1.21 dyoung s = splnet();
2791 1.1 dyoung switch (cmd) {
2792 1.1 dyoung case SIOCSIFFLAGS:
2793 1.1 dyoung if ((ifp->if_flags & IFF_UP) != 0) {
2794 1.38 dyoung if ((sc->sc_flags & RTW_F_ENABLED) != 0) {
2795 1.1 dyoung rtw_pktfilt_load(sc);
2796 1.1 dyoung } else
2797 1.1 dyoung rc = rtw_init(ifp);
2798 1.39 dyoung RTW_PRINT_REGS(&sc->sc_regs, ifp->if_xname, __func__);
2799 1.1 dyoung } else if ((sc->sc_flags & RTW_F_ENABLED) != 0) {
2800 1.39 dyoung RTW_PRINT_REGS(&sc->sc_regs, ifp->if_xname, __func__);
2801 1.1 dyoung rtw_stop(ifp, 1);
2802 1.1 dyoung }
2803 1.1 dyoung break;
2804 1.1 dyoung case SIOCADDMULTI:
2805 1.1 dyoung case SIOCDELMULTI:
2806 1.1 dyoung if (cmd == SIOCADDMULTI)
2807 1.1 dyoung rc = ether_addmulti(ifr, &sc->sc_ic.ic_ec);
2808 1.1 dyoung else
2809 1.1 dyoung rc = ether_delmulti(ifr, &sc->sc_ic.ic_ec);
2810 1.39 dyoung if (rc != ENETRESET)
2811 1.39 dyoung break;
2812 1.39 dyoung if (ifp->if_flags & IFF_RUNNING)
2813 1.39 dyoung rtw_pktfilt_load(sc);
2814 1.39 dyoung rc = 0;
2815 1.1 dyoung break;
2816 1.42 dyoung case SIOCS80211NWKEY:
2817 1.42 dyoung if ((rc = ieee80211_ioctl(ifp, cmd, data)) != ENETRESET)
2818 1.42 dyoung break;
2819 1.42 dyoung rc = 0;
2820 1.42 dyoung if ((ifp->if_flags & IFF_RUNNING) == 0)
2821 1.42 dyoung break;
2822 1.42 dyoung rtw_wep_setkeys(sc, sc->sc_ic.ic_nw_keys,
2823 1.42 dyoung sc->sc_ic.ic_wep_txkey);
2824 1.42 dyoung break;
2825 1.1 dyoung default:
2826 1.39 dyoung if ((rc = ieee80211_ioctl(ifp, cmd, data)) != ENETRESET)
2827 1.39 dyoung break;
2828 1.39 dyoung if ((sc->sc_flags & RTW_F_ENABLED) != 0)
2829 1.39 dyoung rc = rtw_init(ifp);
2830 1.39 dyoung else
2831 1.39 dyoung rc = 0;
2832 1.1 dyoung break;
2833 1.1 dyoung }
2834 1.21 dyoung splx(s);
2835 1.1 dyoung return rc;
2836 1.1 dyoung }
2837 1.1 dyoung
2838 1.42 dyoung /* Select a transmit ring with at least one h/w and s/w descriptor free.
2839 1.42 dyoung * Return 0 on success, -1 on failure.
2840 1.42 dyoung */
2841 1.42 dyoung static __inline int
2842 1.42 dyoung rtw_txring_choose(struct rtw_softc *sc, struct rtw_txsoft_blk **tsbp,
2843 1.42 dyoung struct rtw_txdesc_blk **tdbp, int pri)
2844 1.42 dyoung {
2845 1.42 dyoung struct rtw_txsoft_blk *tsb;
2846 1.42 dyoung struct rtw_txdesc_blk *tdb;
2847 1.42 dyoung
2848 1.42 dyoung KASSERT(pri >= 0 && pri < RTW_NTXPRI);
2849 1.42 dyoung
2850 1.42 dyoung tsb = &sc->sc_txsoft_blk[pri];
2851 1.42 dyoung tdb = &sc->sc_txdesc_blk[pri];
2852 1.42 dyoung
2853 1.42 dyoung if (SIMPLEQ_EMPTY(&tsb->tsb_freeq) || tdb->tdb_nfree == 0) {
2854 1.42 dyoung *tsbp = NULL;
2855 1.42 dyoung *tdbp = NULL;
2856 1.42 dyoung return -1;
2857 1.42 dyoung }
2858 1.42 dyoung *tsbp = tsb;
2859 1.42 dyoung *tdbp = tdb;
2860 1.42 dyoung return 0;
2861 1.42 dyoung }
2862 1.42 dyoung
2863 1.42 dyoung static __inline struct mbuf *
2864 1.42 dyoung rtw_80211_dequeue(struct rtw_softc *sc, struct ifqueue *ifq, int pri,
2865 1.42 dyoung struct rtw_txsoft_blk **tsbp, struct rtw_txdesc_blk **tdbp,
2866 1.42 dyoung struct ieee80211_node **nip, short *if_flagsp)
2867 1.42 dyoung {
2868 1.42 dyoung struct mbuf *m;
2869 1.42 dyoung
2870 1.42 dyoung if (IF_IS_EMPTY(ifq))
2871 1.42 dyoung return NULL;
2872 1.42 dyoung if (rtw_txring_choose(sc, tsbp, tdbp, pri) == -1) {
2873 1.42 dyoung *if_flagsp |= IFF_OACTIVE;
2874 1.42 dyoung return NULL;
2875 1.42 dyoung }
2876 1.42 dyoung IF_DEQUEUE(ifq, m);
2877 1.42 dyoung *nip = (struct ieee80211_node *)m->m_pkthdr.rcvif;
2878 1.42 dyoung m->m_pkthdr.rcvif = NULL;
2879 1.42 dyoung return m;
2880 1.42 dyoung }
2881 1.42 dyoung
2882 1.34 dyoung /* Point *mp at the next 802.11 frame to transmit. Point *tsbp
2883 1.1 dyoung * at the driver's selection of transmit control block for the packet.
2884 1.1 dyoung */
2885 1.1 dyoung static __inline int
2886 1.34 dyoung rtw_dequeue(struct ifnet *ifp, struct rtw_txsoft_blk **tsbp,
2887 1.34 dyoung struct rtw_txdesc_blk **tdbp, struct mbuf **mp,
2888 1.1 dyoung struct ieee80211_node **nip)
2889 1.1 dyoung {
2890 1.1 dyoung struct mbuf *m0;
2891 1.1 dyoung struct rtw_softc *sc;
2892 1.42 dyoung short *if_flagsp;
2893 1.1 dyoung
2894 1.1 dyoung sc = (struct rtw_softc *)ifp->if_softc;
2895 1.1 dyoung
2896 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
2897 1.21 dyoung ("%s: enter %s\n", sc->sc_dev.dv_xname, __func__));
2898 1.1 dyoung
2899 1.42 dyoung if_flagsp = &ifp->if_flags;
2900 1.5 dyoung
2901 1.42 dyoung if (sc->sc_ic.ic_state == IEEE80211_S_RUN &&
2902 1.42 dyoung (*mp = rtw_80211_dequeue(sc, &sc->sc_beaconq, RTW_TXPRIBCN, tsbp,
2903 1.42 dyoung tdbp, nip, if_flagsp)) != NULL) {
2904 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue beacon frame\n",
2905 1.42 dyoung __func__));
2906 1.5 dyoung return 0;
2907 1.5 dyoung }
2908 1.5 dyoung
2909 1.42 dyoung if ((*mp = rtw_80211_dequeue(sc, &sc->sc_ic.ic_mgtq, RTW_TXPRIMD, tsbp,
2910 1.42 dyoung tdbp, nip, if_flagsp)) != NULL) {
2911 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue mgt frame\n",
2912 1.42 dyoung __func__));
2913 1.42 dyoung return 0;
2914 1.42 dyoung }
2915 1.5 dyoung
2916 1.42 dyoung if (sc->sc_ic.ic_state != IEEE80211_S_RUN) {
2917 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: not running\n", __func__));
2918 1.1 dyoung return 0;
2919 1.42 dyoung }
2920 1.42 dyoung
2921 1.42 dyoung if ((*mp = rtw_80211_dequeue(sc, &sc->sc_ic.ic_pwrsaveq, RTW_TXPRIHI,
2922 1.42 dyoung tsbp, tdbp, nip, if_flagsp)) != NULL) {
2923 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue pwrsave frame\n",
2924 1.42 dyoung __func__));
2925 1.42 dyoung return 0;
2926 1.42 dyoung }
2927 1.42 dyoung
2928 1.42 dyoung if (rtw_txring_choose(sc, tsbp, tdbp, RTW_TXPRIMD) == -1) {
2929 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no descriptor\n", __func__));
2930 1.42 dyoung *if_flagsp |= IFF_OACTIVE;
2931 1.42 dyoung return 0;
2932 1.42 dyoung }
2933 1.42 dyoung
2934 1.42 dyoung *mp = NULL;
2935 1.42 dyoung
2936 1.42 dyoung IFQ_DEQUEUE(&ifp->if_snd, m0);
2937 1.42 dyoung if (m0 == NULL) {
2938 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: no frame/ring ready\n",
2939 1.42 dyoung __func__));
2940 1.42 dyoung return 0;
2941 1.42 dyoung }
2942 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: dequeue data frame\n", __func__));
2943 1.42 dyoung ifp->if_opackets++;
2944 1.1 dyoung #if NBPFILTER > 0
2945 1.42 dyoung if (ifp->if_bpf)
2946 1.42 dyoung bpf_mtap(ifp->if_bpf, m0);
2947 1.1 dyoung #endif
2948 1.42 dyoung if ((m0 = ieee80211_encap(ifp, m0, nip)) == NULL) {
2949 1.42 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
2950 1.42 dyoung ("%s: encap error\n", __func__));
2951 1.42 dyoung ifp->if_oerrors++;
2952 1.42 dyoung return -1;
2953 1.1 dyoung }
2954 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
2955 1.1 dyoung *mp = m0;
2956 1.1 dyoung return 0;
2957 1.1 dyoung }
2958 1.1 dyoung
2959 1.21 dyoung static int
2960 1.21 dyoung rtw_seg_too_short(bus_dmamap_t dmamap)
2961 1.21 dyoung {
2962 1.21 dyoung int i;
2963 1.21 dyoung for (i = 0; i < dmamap->dm_nsegs; i++) {
2964 1.21 dyoung if (dmamap->dm_segs[i].ds_len < 4) {
2965 1.21 dyoung printf("%s: segment too short\n", __func__);
2966 1.21 dyoung return 1;
2967 1.21 dyoung }
2968 1.21 dyoung }
2969 1.21 dyoung return 0;
2970 1.21 dyoung }
2971 1.21 dyoung
2972 1.5 dyoung /* TBD factor with atw_start */
2973 1.5 dyoung static struct mbuf *
2974 1.5 dyoung rtw_dmamap_load_txbuf(bus_dma_tag_t dmat, bus_dmamap_t dmam, struct mbuf *chain,
2975 1.5 dyoung u_int ndescfree, short *ifflagsp, const char *dvname)
2976 1.5 dyoung {
2977 1.5 dyoung int first, rc;
2978 1.5 dyoung struct mbuf *m, *m0;
2979 1.5 dyoung
2980 1.5 dyoung m0 = chain;
2981 1.5 dyoung
2982 1.5 dyoung /*
2983 1.5 dyoung * Load the DMA map. Copy and try (once) again if the packet
2984 1.5 dyoung * didn't fit in the alloted number of segments.
2985 1.5 dyoung */
2986 1.5 dyoung for (first = 1;
2987 1.5 dyoung ((rc = bus_dmamap_load_mbuf(dmat, dmam, m0,
2988 1.5 dyoung BUS_DMA_WRITE|BUS_DMA_NOWAIT)) != 0 ||
2989 1.21 dyoung dmam->dm_nsegs > ndescfree || rtw_seg_too_short(dmam)) && first;
2990 1.5 dyoung first = 0) {
2991 1.5 dyoung if (rc == 0)
2992 1.5 dyoung bus_dmamap_unload(dmat, dmam);
2993 1.5 dyoung MGETHDR(m, M_DONTWAIT, MT_DATA);
2994 1.5 dyoung if (m == NULL) {
2995 1.5 dyoung printf("%s: unable to allocate Tx mbuf\n",
2996 1.5 dyoung dvname);
2997 1.5 dyoung break;
2998 1.5 dyoung }
2999 1.5 dyoung if (m0->m_pkthdr.len > MHLEN) {
3000 1.5 dyoung MCLGET(m, M_DONTWAIT);
3001 1.5 dyoung if ((m->m_flags & M_EXT) == 0) {
3002 1.5 dyoung printf("%s: cannot allocate Tx cluster\n",
3003 1.5 dyoung dvname);
3004 1.5 dyoung m_freem(m);
3005 1.5 dyoung break;
3006 1.5 dyoung }
3007 1.5 dyoung }
3008 1.5 dyoung m_copydata(m0, 0, m0->m_pkthdr.len, mtod(m, caddr_t));
3009 1.5 dyoung m->m_pkthdr.len = m->m_len = m0->m_pkthdr.len;
3010 1.5 dyoung m_freem(m0);
3011 1.5 dyoung m0 = m;
3012 1.5 dyoung m = NULL;
3013 1.5 dyoung }
3014 1.5 dyoung if (rc != 0) {
3015 1.5 dyoung printf("%s: cannot load Tx buffer, rc = %d\n", dvname, rc);
3016 1.5 dyoung m_freem(m0);
3017 1.5 dyoung return NULL;
3018 1.21 dyoung } else if (rtw_seg_too_short(dmam)) {
3019 1.21 dyoung printf("%s: cannot load Tx buffer, segment too short\n",
3020 1.21 dyoung dvname);
3021 1.21 dyoung bus_dmamap_unload(dmat, dmam);
3022 1.21 dyoung m_freem(m0);
3023 1.21 dyoung return NULL;
3024 1.5 dyoung } else if (dmam->dm_nsegs > ndescfree) {
3025 1.5 dyoung *ifflagsp |= IFF_OACTIVE;
3026 1.5 dyoung bus_dmamap_unload(dmat, dmam);
3027 1.5 dyoung m_freem(m0);
3028 1.5 dyoung return NULL;
3029 1.5 dyoung }
3030 1.5 dyoung return m0;
3031 1.5 dyoung }
3032 1.5 dyoung
3033 1.21 dyoung #ifdef RTW_DEBUG
3034 1.1 dyoung static void
3035 1.16 dyoung rtw_print_txdesc(struct rtw_softc *sc, const char *action,
3036 1.34 dyoung struct rtw_txsoft *ts, struct rtw_txdesc_blk *tdb, int desc)
3037 1.16 dyoung {
3038 1.34 dyoung struct rtw_txdesc *td = &tdb->tdb_desc[desc];
3039 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_DESC, ("%s: %p %s txdesc[%d] ctl0 %#08x "
3040 1.16 dyoung "ctl1 %#08x buf %#08x len %#08x\n",
3041 1.34 dyoung sc->sc_dev.dv_xname, ts, action, desc,
3042 1.34 dyoung le32toh(td->td_ctl0),
3043 1.34 dyoung le32toh(td->td_ctl1), le32toh(td->td_buf),
3044 1.34 dyoung le32toh(td->td_len)));
3045 1.16 dyoung }
3046 1.21 dyoung #endif /* RTW_DEBUG */
3047 1.16 dyoung
3048 1.16 dyoung static void
3049 1.1 dyoung rtw_start(struct ifnet *ifp)
3050 1.1 dyoung {
3051 1.10 dyoung uint8_t tppoll;
3052 1.5 dyoung int desc, i, lastdesc, npkt, rate;
3053 1.14 dyoung uint32_t proto_ctl0, ctl0, ctl1;
3054 1.5 dyoung bus_dmamap_t dmamap;
3055 1.5 dyoung struct ieee80211com *ic;
3056 1.5 dyoung struct ieee80211_duration *d0;
3057 1.5 dyoung struct ieee80211_frame *wh;
3058 1.5 dyoung struct ieee80211_node *ni;
3059 1.5 dyoung struct mbuf *m0;
3060 1.5 dyoung struct rtw_softc *sc;
3061 1.34 dyoung struct rtw_txsoft_blk *tsb;
3062 1.34 dyoung struct rtw_txdesc_blk *tdb;
3063 1.34 dyoung struct rtw_txsoft *ts;
3064 1.34 dyoung struct rtw_txdesc *td;
3065 1.1 dyoung
3066 1.1 dyoung sc = (struct rtw_softc *)ifp->if_softc;
3067 1.5 dyoung ic = &sc->sc_ic;
3068 1.1 dyoung
3069 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
3070 1.21 dyoung ("%s: enter %s\n", sc->sc_dev.dv_xname, __func__));
3071 1.5 dyoung
3072 1.31 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
3073 1.31 dyoung goto out;
3074 1.31 dyoung
3075 1.5 dyoung /* XXX do real rate control */
3076 1.14 dyoung proto_ctl0 = RTW_TXCTL0_RTSRATE_1MBPS;
3077 1.5 dyoung
3078 1.5 dyoung if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0)
3079 1.14 dyoung proto_ctl0 |= RTW_TXCTL0_SPLCP;
3080 1.5 dyoung
3081 1.5 dyoung for (;;) {
3082 1.34 dyoung if (rtw_dequeue(ifp, &tsb, &tdb, &m0, &ni) == -1)
3083 1.1 dyoung continue;
3084 1.1 dyoung if (m0 == NULL)
3085 1.1 dyoung break;
3086 1.34 dyoung ts = SIMPLEQ_FIRST(&tsb->tsb_freeq);
3087 1.5 dyoung
3088 1.34 dyoung dmamap = ts->ts_dmamap;
3089 1.5 dyoung
3090 1.5 dyoung m0 = rtw_dmamap_load_txbuf(sc->sc_dmat, dmamap, m0,
3091 1.34 dyoung tdb->tdb_nfree, &ifp->if_flags, sc->sc_dev.dv_xname);
3092 1.5 dyoung
3093 1.5 dyoung if (m0 == NULL || dmamap->dm_nsegs == 0) {
3094 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
3095 1.21 dyoung ("%s: fail dmamap load\n", __func__));
3096 1.5 dyoung goto post_dequeue_err;
3097 1.5 dyoung }
3098 1.5 dyoung
3099 1.45 dyoung wh = mtod(m0, struct ieee80211_frame *);
3100 1.45 dyoung
3101 1.45 dyoung /* XXX do real rate control */
3102 1.45 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
3103 1.45 dyoung IEEE80211_FC0_TYPE_MGT)
3104 1.45 dyoung rate = 2;
3105 1.45 dyoung else
3106 1.45 dyoung rate = MAX(2, ieee80211_get_rate(ic));
3107 1.45 dyoung
3108 1.16 dyoung #ifdef RTW_DEBUG
3109 1.16 dyoung if ((sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
3110 1.16 dyoung (IFF_DEBUG|IFF_LINK2)) {
3111 1.16 dyoung ieee80211_dump_pkt(mtod(m0, uint8_t *),
3112 1.16 dyoung (dmamap->dm_nsegs == 1) ? m0->m_pkthdr.len
3113 1.16 dyoung : sizeof(wh),
3114 1.16 dyoung rate, 0);
3115 1.16 dyoung }
3116 1.16 dyoung #endif /* RTW_DEBUG */
3117 1.14 dyoung ctl0 = proto_ctl0 |
3118 1.5 dyoung LSHIFT(m0->m_pkthdr.len, RTW_TXCTL0_TPKTSIZE_MASK);
3119 1.5 dyoung
3120 1.45 dyoung switch (rate) {
3121 1.42 dyoung default:
3122 1.42 dyoung case 2:
3123 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_1MBPS;
3124 1.42 dyoung break;
3125 1.42 dyoung case 4:
3126 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_2MBPS;
3127 1.42 dyoung break;
3128 1.42 dyoung case 11:
3129 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_5MBPS;
3130 1.42 dyoung break;
3131 1.42 dyoung case 22:
3132 1.42 dyoung ctl0 |= RTW_TXCTL0_RATE_11MBPS;
3133 1.42 dyoung break;
3134 1.42 dyoung }
3135 1.42 dyoung
3136 1.45 dyoung /* XXX >= ? Compare after fragmentation? */
3137 1.45 dyoung if (m0->m_pkthdr.len > ic->ic_rtsthreshold)
3138 1.45 dyoung ctl0 |= RTW_TXCTL0_RTSEN;
3139 1.45 dyoung
3140 1.42 dyoung if ((wh->i_fc[1] & IEEE80211_FC1_WEP) != 0)
3141 1.42 dyoung ctl0 |= LSHIFT(sc->sc_txkey, RTW_TXCTL0_KEYID_MASK);
3142 1.42 dyoung
3143 1.45 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) ==
3144 1.45 dyoung IEEE80211_FC0_TYPE_MGT) {
3145 1.45 dyoung ctl0 &= ~(RTW_TXCTL0_SPLCP | RTW_TXCTL0_RTSEN);
3146 1.45 dyoung if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) ==
3147 1.45 dyoung IEEE80211_FC0_SUBTYPE_BEACON)
3148 1.45 dyoung ctl0 |= RTW_TXCTL0_BEACON;
3149 1.45 dyoung }
3150 1.45 dyoung
3151 1.19 dyoung if (ieee80211_compute_duration(wh, m0->m_pkthdr.len,
3152 1.5 dyoung ic->ic_flags, ic->ic_fragthreshold,
3153 1.34 dyoung rate, &ts->ts_d0, &ts->ts_dn, &npkt,
3154 1.19 dyoung (sc->sc_if.if_flags & (IFF_DEBUG|IFF_LINK2)) ==
3155 1.19 dyoung (IFF_DEBUG|IFF_LINK2)) == -1) {
3156 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT,
3157 1.21 dyoung ("%s: fail compute duration\n", __func__));
3158 1.5 dyoung goto post_load_err;
3159 1.5 dyoung }
3160 1.5 dyoung
3161 1.34 dyoung d0 = &ts->ts_d0;
3162 1.5 dyoung
3163 1.20 dyoung *(uint16_t*)wh->i_dur = htole16(d0->d_data_dur);
3164 1.20 dyoung
3165 1.14 dyoung ctl1 = LSHIFT(d0->d_plcp_len, RTW_TXCTL1_LENGTH_MASK) |
3166 1.5 dyoung LSHIFT(d0->d_rts_dur, RTW_TXCTL1_RTSDUR_MASK);
3167 1.5 dyoung
3168 1.25 mycroft if (d0->d_residue)
3169 1.14 dyoung ctl1 |= RTW_TXCTL1_LENGEXT;
3170 1.5 dyoung
3171 1.5 dyoung /* TBD fragmentation */
3172 1.5 dyoung
3173 1.34 dyoung ts->ts_first = tdb->tdb_next;
3174 1.5 dyoung
3175 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, dmamap->dm_nsegs,
3176 1.5 dyoung BUS_DMASYNC_PREWRITE);
3177 1.5 dyoung
3178 1.34 dyoung KASSERT(ts->ts_first < tdb->tdb_ndesc);
3179 1.21 dyoung
3180 1.32 dyoung #if NBPFILTER > 0
3181 1.32 dyoung if (ic->ic_rawbpf != NULL)
3182 1.32 dyoung bpf_mtap((caddr_t)ic->ic_rawbpf, m0);
3183 1.32 dyoung
3184 1.32 dyoung if (sc->sc_radiobpf != NULL) {
3185 1.32 dyoung struct rtw_tx_radiotap_header *rt = &sc->sc_txtap;
3186 1.32 dyoung
3187 1.32 dyoung rt->rt_flags = 0;
3188 1.32 dyoung rt->rt_rate = rate;
3189 1.32 dyoung rt->rt_chan_freq =
3190 1.32 dyoung htole16(ic->ic_bss->ni_chan->ic_freq);
3191 1.32 dyoung rt->rt_chan_flags =
3192 1.32 dyoung htole16(ic->ic_bss->ni_chan->ic_flags);
3193 1.32 dyoung
3194 1.32 dyoung bpf_mtap2(sc->sc_radiobpf, (caddr_t)rt,
3195 1.32 dyoung sizeof(sc->sc_txtapu), m0);
3196 1.32 dyoung }
3197 1.32 dyoung #endif /* NPBFILTER > 0 */
3198 1.32 dyoung
3199 1.34 dyoung for (i = 0, lastdesc = desc = ts->ts_first;
3200 1.5 dyoung i < dmamap->dm_nsegs;
3201 1.34 dyoung i++, desc = RTW_NEXT_IDX(tdb, desc)) {
3202 1.5 dyoung if (dmamap->dm_segs[i].ds_len > RTW_TXLEN_LENGTH_MASK) {
3203 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT_DESC,
3204 1.21 dyoung ("%s: seg too long\n", __func__));
3205 1.5 dyoung goto post_load_err;
3206 1.5 dyoung }
3207 1.34 dyoung td = &tdb->tdb_desc[desc];
3208 1.34 dyoung td->td_ctl0 = htole32(ctl0);
3209 1.5 dyoung if (i != 0)
3210 1.34 dyoung td->td_ctl0 |= htole32(RTW_TXCTL0_OWN);
3211 1.34 dyoung td->td_ctl1 = htole32(ctl1);
3212 1.34 dyoung td->td_buf = htole32(dmamap->dm_segs[i].ds_addr);
3213 1.34 dyoung td->td_len = htole32(dmamap->dm_segs[i].ds_len);
3214 1.5 dyoung lastdesc = desc;
3215 1.16 dyoung #ifdef RTW_DEBUG
3216 1.34 dyoung rtw_print_txdesc(sc, "load", ts, tdb, desc);
3217 1.16 dyoung #endif /* RTW_DEBUG */
3218 1.5 dyoung }
3219 1.5 dyoung
3220 1.34 dyoung KASSERT(desc < tdb->tdb_ndesc);
3221 1.21 dyoung
3222 1.34 dyoung ts->ts_ni = ni;
3223 1.34 dyoung ts->ts_mbuf = m0;
3224 1.34 dyoung ts->ts_last = lastdesc;
3225 1.34 dyoung tdb->tdb_desc[ts->ts_last].td_ctl0 |= htole32(RTW_TXCTL0_LS);
3226 1.34 dyoung tdb->tdb_desc[ts->ts_first].td_ctl0 |=
3227 1.5 dyoung htole32(RTW_TXCTL0_FS);
3228 1.5 dyoung
3229 1.16 dyoung #ifdef RTW_DEBUG
3230 1.34 dyoung rtw_print_txdesc(sc, "FS on", ts, tdb, ts->ts_first);
3231 1.34 dyoung rtw_print_txdesc(sc, "LS on", ts, tdb, ts->ts_last);
3232 1.16 dyoung #endif /* RTW_DEBUG */
3233 1.5 dyoung
3234 1.34 dyoung tdb->tdb_nfree -= dmamap->dm_nsegs;
3235 1.34 dyoung tdb->tdb_next = desc;
3236 1.5 dyoung
3237 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, dmamap->dm_nsegs,
3238 1.5 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3239 1.5 dyoung
3240 1.34 dyoung tdb->tdb_desc[ts->ts_first].td_ctl0 |=
3241 1.5 dyoung htole32(RTW_TXCTL0_OWN);
3242 1.5 dyoung
3243 1.16 dyoung #ifdef RTW_DEBUG
3244 1.34 dyoung rtw_print_txdesc(sc, "OWN on", ts, tdb, ts->ts_first);
3245 1.16 dyoung #endif /* RTW_DEBUG */
3246 1.5 dyoung
3247 1.34 dyoung rtw_txdescs_sync(tdb, ts->ts_first, 1,
3248 1.5 dyoung BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
3249 1.5 dyoung
3250 1.34 dyoung SIMPLEQ_REMOVE_HEAD(&tsb->tsb_freeq, ts_q);
3251 1.34 dyoung SIMPLEQ_INSERT_TAIL(&tsb->tsb_dirtyq, ts, ts_q);
3252 1.5 dyoung
3253 1.42 dyoung if (tsb != &sc->sc_txsoft_blk[RTW_TXPRIBCN]) {
3254 1.42 dyoung sc->sc_led_state.ls_event |= RTW_LED_S_TX;
3255 1.42 dyoung tsb->tsb_tx_timer = 5;
3256 1.42 dyoung ifp->if_timer = 1;
3257 1.42 dyoung }
3258 1.10 dyoung tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
3259 1.45 dyoung tppoll &= ~RTW_TPPOLL_SALL;
3260 1.45 dyoung tppoll |= tsb->tsb_poll & RTW_TPPOLL_ALL;
3261 1.45 dyoung RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, tppoll);
3262 1.9 dyoung RTW_SYNC(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL);
3263 1.1 dyoung }
3264 1.31 dyoung out:
3265 1.21 dyoung DPRINTF(sc, RTW_DEBUG_XMIT, ("%s: leave\n", __func__));
3266 1.5 dyoung return;
3267 1.5 dyoung post_load_err:
3268 1.5 dyoung bus_dmamap_unload(sc->sc_dmat, dmamap);
3269 1.5 dyoung m_freem(m0);
3270 1.5 dyoung post_dequeue_err:
3271 1.5 dyoung ieee80211_release_node(&sc->sc_ic, ni);
3272 1.1 dyoung return;
3273 1.1 dyoung }
3274 1.1 dyoung
3275 1.1 dyoung static void
3276 1.1 dyoung rtw_watchdog(struct ifnet *ifp)
3277 1.1 dyoung {
3278 1.5 dyoung int pri;
3279 1.5 dyoung struct rtw_softc *sc;
3280 1.34 dyoung struct rtw_txsoft_blk *tsb;
3281 1.5 dyoung
3282 1.5 dyoung sc = ifp->if_softc;
3283 1.5 dyoung
3284 1.5 dyoung ifp->if_timer = 0;
3285 1.5 dyoung
3286 1.5 dyoung if ((sc->sc_flags & RTW_F_ENABLED) == 0)
3287 1.5 dyoung return;
3288 1.5 dyoung
3289 1.5 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3290 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
3291 1.5 dyoung
3292 1.34 dyoung if (tsb->tsb_tx_timer == 0)
3293 1.5 dyoung continue;
3294 1.5 dyoung
3295 1.34 dyoung if (--tsb->tsb_tx_timer == 0) {
3296 1.34 dyoung if (SIMPLEQ_EMPTY(&tsb->tsb_dirtyq))
3297 1.5 dyoung continue;
3298 1.5 dyoung printf("%s: transmit timeout, priority %d\n",
3299 1.5 dyoung ifp->if_xname, pri);
3300 1.5 dyoung ifp->if_oerrors++;
3301 1.29 dyoung /* Stop Tx DMA, disable transmitter, clear
3302 1.29 dyoung * Tx rings, and restart.
3303 1.42 dyoung *
3304 1.42 dyoung * TBD Stop/restart just the broken ring?
3305 1.29 dyoung */
3306 1.45 dyoung RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL_SALL);
3307 1.29 dyoung RTW_SYNC(&sc->sc_regs, RTW_TPPOLL, RTW_TPPOLL);
3308 1.29 dyoung rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 0);
3309 1.21 dyoung rtw_txdescs_reset(sc);
3310 1.29 dyoung rtw_io_enable(&sc->sc_regs, RTW_CR_TE, 1);
3311 1.45 dyoung sc->sc_if.if_flags &= ~IFF_OACTIVE;
3312 1.5 dyoung rtw_start(ifp);
3313 1.5 dyoung } else
3314 1.5 dyoung ifp->if_timer = 1;
3315 1.5 dyoung }
3316 1.10 dyoung ieee80211_watchdog(ifp);
3317 1.1 dyoung return;
3318 1.1 dyoung }
3319 1.1 dyoung
3320 1.1 dyoung static void
3321 1.1 dyoung rtw_next_scan(void *arg)
3322 1.1 dyoung {
3323 1.1 dyoung struct ieee80211com *ic = arg;
3324 1.1 dyoung int s;
3325 1.1 dyoung
3326 1.1 dyoung /* don't call rtw_start w/o network interrupts blocked */
3327 1.1 dyoung s = splnet();
3328 1.1 dyoung if (ic->ic_state == IEEE80211_S_SCAN)
3329 1.1 dyoung ieee80211_next_scan(ic);
3330 1.1 dyoung splx(s);
3331 1.1 dyoung }
3332 1.1 dyoung
3333 1.10 dyoung static void
3334 1.45 dyoung rtw_join_bss(struct rtw_softc *sc, uint8_t *bssid, uint16_t intval0)
3335 1.10 dyoung {
3336 1.10 dyoung uint16_t bcnitv, intval;
3337 1.10 dyoung int i;
3338 1.10 dyoung struct rtw_regs *regs = &sc->sc_regs;
3339 1.10 dyoung
3340 1.10 dyoung for (i = 0; i < IEEE80211_ADDR_LEN; i++)
3341 1.10 dyoung RTW_WRITE8(regs, RTW_BSSID + i, bssid[i]);
3342 1.10 dyoung
3343 1.10 dyoung RTW_SYNC(regs, RTW_BSSID16, RTW_BSSID32);
3344 1.10 dyoung
3345 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_CONFIG);
3346 1.10 dyoung
3347 1.10 dyoung intval = MIN(intval0, PRESHIFT(RTW_BCNITV_BCNITV_MASK));
3348 1.10 dyoung
3349 1.10 dyoung bcnitv = RTW_READ16(regs, RTW_BCNITV) & ~RTW_BCNITV_BCNITV_MASK;
3350 1.10 dyoung bcnitv |= LSHIFT(intval, RTW_BCNITV_BCNITV_MASK);
3351 1.10 dyoung RTW_WRITE16(regs, RTW_BCNITV, bcnitv);
3352 1.10 dyoung /* magic from Linux */
3353 1.10 dyoung RTW_WRITE16(regs, RTW_ATIMWND, LSHIFT(1, RTW_ATIMWND_ATIMWND));
3354 1.10 dyoung RTW_WRITE16(regs, RTW_ATIMTRITV, LSHIFT(2, RTW_ATIMTRITV_ATIMTRITV));
3355 1.10 dyoung
3356 1.42 dyoung rtw_set_access(regs, RTW_ACCESS_NONE);
3357 1.10 dyoung
3358 1.10 dyoung /* TBD WEP */
3359 1.10 dyoung RTW_WRITE8(regs, RTW_SCR, 0);
3360 1.10 dyoung
3361 1.10 dyoung rtw_io_enable(regs, RTW_CR_RE | RTW_CR_TE, 1);
3362 1.10 dyoung }
3363 1.10 dyoung
3364 1.1 dyoung /* Synchronize the hardware state with the software state. */
3365 1.1 dyoung static int
3366 1.1 dyoung rtw_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
3367 1.1 dyoung {
3368 1.1 dyoung struct ifnet *ifp = &ic->ic_if;
3369 1.1 dyoung struct rtw_softc *sc = ifp->if_softc;
3370 1.42 dyoung struct mbuf *m;
3371 1.1 dyoung enum ieee80211_state ostate;
3372 1.1 dyoung int error;
3373 1.1 dyoung
3374 1.1 dyoung ostate = ic->ic_state;
3375 1.1 dyoung
3376 1.42 dyoung rtw_led_newstate(sc, nstate);
3377 1.42 dyoung
3378 1.1 dyoung if (nstate == IEEE80211_S_INIT) {
3379 1.1 dyoung callout_stop(&sc->sc_scan_ch);
3380 1.1 dyoung sc->sc_cur_chan = IEEE80211_CHAN_ANY;
3381 1.1 dyoung return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
3382 1.1 dyoung }
3383 1.1 dyoung
3384 1.1 dyoung if (ostate == IEEE80211_S_INIT && nstate != IEEE80211_S_INIT)
3385 1.1 dyoung rtw_pwrstate(sc, RTW_ON);
3386 1.1 dyoung
3387 1.1 dyoung if ((error = rtw_tune(sc)) != 0)
3388 1.1 dyoung return error;
3389 1.1 dyoung
3390 1.1 dyoung switch (nstate) {
3391 1.1 dyoung case IEEE80211_S_INIT:
3392 1.1 dyoung panic("%s: unexpected state IEEE80211_S_INIT\n", __func__);
3393 1.1 dyoung break;
3394 1.1 dyoung case IEEE80211_S_SCAN:
3395 1.21 dyoung if (ostate != IEEE80211_S_SCAN) {
3396 1.21 dyoung (void)memset(ic->ic_bss->ni_bssid, 0,
3397 1.21 dyoung IEEE80211_ADDR_LEN);
3398 1.45 dyoung rtw_set_nettype(sc, IEEE80211_M_MONITOR);
3399 1.21 dyoung }
3400 1.1 dyoung
3401 1.1 dyoung callout_reset(&sc->sc_scan_ch, rtw_dwelltime * hz / 1000,
3402 1.1 dyoung rtw_next_scan, ic);
3403 1.1 dyoung
3404 1.1 dyoung break;
3405 1.1 dyoung case IEEE80211_S_RUN:
3406 1.38 dyoung switch (ic->ic_opmode) {
3407 1.38 dyoung case IEEE80211_M_HOSTAP:
3408 1.38 dyoung case IEEE80211_M_IBSS:
3409 1.45 dyoung rtw_set_nettype(sc, IEEE80211_M_MONITOR);
3410 1.42 dyoung m = rtw_beacon_alloc(sc, ic->ic_bss);
3411 1.42 dyoung if (m == NULL) {
3412 1.42 dyoung printf("%s: could not allocate beacon\n",
3413 1.42 dyoung sc->sc_dev.dv_xname);
3414 1.42 dyoung } else
3415 1.42 dyoung IF_ENQUEUE(&sc->sc_beaconq, m);
3416 1.42 dyoung /*FALLTHROUGH*/
3417 1.42 dyoung case IEEE80211_M_AHDEMO:
3418 1.45 dyoung case IEEE80211_M_STA:
3419 1.45 dyoung rtw_join_bss(sc, ic->ic_bss->ni_bssid,
3420 1.38 dyoung ic->ic_bss->ni_intval);
3421 1.1 dyoung break;
3422 1.38 dyoung case IEEE80211_M_MONITOR:
3423 1.38 dyoung break;
3424 1.38 dyoung }
3425 1.45 dyoung rtw_set_nettype(sc, ic->ic_opmode);
3426 1.38 dyoung break;
3427 1.45 dyoung case IEEE80211_S_ASSOC:
3428 1.1 dyoung case IEEE80211_S_AUTH:
3429 1.1 dyoung break;
3430 1.1 dyoung }
3431 1.1 dyoung
3432 1.1 dyoung if (nstate != IEEE80211_S_SCAN)
3433 1.1 dyoung callout_stop(&sc->sc_scan_ch);
3434 1.1 dyoung
3435 1.45 dyoung /* Start beacon transmission. */
3436 1.1 dyoung if (nstate == IEEE80211_S_RUN &&
3437 1.1 dyoung (ic->ic_opmode == IEEE80211_M_HOSTAP ||
3438 1.1 dyoung ic->ic_opmode == IEEE80211_M_IBSS))
3439 1.45 dyoung rtw_start(&sc->sc_if);
3440 1.1 dyoung
3441 1.1 dyoung return (*sc->sc_mtbl.mt_newstate)(ic, nstate, arg);
3442 1.1 dyoung }
3443 1.1 dyoung
3444 1.40 dyoung /* Extend a 32-bit TSF timestamp to a 64-bit timestamp. */
3445 1.40 dyoung static uint64_t
3446 1.40 dyoung rtw_tsf_extend(struct rtw_regs *regs, uint32_t rstamp)
3447 1.40 dyoung {
3448 1.40 dyoung uint32_t tsftl, tsfth;
3449 1.40 dyoung
3450 1.40 dyoung tsfth = RTW_READ(regs, RTW_TSFTRH);
3451 1.40 dyoung tsftl = RTW_READ(regs, RTW_TSFTRL);
3452 1.40 dyoung if (tsftl < rstamp) /* Compensate for rollover. */
3453 1.40 dyoung tsfth--;
3454 1.40 dyoung return ((uint64_t)tsfth << 32) | rstamp;
3455 1.40 dyoung }
3456 1.40 dyoung
3457 1.1 dyoung static void
3458 1.40 dyoung rtw_ibss_merge(struct rtw_softc *sc, struct ieee80211_node *ni, uint32_t rstamp)
3459 1.1 dyoung {
3460 1.45 dyoung uint8_t tppoll;
3461 1.40 dyoung struct ieee80211com *ic = &sc->sc_ic;
3462 1.40 dyoung
3463 1.40 dyoung if (le64toh(ni->ni_tsf) >= rtw_tsf_extend(&sc->sc_regs, rstamp) &&
3464 1.40 dyoung ieee80211_ibss_merge(ic, ni) == ENETRESET) {
3465 1.45 dyoung /* Stop beacon queue. Kick state machine to synchronize
3466 1.45 dyoung * with the new IBSS.
3467 1.45 dyoung */
3468 1.45 dyoung tppoll = RTW_READ8(&sc->sc_regs, RTW_TPPOLL);
3469 1.45 dyoung tppoll |= RTW_TPPOLL_SBQ;
3470 1.45 dyoung RTW_WRITE8(&sc->sc_regs, RTW_TPPOLL, tppoll);
3471 1.45 dyoung (void)ieee80211_new_state(&sc->sc_ic, IEEE80211_S_RUN, -1);
3472 1.40 dyoung }
3473 1.1 dyoung return;
3474 1.1 dyoung }
3475 1.1 dyoung
3476 1.1 dyoung static void
3477 1.1 dyoung rtw_recv_mgmt(struct ieee80211com *ic, struct mbuf *m,
3478 1.37 dyoung struct ieee80211_node *ni, int subtype, int rssi, uint32_t rstamp)
3479 1.1 dyoung {
3480 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc*)ic->ic_softc;
3481 1.1 dyoung
3482 1.40 dyoung (*sc->sc_mtbl.mt_recv_mgmt)(ic, m, ni, subtype, rssi, rstamp);
3483 1.40 dyoung
3484 1.1 dyoung switch (subtype) {
3485 1.1 dyoung case IEEE80211_FC0_SUBTYPE_PROBE_RESP:
3486 1.1 dyoung case IEEE80211_FC0_SUBTYPE_BEACON:
3487 1.40 dyoung if (ic->ic_opmode != IEEE80211_M_IBSS ||
3488 1.40 dyoung ic->ic_state != IEEE80211_S_RUN)
3489 1.40 dyoung return;
3490 1.40 dyoung rtw_ibss_merge(sc, ni, rstamp);
3491 1.1 dyoung break;
3492 1.1 dyoung default:
3493 1.1 dyoung break;
3494 1.1 dyoung }
3495 1.1 dyoung return;
3496 1.1 dyoung }
3497 1.1 dyoung
3498 1.1 dyoung static struct ieee80211_node *
3499 1.1 dyoung rtw_node_alloc(struct ieee80211com *ic)
3500 1.1 dyoung {
3501 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc *)ic->ic_if.if_softc;
3502 1.1 dyoung struct ieee80211_node *ni = (*sc->sc_mtbl.mt_node_alloc)(ic);
3503 1.1 dyoung
3504 1.21 dyoung DPRINTF(sc, RTW_DEBUG_NODE,
3505 1.21 dyoung ("%s: alloc node %p\n", sc->sc_dev.dv_xname, ni));
3506 1.1 dyoung return ni;
3507 1.1 dyoung }
3508 1.1 dyoung
3509 1.1 dyoung static void
3510 1.1 dyoung rtw_node_free(struct ieee80211com *ic, struct ieee80211_node *ni)
3511 1.1 dyoung {
3512 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc *)ic->ic_if.if_softc;
3513 1.1 dyoung
3514 1.21 dyoung DPRINTF(sc, RTW_DEBUG_NODE,
3515 1.21 dyoung ("%s: freeing node %p %s\n", sc->sc_dev.dv_xname, ni,
3516 1.1 dyoung ether_sprintf(ni->ni_bssid)));
3517 1.1 dyoung (*sc->sc_mtbl.mt_node_free)(ic, ni);
3518 1.1 dyoung }
3519 1.1 dyoung
3520 1.1 dyoung static int
3521 1.1 dyoung rtw_media_change(struct ifnet *ifp)
3522 1.1 dyoung {
3523 1.1 dyoung int error;
3524 1.1 dyoung
3525 1.1 dyoung error = ieee80211_media_change(ifp);
3526 1.1 dyoung if (error == ENETRESET) {
3527 1.1 dyoung if ((ifp->if_flags & (IFF_RUNNING|IFF_UP)) ==
3528 1.1 dyoung (IFF_RUNNING|IFF_UP))
3529 1.1 dyoung rtw_init(ifp); /* XXX lose error */
3530 1.1 dyoung error = 0;
3531 1.1 dyoung }
3532 1.1 dyoung return error;
3533 1.1 dyoung }
3534 1.1 dyoung
3535 1.1 dyoung static void
3536 1.1 dyoung rtw_media_status(struct ifnet *ifp, struct ifmediareq *imr)
3537 1.1 dyoung {
3538 1.1 dyoung struct rtw_softc *sc = ifp->if_softc;
3539 1.1 dyoung
3540 1.1 dyoung if ((sc->sc_flags & RTW_F_ENABLED) == 0) {
3541 1.1 dyoung imr->ifm_active = IFM_IEEE80211 | IFM_NONE;
3542 1.1 dyoung imr->ifm_status = 0;
3543 1.1 dyoung return;
3544 1.1 dyoung }
3545 1.1 dyoung ieee80211_media_status(ifp, imr);
3546 1.1 dyoung }
3547 1.1 dyoung
3548 1.1 dyoung void
3549 1.1 dyoung rtw_power(int why, void *arg)
3550 1.1 dyoung {
3551 1.1 dyoung struct rtw_softc *sc = arg;
3552 1.1 dyoung struct ifnet *ifp = &sc->sc_ic.ic_if;
3553 1.1 dyoung int s;
3554 1.1 dyoung
3555 1.21 dyoung DPRINTF(sc, RTW_DEBUG_PWR,
3556 1.21 dyoung ("%s: rtw_power(%d,)\n", sc->sc_dev.dv_xname, why));
3557 1.1 dyoung
3558 1.1 dyoung s = splnet();
3559 1.1 dyoung switch (why) {
3560 1.1 dyoung case PWR_STANDBY:
3561 1.1 dyoung /* XXX do nothing. */
3562 1.1 dyoung break;
3563 1.1 dyoung case PWR_SUSPEND:
3564 1.1 dyoung rtw_stop(ifp, 0);
3565 1.1 dyoung if (sc->sc_power != NULL)
3566 1.1 dyoung (*sc->sc_power)(sc, why);
3567 1.1 dyoung break;
3568 1.1 dyoung case PWR_RESUME:
3569 1.1 dyoung if (ifp->if_flags & IFF_UP) {
3570 1.1 dyoung if (sc->sc_power != NULL)
3571 1.1 dyoung (*sc->sc_power)(sc, why);
3572 1.1 dyoung rtw_init(ifp);
3573 1.1 dyoung }
3574 1.1 dyoung break;
3575 1.1 dyoung case PWR_SOFTSUSPEND:
3576 1.1 dyoung case PWR_SOFTSTANDBY:
3577 1.1 dyoung case PWR_SOFTRESUME:
3578 1.1 dyoung break;
3579 1.1 dyoung }
3580 1.1 dyoung splx(s);
3581 1.1 dyoung }
3582 1.1 dyoung
3583 1.1 dyoung /* rtw_shutdown: make sure the interface is stopped at reboot time. */
3584 1.1 dyoung void
3585 1.1 dyoung rtw_shutdown(void *arg)
3586 1.1 dyoung {
3587 1.1 dyoung struct rtw_softc *sc = arg;
3588 1.1 dyoung
3589 1.1 dyoung rtw_stop(&sc->sc_ic.ic_if, 1);
3590 1.1 dyoung }
3591 1.1 dyoung
3592 1.1 dyoung static __inline void
3593 1.7 dyoung rtw_setifprops(struct ifnet *ifp, const char *dvname, void *softc)
3594 1.1 dyoung {
3595 1.7 dyoung (void)memcpy(ifp->if_xname, dvname, IFNAMSIZ);
3596 1.1 dyoung ifp->if_softc = softc;
3597 1.1 dyoung ifp->if_flags = IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST |
3598 1.1 dyoung IFF_NOTRAILERS;
3599 1.1 dyoung ifp->if_ioctl = rtw_ioctl;
3600 1.1 dyoung ifp->if_start = rtw_start;
3601 1.1 dyoung ifp->if_watchdog = rtw_watchdog;
3602 1.1 dyoung ifp->if_init = rtw_init;
3603 1.1 dyoung ifp->if_stop = rtw_stop;
3604 1.1 dyoung }
3605 1.1 dyoung
3606 1.1 dyoung static __inline void
3607 1.1 dyoung rtw_set80211props(struct ieee80211com *ic)
3608 1.1 dyoung {
3609 1.1 dyoung int nrate;
3610 1.1 dyoung ic->ic_phytype = IEEE80211_T_DS;
3611 1.1 dyoung ic->ic_opmode = IEEE80211_M_STA;
3612 1.1 dyoung ic->ic_caps = IEEE80211_C_PMGT | IEEE80211_C_IBSS |
3613 1.1 dyoung IEEE80211_C_HOSTAP | IEEE80211_C_MONITOR | IEEE80211_C_WEP;
3614 1.1 dyoung
3615 1.1 dyoung nrate = 0;
3616 1.12 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] =
3617 1.12 dyoung IEEE80211_RATE_BASIC | 2;
3618 1.12 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] =
3619 1.12 dyoung IEEE80211_RATE_BASIC | 4;
3620 1.1 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] = 11;
3621 1.1 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_rates[nrate++] = 22;
3622 1.1 dyoung ic->ic_sup_rates[IEEE80211_MODE_11B].rs_nrates = nrate;
3623 1.1 dyoung }
3624 1.1 dyoung
3625 1.1 dyoung static __inline void
3626 1.1 dyoung rtw_set80211methods(struct rtw_mtbl *mtbl, struct ieee80211com *ic)
3627 1.1 dyoung {
3628 1.1 dyoung mtbl->mt_newstate = ic->ic_newstate;
3629 1.1 dyoung ic->ic_newstate = rtw_newstate;
3630 1.1 dyoung
3631 1.1 dyoung mtbl->mt_recv_mgmt = ic->ic_recv_mgmt;
3632 1.1 dyoung ic->ic_recv_mgmt = rtw_recv_mgmt;
3633 1.1 dyoung
3634 1.1 dyoung mtbl->mt_node_free = ic->ic_node_free;
3635 1.1 dyoung ic->ic_node_free = rtw_node_free;
3636 1.1 dyoung
3637 1.1 dyoung mtbl->mt_node_alloc = ic->ic_node_alloc;
3638 1.1 dyoung ic->ic_node_alloc = rtw_node_alloc;
3639 1.1 dyoung }
3640 1.1 dyoung
3641 1.1 dyoung static __inline void
3642 1.7 dyoung rtw_establish_hooks(struct rtw_hooks *hooks, const char *dvname,
3643 1.1 dyoung void *arg)
3644 1.1 dyoung {
3645 1.1 dyoung /*
3646 1.1 dyoung * Make sure the interface is shutdown during reboot.
3647 1.1 dyoung */
3648 1.1 dyoung hooks->rh_shutdown = shutdownhook_establish(rtw_shutdown, arg);
3649 1.1 dyoung if (hooks->rh_shutdown == NULL)
3650 1.1 dyoung printf("%s: WARNING: unable to establish shutdown hook\n",
3651 1.7 dyoung dvname);
3652 1.1 dyoung
3653 1.1 dyoung /*
3654 1.1 dyoung * Add a suspend hook to make sure we come back up after a
3655 1.1 dyoung * resume.
3656 1.1 dyoung */
3657 1.1 dyoung hooks->rh_power = powerhook_establish(rtw_power, arg);
3658 1.1 dyoung if (hooks->rh_power == NULL)
3659 1.1 dyoung printf("%s: WARNING: unable to establish power hook\n",
3660 1.7 dyoung dvname);
3661 1.1 dyoung }
3662 1.1 dyoung
3663 1.1 dyoung static __inline void
3664 1.7 dyoung rtw_disestablish_hooks(struct rtw_hooks *hooks, const char *dvname,
3665 1.1 dyoung void *arg)
3666 1.1 dyoung {
3667 1.1 dyoung if (hooks->rh_shutdown != NULL)
3668 1.1 dyoung shutdownhook_disestablish(hooks->rh_shutdown);
3669 1.1 dyoung
3670 1.1 dyoung if (hooks->rh_power != NULL)
3671 1.1 dyoung powerhook_disestablish(hooks->rh_power);
3672 1.1 dyoung }
3673 1.1 dyoung
3674 1.1 dyoung static __inline void
3675 1.1 dyoung rtw_init_radiotap(struct rtw_softc *sc)
3676 1.1 dyoung {
3677 1.1 dyoung memset(&sc->sc_rxtapu, 0, sizeof(sc->sc_rxtapu));
3678 1.32 dyoung sc->sc_rxtap.rr_ihdr.it_len = htole16(sizeof(sc->sc_rxtapu));
3679 1.32 dyoung sc->sc_rxtap.rr_ihdr.it_present = htole32(RTW_RX_RADIOTAP_PRESENT);
3680 1.1 dyoung
3681 1.1 dyoung memset(&sc->sc_txtapu, 0, sizeof(sc->sc_txtapu));
3682 1.32 dyoung sc->sc_txtap.rt_ihdr.it_len = htole16(sizeof(sc->sc_txtapu));
3683 1.32 dyoung sc->sc_txtap.rt_ihdr.it_present = htole32(RTW_TX_RADIOTAP_PRESENT);
3684 1.1 dyoung }
3685 1.1 dyoung
3686 1.1 dyoung static int
3687 1.34 dyoung rtw_txsoft_blk_setup(struct rtw_txsoft_blk *tsb, u_int qlen)
3688 1.1 dyoung {
3689 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_dirtyq);
3690 1.34 dyoung SIMPLEQ_INIT(&tsb->tsb_freeq);
3691 1.34 dyoung tsb->tsb_ndesc = qlen;
3692 1.34 dyoung tsb->tsb_desc = malloc(qlen * sizeof(*tsb->tsb_desc), M_DEVBUF,
3693 1.1 dyoung M_NOWAIT);
3694 1.34 dyoung if (tsb->tsb_desc == NULL)
3695 1.1 dyoung return ENOMEM;
3696 1.1 dyoung return 0;
3697 1.1 dyoung }
3698 1.1 dyoung
3699 1.1 dyoung static void
3700 1.34 dyoung rtw_txsoft_blk_cleanup_all(struct rtw_softc *sc)
3701 1.1 dyoung {
3702 1.21 dyoung int pri;
3703 1.34 dyoung struct rtw_txsoft_blk *tsb;
3704 1.1 dyoung
3705 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3706 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
3707 1.34 dyoung free(tsb->tsb_desc, M_DEVBUF);
3708 1.34 dyoung tsb->tsb_desc = NULL;
3709 1.1 dyoung }
3710 1.1 dyoung }
3711 1.1 dyoung
3712 1.1 dyoung static int
3713 1.34 dyoung rtw_txsoft_blk_setup_all(struct rtw_softc *sc)
3714 1.1 dyoung {
3715 1.1 dyoung int pri, rc = 0;
3716 1.1 dyoung int qlen[RTW_NTXPRI] =
3717 1.1 dyoung {RTW_TXQLENLO, RTW_TXQLENMD, RTW_TXQLENHI, RTW_TXQLENBCN};
3718 1.42 dyoung struct rtw_txsoft_blk *tsbs;
3719 1.42 dyoung
3720 1.42 dyoung tsbs = sc->sc_txsoft_blk;
3721 1.1 dyoung
3722 1.21 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3723 1.42 dyoung rc = rtw_txsoft_blk_setup(&tsbs[pri], qlen[pri]);
3724 1.1 dyoung if (rc != 0)
3725 1.1 dyoung break;
3726 1.1 dyoung }
3727 1.42 dyoung tsbs[RTW_TXPRILO].tsb_poll = RTW_TPPOLL_LPQ | RTW_TPPOLL_SLPQ;
3728 1.42 dyoung tsbs[RTW_TXPRIMD].tsb_poll = RTW_TPPOLL_NPQ | RTW_TPPOLL_SNPQ;
3729 1.42 dyoung tsbs[RTW_TXPRIHI].tsb_poll = RTW_TPPOLL_HPQ | RTW_TPPOLL_SHPQ;
3730 1.42 dyoung tsbs[RTW_TXPRIBCN].tsb_poll = RTW_TPPOLL_BQ | RTW_TPPOLL_SBQ;
3731 1.1 dyoung return rc;
3732 1.1 dyoung }
3733 1.1 dyoung
3734 1.1 dyoung static void
3735 1.34 dyoung rtw_txdesc_blk_setup(struct rtw_txdesc_blk *tdb, struct rtw_txdesc *desc,
3736 1.1 dyoung u_int ndesc, bus_addr_t ofs, bus_addr_t physbase)
3737 1.1 dyoung {
3738 1.34 dyoung tdb->tdb_ndesc = ndesc;
3739 1.34 dyoung tdb->tdb_desc = desc;
3740 1.34 dyoung tdb->tdb_physbase = physbase;
3741 1.34 dyoung tdb->tdb_ofs = ofs;
3742 1.1 dyoung
3743 1.34 dyoung (void)memset(tdb->tdb_desc, 0,
3744 1.34 dyoung sizeof(tdb->tdb_desc[0]) * tdb->tdb_ndesc);
3745 1.1 dyoung
3746 1.34 dyoung rtw_txdesc_blk_reset(tdb);
3747 1.1 dyoung }
3748 1.1 dyoung
3749 1.1 dyoung static void
3750 1.1 dyoung rtw_txdesc_blk_setup_all(struct rtw_softc *sc)
3751 1.1 dyoung {
3752 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRILO],
3753 1.1 dyoung &sc->sc_descs->hd_txlo[0], RTW_NTXDESCLO,
3754 1.1 dyoung RTW_RING_OFFSET(hd_txlo), RTW_RING_BASE(sc, hd_txlo));
3755 1.1 dyoung
3756 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIMD],
3757 1.1 dyoung &sc->sc_descs->hd_txmd[0], RTW_NTXDESCMD,
3758 1.1 dyoung RTW_RING_OFFSET(hd_txmd), RTW_RING_BASE(sc, hd_txmd));
3759 1.1 dyoung
3760 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIHI],
3761 1.1 dyoung &sc->sc_descs->hd_txhi[0], RTW_NTXDESCHI,
3762 1.1 dyoung RTW_RING_OFFSET(hd_txhi), RTW_RING_BASE(sc, hd_txhi));
3763 1.1 dyoung
3764 1.1 dyoung rtw_txdesc_blk_setup(&sc->sc_txdesc_blk[RTW_TXPRIBCN],
3765 1.1 dyoung &sc->sc_descs->hd_bcn[0], RTW_NTXDESCBCN,
3766 1.1 dyoung RTW_RING_OFFSET(hd_bcn), RTW_RING_BASE(sc, hd_bcn));
3767 1.1 dyoung }
3768 1.1 dyoung
3769 1.1 dyoung static struct rtw_rf *
3770 1.42 dyoung rtw_rf_attach(struct rtw_softc *sc, enum rtw_rfchipid rfchipid, int digphy)
3771 1.1 dyoung {
3772 1.42 dyoung rtw_rf_write_t rf_write;
3773 1.1 dyoung struct rtw_rf *rf;
3774 1.1 dyoung
3775 1.1 dyoung switch (rfchipid) {
3776 1.42 dyoung default:
3777 1.42 dyoung rf_write = rtw_rf_hostwrite;
3778 1.42 dyoung break;
3779 1.42 dyoung case RTW_RFCHIPID_INTERSIL:
3780 1.42 dyoung case RTW_RFCHIPID_PHILIPS:
3781 1.42 dyoung case RTW_RFCHIPID_GCT: /* XXX a guess */
3782 1.42 dyoung case RTW_RFCHIPID_RFMD:
3783 1.42 dyoung rf_write = (rtw_host_rfio) ? rtw_rf_hostwrite : rtw_rf_macwrite;
3784 1.42 dyoung break;
3785 1.42 dyoung }
3786 1.42 dyoung
3787 1.42 dyoung switch (rfchipid) {
3788 1.1 dyoung case RTW_RFCHIPID_MAXIM:
3789 1.1 dyoung rf = rtw_max2820_create(&sc->sc_regs, rf_write, 0);
3790 1.1 dyoung sc->sc_pwrstate_cb = rtw_maxim_pwrstate;
3791 1.1 dyoung break;
3792 1.1 dyoung case RTW_RFCHIPID_PHILIPS:
3793 1.1 dyoung rf = rtw_sa2400_create(&sc->sc_regs, rf_write, digphy);
3794 1.1 dyoung sc->sc_pwrstate_cb = rtw_philips_pwrstate;
3795 1.1 dyoung break;
3796 1.10 dyoung case RTW_RFCHIPID_RFMD:
3797 1.10 dyoung /* XXX RFMD has no RF constructor */
3798 1.10 dyoung sc->sc_pwrstate_cb = rtw_rfmd_pwrstate;
3799 1.10 dyoung /*FALLTHROUGH*/
3800 1.1 dyoung default:
3801 1.1 dyoung return NULL;
3802 1.1 dyoung }
3803 1.1 dyoung rf->rf_continuous_tx_cb =
3804 1.1 dyoung (rtw_continuous_tx_cb_t)rtw_continuous_tx_enable;
3805 1.1 dyoung rf->rf_continuous_tx_arg = (void *)sc;
3806 1.1 dyoung return rf;
3807 1.1 dyoung }
3808 1.1 dyoung
3809 1.1 dyoung /* Revision C and later use a different PHY delay setting than
3810 1.1 dyoung * revisions A and B.
3811 1.1 dyoung */
3812 1.37 dyoung static uint8_t
3813 1.37 dyoung rtw_check_phydelay(struct rtw_regs *regs, uint32_t rcr0)
3814 1.1 dyoung {
3815 1.1 dyoung #define REVAB (RTW_RCR_MXDMA_UNLIMITED | RTW_RCR_AICV)
3816 1.1 dyoung #define REVC (REVAB | RTW_RCR_RXFTH_WHOLE)
3817 1.1 dyoung
3818 1.37 dyoung uint8_t phydelay = LSHIFT(0x6, RTW_PHYDELAY_PHYDELAY);
3819 1.1 dyoung
3820 1.1 dyoung RTW_WRITE(regs, RTW_RCR, REVAB);
3821 1.8 dyoung RTW_WBW(regs, RTW_RCR, RTW_RCR);
3822 1.1 dyoung RTW_WRITE(regs, RTW_RCR, REVC);
3823 1.1 dyoung
3824 1.1 dyoung RTW_WBR(regs, RTW_RCR, RTW_RCR);
3825 1.1 dyoung if ((RTW_READ(regs, RTW_RCR) & REVC) == REVC)
3826 1.1 dyoung phydelay |= RTW_PHYDELAY_REVC_MAGIC;
3827 1.1 dyoung
3828 1.1 dyoung RTW_WRITE(regs, RTW_RCR, rcr0); /* restore RCR */
3829 1.8 dyoung RTW_SYNC(regs, RTW_RCR, RTW_RCR);
3830 1.1 dyoung
3831 1.1 dyoung return phydelay;
3832 1.1 dyoung #undef REVC
3833 1.1 dyoung }
3834 1.1 dyoung
3835 1.1 dyoung void
3836 1.1 dyoung rtw_attach(struct rtw_softc *sc)
3837 1.1 dyoung {
3838 1.34 dyoung struct rtw_txsoft_blk *tsb;
3839 1.42 dyoung int pri, rc;
3840 1.1 dyoung
3841 1.1 dyoung NEXT_ATTACH_STATE(sc, DETACHED);
3842 1.1 dyoung
3843 1.1 dyoung switch (RTW_READ(&sc->sc_regs, RTW_TCR) & RTW_TCR_HWVERID_MASK) {
3844 1.1 dyoung case RTW_TCR_HWVERID_F:
3845 1.42 dyoung sc->sc_hwverid = 'F';
3846 1.1 dyoung break;
3847 1.1 dyoung case RTW_TCR_HWVERID_D:
3848 1.42 dyoung sc->sc_hwverid = 'D';
3849 1.1 dyoung break;
3850 1.1 dyoung default:
3851 1.42 dyoung sc->sc_hwverid = '?';
3852 1.1 dyoung break;
3853 1.1 dyoung }
3854 1.42 dyoung printf("%s: hardware version %c\n", sc->sc_dev.dv_xname,
3855 1.42 dyoung sc->sc_hwverid);
3856 1.1 dyoung
3857 1.1 dyoung rc = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct rtw_descs),
3858 1.1 dyoung RTW_DESC_ALIGNMENT, 0, &sc->sc_desc_segs, 1, &sc->sc_desc_nsegs,
3859 1.1 dyoung 0);
3860 1.1 dyoung
3861 1.1 dyoung if (rc != 0) {
3862 1.1 dyoung printf("%s: could not allocate hw descriptors, error %d\n",
3863 1.1 dyoung sc->sc_dev.dv_xname, rc);
3864 1.1 dyoung goto err;
3865 1.1 dyoung }
3866 1.1 dyoung
3867 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESC_ALLOC);
3868 1.1 dyoung
3869 1.1 dyoung rc = bus_dmamem_map(sc->sc_dmat, &sc->sc_desc_segs,
3870 1.1 dyoung sc->sc_desc_nsegs, sizeof(struct rtw_descs),
3871 1.1 dyoung (caddr_t*)&sc->sc_descs, BUS_DMA_COHERENT);
3872 1.1 dyoung
3873 1.1 dyoung if (rc != 0) {
3874 1.1 dyoung printf("%s: could not map hw descriptors, error %d\n",
3875 1.1 dyoung sc->sc_dev.dv_xname, rc);
3876 1.1 dyoung goto err;
3877 1.1 dyoung }
3878 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESC_MAP);
3879 1.1 dyoung
3880 1.1 dyoung rc = bus_dmamap_create(sc->sc_dmat, sizeof(struct rtw_descs), 1,
3881 1.1 dyoung sizeof(struct rtw_descs), 0, 0, &sc->sc_desc_dmamap);
3882 1.1 dyoung
3883 1.1 dyoung if (rc != 0) {
3884 1.1 dyoung printf("%s: could not create DMA map for hw descriptors, "
3885 1.1 dyoung "error %d\n", sc->sc_dev.dv_xname, rc);
3886 1.1 dyoung goto err;
3887 1.1 dyoung }
3888 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESCMAP_CREATE);
3889 1.1 dyoung
3890 1.34 dyoung sc->sc_rxdesc_blk.rdb_dmat = sc->sc_dmat;
3891 1.34 dyoung sc->sc_rxdesc_blk.rdb_dmamap = sc->sc_desc_dmamap;
3892 1.33 dyoung
3893 1.33 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3894 1.34 dyoung sc->sc_txdesc_blk[pri].tdb_dmat = sc->sc_dmat;
3895 1.34 dyoung sc->sc_txdesc_blk[pri].tdb_dmamap = sc->sc_desc_dmamap;
3896 1.33 dyoung }
3897 1.33 dyoung
3898 1.1 dyoung rc = bus_dmamap_load(sc->sc_dmat, sc->sc_desc_dmamap, sc->sc_descs,
3899 1.1 dyoung sizeof(struct rtw_descs), NULL, 0);
3900 1.1 dyoung
3901 1.1 dyoung if (rc != 0) {
3902 1.1 dyoung printf("%s: could not load DMA map for hw descriptors, "
3903 1.1 dyoung "error %d\n", sc->sc_dev.dv_xname, rc);
3904 1.1 dyoung goto err;
3905 1.1 dyoung }
3906 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_DESCMAP_LOAD);
3907 1.1 dyoung
3908 1.34 dyoung if (rtw_txsoft_blk_setup_all(sc) != 0)
3909 1.1 dyoung goto err;
3910 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_TXCTLBLK_SETUP);
3911 1.1 dyoung
3912 1.1 dyoung rtw_txdesc_blk_setup_all(sc);
3913 1.1 dyoung
3914 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_TXDESCBLK_SETUP);
3915 1.1 dyoung
3916 1.34 dyoung sc->sc_rxdesc_blk.rdb_desc = &sc->sc_descs->hd_rx[0];
3917 1.1 dyoung
3918 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
3919 1.34 dyoung tsb = &sc->sc_txsoft_blk[pri];
3920 1.1 dyoung
3921 1.1 dyoung if ((rc = rtw_txdesc_dmamaps_create(sc->sc_dmat,
3922 1.34 dyoung &tsb->tsb_desc[0], tsb->tsb_ndesc)) != 0) {
3923 1.1 dyoung printf("%s: could not load DMA map for "
3924 1.1 dyoung "hw tx descriptors, error %d\n",
3925 1.1 dyoung sc->sc_dev.dv_xname, rc);
3926 1.1 dyoung goto err;
3927 1.1 dyoung }
3928 1.1 dyoung }
3929 1.1 dyoung
3930 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_TXMAPS_CREATE);
3931 1.34 dyoung if ((rc = rtw_rxdesc_dmamaps_create(sc->sc_dmat, &sc->sc_rxsoft[0],
3932 1.1 dyoung RTW_RXQLEN)) != 0) {
3933 1.1 dyoung printf("%s: could not load DMA map for hw rx descriptors, "
3934 1.1 dyoung "error %d\n", sc->sc_dev.dv_xname, rc);
3935 1.1 dyoung goto err;
3936 1.1 dyoung }
3937 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_RXMAPS_CREATE);
3938 1.1 dyoung
3939 1.1 dyoung /* Reset the chip to a known state. */
3940 1.1 dyoung if (rtw_reset(sc) != 0)
3941 1.1 dyoung goto err;
3942 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_RESET);
3943 1.1 dyoung
3944 1.1 dyoung sc->sc_rcr = RTW_READ(&sc->sc_regs, RTW_RCR);
3945 1.1 dyoung
3946 1.1 dyoung if ((sc->sc_rcr & RTW_RCR_9356SEL) != 0)
3947 1.1 dyoung sc->sc_flags |= RTW_F_9356SROM;
3948 1.1 dyoung
3949 1.1 dyoung if (rtw_srom_read(&sc->sc_regs, sc->sc_flags, &sc->sc_srom,
3950 1.7 dyoung sc->sc_dev.dv_xname) != 0)
3951 1.1 dyoung goto err;
3952 1.1 dyoung
3953 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_READ_SROM);
3954 1.1 dyoung
3955 1.1 dyoung if (rtw_srom_parse(&sc->sc_srom, &sc->sc_flags, &sc->sc_csthr,
3956 1.1 dyoung &sc->sc_rfchipid, &sc->sc_rcr, &sc->sc_locale,
3957 1.7 dyoung sc->sc_dev.dv_xname) != 0) {
3958 1.1 dyoung printf("%s: attach failed, malformed serial ROM\n",
3959 1.1 dyoung sc->sc_dev.dv_xname);
3960 1.1 dyoung goto err;
3961 1.1 dyoung }
3962 1.1 dyoung
3963 1.10 dyoung printf("%s: %s PHY\n", sc->sc_dev.dv_xname,
3964 1.10 dyoung ((sc->sc_flags & RTW_F_DIGPHY) != 0) ? "digital" : "analog");
3965 1.10 dyoung
3966 1.10 dyoung printf("%s: CS threshold %u\n", sc->sc_dev.dv_xname, sc->sc_csthr);
3967 1.1 dyoung
3968 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_PARSE_SROM);
3969 1.1 dyoung
3970 1.42 dyoung sc->sc_rf = rtw_rf_attach(sc, sc->sc_rfchipid,
3971 1.1 dyoung sc->sc_flags & RTW_F_DIGPHY);
3972 1.1 dyoung
3973 1.1 dyoung if (sc->sc_rf == NULL) {
3974 1.1 dyoung printf("%s: attach failed, could not attach RF\n",
3975 1.1 dyoung sc->sc_dev.dv_xname);
3976 1.1 dyoung goto err;
3977 1.1 dyoung }
3978 1.1 dyoung
3979 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_RF_ATTACH);
3980 1.1 dyoung
3981 1.1 dyoung sc->sc_phydelay = rtw_check_phydelay(&sc->sc_regs, sc->sc_rcr);
3982 1.1 dyoung
3983 1.21 dyoung RTW_DPRINTF(RTW_DEBUG_ATTACH,
3984 1.21 dyoung ("%s: PHY delay %d\n", sc->sc_dev.dv_xname, sc->sc_phydelay));
3985 1.1 dyoung
3986 1.1 dyoung if (sc->sc_locale == RTW_LOCALE_UNKNOWN)
3987 1.1 dyoung rtw_identify_country(&sc->sc_regs, &sc->sc_locale,
3988 1.7 dyoung sc->sc_dev.dv_xname);
3989 1.1 dyoung
3990 1.1 dyoung rtw_init_channels(sc->sc_locale, &sc->sc_ic.ic_channels,
3991 1.7 dyoung sc->sc_dev.dv_xname);
3992 1.1 dyoung
3993 1.1 dyoung if (rtw_identify_sta(&sc->sc_regs, &sc->sc_ic.ic_myaddr,
3994 1.7 dyoung sc->sc_dev.dv_xname) != 0)
3995 1.1 dyoung goto err;
3996 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISH_ID_STA);
3997 1.1 dyoung
3998 1.7 dyoung rtw_setifprops(&sc->sc_if, sc->sc_dev.dv_xname, (void*)sc);
3999 1.1 dyoung
4000 1.1 dyoung IFQ_SET_READY(&sc->sc_if.if_snd);
4001 1.1 dyoung
4002 1.1 dyoung rtw_set80211props(&sc->sc_ic);
4003 1.1 dyoung
4004 1.45 dyoung rtw_led_attach(&sc->sc_led_state, (void *)sc);
4005 1.42 dyoung
4006 1.1 dyoung /*
4007 1.1 dyoung * Call MI attach routines.
4008 1.1 dyoung */
4009 1.1 dyoung if_attach(&sc->sc_if);
4010 1.1 dyoung ieee80211_ifattach(&sc->sc_if);
4011 1.1 dyoung
4012 1.1 dyoung rtw_set80211methods(&sc->sc_mtbl, &sc->sc_ic);
4013 1.1 dyoung
4014 1.1 dyoung /* possibly we should fill in our own sc_send_prresp, since
4015 1.1 dyoung * the RTL8180 is probably sending probe responses in ad hoc
4016 1.1 dyoung * mode.
4017 1.1 dyoung */
4018 1.1 dyoung
4019 1.1 dyoung /* complete initialization */
4020 1.1 dyoung ieee80211_media_init(&sc->sc_if, rtw_media_change, rtw_media_status);
4021 1.1 dyoung callout_init(&sc->sc_scan_ch);
4022 1.1 dyoung
4023 1.32 dyoung rtw_init_radiotap(sc);
4024 1.32 dyoung
4025 1.1 dyoung #if NBPFILTER > 0
4026 1.1 dyoung bpfattach2(&sc->sc_if, DLT_IEEE802_11_RADIO,
4027 1.1 dyoung sizeof(struct ieee80211_frame) + 64, &sc->sc_radiobpf);
4028 1.1 dyoung #endif
4029 1.1 dyoung
4030 1.7 dyoung rtw_establish_hooks(&sc->sc_hooks, sc->sc_dev.dv_xname, (void*)sc);
4031 1.1 dyoung
4032 1.1 dyoung NEXT_ATTACH_STATE(sc, FINISHED);
4033 1.1 dyoung
4034 1.1 dyoung return;
4035 1.1 dyoung err:
4036 1.1 dyoung rtw_detach(sc);
4037 1.1 dyoung return;
4038 1.1 dyoung }
4039 1.1 dyoung
4040 1.1 dyoung int
4041 1.1 dyoung rtw_detach(struct rtw_softc *sc)
4042 1.1 dyoung {
4043 1.1 dyoung int pri;
4044 1.1 dyoung
4045 1.36 dyoung sc->sc_flags |= RTW_F_INVALID;
4046 1.36 dyoung
4047 1.1 dyoung switch (sc->sc_attach_state) {
4048 1.1 dyoung case FINISHED:
4049 1.3 dyoung rtw_stop(&sc->sc_if, 1);
4050 1.3 dyoung
4051 1.7 dyoung rtw_disestablish_hooks(&sc->sc_hooks, sc->sc_dev.dv_xname,
4052 1.1 dyoung (void*)sc);
4053 1.1 dyoung callout_stop(&sc->sc_scan_ch);
4054 1.1 dyoung ieee80211_ifdetach(&sc->sc_if);
4055 1.1 dyoung if_detach(&sc->sc_if);
4056 1.1 dyoung break;
4057 1.1 dyoung case FINISH_ID_STA:
4058 1.1 dyoung case FINISH_RF_ATTACH:
4059 1.1 dyoung rtw_rf_destroy(sc->sc_rf);
4060 1.1 dyoung sc->sc_rf = NULL;
4061 1.1 dyoung /*FALLTHROUGH*/
4062 1.1 dyoung case FINISH_PARSE_SROM:
4063 1.1 dyoung case FINISH_READ_SROM:
4064 1.1 dyoung rtw_srom_free(&sc->sc_srom);
4065 1.1 dyoung /*FALLTHROUGH*/
4066 1.1 dyoung case FINISH_RESET:
4067 1.1 dyoung case FINISH_RXMAPS_CREATE:
4068 1.34 dyoung rtw_rxdesc_dmamaps_destroy(sc->sc_dmat, &sc->sc_rxsoft[0],
4069 1.1 dyoung RTW_RXQLEN);
4070 1.1 dyoung /*FALLTHROUGH*/
4071 1.1 dyoung case FINISH_TXMAPS_CREATE:
4072 1.1 dyoung for (pri = 0; pri < RTW_NTXPRI; pri++) {
4073 1.1 dyoung rtw_txdesc_dmamaps_destroy(sc->sc_dmat,
4074 1.34 dyoung sc->sc_txsoft_blk[pri].tsb_desc,
4075 1.34 dyoung sc->sc_txsoft_blk[pri].tsb_ndesc);
4076 1.1 dyoung }
4077 1.1 dyoung /*FALLTHROUGH*/
4078 1.1 dyoung case FINISH_TXDESCBLK_SETUP:
4079 1.1 dyoung case FINISH_TXCTLBLK_SETUP:
4080 1.34 dyoung rtw_txsoft_blk_cleanup_all(sc);
4081 1.1 dyoung /*FALLTHROUGH*/
4082 1.1 dyoung case FINISH_DESCMAP_LOAD:
4083 1.1 dyoung bus_dmamap_unload(sc->sc_dmat, sc->sc_desc_dmamap);
4084 1.1 dyoung /*FALLTHROUGH*/
4085 1.1 dyoung case FINISH_DESCMAP_CREATE:
4086 1.1 dyoung bus_dmamap_destroy(sc->sc_dmat, sc->sc_desc_dmamap);
4087 1.1 dyoung /*FALLTHROUGH*/
4088 1.1 dyoung case FINISH_DESC_MAP:
4089 1.1 dyoung bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_descs,
4090 1.1 dyoung sizeof(struct rtw_descs));
4091 1.1 dyoung /*FALLTHROUGH*/
4092 1.1 dyoung case FINISH_DESC_ALLOC:
4093 1.1 dyoung bus_dmamem_free(sc->sc_dmat, &sc->sc_desc_segs,
4094 1.1 dyoung sc->sc_desc_nsegs);
4095 1.1 dyoung /*FALLTHROUGH*/
4096 1.1 dyoung case DETACHED:
4097 1.1 dyoung NEXT_ATTACH_STATE(sc, DETACHED);
4098 1.1 dyoung break;
4099 1.1 dyoung }
4100 1.1 dyoung return 0;
4101 1.1 dyoung }
4102 1.1 dyoung
4103 1.1 dyoung int
4104 1.1 dyoung rtw_activate(struct device *self, enum devact act)
4105 1.1 dyoung {
4106 1.1 dyoung struct rtw_softc *sc = (struct rtw_softc *)self;
4107 1.1 dyoung int rc = 0, s;
4108 1.1 dyoung
4109 1.1 dyoung s = splnet();
4110 1.1 dyoung switch (act) {
4111 1.1 dyoung case DVACT_ACTIVATE:
4112 1.1 dyoung rc = EOPNOTSUPP;
4113 1.1 dyoung break;
4114 1.1 dyoung
4115 1.1 dyoung case DVACT_DEACTIVATE:
4116 1.1 dyoung if_deactivate(&sc->sc_ic.ic_if);
4117 1.1 dyoung break;
4118 1.1 dyoung }
4119 1.1 dyoung splx(s);
4120 1.1 dyoung return rc;
4121 1.1 dyoung }
4122