rtwvar.h revision 1.17
1 /* $NetBSD: rtwvar.h,v 1.17 2005/01/02 04:23:03 dyoung Exp $ */ 2 /*- 3 * Copyright (c) 2004, 2005 David Young. All rights reserved. 4 * 5 * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of David Young may not be used to endorse or promote 16 * products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 22 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 23 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 25 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 27 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 30 * OF SUCH DAMAGE. 31 */ 32 33 #ifndef _DEV_IC_RTWVAR_H_ 34 #define _DEV_IC_RTWVAR_H_ 35 36 #include <sys/queue.h> 37 #include <sys/callout.h> 38 39 #ifdef RTW_DEBUG 40 #define RTW_DEBUG_TUNE 0x000001 41 #define RTW_DEBUG_PKTFILT 0x000002 42 #define RTW_DEBUG_XMIT 0x000004 43 #define RTW_DEBUG_XMIT_DESC 0x000008 44 #define RTW_DEBUG_NODE 0x000010 45 #define RTW_DEBUG_PWR 0x000020 46 #define RTW_DEBUG_ATTACH 0x000040 47 #define RTW_DEBUG_REGDUMP 0x000080 48 #define RTW_DEBUG_ACCESS 0x000100 49 #define RTW_DEBUG_RESET 0x000200 50 #define RTW_DEBUG_INIT 0x000400 51 #define RTW_DEBUG_IOSTATE 0x000800 52 #define RTW_DEBUG_RECV 0x001000 53 #define RTW_DEBUG_RECV_DESC 0x002000 54 #define RTW_DEBUG_IO_KICK 0x004000 55 #define RTW_DEBUG_INTR 0x008000 56 #define RTW_DEBUG_PHY 0x010000 57 #define RTW_DEBUG_PHYIO 0x020000 58 #define RTW_DEBUG_PHYBITIO 0x040000 59 #define RTW_DEBUG_TIMEOUT 0x080000 60 #define RTW_DEBUG_BUGS 0x100000 61 #define RTW_DEBUG_MAX 0x1fffff 62 63 extern int rtw_debug; 64 #define RTW_DPRINTF(__flags, __x) \ 65 if ((rtw_debug & (__flags)) != 0) printf __x 66 #define DPRINTF(__sc, __flags, __x) \ 67 if (((__sc)->sc_ic.ic_if.if_flags & IFF_DEBUG) != 0) \ 68 RTW_DPRINTF(__flags, __x) 69 #else /* RTW_DEBUG */ 70 #define RTW_DPRINTF(__flags, __x) 71 #define DPRINTF(__sc, __flags, __x) 72 #endif /* RTW_DEBUG */ 73 74 enum rtw_locale { 75 RTW_LOCALE_USA = 0, 76 RTW_LOCALE_EUROPE, 77 RTW_LOCALE_JAPAN, 78 RTW_LOCALE_UNKNOWN 79 }; 80 81 enum rtw_rfchipid { 82 RTW_RFCHIPID_RESERVED = 0, 83 RTW_RFCHIPID_INTERSIL = 1, 84 RTW_RFCHIPID_RFMD = 2, 85 RTW_RFCHIPID_PHILIPS = 3, 86 RTW_RFCHIPID_MAXIM = 4, 87 RTW_RFCHIPID_GCT = 5 88 }; 89 90 /* sc_flags */ 91 #define RTW_F_ENABLED 0x00000001 /* chip is enabled */ 92 #define RTW_F_DIGPHY 0x00000002 /* digital PHY */ 93 #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */ 94 #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */ 95 #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */ 96 #define RTW_F_SLEEP 0x00000040 /* chip is asleep */ 97 #define RTW_F_INVALID 0x00000080 /* chip is absent */ 98 /* all PHY flags */ 99 #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV) 100 101 struct rtw_regs { 102 bus_space_tag_t r_bt; 103 bus_space_handle_t r_bh; 104 }; 105 106 #define RTW_SR_GET(sr, ofs) \ 107 (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff) 108 109 #define RTW_SR_GET16(sr, ofs) \ 110 (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8)) 111 112 struct rtw_srom { 113 uint16_t *sr_content; 114 uint16_t sr_size; 115 }; 116 117 struct rtw_rxsoft { 118 struct mbuf *rs_mbuf; 119 bus_dmamap_t rs_dmamap; 120 }; 121 122 struct rtw_txsoft { 123 SIMPLEQ_ENTRY(rtw_txsoft) ts_q; 124 struct mbuf *ts_mbuf; 125 bus_dmamap_t ts_dmamap; 126 struct ieee80211_node *ts_ni; /* destination node */ 127 u_int ts_first; /* 1st hw descriptor */ 128 u_int ts_last; /* last hw descriptor */ 129 struct ieee80211_duration ts_d0; 130 struct ieee80211_duration ts_dn; 131 }; 132 133 #define RTW_NTXPRI 4 /* number of Tx priorities */ 134 #define RTW_TXPRILO 0 135 #define RTW_TXPRIMD 1 136 #define RTW_TXPRIHI 2 137 #define RTW_TXPRIBCN 3 /* beacon priority */ 138 139 #define RTW_MAXPKTSEGS 64 /* Max 64 segments per Tx packet */ 140 141 #define CASSERT(cond, complaint) complaint[(cond) ? 0 : -1] = complaint[(cond) ? 0 : -1] 142 143 /* Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT 144 * boundaries. I allocate them consecutively from one buffer, so 145 * just round up. 146 */ 147 #define RTW_TXQLENLO 64 /* low-priority queue length */ 148 #define RTW_TXQLENMD 64 /* medium-priority */ 149 #define RTW_TXQLENHI 64 /* high-priority */ 150 #define RTW_TXQLENBCN 1 /* beacon */ 151 152 #define RTW_NTXDESCLO RTW_TXQLENLO 153 #define RTW_NTXDESCMD RTW_TXQLENMD 154 #define RTW_NTXDESCHI RTW_TXQLENHI 155 #define RTW_NTXDESCBCN RTW_TXQLENBCN 156 157 #define RTW_NTXDESCTOTAL (RTW_NTXDESCLO + RTW_NTXDESCMD + \ 158 RTW_NTXDESCHI + RTW_NTXDESCBCN) 159 160 #define RTW_RXQLEN 64 161 162 struct rtw_rxdesc_blk { 163 struct rtw_rxdesc *rdb_desc; 164 u_int rdb_next; 165 u_int rdb_ndesc; 166 bus_dma_tag_t rdb_dmat; 167 bus_dmamap_t rdb_dmamap; 168 }; 169 170 struct rtw_txdesc_blk { 171 u_int tdb_ndesc; 172 u_int tdb_next; 173 u_int tdb_nfree; 174 bus_dma_tag_t tdb_dmat; 175 bus_dmamap_t tdb_dmamap; 176 bus_addr_t tdb_physbase; 177 bus_addr_t tdb_ofs; 178 struct rtw_txdesc *tdb_desc; 179 }; 180 181 #define RTW_NEXT_IDX(__htc, __idx) (((__idx) + 1) % (__htc)->tdb_ndesc) 182 183 #define RTW_NEXT_DESC(__htc, __idx) \ 184 ((__htc)->tdb_physbase + \ 185 sizeof(struct rtw_txdesc) * RTW_NEXT_IDX((__htc), (__idx))) 186 187 SIMPLEQ_HEAD(rtw_txq, rtw_txsoft); 188 189 struct rtw_txsoft_blk { 190 /* dirty/free s/w descriptors */ 191 struct rtw_txq tsb_dirtyq; 192 struct rtw_txq tsb_freeq; 193 u_int tsb_ndesc; 194 int tsb_tx_timer; 195 struct rtw_txsoft *tsb_desc; 196 }; 197 198 struct rtw_descs { 199 struct rtw_txdesc hd_txlo[RTW_NTXDESCLO]; 200 struct rtw_txdesc hd_txmd[RTW_NTXDESCMD]; 201 struct rtw_txdesc hd_txhi[RTW_NTXDESCMD]; 202 struct rtw_rxdesc hd_rx[RTW_RXQLEN]; 203 struct rtw_txdesc hd_bcn[RTW_NTXDESCBCN]; 204 }; 205 #define RTW_DESC_OFFSET(ring, i) offsetof(struct rtw_descs, ring[i]) 206 #define RTW_RING_OFFSET(ring) RTW_DESC_OFFSET(ring, 0) 207 #define RTW_RING_BASE(sc, ring) ((sc)->sc_desc_physaddr + \ 208 RTW_RING_OFFSET(ring)) 209 210 /* Radio capture format for RTL8180. */ 211 212 #define RTW_RX_RADIOTAP_PRESENT \ 213 ((1 << IEEE80211_RADIOTAP_TSFT) | \ 214 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 215 (1 << IEEE80211_RADIOTAP_RATE) | \ 216 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 217 (1 << IEEE80211_RADIOTAP_LOCK_QUALITY) | \ 218 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \ 219 0) 220 221 struct rtw_rx_radiotap_header { 222 struct ieee80211_radiotap_header rr_ihdr; 223 uint64_t rr_tsft; 224 uint8_t rr_flags; 225 uint8_t rr_rate; 226 uint16_t rr_chan_freq; 227 uint16_t rr_chan_flags; 228 uint16_t rr_barker_lock; 229 uint8_t rr_antsignal; 230 } __attribute__((__packed__)); 231 232 #define RTW_TX_RADIOTAP_PRESENT \ 233 ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 234 (1 << IEEE80211_RADIOTAP_RATE) | \ 235 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 236 0) 237 238 struct rtw_tx_radiotap_header { 239 struct ieee80211_radiotap_header rt_ihdr; 240 uint8_t rt_flags; 241 uint8_t rt_rate; 242 uint16_t rt_chan_freq; 243 uint16_t rt_chan_flags; 244 } __attribute__((__packed__)); 245 246 enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE, 247 FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE, 248 FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM, 249 FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP, 250 FINISH_TXCTLBLK_SETUP, DETACHED}; 251 252 struct rtw_hooks { 253 void *rh_shutdown; /* shutdown hook */ 254 void *rh_power; /* power management hook */ 255 }; 256 257 struct rtw_mtbl { 258 int (*mt_newstate)(struct ieee80211com *, 259 enum ieee80211_state, int); 260 void (*mt_recv_mgmt)(struct ieee80211com *, 261 struct mbuf *, struct ieee80211_node *, 262 int, int, uint32_t); 263 struct ieee80211_node *(*mt_node_alloc)(struct ieee80211com *); 264 void (*mt_node_free)(struct ieee80211com *, 265 struct ieee80211_node *); 266 }; 267 268 enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON }; 269 270 typedef void (*rtw_continuous_tx_cb_t)(void *arg, int); 271 272 struct rtw_phy { 273 struct rtw_rf *p_rf; 274 struct rtw_regs *p_regs; 275 }; 276 277 struct rtw_bbpset { 278 u_int bb_antatten; 279 u_int bb_chestlim; 280 u_int bb_chsqlim; 281 u_int bb_ifagcdet; 282 u_int bb_ifagcini; 283 u_int bb_ifagclimit; 284 u_int bb_lnadet; 285 u_int bb_sys1; 286 u_int bb_sys2; 287 u_int bb_sys3; 288 u_int bb_trl; 289 u_int bb_txagc; 290 }; 291 292 struct rtw_rf { 293 void (*rf_destroy)(struct rtw_rf *); 294 /* args: frequency, txpower, power state */ 295 int (*rf_init)(struct rtw_rf *, u_int, uint8_t, 296 enum rtw_pwrstate); 297 /* arg: power state */ 298 int (*rf_pwrstate)(struct rtw_rf *, enum rtw_pwrstate); 299 /* arg: frequency */ 300 int (*rf_tune)(struct rtw_rf *, u_int); 301 /* arg: txpower */ 302 int (*rf_txpower)(struct rtw_rf *, uint8_t); 303 rtw_continuous_tx_cb_t rf_continuous_tx_cb; 304 void *rf_continuous_tx_arg; 305 struct rtw_bbpset rf_bbpset; 306 }; 307 308 static __inline void 309 rtw_rf_destroy(struct rtw_rf *rf) 310 { 311 (*rf->rf_destroy)(rf); 312 } 313 314 static __inline int 315 rtw_rf_init(struct rtw_rf *rf, u_int freq, uint8_t opaque_txpower, 316 enum rtw_pwrstate power) 317 { 318 return (*rf->rf_init)(rf, freq, opaque_txpower, power); 319 } 320 321 static __inline int 322 rtw_rf_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power) 323 { 324 return (*rf->rf_pwrstate)(rf, power); 325 } 326 327 static __inline int 328 rtw_rf_tune(struct rtw_rf *rf, u_int freq) 329 { 330 return (*rf->rf_tune)(rf, freq); 331 } 332 333 static __inline int 334 rtw_rf_txpower(struct rtw_rf *rf, uint8_t opaque_txpower) 335 { 336 return (*rf->rf_txpower)(rf, opaque_txpower); 337 } 338 339 typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, u_int, 340 uint32_t); 341 342 struct rtw_rfbus { 343 struct rtw_regs *b_regs; 344 rtw_rf_write_t b_write; 345 }; 346 347 static __inline int 348 rtw_rfbus_write(struct rtw_rfbus *bus, enum rtw_rfchipid rfchipid, u_int addr, 349 uint32_t val) 350 { 351 return (*bus->b_write)(bus->b_regs, rfchipid, addr, val); 352 } 353 354 struct rtw_max2820 { 355 struct rtw_rf mx_rf; 356 struct rtw_rfbus mx_bus; 357 int mx_is_a; /* 1: MAX2820A/MAX2821A */ 358 }; 359 360 struct rtw_sa2400 { 361 struct rtw_rf sa_rf; 362 struct rtw_rfbus sa_bus; 363 int sa_digphy; /* 1: digital PHY */ 364 }; 365 366 typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int); 367 368 enum rtw_access {RTW_ACCESS_NONE = 0, 369 RTW_ACCESS_CONFIG = 1, 370 RTW_ACCESS_ANAPARM = 2}; 371 372 struct rtw_softc { 373 struct device sc_dev; 374 struct ieee80211com sc_ic; 375 struct rtw_regs sc_regs; 376 bus_dma_tag_t sc_dmat; 377 uint32_t sc_flags; 378 379 enum rtw_attach_state sc_attach_state; 380 enum rtw_rfchipid sc_rfchipid; 381 enum rtw_locale sc_locale; 382 uint8_t sc_phydelay; 383 384 /* s/w Tx/Rx descriptors */ 385 struct rtw_txsoft_blk sc_txsoft_blk[RTW_NTXPRI]; 386 struct rtw_txdesc_blk sc_txdesc_blk[RTW_NTXPRI]; 387 388 struct rtw_rxsoft sc_rxsoft[RTW_RXQLEN]; 389 struct rtw_rxdesc_blk sc_rxdesc_blk; 390 391 struct rtw_descs *sc_descs; 392 393 bus_dma_segment_t sc_desc_segs; 394 int sc_desc_nsegs; 395 bus_dmamap_t sc_desc_dmamap; 396 #define sc_desc_physaddr sc_desc_dmamap->dm_segs[0].ds_addr 397 398 struct rtw_srom sc_srom; 399 400 enum rtw_pwrstate sc_pwrstate; 401 402 rtw_pwrstate_t sc_pwrstate_cb; 403 404 struct rtw_rf *sc_rf; 405 406 uint16_t sc_inten; 407 408 /* interrupt acknowledge hook */ 409 void (*sc_intr_ack) __P((struct rtw_regs *)); 410 411 int (*sc_enable)(struct rtw_softc *); 412 void (*sc_disable)(struct rtw_softc *); 413 void (*sc_power)(struct rtw_softc *, int); 414 struct rtw_mtbl sc_mtbl; 415 struct rtw_hooks sc_hooks; 416 417 caddr_t sc_radiobpf; 418 419 struct callout sc_scan_ch; 420 u_int sc_cur_chan; 421 422 uint32_t sc_tsfth; /* most significant TSFT bits */ 423 uint32_t sc_rcr; /* RTW_RCR */ 424 uint8_t sc_csthr; /* carrier-sense threshold */ 425 426 int sc_do_tick; /* indicate 1s ticks */ 427 struct timeval sc_tick0; /* first tick */ 428 429 uint8_t sc_rev; /* PCI/Cardbus revision */ 430 431 uint32_t sc_anaparm; /* register RTW_ANAPARM */ 432 433 union { 434 struct rtw_rx_radiotap_header tap; 435 uint8_t pad[64]; 436 } sc_rxtapu; 437 union { 438 struct rtw_tx_radiotap_header tap; 439 uint8_t pad[64]; 440 } sc_txtapu; 441 enum rtw_access sc_access; 442 }; 443 444 #define sc_if sc_ic.ic_if 445 #define sc_rxtap sc_rxtapu.tap 446 #define sc_txtap sc_txtapu.tap 447 448 extern int rtw_host_rfio; 449 450 void rtw_txdac_enable(struct rtw_softc *, int); 451 void rtw_anaparm_enable(struct rtw_regs *, int); 452 void rtw_config0123_enable(struct rtw_regs *, int); 453 void rtw_continuous_tx_enable(struct rtw_softc *, int); 454 void rtw_set_access(struct rtw_softc *, enum rtw_access); 455 456 void rtw_attach(struct rtw_softc *); 457 int rtw_detach(struct rtw_softc *); 458 int rtw_intr(void *); 459 460 void rtw_disable(struct rtw_softc *); 461 int rtw_enable(struct rtw_softc *); 462 463 int rtw_activate(struct device *, enum devact); 464 void rtw_power(int, void *); 465 void rtw_shutdown(void *); 466 467 const char *rtw_pwrstate_string(enum rtw_pwrstate); 468 469 #endif /* _DEV_IC_RTWVAR_H_ */ 470
Indexes created Sun Oct 19 19:09:49 GMT 2025