rtwvar.h revision 1.18
1 /* $NetBSD: rtwvar.h,v 1.18 2005/01/03 03:25:06 dyoung Exp $ */ 2 /*- 3 * Copyright (c) 2004, 2005 David Young. All rights reserved. 4 * 5 * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of David Young may not be used to endorse or promote 16 * products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 22 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 23 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 25 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 27 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 30 * OF SUCH DAMAGE. 31 */ 32 33 #ifndef _DEV_IC_RTWVAR_H_ 34 #define _DEV_IC_RTWVAR_H_ 35 36 #include <sys/queue.h> 37 #include <sys/callout.h> 38 39 #ifdef RTW_DEBUG 40 #define RTW_DEBUG_TUNE 0x000001 41 #define RTW_DEBUG_PKTFILT 0x000002 42 #define RTW_DEBUG_XMIT 0x000004 43 #define RTW_DEBUG_XMIT_DESC 0x000008 44 #define RTW_DEBUG_NODE 0x000010 45 #define RTW_DEBUG_PWR 0x000020 46 #define RTW_DEBUG_ATTACH 0x000040 47 #define RTW_DEBUG_REGDUMP 0x000080 48 #define RTW_DEBUG_ACCESS 0x000100 49 #define RTW_DEBUG_RESET 0x000200 50 #define RTW_DEBUG_INIT 0x000400 51 #define RTW_DEBUG_IOSTATE 0x000800 52 #define RTW_DEBUG_RECV 0x001000 53 #define RTW_DEBUG_RECV_DESC 0x002000 54 #define RTW_DEBUG_IO_KICK 0x004000 55 #define RTW_DEBUG_INTR 0x008000 56 #define RTW_DEBUG_PHY 0x010000 57 #define RTW_DEBUG_PHYIO 0x020000 58 #define RTW_DEBUG_PHYBITIO 0x040000 59 #define RTW_DEBUG_TIMEOUT 0x080000 60 #define RTW_DEBUG_BUGS 0x100000 61 #define RTW_DEBUG_MAX 0x1fffff 62 63 extern int rtw_debug; 64 #define RTW_DPRINTF(__flags, __x) \ 65 if ((rtw_debug & (__flags)) != 0) printf __x 66 #define DPRINTF(__sc, __flags, __x) \ 67 if (((__sc)->sc_ic.ic_if.if_flags & IFF_DEBUG) != 0) \ 68 RTW_DPRINTF(__flags, __x) 69 #define RTW_PRINT_REGS(__regs, __dvname, __where) \ 70 rtw_print_regs((__regs), (__dvname), (__where)) 71 #else /* RTW_DEBUG */ 72 #define RTW_DPRINTF(__flags, __x) 73 #define DPRINTF(__sc, __flags, __x) 74 #define RTW_PRINT_REGS(__regs, __dvname, __where) 75 #endif /* RTW_DEBUG */ 76 77 enum rtw_locale { 78 RTW_LOCALE_USA = 0, 79 RTW_LOCALE_EUROPE, 80 RTW_LOCALE_JAPAN, 81 RTW_LOCALE_UNKNOWN 82 }; 83 84 enum rtw_rfchipid { 85 RTW_RFCHIPID_RESERVED = 0, 86 RTW_RFCHIPID_INTERSIL = 1, 87 RTW_RFCHIPID_RFMD = 2, 88 RTW_RFCHIPID_PHILIPS = 3, 89 RTW_RFCHIPID_MAXIM = 4, 90 RTW_RFCHIPID_GCT = 5 91 }; 92 93 /* sc_flags */ 94 #define RTW_F_ENABLED 0x00000001 /* chip is enabled */ 95 #define RTW_F_DIGPHY 0x00000002 /* digital PHY */ 96 #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */ 97 #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */ 98 #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */ 99 #define RTW_F_SLEEP 0x00000040 /* chip is asleep */ 100 #define RTW_F_INVALID 0x00000080 /* chip is absent */ 101 /* all PHY flags */ 102 #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV) 103 104 struct rtw_regs { 105 bus_space_tag_t r_bt; 106 bus_space_handle_t r_bh; 107 }; 108 109 #define RTW_SR_GET(sr, ofs) \ 110 (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff) 111 112 #define RTW_SR_GET16(sr, ofs) \ 113 (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8)) 114 115 struct rtw_srom { 116 uint16_t *sr_content; 117 uint16_t sr_size; 118 }; 119 120 struct rtw_rxsoft { 121 struct mbuf *rs_mbuf; 122 bus_dmamap_t rs_dmamap; 123 }; 124 125 struct rtw_txsoft { 126 SIMPLEQ_ENTRY(rtw_txsoft) ts_q; 127 struct mbuf *ts_mbuf; 128 bus_dmamap_t ts_dmamap; 129 struct ieee80211_node *ts_ni; /* destination node */ 130 u_int ts_first; /* 1st hw descriptor */ 131 u_int ts_last; /* last hw descriptor */ 132 struct ieee80211_duration ts_d0; 133 struct ieee80211_duration ts_dn; 134 }; 135 136 #define RTW_NTXPRI 4 /* number of Tx priorities */ 137 #define RTW_TXPRILO 0 138 #define RTW_TXPRIMD 1 139 #define RTW_TXPRIHI 2 140 #define RTW_TXPRIBCN 3 /* beacon priority */ 141 142 #define RTW_MAXPKTSEGS 64 /* Max 64 segments per Tx packet */ 143 144 #define CASSERT(cond, complaint) complaint[(cond) ? 0 : -1] = complaint[(cond) ? 0 : -1] 145 146 /* Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT 147 * boundaries. I allocate them consecutively from one buffer, so 148 * just round up. 149 */ 150 #define RTW_TXQLENLO 64 /* low-priority queue length */ 151 #define RTW_TXQLENMD 64 /* medium-priority */ 152 #define RTW_TXQLENHI 64 /* high-priority */ 153 #define RTW_TXQLENBCN 1 /* beacon */ 154 155 #define RTW_NTXDESCLO RTW_TXQLENLO 156 #define RTW_NTXDESCMD RTW_TXQLENMD 157 #define RTW_NTXDESCHI RTW_TXQLENHI 158 #define RTW_NTXDESCBCN RTW_TXQLENBCN 159 160 #define RTW_NTXDESCTOTAL (RTW_NTXDESCLO + RTW_NTXDESCMD + \ 161 RTW_NTXDESCHI + RTW_NTXDESCBCN) 162 163 #define RTW_RXQLEN 64 164 165 struct rtw_rxdesc_blk { 166 struct rtw_rxdesc *rdb_desc; 167 u_int rdb_next; 168 u_int rdb_ndesc; 169 bus_dma_tag_t rdb_dmat; 170 bus_dmamap_t rdb_dmamap; 171 }; 172 173 struct rtw_txdesc_blk { 174 u_int tdb_ndesc; 175 u_int tdb_next; 176 u_int tdb_nfree; 177 bus_dma_tag_t tdb_dmat; 178 bus_dmamap_t tdb_dmamap; 179 bus_addr_t tdb_physbase; 180 bus_addr_t tdb_ofs; 181 struct rtw_txdesc *tdb_desc; 182 }; 183 184 #define RTW_NEXT_IDX(__htc, __idx) (((__idx) + 1) % (__htc)->tdb_ndesc) 185 186 #define RTW_NEXT_DESC(__htc, __idx) \ 187 ((__htc)->tdb_physbase + \ 188 sizeof(struct rtw_txdesc) * RTW_NEXT_IDX((__htc), (__idx))) 189 190 SIMPLEQ_HEAD(rtw_txq, rtw_txsoft); 191 192 struct rtw_txsoft_blk { 193 /* dirty/free s/w descriptors */ 194 struct rtw_txq tsb_dirtyq; 195 struct rtw_txq tsb_freeq; 196 u_int tsb_ndesc; 197 int tsb_tx_timer; 198 struct rtw_txsoft *tsb_desc; 199 }; 200 201 struct rtw_descs { 202 struct rtw_txdesc hd_txlo[RTW_NTXDESCLO]; 203 struct rtw_txdesc hd_txmd[RTW_NTXDESCMD]; 204 struct rtw_txdesc hd_txhi[RTW_NTXDESCMD]; 205 struct rtw_rxdesc hd_rx[RTW_RXQLEN]; 206 struct rtw_txdesc hd_bcn[RTW_NTXDESCBCN]; 207 }; 208 #define RTW_DESC_OFFSET(ring, i) offsetof(struct rtw_descs, ring[i]) 209 #define RTW_RING_OFFSET(ring) RTW_DESC_OFFSET(ring, 0) 210 #define RTW_RING_BASE(sc, ring) ((sc)->sc_desc_physaddr + \ 211 RTW_RING_OFFSET(ring)) 212 213 /* Radio capture format for RTL8180. */ 214 215 #define RTW_RX_RADIOTAP_PRESENT \ 216 ((1 << IEEE80211_RADIOTAP_TSFT) | \ 217 (1 << IEEE80211_RADIOTAP_FLAGS) | \ 218 (1 << IEEE80211_RADIOTAP_RATE) | \ 219 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 220 (1 << IEEE80211_RADIOTAP_LOCK_QUALITY) | \ 221 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL) | \ 222 0) 223 224 struct rtw_rx_radiotap_header { 225 struct ieee80211_radiotap_header rr_ihdr; 226 uint64_t rr_tsft; 227 uint8_t rr_flags; 228 uint8_t rr_rate; 229 uint16_t rr_chan_freq; 230 uint16_t rr_chan_flags; 231 uint16_t rr_barker_lock; 232 uint8_t rr_antsignal; 233 } __attribute__((__packed__)); 234 235 #define RTW_TX_RADIOTAP_PRESENT \ 236 ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 237 (1 << IEEE80211_RADIOTAP_RATE) | \ 238 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 239 0) 240 241 struct rtw_tx_radiotap_header { 242 struct ieee80211_radiotap_header rt_ihdr; 243 uint8_t rt_flags; 244 uint8_t rt_rate; 245 uint16_t rt_chan_freq; 246 uint16_t rt_chan_flags; 247 } __attribute__((__packed__)); 248 249 enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE, 250 FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE, 251 FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM, 252 FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP, 253 FINISH_TXCTLBLK_SETUP, DETACHED}; 254 255 struct rtw_hooks { 256 void *rh_shutdown; /* shutdown hook */ 257 void *rh_power; /* power management hook */ 258 }; 259 260 struct rtw_mtbl { 261 int (*mt_newstate)(struct ieee80211com *, 262 enum ieee80211_state, int); 263 void (*mt_recv_mgmt)(struct ieee80211com *, 264 struct mbuf *, struct ieee80211_node *, 265 int, int, uint32_t); 266 struct ieee80211_node *(*mt_node_alloc)(struct ieee80211com *); 267 void (*mt_node_free)(struct ieee80211com *, 268 struct ieee80211_node *); 269 }; 270 271 enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON }; 272 273 typedef void (*rtw_continuous_tx_cb_t)(void *arg, int); 274 275 struct rtw_phy { 276 struct rtw_rf *p_rf; 277 struct rtw_regs *p_regs; 278 }; 279 280 struct rtw_bbpset { 281 u_int bb_antatten; 282 u_int bb_chestlim; 283 u_int bb_chsqlim; 284 u_int bb_ifagcdet; 285 u_int bb_ifagcini; 286 u_int bb_ifagclimit; 287 u_int bb_lnadet; 288 u_int bb_sys1; 289 u_int bb_sys2; 290 u_int bb_sys3; 291 u_int bb_trl; 292 u_int bb_txagc; 293 }; 294 295 struct rtw_rf { 296 void (*rf_destroy)(struct rtw_rf *); 297 /* args: frequency, txpower, power state */ 298 int (*rf_init)(struct rtw_rf *, u_int, uint8_t, 299 enum rtw_pwrstate); 300 /* arg: power state */ 301 int (*rf_pwrstate)(struct rtw_rf *, enum rtw_pwrstate); 302 /* arg: frequency */ 303 int (*rf_tune)(struct rtw_rf *, u_int); 304 /* arg: txpower */ 305 int (*rf_txpower)(struct rtw_rf *, uint8_t); 306 rtw_continuous_tx_cb_t rf_continuous_tx_cb; 307 void *rf_continuous_tx_arg; 308 struct rtw_bbpset rf_bbpset; 309 }; 310 311 static __inline void 312 rtw_rf_destroy(struct rtw_rf *rf) 313 { 314 (*rf->rf_destroy)(rf); 315 } 316 317 static __inline int 318 rtw_rf_init(struct rtw_rf *rf, u_int freq, uint8_t opaque_txpower, 319 enum rtw_pwrstate power) 320 { 321 return (*rf->rf_init)(rf, freq, opaque_txpower, power); 322 } 323 324 static __inline int 325 rtw_rf_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power) 326 { 327 return (*rf->rf_pwrstate)(rf, power); 328 } 329 330 static __inline int 331 rtw_rf_tune(struct rtw_rf *rf, u_int freq) 332 { 333 return (*rf->rf_tune)(rf, freq); 334 } 335 336 static __inline int 337 rtw_rf_txpower(struct rtw_rf *rf, uint8_t opaque_txpower) 338 { 339 return (*rf->rf_txpower)(rf, opaque_txpower); 340 } 341 342 typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, u_int, 343 uint32_t); 344 345 struct rtw_rfbus { 346 struct rtw_regs *b_regs; 347 rtw_rf_write_t b_write; 348 }; 349 350 static __inline int 351 rtw_rfbus_write(struct rtw_rfbus *bus, enum rtw_rfchipid rfchipid, u_int addr, 352 uint32_t val) 353 { 354 return (*bus->b_write)(bus->b_regs, rfchipid, addr, val); 355 } 356 357 struct rtw_max2820 { 358 struct rtw_rf mx_rf; 359 struct rtw_rfbus mx_bus; 360 int mx_is_a; /* 1: MAX2820A/MAX2821A */ 361 }; 362 363 struct rtw_sa2400 { 364 struct rtw_rf sa_rf; 365 struct rtw_rfbus sa_bus; 366 int sa_digphy; /* 1: digital PHY */ 367 }; 368 369 typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int); 370 371 enum rtw_access {RTW_ACCESS_NONE = 0, 372 RTW_ACCESS_CONFIG = 1, 373 RTW_ACCESS_ANAPARM = 2}; 374 375 struct rtw_softc { 376 struct device sc_dev; 377 struct ieee80211com sc_ic; 378 struct rtw_regs sc_regs; 379 bus_dma_tag_t sc_dmat; 380 uint32_t sc_flags; 381 382 enum rtw_attach_state sc_attach_state; 383 enum rtw_rfchipid sc_rfchipid; 384 enum rtw_locale sc_locale; 385 uint8_t sc_phydelay; 386 387 /* s/w Tx/Rx descriptors */ 388 struct rtw_txsoft_blk sc_txsoft_blk[RTW_NTXPRI]; 389 struct rtw_txdesc_blk sc_txdesc_blk[RTW_NTXPRI]; 390 391 struct rtw_rxsoft sc_rxsoft[RTW_RXQLEN]; 392 struct rtw_rxdesc_blk sc_rxdesc_blk; 393 394 struct rtw_descs *sc_descs; 395 396 bus_dma_segment_t sc_desc_segs; 397 int sc_desc_nsegs; 398 bus_dmamap_t sc_desc_dmamap; 399 #define sc_desc_physaddr sc_desc_dmamap->dm_segs[0].ds_addr 400 401 struct rtw_srom sc_srom; 402 403 enum rtw_pwrstate sc_pwrstate; 404 405 rtw_pwrstate_t sc_pwrstate_cb; 406 407 struct rtw_rf *sc_rf; 408 409 uint16_t sc_inten; 410 411 /* interrupt acknowledge hook */ 412 void (*sc_intr_ack) __P((struct rtw_regs *)); 413 414 int (*sc_enable)(struct rtw_softc *); 415 void (*sc_disable)(struct rtw_softc *); 416 void (*sc_power)(struct rtw_softc *, int); 417 struct rtw_mtbl sc_mtbl; 418 struct rtw_hooks sc_hooks; 419 420 caddr_t sc_radiobpf; 421 422 struct callout sc_scan_ch; 423 u_int sc_cur_chan; 424 425 uint32_t sc_tsfth; /* most significant TSFT bits */ 426 uint32_t sc_rcr; /* RTW_RCR */ 427 uint8_t sc_csthr; /* carrier-sense threshold */ 428 429 int sc_do_tick; /* indicate 1s ticks */ 430 struct timeval sc_tick0; /* first tick */ 431 432 uint8_t sc_rev; /* PCI/Cardbus revision */ 433 434 uint32_t sc_anaparm; /* register RTW_ANAPARM */ 435 436 union { 437 struct rtw_rx_radiotap_header tap; 438 uint8_t pad[64]; 439 } sc_rxtapu; 440 union { 441 struct rtw_tx_radiotap_header tap; 442 uint8_t pad[64]; 443 } sc_txtapu; 444 enum rtw_access sc_access; 445 }; 446 447 #define sc_if sc_ic.ic_if 448 #define sc_rxtap sc_rxtapu.tap 449 #define sc_txtap sc_txtapu.tap 450 451 extern int rtw_host_rfio; 452 453 void rtw_txdac_enable(struct rtw_softc *, int); 454 void rtw_anaparm_enable(struct rtw_regs *, int); 455 void rtw_config0123_enable(struct rtw_regs *, int); 456 void rtw_continuous_tx_enable(struct rtw_softc *, int); 457 void rtw_set_access(struct rtw_softc *, enum rtw_access); 458 459 void rtw_attach(struct rtw_softc *); 460 int rtw_detach(struct rtw_softc *); 461 int rtw_intr(void *); 462 463 void rtw_disable(struct rtw_softc *); 464 int rtw_enable(struct rtw_softc *); 465 466 int rtw_activate(struct device *, enum devact); 467 void rtw_power(int, void *); 468 void rtw_shutdown(void *); 469 470 const char *rtw_pwrstate_string(enum rtw_pwrstate); 471 472 #endif /* _DEV_IC_RTWVAR_H_ */ 473
Indexes created Fri Sep 26 20:09:58 GMT 2025