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rtwvar.h revision 1.41
      1 /* $NetBSD: rtwvar.h,v 1.41 2010/01/17 19:45:06 pooka Exp $ */
      2 /*-
      3  * Copyright (c) 2004, 2005 David Young.  All rights reserved.
      4  *
      5  * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
     17  * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     18  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
     19  * PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL David
     20  * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     21  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
     22  * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     24  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     25  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
     27  * OF SUCH DAMAGE.
     28  */
     29 
     30 #ifndef _DEV_IC_RTWVAR_H_
     31 #define	_DEV_IC_RTWVAR_H_
     32 
     33 #include <sys/queue.h>
     34 #include <sys/callout.h>
     35 
     36 #ifdef RTW_DEBUG
     37 #define	RTW_DEBUG_TUNE		0x0000001
     38 #define	RTW_DEBUG_PKTFILT	0x0000002
     39 #define	RTW_DEBUG_XMIT		0x0000004
     40 #define	RTW_DEBUG_XMIT_DESC	0x0000008
     41 #define	RTW_DEBUG_NODE		0x0000010
     42 #define	RTW_DEBUG_PWR		0x0000020
     43 #define	RTW_DEBUG_ATTACH	0x0000040
     44 #define	RTW_DEBUG_REGDUMP	0x0000080
     45 #define	RTW_DEBUG_ACCESS	0x0000100
     46 #define	RTW_DEBUG_RESET		0x0000200
     47 #define	RTW_DEBUG_INIT		0x0000400
     48 #define	RTW_DEBUG_IOSTATE	0x0000800
     49 #define	RTW_DEBUG_RECV		0x0001000
     50 #define	RTW_DEBUG_RECV_DESC	0x0002000
     51 #define	RTW_DEBUG_IO_KICK	0x0004000
     52 #define	RTW_DEBUG_INTR		0x0008000
     53 #define	RTW_DEBUG_PHY		0x0010000
     54 #define	RTW_DEBUG_PHYIO		0x0020000
     55 #define	RTW_DEBUG_PHYBITIO	0x0040000
     56 #define	RTW_DEBUG_TIMEOUT	0x0080000
     57 #define	RTW_DEBUG_BUGS		0x0100000
     58 #define	RTW_DEBUG_BEACON	0x0200000
     59 #define	RTW_DEBUG_LED		0x0400000
     60 #define	RTW_DEBUG_KEY		0x0800000
     61 #define	RTW_DEBUG_XMIT_RSRC	0x1000000
     62 #define	RTW_DEBUG_OACTIVE	0x2000000
     63 #define	RTW_DEBUG_MAX		0x3ffffff
     64 
     65 extern int rtw_debug;
     66 #define RTW_DPRINTF(__flags, __x)	\
     67 	if ((rtw_debug & (__flags)) != 0) printf __x
     68 #define	DPRINTF(__sc, __flags, __x)				\
     69 	if (((__sc)->sc_if.if_flags & IFF_DEBUG) != 0)	\
     70 		RTW_DPRINTF(__flags, __x)
     71 #define	RTW_PRINT_REGS(__regs, __dvname, __where)	\
     72 	rtw_print_regs((__regs), (__dvname), (__where))
     73 #else /* RTW_DEBUG */
     74 #define RTW_DPRINTF(__flags, __x)
     75 #define	DPRINTF(__sc, __flags, __x)
     76 #define	RTW_PRINT_REGS(__regs, __dvname, __where)
     77 #endif /* RTW_DEBUG */
     78 
     79 enum rtw_locale {
     80 	RTW_LOCALE_USA = 0,
     81 	RTW_LOCALE_EUROPE,
     82 	RTW_LOCALE_JAPAN,
     83 	RTW_LOCALE_UNKNOWN
     84 };
     85 
     86 enum rtw_rfchipid {
     87 	RTW_RFCHIPID_RESERVED = 0,
     88 	RTW_RFCHIPID_INTERSIL = 1,
     89 	RTW_RFCHIPID_RFMD = 2,
     90 	RTW_RFCHIPID_PHILIPS = 3,
     91 	RTW_RFCHIPID_MAXIM = 4,
     92 	RTW_RFCHIPID_GCT = 5
     93 };
     94 /* sc_flags */
     95 #define RTW_F_DIGPHY		0x00000002	/* digital PHY */
     96 #define RTW_F_DFLANTB		0x00000004	/* B antenna is default */
     97 #define RTW_F_ANTDIV		0x00000010	/* h/w antenna diversity */
     98 #define RTW_F_9356SROM		0x00000020	/* 93c56 SROM */
     99 #define	RTW_F_DK_VALID		0x00000040	/* keys in DK0-DK3 are valid */
    100 #define	RTW_C_RXWEP_40		0x00000080	/* h/w decrypts 40-bit WEP */
    101 #define	RTW_C_RXWEP_104		0x00000100	/* h/w decrypts 104-bit WEP */
    102 	/* all PHY flags */
    103 #define RTW_F_ALLPHY		(RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV)
    104 enum rtw_access {RTW_ACCESS_NONE = 0,
    105 		 RTW_ACCESS_CONFIG = 1,
    106 		 RTW_ACCESS_ANAPARM = 2};
    107 
    108 struct rtw_regs {
    109 	bus_space_tag_t		r_bt;
    110 	bus_space_handle_t	r_bh;
    111 	bus_size_t		r_sz;
    112 	enum rtw_access		r_access;
    113 };
    114 
    115 #define RTW_SR_GET(sr, ofs) \
    116     (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff)
    117 
    118 #define RTW_SR_GET16(sr, ofs) \
    119     (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8))
    120 
    121 struct rtw_srom {
    122 	uint16_t		*sr_content;
    123 	uint16_t		sr_size;
    124 };
    125 
    126 struct rtw_rxsoft {
    127 	struct mbuf			*rs_mbuf;
    128 	bus_dmamap_t			rs_dmamap;
    129 };
    130 
    131 struct rtw_txsoft {
    132 	SIMPLEQ_ENTRY(rtw_txsoft)	ts_q;
    133 	struct mbuf			*ts_mbuf;
    134 	bus_dmamap_t			ts_dmamap;
    135 	struct ieee80211_node		*ts_ni;	/* destination node */
    136 	u_int				ts_first;	/* 1st hw descriptor */
    137 	u_int				ts_last;	/* last hw descriptor */
    138 	struct ieee80211_duration	ts_d0;
    139 	struct ieee80211_duration	ts_dn;
    140 };
    141 
    142 #define RTW_NTXPRI	4	/* number of Tx priorities */
    143 #define RTW_TXPRILO	0
    144 #define RTW_TXPRIMD	1
    145 #define RTW_TXPRIHI	2
    146 #define RTW_TXPRIBCN	3	/* beacon priority */
    147 
    148 #define RTW_MAXPKTSEGS		64	/* Max 64 segments per Tx packet */
    149 
    150 #define CASSERT(cond, complaint) complaint[(cond) ? 0 : -1] = complaint[(cond) ? 0 : -1]
    151 
    152 /* Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT
    153  * boundaries.  I allocate them consecutively from one buffer, so
    154  * just round up.
    155  */
    156 #define RTW_TXQLENLO	64	/* low-priority queue length */
    157 #define RTW_TXQLENMD	64	/* medium-priority */
    158 #define RTW_TXQLENHI	64	/* high-priority */
    159 #define RTW_TXQLENBCN	8	/* beacon */
    160 
    161 #define RTW_NTXDESCLO	RTW_TXQLENLO
    162 #define RTW_NTXDESCMD	RTW_TXQLENMD
    163 #define RTW_NTXDESCHI	RTW_TXQLENHI
    164 #define RTW_NTXDESCBCN	RTW_TXQLENBCN
    165 
    166 #define RTW_NTXDESCTOTAL	(RTW_NTXDESCLO + RTW_NTXDESCMD + \
    167 				 RTW_NTXDESCHI + RTW_NTXDESCBCN)
    168 
    169 #define RTW_RXQLEN	64
    170 
    171 struct rtw_rxdesc_blk {
    172 	u_int			rdb_ndesc;
    173 	u_int			rdb_next;
    174 	bus_dma_tag_t		rdb_dmat;
    175 	bus_dmamap_t		rdb_dmamap;
    176 	struct rtw_rxdesc	*rdb_desc;
    177 };
    178 
    179 struct rtw_txdesc_blk {
    180 	u_int			tdb_ndesc;
    181 	u_int			tdb_next;
    182 	u_int			tdb_nfree;
    183 	bus_dma_tag_t		tdb_dmat;
    184 	bus_dmamap_t		tdb_dmamap;
    185 	bus_addr_t		tdb_physbase;
    186 	bus_addr_t		tdb_ofs;
    187 	bus_size_t		tdb_basereg;
    188 	uint32_t		tdb_base;
    189 	struct rtw_txdesc	*tdb_desc;
    190 };
    191 
    192 #define RTW_NEXT_IDX(__htc, __idx)	(((__idx) + 1) % (__htc)->tdb_ndesc)
    193 
    194 #define RTW_NEXT_DESC(__htc, __idx) \
    195     ((__htc)->tdb_physbase + \
    196      sizeof(struct rtw_txdesc) * RTW_NEXT_IDX((__htc), (__idx)))
    197 
    198 SIMPLEQ_HEAD(rtw_txq, rtw_txsoft);
    199 
    200 struct rtw_txsoft_blk {
    201 	/* dirty/free s/w descriptors */
    202 	struct rtw_txq		tsb_dirtyq;
    203 	struct rtw_txq		tsb_freeq;
    204 	u_int			tsb_ndesc;
    205 	int			tsb_tx_timer;
    206 	struct rtw_txsoft	*tsb_desc;
    207 	uint8_t			tsb_poll;
    208 };
    209 
    210 struct rtw_descs {
    211 	struct rtw_txdesc	hd_txlo[RTW_NTXDESCLO];
    212 	struct rtw_txdesc	hd_txmd[RTW_NTXDESCMD];
    213 	struct rtw_txdesc	hd_txhi[RTW_NTXDESCMD];
    214 	struct rtw_rxdesc	hd_rx[RTW_RXQLEN];
    215 	struct rtw_txdesc	hd_bcn[RTW_NTXDESCBCN];
    216 };
    217 #define RTW_DESC_OFFSET(ring, i)	offsetof(struct rtw_descs, ring[i])
    218 #define RTW_RING_OFFSET(ring)		RTW_DESC_OFFSET(ring, 0)
    219 #define RTW_RING_BASE(sc, ring)		((sc)->sc_desc_physaddr + \
    220 					 RTW_RING_OFFSET(ring))
    221 
    222 /* Radio capture format for RTL8180. */
    223 
    224 #define RTW_RX_RADIOTAP_PRESENT					\
    225 	((1 << IEEE80211_RADIOTAP_TSFT)			|	\
    226 	 (1 << IEEE80211_RADIOTAP_FLAGS)		|	\
    227 	 (1 << IEEE80211_RADIOTAP_RATE)			|	\
    228 	 (1 << IEEE80211_RADIOTAP_CHANNEL)		|	\
    229 	 (1 << IEEE80211_RADIOTAP_LOCK_QUALITY)		|	\
    230 	 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL)		|	\
    231 	 0)
    232 
    233 #define RTW_PHILIPS_RX_RADIOTAP_PRESENT					\
    234 	((1 << IEEE80211_RADIOTAP_TSFT)			|	\
    235 	 (1 << IEEE80211_RADIOTAP_FLAGS)		|	\
    236 	 (1 << IEEE80211_RADIOTAP_RATE)			|	\
    237 	 (1 << IEEE80211_RADIOTAP_CHANNEL)		|	\
    238 	 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL)		|	\
    239 	 0)
    240 
    241 struct rtw_rx_radiotap_header {
    242 	struct ieee80211_radiotap_header	rr_ihdr;
    243 	uint64_t				rr_tsft;
    244 	uint8_t					rr_flags;
    245 	uint8_t					rr_rate;
    246 	uint16_t				rr_chan_freq;
    247 	uint16_t				rr_chan_flags;
    248 	union {
    249 		struct {
    250 			uint16_t		o_barker_lock;
    251 			uint8_t			o_antsignal;
    252 		} u_other;
    253 		struct {
    254 			uint8_t			p_antsignal;
    255 		} u_philips;
    256 	} rr_u;
    257 } __packed;
    258 
    259 #define RTW_TX_RADIOTAP_PRESENT				\
    260 	((1 << IEEE80211_RADIOTAP_RATE)		|	\
    261 	 (1 << IEEE80211_RADIOTAP_CHANNEL)	|	\
    262 	 0)
    263 
    264 struct rtw_tx_radiotap_header {
    265 	struct ieee80211_radiotap_header	rt_ihdr;
    266 	uint8_t					rt_rate;
    267 	uint8_t					rt_pad;
    268 	uint16_t				rt_chan_freq;
    269 	uint16_t				rt_chan_flags;
    270 } __packed;
    271 
    272 enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE,
    273 	FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE,
    274 	FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM,
    275 	FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP,
    276 	FINISH_TXCTLBLK_SETUP, DETACHED};
    277 
    278 struct rtw_mtbl {
    279 	int			(*mt_newstate)(struct ieee80211com *,
    280 					enum ieee80211_state, int);
    281 	void			(*mt_recv_mgmt)(struct ieee80211com *,
    282 				    struct mbuf *, struct ieee80211_node *,
    283 				    int, int, uint32_t);
    284 	struct ieee80211_node	*(*mt_node_alloc)(struct ieee80211_node_table*);
    285 	void			(*mt_node_free)(struct ieee80211_node *);
    286 };
    287 
    288 enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON };
    289 
    290 typedef void (*rtw_continuous_tx_cb_t)(void *arg, int);
    291 
    292 struct rtw_phy {
    293 	struct rtw_rf	*p_rf;
    294 	struct rtw_regs	*p_regs;
    295 };
    296 
    297 struct rtw_bbpset {
    298 	u_int	bb_antatten;
    299 	u_int	bb_chestlim;
    300 	u_int	bb_chsqlim;
    301 	u_int	bb_ifagcdet;
    302 	u_int	bb_ifagcini;
    303 	u_int	bb_ifagclimit;
    304 	u_int	bb_lnadet;
    305 	u_int	bb_sys1;
    306 	u_int	bb_sys2;
    307 	u_int	bb_sys3;
    308 	u_int	bb_trl;
    309 	u_int	bb_txagc;
    310 };
    311 
    312 struct rtw_rf {
    313 	void	(*rf_destroy)(struct rtw_rf *);
    314 	/* args: frequency, txpower, power state */
    315 	int	(*rf_init)(struct rtw_rf *, u_int, uint8_t,
    316 	                  enum rtw_pwrstate);
    317 	/* arg: power state */
    318 	int	(*rf_pwrstate)(struct rtw_rf *, enum rtw_pwrstate);
    319 	/* arg: frequency */
    320 	int	(*rf_tune)(struct rtw_rf *, u_int);
    321 	/* arg: txpower */
    322 	int	(*rf_txpower)(struct rtw_rf *, uint8_t);
    323 	rtw_continuous_tx_cb_t	rf_continuous_tx_cb;
    324 	void			*rf_continuous_tx_arg;
    325 	struct rtw_bbpset	rf_bbpset;
    326 };
    327 
    328 static __inline void
    329 rtw_rf_destroy(struct rtw_rf *rf)
    330 {
    331 	(*rf->rf_destroy)(rf);
    332 }
    333 
    334 static __inline int
    335 rtw_rf_init(struct rtw_rf *rf, u_int freq, uint8_t opaque_txpower,
    336     enum rtw_pwrstate power)
    337 {
    338 	return (*rf->rf_init)(rf, freq, opaque_txpower, power);
    339 }
    340 
    341 static __inline int
    342 rtw_rf_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power)
    343 {
    344 	return (*rf->rf_pwrstate)(rf, power);
    345 }
    346 
    347 static __inline int
    348 rtw_rf_tune(struct rtw_rf *rf, u_int freq)
    349 {
    350 	return (*rf->rf_tune)(rf, freq);
    351 }
    352 
    353 static __inline int
    354 rtw_rf_txpower(struct rtw_rf *rf, uint8_t opaque_txpower)
    355 {
    356 	return (*rf->rf_txpower)(rf, opaque_txpower);
    357 }
    358 
    359 typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, u_int,
    360     uint32_t);
    361 
    362 struct rtw_rfbus {
    363 	struct rtw_regs		*b_regs;
    364 	rtw_rf_write_t		b_write;
    365 };
    366 
    367 static __inline int
    368 rtw_rfbus_write(struct rtw_rfbus *bus, enum rtw_rfchipid rfchipid, u_int addr,
    369     uint32_t val)
    370 {
    371 	return (*bus->b_write)(bus->b_regs, rfchipid, addr, val);
    372 }
    373 
    374 struct rtw_max2820 {
    375 	struct rtw_rf		mx_rf;
    376 	struct rtw_rfbus	mx_bus;
    377 	int			mx_is_a;	/* 1: MAX2820A/MAX2821A */
    378 };
    379 
    380 struct rtw_grf5101 {
    381 	struct rtw_rf		gr_rf;
    382 	struct rtw_rfbus	gr_bus;
    383 };
    384 
    385 struct rtw_sa2400 {
    386 	struct rtw_rf		sa_rf;
    387 	struct rtw_rfbus	sa_bus;
    388 	int			sa_digphy;	/* 1: digital PHY */
    389 };
    390 
    391 typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int);
    392 
    393 union rtw_keys {
    394 	uint8_t		rk_keys[4][16];
    395 	uint32_t	rk_words[16];
    396 };
    397 
    398 #define	RTW_LED_SLOW_TICKS	MAX(1, hz/2)
    399 #define	RTW_LED_FAST_TICKS	MAX(1, hz/10)
    400 
    401 struct rtw_led_state {
    402 #define	RTW_LED0	0x1
    403 #define	RTW_LED1	0x2
    404 	uint8_t		ls_slowblink:2;
    405 	uint8_t		ls_actblink:2;
    406 	uint8_t		ls_default:2;
    407 	uint8_t		ls_state;
    408 	uint8_t		ls_event;
    409 #define	RTW_LED_S_RX	0x1
    410 #define	RTW_LED_S_TX	0x2
    411 #define	RTW_LED_S_SLOW	0x4
    412 	struct callout	ls_slow_ch;
    413 	struct callout	ls_fast_ch;
    414 };
    415 
    416 struct rtw_softc {
    417 	device_t		sc_dev;
    418 	struct device_suspensor	sc_suspensor;
    419 	struct pmf_qual		sc_qual;
    420 
    421 	struct ethercom		sc_ec;
    422 	struct ieee80211com	sc_ic;
    423 	struct rtw_regs		sc_regs;
    424 	bus_dma_tag_t		sc_dmat;
    425 	uint32_t		sc_flags;
    426 
    427 	enum rtw_attach_state	sc_attach_state;
    428 	enum rtw_rfchipid	sc_rfchipid;
    429 	enum rtw_locale		sc_locale;
    430 	uint8_t		sc_phydelay;
    431 
    432 	/* s/w Tx/Rx descriptors */
    433 	struct rtw_txsoft_blk	sc_txsoft_blk[RTW_NTXPRI];
    434 	struct rtw_txdesc_blk	sc_txdesc_blk[RTW_NTXPRI];
    435 
    436 	struct rtw_rxsoft	sc_rxsoft[RTW_RXQLEN];
    437 	struct rtw_rxdesc_blk	sc_rxdesc_blk;
    438 
    439 	struct rtw_descs	*sc_descs;
    440 
    441 	bus_dma_segment_t	sc_desc_segs;
    442 	int			sc_desc_nsegs;
    443 	bus_dmamap_t		sc_desc_dmamap;
    444 #define	sc_desc_physaddr sc_desc_dmamap->dm_segs[0].ds_addr
    445 
    446 	struct rtw_srom		sc_srom;
    447 
    448 	enum rtw_pwrstate	sc_pwrstate;
    449 
    450 	rtw_pwrstate_t		sc_pwrstate_cb;
    451 
    452 	struct rtw_rf		*sc_rf;
    453 
    454 	uint16_t		sc_inten;
    455 
    456 	/* interrupt acknowledge hook */
    457 	void (*sc_intr_ack)(struct rtw_regs *);
    458 
    459 	struct rtw_mtbl		sc_mtbl;
    460 
    461 	struct bpf_if *		sc_radiobpf;
    462 
    463 	struct callout		sc_scan_ch;
    464 	u_int			sc_cur_chan;
    465 
    466 	uint32_t		sc_tsfth;	/* most significant TSFT bits */
    467 	uint32_t		sc_rcr;		/* RTW_RCR */
    468 	uint8_t		sc_csthr;	/* carrier-sense threshold */
    469 
    470 	int			sc_do_tick;	/* indicate 1s ticks */
    471 	struct timeval		sc_tick0;	/* first tick */
    472 
    473 	uint8_t			sc_rev;		/* PCI/Cardbus revision */
    474 
    475 	uint32_t		sc_anaparm;	/* register RTW_ANAPARM */
    476 
    477 	union {
    478 		struct rtw_rx_radiotap_header	tap;
    479 		uint8_t			pad[64];
    480 	} sc_rxtapu;
    481 	union {
    482 		struct rtw_tx_radiotap_header	tap;
    483 		uint8_t			pad[64];
    484 	} sc_txtapu;
    485 	union rtw_keys		sc_keys;
    486 	struct ifqueue		sc_beaconq;
    487 	struct rtw_led_state	sc_led_state;
    488 	int			sc_hwverid;
    489 };
    490 
    491 #define	sc_if		sc_ec.ec_if
    492 #define sc_rxtap	sc_rxtapu.tap
    493 #define sc_txtap	sc_txtapu.tap
    494 
    495 void rtw_txdac_enable(struct rtw_softc *, int);
    496 void rtw_anaparm_enable(struct rtw_regs *, int);
    497 void rtw_config0123_enable(struct rtw_regs *, int);
    498 void rtw_continuous_tx_enable(struct rtw_softc *, int);
    499 void rtw_set_access(struct rtw_regs *, enum rtw_access);
    500 
    501 void rtw_attach(struct rtw_softc *);
    502 int rtw_detach(struct rtw_softc *);
    503 int rtw_intr(void *);
    504 
    505 bool rtw_suspend(device_t, pmf_qual_t);
    506 bool rtw_resume(device_t, pmf_qual_t);
    507 
    508 int rtw_activate(device_t, enum devact);
    509 
    510 const char *rtw_pwrstate_string(enum rtw_pwrstate);
    511 
    512 #endif /* _DEV_IC_RTWVAR_H_ */
    513