rtwvar.h revision 1.8
1 /* $NetBSD: rtwvar.h,v 1.8 2004/12/25 06:58:37 dyoung Exp $ */ 2 /*- 3 * Copyright (c) 2004, 2005 David Young. All rights reserved. 4 * 5 * Driver for the Realtek RTL8180 802.11 MAC/BBP by David Young. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. The name of David Young may not be used to endorse or promote 16 * products derived from this software without specific prior 17 * written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 20 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 22 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 23 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 25 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 27 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 28 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 30 * OF SUCH DAMAGE. 31 */ 32 33 #ifndef _DEV_IC_RTWVAR_H_ 34 #define _DEV_IC_RTWVAR_H_ 35 36 #include <sys/queue.h> 37 #include <sys/callout.h> 38 39 #ifdef RTW_DEBUG 40 #define RTW_DEBUG_TUNE 0x00001 41 #define RTW_DEBUG_PKTFILT 0x00002 42 #define RTW_DEBUG_XMIT 0x00004 43 #define RTW_DEBUG_XMIT_DESC 0x00008 44 #define RTW_DEBUG_NODE 0x00010 45 #define RTW_DEBUG_PWR 0x00020 46 #define RTW_DEBUG_ATTACH 0x00040 47 #define RTW_DEBUG_REGDUMP 0x00080 48 #define RTW_DEBUG_ACCESS 0x00100 49 #define RTW_DEBUG_RESET 0x00200 50 #define RTW_DEBUG_INIT 0x00400 51 #define RTW_DEBUG_IOSTATE 0x00800 52 #define RTW_DEBUG_RECV 0x01000 53 #define RTW_DEBUG_RECV_DESC 0x02000 54 #define RTW_DEBUG_IO_KICK 0x04000 55 #define RTW_DEBUG_INTR 0x08000 56 #define RTW_DEBUG_PHY 0x10000 57 #define RTW_DEBUG_PHYIO 0x20000 58 #define RTW_DEBUG_PHYBITIO 0x40000 59 #define RTW_DEBUG_TIMEOUT 0x80000 60 61 #define RTW_DEBUG_MAX 0x7ffff 62 63 extern int rtw_debug; 64 #define RTW_DPRINTF(__flags, __x) \ 65 if ((rtw_debug & (__flags)) != 0) printf __x 66 #define DPRINTF(__sc, __flags, __x) \ 67 if (((__sc)->sc_ic.ic_if.if_flags & IFF_DEBUG) != 0) \ 68 RTW_DPRINTF(__flags, __x) 69 #else /* RTW_DEBUG */ 70 #define RTW_DPRINTF(__x) 71 #define DPRINTF(__sc, __x) 72 #endif /* RTW_DEBUG */ 73 74 #if 0 75 enum rtw_rftype { 76 RTW_RFTYPE_INTERSIL = 0, 77 RTW_RFTYPE_RFMD, 78 RTW_RFTYPE_PHILIPS, 79 RTW_RFTYPE_MAXIM 80 }; 81 #endif 82 83 enum rtw_locale { 84 RTW_LOCALE_USA = 0, 85 RTW_LOCALE_EUROPE, 86 RTW_LOCALE_JAPAN, 87 RTW_LOCALE_UNKNOWN 88 }; 89 90 enum rtw_rfchipid { 91 RTW_RFCHIPID_RESERVED = 0, 92 RTW_RFCHIPID_INTERSIL = 1, 93 RTW_RFCHIPID_RFMD = 2, 94 RTW_RFCHIPID_PHILIPS = 3, 95 RTW_RFCHIPID_MAXIM = 4, 96 RTW_RFCHIPID_GCT = 5 97 }; 98 99 /* sc_flags */ 100 #define RTW_F_ENABLED 0x00000001 /* chip is enabled */ 101 #define RTW_F_DIGPHY 0x00000002 /* digital PHY */ 102 #define RTW_F_DFLANTB 0x00000004 /* B antenna is default */ 103 #define RTW_F_ANTDIV 0x00000010 /* h/w antenna diversity */ 104 #define RTW_F_9356SROM 0x00000020 /* 93c56 SROM */ 105 #define RTW_F_SLEEP 0x00000040 /* chip is asleep */ 106 #define RTW_F_INVALID 0x00000080 /* chip is absent */ 107 /* all PHY flags */ 108 #define RTW_F_ALLPHY (RTW_F_DIGPHY|RTW_F_DFLANTB|RTW_F_ANTDIV) 109 110 struct rtw_regs { 111 bus_space_tag_t r_bt; 112 bus_space_handle_t r_bh; 113 }; 114 115 #define RTW_SR_GET(sr, ofs) \ 116 (((sr)->sr_content[(ofs)/2] >> (((ofs) % 2 == 0) ? 0 : 8)) & 0xff) 117 118 #define RTW_SR_GET16(sr, ofs) \ 119 (RTW_SR_GET((sr), (ofs)) | (RTW_SR_GET((sr), (ofs) + 1) << 8)) 120 121 struct rtw_srom { 122 u_int16_t *sr_content; 123 u_int16_t sr_size; 124 }; 125 126 struct rtw_rxctl { 127 struct mbuf *srx_mbuf; 128 bus_dmamap_t srx_dmamap; 129 }; 130 131 struct rtw_txctl { 132 SIMPLEQ_ENTRY(rtw_txctl) stx_q; 133 struct mbuf *stx_mbuf; 134 bus_dmamap_t stx_dmamap; 135 struct ieee80211_node *stx_ni; /* destination node */ 136 u_int stx_first; /* 1st hw descriptor */ 137 u_int stx_last; /* last hw descriptor */ 138 struct ieee80211_duration stx_d0; 139 struct ieee80211_duration stx_dn; 140 }; 141 142 #define RTW_NTXPRI 4 /* number of Tx priorities */ 143 #define RTW_TXPRILO 0 144 #define RTW_TXPRIMD 1 145 #define RTW_TXPRIHI 2 146 #define RTW_TXPRIBCN 3 /* beacon priority */ 147 148 #define RTW_MAXPKTSEGS 64 /* Max 64 segments per Tx packet */ 149 150 #define CASSERT(cond, complaint) complaint[(cond) ? 0 : -1] = complaint[(cond) ? 0 : -1] 151 152 /* Note well: the descriptor rings must begin on RTW_DESC_ALIGNMENT 153 * boundaries. I allocate them consecutively from one buffer, so 154 * just round up. 155 */ 156 #define RTW_TXQLENLO 64 /* low-priority queue length */ 157 #define RTW_TXQLENMD 64 /* medium-priority */ 158 #define RTW_TXQLENHI 64 /* high-priority */ 159 #define RTW_TXQLENBCN 1 /* beacon */ 160 161 #define RTW_NTXDESCLO RTW_TXQLENLO 162 #define RTW_NTXDESCMD RTW_TXQLENMD 163 #define RTW_NTXDESCHI RTW_TXQLENHI 164 #define RTW_NTXDESCBCN RTW_TXQLENBCN 165 166 #define RTW_NTXDESCTOTAL (RTW_NTXDESCLO + RTW_NTXDESCMD + \ 167 RTW_NTXDESCHI + RTW_NTXDESCBCN) 168 169 #define RTW_RXQLEN 64 170 171 struct rtw_txdesc_blk { 172 u_int htc_ndesc; 173 u_int htc_next; 174 u_int htc_nfree; 175 bus_addr_t htc_physbase; 176 bus_addr_t htc_ofs; 177 struct rtw_txdesc *htc_desc; 178 }; 179 180 #define RTW_NEXT_IDX(__htc, __idx) (((__idx) + 1) % (__htc)->htc_ndesc) 181 182 #define RTW_NEXT_DESC(__htc, __idx) \ 183 ((__htc)->htc_physbase + \ 184 sizeof(struct rtw_txdesc) * RTW_NEXT_IDX((__htc), (__idx))) 185 186 SIMPLEQ_HEAD(rtw_txq, rtw_txctl); 187 188 struct rtw_txctl_blk { 189 /* dirty/free s/w descriptors */ 190 struct rtw_txq stc_dirtyq; 191 struct rtw_txq stc_freeq; 192 u_int stc_ndesc; 193 int stc_tx_timer; 194 struct rtw_txctl *stc_desc; 195 }; 196 197 struct rtw_descs { 198 struct rtw_txdesc hd_txlo[RTW_NTXDESCLO]; 199 struct rtw_txdesc hd_txmd[RTW_NTXDESCMD]; 200 struct rtw_txdesc hd_txhi[RTW_NTXDESCMD]; 201 struct rtw_rxdesc hd_rx[RTW_RXQLEN]; 202 struct rtw_txdesc hd_bcn[RTW_NTXDESCBCN]; 203 }; 204 #define RTW_DESC_OFFSET(ring, i) offsetof(struct rtw_descs, ring[i]) 205 #define RTW_RING_OFFSET(ring) RTW_DESC_OFFSET(ring, 0) 206 #define RTW_RING_BASE(sc, ring) ((sc)->sc_desc_physaddr + \ 207 RTW_RING_OFFSET(ring)) 208 209 /* Radio capture format for RTL8180. */ 210 211 #define RTW_RX_RADIOTAP_PRESENT \ 212 ((1 << IEEE80211_RADIOTAP_FLAGS) | (1 << IEEE80211_RADIOTAP_RATE) | \ 213 (1 << IEEE80211_RADIOTAP_CHANNEL) | \ 214 (1 << IEEE80211_RADIOTAP_DB_ANTSIGNAL)) 215 216 struct rtw_rx_radiotap_header { 217 struct ieee80211_radiotap_header rr_ihdr; 218 u_int8_t rr_flags; 219 u_int8_t rr_rate; 220 u_int16_t rr_chan_freq; 221 u_int16_t rr_chan_flags; 222 u_int8_t rr_antsignal; 223 } __attribute__((__packed__)); 224 225 #define RTW_TX_RADIOTAP_PRESENT ((1 << IEEE80211_RADIOTAP_FLAGS) | \ 226 (1 << IEEE80211_RADIOTAP_RATE) | \ 227 (1 << IEEE80211_RADIOTAP_CHANNEL)) 228 229 struct rtw_tx_radiotap_header { 230 struct ieee80211_radiotap_header rt_ihdr; 231 u_int8_t rt_flags; 232 u_int8_t rt_rate; 233 u_int16_t rt_chan_freq; 234 u_int16_t rt_chan_flags; 235 } __attribute__((__packed__)); 236 237 enum rtw_attach_state {FINISHED, FINISH_DESCMAP_LOAD, FINISH_DESCMAP_CREATE, 238 FINISH_DESC_MAP, FINISH_DESC_ALLOC, FINISH_RXMAPS_CREATE, 239 FINISH_TXMAPS_CREATE, FINISH_RESET, FINISH_READ_SROM, FINISH_PARSE_SROM, 240 FINISH_RF_ATTACH, FINISH_ID_STA, FINISH_TXDESCBLK_SETUP, 241 FINISH_TXCTLBLK_SETUP, DETACHED}; 242 243 struct rtw_hooks { 244 void *rh_shutdown; /* shutdown hook */ 245 void *rh_power; /* power management hook */ 246 }; 247 248 struct rtw_mtbl { 249 int (*mt_newstate)(struct ieee80211com *, 250 enum ieee80211_state, int); 251 void (*mt_recv_mgmt)(struct ieee80211com *, 252 struct mbuf *, struct ieee80211_node *, 253 int, int, u_int32_t); 254 struct ieee80211_node *(*mt_node_alloc)(struct ieee80211com *); 255 void (*mt_node_free)(struct ieee80211com *, 256 struct ieee80211_node *); 257 }; 258 259 enum rtw_pwrstate { RTW_OFF = 0, RTW_SLEEP, RTW_ON }; 260 261 typedef void (*rtw_continuous_tx_cb_t)(void *arg, int); 262 263 struct rtw_phy { 264 struct rtw_rf *p_rf; 265 struct rtw_regs *p_regs; 266 }; 267 268 struct rtw_bbpset { 269 u_int bb_antatten; 270 u_int bb_chestlim; 271 u_int bb_chsqlim; 272 u_int bb_ifagcdet; 273 u_int bb_ifagcini; 274 u_int bb_ifagclimit; 275 u_int bb_lnadet; 276 u_int bb_sys1; 277 u_int bb_sys2; 278 u_int bb_sys3; 279 u_int bb_trl; 280 u_int bb_txagc; 281 }; 282 283 struct rtw_rf { 284 void (*rf_destroy)(struct rtw_rf *); 285 /* args: frequency, txpower, power state */ 286 int (*rf_init)(struct rtw_rf *, u_int, u_int8_t, 287 enum rtw_pwrstate); 288 /* arg: power state */ 289 int (*rf_pwrstate)(struct rtw_rf *, enum rtw_pwrstate); 290 /* arg: frequency */ 291 int (*rf_tune)(struct rtw_rf *, u_int); 292 /* arg: txpower */ 293 int (*rf_txpower)(struct rtw_rf *, u_int8_t); 294 rtw_continuous_tx_cb_t rf_continuous_tx_cb; 295 void *rf_continuous_tx_arg; 296 struct rtw_bbpset rf_bbpset; 297 }; 298 299 static __inline void 300 rtw_rf_destroy(struct rtw_rf *rf) 301 { 302 (*rf->rf_destroy)(rf); 303 } 304 305 static __inline int 306 rtw_rf_init(struct rtw_rf *rf, u_int freq, u_int8_t opaque_txpower, 307 enum rtw_pwrstate power) 308 { 309 return (*rf->rf_init)(rf, freq, opaque_txpower, power); 310 } 311 312 static __inline int 313 rtw_rf_pwrstate(struct rtw_rf *rf, enum rtw_pwrstate power) 314 { 315 return (*rf->rf_pwrstate)(rf, power); 316 } 317 318 static __inline int 319 rtw_rf_tune(struct rtw_rf *rf, u_int freq) 320 { 321 return (*rf->rf_tune)(rf, freq); 322 } 323 324 static __inline int 325 rtw_rf_txpower(struct rtw_rf *rf, u_int8_t opaque_txpower) 326 { 327 return (*rf->rf_txpower)(rf, opaque_txpower); 328 } 329 330 typedef int (*rtw_rf_write_t)(struct rtw_regs *, enum rtw_rfchipid, u_int, 331 u_int32_t); 332 333 struct rtw_rfbus { 334 struct rtw_regs *b_regs; 335 rtw_rf_write_t b_write; 336 }; 337 338 static __inline int 339 rtw_rfbus_write(struct rtw_rfbus *bus, enum rtw_rfchipid rfchipid, u_int addr, 340 u_int32_t val) 341 { 342 return (*bus->b_write)(bus->b_regs, rfchipid, addr, val); 343 } 344 345 struct rtw_max2820 { 346 struct rtw_rf mx_rf; 347 struct rtw_rfbus mx_bus; 348 int mx_is_a; /* 1: MAX2820A/MAX2821A */ 349 }; 350 351 struct rtw_sa2400 { 352 struct rtw_rf sa_rf; 353 struct rtw_rfbus sa_bus; 354 int sa_digphy; /* 1: digital PHY */ 355 }; 356 357 typedef void (*rtw_pwrstate_t)(struct rtw_regs *, enum rtw_pwrstate, int, int); 358 359 enum rtw_access {RTW_ACCESS_NONE = 0, 360 RTW_ACCESS_CONFIG = 1, 361 RTW_ACCESS_ANAPARM = 2}; 362 363 struct rtw_softc { 364 struct device sc_dev; 365 struct ieee80211com sc_ic; 366 struct rtw_regs sc_regs; 367 bus_dma_tag_t sc_dmat; 368 u_int32_t sc_flags; 369 370 #if 0 371 enum rtw_rftype sc_rftype; 372 #endif 373 enum rtw_attach_state sc_attach_state; 374 enum rtw_rfchipid sc_rfchipid; 375 enum rtw_locale sc_locale; 376 u_int8_t sc_phydelay; 377 378 /* s/w Tx/Rx descriptors */ 379 struct rtw_txctl_blk sc_txctl_blk[RTW_NTXPRI]; 380 struct rtw_rxctl sc_rxctl[RTW_RXQLEN]; 381 u_int sc_txq; 382 u_int sc_txnext; 383 384 struct rtw_txdesc_blk sc_txdesc_blk[RTW_NTXPRI]; 385 struct rtw_rxdesc *sc_rxdesc; 386 u_int sc_rxnext; 387 388 struct rtw_descs *sc_descs; 389 390 bus_dma_segment_t sc_desc_segs; 391 int sc_desc_nsegs; 392 bus_dmamap_t sc_desc_dmamap; 393 #define sc_desc_physaddr sc_desc_dmamap->dm_segs[0].ds_addr 394 395 struct rtw_srom sc_srom; 396 397 enum rtw_pwrstate sc_pwrstate; 398 399 rtw_pwrstate_t sc_pwrstate_cb; 400 401 struct rtw_rf *sc_rf; 402 403 u_int16_t sc_inten; 404 405 /* interrupt acknowledge hook */ 406 void (*sc_intr_ack) __P((struct rtw_regs *)); 407 408 int (*sc_enable)(struct rtw_softc *); 409 void (*sc_disable)(struct rtw_softc *); 410 void (*sc_power)(struct rtw_softc *, int); 411 struct rtw_mtbl sc_mtbl; 412 struct rtw_hooks sc_hooks; 413 414 caddr_t sc_radiobpf; 415 416 struct callout sc_scan_ch; 417 u_int sc_cur_chan; 418 419 u_int32_t sc_tsfth; /* most significant TSFT bits */ 420 u_int32_t sc_rcr; /* RTW_RCR */ 421 u_int8_t sc_csthr; /* carrier-sense threshold */ 422 423 int sc_do_tick; /* indicate 1s ticks */ 424 struct timeval sc_tick0; /* first tick */ 425 426 uint8_t sc_rev; /* PCI/Cardbus revision */ 427 428 uint32_t sc_anaparm; /* register RTW_ANAPARM */ 429 430 union { 431 struct rtw_rx_radiotap_header tap; 432 u_int8_t pad[64]; 433 } sc_rxtapu; 434 union { 435 struct rtw_tx_radiotap_header tap; 436 u_int8_t pad[64]; 437 } sc_txtapu; 438 enum rtw_access sc_access; 439 }; 440 441 #define sc_if sc_ic.ic_if 442 #define sc_rxtap sc_rxtapu.tap 443 #define sc_txtap sc_txtapu.tap 444 445 extern int rtw_host_rfio; 446 extern int rtw_flush_rfio; 447 extern int rtw_rfio_delay; 448 449 void rtw_txdac_enable(struct rtw_softc *, int); 450 void rtw_anaparm_enable(struct rtw_regs *, int); 451 void rtw_config0123_enable(struct rtw_regs *, int); 452 void rtw_continuous_tx_enable(struct rtw_softc *, int); 453 void rtw_set_access(struct rtw_softc *, enum rtw_access); 454 455 void rtw_attach(struct rtw_softc *); 456 int rtw_detach(struct rtw_softc *); 457 int rtw_intr(void *); 458 459 void rtw_disable(struct rtw_softc *); 460 int rtw_enable(struct rtw_softc *); 461 462 int rtw_activate(struct device *, enum devact); 463 void rtw_power(int, void *); 464 void rtw_shutdown(void *); 465 466 const char *rtw_pwrstate_string(enum rtw_pwrstate); 467 468 #endif /* _DEV_IC_RTWVAR_H_ */ 469
Indexes created Thu Sep 25 16:09:42 GMT 2025