sgec.c revision 1.29 1 1.29 matt /* $NetBSD: sgec.c,v 1.29 2007/04/13 04:16:45 matt Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1999 Ludd, University of Lule}, Sweden. All rights reserved.
4 1.1 ragge *
5 1.1 ragge * Redistribution and use in source and binary forms, with or without
6 1.1 ragge * modification, are permitted provided that the following conditions
7 1.1 ragge * are met:
8 1.1 ragge * 1. Redistributions of source code must retain the above copyright
9 1.1 ragge * notice, this list of conditions and the following disclaimer.
10 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
11 1.1 ragge * notice, this list of conditions and the following disclaimer in the
12 1.1 ragge * documentation and/or other materials provided with the distribution.
13 1.1 ragge * 3. All advertising materials mentioning features or use of this software
14 1.1 ragge * must display the following acknowledgement:
15 1.26 perry * This product includes software developed at Ludd, University of
16 1.1 ragge * Lule}, Sweden and its contributors.
17 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
18 1.1 ragge * derived from this software without specific prior written permission
19 1.1 ragge *
20 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 ragge */
31 1.1 ragge
32 1.1 ragge /*
33 1.1 ragge * Driver for the SGEC (Second Generation Ethernet Controller), sitting
34 1.26 perry * on for example the VAX 4000/300 (KA670).
35 1.1 ragge *
36 1.1 ragge * The SGEC looks like a mixture of the DEQNA and the TULIP. Fun toy.
37 1.1 ragge *
38 1.1 ragge * Even though the chip is capable to use virtual addresses (read the
39 1.1 ragge * System Page Table directly) this driver doesn't do so, and there
40 1.1 ragge * is no benefit in doing it either in NetBSD of today.
41 1.1 ragge *
42 1.1 ragge * Things that is still to do:
43 1.1 ragge * Collect statistics.
44 1.1 ragge * Use imperfect filtering when many multicast addresses.
45 1.1 ragge */
46 1.18 lukem
47 1.18 lukem #include <sys/cdefs.h>
48 1.29 matt __KERNEL_RCSID(0, "$NetBSD: sgec.c,v 1.29 2007/04/13 04:16:45 matt Exp $");
49 1.1 ragge
50 1.1 ragge #include "opt_inet.h"
51 1.1 ragge #include "bpfilter.h"
52 1.1 ragge
53 1.1 ragge #include <sys/param.h>
54 1.1 ragge #include <sys/mbuf.h>
55 1.1 ragge #include <sys/socket.h>
56 1.1 ragge #include <sys/device.h>
57 1.1 ragge #include <sys/systm.h>
58 1.1 ragge #include <sys/sockio.h>
59 1.1 ragge
60 1.9 thorpej #include <uvm/uvm_extern.h>
61 1.9 thorpej
62 1.1 ragge #include <net/if.h>
63 1.1 ragge #include <net/if_ether.h>
64 1.1 ragge #include <net/if_dl.h>
65 1.1 ragge
66 1.1 ragge #include <netinet/in.h>
67 1.1 ragge #include <netinet/if_inarp.h>
68 1.1 ragge
69 1.1 ragge #if NBPFILTER > 0
70 1.1 ragge #include <net/bpf.h>
71 1.1 ragge #include <net/bpfdesc.h>
72 1.1 ragge #endif
73 1.1 ragge
74 1.1 ragge #include <machine/bus.h>
75 1.1 ragge
76 1.1 ragge #include <dev/ic/sgecreg.h>
77 1.1 ragge #include <dev/ic/sgecvar.h>
78 1.1 ragge
79 1.25 perry static void zeinit(struct ze_softc *);
80 1.25 perry static void zestart(struct ifnet *);
81 1.28 christos static int zeioctl(struct ifnet *, u_long, void *);
82 1.25 perry static int ze_add_rxbuf(struct ze_softc *, int);
83 1.25 perry static void ze_setup(struct ze_softc *);
84 1.25 perry static void zetimeout(struct ifnet *);
85 1.25 perry static int zereset(struct ze_softc *);
86 1.1 ragge
87 1.1 ragge #define ZE_WCSR(csr, val) \
88 1.1 ragge bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val)
89 1.1 ragge #define ZE_RCSR(csr) \
90 1.1 ragge bus_space_read_4(sc->sc_iot, sc->sc_ioh, csr)
91 1.1 ragge
92 1.1 ragge /*
93 1.1 ragge * Interface exists: make available by filling in network interface
94 1.1 ragge * record. System will initialize the interface when it is ready
95 1.1 ragge * to accept packets.
96 1.1 ragge */
97 1.1 ragge void
98 1.1 ragge sgec_attach(sc)
99 1.1 ragge struct ze_softc *sc;
100 1.1 ragge {
101 1.1 ragge struct ifnet *ifp = (struct ifnet *)&sc->sc_if;
102 1.1 ragge struct ze_tdes *tp;
103 1.1 ragge struct ze_rdes *rp;
104 1.1 ragge bus_dma_segment_t seg;
105 1.1 ragge int i, rseg, error;
106 1.1 ragge
107 1.1 ragge /*
108 1.1 ragge * Allocate DMA safe memory for descriptors and setup memory.
109 1.1 ragge */
110 1.1 ragge if ((error = bus_dmamem_alloc(sc->sc_dmat,
111 1.9 thorpej sizeof(struct ze_cdata), PAGE_SIZE, 0, &seg, 1, &rseg,
112 1.1 ragge BUS_DMA_NOWAIT)) != 0) {
113 1.1 ragge printf(": unable to allocate control data, error = %d\n",
114 1.1 ragge error);
115 1.1 ragge goto fail_0;
116 1.1 ragge }
117 1.1 ragge
118 1.1 ragge if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
119 1.28 christos sizeof(struct ze_cdata), (void **)&sc->sc_zedata,
120 1.1 ragge BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
121 1.1 ragge printf(": unable to map control data, error = %d\n", error);
122 1.1 ragge goto fail_1;
123 1.1 ragge }
124 1.1 ragge
125 1.1 ragge if ((error = bus_dmamap_create(sc->sc_dmat,
126 1.1 ragge sizeof(struct ze_cdata), 1,
127 1.1 ragge sizeof(struct ze_cdata), 0, BUS_DMA_NOWAIT,
128 1.1 ragge &sc->sc_cmap)) != 0) {
129 1.1 ragge printf(": unable to create control data DMA map, error = %d\n",
130 1.1 ragge error);
131 1.1 ragge goto fail_2;
132 1.1 ragge }
133 1.1 ragge
134 1.1 ragge if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap,
135 1.1 ragge sc->sc_zedata, sizeof(struct ze_cdata), NULL,
136 1.1 ragge BUS_DMA_NOWAIT)) != 0) {
137 1.1 ragge printf(": unable to load control data DMA map, error = %d\n",
138 1.1 ragge error);
139 1.1 ragge goto fail_3;
140 1.1 ragge }
141 1.1 ragge
142 1.1 ragge /*
143 1.1 ragge * Zero the newly allocated memory.
144 1.1 ragge */
145 1.16 thorpej memset(sc->sc_zedata, 0, sizeof(struct ze_cdata));
146 1.1 ragge /*
147 1.1 ragge * Create the transmit descriptor DMA maps.
148 1.1 ragge */
149 1.1 ragge for (i = 0; i < TXDESCS; i++) {
150 1.1 ragge if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
151 1.29 matt TXDESCS - 1, MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
152 1.1 ragge &sc->sc_xmtmap[i]))) {
153 1.1 ragge printf(": unable to create tx DMA map %d, error = %d\n",
154 1.1 ragge i, error);
155 1.1 ragge goto fail_4;
156 1.1 ragge }
157 1.1 ragge }
158 1.1 ragge
159 1.1 ragge /*
160 1.1 ragge * Create receive buffer DMA maps.
161 1.1 ragge */
162 1.1 ragge for (i = 0; i < RXDESCS; i++) {
163 1.1 ragge if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
164 1.1 ragge MCLBYTES, 0, BUS_DMA_NOWAIT,
165 1.1 ragge &sc->sc_rcvmap[i]))) {
166 1.1 ragge printf(": unable to create rx DMA map %d, error = %d\n",
167 1.1 ragge i, error);
168 1.1 ragge goto fail_5;
169 1.1 ragge }
170 1.1 ragge }
171 1.1 ragge /*
172 1.1 ragge * Pre-allocate the receive buffers.
173 1.1 ragge */
174 1.1 ragge for (i = 0; i < RXDESCS; i++) {
175 1.1 ragge if ((error = ze_add_rxbuf(sc, i)) != 0) {
176 1.1 ragge printf(": unable to allocate or map rx buffer %d\n,"
177 1.1 ragge " error = %d\n", i, error);
178 1.1 ragge goto fail_6;
179 1.1 ragge }
180 1.1 ragge }
181 1.5 matt
182 1.5 matt /* For vmstat -i
183 1.5 matt */
184 1.6 matt evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL,
185 1.6 matt sc->sc_dev.dv_xname, "intr");
186 1.1 ragge
187 1.1 ragge /*
188 1.1 ragge * Create ring loops of the buffer chains.
189 1.1 ragge * This is only done once.
190 1.1 ragge */
191 1.1 ragge sc->sc_pzedata = (struct ze_cdata *)sc->sc_cmap->dm_segs[0].ds_addr;
192 1.1 ragge
193 1.1 ragge rp = sc->sc_zedata->zc_recv;
194 1.1 ragge rp[RXDESCS].ze_framelen = ZE_FRAMELEN_OW;
195 1.1 ragge rp[RXDESCS].ze_rdes1 = ZE_RDES1_CA;
196 1.1 ragge rp[RXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_recv;
197 1.1 ragge
198 1.1 ragge tp = sc->sc_zedata->zc_xmit;
199 1.1 ragge tp[TXDESCS].ze_tdr = ZE_TDR_OW;
200 1.1 ragge tp[TXDESCS].ze_tdes1 = ZE_TDES1_CA;
201 1.1 ragge tp[TXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_xmit;
202 1.1 ragge
203 1.1 ragge if (zereset(sc))
204 1.1 ragge return;
205 1.1 ragge
206 1.1 ragge strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
207 1.1 ragge ifp->if_softc = sc;
208 1.1 ragge ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
209 1.1 ragge ifp->if_start = zestart;
210 1.1 ragge ifp->if_ioctl = zeioctl;
211 1.1 ragge ifp->if_watchdog = zetimeout;
212 1.11 thorpej IFQ_SET_READY(&ifp->if_snd);
213 1.1 ragge
214 1.1 ragge /*
215 1.1 ragge * Attach the interface.
216 1.1 ragge */
217 1.1 ragge if_attach(ifp);
218 1.1 ragge ether_ifattach(ifp, sc->sc_enaddr);
219 1.1 ragge
220 1.1 ragge printf("\n%s: hardware address %s\n", sc->sc_dev.dv_xname,
221 1.1 ragge ether_sprintf(sc->sc_enaddr));
222 1.1 ragge return;
223 1.1 ragge
224 1.1 ragge /*
225 1.1 ragge * Free any resources we've allocated during the failed attach
226 1.1 ragge * attempt. Do this in reverse order and fall through.
227 1.1 ragge */
228 1.1 ragge fail_6:
229 1.1 ragge for (i = 0; i < RXDESCS; i++) {
230 1.1 ragge if (sc->sc_rxmbuf[i] != NULL) {
231 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]);
232 1.1 ragge m_freem(sc->sc_rxmbuf[i]);
233 1.1 ragge }
234 1.1 ragge }
235 1.1 ragge fail_5:
236 1.1 ragge for (i = 0; i < RXDESCS; i++) {
237 1.1 ragge if (sc->sc_xmtmap[i] != NULL)
238 1.1 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]);
239 1.1 ragge }
240 1.1 ragge fail_4:
241 1.1 ragge for (i = 0; i < TXDESCS; i++) {
242 1.1 ragge if (sc->sc_rcvmap[i] != NULL)
243 1.1 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]);
244 1.1 ragge }
245 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_cmap);
246 1.1 ragge fail_3:
247 1.1 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap);
248 1.1 ragge fail_2:
249 1.28 christos bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_zedata,
250 1.1 ragge sizeof(struct ze_cdata));
251 1.1 ragge fail_1:
252 1.1 ragge bus_dmamem_free(sc->sc_dmat, &seg, rseg);
253 1.1 ragge fail_0:
254 1.1 ragge return;
255 1.1 ragge }
256 1.1 ragge
257 1.1 ragge /*
258 1.1 ragge * Initialization of interface.
259 1.1 ragge */
260 1.1 ragge void
261 1.1 ragge zeinit(sc)
262 1.1 ragge struct ze_softc *sc;
263 1.1 ragge {
264 1.1 ragge struct ifnet *ifp = (struct ifnet *)&sc->sc_if;
265 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
266 1.1 ragge int i;
267 1.1 ragge
268 1.1 ragge /*
269 1.1 ragge * Reset the interface.
270 1.1 ragge */
271 1.1 ragge if (zereset(sc))
272 1.1 ragge return;
273 1.1 ragge
274 1.1 ragge sc->sc_nexttx = sc->sc_inq = sc->sc_lastack = 0;
275 1.1 ragge /*
276 1.1 ragge * Release and init transmit descriptors.
277 1.1 ragge */
278 1.1 ragge for (i = 0; i < TXDESCS; i++) {
279 1.29 matt if (sc->sc_xmtmap[i]->dm_nsegs > 0)
280 1.29 matt bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]);
281 1.1 ragge if (sc->sc_txmbuf[i]) {
282 1.1 ragge m_freem(sc->sc_txmbuf[i]);
283 1.1 ragge sc->sc_txmbuf[i] = 0;
284 1.1 ragge }
285 1.1 ragge zc->zc_xmit[i].ze_tdr = 0; /* Clear valid bit */
286 1.1 ragge }
287 1.1 ragge
288 1.1 ragge
289 1.1 ragge /*
290 1.1 ragge * Init receive descriptors.
291 1.1 ragge */
292 1.1 ragge for (i = 0; i < RXDESCS; i++)
293 1.1 ragge zc->zc_recv[i].ze_framelen = ZE_FRAMELEN_OW;
294 1.1 ragge sc->sc_nextrx = 0;
295 1.1 ragge
296 1.1 ragge ZE_WCSR(ZE_CSR6, ZE_NICSR6_IE|ZE_NICSR6_BL_8|ZE_NICSR6_ST|
297 1.1 ragge ZE_NICSR6_SR|ZE_NICSR6_DC);
298 1.1 ragge
299 1.1 ragge ifp->if_flags |= IFF_RUNNING;
300 1.1 ragge ifp->if_flags &= ~IFF_OACTIVE;
301 1.1 ragge
302 1.1 ragge /*
303 1.1 ragge * Send a setup frame.
304 1.1 ragge * This will start the transmit machinery as well.
305 1.1 ragge */
306 1.1 ragge ze_setup(sc);
307 1.1 ragge
308 1.1 ragge }
309 1.1 ragge
310 1.1 ragge /*
311 1.1 ragge * Start output on interface.
312 1.1 ragge */
313 1.1 ragge void
314 1.1 ragge zestart(ifp)
315 1.1 ragge struct ifnet *ifp;
316 1.1 ragge {
317 1.1 ragge struct ze_softc *sc = ifp->if_softc;
318 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
319 1.1 ragge paddr_t buffer;
320 1.29 matt struct mbuf *m;
321 1.29 matt int nexttx, len, i, totlen, error;
322 1.4 matt int old_inq = sc->sc_inq;
323 1.1 ragge short orword;
324 1.29 matt bus_dmamap_t map;
325 1.1 ragge
326 1.1 ragge while (sc->sc_inq < (TXDESCS - 1)) {
327 1.1 ragge
328 1.1 ragge if (sc->sc_setup) {
329 1.1 ragge ze_setup(sc);
330 1.1 ragge continue;
331 1.1 ragge }
332 1.29 matt nexttx = sc->sc_nexttx;
333 1.11 thorpej IFQ_POLL(&sc->sc_if.if_snd, m);
334 1.1 ragge if (m == 0)
335 1.1 ragge goto out;
336 1.1 ragge /*
337 1.1 ragge * Count number of mbufs in chain.
338 1.1 ragge * Always do DMA directly from mbufs, therefore the transmit
339 1.1 ragge * ring is really big.
340 1.1 ragge */
341 1.29 matt map = sc->sc_xmtmap[nexttx];
342 1.29 matt error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m,
343 1.29 matt BUS_DMA_WRITE);
344 1.29 matt if (error) {
345 1.29 matt printf("zestart: load_mbuf failed: %d", error);
346 1.29 matt goto out;
347 1.29 matt }
348 1.29 matt
349 1.29 matt if (map->dm_nsegs >= TXDESCS)
350 1.1 ragge panic("zestart"); /* XXX */
351 1.1 ragge
352 1.29 matt if ((map->dm_nsegs + sc->sc_inq) >= (TXDESCS - 1)) {
353 1.29 matt bus_dmamap_unload(sc->sc_dmat, map);
354 1.1 ragge ifp->if_flags |= IFF_OACTIVE;
355 1.1 ragge goto out;
356 1.1 ragge }
357 1.26 perry
358 1.1 ragge /*
359 1.1 ragge * m now points to a mbuf chain that can be loaded.
360 1.1 ragge * Loop around and set it.
361 1.1 ragge */
362 1.1 ragge totlen = 0;
363 1.29 matt orword = ZE_TDES1_FS;
364 1.29 matt for (i = 0; i < map->dm_nsegs; i++) {
365 1.29 matt buffer = map->dm_segs[i].ds_addr;
366 1.29 matt len = map->dm_segs[i].ds_len;
367 1.29 matt
368 1.1 ragge if (len == 0)
369 1.1 ragge continue;
370 1.1 ragge
371 1.1 ragge totlen += len;
372 1.1 ragge /* Word alignment calc */
373 1.1 ragge if (totlen == m->m_pkthdr.len) {
374 1.29 matt orword |= ZE_TDES1_LS | ZE_TDES1_IC;
375 1.29 matt sc->sc_txmbuf[nexttx] = m;
376 1.1 ragge }
377 1.29 matt zc->zc_xmit[nexttx].ze_bufsize = len;
378 1.29 matt zc->zc_xmit[nexttx].ze_bufaddr = (char *)buffer;
379 1.29 matt zc->zc_xmit[nexttx].ze_tdes1 = orword;
380 1.29 matt zc->zc_xmit[nexttx].ze_tdr = ZE_TDR_OW;
381 1.29 matt
382 1.29 matt if (++nexttx == TXDESCS)
383 1.29 matt nexttx = 0;
384 1.29 matt orword = 0;
385 1.1 ragge }
386 1.29 matt
387 1.29 matt sc->sc_inq += map->dm_nsegs;
388 1.29 matt
389 1.11 thorpej IFQ_DEQUEUE(&ifp->if_snd, m);
390 1.1 ragge #ifdef DIAGNOSTIC
391 1.1 ragge if (totlen != m->m_pkthdr.len)
392 1.1 ragge panic("zestart: len fault");
393 1.1 ragge #endif
394 1.1 ragge
395 1.1 ragge /*
396 1.1 ragge * Kick off the transmit logic, if it is stopped.
397 1.1 ragge */
398 1.1 ragge if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN)
399 1.1 ragge ZE_WCSR(ZE_CSR1, -1);
400 1.29 matt sc->sc_nexttx = nexttx;
401 1.1 ragge }
402 1.1 ragge if (sc->sc_inq == (TXDESCS - 1))
403 1.1 ragge ifp->if_flags |= IFF_OACTIVE;
404 1.1 ragge
405 1.4 matt out: if (old_inq < sc->sc_inq)
406 1.1 ragge ifp->if_timer = 5; /* If transmit logic dies */
407 1.1 ragge }
408 1.1 ragge
409 1.1 ragge int
410 1.1 ragge sgec_intr(sc)
411 1.1 ragge struct ze_softc *sc;
412 1.1 ragge {
413 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
414 1.1 ragge struct ifnet *ifp = &sc->sc_if;
415 1.1 ragge struct mbuf *m;
416 1.1 ragge int csr, len;
417 1.1 ragge
418 1.1 ragge csr = ZE_RCSR(ZE_CSR5);
419 1.1 ragge if ((csr & ZE_NICSR5_IS) == 0) /* Wasn't we */
420 1.1 ragge return 0;
421 1.1 ragge ZE_WCSR(ZE_CSR5, csr);
422 1.1 ragge
423 1.24 thorpej if (csr & ZE_NICSR5_RI) {
424 1.1 ragge while ((zc->zc_recv[sc->sc_nextrx].ze_framelen &
425 1.1 ragge ZE_FRAMELEN_OW) == 0) {
426 1.1 ragge
427 1.3 matt ifp->if_ipackets++;
428 1.1 ragge m = sc->sc_rxmbuf[sc->sc_nextrx];
429 1.1 ragge len = zc->zc_recv[sc->sc_nextrx].ze_framelen;
430 1.1 ragge ze_add_rxbuf(sc, sc->sc_nextrx);
431 1.1 ragge if (++sc->sc_nextrx == RXDESCS)
432 1.1 ragge sc->sc_nextrx = 0;
433 1.24 thorpej if (len < ETHER_MIN_LEN) {
434 1.24 thorpej ifp->if_ierrors++;
435 1.24 thorpej m_freem(m);
436 1.24 thorpej } else {
437 1.24 thorpej m->m_pkthdr.rcvif = ifp;
438 1.24 thorpej m->m_pkthdr.len = m->m_len =
439 1.24 thorpej len - ETHER_CRC_LEN;
440 1.1 ragge #if NBPFILTER > 0
441 1.24 thorpej if (ifp->if_bpf)
442 1.24 thorpej bpf_mtap(ifp->if_bpf, m);
443 1.1 ragge #endif
444 1.24 thorpej (*ifp->if_input)(ifp, m);
445 1.24 thorpej }
446 1.1 ragge }
447 1.24 thorpej }
448 1.1 ragge
449 1.1 ragge if (csr & ZE_NICSR5_TI) {
450 1.29 matt int lastack = sc->sc_lastack;
451 1.29 matt while ((zc->zc_xmit[lastack].ze_tdr & ZE_TDR_OW) == 0) {
452 1.29 matt bus_dmamap_t map;
453 1.29 matt int nlastack;
454 1.1 ragge
455 1.29 matt if (lastack == sc->sc_nexttx)
456 1.1 ragge break;
457 1.1 ragge
458 1.29 matt if ((zc->zc_xmit[lastack].ze_tdes1 & ZE_TDES1_DT) ==
459 1.29 matt ZE_TDES1_DT_SETUP) {
460 1.29 matt if (++lastack == TXDESCS)
461 1.29 matt lastack = 0;
462 1.29 matt sc->sc_inq--;
463 1.1 ragge continue;
464 1.1 ragge }
465 1.29 matt
466 1.29 matt KASSERT(zc->zc_xmit[lastack].ze_tdes1 & ZE_TDES1_FS);
467 1.29 matt map = sc->sc_xmtmap[lastack];
468 1.29 matt KASSERT(map->dm_nsegs > 0);
469 1.29 matt nlastack = (lastack + map->dm_nsegs - 1) % TXDESCS;
470 1.29 matt if (zc->zc_xmit[nlastack].ze_tdr & ZE_TDR_OW)
471 1.29 matt break;
472 1.29 matt lastack = nlastack;
473 1.29 matt sc->sc_inq -= map->dm_nsegs;
474 1.29 matt KASSERT(zc->zc_xmit[lastack].ze_tdes1 & ZE_TDES1_LS);
475 1.29 matt ifp->if_opackets++;
476 1.29 matt bus_dmamap_unload(sc->sc_dmat, map);
477 1.29 matt KASSERT(sc->sc_txmbuf[lastack]);
478 1.29 matt #if NBPFILTER > 0
479 1.29 matt if (ifp->if_bpf)
480 1.29 matt bpf_mtap(ifp->if_bpf, sc->sc_txmbuf[lastack]);
481 1.29 matt #endif
482 1.29 matt m_freem(sc->sc_txmbuf[lastack]);
483 1.29 matt sc->sc_txmbuf[lastack] = 0;
484 1.29 matt if (++lastack == TXDESCS)
485 1.29 matt lastack = 0;
486 1.1 ragge }
487 1.29 matt sc->sc_lastack = lastack;
488 1.4 matt if (sc->sc_inq == 0)
489 1.4 matt ifp->if_timer = 0;
490 1.1 ragge ifp->if_flags &= ~IFF_OACTIVE;
491 1.1 ragge zestart(ifp); /* Put in more in queue */
492 1.1 ragge }
493 1.1 ragge return 1;
494 1.1 ragge }
495 1.1 ragge
496 1.1 ragge /*
497 1.1 ragge * Process an ioctl request.
498 1.1 ragge */
499 1.1 ragge int
500 1.1 ragge zeioctl(ifp, cmd, data)
501 1.2 augustss struct ifnet *ifp;
502 1.1 ragge u_long cmd;
503 1.28 christos void *data;
504 1.1 ragge {
505 1.1 ragge struct ze_softc *sc = ifp->if_softc;
506 1.1 ragge struct ifreq *ifr = (struct ifreq *)data;
507 1.1 ragge struct ifaddr *ifa = (struct ifaddr *)data;
508 1.1 ragge int s = splnet(), error = 0;
509 1.1 ragge
510 1.1 ragge switch (cmd) {
511 1.1 ragge
512 1.1 ragge case SIOCSIFADDR:
513 1.1 ragge ifp->if_flags |= IFF_UP;
514 1.1 ragge switch(ifa->ifa_addr->sa_family) {
515 1.1 ragge #ifdef INET
516 1.1 ragge case AF_INET:
517 1.1 ragge zeinit(sc);
518 1.1 ragge arp_ifinit(ifp, ifa);
519 1.1 ragge break;
520 1.1 ragge #endif
521 1.1 ragge }
522 1.1 ragge break;
523 1.1 ragge
524 1.1 ragge case SIOCSIFFLAGS:
525 1.1 ragge if ((ifp->if_flags & IFF_UP) == 0 &&
526 1.1 ragge (ifp->if_flags & IFF_RUNNING) != 0) {
527 1.1 ragge /*
528 1.1 ragge * If interface is marked down and it is running,
529 1.1 ragge * stop it. (by disabling receive mechanism).
530 1.1 ragge */
531 1.1 ragge ZE_WCSR(ZE_CSR6, ZE_RCSR(ZE_CSR6) &
532 1.1 ragge ~(ZE_NICSR6_ST|ZE_NICSR6_SR));
533 1.1 ragge ifp->if_flags &= ~IFF_RUNNING;
534 1.1 ragge } else if ((ifp->if_flags & IFF_UP) != 0 &&
535 1.1 ragge (ifp->if_flags & IFF_RUNNING) == 0) {
536 1.1 ragge /*
537 1.1 ragge * If interface it marked up and it is stopped, then
538 1.1 ragge * start it.
539 1.1 ragge */
540 1.1 ragge zeinit(sc);
541 1.1 ragge } else if ((ifp->if_flags & IFF_UP) != 0) {
542 1.1 ragge /*
543 1.1 ragge * Send a new setup packet to match any new changes.
544 1.1 ragge * (Like IFF_PROMISC etc)
545 1.1 ragge */
546 1.1 ragge ze_setup(sc);
547 1.1 ragge }
548 1.1 ragge break;
549 1.1 ragge
550 1.1 ragge case SIOCADDMULTI:
551 1.1 ragge case SIOCDELMULTI:
552 1.1 ragge /*
553 1.1 ragge * Update our multicast list.
554 1.1 ragge */
555 1.1 ragge error = (cmd == SIOCADDMULTI) ?
556 1.1 ragge ether_addmulti(ifr, &sc->sc_ec):
557 1.1 ragge ether_delmulti(ifr, &sc->sc_ec);
558 1.1 ragge
559 1.1 ragge if (error == ENETRESET) {
560 1.1 ragge /*
561 1.1 ragge * Multicast list has changed; set the hardware filter
562 1.1 ragge * accordingly.
563 1.1 ragge */
564 1.23 thorpej if (ifp->if_flags & IFF_RUNNING)
565 1.23 thorpej ze_setup(sc);
566 1.1 ragge error = 0;
567 1.1 ragge }
568 1.1 ragge break;
569 1.1 ragge
570 1.1 ragge default:
571 1.1 ragge error = EINVAL;
572 1.1 ragge
573 1.1 ragge }
574 1.1 ragge splx(s);
575 1.1 ragge return (error);
576 1.1 ragge }
577 1.1 ragge
578 1.1 ragge /*
579 1.1 ragge * Add a receive buffer to the indicated descriptor.
580 1.1 ragge */
581 1.1 ragge int
582 1.1 ragge ze_add_rxbuf(sc, i)
583 1.1 ragge struct ze_softc *sc;
584 1.1 ragge int i;
585 1.1 ragge {
586 1.1 ragge struct mbuf *m;
587 1.1 ragge struct ze_rdes *rp;
588 1.1 ragge int error;
589 1.1 ragge
590 1.1 ragge MGETHDR(m, M_DONTWAIT, MT_DATA);
591 1.1 ragge if (m == NULL)
592 1.1 ragge return (ENOBUFS);
593 1.1 ragge
594 1.22 matt MCLAIM(m, &sc->sc_ec.ec_rx_mowner);
595 1.1 ragge MCLGET(m, M_DONTWAIT);
596 1.1 ragge if ((m->m_flags & M_EXT) == 0) {
597 1.1 ragge m_freem(m);
598 1.1 ragge return (ENOBUFS);
599 1.1 ragge }
600 1.1 ragge
601 1.1 ragge if (sc->sc_rxmbuf[i] != NULL)
602 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]);
603 1.1 ragge
604 1.1 ragge error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i],
605 1.17 thorpej m->m_ext.ext_buf, m->m_ext.ext_size, NULL,
606 1.17 thorpej BUS_DMA_READ|BUS_DMA_NOWAIT);
607 1.1 ragge if (error)
608 1.19 provos panic("%s: can't load rx DMA map %d, error = %d",
609 1.1 ragge sc->sc_dev.dv_xname, i, error);
610 1.1 ragge sc->sc_rxmbuf[i] = m;
611 1.1 ragge
612 1.1 ragge bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0,
613 1.1 ragge sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD);
614 1.1 ragge
615 1.1 ragge /*
616 1.1 ragge * We know that the mbuf cluster is page aligned. Also, be sure
617 1.1 ragge * that the IP header will be longword aligned.
618 1.1 ragge */
619 1.1 ragge m->m_data += 2;
620 1.1 ragge rp = &sc->sc_zedata->zc_recv[i];
621 1.1 ragge rp->ze_bufsize = (m->m_ext.ext_size - 2);
622 1.1 ragge rp->ze_bufaddr = (char *)sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2;
623 1.1 ragge rp->ze_framelen = ZE_FRAMELEN_OW;
624 1.1 ragge
625 1.1 ragge return (0);
626 1.1 ragge }
627 1.1 ragge
628 1.1 ragge /*
629 1.1 ragge * Create a setup packet and put in queue for sending.
630 1.1 ragge */
631 1.1 ragge void
632 1.1 ragge ze_setup(sc)
633 1.1 ragge struct ze_softc *sc;
634 1.1 ragge {
635 1.1 ragge struct ether_multi *enm;
636 1.1 ragge struct ether_multistep step;
637 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
638 1.1 ragge struct ifnet *ifp = &sc->sc_if;
639 1.1 ragge u_int8_t *enaddr = LLADDR(ifp->if_sadl);
640 1.13 ragge int j, idx, reg;
641 1.1 ragge
642 1.1 ragge if (sc->sc_inq == (TXDESCS - 1)) {
643 1.1 ragge sc->sc_setup = 1;
644 1.1 ragge return;
645 1.1 ragge }
646 1.1 ragge sc->sc_setup = 0;
647 1.1 ragge /*
648 1.1 ragge * Init the setup packet with valid info.
649 1.1 ragge */
650 1.1 ragge memset(zc->zc_setup, 0xff, sizeof(zc->zc_setup)); /* Broadcast */
651 1.15 thorpej memcpy(zc->zc_setup, enaddr, ETHER_ADDR_LEN);
652 1.1 ragge
653 1.1 ragge /*
654 1.26 perry * Multicast handling. The SGEC can handle up to 16 direct
655 1.1 ragge * ethernet addresses.
656 1.1 ragge */
657 1.1 ragge j = 16;
658 1.1 ragge ifp->if_flags &= ~IFF_ALLMULTI;
659 1.1 ragge ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
660 1.1 ragge while (enm != NULL) {
661 1.14 thorpej if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) {
662 1.1 ragge ifp->if_flags |= IFF_ALLMULTI;
663 1.1 ragge break;
664 1.1 ragge }
665 1.15 thorpej memcpy(&zc->zc_setup[j], enm->enm_addrlo, ETHER_ADDR_LEN);
666 1.1 ragge j += 8;
667 1.1 ragge ETHER_NEXT_MULTI(step, enm);
668 1.1 ragge if ((enm != NULL)&& (j == 128)) {
669 1.1 ragge ifp->if_flags |= IFF_ALLMULTI;
670 1.1 ragge break;
671 1.1 ragge }
672 1.1 ragge }
673 1.7 thorpej
674 1.7 thorpej /*
675 1.7 thorpej * ALLMULTI implies PROMISC in this driver.
676 1.7 thorpej */
677 1.7 thorpej if (ifp->if_flags & IFF_ALLMULTI)
678 1.7 thorpej ifp->if_flags |= IFF_PROMISC;
679 1.7 thorpej else if (ifp->if_pcount == 0)
680 1.7 thorpej ifp->if_flags &= ~IFF_PROMISC;
681 1.1 ragge
682 1.1 ragge /*
683 1.1 ragge * Fiddle with the receive logic.
684 1.1 ragge */
685 1.1 ragge reg = ZE_RCSR(ZE_CSR6);
686 1.1 ragge DELAY(10);
687 1.1 ragge ZE_WCSR(ZE_CSR6, reg & ~ZE_NICSR6_SR); /* Stop rx */
688 1.1 ragge reg &= ~ZE_NICSR6_AF;
689 1.1 ragge if (ifp->if_flags & IFF_PROMISC)
690 1.1 ragge reg |= ZE_NICSR6_AF_PROM;
691 1.1 ragge else if (ifp->if_flags & IFF_ALLMULTI)
692 1.1 ragge reg |= ZE_NICSR6_AF_ALLM;
693 1.1 ragge DELAY(10);
694 1.1 ragge ZE_WCSR(ZE_CSR6, reg);
695 1.1 ragge /*
696 1.1 ragge * Only send a setup packet if needed.
697 1.1 ragge */
698 1.1 ragge if ((ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) == 0) {
699 1.1 ragge idx = sc->sc_nexttx;
700 1.1 ragge zc->zc_xmit[idx].ze_tdes1 = ZE_TDES1_DT_SETUP;
701 1.1 ragge zc->zc_xmit[idx].ze_bufsize = 128;
702 1.1 ragge zc->zc_xmit[idx].ze_bufaddr = sc->sc_pzedata->zc_setup;
703 1.1 ragge zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW;
704 1.1 ragge
705 1.1 ragge if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN)
706 1.1 ragge ZE_WCSR(ZE_CSR1, -1);
707 1.1 ragge
708 1.1 ragge sc->sc_inq++;
709 1.1 ragge if (++sc->sc_nexttx == TXDESCS)
710 1.1 ragge sc->sc_nexttx = 0;
711 1.1 ragge }
712 1.1 ragge }
713 1.1 ragge
714 1.1 ragge /*
715 1.1 ragge * Check for dead transmit logic.
716 1.1 ragge */
717 1.1 ragge void
718 1.1 ragge zetimeout(ifp)
719 1.1 ragge struct ifnet *ifp;
720 1.1 ragge {
721 1.1 ragge struct ze_softc *sc = ifp->if_softc;
722 1.1 ragge
723 1.1 ragge if (sc->sc_inq == 0)
724 1.1 ragge return;
725 1.1 ragge
726 1.1 ragge printf("%s: xmit logic died, resetting...\n", sc->sc_dev.dv_xname);
727 1.1 ragge /*
728 1.1 ragge * Do a reset of interface, to get it going again.
729 1.1 ragge * Will it work by just restart the transmit logic?
730 1.1 ragge */
731 1.1 ragge zeinit(sc);
732 1.1 ragge }
733 1.1 ragge
734 1.1 ragge /*
735 1.1 ragge * Reset chip:
736 1.1 ragge * Set/reset the reset flag.
737 1.1 ragge * Write interrupt vector.
738 1.1 ragge * Write ring buffer addresses.
739 1.1 ragge * Write SBR.
740 1.1 ragge */
741 1.1 ragge int
742 1.1 ragge zereset(sc)
743 1.1 ragge struct ze_softc *sc;
744 1.1 ragge {
745 1.13 ragge int reg, i;
746 1.1 ragge
747 1.1 ragge ZE_WCSR(ZE_CSR6, ZE_NICSR6_RE);
748 1.1 ragge DELAY(50000);
749 1.1 ragge if (ZE_RCSR(ZE_CSR6) & ZE_NICSR5_SF) {
750 1.1 ragge printf("%s: selftest failed\n", sc->sc_dev.dv_xname);
751 1.1 ragge return 1;
752 1.1 ragge }
753 1.1 ragge
754 1.1 ragge /*
755 1.1 ragge * Get the vector that were set at match time, and remember it.
756 1.1 ragge * WHICH VECTOR TO USE? Take one unused. XXX
757 1.1 ragge * Funny way to set vector described in the programmers manual.
758 1.1 ragge */
759 1.1 ragge reg = ZE_NICSR0_IPL14 | sc->sc_intvec | 0x1fff0003; /* SYNC/ASYNC??? */
760 1.1 ragge i = 10;
761 1.1 ragge do {
762 1.1 ragge if (i-- == 0) {
763 1.1 ragge printf("Failing SGEC CSR0 init\n");
764 1.1 ragge return 1;
765 1.1 ragge }
766 1.1 ragge ZE_WCSR(ZE_CSR0, reg);
767 1.1 ragge } while (ZE_RCSR(ZE_CSR0) != reg);
768 1.1 ragge
769 1.1 ragge ZE_WCSR(ZE_CSR3, (vaddr_t)sc->sc_pzedata->zc_recv);
770 1.1 ragge ZE_WCSR(ZE_CSR4, (vaddr_t)sc->sc_pzedata->zc_xmit);
771 1.1 ragge return 0;
772 1.1 ragge }
773