sgec.c revision 1.4 1 1.4 matt /* $NetBSD: sgec.c,v 1.4 2000/05/27 04:26:32 matt Exp $ */
2 1.1 ragge /*
3 1.1 ragge * Copyright (c) 1999 Ludd, University of Lule}, Sweden. All rights reserved.
4 1.1 ragge *
5 1.1 ragge * Redistribution and use in source and binary forms, with or without
6 1.1 ragge * modification, are permitted provided that the following conditions
7 1.1 ragge * are met:
8 1.1 ragge * 1. Redistributions of source code must retain the above copyright
9 1.1 ragge * notice, this list of conditions and the following disclaimer.
10 1.1 ragge * 2. Redistributions in binary form must reproduce the above copyright
11 1.1 ragge * notice, this list of conditions and the following disclaimer in the
12 1.1 ragge * documentation and/or other materials provided with the distribution.
13 1.1 ragge * 3. All advertising materials mentioning features or use of this software
14 1.1 ragge * must display the following acknowledgement:
15 1.1 ragge * This product includes software developed at Ludd, University of
16 1.1 ragge * Lule}, Sweden and its contributors.
17 1.1 ragge * 4. The name of the author may not be used to endorse or promote products
18 1.1 ragge * derived from this software without specific prior written permission
19 1.1 ragge *
20 1.1 ragge * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 ragge * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 ragge * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 ragge * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 ragge * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 ragge * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 ragge * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 ragge * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 ragge * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 ragge * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 ragge */
31 1.1 ragge
32 1.1 ragge /*
33 1.1 ragge * Driver for the SGEC (Second Generation Ethernet Controller), sitting
34 1.1 ragge * on for example the VAX 4000/300 (KA670).
35 1.1 ragge *
36 1.1 ragge * The SGEC looks like a mixture of the DEQNA and the TULIP. Fun toy.
37 1.1 ragge *
38 1.1 ragge * Even though the chip is capable to use virtual addresses (read the
39 1.1 ragge * System Page Table directly) this driver doesn't do so, and there
40 1.1 ragge * is no benefit in doing it either in NetBSD of today.
41 1.1 ragge *
42 1.1 ragge * Things that is still to do:
43 1.1 ragge * Collect statistics.
44 1.1 ragge * Use imperfect filtering when many multicast addresses.
45 1.1 ragge */
46 1.1 ragge
47 1.1 ragge #include "opt_inet.h"
48 1.1 ragge #include "bpfilter.h"
49 1.1 ragge
50 1.1 ragge #include <sys/param.h>
51 1.1 ragge #include <sys/mbuf.h>
52 1.1 ragge #include <sys/socket.h>
53 1.1 ragge #include <sys/device.h>
54 1.1 ragge #include <sys/systm.h>
55 1.1 ragge #include <sys/sockio.h>
56 1.1 ragge
57 1.1 ragge #include <net/if.h>
58 1.1 ragge #include <net/if_ether.h>
59 1.1 ragge #include <net/if_dl.h>
60 1.1 ragge
61 1.1 ragge #include <netinet/in.h>
62 1.1 ragge #include <netinet/if_inarp.h>
63 1.1 ragge
64 1.1 ragge #if NBPFILTER > 0
65 1.1 ragge #include <net/bpf.h>
66 1.1 ragge #include <net/bpfdesc.h>
67 1.1 ragge #endif
68 1.1 ragge
69 1.1 ragge #include <machine/bus.h>
70 1.1 ragge
71 1.1 ragge #include <dev/ic/sgecreg.h>
72 1.1 ragge #include <dev/ic/sgecvar.h>
73 1.1 ragge
74 1.1 ragge static void zeinit __P((struct ze_softc *));
75 1.1 ragge static void zestart __P((struct ifnet *));
76 1.1 ragge static int zeioctl __P((struct ifnet *, u_long, caddr_t));
77 1.1 ragge static int ze_add_rxbuf __P((struct ze_softc *, int));
78 1.1 ragge static void ze_setup __P((struct ze_softc *));
79 1.1 ragge static void zetimeout __P((struct ifnet *));
80 1.1 ragge static int zereset __P((struct ze_softc *));
81 1.1 ragge
82 1.1 ragge #define ZE_WCSR(csr, val) \
83 1.1 ragge bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val)
84 1.1 ragge #define ZE_RCSR(csr) \
85 1.1 ragge bus_space_read_4(sc->sc_iot, sc->sc_ioh, csr)
86 1.1 ragge
87 1.1 ragge /*
88 1.1 ragge * Interface exists: make available by filling in network interface
89 1.1 ragge * record. System will initialize the interface when it is ready
90 1.1 ragge * to accept packets.
91 1.1 ragge */
92 1.1 ragge void
93 1.1 ragge sgec_attach(sc)
94 1.1 ragge struct ze_softc *sc;
95 1.1 ragge {
96 1.1 ragge struct ifnet *ifp = (struct ifnet *)&sc->sc_if;
97 1.1 ragge struct ze_tdes *tp;
98 1.1 ragge struct ze_rdes *rp;
99 1.1 ragge bus_dma_segment_t seg;
100 1.1 ragge int i, rseg, error;
101 1.1 ragge
102 1.1 ragge /*
103 1.1 ragge * Allocate DMA safe memory for descriptors and setup memory.
104 1.1 ragge */
105 1.1 ragge if ((error = bus_dmamem_alloc(sc->sc_dmat,
106 1.1 ragge sizeof(struct ze_cdata), NBPG, 0, &seg, 1, &rseg,
107 1.1 ragge BUS_DMA_NOWAIT)) != 0) {
108 1.1 ragge printf(": unable to allocate control data, error = %d\n",
109 1.1 ragge error);
110 1.1 ragge goto fail_0;
111 1.1 ragge }
112 1.1 ragge
113 1.1 ragge if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg,
114 1.1 ragge sizeof(struct ze_cdata), (caddr_t *)&sc->sc_zedata,
115 1.1 ragge BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
116 1.1 ragge printf(": unable to map control data, error = %d\n", error);
117 1.1 ragge goto fail_1;
118 1.1 ragge }
119 1.1 ragge
120 1.1 ragge if ((error = bus_dmamap_create(sc->sc_dmat,
121 1.1 ragge sizeof(struct ze_cdata), 1,
122 1.1 ragge sizeof(struct ze_cdata), 0, BUS_DMA_NOWAIT,
123 1.1 ragge &sc->sc_cmap)) != 0) {
124 1.1 ragge printf(": unable to create control data DMA map, error = %d\n",
125 1.1 ragge error);
126 1.1 ragge goto fail_2;
127 1.1 ragge }
128 1.1 ragge
129 1.1 ragge if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap,
130 1.1 ragge sc->sc_zedata, sizeof(struct ze_cdata), NULL,
131 1.1 ragge BUS_DMA_NOWAIT)) != 0) {
132 1.1 ragge printf(": unable to load control data DMA map, error = %d\n",
133 1.1 ragge error);
134 1.1 ragge goto fail_3;
135 1.1 ragge }
136 1.1 ragge
137 1.1 ragge /*
138 1.1 ragge * Zero the newly allocated memory.
139 1.1 ragge */
140 1.1 ragge bzero(sc->sc_zedata, sizeof(struct ze_cdata));
141 1.1 ragge /*
142 1.1 ragge * Create the transmit descriptor DMA maps.
143 1.1 ragge */
144 1.1 ragge for (i = 0; i < TXDESCS; i++) {
145 1.1 ragge if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
146 1.1 ragge 1, MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW,
147 1.1 ragge &sc->sc_xmtmap[i]))) {
148 1.1 ragge printf(": unable to create tx DMA map %d, error = %d\n",
149 1.1 ragge i, error);
150 1.1 ragge goto fail_4;
151 1.1 ragge }
152 1.1 ragge }
153 1.1 ragge
154 1.1 ragge /*
155 1.1 ragge * Create receive buffer DMA maps.
156 1.1 ragge */
157 1.1 ragge for (i = 0; i < RXDESCS; i++) {
158 1.1 ragge if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1,
159 1.1 ragge MCLBYTES, 0, BUS_DMA_NOWAIT,
160 1.1 ragge &sc->sc_rcvmap[i]))) {
161 1.1 ragge printf(": unable to create rx DMA map %d, error = %d\n",
162 1.1 ragge i, error);
163 1.1 ragge goto fail_5;
164 1.1 ragge }
165 1.1 ragge }
166 1.1 ragge /*
167 1.1 ragge * Pre-allocate the receive buffers.
168 1.1 ragge */
169 1.1 ragge for (i = 0; i < RXDESCS; i++) {
170 1.1 ragge if ((error = ze_add_rxbuf(sc, i)) != 0) {
171 1.1 ragge printf(": unable to allocate or map rx buffer %d\n,"
172 1.1 ragge " error = %d\n", i, error);
173 1.1 ragge goto fail_6;
174 1.1 ragge }
175 1.1 ragge }
176 1.1 ragge
177 1.1 ragge /*
178 1.1 ragge * Create ring loops of the buffer chains.
179 1.1 ragge * This is only done once.
180 1.1 ragge */
181 1.1 ragge sc->sc_pzedata = (struct ze_cdata *)sc->sc_cmap->dm_segs[0].ds_addr;
182 1.1 ragge
183 1.1 ragge rp = sc->sc_zedata->zc_recv;
184 1.1 ragge rp[RXDESCS].ze_framelen = ZE_FRAMELEN_OW;
185 1.1 ragge rp[RXDESCS].ze_rdes1 = ZE_RDES1_CA;
186 1.1 ragge rp[RXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_recv;
187 1.1 ragge
188 1.1 ragge tp = sc->sc_zedata->zc_xmit;
189 1.1 ragge tp[TXDESCS].ze_tdr = ZE_TDR_OW;
190 1.1 ragge tp[TXDESCS].ze_tdes1 = ZE_TDES1_CA;
191 1.1 ragge tp[TXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_xmit;
192 1.1 ragge
193 1.1 ragge if (zereset(sc))
194 1.1 ragge return;
195 1.1 ragge
196 1.1 ragge strcpy(ifp->if_xname, sc->sc_dev.dv_xname);
197 1.1 ragge ifp->if_softc = sc;
198 1.1 ragge ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
199 1.1 ragge ifp->if_start = zestart;
200 1.1 ragge ifp->if_ioctl = zeioctl;
201 1.1 ragge ifp->if_watchdog = zetimeout;
202 1.1 ragge
203 1.1 ragge /*
204 1.1 ragge * Attach the interface.
205 1.1 ragge */
206 1.1 ragge if_attach(ifp);
207 1.1 ragge ether_ifattach(ifp, sc->sc_enaddr);
208 1.1 ragge
209 1.1 ragge #if NBPFILTER > 0
210 1.1 ragge bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
211 1.1 ragge #endif
212 1.1 ragge printf("\n%s: hardware address %s\n", sc->sc_dev.dv_xname,
213 1.1 ragge ether_sprintf(sc->sc_enaddr));
214 1.1 ragge return;
215 1.1 ragge
216 1.1 ragge /*
217 1.1 ragge * Free any resources we've allocated during the failed attach
218 1.1 ragge * attempt. Do this in reverse order and fall through.
219 1.1 ragge */
220 1.1 ragge fail_6:
221 1.1 ragge for (i = 0; i < RXDESCS; i++) {
222 1.1 ragge if (sc->sc_rxmbuf[i] != NULL) {
223 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]);
224 1.1 ragge m_freem(sc->sc_rxmbuf[i]);
225 1.1 ragge }
226 1.1 ragge }
227 1.1 ragge fail_5:
228 1.1 ragge for (i = 0; i < RXDESCS; i++) {
229 1.1 ragge if (sc->sc_xmtmap[i] != NULL)
230 1.1 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]);
231 1.1 ragge }
232 1.1 ragge fail_4:
233 1.1 ragge for (i = 0; i < TXDESCS; i++) {
234 1.1 ragge if (sc->sc_rcvmap[i] != NULL)
235 1.1 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]);
236 1.1 ragge }
237 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_cmap);
238 1.1 ragge fail_3:
239 1.1 ragge bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap);
240 1.1 ragge fail_2:
241 1.1 ragge bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_zedata,
242 1.1 ragge sizeof(struct ze_cdata));
243 1.1 ragge fail_1:
244 1.1 ragge bus_dmamem_free(sc->sc_dmat, &seg, rseg);
245 1.1 ragge fail_0:
246 1.1 ragge return;
247 1.1 ragge }
248 1.1 ragge
249 1.1 ragge /*
250 1.1 ragge * Initialization of interface.
251 1.1 ragge */
252 1.1 ragge void
253 1.1 ragge zeinit(sc)
254 1.1 ragge struct ze_softc *sc;
255 1.1 ragge {
256 1.1 ragge struct ifnet *ifp = (struct ifnet *)&sc->sc_if;
257 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
258 1.1 ragge int i;
259 1.1 ragge
260 1.1 ragge /*
261 1.1 ragge * Reset the interface.
262 1.1 ragge */
263 1.1 ragge if (zereset(sc))
264 1.1 ragge return;
265 1.1 ragge
266 1.1 ragge sc->sc_nexttx = sc->sc_inq = sc->sc_lastack = 0;
267 1.1 ragge /*
268 1.1 ragge * Release and init transmit descriptors.
269 1.1 ragge */
270 1.1 ragge for (i = 0; i < TXDESCS; i++) {
271 1.1 ragge if (sc->sc_txmbuf[i]) {
272 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]);
273 1.1 ragge m_freem(sc->sc_txmbuf[i]);
274 1.1 ragge sc->sc_txmbuf[i] = 0;
275 1.1 ragge }
276 1.1 ragge zc->zc_xmit[i].ze_tdr = 0; /* Clear valid bit */
277 1.1 ragge }
278 1.1 ragge
279 1.1 ragge
280 1.1 ragge /*
281 1.1 ragge * Init receive descriptors.
282 1.1 ragge */
283 1.1 ragge for (i = 0; i < RXDESCS; i++)
284 1.1 ragge zc->zc_recv[i].ze_framelen = ZE_FRAMELEN_OW;
285 1.1 ragge sc->sc_nextrx = 0;
286 1.1 ragge
287 1.1 ragge ZE_WCSR(ZE_CSR6, ZE_NICSR6_IE|ZE_NICSR6_BL_8|ZE_NICSR6_ST|
288 1.1 ragge ZE_NICSR6_SR|ZE_NICSR6_DC);
289 1.1 ragge
290 1.1 ragge ifp->if_flags |= IFF_RUNNING;
291 1.1 ragge ifp->if_flags &= ~IFF_OACTIVE;
292 1.1 ragge
293 1.1 ragge /*
294 1.1 ragge * Send a setup frame.
295 1.1 ragge * This will start the transmit machinery as well.
296 1.1 ragge */
297 1.1 ragge ze_setup(sc);
298 1.1 ragge
299 1.1 ragge }
300 1.1 ragge
301 1.1 ragge /*
302 1.1 ragge * Start output on interface.
303 1.1 ragge */
304 1.1 ragge void
305 1.1 ragge zestart(ifp)
306 1.1 ragge struct ifnet *ifp;
307 1.1 ragge {
308 1.1 ragge struct ze_softc *sc = ifp->if_softc;
309 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
310 1.1 ragge paddr_t buffer;
311 1.1 ragge struct mbuf *m, *m0;
312 1.1 ragge int idx, len, s, i, totlen, error;
313 1.4 matt int old_inq = sc->sc_inq;
314 1.1 ragge short orword;
315 1.1 ragge
316 1.1 ragge s = splimp();
317 1.1 ragge while (sc->sc_inq < (TXDESCS - 1)) {
318 1.1 ragge
319 1.1 ragge if (sc->sc_setup) {
320 1.1 ragge ze_setup(sc);
321 1.1 ragge continue;
322 1.1 ragge }
323 1.1 ragge idx = sc->sc_nexttx;
324 1.1 ragge IF_DEQUEUE(&sc->sc_if.if_snd, m);
325 1.1 ragge if (m == 0)
326 1.1 ragge goto out;
327 1.1 ragge /*
328 1.1 ragge * Count number of mbufs in chain.
329 1.1 ragge * Always do DMA directly from mbufs, therefore the transmit
330 1.1 ragge * ring is really big.
331 1.1 ragge */
332 1.1 ragge for (m0 = m, i = 0; m0; m0 = m0->m_next)
333 1.1 ragge if (m0->m_len)
334 1.1 ragge i++;
335 1.1 ragge if (i >= TXDESCS)
336 1.1 ragge panic("zestart"); /* XXX */
337 1.1 ragge
338 1.1 ragge if ((i + sc->sc_inq) >= (TXDESCS - 1)) {
339 1.1 ragge IF_PREPEND(&sc->sc_if.if_snd, m);
340 1.1 ragge ifp->if_flags |= IFF_OACTIVE;
341 1.1 ragge goto out;
342 1.1 ragge }
343 1.1 ragge
344 1.1 ragge #if NBPFILTER > 0
345 1.1 ragge if (ifp->if_bpf)
346 1.1 ragge bpf_mtap(ifp->if_bpf, m);
347 1.1 ragge #endif
348 1.1 ragge /*
349 1.1 ragge * m now points to a mbuf chain that can be loaded.
350 1.1 ragge * Loop around and set it.
351 1.1 ragge */
352 1.1 ragge totlen = 0;
353 1.1 ragge for (m0 = m; m0; m0 = m0->m_next) {
354 1.1 ragge error = bus_dmamap_load(sc->sc_dmat, sc->sc_xmtmap[idx],
355 1.1 ragge mtod(m0, void *), m0->m_len, 0, 0);
356 1.1 ragge buffer = sc->sc_xmtmap[idx]->dm_segs[0].ds_addr;
357 1.1 ragge len = m0->m_len;
358 1.1 ragge if (len == 0)
359 1.1 ragge continue;
360 1.1 ragge
361 1.1 ragge totlen += len;
362 1.1 ragge /* Word alignment calc */
363 1.1 ragge orword = 0;
364 1.1 ragge if (totlen == len)
365 1.1 ragge orword = ZE_TDES1_FS;
366 1.1 ragge if (totlen == m->m_pkthdr.len) {
367 1.1 ragge if (totlen < ETHER_MIN_LEN)
368 1.1 ragge len += (ETHER_MIN_LEN - totlen);
369 1.1 ragge orword |= ZE_TDES1_LS;
370 1.1 ragge sc->sc_txmbuf[idx] = m;
371 1.1 ragge }
372 1.1 ragge zc->zc_xmit[idx].ze_bufsize = len;
373 1.1 ragge zc->zc_xmit[idx].ze_bufaddr = (char *)buffer;
374 1.1 ragge zc->zc_xmit[idx].ze_tdes1 = orword | ZE_TDES1_IC;
375 1.1 ragge zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW;
376 1.1 ragge
377 1.1 ragge if (++idx == TXDESCS)
378 1.1 ragge idx = 0;
379 1.1 ragge sc->sc_inq++;
380 1.1 ragge }
381 1.1 ragge #ifdef DIAGNOSTIC
382 1.1 ragge if (totlen != m->m_pkthdr.len)
383 1.1 ragge panic("zestart: len fault");
384 1.1 ragge #endif
385 1.1 ragge
386 1.1 ragge /*
387 1.1 ragge * Kick off the transmit logic, if it is stopped.
388 1.1 ragge */
389 1.1 ragge if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN)
390 1.1 ragge ZE_WCSR(ZE_CSR1, -1);
391 1.1 ragge sc->sc_nexttx = idx;
392 1.1 ragge }
393 1.1 ragge if (sc->sc_inq == (TXDESCS - 1))
394 1.1 ragge ifp->if_flags |= IFF_OACTIVE;
395 1.1 ragge
396 1.4 matt out: if (old_inq < sc->sc_inq)
397 1.1 ragge ifp->if_timer = 5; /* If transmit logic dies */
398 1.1 ragge splx(s);
399 1.1 ragge }
400 1.1 ragge
401 1.1 ragge int
402 1.1 ragge sgec_intr(sc)
403 1.1 ragge struct ze_softc *sc;
404 1.1 ragge {
405 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
406 1.1 ragge struct ifnet *ifp = &sc->sc_if;
407 1.1 ragge struct ether_header *eh;
408 1.1 ragge struct mbuf *m;
409 1.1 ragge int csr, len;
410 1.1 ragge
411 1.1 ragge csr = ZE_RCSR(ZE_CSR5);
412 1.1 ragge if ((csr & ZE_NICSR5_IS) == 0) /* Wasn't we */
413 1.1 ragge return 0;
414 1.1 ragge ZE_WCSR(ZE_CSR5, csr);
415 1.1 ragge
416 1.1 ragge if (csr & ZE_NICSR5_RI)
417 1.1 ragge while ((zc->zc_recv[sc->sc_nextrx].ze_framelen &
418 1.1 ragge ZE_FRAMELEN_OW) == 0) {
419 1.1 ragge
420 1.3 matt ifp->if_ipackets++;
421 1.1 ragge m = sc->sc_rxmbuf[sc->sc_nextrx];
422 1.1 ragge len = zc->zc_recv[sc->sc_nextrx].ze_framelen;
423 1.1 ragge ze_add_rxbuf(sc, sc->sc_nextrx);
424 1.1 ragge m->m_pkthdr.rcvif = ifp;
425 1.1 ragge m->m_pkthdr.len = m->m_len = len;
426 1.1 ragge if (++sc->sc_nextrx == RXDESCS)
427 1.1 ragge sc->sc_nextrx = 0;
428 1.1 ragge eh = mtod(m, struct ether_header *);
429 1.1 ragge #if NBPFILTER > 0
430 1.1 ragge if (ifp->if_bpf) {
431 1.1 ragge bpf_mtap(ifp->if_bpf, m);
432 1.1 ragge if ((ifp->if_flags & IFF_PROMISC) != 0 &&
433 1.4 matt ((eh->ether_dhost[0] & 1) == 0) &&
434 1.1 ragge bcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
435 1.4 matt ETHER_ADDR_LEN) != 0) {
436 1.1 ragge m_freem(m);
437 1.1 ragge continue;
438 1.1 ragge }
439 1.1 ragge }
440 1.1 ragge #endif
441 1.1 ragge /*
442 1.1 ragge * ALLMULTI means PROMISC in this driver.
443 1.1 ragge */
444 1.1 ragge if ((ifp->if_flags & IFF_ALLMULTI) &&
445 1.1 ragge ((eh->ether_dhost[0] & 1) == 0) &&
446 1.1 ragge bcmp(LLADDR(ifp->if_sadl), eh->ether_dhost,
447 1.1 ragge ETHER_ADDR_LEN)) {
448 1.1 ragge m_freem(m);
449 1.1 ragge continue;
450 1.1 ragge }
451 1.1 ragge (*ifp->if_input)(ifp, m);
452 1.1 ragge }
453 1.1 ragge
454 1.1 ragge if (csr & ZE_NICSR5_TI) {
455 1.1 ragge while ((zc->zc_xmit[sc->sc_lastack].ze_tdr & ZE_TDR_OW) == 0) {
456 1.1 ragge int idx = sc->sc_lastack;
457 1.1 ragge
458 1.1 ragge if (sc->sc_lastack == sc->sc_nexttx)
459 1.1 ragge break;
460 1.1 ragge sc->sc_inq--;
461 1.1 ragge if (++sc->sc_lastack == TXDESCS)
462 1.1 ragge sc->sc_lastack = 0;
463 1.1 ragge
464 1.1 ragge if ((zc->zc_xmit[idx].ze_tdes1 & ZE_TDES1_DT) ==
465 1.1 ragge ZE_TDES1_DT_SETUP)
466 1.1 ragge continue;
467 1.4 matt /* XXX collect statistics */
468 1.4 matt if (zc->zc_xmit[idx].ze_tdes1 & ZE_TDES1_LS)
469 1.4 matt ifp->if_opackets++;
470 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[idx]);
471 1.1 ragge if (sc->sc_txmbuf[idx]) {
472 1.1 ragge m_freem(sc->sc_txmbuf[idx]);
473 1.1 ragge sc->sc_txmbuf[idx] = 0;
474 1.1 ragge }
475 1.1 ragge }
476 1.4 matt if (sc->sc_inq == 0)
477 1.4 matt ifp->if_timer = 0;
478 1.1 ragge ifp->if_flags &= ~IFF_OACTIVE;
479 1.1 ragge zestart(ifp); /* Put in more in queue */
480 1.1 ragge }
481 1.1 ragge return 1;
482 1.1 ragge }
483 1.1 ragge
484 1.1 ragge /*
485 1.1 ragge * Process an ioctl request.
486 1.1 ragge */
487 1.1 ragge int
488 1.1 ragge zeioctl(ifp, cmd, data)
489 1.2 augustss struct ifnet *ifp;
490 1.1 ragge u_long cmd;
491 1.1 ragge caddr_t data;
492 1.1 ragge {
493 1.1 ragge struct ze_softc *sc = ifp->if_softc;
494 1.1 ragge struct ifreq *ifr = (struct ifreq *)data;
495 1.1 ragge struct ifaddr *ifa = (struct ifaddr *)data;
496 1.1 ragge int s = splnet(), error = 0;
497 1.1 ragge
498 1.1 ragge switch (cmd) {
499 1.1 ragge
500 1.1 ragge case SIOCSIFADDR:
501 1.1 ragge ifp->if_flags |= IFF_UP;
502 1.1 ragge switch(ifa->ifa_addr->sa_family) {
503 1.1 ragge #ifdef INET
504 1.1 ragge case AF_INET:
505 1.1 ragge zeinit(sc);
506 1.1 ragge arp_ifinit(ifp, ifa);
507 1.1 ragge break;
508 1.1 ragge #endif
509 1.1 ragge }
510 1.1 ragge break;
511 1.1 ragge
512 1.1 ragge case SIOCSIFFLAGS:
513 1.1 ragge if ((ifp->if_flags & IFF_UP) == 0 &&
514 1.1 ragge (ifp->if_flags & IFF_RUNNING) != 0) {
515 1.1 ragge /*
516 1.1 ragge * If interface is marked down and it is running,
517 1.1 ragge * stop it. (by disabling receive mechanism).
518 1.1 ragge */
519 1.1 ragge ZE_WCSR(ZE_CSR6, ZE_RCSR(ZE_CSR6) &
520 1.1 ragge ~(ZE_NICSR6_ST|ZE_NICSR6_SR));
521 1.1 ragge ifp->if_flags &= ~IFF_RUNNING;
522 1.1 ragge } else if ((ifp->if_flags & IFF_UP) != 0 &&
523 1.1 ragge (ifp->if_flags & IFF_RUNNING) == 0) {
524 1.1 ragge /*
525 1.1 ragge * If interface it marked up and it is stopped, then
526 1.1 ragge * start it.
527 1.1 ragge */
528 1.1 ragge zeinit(sc);
529 1.1 ragge } else if ((ifp->if_flags & IFF_UP) != 0) {
530 1.1 ragge /*
531 1.1 ragge * Send a new setup packet to match any new changes.
532 1.1 ragge * (Like IFF_PROMISC etc)
533 1.1 ragge */
534 1.1 ragge ze_setup(sc);
535 1.1 ragge }
536 1.1 ragge break;
537 1.1 ragge
538 1.1 ragge case SIOCADDMULTI:
539 1.1 ragge case SIOCDELMULTI:
540 1.1 ragge /*
541 1.1 ragge * Update our multicast list.
542 1.1 ragge */
543 1.1 ragge error = (cmd == SIOCADDMULTI) ?
544 1.1 ragge ether_addmulti(ifr, &sc->sc_ec):
545 1.1 ragge ether_delmulti(ifr, &sc->sc_ec);
546 1.1 ragge
547 1.1 ragge if (error == ENETRESET) {
548 1.1 ragge /*
549 1.1 ragge * Multicast list has changed; set the hardware filter
550 1.1 ragge * accordingly.
551 1.1 ragge */
552 1.1 ragge ze_setup(sc);
553 1.1 ragge error = 0;
554 1.1 ragge }
555 1.1 ragge break;
556 1.1 ragge
557 1.1 ragge default:
558 1.1 ragge error = EINVAL;
559 1.1 ragge
560 1.1 ragge }
561 1.1 ragge splx(s);
562 1.1 ragge return (error);
563 1.1 ragge }
564 1.1 ragge
565 1.1 ragge /*
566 1.1 ragge * Add a receive buffer to the indicated descriptor.
567 1.1 ragge */
568 1.1 ragge int
569 1.1 ragge ze_add_rxbuf(sc, i)
570 1.1 ragge struct ze_softc *sc;
571 1.1 ragge int i;
572 1.1 ragge {
573 1.1 ragge struct mbuf *m;
574 1.1 ragge struct ze_rdes *rp;
575 1.1 ragge int error;
576 1.1 ragge
577 1.1 ragge MGETHDR(m, M_DONTWAIT, MT_DATA);
578 1.1 ragge if (m == NULL)
579 1.1 ragge return (ENOBUFS);
580 1.1 ragge
581 1.1 ragge MCLGET(m, M_DONTWAIT);
582 1.1 ragge if ((m->m_flags & M_EXT) == 0) {
583 1.1 ragge m_freem(m);
584 1.1 ragge return (ENOBUFS);
585 1.1 ragge }
586 1.1 ragge
587 1.1 ragge if (sc->sc_rxmbuf[i] != NULL)
588 1.1 ragge bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]);
589 1.1 ragge
590 1.1 ragge error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i],
591 1.1 ragge m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT);
592 1.1 ragge if (error)
593 1.1 ragge panic("%s: can't load rx DMA map %d, error = %d\n",
594 1.1 ragge sc->sc_dev.dv_xname, i, error);
595 1.1 ragge sc->sc_rxmbuf[i] = m;
596 1.1 ragge
597 1.1 ragge bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0,
598 1.1 ragge sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD);
599 1.1 ragge
600 1.1 ragge /*
601 1.1 ragge * We know that the mbuf cluster is page aligned. Also, be sure
602 1.1 ragge * that the IP header will be longword aligned.
603 1.1 ragge */
604 1.1 ragge m->m_data += 2;
605 1.1 ragge rp = &sc->sc_zedata->zc_recv[i];
606 1.1 ragge rp->ze_bufsize = (m->m_ext.ext_size - 2);
607 1.1 ragge rp->ze_bufaddr = (char *)sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2;
608 1.1 ragge rp->ze_framelen = ZE_FRAMELEN_OW;
609 1.1 ragge
610 1.1 ragge return (0);
611 1.1 ragge }
612 1.1 ragge
613 1.1 ragge /*
614 1.1 ragge * Create a setup packet and put in queue for sending.
615 1.1 ragge */
616 1.1 ragge void
617 1.1 ragge ze_setup(sc)
618 1.1 ragge struct ze_softc *sc;
619 1.1 ragge {
620 1.1 ragge struct ether_multi *enm;
621 1.1 ragge struct ether_multistep step;
622 1.1 ragge struct ze_cdata *zc = sc->sc_zedata;
623 1.1 ragge struct ifnet *ifp = &sc->sc_if;
624 1.1 ragge u_int8_t *enaddr = LLADDR(ifp->if_sadl);
625 1.1 ragge int j, idx, s, reg;
626 1.1 ragge
627 1.1 ragge s = splimp();
628 1.1 ragge if (sc->sc_inq == (TXDESCS - 1)) {
629 1.1 ragge sc->sc_setup = 1;
630 1.1 ragge splx(s);
631 1.1 ragge return;
632 1.1 ragge }
633 1.1 ragge sc->sc_setup = 0;
634 1.1 ragge /*
635 1.1 ragge * Init the setup packet with valid info.
636 1.1 ragge */
637 1.1 ragge memset(zc->zc_setup, 0xff, sizeof(zc->zc_setup)); /* Broadcast */
638 1.1 ragge bcopy(enaddr, zc->zc_setup, ETHER_ADDR_LEN);
639 1.1 ragge
640 1.1 ragge /*
641 1.1 ragge * Multicast handling. The SGEC can handle up to 16 direct
642 1.1 ragge * ethernet addresses.
643 1.1 ragge */
644 1.1 ragge j = 16;
645 1.1 ragge ifp->if_flags &= ~IFF_ALLMULTI;
646 1.1 ragge ETHER_FIRST_MULTI(step, &sc->sc_ec, enm);
647 1.1 ragge while (enm != NULL) {
648 1.1 ragge if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) {
649 1.1 ragge ifp->if_flags |= IFF_ALLMULTI;
650 1.1 ragge break;
651 1.1 ragge }
652 1.1 ragge bcopy(enm->enm_addrlo, &zc->zc_setup[j], ETHER_ADDR_LEN);
653 1.1 ragge j += 8;
654 1.1 ragge ETHER_NEXT_MULTI(step, enm);
655 1.1 ragge if ((enm != NULL)&& (j == 128)) {
656 1.1 ragge ifp->if_flags |= IFF_ALLMULTI;
657 1.1 ragge break;
658 1.1 ragge }
659 1.1 ragge }
660 1.1 ragge
661 1.1 ragge /*
662 1.1 ragge * Fiddle with the receive logic.
663 1.1 ragge */
664 1.1 ragge reg = ZE_RCSR(ZE_CSR6);
665 1.1 ragge DELAY(10);
666 1.1 ragge ZE_WCSR(ZE_CSR6, reg & ~ZE_NICSR6_SR); /* Stop rx */
667 1.1 ragge reg &= ~ZE_NICSR6_AF;
668 1.1 ragge if (ifp->if_flags & IFF_PROMISC)
669 1.1 ragge reg |= ZE_NICSR6_AF_PROM;
670 1.1 ragge else if (ifp->if_flags & IFF_ALLMULTI)
671 1.1 ragge reg |= ZE_NICSR6_AF_ALLM;
672 1.1 ragge DELAY(10);
673 1.1 ragge ZE_WCSR(ZE_CSR6, reg);
674 1.1 ragge /*
675 1.1 ragge * Only send a setup packet if needed.
676 1.1 ragge */
677 1.1 ragge if ((ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) == 0) {
678 1.1 ragge idx = sc->sc_nexttx;
679 1.1 ragge zc->zc_xmit[idx].ze_tdes1 = ZE_TDES1_DT_SETUP;
680 1.1 ragge zc->zc_xmit[idx].ze_bufsize = 128;
681 1.1 ragge zc->zc_xmit[idx].ze_bufaddr = sc->sc_pzedata->zc_setup;
682 1.1 ragge zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW;
683 1.1 ragge
684 1.1 ragge if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN)
685 1.1 ragge ZE_WCSR(ZE_CSR1, -1);
686 1.1 ragge
687 1.1 ragge sc->sc_inq++;
688 1.1 ragge if (++sc->sc_nexttx == TXDESCS)
689 1.1 ragge sc->sc_nexttx = 0;
690 1.1 ragge }
691 1.1 ragge splx(s);
692 1.1 ragge }
693 1.1 ragge
694 1.1 ragge /*
695 1.1 ragge * Check for dead transmit logic.
696 1.1 ragge */
697 1.1 ragge void
698 1.1 ragge zetimeout(ifp)
699 1.1 ragge struct ifnet *ifp;
700 1.1 ragge {
701 1.1 ragge struct ze_softc *sc = ifp->if_softc;
702 1.1 ragge
703 1.1 ragge if (sc->sc_inq == 0)
704 1.1 ragge return;
705 1.1 ragge
706 1.1 ragge printf("%s: xmit logic died, resetting...\n", sc->sc_dev.dv_xname);
707 1.1 ragge /*
708 1.1 ragge * Do a reset of interface, to get it going again.
709 1.1 ragge * Will it work by just restart the transmit logic?
710 1.1 ragge */
711 1.1 ragge zeinit(sc);
712 1.1 ragge }
713 1.1 ragge
714 1.1 ragge /*
715 1.1 ragge * Reset chip:
716 1.1 ragge * Set/reset the reset flag.
717 1.1 ragge * Write interrupt vector.
718 1.1 ragge * Write ring buffer addresses.
719 1.1 ragge * Write SBR.
720 1.1 ragge */
721 1.1 ragge int
722 1.1 ragge zereset(sc)
723 1.1 ragge struct ze_softc *sc;
724 1.1 ragge {
725 1.1 ragge int reg, i, s;
726 1.1 ragge
727 1.1 ragge ZE_WCSR(ZE_CSR6, ZE_NICSR6_RE);
728 1.1 ragge DELAY(50000);
729 1.1 ragge if (ZE_RCSR(ZE_CSR6) & ZE_NICSR5_SF) {
730 1.1 ragge printf("%s: selftest failed\n", sc->sc_dev.dv_xname);
731 1.1 ragge return 1;
732 1.1 ragge }
733 1.1 ragge
734 1.1 ragge /*
735 1.1 ragge * Get the vector that were set at match time, and remember it.
736 1.1 ragge * WHICH VECTOR TO USE? Take one unused. XXX
737 1.1 ragge * Funny way to set vector described in the programmers manual.
738 1.1 ragge */
739 1.1 ragge reg = ZE_NICSR0_IPL14 | sc->sc_intvec | 0x1fff0003; /* SYNC/ASYNC??? */
740 1.1 ragge i = 10;
741 1.1 ragge s = splimp();
742 1.1 ragge do {
743 1.1 ragge if (i-- == 0) {
744 1.1 ragge printf("Failing SGEC CSR0 init\n");
745 1.1 ragge splx(s);
746 1.1 ragge return 1;
747 1.1 ragge }
748 1.1 ragge ZE_WCSR(ZE_CSR0, reg);
749 1.1 ragge } while (ZE_RCSR(ZE_CSR0) != reg);
750 1.1 ragge splx(s);
751 1.1 ragge
752 1.1 ragge ZE_WCSR(ZE_CSR3, (vaddr_t)sc->sc_pzedata->zc_recv);
753 1.1 ragge ZE_WCSR(ZE_CSR4, (vaddr_t)sc->sc_pzedata->zc_xmit);
754 1.1 ragge return 0;
755 1.1 ragge }
756