sgec.c revision 1.13
1 /* $NetBSD: sgec.c,v 1.13 2001/04/15 15:01:35 ragge Exp $ */ 2 /* 3 * Copyright (c) 1999 Ludd, University of Lule}, Sweden. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed at Ludd, University of 16 * Lule}, Sweden and its contributors. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for the SGEC (Second Generation Ethernet Controller), sitting 34 * on for example the VAX 4000/300 (KA670). 35 * 36 * The SGEC looks like a mixture of the DEQNA and the TULIP. Fun toy. 37 * 38 * Even though the chip is capable to use virtual addresses (read the 39 * System Page Table directly) this driver doesn't do so, and there 40 * is no benefit in doing it either in NetBSD of today. 41 * 42 * Things that is still to do: 43 * Collect statistics. 44 * Use imperfect filtering when many multicast addresses. 45 */ 46 47 #include "opt_inet.h" 48 #include "bpfilter.h" 49 50 #include <sys/param.h> 51 #include <sys/mbuf.h> 52 #include <sys/socket.h> 53 #include <sys/device.h> 54 #include <sys/systm.h> 55 #include <sys/sockio.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <net/if.h> 60 #include <net/if_ether.h> 61 #include <net/if_dl.h> 62 63 #include <netinet/in.h> 64 #include <netinet/if_inarp.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #include <net/bpfdesc.h> 69 #endif 70 71 #include <machine/bus.h> 72 73 #include <dev/ic/sgecreg.h> 74 #include <dev/ic/sgecvar.h> 75 76 static void zeinit __P((struct ze_softc *)); 77 static void zestart __P((struct ifnet *)); 78 static int zeioctl __P((struct ifnet *, u_long, caddr_t)); 79 static int ze_add_rxbuf __P((struct ze_softc *, int)); 80 static void ze_setup __P((struct ze_softc *)); 81 static void zetimeout __P((struct ifnet *)); 82 static int zereset __P((struct ze_softc *)); 83 84 #define ZE_WCSR(csr, val) \ 85 bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val) 86 #define ZE_RCSR(csr) \ 87 bus_space_read_4(sc->sc_iot, sc->sc_ioh, csr) 88 89 /* 90 * Interface exists: make available by filling in network interface 91 * record. System will initialize the interface when it is ready 92 * to accept packets. 93 */ 94 void 95 sgec_attach(sc) 96 struct ze_softc *sc; 97 { 98 struct ifnet *ifp = (struct ifnet *)&sc->sc_if; 99 struct ze_tdes *tp; 100 struct ze_rdes *rp; 101 bus_dma_segment_t seg; 102 int i, rseg, error; 103 104 /* 105 * Allocate DMA safe memory for descriptors and setup memory. 106 */ 107 if ((error = bus_dmamem_alloc(sc->sc_dmat, 108 sizeof(struct ze_cdata), PAGE_SIZE, 0, &seg, 1, &rseg, 109 BUS_DMA_NOWAIT)) != 0) { 110 printf(": unable to allocate control data, error = %d\n", 111 error); 112 goto fail_0; 113 } 114 115 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 116 sizeof(struct ze_cdata), (caddr_t *)&sc->sc_zedata, 117 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 118 printf(": unable to map control data, error = %d\n", error); 119 goto fail_1; 120 } 121 122 if ((error = bus_dmamap_create(sc->sc_dmat, 123 sizeof(struct ze_cdata), 1, 124 sizeof(struct ze_cdata), 0, BUS_DMA_NOWAIT, 125 &sc->sc_cmap)) != 0) { 126 printf(": unable to create control data DMA map, error = %d\n", 127 error); 128 goto fail_2; 129 } 130 131 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap, 132 sc->sc_zedata, sizeof(struct ze_cdata), NULL, 133 BUS_DMA_NOWAIT)) != 0) { 134 printf(": unable to load control data DMA map, error = %d\n", 135 error); 136 goto fail_3; 137 } 138 139 /* 140 * Zero the newly allocated memory. 141 */ 142 bzero(sc->sc_zedata, sizeof(struct ze_cdata)); 143 /* 144 * Create the transmit descriptor DMA maps. 145 */ 146 for (i = 0; i < TXDESCS; i++) { 147 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 148 1, MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 149 &sc->sc_xmtmap[i]))) { 150 printf(": unable to create tx DMA map %d, error = %d\n", 151 i, error); 152 goto fail_4; 153 } 154 } 155 156 /* 157 * Create receive buffer DMA maps. 158 */ 159 for (i = 0; i < RXDESCS; i++) { 160 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 161 MCLBYTES, 0, BUS_DMA_NOWAIT, 162 &sc->sc_rcvmap[i]))) { 163 printf(": unable to create rx DMA map %d, error = %d\n", 164 i, error); 165 goto fail_5; 166 } 167 } 168 /* 169 * Pre-allocate the receive buffers. 170 */ 171 for (i = 0; i < RXDESCS; i++) { 172 if ((error = ze_add_rxbuf(sc, i)) != 0) { 173 printf(": unable to allocate or map rx buffer %d\n," 174 " error = %d\n", i, error); 175 goto fail_6; 176 } 177 } 178 179 /* For vmstat -i 180 */ 181 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 182 sc->sc_dev.dv_xname, "intr"); 183 184 /* 185 * Create ring loops of the buffer chains. 186 * This is only done once. 187 */ 188 sc->sc_pzedata = (struct ze_cdata *)sc->sc_cmap->dm_segs[0].ds_addr; 189 190 rp = sc->sc_zedata->zc_recv; 191 rp[RXDESCS].ze_framelen = ZE_FRAMELEN_OW; 192 rp[RXDESCS].ze_rdes1 = ZE_RDES1_CA; 193 rp[RXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_recv; 194 195 tp = sc->sc_zedata->zc_xmit; 196 tp[TXDESCS].ze_tdr = ZE_TDR_OW; 197 tp[TXDESCS].ze_tdes1 = ZE_TDES1_CA; 198 tp[TXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_xmit; 199 200 if (zereset(sc)) 201 return; 202 203 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 204 ifp->if_softc = sc; 205 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 206 ifp->if_start = zestart; 207 ifp->if_ioctl = zeioctl; 208 ifp->if_watchdog = zetimeout; 209 IFQ_SET_READY(&ifp->if_snd); 210 211 /* 212 * Attach the interface. 213 */ 214 if_attach(ifp); 215 ether_ifattach(ifp, sc->sc_enaddr); 216 217 printf("\n%s: hardware address %s\n", sc->sc_dev.dv_xname, 218 ether_sprintf(sc->sc_enaddr)); 219 return; 220 221 /* 222 * Free any resources we've allocated during the failed attach 223 * attempt. Do this in reverse order and fall through. 224 */ 225 fail_6: 226 for (i = 0; i < RXDESCS; i++) { 227 if (sc->sc_rxmbuf[i] != NULL) { 228 bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]); 229 m_freem(sc->sc_rxmbuf[i]); 230 } 231 } 232 fail_5: 233 for (i = 0; i < RXDESCS; i++) { 234 if (sc->sc_xmtmap[i] != NULL) 235 bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]); 236 } 237 fail_4: 238 for (i = 0; i < TXDESCS; i++) { 239 if (sc->sc_rcvmap[i] != NULL) 240 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]); 241 } 242 bus_dmamap_unload(sc->sc_dmat, sc->sc_cmap); 243 fail_3: 244 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap); 245 fail_2: 246 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_zedata, 247 sizeof(struct ze_cdata)); 248 fail_1: 249 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 250 fail_0: 251 return; 252 } 253 254 /* 255 * Initialization of interface. 256 */ 257 void 258 zeinit(sc) 259 struct ze_softc *sc; 260 { 261 struct ifnet *ifp = (struct ifnet *)&sc->sc_if; 262 struct ze_cdata *zc = sc->sc_zedata; 263 int i; 264 265 /* 266 * Reset the interface. 267 */ 268 if (zereset(sc)) 269 return; 270 271 sc->sc_nexttx = sc->sc_inq = sc->sc_lastack = 0; 272 /* 273 * Release and init transmit descriptors. 274 */ 275 for (i = 0; i < TXDESCS; i++) { 276 if (sc->sc_txmbuf[i]) { 277 bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]); 278 m_freem(sc->sc_txmbuf[i]); 279 sc->sc_txmbuf[i] = 0; 280 } 281 zc->zc_xmit[i].ze_tdr = 0; /* Clear valid bit */ 282 } 283 284 285 /* 286 * Init receive descriptors. 287 */ 288 for (i = 0; i < RXDESCS; i++) 289 zc->zc_recv[i].ze_framelen = ZE_FRAMELEN_OW; 290 sc->sc_nextrx = 0; 291 292 ZE_WCSR(ZE_CSR6, ZE_NICSR6_IE|ZE_NICSR6_BL_8|ZE_NICSR6_ST| 293 ZE_NICSR6_SR|ZE_NICSR6_DC); 294 295 ifp->if_flags |= IFF_RUNNING; 296 ifp->if_flags &= ~IFF_OACTIVE; 297 298 /* 299 * Send a setup frame. 300 * This will start the transmit machinery as well. 301 */ 302 ze_setup(sc); 303 304 } 305 306 /* 307 * Start output on interface. 308 */ 309 void 310 zestart(ifp) 311 struct ifnet *ifp; 312 { 313 struct ze_softc *sc = ifp->if_softc; 314 struct ze_cdata *zc = sc->sc_zedata; 315 paddr_t buffer; 316 struct mbuf *m, *m0; 317 int idx, len, i, totlen, error; 318 int old_inq = sc->sc_inq; 319 short orword; 320 321 while (sc->sc_inq < (TXDESCS - 1)) { 322 323 if (sc->sc_setup) { 324 ze_setup(sc); 325 continue; 326 } 327 idx = sc->sc_nexttx; 328 IFQ_POLL(&sc->sc_if.if_snd, m); 329 if (m == 0) 330 goto out; 331 /* 332 * Count number of mbufs in chain. 333 * Always do DMA directly from mbufs, therefore the transmit 334 * ring is really big. 335 */ 336 for (m0 = m, i = 0; m0; m0 = m0->m_next) 337 if (m0->m_len) 338 i++; 339 if (i >= TXDESCS) 340 panic("zestart"); /* XXX */ 341 342 if ((i + sc->sc_inq) >= (TXDESCS - 1)) { 343 ifp->if_flags |= IFF_OACTIVE; 344 goto out; 345 } 346 347 #if NBPFILTER > 0 348 if (ifp->if_bpf) 349 bpf_mtap(ifp->if_bpf, m); 350 #endif 351 /* 352 * m now points to a mbuf chain that can be loaded. 353 * Loop around and set it. 354 */ 355 totlen = 0; 356 for (m0 = m; m0; m0 = m0->m_next) { 357 error = bus_dmamap_load(sc->sc_dmat, sc->sc_xmtmap[idx], 358 mtod(m0, void *), m0->m_len, 0, 0); 359 buffer = sc->sc_xmtmap[idx]->dm_segs[0].ds_addr; 360 len = m0->m_len; 361 if (len == 0) 362 continue; 363 364 totlen += len; 365 /* Word alignment calc */ 366 orword = 0; 367 if (totlen == len) 368 orword = ZE_TDES1_FS; 369 if (totlen == m->m_pkthdr.len) { 370 if (totlen < ETHER_MIN_LEN) 371 len += (ETHER_MIN_LEN - totlen); 372 orword |= ZE_TDES1_LS; 373 sc->sc_txmbuf[idx] = m; 374 } 375 zc->zc_xmit[idx].ze_bufsize = len; 376 zc->zc_xmit[idx].ze_bufaddr = (char *)buffer; 377 zc->zc_xmit[idx].ze_tdes1 = orword | ZE_TDES1_IC; 378 zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW; 379 380 if (++idx == TXDESCS) 381 idx = 0; 382 sc->sc_inq++; 383 } 384 IFQ_DEQUEUE(&ifp->if_snd, m); 385 #ifdef DIAGNOSTIC 386 if (totlen != m->m_pkthdr.len) 387 panic("zestart: len fault"); 388 #endif 389 390 /* 391 * Kick off the transmit logic, if it is stopped. 392 */ 393 if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN) 394 ZE_WCSR(ZE_CSR1, -1); 395 sc->sc_nexttx = idx; 396 } 397 if (sc->sc_inq == (TXDESCS - 1)) 398 ifp->if_flags |= IFF_OACTIVE; 399 400 out: if (old_inq < sc->sc_inq) 401 ifp->if_timer = 5; /* If transmit logic dies */ 402 } 403 404 int 405 sgec_intr(sc) 406 struct ze_softc *sc; 407 { 408 struct ze_cdata *zc = sc->sc_zedata; 409 struct ifnet *ifp = &sc->sc_if; 410 struct mbuf *m; 411 int csr, len; 412 413 csr = ZE_RCSR(ZE_CSR5); 414 if ((csr & ZE_NICSR5_IS) == 0) /* Wasn't we */ 415 return 0; 416 ZE_WCSR(ZE_CSR5, csr); 417 418 if (csr & ZE_NICSR5_RI) 419 while ((zc->zc_recv[sc->sc_nextrx].ze_framelen & 420 ZE_FRAMELEN_OW) == 0) { 421 422 ifp->if_ipackets++; 423 m = sc->sc_rxmbuf[sc->sc_nextrx]; 424 len = zc->zc_recv[sc->sc_nextrx].ze_framelen; 425 ze_add_rxbuf(sc, sc->sc_nextrx); 426 m->m_pkthdr.rcvif = ifp; 427 m->m_pkthdr.len = m->m_len = len; 428 m->m_flags |= M_HASFCS; 429 if (++sc->sc_nextrx == RXDESCS) 430 sc->sc_nextrx = 0; 431 #if NBPFILTER > 0 432 if (ifp->if_bpf) 433 bpf_mtap(ifp->if_bpf, m); 434 #endif 435 (*ifp->if_input)(ifp, m); 436 } 437 438 if (csr & ZE_NICSR5_TI) { 439 while ((zc->zc_xmit[sc->sc_lastack].ze_tdr & ZE_TDR_OW) == 0) { 440 int idx = sc->sc_lastack; 441 442 if (sc->sc_lastack == sc->sc_nexttx) 443 break; 444 sc->sc_inq--; 445 if (++sc->sc_lastack == TXDESCS) 446 sc->sc_lastack = 0; 447 448 if ((zc->zc_xmit[idx].ze_tdes1 & ZE_TDES1_DT) == 449 ZE_TDES1_DT_SETUP) 450 continue; 451 /* XXX collect statistics */ 452 if (zc->zc_xmit[idx].ze_tdes1 & ZE_TDES1_LS) 453 ifp->if_opackets++; 454 bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[idx]); 455 if (sc->sc_txmbuf[idx]) { 456 m_freem(sc->sc_txmbuf[idx]); 457 sc->sc_txmbuf[idx] = 0; 458 } 459 } 460 if (sc->sc_inq == 0) 461 ifp->if_timer = 0; 462 ifp->if_flags &= ~IFF_OACTIVE; 463 zestart(ifp); /* Put in more in queue */ 464 } 465 return 1; 466 } 467 468 /* 469 * Process an ioctl request. 470 */ 471 int 472 zeioctl(ifp, cmd, data) 473 struct ifnet *ifp; 474 u_long cmd; 475 caddr_t data; 476 { 477 struct ze_softc *sc = ifp->if_softc; 478 struct ifreq *ifr = (struct ifreq *)data; 479 struct ifaddr *ifa = (struct ifaddr *)data; 480 int s = splnet(), error = 0; 481 482 switch (cmd) { 483 484 case SIOCSIFADDR: 485 ifp->if_flags |= IFF_UP; 486 switch(ifa->ifa_addr->sa_family) { 487 #ifdef INET 488 case AF_INET: 489 zeinit(sc); 490 arp_ifinit(ifp, ifa); 491 break; 492 #endif 493 } 494 break; 495 496 case SIOCSIFFLAGS: 497 if ((ifp->if_flags & IFF_UP) == 0 && 498 (ifp->if_flags & IFF_RUNNING) != 0) { 499 /* 500 * If interface is marked down and it is running, 501 * stop it. (by disabling receive mechanism). 502 */ 503 ZE_WCSR(ZE_CSR6, ZE_RCSR(ZE_CSR6) & 504 ~(ZE_NICSR6_ST|ZE_NICSR6_SR)); 505 ifp->if_flags &= ~IFF_RUNNING; 506 } else if ((ifp->if_flags & IFF_UP) != 0 && 507 (ifp->if_flags & IFF_RUNNING) == 0) { 508 /* 509 * If interface it marked up and it is stopped, then 510 * start it. 511 */ 512 zeinit(sc); 513 } else if ((ifp->if_flags & IFF_UP) != 0) { 514 /* 515 * Send a new setup packet to match any new changes. 516 * (Like IFF_PROMISC etc) 517 */ 518 ze_setup(sc); 519 } 520 break; 521 522 case SIOCADDMULTI: 523 case SIOCDELMULTI: 524 /* 525 * Update our multicast list. 526 */ 527 error = (cmd == SIOCADDMULTI) ? 528 ether_addmulti(ifr, &sc->sc_ec): 529 ether_delmulti(ifr, &sc->sc_ec); 530 531 if (error == ENETRESET) { 532 /* 533 * Multicast list has changed; set the hardware filter 534 * accordingly. 535 */ 536 ze_setup(sc); 537 error = 0; 538 } 539 break; 540 541 default: 542 error = EINVAL; 543 544 } 545 splx(s); 546 return (error); 547 } 548 549 /* 550 * Add a receive buffer to the indicated descriptor. 551 */ 552 int 553 ze_add_rxbuf(sc, i) 554 struct ze_softc *sc; 555 int i; 556 { 557 struct mbuf *m; 558 struct ze_rdes *rp; 559 int error; 560 561 MGETHDR(m, M_DONTWAIT, MT_DATA); 562 if (m == NULL) 563 return (ENOBUFS); 564 565 MCLGET(m, M_DONTWAIT); 566 if ((m->m_flags & M_EXT) == 0) { 567 m_freem(m); 568 return (ENOBUFS); 569 } 570 571 if (sc->sc_rxmbuf[i] != NULL) 572 bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]); 573 574 error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i], 575 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 576 if (error) 577 panic("%s: can't load rx DMA map %d, error = %d\n", 578 sc->sc_dev.dv_xname, i, error); 579 sc->sc_rxmbuf[i] = m; 580 581 bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0, 582 sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD); 583 584 /* 585 * We know that the mbuf cluster is page aligned. Also, be sure 586 * that the IP header will be longword aligned. 587 */ 588 m->m_data += 2; 589 rp = &sc->sc_zedata->zc_recv[i]; 590 rp->ze_bufsize = (m->m_ext.ext_size - 2); 591 rp->ze_bufaddr = (char *)sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2; 592 rp->ze_framelen = ZE_FRAMELEN_OW; 593 594 return (0); 595 } 596 597 /* 598 * Create a setup packet and put in queue for sending. 599 */ 600 void 601 ze_setup(sc) 602 struct ze_softc *sc; 603 { 604 struct ether_multi *enm; 605 struct ether_multistep step; 606 struct ze_cdata *zc = sc->sc_zedata; 607 struct ifnet *ifp = &sc->sc_if; 608 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 609 int j, idx, reg; 610 611 if (sc->sc_inq == (TXDESCS - 1)) { 612 sc->sc_setup = 1; 613 return; 614 } 615 sc->sc_setup = 0; 616 /* 617 * Init the setup packet with valid info. 618 */ 619 memset(zc->zc_setup, 0xff, sizeof(zc->zc_setup)); /* Broadcast */ 620 bcopy(enaddr, zc->zc_setup, ETHER_ADDR_LEN); 621 622 /* 623 * Multicast handling. The SGEC can handle up to 16 direct 624 * ethernet addresses. 625 */ 626 j = 16; 627 ifp->if_flags &= ~IFF_ALLMULTI; 628 ETHER_FIRST_MULTI(step, &sc->sc_ec, enm); 629 while (enm != NULL) { 630 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) { 631 ifp->if_flags |= IFF_ALLMULTI; 632 break; 633 } 634 bcopy(enm->enm_addrlo, &zc->zc_setup[j], ETHER_ADDR_LEN); 635 j += 8; 636 ETHER_NEXT_MULTI(step, enm); 637 if ((enm != NULL)&& (j == 128)) { 638 ifp->if_flags |= IFF_ALLMULTI; 639 break; 640 } 641 } 642 643 /* 644 * ALLMULTI implies PROMISC in this driver. 645 */ 646 if (ifp->if_flags & IFF_ALLMULTI) 647 ifp->if_flags |= IFF_PROMISC; 648 else if (ifp->if_pcount == 0) 649 ifp->if_flags &= ~IFF_PROMISC; 650 651 /* 652 * Fiddle with the receive logic. 653 */ 654 reg = ZE_RCSR(ZE_CSR6); 655 DELAY(10); 656 ZE_WCSR(ZE_CSR6, reg & ~ZE_NICSR6_SR); /* Stop rx */ 657 reg &= ~ZE_NICSR6_AF; 658 if (ifp->if_flags & IFF_PROMISC) 659 reg |= ZE_NICSR6_AF_PROM; 660 else if (ifp->if_flags & IFF_ALLMULTI) 661 reg |= ZE_NICSR6_AF_ALLM; 662 DELAY(10); 663 ZE_WCSR(ZE_CSR6, reg); 664 /* 665 * Only send a setup packet if needed. 666 */ 667 if ((ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) == 0) { 668 idx = sc->sc_nexttx; 669 zc->zc_xmit[idx].ze_tdes1 = ZE_TDES1_DT_SETUP; 670 zc->zc_xmit[idx].ze_bufsize = 128; 671 zc->zc_xmit[idx].ze_bufaddr = sc->sc_pzedata->zc_setup; 672 zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW; 673 674 if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN) 675 ZE_WCSR(ZE_CSR1, -1); 676 677 sc->sc_inq++; 678 if (++sc->sc_nexttx == TXDESCS) 679 sc->sc_nexttx = 0; 680 } 681 } 682 683 /* 684 * Check for dead transmit logic. 685 */ 686 void 687 zetimeout(ifp) 688 struct ifnet *ifp; 689 { 690 struct ze_softc *sc = ifp->if_softc; 691 692 if (sc->sc_inq == 0) 693 return; 694 695 printf("%s: xmit logic died, resetting...\n", sc->sc_dev.dv_xname); 696 /* 697 * Do a reset of interface, to get it going again. 698 * Will it work by just restart the transmit logic? 699 */ 700 zeinit(sc); 701 } 702 703 /* 704 * Reset chip: 705 * Set/reset the reset flag. 706 * Write interrupt vector. 707 * Write ring buffer addresses. 708 * Write SBR. 709 */ 710 int 711 zereset(sc) 712 struct ze_softc *sc; 713 { 714 int reg, i; 715 716 ZE_WCSR(ZE_CSR6, ZE_NICSR6_RE); 717 DELAY(50000); 718 if (ZE_RCSR(ZE_CSR6) & ZE_NICSR5_SF) { 719 printf("%s: selftest failed\n", sc->sc_dev.dv_xname); 720 return 1; 721 } 722 723 /* 724 * Get the vector that were set at match time, and remember it. 725 * WHICH VECTOR TO USE? Take one unused. XXX 726 * Funny way to set vector described in the programmers manual. 727 */ 728 reg = ZE_NICSR0_IPL14 | sc->sc_intvec | 0x1fff0003; /* SYNC/ASYNC??? */ 729 i = 10; 730 do { 731 if (i-- == 0) { 732 printf("Failing SGEC CSR0 init\n"); 733 return 1; 734 } 735 ZE_WCSR(ZE_CSR0, reg); 736 } while (ZE_RCSR(ZE_CSR0) != reg); 737 738 ZE_WCSR(ZE_CSR3, (vaddr_t)sc->sc_pzedata->zc_recv); 739 ZE_WCSR(ZE_CSR4, (vaddr_t)sc->sc_pzedata->zc_xmit); 740 return 0; 741 } 742
Indexes created Wed Sep 24 05:09:52 GMT 2025