sgec.c revision 1.9
1 /* $NetBSD: sgec.c,v 1.9 2000/11/14 18:21:02 thorpej Exp $ */ 2 /* 3 * Copyright (c) 1999 Ludd, University of Lule}, Sweden. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 3. All advertising materials mentioning features or use of this software 14 * must display the following acknowledgement: 15 * This product includes software developed at Ludd, University of 16 * Lule}, Sweden and its contributors. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Driver for the SGEC (Second Generation Ethernet Controller), sitting 34 * on for example the VAX 4000/300 (KA670). 35 * 36 * The SGEC looks like a mixture of the DEQNA and the TULIP. Fun toy. 37 * 38 * Even though the chip is capable to use virtual addresses (read the 39 * System Page Table directly) this driver doesn't do so, and there 40 * is no benefit in doing it either in NetBSD of today. 41 * 42 * Things that is still to do: 43 * Collect statistics. 44 * Use imperfect filtering when many multicast addresses. 45 */ 46 47 #include "opt_inet.h" 48 #include "bpfilter.h" 49 50 #include <sys/param.h> 51 #include <sys/mbuf.h> 52 #include <sys/socket.h> 53 #include <sys/device.h> 54 #include <sys/systm.h> 55 #include <sys/sockio.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <net/if.h> 60 #include <net/if_ether.h> 61 #include <net/if_dl.h> 62 63 #include <netinet/in.h> 64 #include <netinet/if_inarp.h> 65 66 #if NBPFILTER > 0 67 #include <net/bpf.h> 68 #include <net/bpfdesc.h> 69 #endif 70 71 #include <machine/bus.h> 72 73 #include <dev/ic/sgecreg.h> 74 #include <dev/ic/sgecvar.h> 75 76 static void zeinit __P((struct ze_softc *)); 77 static void zestart __P((struct ifnet *)); 78 static int zeioctl __P((struct ifnet *, u_long, caddr_t)); 79 static int ze_add_rxbuf __P((struct ze_softc *, int)); 80 static void ze_setup __P((struct ze_softc *)); 81 static void zetimeout __P((struct ifnet *)); 82 static int zereset __P((struct ze_softc *)); 83 84 #define ZE_WCSR(csr, val) \ 85 bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val) 86 #define ZE_RCSR(csr) \ 87 bus_space_read_4(sc->sc_iot, sc->sc_ioh, csr) 88 89 /* 90 * Interface exists: make available by filling in network interface 91 * record. System will initialize the interface when it is ready 92 * to accept packets. 93 */ 94 void 95 sgec_attach(sc) 96 struct ze_softc *sc; 97 { 98 struct ifnet *ifp = (struct ifnet *)&sc->sc_if; 99 struct ze_tdes *tp; 100 struct ze_rdes *rp; 101 bus_dma_segment_t seg; 102 int i, rseg, error; 103 104 /* 105 * Allocate DMA safe memory for descriptors and setup memory. 106 */ 107 if ((error = bus_dmamem_alloc(sc->sc_dmat, 108 sizeof(struct ze_cdata), PAGE_SIZE, 0, &seg, 1, &rseg, 109 BUS_DMA_NOWAIT)) != 0) { 110 printf(": unable to allocate control data, error = %d\n", 111 error); 112 goto fail_0; 113 } 114 115 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, 116 sizeof(struct ze_cdata), (caddr_t *)&sc->sc_zedata, 117 BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) { 118 printf(": unable to map control data, error = %d\n", error); 119 goto fail_1; 120 } 121 122 if ((error = bus_dmamap_create(sc->sc_dmat, 123 sizeof(struct ze_cdata), 1, 124 sizeof(struct ze_cdata), 0, BUS_DMA_NOWAIT, 125 &sc->sc_cmap)) != 0) { 126 printf(": unable to create control data DMA map, error = %d\n", 127 error); 128 goto fail_2; 129 } 130 131 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap, 132 sc->sc_zedata, sizeof(struct ze_cdata), NULL, 133 BUS_DMA_NOWAIT)) != 0) { 134 printf(": unable to load control data DMA map, error = %d\n", 135 error); 136 goto fail_3; 137 } 138 139 /* 140 * Zero the newly allocated memory. 141 */ 142 bzero(sc->sc_zedata, sizeof(struct ze_cdata)); 143 /* 144 * Create the transmit descriptor DMA maps. 145 */ 146 for (i = 0; i < TXDESCS; i++) { 147 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 148 1, MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 149 &sc->sc_xmtmap[i]))) { 150 printf(": unable to create tx DMA map %d, error = %d\n", 151 i, error); 152 goto fail_4; 153 } 154 } 155 156 /* 157 * Create receive buffer DMA maps. 158 */ 159 for (i = 0; i < RXDESCS; i++) { 160 if ((error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 161 MCLBYTES, 0, BUS_DMA_NOWAIT, 162 &sc->sc_rcvmap[i]))) { 163 printf(": unable to create rx DMA map %d, error = %d\n", 164 i, error); 165 goto fail_5; 166 } 167 } 168 /* 169 * Pre-allocate the receive buffers. 170 */ 171 for (i = 0; i < RXDESCS; i++) { 172 if ((error = ze_add_rxbuf(sc, i)) != 0) { 173 printf(": unable to allocate or map rx buffer %d\n," 174 " error = %d\n", i, error); 175 goto fail_6; 176 } 177 } 178 179 /* For vmstat -i 180 */ 181 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 182 sc->sc_dev.dv_xname, "intr"); 183 184 /* 185 * Create ring loops of the buffer chains. 186 * This is only done once. 187 */ 188 sc->sc_pzedata = (struct ze_cdata *)sc->sc_cmap->dm_segs[0].ds_addr; 189 190 rp = sc->sc_zedata->zc_recv; 191 rp[RXDESCS].ze_framelen = ZE_FRAMELEN_OW; 192 rp[RXDESCS].ze_rdes1 = ZE_RDES1_CA; 193 rp[RXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_recv; 194 195 tp = sc->sc_zedata->zc_xmit; 196 tp[TXDESCS].ze_tdr = ZE_TDR_OW; 197 tp[TXDESCS].ze_tdes1 = ZE_TDES1_CA; 198 tp[TXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_xmit; 199 200 if (zereset(sc)) 201 return; 202 203 strcpy(ifp->if_xname, sc->sc_dev.dv_xname); 204 ifp->if_softc = sc; 205 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 206 ifp->if_start = zestart; 207 ifp->if_ioctl = zeioctl; 208 ifp->if_watchdog = zetimeout; 209 210 /* 211 * Attach the interface. 212 */ 213 if_attach(ifp); 214 ether_ifattach(ifp, sc->sc_enaddr); 215 216 #if NBPFILTER > 0 217 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header)); 218 #endif 219 printf("\n%s: hardware address %s\n", sc->sc_dev.dv_xname, 220 ether_sprintf(sc->sc_enaddr)); 221 return; 222 223 /* 224 * Free any resources we've allocated during the failed attach 225 * attempt. Do this in reverse order and fall through. 226 */ 227 fail_6: 228 for (i = 0; i < RXDESCS; i++) { 229 if (sc->sc_rxmbuf[i] != NULL) { 230 bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]); 231 m_freem(sc->sc_rxmbuf[i]); 232 } 233 } 234 fail_5: 235 for (i = 0; i < RXDESCS; i++) { 236 if (sc->sc_xmtmap[i] != NULL) 237 bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]); 238 } 239 fail_4: 240 for (i = 0; i < TXDESCS; i++) { 241 if (sc->sc_rcvmap[i] != NULL) 242 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]); 243 } 244 bus_dmamap_unload(sc->sc_dmat, sc->sc_cmap); 245 fail_3: 246 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap); 247 fail_2: 248 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->sc_zedata, 249 sizeof(struct ze_cdata)); 250 fail_1: 251 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 252 fail_0: 253 return; 254 } 255 256 /* 257 * Initialization of interface. 258 */ 259 void 260 zeinit(sc) 261 struct ze_softc *sc; 262 { 263 struct ifnet *ifp = (struct ifnet *)&sc->sc_if; 264 struct ze_cdata *zc = sc->sc_zedata; 265 int i; 266 267 /* 268 * Reset the interface. 269 */ 270 if (zereset(sc)) 271 return; 272 273 sc->sc_nexttx = sc->sc_inq = sc->sc_lastack = 0; 274 /* 275 * Release and init transmit descriptors. 276 */ 277 for (i = 0; i < TXDESCS; i++) { 278 if (sc->sc_txmbuf[i]) { 279 bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]); 280 m_freem(sc->sc_txmbuf[i]); 281 sc->sc_txmbuf[i] = 0; 282 } 283 zc->zc_xmit[i].ze_tdr = 0; /* Clear valid bit */ 284 } 285 286 287 /* 288 * Init receive descriptors. 289 */ 290 for (i = 0; i < RXDESCS; i++) 291 zc->zc_recv[i].ze_framelen = ZE_FRAMELEN_OW; 292 sc->sc_nextrx = 0; 293 294 ZE_WCSR(ZE_CSR6, ZE_NICSR6_IE|ZE_NICSR6_BL_8|ZE_NICSR6_ST| 295 ZE_NICSR6_SR|ZE_NICSR6_DC); 296 297 ifp->if_flags |= IFF_RUNNING; 298 ifp->if_flags &= ~IFF_OACTIVE; 299 300 /* 301 * Send a setup frame. 302 * This will start the transmit machinery as well. 303 */ 304 ze_setup(sc); 305 306 } 307 308 /* 309 * Start output on interface. 310 */ 311 void 312 zestart(ifp) 313 struct ifnet *ifp; 314 { 315 struct ze_softc *sc = ifp->if_softc; 316 struct ze_cdata *zc = sc->sc_zedata; 317 paddr_t buffer; 318 struct mbuf *m, *m0; 319 int idx, len, s, i, totlen, error; 320 int old_inq = sc->sc_inq; 321 short orword; 322 323 s = splimp(); 324 while (sc->sc_inq < (TXDESCS - 1)) { 325 326 if (sc->sc_setup) { 327 ze_setup(sc); 328 continue; 329 } 330 idx = sc->sc_nexttx; 331 IF_DEQUEUE(&sc->sc_if.if_snd, m); 332 if (m == 0) 333 goto out; 334 /* 335 * Count number of mbufs in chain. 336 * Always do DMA directly from mbufs, therefore the transmit 337 * ring is really big. 338 */ 339 for (m0 = m, i = 0; m0; m0 = m0->m_next) 340 if (m0->m_len) 341 i++; 342 if (i >= TXDESCS) 343 panic("zestart"); /* XXX */ 344 345 if ((i + sc->sc_inq) >= (TXDESCS - 1)) { 346 IF_PREPEND(&sc->sc_if.if_snd, m); 347 ifp->if_flags |= IFF_OACTIVE; 348 goto out; 349 } 350 351 #if NBPFILTER > 0 352 if (ifp->if_bpf) 353 bpf_mtap(ifp->if_bpf, m); 354 #endif 355 /* 356 * m now points to a mbuf chain that can be loaded. 357 * Loop around and set it. 358 */ 359 totlen = 0; 360 for (m0 = m; m0; m0 = m0->m_next) { 361 error = bus_dmamap_load(sc->sc_dmat, sc->sc_xmtmap[idx], 362 mtod(m0, void *), m0->m_len, 0, 0); 363 buffer = sc->sc_xmtmap[idx]->dm_segs[0].ds_addr; 364 len = m0->m_len; 365 if (len == 0) 366 continue; 367 368 totlen += len; 369 /* Word alignment calc */ 370 orword = 0; 371 if (totlen == len) 372 orword = ZE_TDES1_FS; 373 if (totlen == m->m_pkthdr.len) { 374 if (totlen < ETHER_MIN_LEN) 375 len += (ETHER_MIN_LEN - totlen); 376 orword |= ZE_TDES1_LS; 377 sc->sc_txmbuf[idx] = m; 378 } 379 zc->zc_xmit[idx].ze_bufsize = len; 380 zc->zc_xmit[idx].ze_bufaddr = (char *)buffer; 381 zc->zc_xmit[idx].ze_tdes1 = orword | ZE_TDES1_IC; 382 zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW; 383 384 if (++idx == TXDESCS) 385 idx = 0; 386 sc->sc_inq++; 387 } 388 #ifdef DIAGNOSTIC 389 if (totlen != m->m_pkthdr.len) 390 panic("zestart: len fault"); 391 #endif 392 393 /* 394 * Kick off the transmit logic, if it is stopped. 395 */ 396 if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN) 397 ZE_WCSR(ZE_CSR1, -1); 398 sc->sc_nexttx = idx; 399 } 400 if (sc->sc_inq == (TXDESCS - 1)) 401 ifp->if_flags |= IFF_OACTIVE; 402 403 out: if (old_inq < sc->sc_inq) 404 ifp->if_timer = 5; /* If transmit logic dies */ 405 splx(s); 406 } 407 408 int 409 sgec_intr(sc) 410 struct ze_softc *sc; 411 { 412 struct ze_cdata *zc = sc->sc_zedata; 413 struct ifnet *ifp = &sc->sc_if; 414 struct mbuf *m; 415 int csr, len; 416 417 csr = ZE_RCSR(ZE_CSR5); 418 if ((csr & ZE_NICSR5_IS) == 0) /* Wasn't we */ 419 return 0; 420 ZE_WCSR(ZE_CSR5, csr); 421 422 if (csr & ZE_NICSR5_RI) 423 while ((zc->zc_recv[sc->sc_nextrx].ze_framelen & 424 ZE_FRAMELEN_OW) == 0) { 425 426 ifp->if_ipackets++; 427 m = sc->sc_rxmbuf[sc->sc_nextrx]; 428 len = zc->zc_recv[sc->sc_nextrx].ze_framelen; 429 ze_add_rxbuf(sc, sc->sc_nextrx); 430 m->m_pkthdr.rcvif = ifp; 431 m->m_pkthdr.len = m->m_len = len; 432 m->m_flags |= M_HASFCS; 433 if (++sc->sc_nextrx == RXDESCS) 434 sc->sc_nextrx = 0; 435 #if NBPFILTER > 0 436 if (ifp->if_bpf) 437 bpf_mtap(ifp->if_bpf, m); 438 #endif 439 (*ifp->if_input)(ifp, m); 440 } 441 442 if (csr & ZE_NICSR5_TI) { 443 while ((zc->zc_xmit[sc->sc_lastack].ze_tdr & ZE_TDR_OW) == 0) { 444 int idx = sc->sc_lastack; 445 446 if (sc->sc_lastack == sc->sc_nexttx) 447 break; 448 sc->sc_inq--; 449 if (++sc->sc_lastack == TXDESCS) 450 sc->sc_lastack = 0; 451 452 if ((zc->zc_xmit[idx].ze_tdes1 & ZE_TDES1_DT) == 453 ZE_TDES1_DT_SETUP) 454 continue; 455 /* XXX collect statistics */ 456 if (zc->zc_xmit[idx].ze_tdes1 & ZE_TDES1_LS) 457 ifp->if_opackets++; 458 bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[idx]); 459 if (sc->sc_txmbuf[idx]) { 460 m_freem(sc->sc_txmbuf[idx]); 461 sc->sc_txmbuf[idx] = 0; 462 } 463 } 464 if (sc->sc_inq == 0) 465 ifp->if_timer = 0; 466 ifp->if_flags &= ~IFF_OACTIVE; 467 zestart(ifp); /* Put in more in queue */ 468 } 469 return 1; 470 } 471 472 /* 473 * Process an ioctl request. 474 */ 475 int 476 zeioctl(ifp, cmd, data) 477 struct ifnet *ifp; 478 u_long cmd; 479 caddr_t data; 480 { 481 struct ze_softc *sc = ifp->if_softc; 482 struct ifreq *ifr = (struct ifreq *)data; 483 struct ifaddr *ifa = (struct ifaddr *)data; 484 int s = splnet(), error = 0; 485 486 switch (cmd) { 487 488 case SIOCSIFADDR: 489 ifp->if_flags |= IFF_UP; 490 switch(ifa->ifa_addr->sa_family) { 491 #ifdef INET 492 case AF_INET: 493 zeinit(sc); 494 arp_ifinit(ifp, ifa); 495 break; 496 #endif 497 } 498 break; 499 500 case SIOCSIFFLAGS: 501 if ((ifp->if_flags & IFF_UP) == 0 && 502 (ifp->if_flags & IFF_RUNNING) != 0) { 503 /* 504 * If interface is marked down and it is running, 505 * stop it. (by disabling receive mechanism). 506 */ 507 ZE_WCSR(ZE_CSR6, ZE_RCSR(ZE_CSR6) & 508 ~(ZE_NICSR6_ST|ZE_NICSR6_SR)); 509 ifp->if_flags &= ~IFF_RUNNING; 510 } else if ((ifp->if_flags & IFF_UP) != 0 && 511 (ifp->if_flags & IFF_RUNNING) == 0) { 512 /* 513 * If interface it marked up and it is stopped, then 514 * start it. 515 */ 516 zeinit(sc); 517 } else if ((ifp->if_flags & IFF_UP) != 0) { 518 /* 519 * Send a new setup packet to match any new changes. 520 * (Like IFF_PROMISC etc) 521 */ 522 ze_setup(sc); 523 } 524 break; 525 526 case SIOCADDMULTI: 527 case SIOCDELMULTI: 528 /* 529 * Update our multicast list. 530 */ 531 error = (cmd == SIOCADDMULTI) ? 532 ether_addmulti(ifr, &sc->sc_ec): 533 ether_delmulti(ifr, &sc->sc_ec); 534 535 if (error == ENETRESET) { 536 /* 537 * Multicast list has changed; set the hardware filter 538 * accordingly. 539 */ 540 ze_setup(sc); 541 error = 0; 542 } 543 break; 544 545 default: 546 error = EINVAL; 547 548 } 549 splx(s); 550 return (error); 551 } 552 553 /* 554 * Add a receive buffer to the indicated descriptor. 555 */ 556 int 557 ze_add_rxbuf(sc, i) 558 struct ze_softc *sc; 559 int i; 560 { 561 struct mbuf *m; 562 struct ze_rdes *rp; 563 int error; 564 565 MGETHDR(m, M_DONTWAIT, MT_DATA); 566 if (m == NULL) 567 return (ENOBUFS); 568 569 MCLGET(m, M_DONTWAIT); 570 if ((m->m_flags & M_EXT) == 0) { 571 m_freem(m); 572 return (ENOBUFS); 573 } 574 575 if (sc->sc_rxmbuf[i] != NULL) 576 bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]); 577 578 error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i], 579 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, BUS_DMA_NOWAIT); 580 if (error) 581 panic("%s: can't load rx DMA map %d, error = %d\n", 582 sc->sc_dev.dv_xname, i, error); 583 sc->sc_rxmbuf[i] = m; 584 585 bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0, 586 sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD); 587 588 /* 589 * We know that the mbuf cluster is page aligned. Also, be sure 590 * that the IP header will be longword aligned. 591 */ 592 m->m_data += 2; 593 rp = &sc->sc_zedata->zc_recv[i]; 594 rp->ze_bufsize = (m->m_ext.ext_size - 2); 595 rp->ze_bufaddr = (char *)sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2; 596 rp->ze_framelen = ZE_FRAMELEN_OW; 597 598 return (0); 599 } 600 601 /* 602 * Create a setup packet and put in queue for sending. 603 */ 604 void 605 ze_setup(sc) 606 struct ze_softc *sc; 607 { 608 struct ether_multi *enm; 609 struct ether_multistep step; 610 struct ze_cdata *zc = sc->sc_zedata; 611 struct ifnet *ifp = &sc->sc_if; 612 u_int8_t *enaddr = LLADDR(ifp->if_sadl); 613 int j, idx, s, reg; 614 615 s = splimp(); 616 if (sc->sc_inq == (TXDESCS - 1)) { 617 sc->sc_setup = 1; 618 splx(s); 619 return; 620 } 621 sc->sc_setup = 0; 622 /* 623 * Init the setup packet with valid info. 624 */ 625 memset(zc->zc_setup, 0xff, sizeof(zc->zc_setup)); /* Broadcast */ 626 bcopy(enaddr, zc->zc_setup, ETHER_ADDR_LEN); 627 628 /* 629 * Multicast handling. The SGEC can handle up to 16 direct 630 * ethernet addresses. 631 */ 632 j = 16; 633 ifp->if_flags &= ~IFF_ALLMULTI; 634 ETHER_FIRST_MULTI(step, &sc->sc_ec, enm); 635 while (enm != NULL) { 636 if (bcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) { 637 ifp->if_flags |= IFF_ALLMULTI; 638 break; 639 } 640 bcopy(enm->enm_addrlo, &zc->zc_setup[j], ETHER_ADDR_LEN); 641 j += 8; 642 ETHER_NEXT_MULTI(step, enm); 643 if ((enm != NULL)&& (j == 128)) { 644 ifp->if_flags |= IFF_ALLMULTI; 645 break; 646 } 647 } 648 649 /* 650 * ALLMULTI implies PROMISC in this driver. 651 */ 652 if (ifp->if_flags & IFF_ALLMULTI) 653 ifp->if_flags |= IFF_PROMISC; 654 else if (ifp->if_pcount == 0) 655 ifp->if_flags &= ~IFF_PROMISC; 656 657 /* 658 * Fiddle with the receive logic. 659 */ 660 reg = ZE_RCSR(ZE_CSR6); 661 DELAY(10); 662 ZE_WCSR(ZE_CSR6, reg & ~ZE_NICSR6_SR); /* Stop rx */ 663 reg &= ~ZE_NICSR6_AF; 664 if (ifp->if_flags & IFF_PROMISC) 665 reg |= ZE_NICSR6_AF_PROM; 666 else if (ifp->if_flags & IFF_ALLMULTI) 667 reg |= ZE_NICSR6_AF_ALLM; 668 DELAY(10); 669 ZE_WCSR(ZE_CSR6, reg); 670 /* 671 * Only send a setup packet if needed. 672 */ 673 if ((ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) == 0) { 674 idx = sc->sc_nexttx; 675 zc->zc_xmit[idx].ze_tdes1 = ZE_TDES1_DT_SETUP; 676 zc->zc_xmit[idx].ze_bufsize = 128; 677 zc->zc_xmit[idx].ze_bufaddr = sc->sc_pzedata->zc_setup; 678 zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW; 679 680 if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN) 681 ZE_WCSR(ZE_CSR1, -1); 682 683 sc->sc_inq++; 684 if (++sc->sc_nexttx == TXDESCS) 685 sc->sc_nexttx = 0; 686 } 687 splx(s); 688 } 689 690 /* 691 * Check for dead transmit logic. 692 */ 693 void 694 zetimeout(ifp) 695 struct ifnet *ifp; 696 { 697 struct ze_softc *sc = ifp->if_softc; 698 699 if (sc->sc_inq == 0) 700 return; 701 702 printf("%s: xmit logic died, resetting...\n", sc->sc_dev.dv_xname); 703 /* 704 * Do a reset of interface, to get it going again. 705 * Will it work by just restart the transmit logic? 706 */ 707 zeinit(sc); 708 } 709 710 /* 711 * Reset chip: 712 * Set/reset the reset flag. 713 * Write interrupt vector. 714 * Write ring buffer addresses. 715 * Write SBR. 716 */ 717 int 718 zereset(sc) 719 struct ze_softc *sc; 720 { 721 int reg, i, s; 722 723 ZE_WCSR(ZE_CSR6, ZE_NICSR6_RE); 724 DELAY(50000); 725 if (ZE_RCSR(ZE_CSR6) & ZE_NICSR5_SF) { 726 printf("%s: selftest failed\n", sc->sc_dev.dv_xname); 727 return 1; 728 } 729 730 /* 731 * Get the vector that were set at match time, and remember it. 732 * WHICH VECTOR TO USE? Take one unused. XXX 733 * Funny way to set vector described in the programmers manual. 734 */ 735 reg = ZE_NICSR0_IPL14 | sc->sc_intvec | 0x1fff0003; /* SYNC/ASYNC??? */ 736 i = 10; 737 s = splimp(); 738 do { 739 if (i-- == 0) { 740 printf("Failing SGEC CSR0 init\n"); 741 splx(s); 742 return 1; 743 } 744 ZE_WCSR(ZE_CSR0, reg); 745 } while (ZE_RCSR(ZE_CSR0) != reg); 746 splx(s); 747 748 ZE_WCSR(ZE_CSR3, (vaddr_t)sc->sc_pzedata->zc_recv); 749 ZE_WCSR(ZE_CSR4, (vaddr_t)sc->sc_pzedata->zc_xmit); 750 return 0; 751 } 752
Indexes created Sat Sep 27 22:09:54 GMT 2025