siisata.c revision 1.23 1 1.23 jakllsch /* $NetBSD: siisata.c,v 1.23 2012/10/22 16:43:05 jakllsch Exp $ */
2 1.1 jnemeth
3 1.1 jnemeth /* from ahcisata_core.c */
4 1.1 jnemeth
5 1.1 jnemeth /*
6 1.1 jnemeth * Copyright (c) 2006 Manuel Bouyer.
7 1.1 jnemeth *
8 1.1 jnemeth * Redistribution and use in source and binary forms, with or without
9 1.1 jnemeth * modification, are permitted provided that the following conditions
10 1.1 jnemeth * are met:
11 1.1 jnemeth * 1. Redistributions of source code must retain the above copyright
12 1.1 jnemeth * notice, this list of conditions and the following disclaimer.
13 1.1 jnemeth * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 jnemeth * notice, this list of conditions and the following disclaimer in the
15 1.1 jnemeth * documentation and/or other materials provided with the distribution.
16 1.1 jnemeth *
17 1.1 jnemeth * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 1.1 jnemeth * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 1.1 jnemeth * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 1.1 jnemeth * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 1.1 jnemeth * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 1.1 jnemeth * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 1.1 jnemeth * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 1.1 jnemeth * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 1.1 jnemeth * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 1.1 jnemeth * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 jnemeth *
28 1.1 jnemeth */
29 1.1 jnemeth
30 1.1 jnemeth /* from atapi_wdc.c */
31 1.1 jnemeth
32 1.1 jnemeth /*
33 1.1 jnemeth * Copyright (c) 1998, 2001 Manuel Bouyer.
34 1.1 jnemeth *
35 1.1 jnemeth * Redistribution and use in source and binary forms, with or without
36 1.1 jnemeth * modification, are permitted provided that the following conditions
37 1.1 jnemeth * are met:
38 1.1 jnemeth * 1. Redistributions of source code must retain the above copyright
39 1.1 jnemeth * notice, this list of conditions and the following disclaimer.
40 1.1 jnemeth * 2. Redistributions in binary form must reproduce the above copyright
41 1.1 jnemeth * notice, this list of conditions and the following disclaimer in the
42 1.1 jnemeth * documentation and/or other materials provided with the distribution.
43 1.1 jnemeth *
44 1.1 jnemeth * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
45 1.1 jnemeth * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
46 1.1 jnemeth * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
47 1.1 jnemeth * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
48 1.1 jnemeth * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
49 1.1 jnemeth * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
50 1.1 jnemeth * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
51 1.1 jnemeth * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
52 1.1 jnemeth * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
53 1.1 jnemeth * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 1.1 jnemeth */
55 1.1 jnemeth
56 1.9 jakllsch /*
57 1.10 jakllsch * Copyright (c) 2007, 2008, 2009, 2010 Jonathan A. Kollasch.
58 1.1 jnemeth * All rights reserved.
59 1.1 jnemeth *
60 1.1 jnemeth * Redistribution and use in source and binary forms, with or without
61 1.1 jnemeth * modification, are permitted provided that the following conditions
62 1.1 jnemeth * are met:
63 1.1 jnemeth * 1. Redistributions of source code must retain the above copyright
64 1.1 jnemeth * notice, this list of conditions and the following disclaimer.
65 1.1 jnemeth * 2. Redistributions in binary form must reproduce the above copyright
66 1.1 jnemeth * notice, this list of conditions and the following disclaimer in the
67 1.1 jnemeth * documentation and/or other materials provided with the distribution.
68 1.1 jnemeth *
69 1.1 jnemeth * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
70 1.1 jnemeth * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
71 1.1 jnemeth * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
72 1.1 jnemeth * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
73 1.1 jnemeth * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
74 1.1 jnemeth * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
75 1.1 jnemeth * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
76 1.1 jnemeth * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
77 1.1 jnemeth * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
78 1.1 jnemeth * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
79 1.1 jnemeth */
80 1.1 jnemeth
81 1.9 jakllsch #include <sys/cdefs.h>
82 1.23 jakllsch __KERNEL_RCSID(0, "$NetBSD: siisata.c,v 1.23 2012/10/22 16:43:05 jakllsch Exp $");
83 1.9 jakllsch
84 1.1 jnemeth #include <sys/types.h>
85 1.1 jnemeth #include <sys/malloc.h>
86 1.1 jnemeth #include <sys/param.h>
87 1.1 jnemeth #include <sys/kernel.h>
88 1.1 jnemeth #include <sys/systm.h>
89 1.1 jnemeth #include <sys/syslog.h>
90 1.1 jnemeth #include <sys/disklabel.h>
91 1.1 jnemeth #include <sys/buf.h>
92 1.13 uebayasi #include <sys/proc.h>
93 1.1 jnemeth
94 1.1 jnemeth #include <dev/ata/atareg.h>
95 1.1 jnemeth #include <dev/ata/satavar.h>
96 1.1 jnemeth #include <dev/ata/satareg.h>
97 1.3 jakllsch #include <dev/ata/satafisvar.h>
98 1.10 jakllsch #include <dev/ata/satafisreg.h>
99 1.22 bouyer #include <dev/ata/satapmpreg.h>
100 1.1 jnemeth #include <dev/ic/siisatavar.h>
101 1.10 jakllsch #include <dev/ic/siisatareg.h>
102 1.3 jakllsch
103 1.3 jakllsch #include <dev/scsipi/scsi_all.h> /* for SCSI status */
104 1.1 jnemeth
105 1.1 jnemeth #include "atapibus.h"
106 1.1 jnemeth
107 1.1 jnemeth #ifdef SIISATA_DEBUG
108 1.1 jnemeth int siisata_debug_mask = 0;
109 1.1 jnemeth #endif
110 1.1 jnemeth
111 1.1 jnemeth #define ATA_DELAY 10000 /* 10s for a drive I/O */
112 1.1 jnemeth
113 1.23 jakllsch #ifndef __BUS_SPACE_HAS_STREAM_METHODS
114 1.23 jakllsch #if _BYTE_ORDER == _LITTLE_ENDIAN
115 1.23 jakllsch #define bus_space_read_stream_4 bus_space_read_4
116 1.23 jakllsch #define bus_space_read_region_stream_4 bus_space_read_region_4
117 1.23 jakllsch #else
118 1.23 jakllsch static inline uint32_t
119 1.23 jakllsch bus_space_read_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o)
120 1.23 jakllsch {
121 1.23 jakllsch return htole32(bus_space_read_4(t, h, o);
122 1.23 jakllsch }
123 1.23 jakllsch
124 1.23 jakllsch static inline void
125 1.23 jakllsch bus_space_read_region_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o, uint32_t *p, bus_size_t c)
126 1.23 jakllsch {
127 1.23 jakllsch bus_space_read_region_4(t, h, o, p, c);
128 1.23 jakllsch for (bus_size_t i = 0; i < c; i++) {
129 1.23 jakllsch p[i] = htole32(p[i]);
130 1.23 jakllsch }
131 1.23 jakllsch }
132 1.23 jakllsch #endif
133 1.23 jakllsch #endif
134 1.23 jakllsch
135 1.1 jnemeth static void siisata_attach_port(struct siisata_softc *, int);
136 1.3 jakllsch static void siisata_intr_port(struct siisata_channel *);
137 1.1 jnemeth
138 1.1 jnemeth void siisata_probe_drive(struct ata_channel *);
139 1.1 jnemeth void siisata_setup_channel(struct ata_channel *);
140 1.1 jnemeth
141 1.1 jnemeth int siisata_ata_bio(struct ata_drive_datas *, struct ata_bio *);
142 1.22 bouyer void siisata_reset_drive(struct ata_drive_datas *, int, uint32_t *);
143 1.1 jnemeth void siisata_reset_channel(struct ata_channel *, int);
144 1.1 jnemeth int siisata_ata_addref(struct ata_drive_datas *);
145 1.1 jnemeth void siisata_ata_delref(struct ata_drive_datas *);
146 1.1 jnemeth void siisata_killpending(struct ata_drive_datas *);
147 1.1 jnemeth
148 1.1 jnemeth void siisata_cmd_start(struct ata_channel *, struct ata_xfer *);
149 1.1 jnemeth int siisata_cmd_complete(struct ata_channel *, struct ata_xfer *, int);
150 1.1 jnemeth void siisata_cmd_done(struct ata_channel *, struct ata_xfer *, int);
151 1.1 jnemeth void siisata_cmd_kill_xfer(struct ata_channel *, struct ata_xfer *, int);
152 1.1 jnemeth
153 1.1 jnemeth void siisata_bio_start(struct ata_channel *, struct ata_xfer *);
154 1.1 jnemeth int siisata_bio_complete(struct ata_channel *, struct ata_xfer *, int);
155 1.1 jnemeth void siisata_bio_kill_xfer(struct ata_channel *, struct ata_xfer *, int);
156 1.1 jnemeth int siisata_exec_command(struct ata_drive_datas *, struct ata_command *);
157 1.1 jnemeth
158 1.1 jnemeth void siisata_timeout(void *);
159 1.1 jnemeth
160 1.2 jakllsch static void siisata_reinit_port(struct ata_channel *);
161 1.2 jakllsch static void siisata_device_reset(struct ata_channel *);
162 1.2 jakllsch static void siisata_activate_prb(struct siisata_channel *, int);
163 1.2 jakllsch static void siisata_deactivate_prb(struct siisata_channel *, int);
164 1.1 jnemeth static int siisata_dma_setup(struct ata_channel *chp, int slot,
165 1.1 jnemeth void *data, size_t, int);
166 1.1 jnemeth
167 1.1 jnemeth #if NATAPIBUS > 0
168 1.1 jnemeth void siisata_atapibus_attach(struct atabus_softc *);
169 1.1 jnemeth void siisata_atapi_probe_device(struct atapibus_softc *, int);
170 1.1 jnemeth void siisata_atapi_minphys(struct buf *);
171 1.1 jnemeth void siisata_atapi_start(struct ata_channel *,struct ata_xfer *);
172 1.2 jakllsch int siisata_atapi_complete(struct ata_channel *, struct ata_xfer *, int);
173 1.1 jnemeth void siisata_atapi_kill_xfer(struct ata_channel *, struct ata_xfer *, int);
174 1.1 jnemeth void siisata_atapi_done(struct ata_channel *, struct ata_xfer *, int);
175 1.1 jnemeth void siisata_atapi_scsipi_request(struct scsipi_channel *,
176 1.1 jnemeth scsipi_adapter_req_t, void *);
177 1.1 jnemeth void siisata_atapi_kill_pending(struct scsipi_periph *);
178 1.1 jnemeth #endif /* NATAPIBUS */
179 1.1 jnemeth
180 1.1 jnemeth const struct ata_bustype siisata_ata_bustype = {
181 1.1 jnemeth SCSIPI_BUSTYPE_ATA,
182 1.1 jnemeth siisata_ata_bio,
183 1.1 jnemeth siisata_reset_drive,
184 1.1 jnemeth siisata_reset_channel,
185 1.1 jnemeth siisata_exec_command,
186 1.1 jnemeth ata_get_params,
187 1.1 jnemeth siisata_ata_addref,
188 1.1 jnemeth siisata_ata_delref,
189 1.1 jnemeth siisata_killpending
190 1.1 jnemeth };
191 1.1 jnemeth
192 1.1 jnemeth #if NATAPIBUS > 0
193 1.1 jnemeth static const struct scsipi_bustype siisata_atapi_bustype = {
194 1.1 jnemeth SCSIPI_BUSTYPE_ATAPI,
195 1.1 jnemeth atapi_scsipi_cmd,
196 1.1 jnemeth atapi_interpret_sense,
197 1.1 jnemeth atapi_print_addr,
198 1.16 bouyer siisata_atapi_kill_pending,
199 1.16 bouyer NULL,
200 1.1 jnemeth };
201 1.1 jnemeth #endif /* NATAPIBUS */
202 1.1 jnemeth
203 1.1 jnemeth
204 1.1 jnemeth void
205 1.1 jnemeth siisata_attach(struct siisata_softc *sc)
206 1.1 jnemeth {
207 1.1 jnemeth int i;
208 1.1 jnemeth
209 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n",
210 1.1 jnemeth SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)), DEBUG_FUNCS);
211 1.1 jnemeth
212 1.1 jnemeth sc->sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA;
213 1.1 jnemeth sc->sc_atac.atac_pio_cap = 4;
214 1.1 jnemeth sc->sc_atac.atac_dma_cap = 2;
215 1.1 jnemeth sc->sc_atac.atac_udma_cap = 6;
216 1.1 jnemeth sc->sc_atac.atac_channels = sc->sc_chanarray;
217 1.1 jnemeth sc->sc_atac.atac_probe = siisata_probe_drive;
218 1.1 jnemeth sc->sc_atac.atac_bustype_ata = &siisata_ata_bustype;
219 1.1 jnemeth sc->sc_atac.atac_set_modes = siisata_setup_channel;
220 1.1 jnemeth #if NATAPIBUS > 0
221 1.1 jnemeth sc->sc_atac.atac_atapibus_attach = siisata_atapibus_attach;
222 1.2 jakllsch #endif
223 1.2 jakllsch
224 1.2 jakllsch /* come out of reset state */
225 1.2 jakllsch GRWRITE(sc, GR_GC, 0);
226 1.1 jnemeth
227 1.1 jnemeth for (i = 0; i < sc->sc_atac.atac_nchannels; i++) {
228 1.1 jnemeth siisata_attach_port(sc, i);
229 1.1 jnemeth }
230 1.1 jnemeth
231 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n",
232 1.1 jnemeth SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)),
233 1.1 jnemeth DEBUG_FUNCS);
234 1.1 jnemeth return;
235 1.1 jnemeth }
236 1.1 jnemeth
237 1.1 jnemeth static void
238 1.17 bouyer siisata_disable_port_interrupt(struct ata_channel *chp)
239 1.17 bouyer {
240 1.17 bouyer struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
241 1.17 bouyer
242 1.17 bouyer PRWRITE(sc, PRX(chp->ch_channel, PRO_PIEC), 0xffffffff);
243 1.17 bouyer }
244 1.17 bouyer
245 1.17 bouyer static void
246 1.17 bouyer siisata_enable_port_interrupt(struct ata_channel *chp)
247 1.17 bouyer {
248 1.17 bouyer struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
249 1.17 bouyer
250 1.17 bouyer /* clear any interrupts */
251 1.17 bouyer (void)PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
252 1.17 bouyer PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff);
253 1.17 bouyer /* and enable CmdErrr+CmdCmpl interrupting */
254 1.17 bouyer PRWRITE(sc, PRX(chp->ch_channel, PRO_PIES),
255 1.17 bouyer PR_PIS_CMDERRR | PR_PIS_CMDCMPL);
256 1.17 bouyer }
257 1.17 bouyer
258 1.17 bouyer static void
259 1.1 jnemeth siisata_init_port(struct siisata_softc *sc, int port)
260 1.1 jnemeth {
261 1.1 jnemeth struct siisata_channel *schp;
262 1.1 jnemeth struct ata_channel *chp;
263 1.1 jnemeth
264 1.1 jnemeth schp = &sc->sc_channels[port];
265 1.1 jnemeth chp = (struct ata_channel *)schp;
266 1.1 jnemeth
267 1.1 jnemeth /* come out of reset, 64-bit activation */
268 1.1 jnemeth PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC),
269 1.1 jnemeth PR_PC_32BA | PR_PC_PORT_RESET);
270 1.1 jnemeth /* initialize port */
271 1.2 jakllsch siisata_reinit_port(chp);
272 1.1 jnemeth /* enable CmdErrr+CmdCmpl interrupting */
273 1.17 bouyer siisata_enable_port_interrupt(chp);
274 1.1 jnemeth /* enable port interrupt */
275 1.1 jnemeth GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel));
276 1.1 jnemeth }
277 1.1 jnemeth
278 1.1 jnemeth static void
279 1.1 jnemeth siisata_attach_port(struct siisata_softc *sc, int port)
280 1.1 jnemeth {
281 1.1 jnemeth int j;
282 1.1 jnemeth int dmasize;
283 1.1 jnemeth int error;
284 1.1 jnemeth void *prbp;
285 1.1 jnemeth struct siisata_channel *schp;
286 1.1 jnemeth struct ata_channel *chp;
287 1.1 jnemeth
288 1.1 jnemeth schp = &sc->sc_channels[port];
289 1.1 jnemeth chp = (struct ata_channel *)schp;
290 1.1 jnemeth sc->sc_chanarray[port] = chp;
291 1.1 jnemeth chp->ch_channel = port;
292 1.1 jnemeth chp->ch_atac = &sc->sc_atac;
293 1.1 jnemeth chp->ch_queue = malloc(sizeof(struct ata_queue),
294 1.1 jnemeth M_DEVBUF, M_NOWAIT);
295 1.1 jnemeth if (chp->ch_queue == NULL) {
296 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
297 1.1 jnemeth "port %d: can't allocate memory "
298 1.3 jakllsch "for command queue\n", chp->ch_channel);
299 1.2 jakllsch return;
300 1.1 jnemeth }
301 1.1 jnemeth
302 1.1 jnemeth dmasize = SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS;
303 1.1 jnemeth
304 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: dmasize: %d\n", SIISATANAME(sc),
305 1.1 jnemeth __func__, dmasize), DEBUG_FUNCS);
306 1.1 jnemeth
307 1.1 jnemeth error = bus_dmamem_alloc(sc->sc_dmat, dmasize, PAGE_SIZE, 0,
308 1.12 jakllsch &schp->sch_prb_seg, 1, &schp->sch_prb_nseg, BUS_DMA_NOWAIT);
309 1.1 jnemeth if (error) {
310 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
311 1.1 jnemeth "unable to allocate PRB table memory, "
312 1.1 jnemeth "error=%d\n", error);
313 1.2 jakllsch return;
314 1.1 jnemeth }
315 1.1 jnemeth
316 1.12 jakllsch error = bus_dmamem_map(sc->sc_dmat,
317 1.12 jakllsch &schp->sch_prb_seg, schp->sch_prb_nseg,
318 1.12 jakllsch dmasize, &prbp, BUS_DMA_NOWAIT | BUS_DMA_COHERENT);
319 1.1 jnemeth if (error) {
320 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
321 1.1 jnemeth "unable to map PRB table memory, "
322 1.1 jnemeth "error=%d\n", error);
323 1.12 jakllsch bus_dmamem_free(sc->sc_dmat,
324 1.12 jakllsch &schp->sch_prb_seg, schp->sch_prb_nseg);
325 1.2 jakllsch return;
326 1.1 jnemeth }
327 1.1 jnemeth
328 1.1 jnemeth error = bus_dmamap_create(sc->sc_dmat, dmasize, 1, dmasize, 0,
329 1.1 jnemeth BUS_DMA_NOWAIT, &schp->sch_prbd);
330 1.1 jnemeth if (error) {
331 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
332 1.1 jnemeth "unable to create PRB table map, "
333 1.1 jnemeth "error=%d\n", error);
334 1.2 jakllsch bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize);
335 1.12 jakllsch bus_dmamem_free(sc->sc_dmat,
336 1.12 jakllsch &schp->sch_prb_seg, schp->sch_prb_nseg);
337 1.2 jakllsch return;
338 1.1 jnemeth }
339 1.1 jnemeth
340 1.1 jnemeth error = bus_dmamap_load(sc->sc_dmat, schp->sch_prbd,
341 1.1 jnemeth prbp, dmasize, NULL, BUS_DMA_NOWAIT);
342 1.1 jnemeth if (error) {
343 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
344 1.1 jnemeth "unable to load PRB table map, "
345 1.1 jnemeth "error=%d\n", error);
346 1.2 jakllsch bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd);
347 1.2 jakllsch bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize);
348 1.12 jakllsch bus_dmamem_free(sc->sc_dmat,
349 1.12 jakllsch &schp->sch_prb_seg, schp->sch_prb_nseg);
350 1.2 jakllsch return;
351 1.1 jnemeth }
352 1.1 jnemeth
353 1.1 jnemeth for (j = 0; j < SIISATA_MAX_SLOTS; j++) {
354 1.1 jnemeth schp->sch_prb[j] = (struct siisata_prb *)
355 1.1 jnemeth ((char *)prbp + SIISATA_CMD_SIZE * j);
356 1.1 jnemeth schp->sch_bus_prb[j] =
357 1.1 jnemeth schp->sch_prbd->dm_segs[0].ds_addr +
358 1.1 jnemeth SIISATA_CMD_SIZE * j;
359 1.1 jnemeth error = bus_dmamap_create(sc->sc_dmat, MAXPHYS,
360 1.1 jnemeth SIISATA_NSGE, MAXPHYS, 0,
361 1.1 jnemeth BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
362 1.1 jnemeth &schp->sch_datad[j]);
363 1.1 jnemeth if (error) {
364 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
365 1.1 jnemeth "couldn't create xfer DMA map, error=%d\n",
366 1.1 jnemeth error);
367 1.2 jakllsch return;
368 1.1 jnemeth }
369 1.1 jnemeth }
370 1.1 jnemeth
371 1.1 jnemeth if (bus_space_subregion(sc->sc_prt, sc->sc_prh,
372 1.1 jnemeth PRX(chp->ch_channel, PRO_SSTATUS), 4, &schp->sch_sstatus) != 0) {
373 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
374 1.1 jnemeth "couldn't map port %d SStatus regs\n",
375 1.1 jnemeth chp->ch_channel);
376 1.2 jakllsch return;
377 1.1 jnemeth }
378 1.1 jnemeth if (bus_space_subregion(sc->sc_prt, sc->sc_prh,
379 1.1 jnemeth PRX(chp->ch_channel, PRO_SCONTROL), 4, &schp->sch_scontrol) != 0) {
380 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
381 1.1 jnemeth "couldn't map port %d SControl regs\n",
382 1.1 jnemeth chp->ch_channel);
383 1.2 jakllsch return;
384 1.1 jnemeth }
385 1.1 jnemeth if (bus_space_subregion(sc->sc_prt, sc->sc_prh,
386 1.1 jnemeth PRX(chp->ch_channel, PRO_SERROR), 4, &schp->sch_serror) != 0) {
387 1.1 jnemeth aprint_error_dev(sc->sc_atac.atac_dev,
388 1.1 jnemeth "couldn't map port %d SError regs\n",
389 1.1 jnemeth chp->ch_channel);
390 1.2 jakllsch return;
391 1.1 jnemeth }
392 1.1 jnemeth
393 1.1 jnemeth siisata_init_port(sc, port);
394 1.1 jnemeth
395 1.1 jnemeth ata_channel_attach(chp);
396 1.2 jakllsch
397 1.1 jnemeth return;
398 1.1 jnemeth }
399 1.1 jnemeth
400 1.3 jakllsch int
401 1.3 jakllsch siisata_detach(struct siisata_softc *sc, int flags)
402 1.3 jakllsch {
403 1.3 jakllsch struct atac_softc *atac = &sc->sc_atac;
404 1.3 jakllsch struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
405 1.3 jakllsch struct siisata_channel *schp;
406 1.3 jakllsch struct ata_channel *chp;
407 1.3 jakllsch int i, j, error;
408 1.3 jakllsch
409 1.3 jakllsch for (i = 0; i < sc->sc_atac.atac_nchannels; i++) {
410 1.3 jakllsch schp = &sc->sc_channels[i];
411 1.3 jakllsch chp = sc->sc_chanarray[i];
412 1.3 jakllsch
413 1.3 jakllsch if (chp->atabus == NULL)
414 1.3 jakllsch continue;
415 1.3 jakllsch if ((error = config_detach(chp->atabus, flags)) != 0)
416 1.3 jakllsch return error;
417 1.3 jakllsch
418 1.3 jakllsch for (j = 0; j < SIISATA_MAX_SLOTS; j++)
419 1.3 jakllsch bus_dmamap_destroy(sc->sc_dmat, schp->sch_datad[j]);
420 1.3 jakllsch
421 1.12 jakllsch bus_dmamap_unload(sc->sc_dmat, schp->sch_prbd);
422 1.12 jakllsch bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd);
423 1.3 jakllsch bus_dmamem_unmap(sc->sc_dmat, schp->sch_prb[0],
424 1.12 jakllsch SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS);
425 1.12 jakllsch bus_dmamem_free(sc->sc_dmat,
426 1.12 jakllsch &schp->sch_prb_seg, schp->sch_prb_nseg);
427 1.3 jakllsch
428 1.3 jakllsch free(chp->ch_queue, M_DEVBUF);
429 1.3 jakllsch chp->atabus = NULL;
430 1.3 jakllsch }
431 1.3 jakllsch
432 1.3 jakllsch if (adapt->adapt_refcnt != 0)
433 1.3 jakllsch return EBUSY;
434 1.3 jakllsch
435 1.3 jakllsch /* leave the chip in reset */
436 1.3 jakllsch GRWRITE(sc, GR_GC, GR_GC_GLBLRST);
437 1.3 jakllsch
438 1.3 jakllsch return 0;
439 1.3 jakllsch }
440 1.3 jakllsch
441 1.1 jnemeth void
442 1.1 jnemeth siisata_resume(struct siisata_softc *sc)
443 1.1 jnemeth {
444 1.1 jnemeth int i;
445 1.1 jnemeth
446 1.1 jnemeth /* come out of reset state */
447 1.1 jnemeth GRWRITE(sc, GR_GC, 0);
448 1.1 jnemeth
449 1.1 jnemeth for (i = 0; i < sc->sc_atac.atac_nchannels; i++) {
450 1.1 jnemeth siisata_init_port(sc, i);
451 1.1 jnemeth }
452 1.1 jnemeth
453 1.1 jnemeth }
454 1.1 jnemeth
455 1.1 jnemeth int
456 1.1 jnemeth siisata_intr(void *v)
457 1.1 jnemeth {
458 1.1 jnemeth struct siisata_softc *sc = v;
459 1.1 jnemeth uint32_t is;
460 1.1 jnemeth int i, r = 0;
461 1.1 jnemeth while ((is = GRREAD(sc, GR_GIS))) {
462 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: GR_GIS: 0x%08x\n",
463 1.1 jnemeth SIISATANAME(sc), __func__, is), DEBUG_INTR);
464 1.1 jnemeth r = 1;
465 1.1 jnemeth for (i = 0; i < sc->sc_atac.atac_nchannels; i++)
466 1.1 jnemeth if (is & GR_GIS_PXIS(i))
467 1.3 jakllsch siisata_intr_port(&sc->sc_channels[i]);
468 1.1 jnemeth }
469 1.1 jnemeth return r;
470 1.1 jnemeth }
471 1.1 jnemeth
472 1.1 jnemeth static void
473 1.3 jakllsch siisata_intr_port(struct siisata_channel *schp)
474 1.1 jnemeth {
475 1.3 jakllsch struct siisata_softc *sc;
476 1.3 jakllsch struct ata_channel *chp;
477 1.3 jakllsch struct ata_xfer *xfer;
478 1.3 jakllsch int slot;
479 1.3 jakllsch uint32_t pss, pis;
480 1.3 jakllsch uint32_t prbfis;
481 1.3 jakllsch
482 1.3 jakllsch sc = (struct siisata_softc *)schp->ata_channel.ch_atac;
483 1.3 jakllsch chp = &schp->ata_channel;
484 1.3 jakllsch xfer = chp->ch_queue->active_xfer;
485 1.3 jakllsch slot = SIISATA_NON_NCQ_SLOT;
486 1.1 jnemeth
487 1.22 bouyer pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS));
488 1.21 jakllsch
489 1.22 bouyer SIISATA_DEBUG_PRINT(("%s: %s port %d, pis 0x%x ",
490 1.22 bouyer SIISATANAME(sc), __func__, chp->ch_channel, pis), DEBUG_INTR);
491 1.1 jnemeth
492 1.3 jakllsch if (pis & PR_PIS_CMDCMPL) {
493 1.3 jakllsch /* get slot status, clearing completion interrupt */
494 1.3 jakllsch pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
495 1.22 bouyer SIISATA_DEBUG_PRINT(("pss 0x%x\n", pss), DEBUG_INTR);
496 1.3 jakllsch /* is this expected? */
497 1.3 jakllsch /* XXX improve */
498 1.3 jakllsch if ((schp->sch_active_slots & __BIT(slot)) == 0) {
499 1.22 bouyer aprint_error( "%s: unexpected command "
500 1.3 jakllsch "completion on port %d\n",
501 1.3 jakllsch SIISATANAME(sc), chp->ch_channel);
502 1.3 jakllsch return;
503 1.3 jakllsch }
504 1.22 bouyer if ((~pss & __BIT(slot)) == 0) {
505 1.22 bouyer aprint_error( "%s: unknown slot "
506 1.22 bouyer "completion on port %d, pss 0x%x\n",
507 1.22 bouyer SIISATANAME(sc), chp->ch_channel, pss);
508 1.22 bouyer return;
509 1.22 bouyer }
510 1.3 jakllsch } else if (pis & PR_PIS_CMDERRR) {
511 1.3 jakllsch uint32_t ec;
512 1.3 jakllsch
513 1.3 jakllsch /* emulate a CRC error by default */
514 1.3 jakllsch chp->ch_status = WDCS_ERR;
515 1.3 jakllsch chp->ch_error = WDCE_CRC;
516 1.3 jakllsch
517 1.3 jakllsch ec = PRREAD(sc, PRX(chp->ch_channel, PRO_PCE));
518 1.22 bouyer SIISATA_DEBUG_PRINT(("ec %d\n", ec), DEBUG_INTR);
519 1.3 jakllsch if (ec <= PR_PCE_DATAFISERROR) {
520 1.22 bouyer if (ec == PR_PCE_DEVICEERROR && xfer != NULL) {
521 1.3 jakllsch /* read in specific information about error */
522 1.3 jakllsch prbfis = bus_space_read_stream_4(
523 1.3 jakllsch sc->sc_prt, sc->sc_prh,
524 1.3 jakllsch PRSX(chp->ch_channel, slot, PRSO_FIS));
525 1.3 jakllsch /* set ch_status and ch_error */
526 1.7 jakllsch satafis_rdh_parse(chp, (uint8_t *)&prbfis);
527 1.3 jakllsch }
528 1.3 jakllsch siisata_reinit_port(chp);
529 1.3 jakllsch } else {
530 1.22 bouyer aprint_error_dev(sc->sc_atac.atac_dev, "fatal error %d"
531 1.22 bouyer " on channel %d (ctx 0x%x), resetting\n",
532 1.22 bouyer ec, chp->ch_channel,
533 1.22 bouyer PRREAD(sc, PRX(chp->ch_channel, PRO_PCR)));
534 1.3 jakllsch /* okay, we have a "Fatal Error" */
535 1.3 jakllsch siisata_device_reset(chp);
536 1.3 jakllsch }
537 1.3 jakllsch }
538 1.3 jakllsch
539 1.6 jakllsch /* clear some (ok, all) ints */
540 1.6 jakllsch PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff);
541 1.17 bouyer if (xfer && xfer->c_intr)
542 1.17 bouyer xfer->c_intr(chp, xfer, slot);
543 1.1 jnemeth
544 1.1 jnemeth return;
545 1.1 jnemeth }
546 1.1 jnemeth
547 1.1 jnemeth void
548 1.22 bouyer siisata_reset_drive(struct ata_drive_datas *drvp, int flags, uint32_t *sigp)
549 1.1 jnemeth {
550 1.1 jnemeth struct ata_channel *chp = drvp->chnl_softc;
551 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
552 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
553 1.1 jnemeth struct siisata_prb *prb;
554 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
555 1.3 jakllsch int i;
556 1.1 jnemeth
557 1.1 jnemeth /* wait for ready */
558 1.5 jakllsch while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY))
559 1.1 jnemeth DELAY(10);
560 1.1 jnemeth
561 1.1 jnemeth prb = schp->sch_prb[slot];
562 1.1 jnemeth memset(prb, 0, sizeof(struct siisata_prb));
563 1.1 jnemeth prb->prb_control =
564 1.1 jnemeth htole16(PRB_CF_SOFT_RESET | PRB_CF_INTERRUPT_MASK);
565 1.22 bouyer KASSERT(drvp->drive <= PMP_PORT_CTL);
566 1.22 bouyer prb->prb_fis[rhd_c] = drvp->drive;
567 1.1 jnemeth
568 1.2 jakllsch siisata_activate_prb(schp, slot);
569 1.1 jnemeth
570 1.22 bouyer for(i = 0; i < 3100; i++) {
571 1.22 bouyer if ((PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) &
572 1.22 bouyer PR_PXSS(slot)) == 0)
573 1.22 bouyer break;
574 1.22 bouyer if (flags & AT_WAIT)
575 1.22 bouyer tsleep(schp, PRIBIO, "siiprb", mstohz(10));
576 1.21 jakllsch else
577 1.22 bouyer DELAY(10000);
578 1.3 jakllsch }
579 1.2 jakllsch
580 1.2 jakllsch siisata_deactivate_prb(schp, slot);
581 1.22 bouyer if (i == 3100) {
582 1.22 bouyer /* timeout */
583 1.22 bouyer siisata_device_reset(chp);
584 1.22 bouyer if (sigp)
585 1.22 bouyer *sigp = 0xffffffff;
586 1.22 bouyer } else {
587 1.22 bouyer /* read the signature out of the FIS */
588 1.22 bouyer if (sigp) {
589 1.22 bouyer *sigp = 0;
590 1.22 bouyer *sigp |= (PRREAD(sc, PRSX(chp->ch_channel, slot,
591 1.22 bouyer PRSO_FIS+0x4)) & 0x00ffffff) << 8;
592 1.22 bouyer *sigp |= PRREAD(sc, PRSX(chp->ch_channel, slot,
593 1.22 bouyer PRSO_FIS+0xc)) & 0xff;
594 1.22 bouyer }
595 1.22 bouyer }
596 1.1 jnemeth
597 1.1 jnemeth #if 1
598 1.1 jnemeth /* attempt to downgrade signaling in event of CRC error */
599 1.1 jnemeth /* XXX should be part of the MI (S)ATA subsystem */
600 1.1 jnemeth if (chp->ch_status == 0x51 && chp->ch_error == 0x84) {
601 1.1 jnemeth bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0,
602 1.1 jnemeth SControl_IPM_NONE | SControl_SPD_G1 | SControl_DET_INIT);
603 1.1 jnemeth DELAY(10);
604 1.1 jnemeth bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0,
605 1.1 jnemeth SControl_IPM_NONE | SControl_SPD_G1);
606 1.1 jnemeth DELAY(10);
607 1.1 jnemeth for (;;) {
608 1.1 jnemeth if ((bus_space_read_4(sc->sc_prt, schp->sch_sstatus, 0)
609 1.1 jnemeth & SStatus_DET_mask) == SStatus_DET_DEV)
610 1.1 jnemeth break;
611 1.1 jnemeth DELAY(10);
612 1.1 jnemeth }
613 1.1 jnemeth }
614 1.1 jnemeth #endif
615 1.1 jnemeth
616 1.1 jnemeth #if 1
617 1.1 jnemeth chp->ch_status = 0;
618 1.1 jnemeth chp->ch_error = 0;
619 1.1 jnemeth #endif
620 1.1 jnemeth return;
621 1.1 jnemeth }
622 1.1 jnemeth
623 1.1 jnemeth void
624 1.1 jnemeth siisata_reset_channel(struct ata_channel *chp, int flags)
625 1.1 jnemeth {
626 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
627 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
628 1.1 jnemeth
629 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s\n", SIISATANAME(sc), __func__),
630 1.1 jnemeth DEBUG_FUNCS);
631 1.1 jnemeth
632 1.1 jnemeth if (sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol,
633 1.1 jnemeth schp->sch_sstatus) != SStatus_DET_DEV) {
634 1.17 bouyer aprint_error("%s port %d: reset failed\n",
635 1.1 jnemeth SIISATANAME(sc), chp->ch_channel);
636 1.1 jnemeth /* XXX and then ? */
637 1.1 jnemeth }
638 1.3 jakllsch /* wait for ready */
639 1.5 jakllsch while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY))
640 1.1 jnemeth DELAY(10);
641 1.1 jnemeth PRWRITE(sc, PRX(chp->ch_channel, PRO_SERROR),
642 1.1 jnemeth PRREAD(sc, PRX(chp->ch_channel, PRO_SERROR)));
643 1.1 jnemeth if (chp->ch_queue->active_xfer) {
644 1.1 jnemeth chp->ch_queue->active_xfer->c_kill_xfer(chp,
645 1.1 jnemeth chp->ch_queue->active_xfer, KILL_RESET);
646 1.1 jnemeth }
647 1.1 jnemeth
648 1.1 jnemeth return;
649 1.1 jnemeth }
650 1.1 jnemeth
651 1.1 jnemeth int
652 1.1 jnemeth siisata_ata_addref(struct ata_drive_datas *drvp)
653 1.1 jnemeth {
654 1.1 jnemeth return 0;
655 1.1 jnemeth }
656 1.1 jnemeth
657 1.1 jnemeth void
658 1.1 jnemeth siisata_ata_delref(struct ata_drive_datas *drvp)
659 1.1 jnemeth {
660 1.1 jnemeth return;
661 1.1 jnemeth }
662 1.1 jnemeth
663 1.1 jnemeth void
664 1.1 jnemeth siisata_killpending(struct ata_drive_datas *drvp)
665 1.1 jnemeth {
666 1.1 jnemeth return;
667 1.1 jnemeth }
668 1.1 jnemeth
669 1.1 jnemeth void
670 1.1 jnemeth siisata_probe_drive(struct ata_channel *chp)
671 1.1 jnemeth {
672 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
673 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
674 1.1 jnemeth int i;
675 1.1 jnemeth uint32_t sig;
676 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
677 1.1 jnemeth struct siisata_prb *prb;
678 1.17 bouyer bool timed_out;
679 1.1 jnemeth
680 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: port %d start\n", SIISATANAME(sc),
681 1.1 jnemeth __func__, chp->ch_channel), DEBUG_FUNCS);
682 1.1 jnemeth
683 1.17 bouyer /*
684 1.17 bouyer * disable port interrupt as we're polling for PHY up and
685 1.17 bouyer * prb completion
686 1.17 bouyer */
687 1.17 bouyer siisata_disable_port_interrupt(chp);
688 1.17 bouyer
689 1.17 bouyer switch(sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol,
690 1.1 jnemeth schp->sch_sstatus)) {
691 1.1 jnemeth case SStatus_DET_DEV:
692 1.17 bouyer /* clear any interrupts */
693 1.17 bouyer (void)PRREAD(sc, PRX(chp->ch_channel, PRO_PSS));
694 1.17 bouyer PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff);
695 1.1 jnemeth /* wait for ready */
696 1.5 jakllsch while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS))
697 1.1 jnemeth & PR_PS_PORT_READY))
698 1.1 jnemeth DELAY(10);
699 1.1 jnemeth prb = schp->sch_prb[slot];
700 1.1 jnemeth memset(prb, 0, sizeof(struct siisata_prb));
701 1.17 bouyer prb->prb_control = htole16(PRB_CF_SOFT_RESET);
702 1.22 bouyer prb->prb_fis[rhd_c] = PMP_PORT_CTL;
703 1.1 jnemeth
704 1.2 jakllsch siisata_activate_prb(schp, slot);
705 1.1 jnemeth
706 1.17 bouyer timed_out = 1;
707 1.17 bouyer for(i = 0; i < 3100; i++) {
708 1.17 bouyer if ((PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) &
709 1.17 bouyer PR_PXSS(slot)) == 0) {
710 1.17 bouyer /* prb completed */
711 1.17 bouyer timed_out = 0;
712 1.3 jakllsch break;
713 1.17 bouyer }
714 1.17 bouyer if (PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)) &
715 1.17 bouyer (PR_PIS_CMDERRR << 16)) {
716 1.17 bouyer /* we got an error; handle as timeout */
717 1.17 bouyer break;
718 1.17 bouyer }
719 1.17 bouyer
720 1.17 bouyer tsleep(schp, PRIBIO, "siiprb", mstohz(10));
721 1.3 jakllsch }
722 1.2 jakllsch
723 1.2 jakllsch siisata_deactivate_prb(schp, slot);
724 1.17 bouyer if (timed_out) {
725 1.17 bouyer aprint_error_dev(sc->sc_atac.atac_dev,
726 1.17 bouyer "SOFT_RESET failed on port %d (error %d PSS 0x%x), "
727 1.17 bouyer "disabling\n", chp->ch_channel,
728 1.17 bouyer PRREAD(sc, PRX(chp->ch_channel, PRO_PCE)),
729 1.17 bouyer PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)));
730 1.17 bouyer PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS),
731 1.17 bouyer PR_PC_PORT_RESET);
732 1.17 bouyer break;
733 1.17 bouyer }
734 1.1 jnemeth
735 1.1 jnemeth /* read the signature out of the FIS */
736 1.1 jnemeth sig = 0;
737 1.1 jnemeth sig |= (PRREAD(sc, PRSX(chp->ch_channel, slot,
738 1.1 jnemeth PRSO_FIS+0x4)) & 0x00ffffff) << 8;
739 1.1 jnemeth sig |= PRREAD(sc, PRSX(chp->ch_channel, slot,
740 1.1 jnemeth PRSO_FIS+0xc)) & 0xff;
741 1.1 jnemeth
742 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: sig=0x%08x\n", SIISATANAME(sc),
743 1.1 jnemeth __func__, sig), DEBUG_PROBE);
744 1.1 jnemeth
745 1.22 bouyer if (sig == 0x96690101)
746 1.22 bouyer PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS),
747 1.22 bouyer PR_PC_PMP_ENABLE);
748 1.22 bouyer sata_interpret_sig(chp, 0, sig);
749 1.1 jnemeth break;
750 1.1 jnemeth default:
751 1.1 jnemeth break;
752 1.1 jnemeth }
753 1.3 jakllsch
754 1.17 bouyer siisata_enable_port_interrupt(chp);
755 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: port %d done\n", SIISATANAME(sc),
756 1.1 jnemeth __func__, chp->ch_channel), DEBUG_PROBE);
757 1.1 jnemeth return;
758 1.1 jnemeth }
759 1.1 jnemeth
760 1.1 jnemeth void
761 1.1 jnemeth siisata_setup_channel(struct ata_channel *chp)
762 1.1 jnemeth {
763 1.1 jnemeth return;
764 1.1 jnemeth }
765 1.1 jnemeth
766 1.1 jnemeth int
767 1.1 jnemeth siisata_exec_command(struct ata_drive_datas *drvp, struct ata_command *ata_c)
768 1.1 jnemeth {
769 1.1 jnemeth struct ata_channel *chp = drvp->chnl_softc;
770 1.1 jnemeth struct ata_xfer *xfer;
771 1.1 jnemeth int ret;
772 1.1 jnemeth int s;
773 1.1 jnemeth
774 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s begins\n",
775 1.2 jakllsch SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__),
776 1.2 jakllsch DEBUG_FUNCS);
777 1.1 jnemeth
778 1.1 jnemeth xfer = ata_get_xfer(ata_c->flags & AT_WAIT ?
779 1.1 jnemeth ATAXF_CANSLEEP : ATAXF_NOSLEEP);
780 1.1 jnemeth if (xfer == NULL)
781 1.1 jnemeth return ATACMD_TRY_AGAIN;
782 1.1 jnemeth if (ata_c->flags & AT_POLL)
783 1.1 jnemeth xfer->c_flags |= C_POLL;
784 1.1 jnemeth if (ata_c->flags & AT_WAIT)
785 1.1 jnemeth xfer->c_flags |= C_WAIT;
786 1.1 jnemeth xfer->c_drive = drvp->drive;
787 1.1 jnemeth xfer->c_databuf = ata_c->data;
788 1.1 jnemeth xfer->c_bcount = ata_c->bcount;
789 1.1 jnemeth xfer->c_cmd = ata_c;
790 1.1 jnemeth xfer->c_start = siisata_cmd_start;
791 1.1 jnemeth xfer->c_intr = siisata_cmd_complete;
792 1.1 jnemeth xfer->c_kill_xfer = siisata_cmd_kill_xfer;
793 1.1 jnemeth s = splbio();
794 1.1 jnemeth ata_exec_xfer(chp, xfer);
795 1.1 jnemeth #ifdef DIAGNOSTIC
796 1.1 jnemeth if ((ata_c->flags & AT_POLL) != 0 &&
797 1.1 jnemeth (ata_c->flags & AT_DONE) == 0)
798 1.1 jnemeth panic("%s: polled command not done", __func__);
799 1.1 jnemeth #endif
800 1.1 jnemeth if (ata_c->flags & AT_DONE) {
801 1.1 jnemeth ret = ATACMD_COMPLETE;
802 1.1 jnemeth } else {
803 1.1 jnemeth if (ata_c->flags & AT_WAIT) {
804 1.1 jnemeth while ((ata_c->flags & AT_DONE) == 0) {
805 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s: sleeping\n",
806 1.2 jakllsch SIISATANAME(
807 1.2 jakllsch (struct siisata_softc *)chp->ch_atac),
808 1.2 jakllsch __func__), DEBUG_FUNCS);
809 1.1 jnemeth tsleep(ata_c, PRIBIO, "siicmd", 0);
810 1.1 jnemeth }
811 1.1 jnemeth ret = ATACMD_COMPLETE;
812 1.1 jnemeth } else {
813 1.1 jnemeth ret = ATACMD_QUEUED;
814 1.1 jnemeth }
815 1.1 jnemeth }
816 1.1 jnemeth splx(s);
817 1.2 jakllsch SIISATA_DEBUG_PRINT( ("%s: %s ends\n",
818 1.2 jakllsch SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__),
819 1.2 jakllsch DEBUG_FUNCS);
820 1.1 jnemeth return ret;
821 1.1 jnemeth }
822 1.1 jnemeth
823 1.1 jnemeth void
824 1.1 jnemeth siisata_cmd_start(struct ata_channel *chp, struct ata_xfer *xfer)
825 1.1 jnemeth {
826 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
827 1.1 jnemeth struct ata_command *ata_c = xfer->c_cmd;
828 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
829 1.1 jnemeth struct siisata_prb *prb;
830 1.1 jnemeth int i;
831 1.1 jnemeth
832 1.22 bouyer SIISATA_DEBUG_PRINT(("%s: %s port %d drive %d command 0x%x, slot %d\n",
833 1.22 bouyer SIISATANAME((struct siisata_softc *)chp->ch_atac),
834 1.22 bouyer __func__, chp->ch_channel, xfer->c_drive,
835 1.22 bouyer ata_c->r_command, slot),
836 1.22 bouyer DEBUG_FUNCS|DEBUG_XFERS);
837 1.1 jnemeth
838 1.7 jakllsch chp->ch_status = 0;
839 1.7 jakllsch chp->ch_error = 0;
840 1.7 jakllsch
841 1.1 jnemeth prb = schp->sch_prb[slot];
842 1.1 jnemeth memset(prb, 0, sizeof(struct siisata_prb));
843 1.1 jnemeth
844 1.3 jakllsch satafis_rhd_construct_cmd(ata_c, prb->prb_fis);
845 1.22 bouyer KASSERT(xfer->c_drive <= PMP_PORT_CTL);
846 1.22 bouyer prb->prb_fis[rhd_c] |= xfer->c_drive;
847 1.1 jnemeth
848 1.1 jnemeth memset(prb->prb_atapi, 0, sizeof(prb->prb_atapi));
849 1.1 jnemeth
850 1.1 jnemeth if (siisata_dma_setup(chp, slot,
851 1.1 jnemeth (ata_c->flags & (AT_READ | AT_WRITE)) ? ata_c->data : NULL,
852 1.1 jnemeth ata_c->bcount,
853 1.1 jnemeth (ata_c->flags & AT_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) {
854 1.1 jnemeth ata_c->flags |= AT_DF;
855 1.1 jnemeth siisata_cmd_complete(chp, xfer, slot);
856 1.1 jnemeth return;
857 1.1 jnemeth }
858 1.1 jnemeth
859 1.1 jnemeth if (xfer->c_flags & C_POLL) {
860 1.1 jnemeth /* polled command, disable interrupts */
861 1.3 jakllsch prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK);
862 1.17 bouyer siisata_disable_port_interrupt(chp);
863 1.1 jnemeth }
864 1.1 jnemeth
865 1.1 jnemeth /* go for it */
866 1.2 jakllsch siisata_activate_prb(schp, slot);
867 1.1 jnemeth
868 1.1 jnemeth if ((ata_c->flags & AT_POLL) == 0) {
869 1.1 jnemeth chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
870 1.1 jnemeth callout_reset(&chp->ch_callout, mstohz(ata_c->timeout),
871 1.1 jnemeth siisata_timeout, chp);
872 1.1 jnemeth goto out;
873 1.1 jnemeth }
874 1.1 jnemeth
875 1.3 jakllsch /*
876 1.3 jakllsch * polled command
877 1.3 jakllsch */
878 1.1 jnemeth for (i = 0; i < ata_c->timeout / 10; i++) {
879 1.1 jnemeth if (ata_c->flags & AT_DONE)
880 1.1 jnemeth break;
881 1.3 jakllsch siisata_intr_port(schp);
882 1.6 jakllsch DELAY(1000);
883 1.1 jnemeth }
884 1.1 jnemeth
885 1.1 jnemeth if ((ata_c->flags & AT_DONE) == 0) {
886 1.22 bouyer siisata_timeout(chp);
887 1.1 jnemeth }
888 1.1 jnemeth
889 1.1 jnemeth /* reenable interrupts */
890 1.17 bouyer siisata_enable_port_interrupt(chp);
891 1.1 jnemeth out:
892 1.1 jnemeth SIISATA_DEBUG_PRINT(
893 1.22 bouyer ("%s: %s: done\n", SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), DEBUG_FUNCS);
894 1.1 jnemeth return;
895 1.1 jnemeth }
896 1.1 jnemeth
897 1.1 jnemeth void
898 1.1 jnemeth siisata_cmd_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
899 1.1 jnemeth int reason)
900 1.1 jnemeth {
901 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
902 1.1 jnemeth
903 1.1 jnemeth struct ata_command *ata_c = xfer->c_cmd;
904 1.1 jnemeth switch (reason) {
905 1.1 jnemeth case KILL_GONE:
906 1.1 jnemeth ata_c->flags |= AT_GONE;
907 1.1 jnemeth break;
908 1.1 jnemeth case KILL_RESET:
909 1.1 jnemeth ata_c->flags |= AT_RESET;
910 1.1 jnemeth break;
911 1.1 jnemeth default:
912 1.1 jnemeth panic("%s: port %d: unknown reason %d",
913 1.1 jnemeth __func__, chp->ch_channel, reason);
914 1.1 jnemeth }
915 1.1 jnemeth siisata_cmd_done(chp, xfer, slot);
916 1.1 jnemeth }
917 1.1 jnemeth
918 1.1 jnemeth int
919 1.1 jnemeth siisata_cmd_complete(struct ata_channel *chp, struct ata_xfer *xfer, int slot)
920 1.1 jnemeth {
921 1.4 cegger struct ata_command *ata_c = xfer->c_cmd;
922 1.4 cegger #ifdef SIISATA_DEBUG
923 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
924 1.4 cegger #endif
925 1.10 jakllsch
926 1.1 jnemeth SIISATA_DEBUG_PRINT(
927 1.22 bouyer ("%s: %s\n", SIISATANAME(sc), __func__), DEBUG_FUNCS|DEBUG_XFERS);
928 1.1 jnemeth
929 1.1 jnemeth chp->ch_flags &= ~ATACH_IRQ_WAIT;
930 1.1 jnemeth if (xfer->c_flags & C_TIMEOU)
931 1.1 jnemeth ata_c->flags |= AT_TIMEOU;
932 1.1 jnemeth else
933 1.1 jnemeth callout_stop(&chp->ch_callout);
934 1.1 jnemeth
935 1.10 jakllsch if (chp->ch_status & WDCS_BSY) {
936 1.10 jakllsch ata_c->flags |= AT_TIMEOU;
937 1.10 jakllsch } else if (chp->ch_status & WDCS_ERR) {
938 1.10 jakllsch ata_c->r_error = chp->ch_error;
939 1.10 jakllsch ata_c->flags |= AT_ERROR;
940 1.10 jakllsch }
941 1.10 jakllsch
942 1.22 bouyer if (chp->ch_drive[xfer->c_drive].drive_flags & ATA_DRIVE_WAITDRAIN) {
943 1.1 jnemeth siisata_cmd_kill_xfer(chp, xfer, KILL_GONE);
944 1.22 bouyer chp->ch_drive[xfer->c_drive].drive_flags &= ~ATA_DRIVE_WAITDRAIN;
945 1.1 jnemeth wakeup(&chp->ch_queue->active_xfer);
946 1.1 jnemeth return 0;
947 1.10 jakllsch } else
948 1.10 jakllsch siisata_cmd_done(chp, xfer, slot);
949 1.1 jnemeth
950 1.1 jnemeth return 0;
951 1.1 jnemeth }
952 1.1 jnemeth
953 1.1 jnemeth void
954 1.1 jnemeth siisata_cmd_done(struct ata_channel *chp, struct ata_xfer *xfer, int slot)
955 1.1 jnemeth {
956 1.10 jakllsch uint32_t fis[howmany(RDH_FISLEN,sizeof(uint32_t))];
957 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
958 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
959 1.1 jnemeth struct ata_command *ata_c = xfer->c_cmd;
960 1.10 jakllsch uint16_t *idwordbuf;
961 1.1 jnemeth int i;
962 1.1 jnemeth
963 1.1 jnemeth SIISATA_DEBUG_PRINT(
964 1.22 bouyer ("%s: %s flags 0x%x error 0x%x\n", SIISATANAME(sc), __func__,
965 1.22 bouyer ata_c->flags, ata_c->r_error), DEBUG_FUNCS|DEBUG_XFERS);
966 1.1 jnemeth
967 1.2 jakllsch siisata_deactivate_prb(schp, slot);
968 1.1 jnemeth
969 1.1 jnemeth if (ata_c->flags & (AT_READ | AT_WRITE)) {
970 1.1 jnemeth bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0,
971 1.1 jnemeth schp->sch_datad[slot]->dm_mapsize,
972 1.1 jnemeth (ata_c->flags & AT_READ) ? BUS_DMASYNC_POSTREAD :
973 1.1 jnemeth BUS_DMASYNC_POSTWRITE);
974 1.1 jnemeth bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]);
975 1.1 jnemeth }
976 1.1 jnemeth
977 1.10 jakllsch if (ata_c->flags & AT_READREG) {
978 1.10 jakllsch bus_space_read_region_stream_4(sc->sc_prt, sc->sc_prh,
979 1.10 jakllsch PRSX(chp->ch_channel, slot, PRSO_FIS),
980 1.10 jakllsch fis, __arraycount(fis));
981 1.10 jakllsch satafis_rdh_cmd_readreg(ata_c, (uint8_t *)fis);
982 1.10 jakllsch }
983 1.1 jnemeth
984 1.1 jnemeth /* correct the endianess of IDENTIFY data */
985 1.1 jnemeth if (ata_c->r_command == WDCC_IDENTIFY ||
986 1.1 jnemeth ata_c->r_command == ATAPI_IDENTIFY_DEVICE) {
987 1.10 jakllsch idwordbuf = xfer->c_databuf;
988 1.1 jnemeth for (i = 0; i < (xfer->c_bcount / sizeof(*idwordbuf)); i++) {
989 1.1 jnemeth idwordbuf[i] = le16toh(idwordbuf[i]);
990 1.1 jnemeth }
991 1.1 jnemeth }
992 1.1 jnemeth
993 1.1 jnemeth ata_c->flags |= AT_DONE;
994 1.1 jnemeth if (PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC)))
995 1.1 jnemeth ata_c->flags |= AT_XFDONE;
996 1.1 jnemeth
997 1.10 jakllsch chp->ch_queue->active_xfer = NULL;
998 1.1 jnemeth ata_free_xfer(chp, xfer);
999 1.1 jnemeth if (ata_c->flags & AT_WAIT)
1000 1.1 jnemeth wakeup(ata_c);
1001 1.1 jnemeth else if (ata_c->callback)
1002 1.1 jnemeth ata_c->callback(ata_c->callback_arg);
1003 1.1 jnemeth atastart(chp);
1004 1.1 jnemeth return;
1005 1.1 jnemeth }
1006 1.1 jnemeth
1007 1.1 jnemeth int
1008 1.1 jnemeth siisata_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio)
1009 1.1 jnemeth {
1010 1.1 jnemeth struct ata_channel *chp = drvp->chnl_softc;
1011 1.1 jnemeth struct ata_xfer *xfer;
1012 1.1 jnemeth
1013 1.2 jakllsch SIISATA_DEBUG_PRINT( ("%s: %s.\n",
1014 1.2 jakllsch SIISATANAME((struct siisata_softc *)chp->ch_atac),
1015 1.2 jakllsch __func__), DEBUG_FUNCS);
1016 1.1 jnemeth
1017 1.1 jnemeth xfer = ata_get_xfer(ATAXF_NOSLEEP);
1018 1.1 jnemeth if (xfer == NULL)
1019 1.1 jnemeth return ATACMD_TRY_AGAIN;
1020 1.1 jnemeth if (ata_bio->flags & ATA_POLL)
1021 1.1 jnemeth xfer->c_flags |= C_POLL;
1022 1.1 jnemeth xfer->c_drive = drvp->drive;
1023 1.1 jnemeth xfer->c_cmd = ata_bio;
1024 1.1 jnemeth xfer->c_databuf = ata_bio->databuf;
1025 1.1 jnemeth xfer->c_bcount = ata_bio->bcount;
1026 1.1 jnemeth xfer->c_start = siisata_bio_start;
1027 1.1 jnemeth xfer->c_intr = siisata_bio_complete;
1028 1.1 jnemeth xfer->c_kill_xfer = siisata_bio_kill_xfer;
1029 1.1 jnemeth ata_exec_xfer(chp, xfer);
1030 1.1 jnemeth return (ata_bio->flags & ATA_ITSDONE) ?
1031 1.1 jnemeth ATACMD_COMPLETE : ATACMD_QUEUED;
1032 1.1 jnemeth }
1033 1.1 jnemeth
1034 1.1 jnemeth void
1035 1.1 jnemeth siisata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer)
1036 1.1 jnemeth {
1037 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
1038 1.1 jnemeth struct siisata_prb *prb;
1039 1.1 jnemeth struct ata_bio *ata_bio = xfer->c_cmd;
1040 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
1041 1.3 jakllsch int i;
1042 1.1 jnemeth
1043 1.1 jnemeth SIISATA_DEBUG_PRINT(
1044 1.1 jnemeth ("%s: %s port %d, slot %d\n",
1045 1.22 bouyer SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__, chp->ch_channel, slot),
1046 1.1 jnemeth DEBUG_FUNCS);
1047 1.1 jnemeth
1048 1.7 jakllsch chp->ch_status = 0;
1049 1.7 jakllsch chp->ch_error = 0;
1050 1.7 jakllsch
1051 1.1 jnemeth prb = schp->sch_prb[slot];
1052 1.1 jnemeth memset(prb, 0, sizeof(struct siisata_prb));
1053 1.1 jnemeth
1054 1.3 jakllsch satafis_rhd_construct_bio(xfer, prb->prb_fis);
1055 1.22 bouyer KASSERT(xfer->c_drive <= PMP_PORT_CTL);
1056 1.22 bouyer prb->prb_fis[rhd_c] |= xfer->c_drive;
1057 1.1 jnemeth
1058 1.3 jakllsch memset(prb->prb_atapi, 0, sizeof(prb->prb_atapi));
1059 1.1 jnemeth
1060 1.1 jnemeth if (siisata_dma_setup(chp, slot, ata_bio->databuf, ata_bio->bcount,
1061 1.1 jnemeth (ata_bio->flags & ATA_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) {
1062 1.1 jnemeth ata_bio->error = ERR_DMA;
1063 1.1 jnemeth ata_bio->r_error = 0;
1064 1.1 jnemeth siisata_bio_complete(chp, xfer, slot);
1065 1.1 jnemeth return;
1066 1.1 jnemeth }
1067 1.1 jnemeth
1068 1.1 jnemeth if (xfer->c_flags & C_POLL) {
1069 1.1 jnemeth /* polled command, disable interrupts */
1070 1.3 jakllsch prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK);
1071 1.17 bouyer siisata_disable_port_interrupt(chp);
1072 1.1 jnemeth }
1073 1.1 jnemeth
1074 1.2 jakllsch siisata_activate_prb(schp, slot);
1075 1.1 jnemeth
1076 1.3 jakllsch if ((ata_bio->flags & ATA_POLL) == 0) {
1077 1.1 jnemeth chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
1078 1.1 jnemeth callout_reset(&chp->ch_callout, mstohz(ATA_DELAY),
1079 1.1 jnemeth siisata_timeout, chp);
1080 1.1 jnemeth goto out;
1081 1.1 jnemeth }
1082 1.1 jnemeth
1083 1.3 jakllsch /*
1084 1.3 jakllsch * polled command
1085 1.3 jakllsch */
1086 1.1 jnemeth for (i = 0; i < ATA_DELAY / 10; i++) {
1087 1.1 jnemeth if (ata_bio->flags & ATA_ITSDONE)
1088 1.1 jnemeth break;
1089 1.3 jakllsch siisata_intr_port(schp);
1090 1.6 jakllsch DELAY(1000);
1091 1.1 jnemeth }
1092 1.1 jnemeth
1093 1.17 bouyer siisata_enable_port_interrupt(chp);
1094 1.1 jnemeth out:
1095 1.1 jnemeth SIISATA_DEBUG_PRINT(
1096 1.22 bouyer ("%s: %s: done\n", SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), DEBUG_FUNCS);
1097 1.1 jnemeth return;
1098 1.1 jnemeth }
1099 1.1 jnemeth
1100 1.1 jnemeth void
1101 1.1 jnemeth siisata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
1102 1.1 jnemeth int reason)
1103 1.1 jnemeth {
1104 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
1105 1.1 jnemeth struct ata_bio *ata_bio = xfer->c_cmd;
1106 1.1 jnemeth int drive = xfer->c_drive;
1107 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
1108 1.1 jnemeth
1109 1.2 jakllsch SIISATA_DEBUG_PRINT(("%s: %s: port %d\n",
1110 1.2 jakllsch SIISATANAME((struct siisata_softc *)chp->ch_atac),
1111 1.1 jnemeth __func__, chp->ch_channel), DEBUG_FUNCS);
1112 1.1 jnemeth
1113 1.2 jakllsch siisata_deactivate_prb(schp, slot);
1114 1.1 jnemeth
1115 1.1 jnemeth ata_free_xfer(chp, xfer);
1116 1.1 jnemeth ata_bio->flags |= ATA_ITSDONE;
1117 1.1 jnemeth switch (reason) {
1118 1.1 jnemeth case KILL_GONE:
1119 1.1 jnemeth ata_bio->error = ERR_NODEV;
1120 1.1 jnemeth break;
1121 1.1 jnemeth case KILL_RESET:
1122 1.1 jnemeth ata_bio->error = ERR_RESET;
1123 1.1 jnemeth break;
1124 1.1 jnemeth default:
1125 1.1 jnemeth panic("%s: port %d: unknown reason %d",
1126 1.1 jnemeth __func__, chp->ch_channel, reason);
1127 1.1 jnemeth }
1128 1.1 jnemeth ata_bio->r_error = WDCE_ABRT;
1129 1.1 jnemeth (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
1130 1.1 jnemeth }
1131 1.1 jnemeth
1132 1.1 jnemeth int
1133 1.1 jnemeth siisata_bio_complete(struct ata_channel *chp, struct ata_xfer *xfer, int slot)
1134 1.1 jnemeth {
1135 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
1136 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
1137 1.1 jnemeth struct ata_bio *ata_bio = xfer->c_cmd;
1138 1.1 jnemeth int drive = xfer->c_drive;
1139 1.1 jnemeth
1140 1.1 jnemeth schp->sch_active_slots &= ~__BIT(slot);
1141 1.1 jnemeth chp->ch_flags &= ~ATACH_IRQ_WAIT;
1142 1.3 jakllsch if (xfer->c_flags & C_TIMEOU) {
1143 1.3 jakllsch ata_bio->error = TIMEOUT;
1144 1.3 jakllsch } else {
1145 1.3 jakllsch callout_stop(&chp->ch_callout);
1146 1.3 jakllsch ata_bio->error = NOERROR;
1147 1.3 jakllsch }
1148 1.1 jnemeth
1149 1.1 jnemeth bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0,
1150 1.1 jnemeth schp->sch_datad[slot]->dm_mapsize,
1151 1.1 jnemeth (ata_bio->flags & ATA_READ) ? BUS_DMASYNC_POSTREAD :
1152 1.1 jnemeth BUS_DMASYNC_POSTWRITE);
1153 1.1 jnemeth bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]);
1154 1.1 jnemeth
1155 1.22 bouyer if (chp->ch_drive[xfer->c_drive].drive_flags & ATA_DRIVE_WAITDRAIN) {
1156 1.1 jnemeth siisata_bio_kill_xfer(chp, xfer, KILL_GONE);
1157 1.22 bouyer chp->ch_drive[xfer->c_drive].drive_flags &= ~ATA_DRIVE_WAITDRAIN;
1158 1.1 jnemeth wakeup(&chp->ch_queue->active_xfer);
1159 1.1 jnemeth return 0;
1160 1.1 jnemeth }
1161 1.10 jakllsch
1162 1.10 jakllsch chp->ch_queue->active_xfer = NULL;
1163 1.1 jnemeth ata_free_xfer(chp, xfer);
1164 1.1 jnemeth ata_bio->flags |= ATA_ITSDONE;
1165 1.1 jnemeth if (chp->ch_status & WDCS_DWF) {
1166 1.1 jnemeth ata_bio->error = ERR_DF;
1167 1.1 jnemeth } else if (chp->ch_status & WDCS_ERR) {
1168 1.1 jnemeth ata_bio->error = ERROR;
1169 1.1 jnemeth ata_bio->r_error = chp->ch_error;
1170 1.1 jnemeth } else if (chp->ch_status & WDCS_CORR)
1171 1.1 jnemeth ata_bio->flags |= ATA_CORR;
1172 1.1 jnemeth
1173 1.3 jakllsch SIISATA_DEBUG_PRINT(("%s: %s bcount: %ld", SIISATANAME(sc),
1174 1.1 jnemeth __func__, ata_bio->bcount), DEBUG_XFERS);
1175 1.6 jakllsch if (ata_bio->error == NOERROR) {
1176 1.6 jakllsch if (ata_bio->flags & ATA_READ)
1177 1.6 jakllsch ata_bio->bcount -=
1178 1.6 jakllsch PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC));
1179 1.6 jakllsch else
1180 1.6 jakllsch ata_bio->bcount = 0;
1181 1.6 jakllsch }
1182 1.3 jakllsch SIISATA_DEBUG_PRINT((" now %ld\n", ata_bio->bcount), DEBUG_XFERS);
1183 1.3 jakllsch if (ata_bio->flags & ATA_POLL)
1184 1.3 jakllsch return 1;
1185 1.1 jnemeth (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc);
1186 1.1 jnemeth atastart(chp);
1187 1.1 jnemeth return 0;
1188 1.1 jnemeth }
1189 1.1 jnemeth
1190 1.1 jnemeth void
1191 1.1 jnemeth siisata_timeout(void *v)
1192 1.1 jnemeth {
1193 1.1 jnemeth struct ata_channel *chp = (struct ata_channel *)v;
1194 1.1 jnemeth struct ata_xfer *xfer = chp->ch_queue->active_xfer;
1195 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
1196 1.1 jnemeth int s = splbio();
1197 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %p\n", __func__, xfer), DEBUG_INTR);
1198 1.22 bouyer siisata_device_reset(chp);
1199 1.1 jnemeth if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) {
1200 1.1 jnemeth xfer->c_flags |= C_TIMEOU;
1201 1.1 jnemeth xfer->c_intr(chp, xfer, slot);
1202 1.1 jnemeth }
1203 1.1 jnemeth splx(s);
1204 1.1 jnemeth }
1205 1.1 jnemeth
1206 1.1 jnemeth static int
1207 1.1 jnemeth siisata_dma_setup(struct ata_channel *chp, int slot, void *data,
1208 1.1 jnemeth size_t count, int op)
1209 1.1 jnemeth {
1210 1.1 jnemeth
1211 1.1 jnemeth int error, seg;
1212 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
1213 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
1214 1.1 jnemeth
1215 1.1 jnemeth struct siisata_prb *prbp;
1216 1.1 jnemeth
1217 1.1 jnemeth prbp = schp->sch_prb[slot];
1218 1.1 jnemeth
1219 1.1 jnemeth if (data == NULL) {
1220 1.1 jnemeth goto end;
1221 1.1 jnemeth }
1222 1.1 jnemeth
1223 1.1 jnemeth error = bus_dmamap_load(sc->sc_dmat, schp->sch_datad[slot],
1224 1.1 jnemeth data, count, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | op);
1225 1.1 jnemeth if (error) {
1226 1.17 bouyer aprint_error("%s port %d: "
1227 1.1 jnemeth "failed to load xfer in slot %d: error %d\n",
1228 1.1 jnemeth SIISATANAME(sc), chp->ch_channel, slot, error);
1229 1.1 jnemeth return error;
1230 1.1 jnemeth }
1231 1.1 jnemeth
1232 1.1 jnemeth bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0,
1233 1.1 jnemeth schp->sch_datad[slot]->dm_mapsize,
1234 1.1 jnemeth (op == BUS_DMA_READ) ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
1235 1.1 jnemeth
1236 1.1 jnemeth /* make sure it's clean */
1237 1.1 jnemeth memset(prbp->prb_sge, 0, SIISATA_NSGE * sizeof(struct siisata_prb));
1238 1.1 jnemeth
1239 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %d segs, %ld count\n", __func__,
1240 1.1 jnemeth schp->sch_datad[slot]->dm_nsegs, (long unsigned int) count),
1241 1.1 jnemeth DEBUG_FUNCS | DEBUG_DEBUG);
1242 1.1 jnemeth
1243 1.1 jnemeth for (seg = 0; seg < schp->sch_datad[slot]->dm_nsegs; seg++) {
1244 1.1 jnemeth prbp->prb_sge[seg].sge_da =
1245 1.1 jnemeth htole64(schp->sch_datad[slot]->dm_segs[seg].ds_addr);
1246 1.1 jnemeth prbp->prb_sge[seg].sge_dc =
1247 1.1 jnemeth htole32(schp->sch_datad[slot]->dm_segs[seg].ds_len);
1248 1.1 jnemeth prbp->prb_sge[seg].sge_flags = htole32(0);
1249 1.1 jnemeth }
1250 1.1 jnemeth prbp->prb_sge[seg - 1].sge_flags |= htole32(SGE_FLAG_TRM);
1251 1.1 jnemeth end:
1252 1.1 jnemeth return 0;
1253 1.1 jnemeth }
1254 1.1 jnemeth
1255 1.2 jakllsch static void
1256 1.2 jakllsch siisata_activate_prb(struct siisata_channel *schp, int slot)
1257 1.1 jnemeth {
1258 1.2 jakllsch struct siisata_softc *sc;
1259 1.2 jakllsch bus_size_t offset;
1260 1.6 jakllsch uint64_t pprb;
1261 1.2 jakllsch
1262 1.2 jakllsch sc = (struct siisata_softc *)schp->ata_channel.ch_atac;
1263 1.2 jakllsch
1264 1.11 rmind KASSERTMSG((schp->sch_active_slots & __BIT(slot)) != __BIT(slot),
1265 1.15 jym "%s: trying to activate active slot %d", SIISATANAME(sc), slot);
1266 1.2 jakllsch
1267 1.2 jakllsch SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_PREWRITE);
1268 1.2 jakllsch /* keep track of what's going on */
1269 1.2 jakllsch schp->sch_active_slots |= __BIT(slot);
1270 1.2 jakllsch
1271 1.6 jakllsch offset = PRO_CARX(schp->ata_channel.ch_channel, slot);
1272 1.6 jakllsch
1273 1.6 jakllsch pprb = schp->sch_bus_prb[slot];
1274 1.2 jakllsch
1275 1.6 jakllsch PRWRITE(sc, offset + 0, pprb >> 0);
1276 1.6 jakllsch PRWRITE(sc, offset + 4, pprb >> 32);
1277 1.1 jnemeth }
1278 1.1 jnemeth
1279 1.1 jnemeth static void
1280 1.2 jakllsch siisata_deactivate_prb(struct siisata_channel *schp, int slot)
1281 1.1 jnemeth {
1282 1.2 jakllsch struct siisata_softc *sc;
1283 1.2 jakllsch
1284 1.2 jakllsch sc = (struct siisata_softc *)schp->ata_channel.ch_atac;
1285 1.2 jakllsch
1286 1.11 rmind KASSERTMSG((schp->sch_active_slots & __BIT(slot)) != 0,
1287 1.15 jym "%s: trying to deactivate inactive slot %d", SIISATANAME(sc),
1288 1.15 jym slot);
1289 1.2 jakllsch
1290 1.2 jakllsch schp->sch_active_slots &= ~__BIT(slot); /* mark free */
1291 1.2 jakllsch SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_POSTWRITE);
1292 1.2 jakllsch }
1293 1.2 jakllsch
1294 1.2 jakllsch static void
1295 1.2 jakllsch siisata_reinit_port(struct ata_channel *chp)
1296 1.2 jakllsch {
1297 1.2 jakllsch struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
1298 1.2 jakllsch
1299 1.5 jakllsch PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_PORT_INITIALIZE);
1300 1.5 jakllsch while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY))
1301 1.1 jnemeth DELAY(10);
1302 1.22 bouyer if (chp->ch_ndrives > 1)
1303 1.22 bouyer PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_PMP_ENABLE);
1304 1.1 jnemeth }
1305 1.1 jnemeth
1306 1.1 jnemeth static void
1307 1.2 jakllsch siisata_device_reset(struct ata_channel *chp)
1308 1.1 jnemeth {
1309 1.2 jakllsch struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
1310 1.2 jakllsch
1311 1.5 jakllsch PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_DEVICE_RESET);
1312 1.5 jakllsch while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY))
1313 1.1 jnemeth DELAY(10);
1314 1.1 jnemeth }
1315 1.1 jnemeth
1316 1.1 jnemeth
1317 1.1 jnemeth #if NATAPIBUS > 0
1318 1.1 jnemeth void
1319 1.1 jnemeth siisata_atapibus_attach(struct atabus_softc *ata_sc)
1320 1.1 jnemeth {
1321 1.1 jnemeth struct ata_channel *chp = ata_sc->sc_chan;
1322 1.1 jnemeth struct atac_softc *atac = chp->ch_atac;
1323 1.1 jnemeth struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic;
1324 1.1 jnemeth struct scsipi_channel *chan = &chp->ch_atapi_channel;
1325 1.1 jnemeth
1326 1.1 jnemeth /*
1327 1.1 jnemeth * Fill in the scsipi_adapter.
1328 1.1 jnemeth */
1329 1.1 jnemeth adapt->adapt_dev = atac->atac_dev;
1330 1.1 jnemeth adapt->adapt_nchannels = atac->atac_nchannels;
1331 1.1 jnemeth adapt->adapt_request = siisata_atapi_scsipi_request;
1332 1.1 jnemeth adapt->adapt_minphys = siisata_atapi_minphys;
1333 1.1 jnemeth atac->atac_atapi_adapter.atapi_probe_device =
1334 1.1 jnemeth siisata_atapi_probe_device;
1335 1.1 jnemeth
1336 1.1 jnemeth /*
1337 1.1 jnemeth * Fill in the scsipi_channel.
1338 1.1 jnemeth */
1339 1.1 jnemeth memset(chan, 0, sizeof(*chan));
1340 1.1 jnemeth chan->chan_adapter = adapt;
1341 1.1 jnemeth chan->chan_bustype = &siisata_atapi_bustype;
1342 1.1 jnemeth chan->chan_channel = chp->ch_channel;
1343 1.1 jnemeth chan->chan_flags = SCSIPI_CHAN_OPENINGS;
1344 1.1 jnemeth chan->chan_openings = 1;
1345 1.1 jnemeth chan->chan_max_periph = 1;
1346 1.1 jnemeth chan->chan_ntargets = 1;
1347 1.1 jnemeth chan->chan_nluns = 1;
1348 1.1 jnemeth
1349 1.1 jnemeth chp->atapibus = config_found_ia(ata_sc->sc_dev, "atapi", chan,
1350 1.1 jnemeth atapiprint);
1351 1.1 jnemeth }
1352 1.1 jnemeth
1353 1.1 jnemeth void
1354 1.1 jnemeth siisata_atapi_minphys(struct buf *bp)
1355 1.1 jnemeth {
1356 1.1 jnemeth if (bp->b_bcount > MAXPHYS)
1357 1.1 jnemeth bp->b_bcount = MAXPHYS;
1358 1.1 jnemeth minphys(bp);
1359 1.1 jnemeth }
1360 1.1 jnemeth
1361 1.1 jnemeth /*
1362 1.1 jnemeth * Kill off all pending xfers for a periph.
1363 1.1 jnemeth *
1364 1.1 jnemeth * Must be called at splbio().
1365 1.1 jnemeth */
1366 1.1 jnemeth void
1367 1.1 jnemeth siisata_atapi_kill_pending(struct scsipi_periph *periph)
1368 1.1 jnemeth {
1369 1.1 jnemeth struct atac_softc *atac =
1370 1.1 jnemeth device_private(periph->periph_channel->chan_adapter->adapt_dev);
1371 1.1 jnemeth struct ata_channel *chp =
1372 1.1 jnemeth atac->atac_channels[periph->periph_channel->chan_channel];
1373 1.1 jnemeth
1374 1.1 jnemeth ata_kill_pending(&chp->ch_drive[periph->periph_target]);
1375 1.1 jnemeth }
1376 1.1 jnemeth
1377 1.1 jnemeth void
1378 1.1 jnemeth siisata_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer,
1379 1.1 jnemeth int reason)
1380 1.1 jnemeth {
1381 1.1 jnemeth struct scsipi_xfer *sc_xfer = xfer->c_cmd;
1382 1.1 jnemeth
1383 1.1 jnemeth /* remove this command from xfer queue */
1384 1.1 jnemeth switch (reason) {
1385 1.1 jnemeth case KILL_GONE:
1386 1.1 jnemeth sc_xfer->error = XS_DRIVER_STUFFUP;
1387 1.1 jnemeth break;
1388 1.1 jnemeth case KILL_RESET:
1389 1.1 jnemeth sc_xfer->error = XS_RESET;
1390 1.1 jnemeth break;
1391 1.1 jnemeth default:
1392 1.1 jnemeth panic("%s: port %d: unknown reason %d",
1393 1.1 jnemeth __func__, chp->ch_channel, reason);
1394 1.1 jnemeth }
1395 1.1 jnemeth ata_free_xfer(chp, xfer);
1396 1.1 jnemeth scsipi_done(sc_xfer);
1397 1.1 jnemeth }
1398 1.1 jnemeth
1399 1.1 jnemeth void
1400 1.1 jnemeth siisata_atapi_probe_device(struct atapibus_softc *sc, int target)
1401 1.1 jnemeth {
1402 1.1 jnemeth struct scsipi_channel *chan = sc->sc_channel;
1403 1.1 jnemeth struct scsipi_periph *periph;
1404 1.1 jnemeth struct ataparams ids;
1405 1.1 jnemeth struct ataparams *id = &ids;
1406 1.1 jnemeth struct siisata_softc *siic =
1407 1.1 jnemeth device_private(chan->chan_adapter->adapt_dev);
1408 1.1 jnemeth struct atac_softc *atac = &siic->sc_atac;
1409 1.1 jnemeth struct ata_channel *chp = atac->atac_channels[chan->chan_channel];
1410 1.1 jnemeth struct ata_drive_datas *drvp = &chp->ch_drive[target];
1411 1.1 jnemeth struct scsipibus_attach_args sa;
1412 1.1 jnemeth char serial_number[21], model[41], firmware_revision[9];
1413 1.1 jnemeth int s;
1414 1.1 jnemeth
1415 1.1 jnemeth /* skip if already attached */
1416 1.1 jnemeth if (scsipi_lookup_periph(chan, target, 0) != NULL)
1417 1.1 jnemeth return;
1418 1.1 jnemeth
1419 1.1 jnemeth /* if no ATAPI device detected at attach time, skip */
1420 1.22 bouyer if (drvp->drive_type == ATA_DRIVET_ATAPI) {
1421 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: drive %d "
1422 1.1 jnemeth "not present\n", __func__, target), DEBUG_PROBE);
1423 1.1 jnemeth return;
1424 1.1 jnemeth }
1425 1.1 jnemeth
1426 1.1 jnemeth /* Some ATAPI devices need a bit more time after software reset. */
1427 1.6 jakllsch DELAY(5000);
1428 1.1 jnemeth if (ata_get_params(drvp, AT_WAIT, id) == 0) {
1429 1.1 jnemeth #ifdef ATAPI_DEBUG_PROBE
1430 1.1 jnemeth log(LOG_DEBUG, "%s drive %d: cmdsz 0x%x drqtype 0x%x\n",
1431 1.1 jnemeth device_xname(sc->sc_dev), target,
1432 1.1 jnemeth id->atap_config & ATAPI_CFG_CMD_MASK,
1433 1.1 jnemeth id->atap_config & ATAPI_CFG_DRQ_MASK);
1434 1.1 jnemeth #endif
1435 1.1 jnemeth periph = scsipi_alloc_periph(M_NOWAIT);
1436 1.1 jnemeth if (periph == NULL) {
1437 1.1 jnemeth aprint_error_dev(sc->sc_dev,
1438 1.1 jnemeth "%s: unable to allocate periph for "
1439 1.3 jakllsch "channel %d drive %d\n", __func__,
1440 1.1 jnemeth chp->ch_channel, target);
1441 1.1 jnemeth return;
1442 1.1 jnemeth }
1443 1.1 jnemeth periph->periph_dev = NULL;
1444 1.1 jnemeth periph->periph_channel = chan;
1445 1.1 jnemeth periph->periph_switch = &atapi_probe_periphsw;
1446 1.1 jnemeth periph->periph_target = target;
1447 1.1 jnemeth periph->periph_lun = 0;
1448 1.1 jnemeth periph->periph_quirks = PQUIRK_ONLYBIG;
1449 1.1 jnemeth
1450 1.1 jnemeth #ifdef SCSIPI_DEBUG
1451 1.1 jnemeth if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI &&
1452 1.1 jnemeth SCSIPI_DEBUG_TARGET == target)
1453 1.1 jnemeth periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS;
1454 1.1 jnemeth #endif
1455 1.1 jnemeth periph->periph_type = ATAPI_CFG_TYPE(id->atap_config);
1456 1.1 jnemeth if (id->atap_config & ATAPI_CFG_REMOV)
1457 1.1 jnemeth periph->periph_flags |= PERIPH_REMOVABLE;
1458 1.1 jnemeth sa.sa_periph = periph;
1459 1.1 jnemeth sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config);
1460 1.1 jnemeth sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ?
1461 1.1 jnemeth T_REMOV : T_FIXED;
1462 1.1 jnemeth scsipi_strvis((u_char *)model, 40, id->atap_model, 40);
1463 1.1 jnemeth scsipi_strvis((u_char *)serial_number, 20,
1464 1.1 jnemeth id->atap_serial, 20);
1465 1.1 jnemeth scsipi_strvis((u_char *)firmware_revision, 8,
1466 1.1 jnemeth id->atap_revision, 8);
1467 1.1 jnemeth sa.sa_inqbuf.vendor = model;
1468 1.1 jnemeth sa.sa_inqbuf.product = serial_number;
1469 1.1 jnemeth sa.sa_inqbuf.revision = firmware_revision;
1470 1.1 jnemeth
1471 1.1 jnemeth /*
1472 1.1 jnemeth * Determine the operating mode capabilities of the device.
1473 1.1 jnemeth */
1474 1.1 jnemeth if ((id->atap_config & ATAPI_CFG_CMD_MASK)
1475 1.1 jnemeth == ATAPI_CFG_CMD_16) {
1476 1.1 jnemeth periph->periph_cap |= PERIPH_CAP_CMD16;
1477 1.1 jnemeth
1478 1.1 jnemeth /* configure port for packet length */
1479 1.1 jnemeth PRWRITE(siic, PRX(chp->ch_channel, PRO_PCS),
1480 1.5 jakllsch PR_PC_PACKET_LENGTH);
1481 1.5 jakllsch } else {
1482 1.5 jakllsch PRWRITE(siic, PRX(chp->ch_channel, PRO_PCC),
1483 1.1 jnemeth PR_PC_PACKET_LENGTH);
1484 1.1 jnemeth }
1485 1.5 jakllsch
1486 1.1 jnemeth /* XXX This is gross. */
1487 1.1 jnemeth periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK);
1488 1.1 jnemeth
1489 1.1 jnemeth drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa);
1490 1.1 jnemeth
1491 1.1 jnemeth if (drvp->drv_softc)
1492 1.1 jnemeth ata_probe_caps(drvp);
1493 1.1 jnemeth else {
1494 1.1 jnemeth s = splbio();
1495 1.22 bouyer drvp->drive_type &= ATA_DRIVET_NONE;
1496 1.1 jnemeth splx(s);
1497 1.1 jnemeth }
1498 1.1 jnemeth } else {
1499 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: ATAPI_IDENTIFY_DEVICE "
1500 1.1 jnemeth "failed for drive %s:%d:%d: error 0x%x\n",
1501 1.1 jnemeth __func__, SIISATANAME(siic), chp->ch_channel, target,
1502 1.1 jnemeth chp->ch_error), DEBUG_PROBE);
1503 1.1 jnemeth s = splbio();
1504 1.22 bouyer drvp->drive_type &= ATA_DRIVET_NONE;
1505 1.1 jnemeth splx(s);
1506 1.1 jnemeth }
1507 1.1 jnemeth }
1508 1.1 jnemeth
1509 1.1 jnemeth void
1510 1.1 jnemeth siisata_atapi_scsipi_request(struct scsipi_channel *chan,
1511 1.1 jnemeth scsipi_adapter_req_t req, void *arg)
1512 1.1 jnemeth {
1513 1.1 jnemeth struct scsipi_adapter *adapt = chan->chan_adapter;
1514 1.1 jnemeth struct scsipi_periph *periph;
1515 1.1 jnemeth struct scsipi_xfer *sc_xfer;
1516 1.1 jnemeth struct siisata_softc *sc = device_private(adapt->adapt_dev);
1517 1.1 jnemeth struct atac_softc *atac = &sc->sc_atac;
1518 1.1 jnemeth struct ata_xfer *xfer;
1519 1.1 jnemeth int channel = chan->chan_channel;
1520 1.1 jnemeth int drive, s;
1521 1.1 jnemeth
1522 1.1 jnemeth switch (req) {
1523 1.1 jnemeth case ADAPTER_REQ_RUN_XFER:
1524 1.1 jnemeth sc_xfer = arg;
1525 1.1 jnemeth periph = sc_xfer->xs_periph;
1526 1.1 jnemeth drive = periph->periph_target;
1527 1.1 jnemeth
1528 1.1 jnemeth SIISATA_DEBUG_PRINT(("%s: %s:%d:%d\n", __func__,
1529 1.1 jnemeth device_xname(atac->atac_dev), channel, drive),
1530 1.1 jnemeth DEBUG_XFERS);
1531 1.1 jnemeth
1532 1.1 jnemeth if (!device_is_active(atac->atac_dev)) {
1533 1.1 jnemeth sc_xfer->error = XS_DRIVER_STUFFUP;
1534 1.1 jnemeth scsipi_done(sc_xfer);
1535 1.1 jnemeth return;
1536 1.1 jnemeth }
1537 1.1 jnemeth xfer = ata_get_xfer(ATAXF_NOSLEEP);
1538 1.1 jnemeth if (xfer == NULL) {
1539 1.1 jnemeth sc_xfer->error = XS_RESOURCE_SHORTAGE;
1540 1.1 jnemeth scsipi_done(sc_xfer);
1541 1.1 jnemeth return;
1542 1.1 jnemeth }
1543 1.1 jnemeth
1544 1.1 jnemeth if (sc_xfer->xs_control & XS_CTL_POLL)
1545 1.1 jnemeth xfer->c_flags |= C_POLL;
1546 1.1 jnemeth xfer->c_drive = drive;
1547 1.1 jnemeth xfer->c_flags |= C_ATAPI;
1548 1.1 jnemeth xfer->c_cmd = sc_xfer;
1549 1.1 jnemeth xfer->c_databuf = sc_xfer->data;
1550 1.1 jnemeth xfer->c_bcount = sc_xfer->datalen;
1551 1.1 jnemeth xfer->c_start = siisata_atapi_start;
1552 1.1 jnemeth xfer->c_intr = siisata_atapi_complete;
1553 1.1 jnemeth xfer->c_kill_xfer = siisata_atapi_kill_xfer;
1554 1.1 jnemeth xfer->c_dscpoll = 0;
1555 1.1 jnemeth s = splbio();
1556 1.1 jnemeth ata_exec_xfer(atac->atac_channels[channel], xfer);
1557 1.1 jnemeth #ifdef DIAGNOSTIC
1558 1.1 jnemeth if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 &&
1559 1.1 jnemeth (sc_xfer->xs_status & XS_STS_DONE) == 0)
1560 1.1 jnemeth panic("%s: polled command not done", __func__);
1561 1.1 jnemeth #endif
1562 1.1 jnemeth splx(s);
1563 1.1 jnemeth return;
1564 1.1 jnemeth
1565 1.1 jnemeth default:
1566 1.1 jnemeth /* Not supported, nothing to do. */
1567 1.1 jnemeth ;
1568 1.1 jnemeth }
1569 1.1 jnemeth }
1570 1.1 jnemeth
1571 1.1 jnemeth void
1572 1.1 jnemeth siisata_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer)
1573 1.1 jnemeth {
1574 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
1575 1.1 jnemeth struct siisata_prb *prbp;
1576 1.1 jnemeth
1577 1.1 jnemeth struct scsipi_xfer *sc_xfer = xfer->c_cmd;
1578 1.1 jnemeth
1579 1.1 jnemeth int slot = SIISATA_NON_NCQ_SLOT;
1580 1.1 jnemeth int i;
1581 1.1 jnemeth
1582 1.2 jakllsch SIISATA_DEBUG_PRINT( ("%s: %s:%d:%d, scsi flags 0x%x\n", __func__,
1583 1.22 bouyer SIISATANAME((struct siisata_softc *)chp->ch_atac), chp->ch_channel,
1584 1.2 jakllsch chp->ch_drive[xfer->c_drive].drive, sc_xfer->xs_control),
1585 1.2 jakllsch DEBUG_XFERS);
1586 1.1 jnemeth
1587 1.7 jakllsch chp->ch_status = 0;
1588 1.7 jakllsch chp->ch_error = 0;
1589 1.7 jakllsch
1590 1.1 jnemeth prbp = schp->sch_prb[slot];
1591 1.1 jnemeth memset(prbp, 0, sizeof(struct siisata_prb));
1592 1.3 jakllsch
1593 1.1 jnemeth
1594 1.1 jnemeth /* fill in direction for ATAPI command */
1595 1.1 jnemeth if ((sc_xfer->xs_control & XS_CTL_DATA_IN))
1596 1.1 jnemeth prbp->prb_control |= htole16(PRB_CF_PACKET_READ);
1597 1.1 jnemeth if ((sc_xfer->xs_control & XS_CTL_DATA_OUT))
1598 1.1 jnemeth prbp->prb_control |= htole16(PRB_CF_PACKET_WRITE);
1599 1.1 jnemeth
1600 1.3 jakllsch satafis_rhd_construct_atapi(xfer, prbp->prb_fis);
1601 1.22 bouyer KASSERT(xfer->c_drive <= PMP_PORT_CTL);
1602 1.22 bouyer prbp->prb_fis[rhd_c] |= xfer->c_drive;
1603 1.1 jnemeth
1604 1.1 jnemeth /* copy over ATAPI command */
1605 1.1 jnemeth memcpy(prbp->prb_atapi, sc_xfer->cmd, sc_xfer->cmdlen);
1606 1.1 jnemeth
1607 1.1 jnemeth if (siisata_dma_setup(chp, slot,
1608 1.1 jnemeth (sc_xfer->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ?
1609 1.1 jnemeth xfer->c_databuf : NULL,
1610 1.1 jnemeth xfer->c_bcount,
1611 1.1 jnemeth (sc_xfer->xs_control & XS_CTL_DATA_IN) ?
1612 1.1 jnemeth BUS_DMA_READ : BUS_DMA_WRITE)
1613 1.1 jnemeth )
1614 1.1 jnemeth panic("%s", __func__);
1615 1.1 jnemeth
1616 1.1 jnemeth if (xfer->c_flags & C_POLL) {
1617 1.1 jnemeth /* polled command, disable interrupts */
1618 1.3 jakllsch prbp->prb_control = htole16(PRB_CF_INTERRUPT_MASK);
1619 1.17 bouyer siisata_disable_port_interrupt(chp);
1620 1.1 jnemeth }
1621 1.1 jnemeth
1622 1.2 jakllsch siisata_activate_prb(schp, slot);
1623 1.1 jnemeth
1624 1.1 jnemeth if ((xfer->c_flags & C_POLL) == 0) {
1625 1.1 jnemeth chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */
1626 1.1 jnemeth callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout),
1627 1.1 jnemeth siisata_timeout, chp);
1628 1.1 jnemeth goto out;
1629 1.1 jnemeth }
1630 1.3 jakllsch
1631 1.1 jnemeth /*
1632 1.1 jnemeth * polled command
1633 1.1 jnemeth */
1634 1.1 jnemeth for (i = 0; i < ATA_DELAY / 10; i++) {
1635 1.1 jnemeth if (sc_xfer->xs_status & XS_STS_DONE)
1636 1.1 jnemeth break;
1637 1.3 jakllsch siisata_intr_port(schp);
1638 1.6 jakllsch DELAY(1000);
1639 1.1 jnemeth }
1640 1.1 jnemeth if ((sc_xfer->xs_status & XS_STS_DONE) == 0) {
1641 1.22 bouyer siisata_timeout(chp);
1642 1.1 jnemeth }
1643 1.1 jnemeth /* reenable interrupts */
1644 1.17 bouyer siisata_enable_port_interrupt(chp);
1645 1.1 jnemeth out:
1646 1.1 jnemeth SIISATA_DEBUG_PRINT(
1647 1.22 bouyer ("%s: %s: done\n", SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), DEBUG_FUNCS);
1648 1.1 jnemeth return;
1649 1.1 jnemeth }
1650 1.1 jnemeth
1651 1.1 jnemeth int
1652 1.1 jnemeth siisata_atapi_complete(struct ata_channel *chp, struct ata_xfer *xfer,
1653 1.1 jnemeth int slot)
1654 1.1 jnemeth {
1655 1.1 jnemeth struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac;
1656 1.1 jnemeth struct siisata_channel *schp = (struct siisata_channel *)chp;
1657 1.1 jnemeth struct scsipi_xfer *sc_xfer = xfer->c_cmd;
1658 1.1 jnemeth
1659 1.1 jnemeth SIISATA_DEBUG_PRINT(
1660 1.1 jnemeth ("%s: %s()\n", SIISATANAME(sc), __func__), DEBUG_INTR);
1661 1.1 jnemeth
1662 1.1 jnemeth /* this comamnd is not active any more */
1663 1.1 jnemeth schp->sch_active_slots &= ~__BIT(slot);
1664 1.3 jakllsch chp->ch_flags &= ~ATACH_IRQ_WAIT;
1665 1.3 jakllsch if (xfer->c_flags & C_TIMEOU) {
1666 1.3 jakllsch sc_xfer->error = XS_TIMEOUT;
1667 1.3 jakllsch } else {
1668 1.3 jakllsch callout_stop(&chp->ch_callout);
1669 1.3 jakllsch sc_xfer->error = XS_NOERROR;
1670 1.1 jnemeth }
1671 1.1 jnemeth
1672 1.3 jakllsch bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0,
1673 1.3 jakllsch schp->sch_datad[slot]->dm_mapsize,
1674 1.3 jakllsch (sc_xfer->xs_control & XS_CTL_DATA_IN) ?
1675 1.3 jakllsch BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
1676 1.3 jakllsch bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]);
1677 1.1 jnemeth
1678 1.22 bouyer if (chp->ch_drive[xfer->c_drive].drive_flags & ATA_DRIVE_WAITDRAIN) {
1679 1.1 jnemeth siisata_atapi_kill_xfer(chp, xfer, KILL_GONE);
1680 1.22 bouyer chp->ch_drive[xfer->c_drive].drive_flags &= ~ATA_DRIVE_WAITDRAIN;
1681 1.1 jnemeth wakeup(&chp->ch_queue->active_xfer);
1682 1.3 jakllsch return 0; /* XXX verify */
1683 1.1 jnemeth }
1684 1.1 jnemeth
1685 1.1 jnemeth chp->ch_queue->active_xfer = NULL;
1686 1.1 jnemeth ata_free_xfer(chp, xfer);
1687 1.3 jakllsch sc_xfer->resid = sc_xfer->datalen;
1688 1.3 jakllsch sc_xfer->resid -= PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC));
1689 1.3 jakllsch SIISATA_DEBUG_PRINT(("%s: %s datalen %d resid %d\n", SIISATANAME(sc),
1690 1.3 jakllsch __func__, sc_xfer->datalen, sc_xfer->resid), DEBUG_XFERS);
1691 1.3 jakllsch if ((chp->ch_status & WDCS_ERR) &&
1692 1.3 jakllsch ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 ||
1693 1.3 jakllsch sc_xfer->resid == sc_xfer->datalen)) {
1694 1.3 jakllsch sc_xfer->error = XS_SHORTSENSE;
1695 1.3 jakllsch sc_xfer->sense.atapi_sense = chp->ch_error;
1696 1.3 jakllsch if ((sc_xfer->xs_periph->periph_quirks &
1697 1.3 jakllsch PQUIRK_NOSENSE) == 0) {
1698 1.3 jakllsch /* request sense */
1699 1.3 jakllsch sc_xfer->error = XS_BUSY;
1700 1.3 jakllsch sc_xfer->status = SCSI_CHECK;
1701 1.3 jakllsch }
1702 1.3 jakllsch }
1703 1.1 jnemeth scsipi_done(sc_xfer);
1704 1.1 jnemeth atastart(chp);
1705 1.3 jakllsch return 0; /* XXX verify */
1706 1.1 jnemeth }
1707 1.1 jnemeth
1708 1.1 jnemeth #endif /* NATAPIBUS */
1709