siisata.c revision 1.21
1 /* $NetBSD: siisata.c,v 1.21 2012/07/26 20:49:48 jakllsch Exp $ */ 2 3 /* from ahcisata_core.c */ 4 5 /* 6 * Copyright (c) 2006 Manuel Bouyer. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 */ 29 30 /* from atapi_wdc.c */ 31 32 /* 33 * Copyright (c) 1998, 2001 Manuel Bouyer. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 45 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 46 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 47 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 49 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 53 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 */ 55 56 /* 57 * Copyright (c) 2007, 2008, 2009, 2010 Jonathan A. Kollasch. 58 * All rights reserved. 59 * 60 * Redistribution and use in source and binary forms, with or without 61 * modification, are permitted provided that the following conditions 62 * are met: 63 * 1. Redistributions of source code must retain the above copyright 64 * notice, this list of conditions and the following disclaimer. 65 * 2. Redistributions in binary form must reproduce the above copyright 66 * notice, this list of conditions and the following disclaimer in the 67 * documentation and/or other materials provided with the distribution. 68 * 69 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 72 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 73 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 74 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 75 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 76 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 77 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 78 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 79 */ 80 81 #include <sys/cdefs.h> 82 __KERNEL_RCSID(0, "$NetBSD: siisata.c,v 1.21 2012/07/26 20:49:48 jakllsch Exp $"); 83 84 #include <sys/types.h> 85 #include <sys/malloc.h> 86 #include <sys/param.h> 87 #include <sys/kernel.h> 88 #include <sys/systm.h> 89 #include <sys/syslog.h> 90 #include <sys/disklabel.h> 91 #include <sys/buf.h> 92 #include <sys/proc.h> 93 94 #include <dev/ata/atareg.h> 95 #include <dev/ata/satavar.h> 96 #include <dev/ata/satareg.h> 97 #include <dev/ata/satafisvar.h> 98 #include <dev/ata/satafisreg.h> 99 #include <dev/ic/siisatavar.h> 100 #include <dev/ic/siisatareg.h> 101 102 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 103 104 #include "atapibus.h" 105 106 #ifdef SIISATA_DEBUG 107 int siisata_debug_mask = 0; 108 #endif 109 110 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 111 112 static void siisata_attach_port(struct siisata_softc *, int); 113 static void siisata_intr_port(struct siisata_channel *); 114 115 void siisata_probe_drive(struct ata_channel *); 116 void siisata_setup_channel(struct ata_channel *); 117 118 int siisata_ata_bio(struct ata_drive_datas *, struct ata_bio *); 119 void siisata_reset_drive(struct ata_drive_datas *, int); 120 void siisata_reset_channel(struct ata_channel *, int); 121 int siisata_ata_addref(struct ata_drive_datas *); 122 void siisata_ata_delref(struct ata_drive_datas *); 123 void siisata_killpending(struct ata_drive_datas *); 124 125 void siisata_cmd_start(struct ata_channel *, struct ata_xfer *); 126 int siisata_cmd_complete(struct ata_channel *, struct ata_xfer *, int); 127 void siisata_cmd_done(struct ata_channel *, struct ata_xfer *, int); 128 void siisata_cmd_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 129 130 void siisata_bio_start(struct ata_channel *, struct ata_xfer *); 131 int siisata_bio_complete(struct ata_channel *, struct ata_xfer *, int); 132 void siisata_bio_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 133 int siisata_exec_command(struct ata_drive_datas *, struct ata_command *); 134 135 void siisata_timeout(void *); 136 137 static void siisata_reinit_port(struct ata_channel *); 138 static void siisata_device_reset(struct ata_channel *); 139 static void siisata_activate_prb(struct siisata_channel *, int); 140 static void siisata_deactivate_prb(struct siisata_channel *, int); 141 static int siisata_dma_setup(struct ata_channel *chp, int slot, 142 void *data, size_t, int); 143 144 #if NATAPIBUS > 0 145 void siisata_atapibus_attach(struct atabus_softc *); 146 void siisata_atapi_probe_device(struct atapibus_softc *, int); 147 void siisata_atapi_minphys(struct buf *); 148 void siisata_atapi_start(struct ata_channel *,struct ata_xfer *); 149 int siisata_atapi_complete(struct ata_channel *, struct ata_xfer *, int); 150 void siisata_atapi_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 151 void siisata_atapi_done(struct ata_channel *, struct ata_xfer *, int); 152 void siisata_atapi_scsipi_request(struct scsipi_channel *, 153 scsipi_adapter_req_t, void *); 154 void siisata_atapi_kill_pending(struct scsipi_periph *); 155 #endif /* NATAPIBUS */ 156 157 const struct ata_bustype siisata_ata_bustype = { 158 SCSIPI_BUSTYPE_ATA, 159 siisata_ata_bio, 160 siisata_reset_drive, 161 siisata_reset_channel, 162 siisata_exec_command, 163 ata_get_params, 164 siisata_ata_addref, 165 siisata_ata_delref, 166 siisata_killpending 167 }; 168 169 #if NATAPIBUS > 0 170 static const struct scsipi_bustype siisata_atapi_bustype = { 171 SCSIPI_BUSTYPE_ATAPI, 172 atapi_scsipi_cmd, 173 atapi_interpret_sense, 174 atapi_print_addr, 175 siisata_atapi_kill_pending, 176 NULL, 177 }; 178 #endif /* NATAPIBUS */ 179 180 181 void 182 siisata_attach(struct siisata_softc *sc) 183 { 184 int i; 185 186 SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n", 187 SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)), DEBUG_FUNCS); 188 189 sc->sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA; 190 sc->sc_atac.atac_pio_cap = 4; 191 sc->sc_atac.atac_dma_cap = 2; 192 sc->sc_atac.atac_udma_cap = 6; 193 sc->sc_atac.atac_channels = sc->sc_chanarray; 194 sc->sc_atac.atac_probe = siisata_probe_drive; 195 sc->sc_atac.atac_bustype_ata = &siisata_ata_bustype; 196 sc->sc_atac.atac_set_modes = siisata_setup_channel; 197 #if NATAPIBUS > 0 198 sc->sc_atac.atac_atapibus_attach = siisata_atapibus_attach; 199 #endif 200 201 /* come out of reset state */ 202 GRWRITE(sc, GR_GC, 0); 203 204 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 205 siisata_attach_port(sc, i); 206 } 207 208 SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n", 209 SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)), 210 DEBUG_FUNCS); 211 return; 212 } 213 214 static void 215 siisata_disable_port_interrupt(struct ata_channel *chp) 216 { 217 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 218 219 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIEC), 0xffffffff); 220 } 221 222 static void 223 siisata_enable_port_interrupt(struct ata_channel *chp) 224 { 225 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 226 227 /* clear any interrupts */ 228 (void)PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)); 229 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff); 230 /* and enable CmdErrr+CmdCmpl interrupting */ 231 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIES), 232 PR_PIS_CMDERRR | PR_PIS_CMDCMPL); 233 } 234 235 static void 236 siisata_init_port(struct siisata_softc *sc, int port) 237 { 238 struct siisata_channel *schp; 239 struct ata_channel *chp; 240 241 schp = &sc->sc_channels[port]; 242 chp = (struct ata_channel *)schp; 243 244 /* come out of reset, 64-bit activation */ 245 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC), 246 PR_PC_32BA | PR_PC_PORT_RESET); 247 /* initialize port */ 248 siisata_reinit_port(chp); 249 /* enable CmdErrr+CmdCmpl interrupting */ 250 siisata_enable_port_interrupt(chp); 251 /* enable port interrupt */ 252 GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel)); 253 } 254 255 static void 256 siisata_attach_port(struct siisata_softc *sc, int port) 257 { 258 int j; 259 int dmasize; 260 int error; 261 void *prbp; 262 struct siisata_channel *schp; 263 struct ata_channel *chp; 264 265 schp = &sc->sc_channels[port]; 266 chp = (struct ata_channel *)schp; 267 sc->sc_chanarray[port] = chp; 268 chp->ch_channel = port; 269 chp->ch_atac = &sc->sc_atac; 270 chp->ch_queue = malloc(sizeof(struct ata_queue), 271 M_DEVBUF, M_NOWAIT); 272 if (chp->ch_queue == NULL) { 273 aprint_error_dev(sc->sc_atac.atac_dev, 274 "port %d: can't allocate memory " 275 "for command queue\n", chp->ch_channel); 276 return; 277 } 278 279 dmasize = SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS; 280 281 SIISATA_DEBUG_PRINT(("%s: %s: dmasize: %d\n", SIISATANAME(sc), 282 __func__, dmasize), DEBUG_FUNCS); 283 284 error = bus_dmamem_alloc(sc->sc_dmat, dmasize, PAGE_SIZE, 0, 285 &schp->sch_prb_seg, 1, &schp->sch_prb_nseg, BUS_DMA_NOWAIT); 286 if (error) { 287 aprint_error_dev(sc->sc_atac.atac_dev, 288 "unable to allocate PRB table memory, " 289 "error=%d\n", error); 290 return; 291 } 292 293 error = bus_dmamem_map(sc->sc_dmat, 294 &schp->sch_prb_seg, schp->sch_prb_nseg, 295 dmasize, &prbp, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 296 if (error) { 297 aprint_error_dev(sc->sc_atac.atac_dev, 298 "unable to map PRB table memory, " 299 "error=%d\n", error); 300 bus_dmamem_free(sc->sc_dmat, 301 &schp->sch_prb_seg, schp->sch_prb_nseg); 302 return; 303 } 304 305 error = bus_dmamap_create(sc->sc_dmat, dmasize, 1, dmasize, 0, 306 BUS_DMA_NOWAIT, &schp->sch_prbd); 307 if (error) { 308 aprint_error_dev(sc->sc_atac.atac_dev, 309 "unable to create PRB table map, " 310 "error=%d\n", error); 311 bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize); 312 bus_dmamem_free(sc->sc_dmat, 313 &schp->sch_prb_seg, schp->sch_prb_nseg); 314 return; 315 } 316 317 error = bus_dmamap_load(sc->sc_dmat, schp->sch_prbd, 318 prbp, dmasize, NULL, BUS_DMA_NOWAIT); 319 if (error) { 320 aprint_error_dev(sc->sc_atac.atac_dev, 321 "unable to load PRB table map, " 322 "error=%d\n", error); 323 bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd); 324 bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize); 325 bus_dmamem_free(sc->sc_dmat, 326 &schp->sch_prb_seg, schp->sch_prb_nseg); 327 return; 328 } 329 330 for (j = 0; j < SIISATA_MAX_SLOTS; j++) { 331 schp->sch_prb[j] = (struct siisata_prb *) 332 ((char *)prbp + SIISATA_CMD_SIZE * j); 333 schp->sch_bus_prb[j] = 334 schp->sch_prbd->dm_segs[0].ds_addr + 335 SIISATA_CMD_SIZE * j; 336 error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, 337 SIISATA_NSGE, MAXPHYS, 0, 338 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 339 &schp->sch_datad[j]); 340 if (error) { 341 aprint_error_dev(sc->sc_atac.atac_dev, 342 "couldn't create xfer DMA map, error=%d\n", 343 error); 344 return; 345 } 346 } 347 348 chp->ch_ndrive = 1; 349 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 350 PRX(chp->ch_channel, PRO_SSTATUS), 4, &schp->sch_sstatus) != 0) { 351 aprint_error_dev(sc->sc_atac.atac_dev, 352 "couldn't map port %d SStatus regs\n", 353 chp->ch_channel); 354 return; 355 } 356 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 357 PRX(chp->ch_channel, PRO_SCONTROL), 4, &schp->sch_scontrol) != 0) { 358 aprint_error_dev(sc->sc_atac.atac_dev, 359 "couldn't map port %d SControl regs\n", 360 chp->ch_channel); 361 return; 362 } 363 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 364 PRX(chp->ch_channel, PRO_SERROR), 4, &schp->sch_serror) != 0) { 365 aprint_error_dev(sc->sc_atac.atac_dev, 366 "couldn't map port %d SError regs\n", 367 chp->ch_channel); 368 return; 369 } 370 371 siisata_init_port(sc, port); 372 373 ata_channel_attach(chp); 374 375 return; 376 } 377 378 int 379 siisata_detach(struct siisata_softc *sc, int flags) 380 { 381 struct atac_softc *atac = &sc->sc_atac; 382 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 383 struct siisata_channel *schp; 384 struct ata_channel *chp; 385 int i, j, error; 386 387 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 388 schp = &sc->sc_channels[i]; 389 chp = sc->sc_chanarray[i]; 390 391 if (chp->atabus == NULL) 392 continue; 393 if ((error = config_detach(chp->atabus, flags)) != 0) 394 return error; 395 396 for (j = 0; j < SIISATA_MAX_SLOTS; j++) 397 bus_dmamap_destroy(sc->sc_dmat, schp->sch_datad[j]); 398 399 bus_dmamap_unload(sc->sc_dmat, schp->sch_prbd); 400 bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd); 401 bus_dmamem_unmap(sc->sc_dmat, schp->sch_prb[0], 402 SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS); 403 bus_dmamem_free(sc->sc_dmat, 404 &schp->sch_prb_seg, schp->sch_prb_nseg); 405 406 free(chp->ch_queue, M_DEVBUF); 407 chp->atabus = NULL; 408 } 409 410 if (adapt->adapt_refcnt != 0) 411 return EBUSY; 412 413 /* leave the chip in reset */ 414 GRWRITE(sc, GR_GC, GR_GC_GLBLRST); 415 416 return 0; 417 } 418 419 void 420 siisata_resume(struct siisata_softc *sc) 421 { 422 int i; 423 424 /* come out of reset state */ 425 GRWRITE(sc, GR_GC, 0); 426 427 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 428 siisata_init_port(sc, i); 429 } 430 431 } 432 433 int 434 siisata_intr(void *v) 435 { 436 struct siisata_softc *sc = v; 437 uint32_t is; 438 int i, r = 0; 439 while ((is = GRREAD(sc, GR_GIS))) { 440 SIISATA_DEBUG_PRINT(("%s: %s: GR_GIS: 0x%08x\n", 441 SIISATANAME(sc), __func__, is), DEBUG_INTR); 442 r = 1; 443 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) 444 if (is & GR_GIS_PXIS(i)) 445 siisata_intr_port(&sc->sc_channels[i]); 446 } 447 return r; 448 } 449 450 static void 451 siisata_intr_port(struct siisata_channel *schp) 452 { 453 struct siisata_softc *sc; 454 struct ata_channel *chp; 455 struct ata_xfer *xfer; 456 int slot; 457 uint32_t pss, pis; 458 uint32_t prbfis; 459 460 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 461 chp = &schp->ata_channel; 462 xfer = chp->ch_queue->active_xfer; 463 slot = SIISATA_NON_NCQ_SLOT; 464 465 SIISATA_DEBUG_PRINT(("%s: %s port %d\n", 466 SIISATANAME(sc), __func__, chp->ch_channel), DEBUG_INTR); 467 468 pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)); 469 470 if (pis & PR_PIS_CMDCMPL) { 471 /* get slot status, clearing completion interrupt */ 472 pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)); 473 /* is this expected? */ 474 /* XXX improve */ 475 if ((schp->sch_active_slots & __BIT(slot)) == 0) { 476 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff); 477 log(LOG_WARNING, "%s: unexpected command " 478 "completion on port %d\n", 479 SIISATANAME(sc), chp->ch_channel); 480 return; 481 } 482 } else if (pis & PR_PIS_CMDERRR) { 483 uint32_t ec; 484 485 /* emulate a CRC error by default */ 486 chp->ch_status = WDCS_ERR; 487 chp->ch_error = WDCE_CRC; 488 489 ec = PRREAD(sc, PRX(chp->ch_channel, PRO_PCE)); 490 if (ec <= PR_PCE_DATAFISERROR) { 491 if (ec == PR_PCE_DEVICEERROR) { 492 /* read in specific information about error */ 493 prbfis = bus_space_read_stream_4( 494 sc->sc_prt, sc->sc_prh, 495 PRSX(chp->ch_channel, slot, PRSO_FIS)); 496 /* set ch_status and ch_error */ 497 satafis_rdh_parse(chp, (uint8_t *)&prbfis); 498 } 499 siisata_reinit_port(chp); 500 } else { 501 aprint_error_dev(sc->sc_atac.atac_dev, 502 "fatal error %d on channel %d, resetting\n", 503 ec, chp->ch_channel); 504 /* okay, we have a "Fatal Error" */ 505 siisata_device_reset(chp); 506 } 507 } 508 509 /* clear some (ok, all) ints */ 510 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff); 511 if (xfer && xfer->c_intr) 512 xfer->c_intr(chp, xfer, slot); 513 514 return; 515 } 516 517 void 518 siisata_reset_drive(struct ata_drive_datas *drvp, int flags) 519 { 520 struct ata_channel *chp = drvp->chnl_softc; 521 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 522 struct siisata_channel *schp = (struct siisata_channel *)chp; 523 struct siisata_prb *prb; 524 int slot = SIISATA_NON_NCQ_SLOT; 525 int i; 526 527 /* wait for ready */ 528 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 529 DELAY(10); 530 531 prb = schp->sch_prb[slot]; 532 memset(prb, 0, sizeof(struct siisata_prb)); 533 prb->prb_control = 534 htole16(PRB_CF_SOFT_RESET | PRB_CF_INTERRUPT_MASK); 535 536 siisata_activate_prb(schp, slot); 537 538 for(i = 0; i < 31000; i++) { 539 if (PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) & 540 PR_PXSS(slot)) 541 DELAY(1000); 542 else 543 break; 544 } 545 546 siisata_deactivate_prb(schp, slot); 547 548 log(LOG_DEBUG, "%s: port %d: ch_status %x ch_error %x\n", 549 __func__, chp->ch_channel, chp->ch_status, chp->ch_error); 550 551 #if 1 552 /* attempt to downgrade signaling in event of CRC error */ 553 /* XXX should be part of the MI (S)ATA subsystem */ 554 if (chp->ch_status == 0x51 && chp->ch_error == 0x84) { 555 bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0, 556 SControl_IPM_NONE | SControl_SPD_G1 | SControl_DET_INIT); 557 DELAY(10); 558 bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0, 559 SControl_IPM_NONE | SControl_SPD_G1); 560 DELAY(10); 561 for (;;) { 562 if ((bus_space_read_4(sc->sc_prt, schp->sch_sstatus, 0) 563 & SStatus_DET_mask) == SStatus_DET_DEV) 564 break; 565 DELAY(10); 566 } 567 } 568 #endif 569 570 #if 1 571 chp->ch_status = 0; 572 chp->ch_error = 0; 573 #endif 574 575 return; 576 } 577 578 void 579 siisata_reset_channel(struct ata_channel *chp, int flags) 580 { 581 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 582 struct siisata_channel *schp = (struct siisata_channel *)chp; 583 584 SIISATA_DEBUG_PRINT(("%s: %s\n", SIISATANAME(sc), __func__), 585 DEBUG_FUNCS); 586 587 if (sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol, 588 schp->sch_sstatus) != SStatus_DET_DEV) { 589 aprint_error("%s port %d: reset failed\n", 590 SIISATANAME(sc), chp->ch_channel); 591 /* XXX and then ? */ 592 } 593 /* wait for ready */ 594 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 595 DELAY(10); 596 PRWRITE(sc, PRX(chp->ch_channel, PRO_SERROR), 597 PRREAD(sc, PRX(chp->ch_channel, PRO_SERROR))); 598 if (chp->ch_queue->active_xfer) { 599 chp->ch_queue->active_xfer->c_kill_xfer(chp, 600 chp->ch_queue->active_xfer, KILL_RESET); 601 } 602 603 return; 604 } 605 606 int 607 siisata_ata_addref(struct ata_drive_datas *drvp) 608 { 609 return 0; 610 } 611 612 void 613 siisata_ata_delref(struct ata_drive_datas *drvp) 614 { 615 return; 616 } 617 618 void 619 siisata_killpending(struct ata_drive_datas *drvp) 620 { 621 return; 622 } 623 624 void 625 siisata_probe_drive(struct ata_channel *chp) 626 { 627 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 628 struct siisata_channel *schp = (struct siisata_channel *)chp; 629 int i; 630 int s; 631 uint32_t sig; 632 int slot = SIISATA_NON_NCQ_SLOT; 633 struct siisata_prb *prb; 634 bool timed_out; 635 636 SIISATA_DEBUG_PRINT(("%s: %s: port %d start\n", SIISATANAME(sc), 637 __func__, chp->ch_channel), DEBUG_FUNCS); 638 639 /* XXX This should be done by other code. */ 640 for (i = 0; i < chp->ch_ndrive; i++) { 641 chp->ch_drive[i].chnl_softc = chp; 642 chp->ch_drive[i].drive = i; 643 } 644 645 /* 646 * disable port interrupt as we're polling for PHY up and 647 * prb completion 648 */ 649 siisata_disable_port_interrupt(chp); 650 651 switch(sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol, 652 schp->sch_sstatus)) { 653 case SStatus_DET_DEV: 654 /* clear any interrupts */ 655 (void)PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)); 656 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff); 657 /* wait for ready */ 658 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) 659 & PR_PS_PORT_READY)) 660 DELAY(10); 661 prb = schp->sch_prb[slot]; 662 memset(prb, 0, sizeof(struct siisata_prb)); 663 prb->prb_control = htole16(PRB_CF_SOFT_RESET); 664 665 siisata_activate_prb(schp, slot); 666 667 timed_out = 1; 668 for(i = 0; i < 3100; i++) { 669 if ((PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) & 670 PR_PXSS(slot)) == 0) { 671 /* prb completed */ 672 timed_out = 0; 673 break; 674 } 675 if (PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)) & 676 (PR_PIS_CMDERRR << 16)) { 677 /* we got an error; handle as timeout */ 678 break; 679 } 680 681 tsleep(schp, PRIBIO, "siiprb", mstohz(10)); 682 } 683 684 siisata_deactivate_prb(schp, slot); 685 if (timed_out) { 686 aprint_error_dev(sc->sc_atac.atac_dev, 687 "SOFT_RESET failed on port %d (error %d PSS 0x%x), " 688 "disabling\n", chp->ch_channel, 689 PRREAD(sc, PRX(chp->ch_channel, PRO_PCE)), 690 PRREAD(sc, PRX(chp->ch_channel, PRO_PSS))); 691 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), 692 PR_PC_PORT_RESET); 693 break; 694 } 695 696 /* read the signature out of the FIS */ 697 sig = 0; 698 sig |= (PRREAD(sc, PRSX(chp->ch_channel, slot, 699 PRSO_FIS+0x4)) & 0x00ffffff) << 8; 700 sig |= PRREAD(sc, PRSX(chp->ch_channel, slot, 701 PRSO_FIS+0xc)) & 0xff; 702 703 SIISATA_DEBUG_PRINT(("%s: %s: sig=0x%08x\n", SIISATANAME(sc), 704 __func__, sig), DEBUG_PROBE); 705 706 /* some ATAPI devices have bogus lower two bytes, sigh */ 707 if ((sig & 0xffff0000) == 0xeb140000) { 708 sig &= 0xffff0000; 709 sig |= 0x00000101; 710 } 711 712 s = splbio(); 713 switch (sig) { 714 case 0xeb140101: 715 chp->ch_drive[0].drive_flags |= DRIVE_ATAPI; 716 break; 717 case 0x00000101: 718 chp->ch_drive[0].drive_flags |= DRIVE_ATA; 719 break; 720 default: 721 chp->ch_drive[0].drive_flags |= DRIVE_ATA; 722 aprint_verbose_dev(sc->sc_atac.atac_dev, 723 "Unrecognized signature 0x%08x on port %d. " 724 "Assuming it's a disk.\n", sig, chp->ch_channel); 725 break; 726 } 727 splx(s); 728 break; 729 default: 730 break; 731 } 732 733 siisata_enable_port_interrupt(chp); 734 SIISATA_DEBUG_PRINT(("%s: %s: port %d done\n", SIISATANAME(sc), 735 __func__, chp->ch_channel), DEBUG_PROBE); 736 return; 737 } 738 739 void 740 siisata_setup_channel(struct ata_channel *chp) 741 { 742 return; 743 } 744 745 int 746 siisata_exec_command(struct ata_drive_datas *drvp, struct ata_command *ata_c) 747 { 748 struct ata_channel *chp = drvp->chnl_softc; 749 struct ata_xfer *xfer; 750 int ret; 751 int s; 752 753 SIISATA_DEBUG_PRINT(("%s: %s begins\n", 754 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 755 DEBUG_FUNCS); 756 757 xfer = ata_get_xfer(ata_c->flags & AT_WAIT ? 758 ATAXF_CANSLEEP : ATAXF_NOSLEEP); 759 if (xfer == NULL) 760 return ATACMD_TRY_AGAIN; 761 if (ata_c->flags & AT_POLL) 762 xfer->c_flags |= C_POLL; 763 if (ata_c->flags & AT_WAIT) 764 xfer->c_flags |= C_WAIT; 765 xfer->c_drive = drvp->drive; 766 xfer->c_databuf = ata_c->data; 767 xfer->c_bcount = ata_c->bcount; 768 xfer->c_cmd = ata_c; 769 xfer->c_start = siisata_cmd_start; 770 xfer->c_intr = siisata_cmd_complete; 771 xfer->c_kill_xfer = siisata_cmd_kill_xfer; 772 s = splbio(); 773 ata_exec_xfer(chp, xfer); 774 #ifdef DIAGNOSTIC 775 if ((ata_c->flags & AT_POLL) != 0 && 776 (ata_c->flags & AT_DONE) == 0) 777 panic("%s: polled command not done", __func__); 778 #endif 779 if (ata_c->flags & AT_DONE) { 780 ret = ATACMD_COMPLETE; 781 } else { 782 if (ata_c->flags & AT_WAIT) { 783 while ((ata_c->flags & AT_DONE) == 0) { 784 SIISATA_DEBUG_PRINT(("%s: %s: sleeping\n", 785 SIISATANAME( 786 (struct siisata_softc *)chp->ch_atac), 787 __func__), DEBUG_FUNCS); 788 tsleep(ata_c, PRIBIO, "siicmd", 0); 789 } 790 ret = ATACMD_COMPLETE; 791 } else { 792 ret = ATACMD_QUEUED; 793 } 794 } 795 splx(s); 796 SIISATA_DEBUG_PRINT( ("%s: %s ends\n", 797 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 798 DEBUG_FUNCS); 799 return ret; 800 } 801 802 void 803 siisata_cmd_start(struct ata_channel *chp, struct ata_xfer *xfer) 804 { 805 struct siisata_channel *schp = (struct siisata_channel *)chp; 806 struct ata_command *ata_c = xfer->c_cmd; 807 int slot = SIISATA_NON_NCQ_SLOT; 808 struct siisata_prb *prb; 809 int i; 810 811 SIISATA_DEBUG_PRINT(("%s: %s port %d, slot %d\n", 812 SIISATANAME(sc), __func__, chp->ch_channel, slot), DEBUG_FUNCS); 813 814 chp->ch_status = 0; 815 chp->ch_error = 0; 816 817 prb = schp->sch_prb[slot]; 818 memset(prb, 0, sizeof(struct siisata_prb)); 819 820 satafis_rhd_construct_cmd(ata_c, prb->prb_fis); 821 822 memset(prb->prb_atapi, 0, sizeof(prb->prb_atapi)); 823 824 if (siisata_dma_setup(chp, slot, 825 (ata_c->flags & (AT_READ | AT_WRITE)) ? ata_c->data : NULL, 826 ata_c->bcount, 827 (ata_c->flags & AT_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) { 828 ata_c->flags |= AT_DF; 829 siisata_cmd_complete(chp, xfer, slot); 830 return; 831 } 832 833 if (xfer->c_flags & C_POLL) { 834 /* polled command, disable interrupts */ 835 prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 836 siisata_disable_port_interrupt(chp); 837 } 838 839 /* go for it */ 840 siisata_activate_prb(schp, slot); 841 842 if ((ata_c->flags & AT_POLL) == 0) { 843 chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */ 844 callout_reset(&chp->ch_callout, mstohz(ata_c->timeout), 845 siisata_timeout, chp); 846 goto out; 847 } 848 849 /* 850 * polled command 851 */ 852 for (i = 0; i < ata_c->timeout / 10; i++) { 853 if (ata_c->flags & AT_DONE) 854 break; 855 siisata_intr_port(schp); 856 DELAY(1000); 857 } 858 859 if ((ata_c->flags & AT_DONE) == 0) { 860 ata_c->flags |= AT_TIMEOU; 861 siisata_cmd_complete(chp, xfer, slot); 862 } 863 864 /* reenable interrupts */ 865 siisata_enable_port_interrupt(chp); 866 out: 867 SIISATA_DEBUG_PRINT( 868 ("%s: %s: done\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 869 return; 870 } 871 872 void 873 siisata_cmd_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 874 int reason) 875 { 876 int slot = SIISATA_NON_NCQ_SLOT; 877 878 struct ata_command *ata_c = xfer->c_cmd; 879 switch (reason) { 880 case KILL_GONE: 881 ata_c->flags |= AT_GONE; 882 break; 883 case KILL_RESET: 884 ata_c->flags |= AT_RESET; 885 break; 886 default: 887 panic("%s: port %d: unknown reason %d", 888 __func__, chp->ch_channel, reason); 889 } 890 siisata_cmd_done(chp, xfer, slot); 891 } 892 893 int 894 siisata_cmd_complete(struct ata_channel *chp, struct ata_xfer *xfer, int slot) 895 { 896 struct ata_command *ata_c = xfer->c_cmd; 897 #ifdef SIISATA_DEBUG 898 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 899 #endif 900 901 SIISATA_DEBUG_PRINT( 902 ("%s: %s\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 903 904 chp->ch_flags &= ~ATACH_IRQ_WAIT; 905 if (xfer->c_flags & C_TIMEOU) 906 ata_c->flags |= AT_TIMEOU; 907 else 908 callout_stop(&chp->ch_callout); 909 910 if (chp->ch_status & WDCS_BSY) { 911 ata_c->flags |= AT_TIMEOU; 912 } else if (chp->ch_status & WDCS_ERR) { 913 ata_c->r_error = chp->ch_error; 914 ata_c->flags |= AT_ERROR; 915 } 916 917 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) { 918 siisata_cmd_kill_xfer(chp, xfer, KILL_GONE); 919 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN; 920 wakeup(&chp->ch_queue->active_xfer); 921 return 0; 922 } else 923 siisata_cmd_done(chp, xfer, slot); 924 925 return 0; 926 } 927 928 void 929 siisata_cmd_done(struct ata_channel *chp, struct ata_xfer *xfer, int slot) 930 { 931 uint32_t fis[howmany(RDH_FISLEN,sizeof(uint32_t))]; 932 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 933 struct siisata_channel *schp = (struct siisata_channel *)chp; 934 struct ata_command *ata_c = xfer->c_cmd; 935 uint16_t *idwordbuf; 936 int i; 937 938 SIISATA_DEBUG_PRINT( 939 ("%s: %s.\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 940 941 siisata_deactivate_prb(schp, slot); 942 943 if (ata_c->flags & (AT_READ | AT_WRITE)) { 944 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 945 schp->sch_datad[slot]->dm_mapsize, 946 (ata_c->flags & AT_READ) ? BUS_DMASYNC_POSTREAD : 947 BUS_DMASYNC_POSTWRITE); 948 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]); 949 } 950 951 if (ata_c->flags & AT_READREG) { 952 bus_space_read_region_stream_4(sc->sc_prt, sc->sc_prh, 953 PRSX(chp->ch_channel, slot, PRSO_FIS), 954 fis, __arraycount(fis)); 955 satafis_rdh_cmd_readreg(ata_c, (uint8_t *)fis); 956 } 957 958 /* correct the endianess of IDENTIFY data */ 959 if (ata_c->r_command == WDCC_IDENTIFY || 960 ata_c->r_command == ATAPI_IDENTIFY_DEVICE) { 961 idwordbuf = xfer->c_databuf; 962 for (i = 0; i < (xfer->c_bcount / sizeof(*idwordbuf)); i++) { 963 idwordbuf[i] = le16toh(idwordbuf[i]); 964 } 965 } 966 967 ata_c->flags |= AT_DONE; 968 if (PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC))) 969 ata_c->flags |= AT_XFDONE; 970 971 chp->ch_queue->active_xfer = NULL; 972 ata_free_xfer(chp, xfer); 973 if (ata_c->flags & AT_WAIT) 974 wakeup(ata_c); 975 else if (ata_c->callback) 976 ata_c->callback(ata_c->callback_arg); 977 atastart(chp); 978 return; 979 } 980 981 int 982 siisata_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 983 { 984 struct ata_channel *chp = drvp->chnl_softc; 985 struct ata_xfer *xfer; 986 987 SIISATA_DEBUG_PRINT( ("%s: %s.\n", 988 SIISATANAME((struct siisata_softc *)chp->ch_atac), 989 __func__), DEBUG_FUNCS); 990 991 xfer = ata_get_xfer(ATAXF_NOSLEEP); 992 if (xfer == NULL) 993 return ATACMD_TRY_AGAIN; 994 if (ata_bio->flags & ATA_POLL) 995 xfer->c_flags |= C_POLL; 996 xfer->c_drive = drvp->drive; 997 xfer->c_cmd = ata_bio; 998 xfer->c_databuf = ata_bio->databuf; 999 xfer->c_bcount = ata_bio->bcount; 1000 xfer->c_start = siisata_bio_start; 1001 xfer->c_intr = siisata_bio_complete; 1002 xfer->c_kill_xfer = siisata_bio_kill_xfer; 1003 ata_exec_xfer(chp, xfer); 1004 return (ata_bio->flags & ATA_ITSDONE) ? 1005 ATACMD_COMPLETE : ATACMD_QUEUED; 1006 } 1007 1008 void 1009 siisata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 1010 { 1011 struct siisata_channel *schp = (struct siisata_channel *)chp; 1012 struct siisata_prb *prb; 1013 struct ata_bio *ata_bio = xfer->c_cmd; 1014 int slot = SIISATA_NON_NCQ_SLOT; 1015 int i; 1016 1017 SIISATA_DEBUG_PRINT( 1018 ("%s: %s port %d, slot %d\n", 1019 SIISATANAME(sc), __func__, chp->ch_channel, slot), 1020 DEBUG_FUNCS); 1021 1022 chp->ch_status = 0; 1023 chp->ch_error = 0; 1024 1025 prb = schp->sch_prb[slot]; 1026 memset(prb, 0, sizeof(struct siisata_prb)); 1027 1028 satafis_rhd_construct_bio(xfer, prb->prb_fis); 1029 1030 memset(prb->prb_atapi, 0, sizeof(prb->prb_atapi)); 1031 1032 if (siisata_dma_setup(chp, slot, ata_bio->databuf, ata_bio->bcount, 1033 (ata_bio->flags & ATA_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) { 1034 ata_bio->error = ERR_DMA; 1035 ata_bio->r_error = 0; 1036 siisata_bio_complete(chp, xfer, slot); 1037 return; 1038 } 1039 1040 if (xfer->c_flags & C_POLL) { 1041 /* polled command, disable interrupts */ 1042 prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 1043 siisata_disable_port_interrupt(chp); 1044 } 1045 1046 siisata_activate_prb(schp, slot); 1047 1048 if ((ata_bio->flags & ATA_POLL) == 0) { 1049 chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */ 1050 callout_reset(&chp->ch_callout, mstohz(ATA_DELAY), 1051 siisata_timeout, chp); 1052 goto out; 1053 } 1054 1055 /* 1056 * polled command 1057 */ 1058 for (i = 0; i < ATA_DELAY / 10; i++) { 1059 if (ata_bio->flags & ATA_ITSDONE) 1060 break; 1061 siisata_intr_port(schp); 1062 DELAY(1000); 1063 } 1064 1065 siisata_enable_port_interrupt(chp); 1066 out: 1067 SIISATA_DEBUG_PRINT( 1068 ("%s: %s: done\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 1069 return; 1070 } 1071 1072 void 1073 siisata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 1074 int reason) 1075 { 1076 struct siisata_channel *schp = (struct siisata_channel *)chp; 1077 struct ata_bio *ata_bio = xfer->c_cmd; 1078 int drive = xfer->c_drive; 1079 int slot = SIISATA_NON_NCQ_SLOT; 1080 1081 SIISATA_DEBUG_PRINT(("%s: %s: port %d\n", 1082 SIISATANAME((struct siisata_softc *)chp->ch_atac), 1083 __func__, chp->ch_channel), DEBUG_FUNCS); 1084 1085 siisata_deactivate_prb(schp, slot); 1086 1087 ata_free_xfer(chp, xfer); 1088 ata_bio->flags |= ATA_ITSDONE; 1089 switch (reason) { 1090 case KILL_GONE: 1091 ata_bio->error = ERR_NODEV; 1092 break; 1093 case KILL_RESET: 1094 ata_bio->error = ERR_RESET; 1095 break; 1096 default: 1097 panic("%s: port %d: unknown reason %d", 1098 __func__, chp->ch_channel, reason); 1099 } 1100 ata_bio->r_error = WDCE_ABRT; 1101 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 1102 } 1103 1104 int 1105 siisata_bio_complete(struct ata_channel *chp, struct ata_xfer *xfer, int slot) 1106 { 1107 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1108 struct siisata_channel *schp = (struct siisata_channel *)chp; 1109 struct ata_bio *ata_bio = xfer->c_cmd; 1110 int drive = xfer->c_drive; 1111 1112 schp->sch_active_slots &= ~__BIT(slot); 1113 chp->ch_flags &= ~ATACH_IRQ_WAIT; 1114 if (xfer->c_flags & C_TIMEOU) { 1115 ata_bio->error = TIMEOUT; 1116 } else { 1117 callout_stop(&chp->ch_callout); 1118 ata_bio->error = NOERROR; 1119 } 1120 1121 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 1122 schp->sch_datad[slot]->dm_mapsize, 1123 (ata_bio->flags & ATA_READ) ? BUS_DMASYNC_POSTREAD : 1124 BUS_DMASYNC_POSTWRITE); 1125 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]); 1126 1127 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) { 1128 siisata_bio_kill_xfer(chp, xfer, KILL_GONE); 1129 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN; 1130 wakeup(&chp->ch_queue->active_xfer); 1131 return 0; 1132 } 1133 1134 chp->ch_queue->active_xfer = NULL; 1135 ata_free_xfer(chp, xfer); 1136 ata_bio->flags |= ATA_ITSDONE; 1137 if (chp->ch_status & WDCS_DWF) { 1138 ata_bio->error = ERR_DF; 1139 } else if (chp->ch_status & WDCS_ERR) { 1140 ata_bio->error = ERROR; 1141 ata_bio->r_error = chp->ch_error; 1142 } else if (chp->ch_status & WDCS_CORR) 1143 ata_bio->flags |= ATA_CORR; 1144 1145 SIISATA_DEBUG_PRINT(("%s: %s bcount: %ld", SIISATANAME(sc), 1146 __func__, ata_bio->bcount), DEBUG_XFERS); 1147 if (ata_bio->error == NOERROR) { 1148 if (ata_bio->flags & ATA_READ) 1149 ata_bio->bcount -= 1150 PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC)); 1151 else 1152 ata_bio->bcount = 0; 1153 } 1154 SIISATA_DEBUG_PRINT((" now %ld\n", ata_bio->bcount), DEBUG_XFERS); 1155 if (ata_bio->flags & ATA_POLL) 1156 return 1; 1157 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 1158 atastart(chp); 1159 return 0; 1160 } 1161 1162 void 1163 siisata_timeout(void *v) 1164 { 1165 struct ata_channel *chp = (struct ata_channel *)v; 1166 struct ata_xfer *xfer = chp->ch_queue->active_xfer; 1167 int slot = SIISATA_NON_NCQ_SLOT; 1168 int s = splbio(); 1169 SIISATA_DEBUG_PRINT(("%s: %p\n", __func__, xfer), DEBUG_INTR); 1170 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) { 1171 xfer->c_flags |= C_TIMEOU; 1172 xfer->c_intr(chp, xfer, slot); 1173 } 1174 splx(s); 1175 } 1176 1177 static int 1178 siisata_dma_setup(struct ata_channel *chp, int slot, void *data, 1179 size_t count, int op) 1180 { 1181 1182 int error, seg; 1183 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1184 struct siisata_channel *schp = (struct siisata_channel *)chp; 1185 1186 struct siisata_prb *prbp; 1187 1188 prbp = schp->sch_prb[slot]; 1189 1190 if (data == NULL) { 1191 goto end; 1192 } 1193 1194 error = bus_dmamap_load(sc->sc_dmat, schp->sch_datad[slot], 1195 data, count, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | op); 1196 if (error) { 1197 aprint_error("%s port %d: " 1198 "failed to load xfer in slot %d: error %d\n", 1199 SIISATANAME(sc), chp->ch_channel, slot, error); 1200 return error; 1201 } 1202 1203 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 1204 schp->sch_datad[slot]->dm_mapsize, 1205 (op == BUS_DMA_READ) ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1206 1207 /* make sure it's clean */ 1208 memset(prbp->prb_sge, 0, SIISATA_NSGE * sizeof(struct siisata_prb)); 1209 1210 SIISATA_DEBUG_PRINT(("%s: %d segs, %ld count\n", __func__, 1211 schp->sch_datad[slot]->dm_nsegs, (long unsigned int) count), 1212 DEBUG_FUNCS | DEBUG_DEBUG); 1213 1214 for (seg = 0; seg < schp->sch_datad[slot]->dm_nsegs; seg++) { 1215 prbp->prb_sge[seg].sge_da = 1216 htole64(schp->sch_datad[slot]->dm_segs[seg].ds_addr); 1217 prbp->prb_sge[seg].sge_dc = 1218 htole32(schp->sch_datad[slot]->dm_segs[seg].ds_len); 1219 prbp->prb_sge[seg].sge_flags = htole32(0); 1220 } 1221 prbp->prb_sge[seg - 1].sge_flags |= htole32(SGE_FLAG_TRM); 1222 end: 1223 return 0; 1224 } 1225 1226 static void 1227 siisata_activate_prb(struct siisata_channel *schp, int slot) 1228 { 1229 struct siisata_softc *sc; 1230 bus_size_t offset; 1231 uint64_t pprb; 1232 1233 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 1234 1235 KASSERTMSG((schp->sch_active_slots & __BIT(slot)) != __BIT(slot), 1236 "%s: trying to activate active slot %d", SIISATANAME(sc), slot); 1237 1238 SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_PREWRITE); 1239 /* keep track of what's going on */ 1240 schp->sch_active_slots |= __BIT(slot); 1241 1242 offset = PRO_CARX(schp->ata_channel.ch_channel, slot); 1243 1244 pprb = schp->sch_bus_prb[slot]; 1245 1246 PRWRITE(sc, offset + 0, pprb >> 0); 1247 PRWRITE(sc, offset + 4, pprb >> 32); 1248 } 1249 1250 static void 1251 siisata_deactivate_prb(struct siisata_channel *schp, int slot) 1252 { 1253 struct siisata_softc *sc; 1254 1255 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 1256 1257 KASSERTMSG((schp->sch_active_slots & __BIT(slot)) != 0, 1258 "%s: trying to deactivate inactive slot %d", SIISATANAME(sc), 1259 slot); 1260 1261 schp->sch_active_slots &= ~__BIT(slot); /* mark free */ 1262 SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_POSTWRITE); 1263 } 1264 1265 static void 1266 siisata_reinit_port(struct ata_channel *chp) 1267 { 1268 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1269 1270 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_PORT_INITIALIZE); 1271 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 1272 DELAY(10); 1273 } 1274 1275 static void 1276 siisata_device_reset(struct ata_channel *chp) 1277 { 1278 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1279 1280 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_DEVICE_RESET); 1281 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 1282 DELAY(10); 1283 } 1284 1285 1286 #if NATAPIBUS > 0 1287 void 1288 siisata_atapibus_attach(struct atabus_softc *ata_sc) 1289 { 1290 struct ata_channel *chp = ata_sc->sc_chan; 1291 struct atac_softc *atac = chp->ch_atac; 1292 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1293 struct scsipi_channel *chan = &chp->ch_atapi_channel; 1294 1295 /* 1296 * Fill in the scsipi_adapter. 1297 */ 1298 adapt->adapt_dev = atac->atac_dev; 1299 adapt->adapt_nchannels = atac->atac_nchannels; 1300 adapt->adapt_request = siisata_atapi_scsipi_request; 1301 adapt->adapt_minphys = siisata_atapi_minphys; 1302 atac->atac_atapi_adapter.atapi_probe_device = 1303 siisata_atapi_probe_device; 1304 1305 /* 1306 * Fill in the scsipi_channel. 1307 */ 1308 memset(chan, 0, sizeof(*chan)); 1309 chan->chan_adapter = adapt; 1310 chan->chan_bustype = &siisata_atapi_bustype; 1311 chan->chan_channel = chp->ch_channel; 1312 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 1313 chan->chan_openings = 1; 1314 chan->chan_max_periph = 1; 1315 chan->chan_ntargets = 1; 1316 chan->chan_nluns = 1; 1317 1318 chp->atapibus = config_found_ia(ata_sc->sc_dev, "atapi", chan, 1319 atapiprint); 1320 } 1321 1322 void 1323 siisata_atapi_minphys(struct buf *bp) 1324 { 1325 if (bp->b_bcount > MAXPHYS) 1326 bp->b_bcount = MAXPHYS; 1327 minphys(bp); 1328 } 1329 1330 /* 1331 * Kill off all pending xfers for a periph. 1332 * 1333 * Must be called at splbio(). 1334 */ 1335 void 1336 siisata_atapi_kill_pending(struct scsipi_periph *periph) 1337 { 1338 struct atac_softc *atac = 1339 device_private(periph->periph_channel->chan_adapter->adapt_dev); 1340 struct ata_channel *chp = 1341 atac->atac_channels[periph->periph_channel->chan_channel]; 1342 1343 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 1344 } 1345 1346 void 1347 siisata_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 1348 int reason) 1349 { 1350 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1351 1352 /* remove this command from xfer queue */ 1353 switch (reason) { 1354 case KILL_GONE: 1355 sc_xfer->error = XS_DRIVER_STUFFUP; 1356 break; 1357 case KILL_RESET: 1358 sc_xfer->error = XS_RESET; 1359 break; 1360 default: 1361 panic("%s: port %d: unknown reason %d", 1362 __func__, chp->ch_channel, reason); 1363 } 1364 ata_free_xfer(chp, xfer); 1365 scsipi_done(sc_xfer); 1366 } 1367 1368 void 1369 siisata_atapi_probe_device(struct atapibus_softc *sc, int target) 1370 { 1371 struct scsipi_channel *chan = sc->sc_channel; 1372 struct scsipi_periph *periph; 1373 struct ataparams ids; 1374 struct ataparams *id = &ids; 1375 struct siisata_softc *siic = 1376 device_private(chan->chan_adapter->adapt_dev); 1377 struct atac_softc *atac = &siic->sc_atac; 1378 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 1379 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 1380 struct scsipibus_attach_args sa; 1381 char serial_number[21], model[41], firmware_revision[9]; 1382 int s; 1383 1384 /* skip if already attached */ 1385 if (scsipi_lookup_periph(chan, target, 0) != NULL) 1386 return; 1387 1388 /* if no ATAPI device detected at attach time, skip */ 1389 if ((drvp->drive_flags & DRIVE_ATAPI) == 0) { 1390 SIISATA_DEBUG_PRINT(("%s: drive %d " 1391 "not present\n", __func__, target), DEBUG_PROBE); 1392 return; 1393 } 1394 1395 /* Some ATAPI devices need a bit more time after software reset. */ 1396 DELAY(5000); 1397 if (ata_get_params(drvp, AT_WAIT, id) == 0) { 1398 #ifdef ATAPI_DEBUG_PROBE 1399 log(LOG_DEBUG, "%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 1400 device_xname(sc->sc_dev), target, 1401 id->atap_config & ATAPI_CFG_CMD_MASK, 1402 id->atap_config & ATAPI_CFG_DRQ_MASK); 1403 #endif 1404 periph = scsipi_alloc_periph(M_NOWAIT); 1405 if (periph == NULL) { 1406 aprint_error_dev(sc->sc_dev, 1407 "%s: unable to allocate periph for " 1408 "channel %d drive %d\n", __func__, 1409 chp->ch_channel, target); 1410 return; 1411 } 1412 periph->periph_dev = NULL; 1413 periph->periph_channel = chan; 1414 periph->periph_switch = &atapi_probe_periphsw; 1415 periph->periph_target = target; 1416 periph->periph_lun = 0; 1417 periph->periph_quirks = PQUIRK_ONLYBIG; 1418 1419 #ifdef SCSIPI_DEBUG 1420 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 1421 SCSIPI_DEBUG_TARGET == target) 1422 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 1423 #endif 1424 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 1425 if (id->atap_config & ATAPI_CFG_REMOV) 1426 periph->periph_flags |= PERIPH_REMOVABLE; 1427 if (periph->periph_type == T_SEQUENTIAL) { 1428 s = splbio(); 1429 drvp->drive_flags |= DRIVE_ATAPIST; 1430 splx(s); 1431 } 1432 1433 sa.sa_periph = periph; 1434 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 1435 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 1436 T_REMOV : T_FIXED; 1437 scsipi_strvis((u_char *)model, 40, id->atap_model, 40); 1438 scsipi_strvis((u_char *)serial_number, 20, 1439 id->atap_serial, 20); 1440 scsipi_strvis((u_char *)firmware_revision, 8, 1441 id->atap_revision, 8); 1442 sa.sa_inqbuf.vendor = model; 1443 sa.sa_inqbuf.product = serial_number; 1444 sa.sa_inqbuf.revision = firmware_revision; 1445 1446 /* 1447 * Determine the operating mode capabilities of the device. 1448 */ 1449 if ((id->atap_config & ATAPI_CFG_CMD_MASK) 1450 == ATAPI_CFG_CMD_16) { 1451 periph->periph_cap |= PERIPH_CAP_CMD16; 1452 1453 /* configure port for packet length */ 1454 PRWRITE(siic, PRX(chp->ch_channel, PRO_PCS), 1455 PR_PC_PACKET_LENGTH); 1456 } else { 1457 PRWRITE(siic, PRX(chp->ch_channel, PRO_PCC), 1458 PR_PC_PACKET_LENGTH); 1459 } 1460 1461 /* XXX This is gross. */ 1462 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 1463 1464 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 1465 1466 if (drvp->drv_softc) 1467 ata_probe_caps(drvp); 1468 else { 1469 s = splbio(); 1470 drvp->drive_flags &= ~DRIVE_ATAPI; 1471 splx(s); 1472 } 1473 } else { 1474 SIISATA_DEBUG_PRINT(("%s: ATAPI_IDENTIFY_DEVICE " 1475 "failed for drive %s:%d:%d: error 0x%x\n", 1476 __func__, SIISATANAME(siic), chp->ch_channel, target, 1477 chp->ch_error), DEBUG_PROBE); 1478 s = splbio(); 1479 drvp->drive_flags &= ~DRIVE_ATAPI; 1480 splx(s); 1481 } 1482 } 1483 1484 void 1485 siisata_atapi_scsipi_request(struct scsipi_channel *chan, 1486 scsipi_adapter_req_t req, void *arg) 1487 { 1488 struct scsipi_adapter *adapt = chan->chan_adapter; 1489 struct scsipi_periph *periph; 1490 struct scsipi_xfer *sc_xfer; 1491 struct siisata_softc *sc = device_private(adapt->adapt_dev); 1492 struct atac_softc *atac = &sc->sc_atac; 1493 struct ata_xfer *xfer; 1494 int channel = chan->chan_channel; 1495 int drive, s; 1496 1497 switch (req) { 1498 case ADAPTER_REQ_RUN_XFER: 1499 sc_xfer = arg; 1500 periph = sc_xfer->xs_periph; 1501 drive = periph->periph_target; 1502 1503 SIISATA_DEBUG_PRINT(("%s: %s:%d:%d\n", __func__, 1504 device_xname(atac->atac_dev), channel, drive), 1505 DEBUG_XFERS); 1506 1507 if (!device_is_active(atac->atac_dev)) { 1508 sc_xfer->error = XS_DRIVER_STUFFUP; 1509 scsipi_done(sc_xfer); 1510 return; 1511 } 1512 xfer = ata_get_xfer(ATAXF_NOSLEEP); 1513 if (xfer == NULL) { 1514 sc_xfer->error = XS_RESOURCE_SHORTAGE; 1515 scsipi_done(sc_xfer); 1516 return; 1517 } 1518 1519 if (sc_xfer->xs_control & XS_CTL_POLL) 1520 xfer->c_flags |= C_POLL; 1521 xfer->c_drive = drive; 1522 xfer->c_flags |= C_ATAPI; 1523 xfer->c_cmd = sc_xfer; 1524 xfer->c_databuf = sc_xfer->data; 1525 xfer->c_bcount = sc_xfer->datalen; 1526 xfer->c_start = siisata_atapi_start; 1527 xfer->c_intr = siisata_atapi_complete; 1528 xfer->c_kill_xfer = siisata_atapi_kill_xfer; 1529 xfer->c_dscpoll = 0; 1530 s = splbio(); 1531 ata_exec_xfer(atac->atac_channels[channel], xfer); 1532 #ifdef DIAGNOSTIC 1533 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 1534 (sc_xfer->xs_status & XS_STS_DONE) == 0) 1535 panic("%s: polled command not done", __func__); 1536 #endif 1537 splx(s); 1538 return; 1539 1540 default: 1541 /* Not supported, nothing to do. */ 1542 ; 1543 } 1544 } 1545 1546 void 1547 siisata_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 1548 { 1549 struct siisata_channel *schp = (struct siisata_channel *)chp; 1550 struct siisata_prb *prbp; 1551 1552 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1553 1554 int slot = SIISATA_NON_NCQ_SLOT; 1555 int i; 1556 1557 SIISATA_DEBUG_PRINT( ("%s: %s:%d:%d, scsi flags 0x%x\n", __func__, 1558 SIISATANAME(sc), chp->ch_channel, 1559 chp->ch_drive[xfer->c_drive].drive, sc_xfer->xs_control), 1560 DEBUG_XFERS); 1561 1562 chp->ch_status = 0; 1563 chp->ch_error = 0; 1564 1565 prbp = schp->sch_prb[slot]; 1566 memset(prbp, 0, sizeof(struct siisata_prb)); 1567 1568 1569 /* fill in direction for ATAPI command */ 1570 if ((sc_xfer->xs_control & XS_CTL_DATA_IN)) 1571 prbp->prb_control |= htole16(PRB_CF_PACKET_READ); 1572 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT)) 1573 prbp->prb_control |= htole16(PRB_CF_PACKET_WRITE); 1574 1575 satafis_rhd_construct_atapi(xfer, prbp->prb_fis); 1576 1577 /* copy over ATAPI command */ 1578 memcpy(prbp->prb_atapi, sc_xfer->cmd, sc_xfer->cmdlen); 1579 1580 if (siisata_dma_setup(chp, slot, 1581 (sc_xfer->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ? 1582 xfer->c_databuf : NULL, 1583 xfer->c_bcount, 1584 (sc_xfer->xs_control & XS_CTL_DATA_IN) ? 1585 BUS_DMA_READ : BUS_DMA_WRITE) 1586 ) 1587 panic("%s", __func__); 1588 1589 if (xfer->c_flags & C_POLL) { 1590 /* polled command, disable interrupts */ 1591 prbp->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 1592 siisata_disable_port_interrupt(chp); 1593 } 1594 1595 siisata_activate_prb(schp, slot); 1596 1597 if ((xfer->c_flags & C_POLL) == 0) { 1598 chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */ 1599 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 1600 siisata_timeout, chp); 1601 goto out; 1602 } 1603 1604 /* 1605 * polled command 1606 */ 1607 for (i = 0; i < ATA_DELAY / 10; i++) { 1608 if (sc_xfer->xs_status & XS_STS_DONE) 1609 break; 1610 siisata_intr_port(schp); 1611 DELAY(1000); 1612 } 1613 if ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 1614 sc_xfer->error = XS_TIMEOUT; 1615 siisata_atapi_complete(chp, xfer, slot); 1616 } 1617 /* reenable interrupts */ 1618 siisata_enable_port_interrupt(chp); 1619 out: 1620 SIISATA_DEBUG_PRINT( 1621 ("%s: %s: done\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 1622 return; 1623 } 1624 1625 int 1626 siisata_atapi_complete(struct ata_channel *chp, struct ata_xfer *xfer, 1627 int slot) 1628 { 1629 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1630 struct siisata_channel *schp = (struct siisata_channel *)chp; 1631 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1632 1633 SIISATA_DEBUG_PRINT( 1634 ("%s: %s()\n", SIISATANAME(sc), __func__), DEBUG_INTR); 1635 1636 /* this comamnd is not active any more */ 1637 schp->sch_active_slots &= ~__BIT(slot); 1638 chp->ch_flags &= ~ATACH_IRQ_WAIT; 1639 if (xfer->c_flags & C_TIMEOU) { 1640 sc_xfer->error = XS_TIMEOUT; 1641 } else { 1642 callout_stop(&chp->ch_callout); 1643 sc_xfer->error = XS_NOERROR; 1644 } 1645 1646 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 1647 schp->sch_datad[slot]->dm_mapsize, 1648 (sc_xfer->xs_control & XS_CTL_DATA_IN) ? 1649 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1650 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]); 1651 1652 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) { 1653 siisata_atapi_kill_xfer(chp, xfer, KILL_GONE); 1654 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN; 1655 wakeup(&chp->ch_queue->active_xfer); 1656 return 0; /* XXX verify */ 1657 } 1658 1659 chp->ch_queue->active_xfer = NULL; 1660 ata_free_xfer(chp, xfer); 1661 sc_xfer->resid = sc_xfer->datalen; 1662 sc_xfer->resid -= PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC)); 1663 SIISATA_DEBUG_PRINT(("%s: %s datalen %d resid %d\n", SIISATANAME(sc), 1664 __func__, sc_xfer->datalen, sc_xfer->resid), DEBUG_XFERS); 1665 if ((chp->ch_status & WDCS_ERR) && 1666 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 1667 sc_xfer->resid == sc_xfer->datalen)) { 1668 sc_xfer->error = XS_SHORTSENSE; 1669 sc_xfer->sense.atapi_sense = chp->ch_error; 1670 if ((sc_xfer->xs_periph->periph_quirks & 1671 PQUIRK_NOSENSE) == 0) { 1672 /* request sense */ 1673 sc_xfer->error = XS_BUSY; 1674 sc_xfer->status = SCSI_CHECK; 1675 } 1676 } 1677 scsipi_done(sc_xfer); 1678 atastart(chp); 1679 return 0; /* XXX verify */ 1680 } 1681 1682 #endif /* NATAPIBUS */ 1683
Indexes created Fri Sep 26 20:09:58 GMT 2025