siisata.c revision 1.30.4.29
1 /* $NetBSD: siisata.c,v 1.30.4.29 2017/07/30 20:46:31 jdolecek Exp $ */ 2 3 /* from ahcisata_core.c */ 4 5 /* 6 * Copyright (c) 2006 Manuel Bouyer. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 */ 29 30 /* from atapi_wdc.c */ 31 32 /* 33 * Copyright (c) 1998, 2001 Manuel Bouyer. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 45 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 46 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 47 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 49 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 53 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 */ 55 56 /* 57 * Copyright (c) 2007, 2008, 2009, 2010 Jonathan A. Kollasch. 58 * All rights reserved. 59 * 60 * Redistribution and use in source and binary forms, with or without 61 * modification, are permitted provided that the following conditions 62 * are met: 63 * 1. Redistributions of source code must retain the above copyright 64 * notice, this list of conditions and the following disclaimer. 65 * 2. Redistributions in binary form must reproduce the above copyright 66 * notice, this list of conditions and the following disclaimer in the 67 * documentation and/or other materials provided with the distribution. 68 * 69 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 72 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 73 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 74 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 75 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 76 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 77 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 78 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 79 */ 80 81 #include <sys/cdefs.h> 82 __KERNEL_RCSID(0, "$NetBSD: siisata.c,v 1.30.4.29 2017/07/30 20:46:31 jdolecek Exp $"); 83 84 #include <sys/types.h> 85 #include <sys/param.h> 86 #include <sys/kernel.h> 87 #include <sys/malloc.h> 88 #include <sys/systm.h> 89 #include <sys/syslog.h> 90 #include <sys/disklabel.h> 91 #include <sys/buf.h> 92 #include <sys/proc.h> 93 94 #include <dev/ata/atareg.h> 95 #include <dev/ata/satavar.h> 96 #include <dev/ata/satareg.h> 97 #include <dev/ata/satafisvar.h> 98 #include <dev/ata/satafisreg.h> 99 #include <dev/ata/satapmpreg.h> 100 #include <dev/ic/siisatavar.h> 101 #include <dev/ic/siisatareg.h> 102 103 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 104 105 #include "atapibus.h" 106 107 #ifdef SIISATA_DEBUG 108 int siisata_debug_mask = 0; 109 #endif 110 111 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 112 113 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 114 #if _BYTE_ORDER == _LITTLE_ENDIAN 115 #define bus_space_read_stream_4 bus_space_read_4 116 #define bus_space_read_region_stream_4 bus_space_read_region_4 117 #else 118 static inline uint32_t 119 bus_space_read_stream_4(bus_space_tag_t t, bus_space_handle_t h, bus_size_t o) 120 { 121 return htole32(bus_space_read_4(t, h, o)); 122 } 123 124 static inline void 125 bus_space_read_region_stream_4(bus_space_tag_t t, bus_space_handle_t h, 126 bus_size_t o, uint32_t *p, bus_size_t c) 127 { 128 bus_space_read_region_4(t, h, o, p, c); 129 for (bus_size_t i = 0; i < c; i++) { 130 p[i] = htole32(p[i]); 131 } 132 } 133 #endif 134 #endif 135 136 static void siisata_attach_port(struct siisata_softc *, int); 137 static void siisata_intr_port(struct siisata_channel *); 138 139 void siisata_probe_drive(struct ata_channel *); 140 void siisata_setup_channel(struct ata_channel *); 141 142 int siisata_ata_bio(struct ata_drive_datas *, struct ata_xfer *); 143 void siisata_reset_drive(struct ata_drive_datas *, int, uint32_t *); 144 void siisata_reset_channel(struct ata_channel *, int); 145 int siisata_ata_addref(struct ata_drive_datas *); 146 void siisata_ata_delref(struct ata_drive_datas *); 147 void siisata_killpending(struct ata_drive_datas *); 148 149 void siisata_cmd_start(struct ata_channel *, struct ata_xfer *); 150 int siisata_cmd_complete(struct ata_channel *, struct ata_xfer *, int); 151 void siisata_cmd_done(struct ata_channel *, struct ata_xfer *, int); 152 static void siisata_cmd_done_end(struct ata_channel *, struct ata_xfer *); 153 void siisata_cmd_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 154 155 void siisata_bio_start(struct ata_channel *, struct ata_xfer *); 156 int siisata_bio_complete(struct ata_channel *, struct ata_xfer *, int); 157 void siisata_bio_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 158 int siisata_exec_command(struct ata_drive_datas *, struct ata_xfer *); 159 160 static void siisata_reinit_port(struct ata_channel *, int); 161 static void siisata_device_reset(struct ata_channel *); 162 static void siisata_activate_prb(struct siisata_channel *, int); 163 static void siisata_deactivate_prb(struct siisata_channel *, int); 164 static int siisata_dma_setup(struct ata_channel *, int, void *, size_t, int); 165 void siisata_channel_recover(struct ata_channel *, uint32_t); 166 167 #if NATAPIBUS > 0 168 void siisata_atapibus_attach(struct atabus_softc *); 169 void siisata_atapi_probe_device(struct atapibus_softc *, int); 170 void siisata_atapi_minphys(struct buf *); 171 void siisata_atapi_start(struct ata_channel *,struct ata_xfer *); 172 int siisata_atapi_complete(struct ata_channel *, struct ata_xfer *, int); 173 void siisata_atapi_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 174 void siisata_atapi_scsipi_request(struct scsipi_channel *, 175 scsipi_adapter_req_t, void *); 176 void siisata_atapi_kill_pending(struct scsipi_periph *); 177 #endif /* NATAPIBUS */ 178 179 const struct ata_bustype siisata_ata_bustype = { 180 SCSIPI_BUSTYPE_ATA, 181 siisata_ata_bio, 182 siisata_reset_drive, 183 siisata_reset_channel, 184 siisata_exec_command, 185 ata_get_params, 186 siisata_ata_addref, 187 siisata_ata_delref, 188 siisata_killpending 189 }; 190 191 #if NATAPIBUS > 0 192 static const struct scsipi_bustype siisata_atapi_bustype = { 193 SCSIPI_BUSTYPE_ATAPI, 194 atapi_scsipi_cmd, 195 atapi_interpret_sense, 196 atapi_print_addr, 197 siisata_atapi_kill_pending, 198 NULL, 199 }; 200 #endif /* NATAPIBUS */ 201 202 203 void 204 siisata_attach(struct siisata_softc *sc) 205 { 206 int i; 207 208 SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n", 209 SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)), DEBUG_FUNCS); 210 211 sc->sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA | ATAC_CAP_NCQ; 212 sc->sc_atac.atac_pio_cap = 4; 213 sc->sc_atac.atac_dma_cap = 2; 214 sc->sc_atac.atac_udma_cap = 6; 215 sc->sc_atac.atac_channels = sc->sc_chanarray; 216 sc->sc_atac.atac_probe = siisata_probe_drive; 217 sc->sc_atac.atac_bustype_ata = &siisata_ata_bustype; 218 sc->sc_atac.atac_set_modes = siisata_setup_channel; 219 #if NATAPIBUS > 0 220 sc->sc_atac.atac_atapibus_attach = siisata_atapibus_attach; 221 #endif 222 223 /* come out of reset state */ 224 GRWRITE(sc, GR_GC, 0); 225 226 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 227 siisata_attach_port(sc, i); 228 } 229 230 SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n", SIISATANAME(sc), 231 __func__, GRREAD(sc, GR_GC)), DEBUG_FUNCS); 232 return; 233 } 234 235 static void 236 siisata_disable_port_interrupt(struct ata_channel *chp) 237 { 238 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 239 240 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIEC), 0xffffffff); 241 } 242 243 static void 244 siisata_enable_port_interrupt(struct ata_channel *chp) 245 { 246 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 247 248 /* enable CmdErrr+CmdCmpl interrupting */ 249 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIES), 250 PR_PIS_CMDERRR | PR_PIS_CMDCMPL); 251 } 252 253 static void 254 siisata_init_port(struct siisata_softc *sc, int port) 255 { 256 struct siisata_channel *schp; 257 struct ata_channel *chp; 258 259 schp = &sc->sc_channels[port]; 260 chp = (struct ata_channel *)schp; 261 262 /* 263 * Come out of reset. Disable no clearing of PR_PIS_CMDCMPL on read 264 * of PR_PSS. Disable 32-bit PRB activation, we use 64-bit activation. 265 */ 266 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC), 267 PR_PC_32BA | PR_PC_INCOR | PR_PC_PORT_RESET); 268 /* initialize port */ 269 siisata_reinit_port(chp, -1); 270 /* enable CmdErrr+CmdCmpl interrupting */ 271 siisata_enable_port_interrupt(chp); 272 /* enable port interrupt */ 273 GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel)); 274 } 275 276 static void 277 siisata_attach_port(struct siisata_softc *sc, int port) 278 { 279 int j; 280 int dmasize; 281 int error; 282 void *prbp; 283 struct siisata_channel *schp; 284 struct ata_channel *chp; 285 286 schp = &sc->sc_channels[port]; 287 chp = (struct ata_channel *)schp; 288 sc->sc_chanarray[port] = chp; 289 chp->ch_channel = port; 290 chp->ch_atac = &sc->sc_atac; 291 chp->ch_queue = ata_queue_alloc(SIISATA_MAX_SLOTS); 292 if (chp->ch_queue == NULL) { 293 aprint_error_dev(sc->sc_atac.atac_dev, 294 "port %d: can't allocate memory " 295 "for command queue\n", chp->ch_channel); 296 return; 297 } 298 299 dmasize = SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS; 300 301 SIISATA_DEBUG_PRINT(("%s: %s: dmasize: %d\n", SIISATANAME(sc), 302 __func__, dmasize), DEBUG_FUNCS); 303 304 error = bus_dmamem_alloc(sc->sc_dmat, dmasize, PAGE_SIZE, 0, 305 &schp->sch_prb_seg, 1, &schp->sch_prb_nseg, BUS_DMA_NOWAIT); 306 if (error) { 307 aprint_error_dev(sc->sc_atac.atac_dev, 308 "unable to allocate PRB table memory, " 309 "error=%d\n", error); 310 return; 311 } 312 313 error = bus_dmamem_map(sc->sc_dmat, 314 &schp->sch_prb_seg, schp->sch_prb_nseg, 315 dmasize, &prbp, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 316 if (error) { 317 aprint_error_dev(sc->sc_atac.atac_dev, 318 "unable to map PRB table memory, " 319 "error=%d\n", error); 320 bus_dmamem_free(sc->sc_dmat, 321 &schp->sch_prb_seg, schp->sch_prb_nseg); 322 return; 323 } 324 325 error = bus_dmamap_create(sc->sc_dmat, dmasize, 1, dmasize, 0, 326 BUS_DMA_NOWAIT, &schp->sch_prbd); 327 if (error) { 328 aprint_error_dev(sc->sc_atac.atac_dev, 329 "unable to create PRB table map, " 330 "error=%d\n", error); 331 bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize); 332 bus_dmamem_free(sc->sc_dmat, 333 &schp->sch_prb_seg, schp->sch_prb_nseg); 334 return; 335 } 336 337 error = bus_dmamap_load(sc->sc_dmat, schp->sch_prbd, 338 prbp, dmasize, NULL, BUS_DMA_NOWAIT); 339 if (error) { 340 aprint_error_dev(sc->sc_atac.atac_dev, 341 "unable to load PRB table map, " 342 "error=%d\n", error); 343 bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd); 344 bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize); 345 bus_dmamem_free(sc->sc_dmat, 346 &schp->sch_prb_seg, schp->sch_prb_nseg); 347 return; 348 } 349 350 for (j = 0; j < SIISATA_MAX_SLOTS; j++) { 351 schp->sch_prb[j] = (struct siisata_prb *) 352 ((char *)prbp + SIISATA_CMD_SIZE * j); 353 schp->sch_bus_prb[j] = 354 schp->sch_prbd->dm_segs[0].ds_addr + 355 SIISATA_CMD_SIZE * j; 356 error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, 357 SIISATA_NSGE, MAXPHYS, 0, 358 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 359 &schp->sch_datad[j]); 360 if (error) { 361 aprint_error_dev(sc->sc_atac.atac_dev, 362 "couldn't create xfer DMA map, error=%d\n", 363 error); 364 return; 365 } 366 } 367 368 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 369 PRX(chp->ch_channel, PRO_SSTATUS), 4, &schp->sch_sstatus) != 0) { 370 aprint_error_dev(sc->sc_atac.atac_dev, 371 "couldn't map port %d SStatus regs\n", 372 chp->ch_channel); 373 return; 374 } 375 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 376 PRX(chp->ch_channel, PRO_SCONTROL), 4, &schp->sch_scontrol) != 0) { 377 aprint_error_dev(sc->sc_atac.atac_dev, 378 "couldn't map port %d SControl regs\n", 379 chp->ch_channel); 380 return; 381 } 382 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 383 PRX(chp->ch_channel, PRO_SERROR), 4, &schp->sch_serror) != 0) { 384 aprint_error_dev(sc->sc_atac.atac_dev, 385 "couldn't map port %d SError regs\n", 386 chp->ch_channel); 387 return; 388 } 389 390 siisata_init_port(sc, port); 391 392 ata_channel_attach(chp); 393 394 return; 395 } 396 397 int 398 siisata_detach(struct siisata_softc *sc, int flags) 399 { 400 struct atac_softc *atac = &sc->sc_atac; 401 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 402 struct siisata_channel *schp; 403 struct ata_channel *chp; 404 int i, j, error; 405 406 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 407 schp = &sc->sc_channels[i]; 408 chp = sc->sc_chanarray[i]; 409 410 if (chp->atabus == NULL) 411 continue; 412 if ((error = config_detach(chp->atabus, flags)) != 0) 413 return error; 414 415 for (j = 0; j < SIISATA_MAX_SLOTS; j++) 416 bus_dmamap_destroy(sc->sc_dmat, schp->sch_datad[j]); 417 418 bus_dmamap_unload(sc->sc_dmat, schp->sch_prbd); 419 bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd); 420 bus_dmamem_unmap(sc->sc_dmat, schp->sch_prb[0], 421 SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS); 422 bus_dmamem_free(sc->sc_dmat, 423 &schp->sch_prb_seg, schp->sch_prb_nseg); 424 425 free(chp->ch_queue, M_DEVBUF); 426 chp->atabus = NULL; 427 428 ata_channel_detach(chp); 429 } 430 431 if (adapt->adapt_refcnt != 0) 432 return EBUSY; 433 434 /* leave the chip in reset */ 435 GRWRITE(sc, GR_GC, GR_GC_GLBLRST); 436 437 return 0; 438 } 439 440 void 441 siisata_resume(struct siisata_softc *sc) 442 { 443 int i; 444 445 /* come out of reset state */ 446 GRWRITE(sc, GR_GC, 0); 447 448 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 449 siisata_init_port(sc, i); 450 } 451 452 } 453 454 int 455 siisata_intr(void *v) 456 { 457 struct siisata_softc *sc = v; 458 uint32_t is; 459 int i, r = 0; 460 while ((is = GRREAD(sc, GR_GIS))) { 461 SIISATA_DEBUG_PRINT(("%s: %s: GR_GIS: 0x%08x\n", 462 SIISATANAME(sc), __func__, is), DEBUG_INTR); 463 r = 1; 464 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) 465 if (is & GR_GIS_PXIS(i)) 466 siisata_intr_port(&sc->sc_channels[i]); 467 } 468 return r; 469 } 470 471 static void 472 siisata_intr_port(struct siisata_channel *schp) 473 { 474 struct siisata_softc *sc = 475 (struct siisata_softc *)schp->ata_channel.ch_atac; 476 struct ata_channel *chp = &schp->ata_channel; 477 struct ata_xfer *xfer; 478 int slot = -1; 479 uint32_t pss, pis, tfd = 0; 480 bool recover = false; 481 482 /* get slot status, clearing completion interrupt (PR_PIS_CMDCMPL) */ 483 pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)); 484 485 SIISATA_DEBUG_PRINT(("%s: %s port %d, pss 0x%x\n", 486 SIISATANAME(sc), __func__, chp->ch_channel, pss), DEBUG_INTR); 487 488 /* if no errors, just process finished commands and we're done */ 489 if (__predict_true((pss & PR_PSS_ATTENTION) == 0)) 490 goto process; 491 492 pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)); 493 494 SIISATA_DEBUG_PRINT(("%s: %s port %d, pis 0x%x ", 495 SIISATANAME(sc), __func__, chp->ch_channel, pis), 496 DEBUG_INTR); 497 498 /* clear */ 499 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), pis); 500 501 if (pis & PR_PIS_CMDERRR) { 502 uint32_t ec; 503 504 ec = PRREAD(sc, PRX(chp->ch_channel, PRO_PCE)); 505 SIISATA_DEBUG_PRINT(("ec %d\n", ec), DEBUG_INTR); 506 507 /* emulate a CRC error by default */ 508 tfd = ATACH_ERR_ST(WDCE_CRC, WDCS_ERR); 509 510 if (ec <= PR_PCE_DATAFISERROR) { 511 if (ec == PR_PCE_DEVICEERROR 512 && (chp->ch_flags & ATACH_NCQ) == 0) { 513 uint32_t ps = PRREAD(sc, 514 PRX(chp->ch_channel, PRO_PS)); 515 /* This is only relevant for non-NCQ commands */ 516 slot = PR_PS_ACTIVE_SLOT(ps); 517 518 /* read in specific information about error */ 519 uint32_t prbfis = bus_space_read_stream_4( 520 sc->sc_prt, sc->sc_prh, 521 PRSX(chp->ch_channel, slot, 522 PRSO_FIS)); 523 524 /* get status and error */ 525 int ntfd = satafis_rdh_parse(chp, 526 (uint8_t *)&prbfis); 527 528 if (ATACH_ST(ntfd) & WDCS_ERR) 529 tfd = ntfd; 530 } 531 } else { 532 aprint_error_dev(sc->sc_atac.atac_dev, "fatal error %d" 533 " on channel %d (ctx 0x%x), resetting\n", 534 ec, chp->ch_channel, 535 PRREAD(sc, PRX(chp->ch_channel, PRO_PCR))); 536 537 tfd |= ATACH_ERR_ST(0, WDCS_BSY); 538 } 539 540 if (!schp->sch_recovering) 541 recover = true; 542 } else { 543 /* Some other event, which we currently ignore */ 544 } 545 546 if (__predict_false(recover)) 547 ata_channel_freeze(chp); 548 549 if (slot >= 0) { 550 if ((schp->sch_active_slots & (1 << slot)) != 0 && 551 (pss & (1 << slot)) == 0) { 552 xfer = ata_queue_hwslot_to_xfer(chp, slot); 553 xfer->c_intr(chp, xfer, tfd); 554 } 555 } else { 556 /* 557 * For NCQ, HBA halts processing when error is notified, 558 * and any further D2H FISes are ignored until the error 559 * condition is cleared. Hence if a command is inactive, 560 * it means it actually already finished successfully. 561 */ 562 process: 563 for (slot=0; slot < SIISATA_MAX_SLOTS; slot++) { 564 if ((schp->sch_active_slots & (1 << slot)) != 0 && 565 (pss & PR_PXSS(slot)) == 0) { 566 xfer = ata_queue_hwslot_to_xfer(chp, slot); 567 xfer->c_intr(chp, xfer, 0); 568 } 569 } 570 } 571 572 if (__predict_false(recover)) 573 siisata_channel_recover(chp, tfd); 574 } 575 576 static void 577 siisata_hold(struct siisata_channel *schp) 578 { 579 schp->sch_hold_slots |= schp->sch_active_slots; 580 schp->sch_active_slots = 0; 581 } 582 583 static void 584 siisata_unhold(struct siisata_channel *schp) 585 { 586 schp->sch_active_slots = schp->sch_hold_slots; 587 schp->sch_hold_slots = 0; 588 } 589 590 /* Recover channel after transfer aborted */ 591 void 592 siisata_channel_recover(struct ata_channel *chp, uint32_t tfd) 593 { 594 struct siisata_channel *schp = (struct siisata_channel *)chp; 595 struct siisata_softc *sc = 596 (struct siisata_softc *)schp->ata_channel.ch_atac; 597 struct ata_drive_datas *drvp; 598 int drive, error; 599 uint8_t eslot, slot, st, err; 600 struct ata_xfer *xfer; 601 602 KASSERT(!schp->sch_recovering); 603 604 schp->sch_recovering = true; 605 606 if (chp->ch_ndrives > PMP_PORT_CTL) { 607 /* Get PM port number for the device in error */ 608 int pcr = PRREAD(sc, PRX(chp->ch_channel, PRO_PCR)); 609 drive = PRO_PCR_PMP(pcr); 610 } else 611 drive = 0; 612 613 drvp = &chp->ch_drive[drive]; 614 615 /* 616 * If BSY or DRQ bits are set, must execute COMRESET to return 617 * device to idle state. Otherwise, commands can be reissued 618 * after reinitalization of port. After that, need to execute 619 * READ LOG EXT for NCQ to unblock device processing if COMRESET 620 * was not done. 621 */ 622 if ((ATACH_ST(tfd) & (WDCS_BSY|WDCS_DRQ)) != 0) 623 goto reset; 624 625 KASSERT(drive >= 0); 626 siisata_reinit_port(chp, drive); 627 628 siisata_hold(schp); 629 630 /* 631 * When running NCQ commands, READ LOG EXT is necessary to clear the 632 * error condition and unblock the device. 633 */ 634 error = ata_read_log_ext_ncq(drvp, AT_POLL, &eslot, &st, &err); 635 636 siisata_unhold(schp); 637 638 switch (error) { 639 case 0: 640 /* Error out the particular NCQ xfer, then requeue the others */ 641 if ((schp->sch_active_slots & (1 << eslot)) != 0) { 642 xfer = ata_queue_hwslot_to_xfer(chp, eslot); 643 xfer->c_intr(chp, xfer, ATACH_ERR_ST(err, st)); 644 } 645 break; 646 647 case EOPNOTSUPP: 648 /* 649 * Non-NCQ command error, just find the slot and end it with 650 * the error. 651 */ 652 for (slot = 0; slot < SIISATA_MAX_SLOTS; slot++) { 653 if ((schp->sch_active_slots & (1 << slot)) != 0) { 654 xfer = ata_queue_hwslot_to_xfer(chp, slot); 655 if (xfer->c_drive != drive) 656 continue; 657 658 xfer->c_intr(chp, xfer, tfd); 659 } 660 } 661 break; 662 663 case EAGAIN: 664 /* 665 * Failed to get resources to run the recovery command, must 666 * reset the drive. This will also kill all still outstanding 667 * transfers. 668 */ 669 reset: 670 siisata_reset_channel(chp, AT_POLL); 671 goto out; 672 /* NOTREACHED */ 673 674 default: 675 /* 676 * The command to get the slot failed. Kill outstanding 677 * commands for the same drive only. No need to reset 678 * the drive, it's unblocked nevertheless. 679 */ 680 break; 681 } 682 683 /* Requeue the non-errorred commands */ 684 for (slot = 0; slot < SIISATA_MAX_SLOTS; slot++) { 685 if (((schp->sch_active_slots >> slot) & 1) == 0) 686 continue; 687 688 xfer = ata_queue_hwslot_to_xfer(chp, slot); 689 if (xfer->c_drive != drive) 690 continue; 691 692 xfer->c_kill_xfer(chp, xfer, 693 (error == 0) ? KILL_REQUEUE : KILL_RESET); 694 } 695 696 out: 697 /* Drive unblocked, back to normal operation */ 698 schp->sch_recovering = false; 699 ata_channel_thaw(chp); 700 atastart(chp); 701 } 702 703 void 704 siisata_reset_drive(struct ata_drive_datas *drvp, int flags, uint32_t *sigp) 705 { 706 struct ata_channel *chp = drvp->chnl_softc; 707 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 708 struct siisata_channel *schp = (struct siisata_channel *)chp; 709 struct siisata_prb *prb; 710 struct ata_xfer *xfer; 711 uint32_t pss, pis; 712 int i; 713 714 siisata_reinit_port(chp, drvp->drive); 715 716 xfer = ata_get_xfer_ext(chp, C_RECOVERY, 0); 717 718 prb = schp->sch_prb[xfer->c_slot]; 719 memset(prb, 0, SIISATA_CMD_SIZE); 720 prb->prb_control = 721 htole16(PRB_CF_SOFT_RESET | PRB_CF_INTERRUPT_MASK); 722 KASSERT(drvp->drive <= PMP_PORT_CTL); 723 prb->prb_fis[rhd_c] = drvp->drive; 724 725 siisata_disable_port_interrupt(chp); 726 727 siisata_activate_prb(schp, xfer->c_slot); 728 729 for(i = 0; i < 3100; i++) { 730 #if 1 /* XXX-jak-jd-ncq this block needs re-work... XXX */ 731 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_INCOR); 732 pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)); 733 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC), PR_PC_INCOR); 734 if ((pss & PR_PXSS(xfer->c_slot)) == 0) 735 break; 736 if (pss & PR_PSS_ATTENTION) 737 break; 738 #else 739 pss = PR_PXSS(xfer->c_slot); 740 /* XXX DO NOT MERGE UNTIL THIS IS FIXED XXX */ 741 #endif 742 ata_delay(10, "siiprb", flags); 743 } 744 745 siisata_deactivate_prb(schp, xfer->c_slot); 746 747 if ((pss & PR_PSS_ATTENTION) != 0) { 748 pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)); 749 const uint32_t ps = PRREAD(sc, PRX(chp->ch_channel, PRO_PS)); 750 const u_int slot = PR_PS_ACTIVE_SLOT(ps); 751 752 if (slot != xfer->c_slot) 753 device_printf(sc->sc_atac.atac_dev, "%s port %d " 754 "drive %d slot %d c_slot %d", __func__, 755 chp->ch_channel, drvp->drive, slot, xfer->c_slot); 756 757 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), pis & 758 PR_PIS_CMDERRR); 759 } 760 761 siisata_enable_port_interrupt(chp); 762 763 if (i == 3100) { 764 /* timeout */ 765 siisata_device_reset(chp); /* XXX is this right? */ 766 if (sigp) 767 *sigp = 0xffffffff; 768 } else { 769 /* read the signature out of the FIS */ 770 if (sigp) { 771 *sigp = 0; 772 *sigp |= (PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, 773 PRSO_FIS+0x4)) & 0x00ffffff) << 8; 774 *sigp |= PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, 775 PRSO_FIS+0xc)) & 0xff; 776 } 777 } 778 779 ata_free_xfer(chp, xfer); 780 781 return; 782 } 783 784 void 785 siisata_reset_channel(struct ata_channel *chp, int flags) 786 { 787 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 788 struct siisata_channel *schp = (struct siisata_channel *)chp; 789 790 SIISATA_DEBUG_PRINT(("%s: %s channel %d\n", SIISATANAME(sc), __func__, 791 chp->ch_channel), DEBUG_FUNCS); 792 793 if (sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol, 794 schp->sch_sstatus, flags) != SStatus_DET_DEV) { 795 aprint_error("%s port %d: reset failed\n", 796 SIISATANAME(sc), chp->ch_channel); 797 /* XXX and then ? */ 798 } 799 800 siisata_device_reset(chp); 801 802 PRWRITE(sc, PRX(chp->ch_channel, PRO_SERROR), 803 PRREAD(sc, PRX(chp->ch_channel, PRO_SERROR))); 804 805 return; 806 } 807 808 int 809 siisata_ata_addref(struct ata_drive_datas *drvp) 810 { 811 return 0; 812 } 813 814 void 815 siisata_ata_delref(struct ata_drive_datas *drvp) 816 { 817 return; 818 } 819 820 void 821 siisata_killpending(struct ata_drive_datas *drvp) 822 { 823 return; 824 } 825 826 void 827 siisata_probe_drive(struct ata_channel *chp) 828 { 829 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 830 struct siisata_channel *schp = (struct siisata_channel *)chp; 831 int i; 832 uint32_t sig; 833 struct siisata_prb *prb; 834 bool timed_out; 835 struct ata_xfer *xfer; 836 837 SIISATA_DEBUG_PRINT(("%s: %s: port %d start\n", SIISATANAME(sc), 838 __func__, chp->ch_channel), DEBUG_FUNCS); 839 840 xfer = ata_get_xfer_ext(chp, 0, 0); 841 if (xfer == NULL) { 842 aprint_error_dev(sc->sc_atac.atac_dev, 843 "failed to get xfer port %d\n", 844 chp->ch_channel); 845 return; 846 } 847 848 /* 849 * disable port interrupt as we're polling for PHY up and 850 * prb completion 851 */ 852 siisata_disable_port_interrupt(chp); 853 854 switch(sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol, 855 schp->sch_sstatus, AT_WAIT)) { 856 case SStatus_DET_DEV: 857 /* wait for ready */ 858 timed_out = 1; 859 for (i = 0; i < ATA_DELAY / 10; i++) { 860 if (PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & 861 PR_PS_PORT_READY) { 862 timed_out = 0; 863 break; 864 } 865 866 ata_delay(10, "siiprbrd", AT_WAIT); 867 } 868 if (timed_out) { 869 aprint_error_dev(sc->sc_atac.atac_dev, 870 "timed out waiting for PORT_READY on port %d, " 871 "reinitializing\n", chp->ch_channel); 872 siisata_reinit_port(chp, -1); 873 } 874 875 prb = schp->sch_prb[xfer->c_slot]; 876 memset(prb, 0, SIISATA_CMD_SIZE); 877 prb->prb_control = htole16(PRB_CF_SOFT_RESET); 878 prb->prb_fis[rhd_c] = PMP_PORT_CTL; 879 880 siisata_activate_prb(schp, xfer->c_slot); 881 882 timed_out = 1; 883 for(i = 0; i < 3100; i++) { 884 if ((PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) & 885 PR_PXSS(xfer->c_slot)) == 0) { 886 /* prb completed */ 887 timed_out = 0; 888 break; 889 } 890 if (PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)) & 891 PR_PIS_CMDERRR) { 892 /* we got an error; handle as timeout */ 893 break; 894 } 895 896 ata_delay(10, "siiprb", AT_WAIT); 897 } 898 899 siisata_deactivate_prb(schp, xfer->c_slot); 900 901 if (timed_out) { 902 aprint_error_dev(sc->sc_atac.atac_dev, 903 "SOFT_RESET failed on port %d (error %d PSS 0x%x PIS 0x%x), " 904 "resetting\n", chp->ch_channel, 905 PRREAD(sc, PRX(chp->ch_channel, PRO_PCE)), 906 PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)), 907 PRREAD(sc, PRX(chp->ch_channel, PRO_PIS))); 908 siisata_reinit_port(chp, -1); 909 break; 910 } 911 912 /* read the signature out of the FIS */ 913 sig = 0; 914 sig |= (PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, 915 PRSO_FIS+0x4)) & 0x00ffffff) << 8; 916 sig |= PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, 917 PRSO_FIS+0xc)) & 0xff; 918 919 SIISATA_DEBUG_PRINT(("%s: %s: sig=0x%08x\n", SIISATANAME(sc), 920 __func__, sig), DEBUG_PROBE); 921 922 if (sig == 0x96690101) 923 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), 924 PR_PC_PMP_ENABLE); 925 sata_interpret_sig(chp, 0, sig); 926 break; 927 default: 928 break; 929 } 930 931 siisata_enable_port_interrupt(chp); 932 933 ata_free_xfer(chp, xfer); 934 935 SIISATA_DEBUG_PRINT(("%s: %s: port %d done\n", SIISATANAME(sc), 936 __func__, chp->ch_channel), DEBUG_PROBE); 937 return; 938 } 939 940 void 941 siisata_setup_channel(struct ata_channel *chp) 942 { 943 return; 944 } 945 946 int 947 siisata_exec_command(struct ata_drive_datas *drvp, struct ata_xfer *xfer) 948 { 949 struct ata_channel *chp = drvp->chnl_softc; 950 struct ata_command *ata_c = &xfer->c_ata_c; 951 int ret; 952 int s; 953 954 SIISATA_DEBUG_PRINT(("%s: %s begins\n", 955 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 956 DEBUG_FUNCS); 957 958 if (ata_c->flags & AT_POLL) 959 xfer->c_flags |= C_POLL; 960 if (ata_c->flags & AT_WAIT) 961 xfer->c_flags |= C_WAIT; 962 xfer->c_drive = drvp->drive; 963 xfer->c_databuf = ata_c->data; 964 xfer->c_bcount = ata_c->bcount; 965 xfer->c_start = siisata_cmd_start; 966 xfer->c_intr = siisata_cmd_complete; 967 xfer->c_kill_xfer = siisata_cmd_kill_xfer; 968 s = splbio(); 969 ata_exec_xfer(chp, xfer); 970 #ifdef DIAGNOSTIC 971 if ((ata_c->flags & AT_POLL) != 0 && 972 (ata_c->flags & AT_DONE) == 0) 973 panic("%s: polled command not done", __func__); 974 #endif 975 if (ata_c->flags & AT_DONE) { 976 ret = ATACMD_COMPLETE; 977 } else { 978 if (ata_c->flags & AT_WAIT) { 979 while ((ata_c->flags & AT_DONE) == 0) { 980 SIISATA_DEBUG_PRINT(("%s: %s: sleeping\n", 981 SIISATANAME( 982 (struct siisata_softc *)chp->ch_atac), 983 __func__), DEBUG_FUNCS); 984 tsleep(ata_c, PRIBIO, "siicmd", 0); 985 } 986 ret = ATACMD_COMPLETE; 987 } else { 988 ret = ATACMD_QUEUED; 989 } 990 } 991 splx(s); 992 SIISATA_DEBUG_PRINT( ("%s: %s ends\n", 993 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 994 DEBUG_FUNCS); 995 return ret; 996 } 997 998 void 999 siisata_cmd_start(struct ata_channel *chp, struct ata_xfer *xfer) 1000 { 1001 struct siisata_channel *schp = (struct siisata_channel *)chp; 1002 struct ata_command *ata_c = &xfer->c_ata_c; 1003 struct siisata_prb *prb; 1004 int i; 1005 1006 SIISATA_DEBUG_PRINT(("%s: %s port %d drive %d command 0x%x, slot %d\n", 1007 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__, 1008 chp->ch_channel, xfer->c_drive, ata_c->r_command, xfer->c_slot), 1009 DEBUG_FUNCS|DEBUG_XFERS); 1010 1011 prb = schp->sch_prb[xfer->c_slot]; 1012 memset(prb, 0, SIISATA_CMD_SIZE); 1013 1014 satafis_rhd_construct_cmd(ata_c, prb->prb_fis); 1015 KASSERT(xfer->c_drive <= PMP_PORT_CTL); 1016 prb->prb_fis[rhd_c] |= xfer->c_drive; 1017 1018 if (ata_c->r_command == ATA_DATA_SET_MANAGEMENT) { 1019 prb->prb_control |= htole16(PRB_CF_PROTOCOL_OVERRIDE); 1020 prb->prb_protocol_override |= htole16(PRB_PO_WRITE); 1021 } 1022 1023 if (siisata_dma_setup(chp, xfer->c_slot, 1024 (ata_c->flags & (AT_READ | AT_WRITE)) ? ata_c->data : NULL, 1025 ata_c->bcount, 1026 (ata_c->flags & AT_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) { 1027 ata_c->flags |= AT_DF; 1028 siisata_cmd_complete(chp, xfer, 0); 1029 return; 1030 } 1031 1032 if (xfer->c_flags & C_POLL) { 1033 /* polled command, disable interrupts */ 1034 prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 1035 siisata_disable_port_interrupt(chp); 1036 } 1037 1038 /* go for it */ 1039 siisata_activate_prb(schp, xfer->c_slot); 1040 1041 if ((ata_c->flags & AT_POLL) == 0) { 1042 callout_reset(&xfer->c_timo_callout, mstohz(ata_c->timeout), 1043 ata_timeout, xfer); 1044 goto out; 1045 } 1046 1047 /* 1048 * polled command 1049 */ 1050 for (i = 0; i < ata_c->timeout * 10; i++) { 1051 if (ata_c->flags & AT_DONE) 1052 break; 1053 siisata_intr_port(schp); 1054 DELAY(100); 1055 } 1056 1057 if ((ata_c->flags & AT_DONE) == 0) { 1058 ata_timeout(xfer); 1059 } 1060 1061 /* reenable interrupts */ 1062 siisata_enable_port_interrupt(chp); 1063 out: 1064 SIISATA_DEBUG_PRINT(("%s: %s: done\n", 1065 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 1066 DEBUG_FUNCS); 1067 return; 1068 } 1069 1070 void 1071 siisata_cmd_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 1072 int reason) 1073 { 1074 struct ata_command *ata_c = &xfer->c_ata_c; 1075 struct siisata_channel *schp = (struct siisata_channel *)chp; 1076 bool deactivate = true; 1077 1078 switch (reason) { 1079 case KILL_GONE_INACTIVE: 1080 deactivate = false; 1081 /* FALLTHROUGH */ 1082 case KILL_GONE: 1083 ata_c->flags |= AT_GONE; 1084 break; 1085 case KILL_RESET: 1086 ata_c->flags |= AT_RESET; 1087 break; 1088 case KILL_REQUEUE: 1089 panic("%s: not supposed to be requeued\n", __func__); 1090 break; 1091 default: 1092 panic("%s: port %d: unknown reason %d", 1093 __func__, chp->ch_channel, reason); 1094 } 1095 1096 if (deactivate) { 1097 siisata_deactivate_prb(schp, xfer->c_slot); 1098 ata_deactivate_xfer(chp, xfer); 1099 } 1100 1101 siisata_cmd_done_end(chp, xfer); 1102 } 1103 1104 int 1105 siisata_cmd_complete(struct ata_channel *chp, struct ata_xfer *xfer, int tfd) 1106 { 1107 struct siisata_channel *schp = (struct siisata_channel *)chp; 1108 struct ata_command *ata_c = &xfer->c_ata_c; 1109 #ifdef SIISATA_DEBUG 1110 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1111 #endif 1112 1113 SIISATA_DEBUG_PRINT(("%s: %s: port %d slot %d\n", 1114 SIISATANAME(sc), __func__, 1115 chp->ch_channel, xfer->c_slot), DEBUG_FUNCS); 1116 SIISATA_DEBUG_PRINT(("%s: %s\n", SIISATANAME(sc), __func__), 1117 DEBUG_FUNCS|DEBUG_XFERS); 1118 1119 if (ata_waitdrain_xfer_check(chp, xfer)) 1120 return 0; 1121 1122 siisata_deactivate_prb(schp, xfer->c_slot); 1123 ata_deactivate_xfer(chp, xfer); 1124 1125 if (xfer->c_flags & C_TIMEOU) 1126 ata_c->flags |= AT_TIMEOU; 1127 1128 if (ATACH_ST(tfd) & WDCS_BSY) { 1129 ata_c->flags |= AT_TIMEOU; 1130 } else if (ATACH_ST(tfd) & WDCS_ERR) { 1131 ata_c->r_error = ATACH_ERR(tfd); 1132 ata_c->flags |= AT_ERROR; 1133 } 1134 1135 siisata_cmd_done(chp, xfer, tfd); 1136 1137 return 0; 1138 } 1139 1140 void 1141 siisata_cmd_done(struct ata_channel *chp, struct ata_xfer *xfer, int tfd) 1142 { 1143 uint32_t fis[howmany(RDH_FISLEN,sizeof(uint32_t))]; 1144 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1145 struct siisata_channel *schp = (struct siisata_channel *)chp; 1146 struct ata_command *ata_c = &xfer->c_ata_c; 1147 uint16_t *idwordbuf; 1148 int i; 1149 1150 SIISATA_DEBUG_PRINT(("%s: %s flags 0x%x error 0x%x\n", SIISATANAME(sc), 1151 __func__, ata_c->flags, ata_c->r_error), DEBUG_FUNCS|DEBUG_XFERS); 1152 1153 if (ata_c->flags & (AT_READ | AT_WRITE)) { 1154 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[xfer->c_slot], 0, 1155 schp->sch_datad[xfer->c_slot]->dm_mapsize, 1156 (ata_c->flags & AT_READ) ? BUS_DMASYNC_POSTREAD : 1157 BUS_DMASYNC_POSTWRITE); 1158 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[xfer->c_slot]); 1159 } 1160 1161 if (ata_c->flags & AT_READREG) { 1162 bus_space_read_region_stream_4(sc->sc_prt, sc->sc_prh, 1163 PRSX(chp->ch_channel, xfer->c_slot, PRSO_FIS), 1164 fis, __arraycount(fis)); 1165 satafis_rdh_cmd_readreg(ata_c, (uint8_t *)fis); 1166 } 1167 1168 /* correct the endianess of IDENTIFY data */ 1169 if (ata_c->r_command == WDCC_IDENTIFY || 1170 ata_c->r_command == ATAPI_IDENTIFY_DEVICE) { 1171 idwordbuf = xfer->c_databuf; 1172 for (i = 0; i < (xfer->c_bcount / sizeof(*idwordbuf)); i++) { 1173 idwordbuf[i] = le16toh(idwordbuf[i]); 1174 } 1175 } 1176 1177 if (PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, PRSO_RTC))) 1178 ata_c->flags |= AT_XFDONE; 1179 1180 siisata_cmd_done_end(chp, xfer); 1181 if ((ATACH_ST(tfd) & WDCS_ERR) == 0) 1182 atastart(chp); 1183 } 1184 1185 static void 1186 siisata_cmd_done_end(struct ata_channel *chp, struct ata_xfer *xfer) 1187 { 1188 struct ata_command *ata_c = &xfer->c_ata_c; 1189 1190 ata_c->flags |= AT_DONE; 1191 1192 if (ata_c->flags & AT_WAIT) 1193 wakeup(ata_c); 1194 return; 1195 } 1196 1197 int 1198 siisata_ata_bio(struct ata_drive_datas *drvp, struct ata_xfer *xfer) 1199 { 1200 struct ata_channel *chp = drvp->chnl_softc; 1201 struct ata_bio *ata_bio = &xfer->c_bio; 1202 1203 SIISATA_DEBUG_PRINT(("%s: %s.\n", 1204 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 1205 DEBUG_FUNCS); 1206 1207 if (xfer == NULL) 1208 return ATACMD_TRY_AGAIN; 1209 if (ata_bio->flags & ATA_POLL) 1210 xfer->c_flags |= C_POLL; 1211 xfer->c_drive = drvp->drive; 1212 xfer->c_databuf = ata_bio->databuf; 1213 xfer->c_bcount = ata_bio->bcount; 1214 xfer->c_start = siisata_bio_start; 1215 xfer->c_intr = siisata_bio_complete; 1216 xfer->c_kill_xfer = siisata_bio_kill_xfer; 1217 ata_exec_xfer(chp, xfer); 1218 return (ata_bio->flags & ATA_ITSDONE) ? 1219 ATACMD_COMPLETE : ATACMD_QUEUED; 1220 } 1221 1222 void 1223 siisata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 1224 { 1225 struct siisata_channel *schp = (struct siisata_channel *)chp; 1226 struct siisata_prb *prb; 1227 struct ata_bio *ata_bio = &xfer->c_bio; 1228 int i; 1229 1230 SIISATA_DEBUG_PRINT(("%s: %s port %d slot %d drive %d\n", 1231 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__, 1232 chp->ch_channel, xfer->c_slot, xfer->c_drive), DEBUG_FUNCS); 1233 1234 prb = schp->sch_prb[xfer->c_slot]; 1235 memset(prb, 0, SIISATA_CMD_SIZE); 1236 1237 satafis_rhd_construct_bio(xfer, prb->prb_fis); 1238 KASSERT(xfer->c_drive <= PMP_PORT_CTL); 1239 prb->prb_fis[rhd_c] |= xfer->c_drive; 1240 1241 if (siisata_dma_setup(chp, xfer->c_slot, ata_bio->databuf, ata_bio->bcount, 1242 (ata_bio->flags & ATA_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) { 1243 ata_bio->error = ERR_DMA; 1244 ata_bio->r_error = 0; 1245 siisata_bio_complete(chp, xfer, 0); 1246 return; 1247 } 1248 1249 if (xfer->c_flags & C_POLL) { 1250 /* polled command, disable interrupts */ 1251 prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 1252 siisata_disable_port_interrupt(chp); 1253 } 1254 1255 siisata_activate_prb(schp, xfer->c_slot); 1256 1257 if ((ata_bio->flags & ATA_POLL) == 0) { 1258 callout_reset(&xfer->c_timo_callout, mstohz(ATA_DELAY), 1259 ata_timeout, xfer); 1260 goto out; 1261 } 1262 1263 /* 1264 * polled command 1265 */ 1266 for (i = 0; i < ATA_DELAY * 10; i++) { 1267 if (ata_bio->flags & ATA_ITSDONE) 1268 break; 1269 siisata_intr_port(schp); 1270 DELAY(100); 1271 } 1272 1273 if ((ata_bio->flags & ATA_ITSDONE) == 0) { 1274 ata_timeout(xfer); 1275 } 1276 1277 siisata_enable_port_interrupt(chp); 1278 out: 1279 SIISATA_DEBUG_PRINT(("%s: %s: done\n", 1280 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 1281 DEBUG_FUNCS); 1282 return; 1283 } 1284 1285 void 1286 siisata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 1287 int reason) 1288 { 1289 struct siisata_channel *schp = (struct siisata_channel *)chp; 1290 struct ata_bio *ata_bio = &xfer->c_bio; 1291 int drive = xfer->c_drive; 1292 bool deactivate = true; 1293 1294 SIISATA_DEBUG_PRINT(("%s: %s: port %d slot %d\n", 1295 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__, 1296 chp->ch_channel, xfer->c_slot), DEBUG_FUNCS); 1297 1298 ata_bio->flags |= ATA_ITSDONE; 1299 switch (reason) { 1300 case KILL_GONE_INACTIVE: 1301 deactivate = false; 1302 /* FALLTHROUGH */ 1303 case KILL_GONE: 1304 ata_bio->error = ERR_NODEV; 1305 break; 1306 case KILL_RESET: 1307 ata_bio->error = ERR_RESET; 1308 break; 1309 case KILL_REQUEUE: 1310 ata_bio->error = REQUEUE; 1311 break; 1312 default: 1313 panic("%s: port %d: unknown reason %d", 1314 __func__, chp->ch_channel, reason); 1315 } 1316 ata_bio->r_error = WDCE_ABRT; 1317 1318 if (deactivate) { 1319 siisata_deactivate_prb(schp, xfer->c_slot); 1320 ata_deactivate_xfer(chp, xfer); 1321 } 1322 1323 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc, xfer); 1324 } 1325 1326 int 1327 siisata_bio_complete(struct ata_channel *chp, struct ata_xfer *xfer, int tfd) 1328 { 1329 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1330 struct siisata_channel *schp = (struct siisata_channel *)chp; 1331 struct ata_bio *ata_bio = &xfer->c_bio; 1332 int drive = xfer->c_drive; 1333 1334 SIISATA_DEBUG_PRINT(("%s: %s: port %d slot %d drive %d tfd %x\n", 1335 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__, 1336 chp->ch_channel, xfer->c_slot, xfer->c_drive, tfd), DEBUG_FUNCS); 1337 1338 if (ata_waitdrain_xfer_check(chp, xfer)) 1339 return 0; 1340 1341 siisata_deactivate_prb(schp, xfer->c_slot); 1342 ata_deactivate_xfer(chp, xfer); 1343 1344 if (xfer->c_flags & C_TIMEOU) { 1345 ata_bio->error = TIMEOUT; 1346 } 1347 1348 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[xfer->c_slot], 0, 1349 schp->sch_datad[xfer->c_slot]->dm_mapsize, 1350 (ata_bio->flags & ATA_READ) ? BUS_DMASYNC_POSTREAD : 1351 BUS_DMASYNC_POSTWRITE); 1352 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[xfer->c_slot]); 1353 1354 ata_bio->flags |= ATA_ITSDONE; 1355 if (ATACH_ST(tfd) & WDCS_DWF) { 1356 ata_bio->error = ERR_DF; 1357 } else if (ATACH_ST(tfd) & WDCS_ERR) { 1358 ata_bio->error = ERROR; 1359 ata_bio->r_error = ATACH_ERR(tfd); 1360 } else if (ATACH_ST(tfd) & WDCS_CORR) 1361 ata_bio->flags |= ATA_CORR; 1362 1363 SIISATA_DEBUG_PRINT(("%s: %s bcount: %ld", SIISATANAME(sc), __func__, 1364 ata_bio->bcount), DEBUG_XFERS); 1365 if (ata_bio->error == NOERROR) { 1366 if ((xfer->c_flags & C_NCQ) != 0 && ata_bio->flags & ATA_READ) 1367 ata_bio->bcount -= 1368 PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, PRSO_RTC)); 1369 else 1370 ata_bio->bcount = 0; 1371 } 1372 SIISATA_DEBUG_PRINT((" now %ld\n", ata_bio->bcount), DEBUG_XFERS); 1373 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc, xfer); 1374 if ((ATACH_ST(tfd) & WDCS_ERR) == 0) 1375 atastart(chp); 1376 return 0; 1377 } 1378 1379 static int 1380 siisata_dma_setup(struct ata_channel *chp, int slot, void *data, 1381 size_t count, int op) 1382 { 1383 1384 int error, seg; 1385 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1386 struct siisata_channel *schp = (struct siisata_channel *)chp; 1387 1388 struct siisata_prb *prbp; 1389 1390 prbp = schp->sch_prb[slot]; 1391 1392 if (data == NULL) { 1393 goto end; 1394 } 1395 1396 error = bus_dmamap_load(sc->sc_dmat, schp->sch_datad[slot], 1397 data, count, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | op); 1398 if (error) { 1399 aprint_error("%s port %d: " 1400 "failed to load xfer in slot %d: error %d\n", 1401 SIISATANAME(sc), chp->ch_channel, slot, error); 1402 return error; 1403 } 1404 1405 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 1406 schp->sch_datad[slot]->dm_mapsize, 1407 (op == BUS_DMA_READ) ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1408 1409 SIISATA_DEBUG_PRINT(("%s: %d segs, %ld count\n", __func__, 1410 schp->sch_datad[slot]->dm_nsegs, (long unsigned int) count), 1411 DEBUG_FUNCS | DEBUG_DEBUG); 1412 1413 for (seg = 0; seg < schp->sch_datad[slot]->dm_nsegs; seg++) { 1414 prbp->prb_sge[seg].sge_da = 1415 htole64(schp->sch_datad[slot]->dm_segs[seg].ds_addr); 1416 prbp->prb_sge[seg].sge_dc = 1417 htole32(schp->sch_datad[slot]->dm_segs[seg].ds_len); 1418 prbp->prb_sge[seg].sge_flags = htole32(0); 1419 } 1420 prbp->prb_sge[seg - 1].sge_flags |= htole32(SGE_FLAG_TRM); 1421 end: 1422 return 0; 1423 } 1424 1425 static void 1426 siisata_activate_prb(struct siisata_channel *schp, int slot) 1427 { 1428 struct siisata_softc *sc; 1429 bus_size_t offset; 1430 uint64_t pprb; 1431 1432 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 1433 1434 KASSERTMSG((schp->sch_active_slots & __BIT(slot)) == 0, 1435 "%s: trying to activate active slot %d", SIISATANAME(sc), slot); 1436 1437 SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_PREWRITE); 1438 /* keep track of what's going on */ 1439 schp->sch_active_slots |= __BIT(slot); 1440 1441 offset = PRO_CARX(schp->ata_channel.ch_channel, slot); 1442 1443 pprb = schp->sch_bus_prb[slot]; 1444 1445 PRWRITE(sc, offset + 0, pprb >> 0); 1446 PRWRITE(sc, offset + 4, pprb >> 32); 1447 } 1448 1449 static void 1450 siisata_deactivate_prb(struct siisata_channel *schp, int slot) 1451 { 1452 struct siisata_softc *sc; 1453 1454 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 1455 1456 KASSERTMSG((schp->sch_active_slots & __BIT(slot)) != 0, 1457 "%s: trying to deactivate inactive slot %d", SIISATANAME(sc), 1458 slot); 1459 1460 schp->sch_active_slots &= ~__BIT(slot); /* mark free */ 1461 SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_POSTWRITE); 1462 } 1463 1464 static void 1465 siisata_reinit_port(struct ata_channel *chp, int drive) 1466 { 1467 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1468 int ps; 1469 1470 1471 if (chp->ch_ndrives > 1) { 1472 /* 1473 * Proper recovery would SET this bit, which makes it 1474 * not possible to submit new commands and resume execution 1475 * on non-errored drives, then wait for those commands, 1476 * to finish, and only then clear the bit and reset the state. 1477 * For now this is okay, since we never queue commands for 1478 * more than one drive. 1479 * XXX FIS-based switching 1480 */ 1481 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC), PR_PC_RESUME); 1482 1483 for (int i = 0; i < chp->ch_ndrives; i++) { 1484 if (drive >= 0 && i != drive) 1485 continue; 1486 1487 PRWRITE(sc, PRX(chp->ch_channel, PRO_PMPSTS(i)), 0); 1488 PRWRITE(sc, PRX(chp->ch_channel, PRO_PMPQACT(i)), 0); 1489 } 1490 } 1491 1492 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_PORT_INITIALIZE); 1493 for (int i = 0; i < ATA_DELAY * 100; i++) { 1494 ps = PRREAD(sc, PRX(chp->ch_channel, PRO_PS)); 1495 if ((ps & PR_PS_PORT_READY) != 0) 1496 break; 1497 1498 DELAY(10); 1499 } 1500 if ((ps & PR_PS_PORT_READY) == 0) { 1501 printf("%s: timeout waiting for port to be ready\n", __func__); 1502 siisata_reset_channel(chp, AT_POLL); 1503 } 1504 1505 if (chp->ch_ndrives > 1) 1506 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_PMP_ENABLE); 1507 } 1508 1509 static void 1510 siisata_device_reset(struct ata_channel *chp) 1511 { 1512 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1513 int ps; 1514 1515 /* 1516 * This is always called after siisata_reinit_port(), so don't 1517 * need to deal with RESUME and clearing device error state. 1518 */ 1519 1520 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_DEVICE_RESET); 1521 1522 for (int i = 0; i < ATA_DELAY * 100; i++) { 1523 ps = PRREAD(sc, PRX(chp->ch_channel, PRO_PS)); 1524 if ((ps & PR_PS_PORT_READY) != 0) 1525 break; 1526 1527 DELAY(10); 1528 } 1529 if ((ps & PR_PS_PORT_READY) == 0) { 1530 printf("%s: timeout waiting for port to be ready\n", __func__); 1531 siisata_reset_channel(chp, AT_POLL); 1532 } 1533 1534 ata_kill_active(chp, KILL_RESET, 0); 1535 } 1536 1537 1538 #if NATAPIBUS > 0 1539 void 1540 siisata_atapibus_attach(struct atabus_softc *ata_sc) 1541 { 1542 struct ata_channel *chp = ata_sc->sc_chan; 1543 struct atac_softc *atac = chp->ch_atac; 1544 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1545 struct scsipi_channel *chan = &chp->ch_atapi_channel; 1546 1547 /* 1548 * Fill in the scsipi_adapter. 1549 */ 1550 adapt->adapt_dev = atac->atac_dev; 1551 adapt->adapt_nchannels = atac->atac_nchannels; 1552 adapt->adapt_request = siisata_atapi_scsipi_request; 1553 adapt->adapt_minphys = siisata_atapi_minphys; 1554 atac->atac_atapi_adapter.atapi_probe_device = 1555 siisata_atapi_probe_device; 1556 1557 /* 1558 * Fill in the scsipi_channel. 1559 */ 1560 memset(chan, 0, sizeof(*chan)); 1561 chan->chan_adapter = adapt; 1562 chan->chan_bustype = &siisata_atapi_bustype; 1563 chan->chan_channel = chp->ch_channel; 1564 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 1565 chan->chan_openings = 1; 1566 chan->chan_max_periph = 1; 1567 chan->chan_ntargets = 1; 1568 chan->chan_nluns = 1; 1569 1570 chp->atapibus = config_found_ia(ata_sc->sc_dev, "atapi", chan, 1571 atapiprint); 1572 } 1573 1574 void 1575 siisata_atapi_minphys(struct buf *bp) 1576 { 1577 if (bp->b_bcount > MAXPHYS) 1578 bp->b_bcount = MAXPHYS; 1579 minphys(bp); 1580 } 1581 1582 /* 1583 * Kill off all pending xfers for a periph. 1584 * 1585 * Must be called at splbio(). 1586 */ 1587 void 1588 siisata_atapi_kill_pending(struct scsipi_periph *periph) 1589 { 1590 struct atac_softc *atac = 1591 device_private(periph->periph_channel->chan_adapter->adapt_dev); 1592 struct ata_channel *chp = 1593 atac->atac_channels[periph->periph_channel->chan_channel]; 1594 1595 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 1596 } 1597 1598 void 1599 siisata_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 1600 int reason) 1601 { 1602 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 1603 struct siisata_channel *schp = (struct siisata_channel *)chp; 1604 bool deactivate = true; 1605 1606 /* remove this command from xfer queue */ 1607 switch (reason) { 1608 case KILL_GONE_INACTIVE: 1609 deactivate = false; 1610 /* FALLTHROUGH */ 1611 case KILL_GONE: 1612 sc_xfer->error = XS_DRIVER_STUFFUP; 1613 break; 1614 case KILL_RESET: 1615 sc_xfer->error = XS_RESET; 1616 break; 1617 case KILL_REQUEUE: 1618 sc_xfer->error = XS_REQUEUE; 1619 break; 1620 default: 1621 panic("%s: port %d: unknown reason %d", 1622 __func__, chp->ch_channel, reason); 1623 } 1624 1625 if (deactivate) { 1626 siisata_deactivate_prb(schp, xfer->c_slot); 1627 ata_deactivate_xfer(chp, xfer); 1628 } 1629 1630 ata_free_xfer(chp, xfer); 1631 scsipi_done(sc_xfer); 1632 } 1633 1634 void 1635 siisata_atapi_probe_device(struct atapibus_softc *sc, int target) 1636 { 1637 struct scsipi_channel *chan = sc->sc_channel; 1638 struct scsipi_periph *periph; 1639 struct ataparams ids; 1640 struct ataparams *id = &ids; 1641 struct siisata_softc *siic = 1642 device_private(chan->chan_adapter->adapt_dev); 1643 struct atac_softc *atac = &siic->sc_atac; 1644 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 1645 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 1646 struct scsipibus_attach_args sa; 1647 char serial_number[21], model[41], firmware_revision[9]; 1648 int s; 1649 1650 /* skip if already attached */ 1651 if (scsipi_lookup_periph(chan, target, 0) != NULL) 1652 return; 1653 1654 /* if no ATAPI device detected at attach time, skip */ 1655 if (drvp->drive_type != ATA_DRIVET_ATAPI) { 1656 SIISATA_DEBUG_PRINT(("%s: drive %d not present\n", __func__, 1657 target), DEBUG_PROBE); 1658 return; 1659 } 1660 1661 /* Some ATAPI devices need a bit more time after software reset. */ 1662 DELAY(5000); 1663 if (ata_get_params(drvp, AT_WAIT, id) == 0) { 1664 #ifdef ATAPI_DEBUG_PROBE 1665 log(LOG_DEBUG, "%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 1666 device_xname(sc->sc_dev), target, 1667 id->atap_config & ATAPI_CFG_CMD_MASK, 1668 id->atap_config & ATAPI_CFG_DRQ_MASK); 1669 #endif 1670 periph = scsipi_alloc_periph(M_NOWAIT); 1671 if (periph == NULL) { 1672 aprint_error_dev(sc->sc_dev, 1673 "%s: unable to allocate periph for " 1674 "channel %d drive %d\n", __func__, 1675 chp->ch_channel, target); 1676 return; 1677 } 1678 periph->periph_dev = NULL; 1679 periph->periph_channel = chan; 1680 periph->periph_switch = &atapi_probe_periphsw; 1681 periph->periph_target = target; 1682 periph->periph_lun = 0; 1683 periph->periph_quirks = PQUIRK_ONLYBIG; 1684 1685 #ifdef SCSIPI_DEBUG 1686 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 1687 SCSIPI_DEBUG_TARGET == target) 1688 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 1689 #endif 1690 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 1691 if (id->atap_config & ATAPI_CFG_REMOV) 1692 periph->periph_flags |= PERIPH_REMOVABLE; 1693 sa.sa_periph = periph; 1694 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 1695 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 1696 T_REMOV : T_FIXED; 1697 strnvisx(model, sizeof(model), id->atap_model, 40, 1698 VIS_TRIM|VIS_SAFE|VIS_OCTAL); 1699 strnvisx(serial_number, sizeof(serial_number), 1700 id->atap_serial, 20, VIS_TRIM|VIS_SAFE|VIS_OCTAL); 1701 strnvisx(firmware_revision, sizeof(firmware_revision), 1702 id->atap_revision, 8, VIS_TRIM|VIS_SAFE|VIS_OCTAL); 1703 sa.sa_inqbuf.vendor = model; 1704 sa.sa_inqbuf.product = serial_number; 1705 sa.sa_inqbuf.revision = firmware_revision; 1706 1707 /* 1708 * Determine the operating mode capabilities of the device. 1709 */ 1710 if ((id->atap_config & ATAPI_CFG_CMD_MASK) 1711 == ATAPI_CFG_CMD_16) { 1712 periph->periph_cap |= PERIPH_CAP_CMD16; 1713 1714 /* configure port for packet length */ 1715 PRWRITE(siic, PRX(chp->ch_channel, PRO_PCS), 1716 PR_PC_PACKET_LENGTH); 1717 } else { 1718 PRWRITE(siic, PRX(chp->ch_channel, PRO_PCC), 1719 PR_PC_PACKET_LENGTH); 1720 } 1721 1722 /* XXX This is gross. */ 1723 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 1724 1725 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 1726 1727 if (drvp->drv_softc) 1728 ata_probe_caps(drvp); 1729 else { 1730 s = splbio(); 1731 drvp->drive_type &= ATA_DRIVET_NONE; 1732 splx(s); 1733 } 1734 } else { 1735 s = splbio(); 1736 drvp->drive_type &= ATA_DRIVET_NONE; 1737 splx(s); 1738 } 1739 } 1740 1741 void 1742 siisata_atapi_scsipi_request(struct scsipi_channel *chan, 1743 scsipi_adapter_req_t req, void *arg) 1744 { 1745 struct scsipi_adapter *adapt = chan->chan_adapter; 1746 struct scsipi_periph *periph; 1747 struct scsipi_xfer *sc_xfer; 1748 struct siisata_softc *sc = device_private(adapt->adapt_dev); 1749 struct atac_softc *atac = &sc->sc_atac; 1750 struct ata_xfer *xfer; 1751 int channel = chan->chan_channel; 1752 int drive, s; 1753 1754 switch (req) { 1755 case ADAPTER_REQ_RUN_XFER: 1756 sc_xfer = arg; 1757 periph = sc_xfer->xs_periph; 1758 drive = periph->periph_target; 1759 1760 SIISATA_DEBUG_PRINT(("%s: %s:%d:%d\n", __func__, 1761 device_xname(atac->atac_dev), channel, drive), 1762 DEBUG_XFERS); 1763 1764 if (!device_is_active(atac->atac_dev)) { 1765 sc_xfer->error = XS_DRIVER_STUFFUP; 1766 scsipi_done(sc_xfer); 1767 return; 1768 } 1769 xfer = ata_get_xfer_ext(atac->atac_channels[channel], 0, 0); 1770 if (xfer == NULL) { 1771 sc_xfer->error = XS_RESOURCE_SHORTAGE; 1772 scsipi_done(sc_xfer); 1773 return; 1774 } 1775 1776 if (sc_xfer->xs_control & XS_CTL_POLL) 1777 xfer->c_flags |= C_POLL; 1778 xfer->c_drive = drive; 1779 xfer->c_flags |= C_ATAPI; 1780 xfer->c_scsipi = sc_xfer; 1781 xfer->c_databuf = sc_xfer->data; 1782 xfer->c_bcount = sc_xfer->datalen; 1783 xfer->c_start = siisata_atapi_start; 1784 xfer->c_intr = siisata_atapi_complete; 1785 xfer->c_kill_xfer = siisata_atapi_kill_xfer; 1786 xfer->c_dscpoll = 0; 1787 s = splbio(); 1788 ata_exec_xfer(atac->atac_channels[channel], xfer); 1789 #ifdef DIAGNOSTIC 1790 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 1791 (sc_xfer->xs_status & XS_STS_DONE) == 0) 1792 panic("%s: polled command not done", __func__); 1793 #endif 1794 splx(s); 1795 return; 1796 1797 default: 1798 /* Not supported, nothing to do. */ 1799 ; 1800 } 1801 } 1802 1803 void 1804 siisata_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 1805 { 1806 struct siisata_channel *schp = (struct siisata_channel *)chp; 1807 struct siisata_prb *prbp; 1808 1809 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 1810 int i; 1811 1812 SIISATA_DEBUG_PRINT( ("%s: %s:%d:%d, scsi flags 0x%x\n", __func__, 1813 SIISATANAME((struct siisata_softc *)chp->ch_atac), chp->ch_channel, 1814 chp->ch_drive[xfer->c_drive].drive, sc_xfer->xs_control), 1815 DEBUG_XFERS); 1816 1817 prbp = schp->sch_prb[xfer->c_slot]; 1818 memset(prbp, 0, SIISATA_CMD_SIZE); 1819 1820 /* fill in direction for ATAPI command */ 1821 if ((sc_xfer->xs_control & XS_CTL_DATA_IN)) 1822 prbp->prb_control |= htole16(PRB_CF_PACKET_READ); 1823 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT)) 1824 prbp->prb_control |= htole16(PRB_CF_PACKET_WRITE); 1825 1826 satafis_rhd_construct_atapi(xfer, prbp->prb_fis); 1827 KASSERT(xfer->c_drive <= PMP_PORT_CTL); 1828 prbp->prb_fis[rhd_c] |= xfer->c_drive; 1829 1830 /* copy over ATAPI command */ 1831 memcpy(prbp->prb_atapi, sc_xfer->cmd, sc_xfer->cmdlen); 1832 1833 if (siisata_dma_setup(chp, xfer->c_slot, 1834 (sc_xfer->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ? 1835 xfer->c_databuf : NULL, 1836 xfer->c_bcount, 1837 (sc_xfer->xs_control & XS_CTL_DATA_IN) ? 1838 BUS_DMA_READ : BUS_DMA_WRITE) 1839 ) 1840 panic("%s", __func__); 1841 1842 if (xfer->c_flags & C_POLL) { 1843 /* polled command, disable interrupts */ 1844 prbp->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 1845 siisata_disable_port_interrupt(chp); 1846 } 1847 1848 siisata_activate_prb(schp, xfer->c_slot); 1849 1850 if ((xfer->c_flags & C_POLL) == 0) { 1851 callout_reset(&xfer->c_timo_callout, mstohz(sc_xfer->timeout), 1852 ata_timeout, xfer); 1853 goto out; 1854 } 1855 1856 /* 1857 * polled command 1858 */ 1859 for (i = 0; i < ATA_DELAY * 10; i++) { 1860 if (sc_xfer->xs_status & XS_STS_DONE) 1861 break; 1862 siisata_intr_port(schp); 1863 DELAY(100); 1864 } 1865 if ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 1866 ata_timeout(xfer); 1867 } 1868 /* reenable interrupts */ 1869 siisata_enable_port_interrupt(chp); 1870 out: 1871 SIISATA_DEBUG_PRINT(("%s: %s: done\n", 1872 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 1873 DEBUG_FUNCS); 1874 return; 1875 } 1876 1877 int 1878 siisata_atapi_complete(struct ata_channel *chp, struct ata_xfer *xfer, 1879 int tfd) 1880 { 1881 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1882 struct siisata_channel *schp = (struct siisata_channel *)chp; 1883 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 1884 1885 SIISATA_DEBUG_PRINT(("%s: %s()\n", SIISATANAME(sc), __func__), 1886 DEBUG_INTR); 1887 1888 if (ata_waitdrain_xfer_check(chp, xfer)) 1889 return 0; 1890 1891 /* this command is not active any more */ 1892 siisata_deactivate_prb(schp, xfer->c_slot); 1893 ata_deactivate_xfer(chp, xfer); 1894 1895 if (xfer->c_flags & C_TIMEOU) { 1896 sc_xfer->error = XS_TIMEOUT; 1897 } else if ((ATACH_ST(tfd) & WDCS_ERR) == 0) { 1898 sc_xfer->error = XS_NOERROR; 1899 } 1900 1901 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[xfer->c_slot], 0, 1902 schp->sch_datad[xfer->c_slot]->dm_mapsize, 1903 (sc_xfer->xs_control & XS_CTL_DATA_IN) ? 1904 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1905 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[xfer->c_slot]); 1906 1907 sc_xfer->resid = sc_xfer->datalen; 1908 sc_xfer->resid -= PRREAD(sc, PRSX(chp->ch_channel, xfer->c_slot, 1909 PRSO_RTC)); 1910 SIISATA_DEBUG_PRINT(("%s: %s datalen %d resid %d\n", SIISATANAME(sc), 1911 __func__, sc_xfer->datalen, sc_xfer->resid), DEBUG_XFERS); 1912 if ((ATACH_ST(tfd) & WDCS_ERR) && 1913 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 1914 sc_xfer->resid == sc_xfer->datalen)) { 1915 sc_xfer->error = XS_SHORTSENSE; 1916 sc_xfer->sense.atapi_sense = ATACH_ERR(tfd); 1917 if ((sc_xfer->xs_periph->periph_quirks & 1918 PQUIRK_NOSENSE) == 0) { 1919 /* request sense */ 1920 sc_xfer->error = XS_BUSY; 1921 sc_xfer->status = SCSI_CHECK; 1922 } 1923 } 1924 ata_free_xfer(chp, xfer); 1925 scsipi_done(sc_xfer); 1926 if ((ATACH_ST(tfd) & WDCS_ERR) == 0) 1927 atastart(chp); 1928 return 0; 1929 } 1930 1931 #endif /* NATAPIBUS */ 1932
Indexes created Tue Oct 21 05:10:09 GMT 2025