Home | History | Annotate | Line # | Download | only in ic
siop.c revision 1.40.2.10
      1  1.40.2.10  nathanw /*	$NetBSD: siop.c,v 1.40.2.10 2002/08/01 02:44:46 nathanw Exp $	*/
      2        1.1   bouyer 
      3        1.1   bouyer /*
      4        1.1   bouyer  * Copyright (c) 2000 Manuel Bouyer.
      5        1.1   bouyer  *
      6        1.1   bouyer  * Redistribution and use in source and binary forms, with or without
      7        1.1   bouyer  * modification, are permitted provided that the following conditions
      8        1.1   bouyer  * are met:
      9        1.1   bouyer  * 1. Redistributions of source code must retain the above copyright
     10        1.1   bouyer  *    notice, this list of conditions and the following disclaimer.
     11        1.1   bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12        1.1   bouyer  *    notice, this list of conditions and the following disclaimer in the
     13        1.1   bouyer  *    documentation and/or other materials provided with the distribution.
     14        1.1   bouyer  * 3. All advertising materials mentioning features or use of this software
     15        1.1   bouyer  *    must display the following acknowledgement:
     16   1.40.2.9  nathanw  *	This product includes software developed by Manuel Bouyer.
     17        1.5   bouyer  * 4. The name of the author may not be used to endorse or promote products
     18        1.5   bouyer  *    derived from this software without specific prior written permission.
     19        1.1   bouyer  *
     20       1.14   bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21       1.14   bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22       1.14   bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23       1.14   bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24       1.14   bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25       1.14   bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26       1.14   bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27       1.14   bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28       1.14   bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29       1.14   bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30        1.1   bouyer  *
     31        1.1   bouyer  */
     32        1.1   bouyer 
     33        1.1   bouyer /* SYM53c7/8xx PCI-SCSI I/O Processors driver */
     34   1.40.2.5  nathanw 
     35   1.40.2.5  nathanw #include <sys/cdefs.h>
     36  1.40.2.10  nathanw __KERNEL_RCSID(0, "$NetBSD: siop.c,v 1.40.2.10 2002/08/01 02:44:46 nathanw Exp $");
     37        1.1   bouyer 
     38        1.1   bouyer #include <sys/param.h>
     39        1.1   bouyer #include <sys/systm.h>
     40        1.1   bouyer #include <sys/device.h>
     41        1.1   bouyer #include <sys/malloc.h>
     42        1.1   bouyer #include <sys/buf.h>
     43        1.1   bouyer #include <sys/kernel.h>
     44        1.1   bouyer 
     45       1.37  thorpej #include <uvm/uvm_extern.h>
     46       1.37  thorpej 
     47        1.1   bouyer #include <machine/endian.h>
     48        1.1   bouyer #include <machine/bus.h>
     49        1.1   bouyer 
     50        1.1   bouyer #include <dev/microcode/siop/siop.out>
     51        1.1   bouyer 
     52        1.1   bouyer #include <dev/scsipi/scsi_all.h>
     53        1.1   bouyer #include <dev/scsipi/scsi_message.h>
     54        1.1   bouyer #include <dev/scsipi/scsipi_all.h>
     55        1.1   bouyer 
     56        1.1   bouyer #include <dev/scsipi/scsiconf.h>
     57        1.1   bouyer 
     58        1.1   bouyer #include <dev/ic/siopreg.h>
     59       1.14   bouyer #include <dev/ic/siopvar_common.h>
     60   1.40.2.9  nathanw #include <dev/ic/siopvar.h>
     61   1.40.2.9  nathanw 
     62   1.40.2.9  nathanw #include "opt_siop.h"
     63        1.1   bouyer 
     64       1.35   bouyer #ifndef DEBUG
     65       1.30   bouyer #undef DEBUG
     66       1.35   bouyer #endif
     67       1.35   bouyer #undef SIOP_DEBUG
     68       1.35   bouyer #undef SIOP_DEBUG_DR
     69       1.35   bouyer #undef SIOP_DEBUG_INTR
     70       1.35   bouyer #undef SIOP_DEBUG_SCHED
     71        1.2   bouyer #undef DUMP_SCRIPT
     72        1.2   bouyer 
     73        1.2   bouyer #define SIOP_STATS
     74        1.2   bouyer 
     75        1.1   bouyer #ifndef SIOP_DEFAULT_TARGET
     76        1.1   bouyer #define SIOP_DEFAULT_TARGET 7
     77        1.1   bouyer #endif
     78        1.1   bouyer 
     79       1.16   bouyer /* number of cmd descriptors per block */
     80       1.37  thorpej #define SIOP_NCMDPB (PAGE_SIZE / sizeof(struct siop_xfer))
     81        1.1   bouyer 
     82       1.35   bouyer /* Number of scheduler slot (needs to match script) */
     83       1.35   bouyer #define SIOP_NSLOTS 40
     84       1.35   bouyer 
     85        1.1   bouyer void	siop_reset __P((struct siop_softc *));
     86        1.2   bouyer void	siop_handle_reset __P((struct siop_softc *));
     87       1.31   bouyer int	siop_handle_qtag_reject __P((struct siop_cmd *));
     88        1.2   bouyer void	siop_scsicmd_end __P((struct siop_cmd *));
     89   1.40.2.2  nathanw void	siop_unqueue __P((struct siop_softc *, int, int));
     90   1.40.2.2  nathanw static void	siop_start __P((struct siop_softc *, struct siop_cmd *));
     91        1.1   bouyer void 	siop_timeout __P((void *));
     92        1.1   bouyer int	siop_scsicmd __P((struct scsipi_xfer *));
     93   1.40.2.2  nathanw void	siop_scsipi_request __P((struct scsipi_channel *,
     94   1.40.2.2  nathanw 			scsipi_adapter_req_t, void *));
     95        1.2   bouyer void	siop_dump_script __P((struct siop_softc *));
     96   1.40.2.4  nathanw void	siop_morecbd __P((struct siop_softc *));
     97       1.31   bouyer struct siop_lunsw *siop_get_lunsw __P((struct siop_softc *));
     98       1.31   bouyer void	siop_add_reselsw __P((struct siop_softc *, int));
     99   1.40.2.9  nathanw void	siop_update_scntl3 __P((struct siop_softc *,
    100   1.40.2.9  nathanw 			struct siop_common_target *));
    101        1.1   bouyer 
    102        1.2   bouyer #ifdef SIOP_STATS
    103        1.2   bouyer static int siop_stat_intr = 0;
    104        1.2   bouyer static int siop_stat_intr_shortxfer = 0;
    105        1.2   bouyer static int siop_stat_intr_sdp = 0;
    106        1.2   bouyer static int siop_stat_intr_done = 0;
    107        1.2   bouyer static int siop_stat_intr_xferdisc = 0;
    108       1.35   bouyer static int siop_stat_intr_lunresel = 0;
    109       1.36   bouyer static int siop_stat_intr_qfull = 0;
    110        1.2   bouyer void siop_printstats __P((void));
    111        1.2   bouyer #define INCSTAT(x) x++
    112        1.2   bouyer #else
    113        1.2   bouyer #define INCSTAT(x)
    114        1.2   bouyer #endif
    115        1.2   bouyer 
    116       1.32   bouyer static __inline__ void siop_script_sync __P((struct siop_softc *, int));
    117       1.32   bouyer static __inline__ void
    118       1.32   bouyer siop_script_sync(sc, ops)
    119       1.32   bouyer 	struct siop_softc *sc;
    120       1.32   bouyer 	int ops;
    121       1.32   bouyer {
    122   1.40.2.9  nathanw 	if ((sc->sc_c.features & SF_CHIP_RAM) == 0)
    123   1.40.2.9  nathanw 		bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0,
    124       1.37  thorpej 		    PAGE_SIZE, ops);
    125       1.32   bouyer }
    126       1.32   bouyer 
    127       1.35   bouyer static __inline__ u_int32_t siop_script_read __P((struct siop_softc *, u_int));
    128       1.31   bouyer static __inline__ u_int32_t
    129       1.31   bouyer siop_script_read(sc, offset)
    130       1.31   bouyer 	struct siop_softc *sc;
    131       1.35   bouyer 	u_int offset;
    132       1.31   bouyer {
    133   1.40.2.9  nathanw 	if (sc->sc_c.features & SF_CHIP_RAM) {
    134   1.40.2.9  nathanw 		return bus_space_read_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
    135   1.40.2.9  nathanw 		    offset * 4);
    136       1.31   bouyer 	} else {
    137   1.40.2.9  nathanw 		return le32toh(sc->sc_c.sc_script[offset]);
    138       1.31   bouyer 	}
    139       1.31   bouyer }
    140       1.31   bouyer 
    141       1.35   bouyer static __inline__ void siop_script_write __P((struct siop_softc *, u_int,
    142       1.31   bouyer 	u_int32_t));
    143       1.28   bouyer static __inline__ void
    144       1.31   bouyer siop_script_write(sc, offset, val)
    145       1.28   bouyer 	struct siop_softc *sc;
    146       1.35   bouyer 	u_int offset;
    147       1.31   bouyer 	u_int32_t val;
    148       1.28   bouyer {
    149   1.40.2.9  nathanw 	if (sc->sc_c.features & SF_CHIP_RAM) {
    150   1.40.2.9  nathanw 		bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
    151   1.40.2.9  nathanw 		    offset * 4, val);
    152       1.31   bouyer 	} else {
    153   1.40.2.9  nathanw 		sc->sc_c.sc_script[offset] = htole32(val);
    154       1.31   bouyer 	}
    155        1.2   bouyer }
    156        1.2   bouyer 
    157        1.1   bouyer void
    158        1.1   bouyer siop_attach(sc)
    159        1.1   bouyer 	struct siop_softc *sc;
    160        1.1   bouyer {
    161   1.40.2.9  nathanw 	if (siop_common_attach(&sc->sc_c) != 0)
    162   1.40.2.9  nathanw 		return;
    163        1.1   bouyer 
    164        1.1   bouyer 	TAILQ_INIT(&sc->free_list);
    165       1.16   bouyer 	TAILQ_INIT(&sc->cmds);
    166       1.31   bouyer 	TAILQ_INIT(&sc->lunsw_list);
    167       1.29   bouyer 	sc->sc_currschedslot = 0;
    168       1.35   bouyer #ifdef SIOP_DEBUG
    169       1.35   bouyer 	printf("%s: script size = %d, PHY addr=0x%x, VIRT=%p\n",
    170   1.40.2.9  nathanw 	    sc->sc_c.sc_dev.dv_xname, (int)sizeof(siop_script),
    171   1.40.2.9  nathanw 	    (u_int32_t)sc->sc_c.sc_scriptaddr, sc->sc_c.sc_script);
    172        1.1   bouyer #endif
    173        1.1   bouyer 
    174   1.40.2.9  nathanw 	sc->sc_c.sc_adapt.adapt_max_periph = SIOP_NTAG - 1;
    175   1.40.2.9  nathanw 	sc->sc_c.sc_adapt.adapt_request = siop_scsipi_request;
    176   1.40.2.9  nathanw 
    177       1.26   bouyer 	/* Do a bus reset, so that devices fall back to narrow/async */
    178   1.40.2.9  nathanw 	siop_resetbus(&sc->sc_c);
    179       1.26   bouyer 	/*
    180       1.26   bouyer 	 * siop_reset() will reset the chip, thus clearing pending interrupts
    181       1.26   bouyer 	 */
    182        1.1   bouyer 	siop_reset(sc);
    183        1.2   bouyer #ifdef DUMP_SCRIPT
    184        1.2   bouyer 	siop_dump_script(sc);
    185        1.2   bouyer #endif
    186        1.1   bouyer 
    187   1.40.2.9  nathanw 	config_found((struct device*)sc, &sc->sc_c.sc_chan, scsiprint);
    188        1.1   bouyer }
    189        1.1   bouyer 
    190        1.1   bouyer void
    191        1.1   bouyer siop_reset(sc)
    192        1.1   bouyer 	struct siop_softc *sc;
    193        1.1   bouyer {
    194        1.4   bouyer 	int i, j;
    195       1.31   bouyer 	struct siop_lunsw *lunsw;
    196        1.4   bouyer 
    197   1.40.2.9  nathanw 	siop_common_reset(&sc->sc_c);
    198        1.1   bouyer 
    199        1.1   bouyer 	/* copy and patch the script */
    200   1.40.2.9  nathanw 	if (sc->sc_c.features & SF_CHIP_RAM) {
    201   1.40.2.9  nathanw 		bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh, 0,
    202       1.17   bouyer 		    siop_script, sizeof(siop_script) / sizeof(siop_script[0]));
    203       1.17   bouyer 		for (j = 0; j <
    204       1.31   bouyer 		    (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0]));
    205       1.28   bouyer 		    j++) {
    206   1.40.2.9  nathanw 			bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
    207       1.31   bouyer 			    E_abs_msgin_Used[j] * 4,
    208   1.40.2.9  nathanw 			    sc->sc_c.sc_scriptaddr + Ent_msgin_space);
    209   1.40.2.9  nathanw 		}
    210   1.40.2.9  nathanw 		if (sc->sc_c.features & SF_CHIP_LED0) {
    211   1.40.2.9  nathanw 			bus_space_write_region_4(sc->sc_c.sc_ramt,
    212   1.40.2.9  nathanw 			    sc->sc_c.sc_ramh,
    213   1.40.2.9  nathanw 			    Ent_led_on1, siop_led_on,
    214   1.40.2.9  nathanw 			    sizeof(siop_led_on) / sizeof(siop_led_on[0]));
    215   1.40.2.9  nathanw 			bus_space_write_region_4(sc->sc_c.sc_ramt,
    216   1.40.2.9  nathanw 			    sc->sc_c.sc_ramh,
    217   1.40.2.9  nathanw 			    Ent_led_on2, siop_led_on,
    218   1.40.2.9  nathanw 			    sizeof(siop_led_on) / sizeof(siop_led_on[0]));
    219   1.40.2.9  nathanw 			bus_space_write_region_4(sc->sc_c.sc_ramt,
    220   1.40.2.9  nathanw 			    sc->sc_c.sc_ramh,
    221   1.40.2.9  nathanw 			    Ent_led_off, siop_led_off,
    222   1.40.2.9  nathanw 			    sizeof(siop_led_off) / sizeof(siop_led_off[0]));
    223       1.28   bouyer 		}
    224       1.17   bouyer 	} else {
    225       1.17   bouyer 		for (j = 0;
    226       1.17   bouyer 		    j < (sizeof(siop_script) / sizeof(siop_script[0])); j++) {
    227   1.40.2.9  nathanw 			sc->sc_c.sc_script[j] = htole32(siop_script[j]);
    228       1.17   bouyer 		}
    229       1.17   bouyer 		for (j = 0; j <
    230       1.31   bouyer 		    (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0]));
    231       1.28   bouyer 		    j++) {
    232   1.40.2.9  nathanw 			sc->sc_c.sc_script[E_abs_msgin_Used[j]] =
    233   1.40.2.9  nathanw 			    htole32(sc->sc_c.sc_scriptaddr + Ent_msgin_space);
    234   1.40.2.9  nathanw 		}
    235   1.40.2.9  nathanw 		if (sc->sc_c.features & SF_CHIP_LED0) {
    236   1.40.2.9  nathanw 			for (j = 0; j < (sizeof(siop_led_on) /
    237   1.40.2.9  nathanw 			    sizeof(siop_led_on[0])); j++)
    238   1.40.2.9  nathanw 				sc->sc_c.sc_script[
    239   1.40.2.9  nathanw 				    Ent_led_on1 / sizeof(siop_led_on[0]) + j
    240   1.40.2.9  nathanw 				    ] = htole32(siop_led_on[j]);
    241   1.40.2.9  nathanw 			for (j = 0; j < (sizeof(siop_led_on) /
    242   1.40.2.9  nathanw 			    sizeof(siop_led_on[0])); j++)
    243   1.40.2.9  nathanw 				sc->sc_c.sc_script[
    244   1.40.2.9  nathanw 				    Ent_led_on2 / sizeof(siop_led_on[0]) + j
    245   1.40.2.9  nathanw 				    ] = htole32(siop_led_on[j]);
    246   1.40.2.9  nathanw 			for (j = 0; j < (sizeof(siop_led_off) /
    247   1.40.2.9  nathanw 			    sizeof(siop_led_off[0])); j++)
    248   1.40.2.9  nathanw 				sc->sc_c.sc_script[
    249   1.40.2.9  nathanw 				   Ent_led_off / sizeof(siop_led_off[0]) + j
    250   1.40.2.9  nathanw 				   ] = htole32(siop_led_off[j]);
    251       1.17   bouyer 		}
    252        1.4   bouyer 	}
    253       1.35   bouyer 	sc->script_free_lo = sizeof(siop_script) / sizeof(siop_script[0]);
    254   1.40.2.9  nathanw 	sc->script_free_hi = sc->sc_c.ram_size / 4;
    255        1.1   bouyer 
    256       1.31   bouyer 	/* free used and unused lun switches */
    257       1.31   bouyer 	while((lunsw = TAILQ_FIRST(&sc->lunsw_list)) != NULL) {
    258       1.35   bouyer #ifdef SIOP_DEBUG
    259       1.31   bouyer 		printf("%s: free lunsw at offset %d\n",
    260   1.40.2.9  nathanw 				sc->sc_c.sc_dev.dv_xname, lunsw->lunsw_off);
    261       1.31   bouyer #endif
    262       1.31   bouyer 		TAILQ_REMOVE(&sc->lunsw_list, lunsw, next);
    263       1.31   bouyer 		free(lunsw, M_DEVBUF);
    264       1.31   bouyer 	}
    265       1.31   bouyer 	TAILQ_INIT(&sc->lunsw_list);
    266       1.31   bouyer 	/* restore reselect switch */
    267   1.40.2.9  nathanw 	for (i = 0; i < sc->sc_c.sc_chan.chan_ntargets; i++) {
    268   1.40.2.9  nathanw 		struct siop_target *target;
    269   1.40.2.9  nathanw 		if (sc->sc_c.targets[i] == NULL)
    270       1.31   bouyer 			continue;
    271       1.35   bouyer #ifdef SIOP_DEBUG
    272       1.31   bouyer 		printf("%s: restore sw for target %d\n",
    273   1.40.2.9  nathanw 				sc->sc_c.sc_dev.dv_xname, i);
    274       1.31   bouyer #endif
    275   1.40.2.9  nathanw 		target = (struct siop_target *)sc->sc_c.targets[i];
    276   1.40.2.9  nathanw 		free(target->lunsw, M_DEVBUF);
    277   1.40.2.9  nathanw 		target->lunsw = siop_get_lunsw(sc);
    278   1.40.2.9  nathanw 		if (target->lunsw == NULL) {
    279       1.31   bouyer 			printf("%s: can't alloc lunsw for target %d\n",
    280   1.40.2.9  nathanw 			    sc->sc_c.sc_dev.dv_xname, i);
    281       1.31   bouyer 			break;
    282       1.28   bouyer 		}
    283       1.31   bouyer 		siop_add_reselsw(sc, i);
    284       1.28   bouyer 	}
    285       1.28   bouyer 
    286        1.2   bouyer 	/* start script */
    287   1.40.2.9  nathanw 	if ((sc->sc_c.features & SF_CHIP_RAM) == 0) {
    288   1.40.2.9  nathanw 		bus_dmamap_sync(sc->sc_c.sc_dmat, sc->sc_c.sc_scriptdma, 0,
    289   1.40.2.9  nathanw 		    PAGE_SIZE, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    290       1.22   bouyer 	}
    291   1.40.2.9  nathanw 	bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP,
    292   1.40.2.9  nathanw 	    sc->sc_c.sc_scriptaddr + Ent_reselect);
    293        1.1   bouyer }
    294        1.1   bouyer 
    295        1.1   bouyer #if 0
    296        1.1   bouyer #define CALL_SCRIPT(ent) do {\
    297        1.1   bouyer 	printf ("start script DSA 0x%lx DSP 0x%lx\n", \
    298   1.40.2.9  nathanw 	    siop_cmd->cmd_c.dsa, \
    299   1.40.2.9  nathanw 	    sc->sc_c.sc_scriptaddr + ent); \
    300   1.40.2.9  nathanw bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \
    301        1.1   bouyer } while (0)
    302        1.1   bouyer #else
    303        1.1   bouyer #define CALL_SCRIPT(ent) do {\
    304   1.40.2.9  nathanw bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSP, sc->sc_c.sc_scriptaddr + ent); \
    305        1.1   bouyer } while (0)
    306        1.1   bouyer #endif
    307        1.1   bouyer 
    308        1.1   bouyer int
    309        1.1   bouyer siop_intr(v)
    310        1.1   bouyer 	void *v;
    311        1.1   bouyer {
    312        1.1   bouyer 	struct siop_softc *sc = v;
    313        1.7   bouyer 	struct siop_target *siop_target;
    314        1.1   bouyer 	struct siop_cmd *siop_cmd;
    315       1.31   bouyer 	struct siop_lun *siop_lun;
    316        1.1   bouyer 	struct scsipi_xfer *xs;
    317       1.35   bouyer 	int istat, sist, sstat1, dstat;
    318        1.1   bouyer 	u_int32_t irqcode;
    319        1.1   bouyer 	int need_reset = 0;
    320       1.35   bouyer 	int offset, target, lun, tag;
    321        1.2   bouyer 	bus_addr_t dsa;
    322       1.16   bouyer 	struct siop_cbd *cbdp;
    323       1.35   bouyer 	int freetarget = 0;
    324       1.39   bouyer 	int restart = 0;
    325        1.1   bouyer 
    326   1.40.2.9  nathanw 	istat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_ISTAT);
    327        1.2   bouyer 	if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0)
    328        1.2   bouyer 		return 0;
    329        1.2   bouyer 	INCSTAT(siop_stat_intr);
    330        1.1   bouyer 	if (istat & ISTAT_INTF) {
    331        1.1   bouyer 		printf("INTRF\n");
    332   1.40.2.9  nathanw 		bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    333   1.40.2.9  nathanw 		    SIOP_ISTAT, ISTAT_INTF);
    334   1.40.2.9  nathanw 	}
    335   1.40.2.9  nathanw 	if ((istat &(ISTAT_DIP | ISTAT_SIP | ISTAT_ABRT)) ==
    336   1.40.2.9  nathanw 	    (ISTAT_DIP | ISTAT_ABRT)) {
    337   1.40.2.9  nathanw 		/* clear abort */
    338   1.40.2.9  nathanw 		bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    339   1.40.2.9  nathanw 		    SIOP_ISTAT, 0);
    340        1.1   bouyer 	}
    341        1.2   bouyer 	/* use DSA to find the current siop_cmd */
    342   1.40.2.9  nathanw 	dsa = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA);
    343       1.16   bouyer 	for (cbdp = TAILQ_FIRST(&sc->cmds); cbdp != NULL;
    344       1.16   bouyer 	    cbdp = TAILQ_NEXT(cbdp, next)) {
    345       1.16   bouyer 		if (dsa >= cbdp->xferdma->dm_segs[0].ds_addr &&
    346       1.37  thorpej 	    	    dsa < cbdp->xferdma->dm_segs[0].ds_addr + PAGE_SIZE) {
    347       1.16   bouyer 			dsa -= cbdp->xferdma->dm_segs[0].ds_addr;
    348       1.16   bouyer 			siop_cmd = &cbdp->cmds[dsa / sizeof(struct siop_xfer)];
    349       1.16   bouyer 			siop_table_sync(siop_cmd,
    350       1.16   bouyer 			    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
    351       1.16   bouyer 			break;
    352       1.16   bouyer 		}
    353       1.16   bouyer 	}
    354       1.16   bouyer 	if (cbdp == NULL) {
    355        1.2   bouyer 		siop_cmd = NULL;
    356        1.2   bouyer 	}
    357       1.31   bouyer 	if (siop_cmd) {
    358   1.40.2.9  nathanw 		xs = siop_cmd->cmd_c.xs;
    359   1.40.2.9  nathanw 		siop_target = (struct siop_target *)siop_cmd->cmd_c.siop_target;
    360   1.40.2.9  nathanw 		target = siop_cmd->cmd_c.xs->xs_periph->periph_target;
    361   1.40.2.9  nathanw 		lun = siop_cmd->cmd_c.xs->xs_periph->periph_lun;
    362   1.40.2.9  nathanw 		tag = siop_cmd->cmd_c.tag;
    363       1.35   bouyer 		siop_lun = siop_target->siop_lun[lun];
    364       1.31   bouyer #ifdef DIAGNOSTIC
    365   1.40.2.9  nathanw 		if (siop_cmd->cmd_c.status != CMDST_ACTIVE) {
    366   1.40.2.3  nathanw  			printf("siop_cmd (lun %d) for DSA 0x%x "
    367   1.40.2.3  nathanw 			    "not active (%d)\n", lun, (u_int)dsa,
    368   1.40.2.9  nathanw 			    siop_cmd->cmd_c.status);
    369       1.31   bouyer 			xs = NULL;
    370       1.31   bouyer 			siop_target = NULL;
    371       1.35   bouyer 			target = -1;
    372       1.31   bouyer 			lun = -1;
    373       1.35   bouyer 			tag = -1;
    374       1.31   bouyer 			siop_lun = NULL;
    375       1.31   bouyer 			siop_cmd = NULL;
    376       1.35   bouyer 		} else if (siop_lun->siop_tag[tag].active != siop_cmd) {
    377       1.35   bouyer 			printf("siop_cmd (lun %d tag %d) not in siop_lun "
    378       1.35   bouyer 			    "active (%p != %p)\n", lun, tag, siop_cmd,
    379       1.35   bouyer 			    siop_lun->siop_tag[tag].active);
    380       1.31   bouyer 		}
    381       1.31   bouyer #endif
    382       1.31   bouyer 	} else {
    383       1.31   bouyer 		xs = NULL;
    384       1.31   bouyer 		siop_target = NULL;
    385       1.35   bouyer 		target = -1;
    386       1.31   bouyer 		lun = -1;
    387       1.35   bouyer 		tag = -1;
    388       1.31   bouyer 		siop_lun = NULL;
    389       1.31   bouyer 	}
    390        1.1   bouyer 	if (istat & ISTAT_DIP) {
    391   1.40.2.9  nathanw 		dstat = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    392   1.40.2.9  nathanw 		    SIOP_DSTAT);
    393   1.40.2.9  nathanw 		if (dstat & DSTAT_ABRT) {
    394   1.40.2.9  nathanw 			/* was probably generated by a bus reset IOCTL */
    395   1.40.2.9  nathanw 			if ((dstat & DSTAT_DFE) == 0)
    396   1.40.2.9  nathanw 				siop_clearfifo(&sc->sc_c);
    397   1.40.2.9  nathanw 			goto reset;
    398   1.40.2.9  nathanw 		}
    399        1.2   bouyer 		if (dstat & DSTAT_SSI) {
    400        1.2   bouyer 			printf("single step dsp 0x%08x dsa 0x08%x\n",
    401   1.40.2.9  nathanw 			    (int)(bus_space_read_4(sc->sc_c.sc_rt,
    402   1.40.2.9  nathanw 			    sc->sc_c.sc_rh, SIOP_DSP) -
    403   1.40.2.9  nathanw 			    sc->sc_c.sc_scriptaddr),
    404   1.40.2.9  nathanw 			    bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    405   1.40.2.9  nathanw 				SIOP_DSA));
    406        1.2   bouyer 			if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 &&
    407        1.2   bouyer 			    (istat & ISTAT_SIP) == 0) {
    408   1.40.2.9  nathanw 				bus_space_write_1(sc->sc_c.sc_rt,
    409   1.40.2.9  nathanw 				    sc->sc_c.sc_rh, SIOP_DCNTL,
    410   1.40.2.9  nathanw 				    bus_space_read_1(sc->sc_c.sc_rt,
    411   1.40.2.9  nathanw 				    sc->sc_c.sc_rh, SIOP_DCNTL) | DCNTL_STD);
    412        1.2   bouyer 			}
    413        1.2   bouyer 			return 1;
    414        1.2   bouyer 		}
    415   1.40.2.9  nathanw 
    416        1.2   bouyer 		if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) {
    417        1.1   bouyer 		printf("DMA IRQ:");
    418        1.1   bouyer 		if (dstat & DSTAT_IID)
    419        1.1   bouyer 			printf(" Illegal instruction");
    420        1.1   bouyer 		if (dstat & DSTAT_BF)
    421        1.1   bouyer 			printf(" bus fault");
    422        1.1   bouyer 		if (dstat & DSTAT_MDPE)
    423        1.1   bouyer 			printf(" parity");
    424        1.1   bouyer 		if (dstat & DSTAT_DFE)
    425        1.1   bouyer 			printf(" dma fifo empty");
    426   1.40.2.9  nathanw 		else
    427   1.40.2.9  nathanw 			siop_clearfifo(&sc->sc_c);
    428        1.1   bouyer 		printf(", DSP=0x%x DSA=0x%x: ",
    429   1.40.2.9  nathanw 		    (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    430   1.40.2.9  nathanw 			SIOP_DSP) - sc->sc_c.sc_scriptaddr),
    431   1.40.2.9  nathanw 		    bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA));
    432        1.2   bouyer 		if (siop_cmd)
    433        1.1   bouyer 			printf("last msg_in=0x%x status=0x%x\n",
    434   1.40.2.9  nathanw 			    siop_cmd->cmd_tables->msg_in[0],
    435   1.40.2.9  nathanw 			    le32toh(siop_cmd->cmd_tables->status));
    436       1.20   bouyer 		else
    437       1.20   bouyer 			printf("%s: current DSA invalid\n",
    438   1.40.2.9  nathanw 			    sc->sc_c.sc_dev.dv_xname);
    439        1.1   bouyer 		need_reset = 1;
    440        1.1   bouyer 		}
    441        1.1   bouyer 	}
    442        1.1   bouyer 	if (istat & ISTAT_SIP) {
    443        1.1   bouyer 		if (istat & ISTAT_DIP)
    444        1.8   bouyer 			delay(10);
    445       1.35   bouyer 		/*
    446       1.35   bouyer 		 * Can't read sist0 & sist1 independantly, or we have to
    447       1.35   bouyer 		 * insert delay
    448       1.35   bouyer 		 */
    449   1.40.2.9  nathanw 		sist = bus_space_read_2(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    450   1.40.2.9  nathanw 		    SIOP_SIST0);
    451   1.40.2.9  nathanw 		sstat1 = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    452   1.40.2.9  nathanw 		    SIOP_SSTAT1);
    453       1.35   bouyer #ifdef SIOP_DEBUG_INTR
    454       1.35   bouyer 		printf("scsi interrupt, sist=0x%x sstat1=0x%x "
    455       1.35   bouyer 		    "DSA=0x%x DSP=0x%lx\n", sist,
    456   1.40.2.9  nathanw 		    bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    457   1.40.2.9  nathanw 			SIOP_SSTAT1),
    458   1.40.2.9  nathanw 		    bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA),
    459   1.40.2.9  nathanw 		    (u_long)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    460   1.40.2.9  nathanw 			SIOP_DSP) -
    461   1.40.2.9  nathanw 		    sc->sc_c.sc_scriptaddr));
    462        1.1   bouyer #endif
    463       1.35   bouyer 		if (sist & SIST0_RST) {
    464        1.2   bouyer 			siop_handle_reset(sc);
    465        1.2   bouyer 			/* no table to flush here */
    466        1.1   bouyer 			return 1;
    467        1.1   bouyer 		}
    468       1.35   bouyer 		if (sist & SIST0_SGE) {
    469        1.1   bouyer 			if (siop_cmd)
    470   1.40.2.2  nathanw 				scsipi_printaddr(xs->xs_periph);
    471        1.1   bouyer 			else
    472   1.40.2.9  nathanw 				printf("%s:", sc->sc_c.sc_dev.dv_xname);
    473        1.1   bouyer 			printf("scsi gross error\n");
    474        1.1   bouyer 			goto reset;
    475        1.1   bouyer 		}
    476       1.35   bouyer 		if ((sist & SIST0_MA) && need_reset == 0) {
    477        1.1   bouyer 			if (siop_cmd) {
    478        1.8   bouyer 				int scratcha0;
    479   1.40.2.9  nathanw 				dstat = bus_space_read_1(sc->sc_c.sc_rt,
    480   1.40.2.9  nathanw 				    sc->sc_c.sc_rh, SIOP_DSTAT);
    481        1.3   bouyer 				/*
    482        1.3   bouyer 				 * first restore DSA, in case we were in a S/G
    483        1.3   bouyer 				 * operation.
    484        1.3   bouyer 				 */
    485   1.40.2.9  nathanw 				bus_space_write_4(sc->sc_c.sc_rt,
    486   1.40.2.9  nathanw 				    sc->sc_c.sc_rh,
    487   1.40.2.9  nathanw 				    SIOP_DSA, siop_cmd->cmd_c.dsa);
    488   1.40.2.9  nathanw 				scratcha0 = bus_space_read_1(sc->sc_c.sc_rt,
    489   1.40.2.9  nathanw 				    sc->sc_c.sc_rh, SIOP_SCRATCHA);
    490        1.1   bouyer 				switch (sstat1 & SSTAT1_PHASE_MASK) {
    491        1.1   bouyer 				case SSTAT1_PHASE_STATUS:
    492        1.1   bouyer 				/*
    493        1.1   bouyer 				 * previous phase may be aborted for any reason
    494        1.1   bouyer 				 * ( for example, the target has less data to
    495        1.1   bouyer 				 * transfer than requested). Just go to status
    496        1.1   bouyer 				 * and the command should terminate.
    497        1.1   bouyer 				 */
    498        1.2   bouyer 					INCSTAT(siop_stat_intr_shortxfer);
    499        1.8   bouyer 					if ((dstat & DSTAT_DFE) == 0)
    500   1.40.2.9  nathanw 						siop_clearfifo(&sc->sc_c);
    501        1.2   bouyer 					/* no table to flush here */
    502       1.31   bouyer 					CALL_SCRIPT(Ent_status);
    503        1.1   bouyer 					return 1;
    504        1.1   bouyer 				case SSTAT1_PHASE_MSGIN:
    505        1.1   bouyer 					/*
    506        1.1   bouyer 					 * target may be ready to disconnect
    507        1.1   bouyer 					 * Save data pointers just in case.
    508        1.1   bouyer 					 */
    509        1.2   bouyer 					INCSTAT(siop_stat_intr_xferdisc);
    510        1.8   bouyer 					if (scratcha0 & A_flag_data)
    511   1.40.2.9  nathanw 						siop_sdp(&siop_cmd->cmd_c);
    512        1.8   bouyer 					else if ((dstat & DSTAT_DFE) == 0)
    513   1.40.2.9  nathanw 						siop_clearfifo(&sc->sc_c);
    514   1.40.2.9  nathanw 					bus_space_write_1(sc->sc_c.sc_rt,
    515   1.40.2.9  nathanw 					    sc->sc_c.sc_rh, SIOP_SCRATCHA,
    516        1.8   bouyer 					    scratcha0 & ~A_flag_data);
    517        1.2   bouyer 					siop_table_sync(siop_cmd,
    518        1.2   bouyer 					    BUS_DMASYNC_PREREAD |
    519        1.2   bouyer 					    BUS_DMASYNC_PREWRITE);
    520        1.1   bouyer 					CALL_SCRIPT(Ent_msgin);
    521        1.1   bouyer 					return 1;
    522        1.1   bouyer 				}
    523        1.1   bouyer 				printf("%s: unexpected phase mismatch %d\n",
    524   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname,
    525        1.1   bouyer 				    sstat1 & SSTAT1_PHASE_MASK);
    526        1.1   bouyer 			} else {
    527        1.1   bouyer 				printf("%s: phase mismatch without command\n",
    528   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname);
    529        1.1   bouyer 			}
    530        1.1   bouyer 			need_reset = 1;
    531        1.1   bouyer 		}
    532       1.35   bouyer 		if (sist & SIST0_PAR) {
    533        1.1   bouyer 			/* parity error, reset */
    534        1.1   bouyer 			if (siop_cmd)
    535   1.40.2.2  nathanw 				scsipi_printaddr(xs->xs_periph);
    536        1.1   bouyer 			else
    537   1.40.2.9  nathanw 				printf("%s:", sc->sc_c.sc_dev.dv_xname);
    538        1.1   bouyer 			printf("parity error\n");
    539       1.11   bouyer 			goto reset;
    540        1.1   bouyer 		}
    541       1.35   bouyer 		if ((sist & (SIST1_STO << 8)) && need_reset == 0) {
    542        1.1   bouyer 			/* selection time out, assume there's no device here */
    543        1.1   bouyer 			if (siop_cmd) {
    544   1.40.2.9  nathanw 				siop_cmd->cmd_c.status = CMDST_DONE;
    545        1.1   bouyer 				xs->error = XS_SELTIMEOUT;
    546       1.31   bouyer 				freetarget = 1;
    547        1.1   bouyer 				goto end;
    548        1.1   bouyer 			} else {
    549        1.1   bouyer 				printf("%s: selection timeout without "
    550   1.40.2.9  nathanw 				    "command\n", sc->sc_c.sc_dev.dv_xname);
    551        1.1   bouyer 				need_reset = 1;
    552        1.1   bouyer 			}
    553        1.1   bouyer 		}
    554       1.35   bouyer 		if (sist & SIST0_UDC) {
    555        1.1   bouyer 			/*
    556        1.1   bouyer 			 * unexpected disconnect. Usually the target signals
    557        1.1   bouyer 			 * a fatal condition this way. Attempt to get sense.
    558        1.1   bouyer 			 */
    559       1.36   bouyer 			 if (siop_cmd) {
    560   1.40.2.9  nathanw 				siop_cmd->cmd_tables->status =
    561       1.36   bouyer 				    htole32(SCSI_CHECK);
    562       1.36   bouyer 				goto end;
    563       1.36   bouyer 			}
    564        1.1   bouyer 			printf("%s: unexpected disconnect without "
    565   1.40.2.9  nathanw 			    "command\n", sc->sc_c.sc_dev.dv_xname);
    566        1.2   bouyer 			goto reset;
    567        1.1   bouyer 		}
    568       1.35   bouyer 		if (sist & (SIST1_SBMC << 8)) {
    569       1.20   bouyer 			/* SCSI bus mode change */
    570   1.40.2.9  nathanw 			if (siop_modechange(&sc->sc_c) == 0 || need_reset == 1)
    571       1.20   bouyer 				goto reset;
    572       1.20   bouyer 			if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) {
    573       1.20   bouyer 				/*
    574       1.20   bouyer 				 * we have a script interrupt, it will
    575       1.20   bouyer 				 * restart the script.
    576       1.20   bouyer 				 */
    577       1.20   bouyer 				goto scintr;
    578       1.20   bouyer 			}
    579       1.20   bouyer 			/*
    580       1.20   bouyer 			 * else we have to restart it ourselve, at the
    581       1.20   bouyer 			 * interrupted instruction.
    582       1.20   bouyer 			 */
    583   1.40.2.9  nathanw 			bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    584   1.40.2.9  nathanw 			    SIOP_DSP,
    585   1.40.2.9  nathanw 			    bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    586       1.20   bouyer 			    SIOP_DSP) - 8);
    587       1.20   bouyer 			return 1;
    588       1.20   bouyer 		}
    589        1.1   bouyer 		/* Else it's an unhandled exeption (for now). */
    590       1.35   bouyer 		printf("%s: unhandled scsi interrupt, sist=0x%x sstat1=0x%x "
    591   1.40.2.9  nathanw 		    "DSA=0x%x DSP=0x%x\n", sc->sc_c.sc_dev.dv_xname, sist,
    592   1.40.2.9  nathanw 		    bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    593   1.40.2.9  nathanw 			SIOP_SSTAT1),
    594   1.40.2.9  nathanw 		    bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh, SIOP_DSA),
    595   1.40.2.9  nathanw 		    (int)(bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    596   1.40.2.9  nathanw 			SIOP_DSP) - sc->sc_c.sc_scriptaddr));
    597        1.1   bouyer 		if (siop_cmd) {
    598   1.40.2.9  nathanw 			siop_cmd->cmd_c.status = CMDST_DONE;
    599        1.1   bouyer 			xs->error = XS_SELTIMEOUT;
    600        1.1   bouyer 			goto end;
    601        1.1   bouyer 		}
    602        1.1   bouyer 		need_reset = 1;
    603        1.1   bouyer 	}
    604        1.1   bouyer 	if (need_reset) {
    605        1.1   bouyer reset:
    606        1.1   bouyer 		/* fatal error, reset the bus */
    607   1.40.2.9  nathanw 		siop_resetbus(&sc->sc_c);
    608        1.2   bouyer 		/* no table to flush here */
    609        1.1   bouyer 		return 1;
    610        1.1   bouyer 	}
    611        1.1   bouyer 
    612       1.20   bouyer scintr:
    613        1.1   bouyer 	if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */
    614   1.40.2.9  nathanw 		irqcode = bus_space_read_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    615        1.1   bouyer 		    SIOP_DSPS);
    616       1.35   bouyer #ifdef SIOP_DEBUG_INTR
    617        1.2   bouyer 		printf("script interrupt 0x%x\n", irqcode);
    618        1.2   bouyer #endif
    619        1.2   bouyer 		/*
    620       1.31   bouyer 		 * no command, or an inactive command is only valid for a
    621       1.31   bouyer 		 * reselect interrupt
    622        1.2   bouyer 		 */
    623       1.31   bouyer 		if ((irqcode & 0x80) == 0) {
    624       1.31   bouyer 			if (siop_cmd == NULL) {
    625   1.40.2.2  nathanw 				printf(
    626   1.40.2.2  nathanw 			"%s: script interrupt (0x%x) with invalid DSA !!!\n",
    627   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname, irqcode);
    628       1.31   bouyer 				goto reset;
    629       1.31   bouyer 			}
    630   1.40.2.9  nathanw 			if (siop_cmd->cmd_c.status != CMDST_ACTIVE) {
    631       1.31   bouyer 				printf("%s: command with invalid status "
    632       1.31   bouyer 				    "(IRQ code 0x%x current status %d) !\n",
    633   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname,
    634   1.40.2.9  nathanw 				    irqcode, siop_cmd->cmd_c.status);
    635       1.31   bouyer 				xs = NULL;
    636       1.31   bouyer 			}
    637        1.7   bouyer 		}
    638        1.1   bouyer 		switch(irqcode) {
    639        1.1   bouyer 		case A_int_err:
    640        1.2   bouyer 			printf("error, DSP=0x%x\n",
    641   1.40.2.9  nathanw 			    (int)(bus_space_read_4(sc->sc_c.sc_rt,
    642   1.40.2.9  nathanw 			    sc->sc_c.sc_rh, SIOP_DSP) - sc->sc_c.sc_scriptaddr));
    643        1.2   bouyer 			if (xs) {
    644        1.2   bouyer 				xs->error = XS_SELTIMEOUT;
    645        1.2   bouyer 				goto end;
    646        1.2   bouyer 			} else {
    647        1.2   bouyer 				goto reset;
    648        1.2   bouyer 			}
    649       1.31   bouyer 		case A_int_reseltarg:
    650       1.31   bouyer 			printf("%s: reselect with invalid target\n",
    651   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname);
    652       1.31   bouyer 			goto reset;
    653       1.35   bouyer 		case A_int_resellun:
    654       1.35   bouyer 			INCSTAT(siop_stat_intr_lunresel);
    655   1.40.2.9  nathanw 			target = bus_space_read_1(sc->sc_c.sc_rt,
    656   1.40.2.9  nathanw 			    sc->sc_c.sc_rh, SIOP_SCRATCHA) & 0xf;
    657   1.40.2.9  nathanw 			lun = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    658       1.35   bouyer 			    SIOP_SCRATCHA + 1);
    659   1.40.2.9  nathanw 			tag = bus_space_read_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    660       1.35   bouyer 			    SIOP_SCRATCHA + 2);
    661   1.40.2.9  nathanw 			siop_target =
    662   1.40.2.9  nathanw 			    (struct siop_target *)sc->sc_c.targets[target];
    663       1.35   bouyer 			if (siop_target == NULL) {
    664   1.40.2.9  nathanw 				printf("%s: reselect with invalid target %d\n",
    665   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname, target);
    666       1.35   bouyer 				goto reset;
    667       1.35   bouyer 			}
    668       1.35   bouyer 			siop_lun = siop_target->siop_lun[lun];
    669       1.35   bouyer 			if (siop_lun == NULL) {
    670       1.35   bouyer 				printf("%s: target %d reselect with invalid "
    671   1.40.2.9  nathanw 				    "lun %d\n", sc->sc_c.sc_dev.dv_xname,
    672       1.35   bouyer 				    target, lun);
    673       1.35   bouyer 				goto reset;
    674       1.35   bouyer 			}
    675       1.35   bouyer 			if (siop_lun->siop_tag[tag].active == NULL) {
    676       1.35   bouyer 				printf("%s: target %d lun %d tag %d reselect "
    677   1.40.2.9  nathanw 				    "without command\n",
    678   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname,
    679       1.35   bouyer 				    target, lun, tag);
    680       1.35   bouyer 				goto reset;
    681       1.35   bouyer 			}
    682       1.35   bouyer 			siop_cmd = siop_lun->siop_tag[tag].active;
    683   1.40.2.9  nathanw 			bus_space_write_4(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
    684   1.40.2.9  nathanw 			    SIOP_DSP, siop_cmd->cmd_c.dsa +
    685   1.40.2.9  nathanw 			    sizeof(struct siop_common_xfer) +
    686       1.35   bouyer 			    Ent_ldsa_reload_dsa);
    687       1.38   bouyer 			siop_table_sync(siop_cmd, BUS_DMASYNC_PREWRITE);
    688       1.35   bouyer 			return 1;
    689       1.31   bouyer 		case A_int_reseltag:
    690       1.31   bouyer 			printf("%s: reselect with invalid tag\n",
    691   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname);
    692       1.31   bouyer 			goto reset;
    693        1.1   bouyer 		case A_int_msgin:
    694       1.31   bouyer 		{
    695   1.40.2.9  nathanw 			int msgin = bus_space_read_1(sc->sc_c.sc_rt,
    696   1.40.2.9  nathanw 			    sc->sc_c.sc_rh, SIOP_SFBR);
    697       1.31   bouyer 			if (msgin == MSG_MESSAGE_REJECT) {
    698        1.8   bouyer 				int msg, extmsg;
    699   1.40.2.9  nathanw 				if (siop_cmd->cmd_tables->msg_out[0] & 0x80) {
    700        1.8   bouyer 					/*
    701        1.8   bouyer 					 * message was part of a identify +
    702  1.40.2.10  nathanw 					 * something else. Identify shouldn't
    703        1.8   bouyer 					 * have been rejected.
    704        1.8   bouyer 					 */
    705   1.40.2.9  nathanw 					msg =
    706   1.40.2.9  nathanw 					    siop_cmd->cmd_tables->msg_out[1];
    707        1.8   bouyer 					extmsg =
    708   1.40.2.9  nathanw 					    siop_cmd->cmd_tables->msg_out[3];
    709        1.8   bouyer 				} else {
    710   1.40.2.9  nathanw 					msg = siop_cmd->cmd_tables->msg_out[0];
    711        1.8   bouyer 					extmsg =
    712   1.40.2.9  nathanw 					    siop_cmd->cmd_tables->msg_out[2];
    713        1.8   bouyer 				}
    714        1.8   bouyer 				if (msg == MSG_MESSAGE_REJECT) {
    715        1.2   bouyer 					/* MSG_REJECT  for a MSG_REJECT  !*/
    716        1.9   bouyer 					if (xs)
    717   1.40.2.2  nathanw 						scsipi_printaddr(xs->xs_periph);
    718        1.9   bouyer 					else
    719        1.9   bouyer 						printf("%s: ",
    720   1.40.2.9  nathanw 						   sc->sc_c.sc_dev.dv_xname);
    721        1.9   bouyer 					printf("our reject message was "
    722        1.9   bouyer 					    "rejected\n");
    723        1.2   bouyer 					goto reset;
    724        1.2   bouyer 				}
    725        1.8   bouyer 				if (msg == MSG_EXTENDED &&
    726        1.8   bouyer 				    extmsg == MSG_EXT_WDTR) {
    727        1.9   bouyer 					/* WDTR rejected, initiate sync */
    728   1.40.2.9  nathanw 					if ((siop_target->target_c.flags &
    729   1.40.2.9  nathanw 					   TARF_SYNC) == 0) {
    730   1.40.2.9  nathanw 						siop_target->target_c.status =
    731   1.40.2.9  nathanw 						    TARST_OK;
    732   1.40.2.9  nathanw 						siop_update_xfer_mode(&sc->sc_c,
    733   1.40.2.2  nathanw 						    target);
    734       1.26   bouyer 						/* no table to flush here */
    735       1.26   bouyer 						CALL_SCRIPT(Ent_msgin_ack);
    736       1.26   bouyer 						return 1;
    737       1.26   bouyer 					}
    738   1.40.2.9  nathanw 					siop_target->target_c.status =
    739   1.40.2.9  nathanw 					    TARST_SYNC_NEG;
    740   1.40.2.9  nathanw 					siop_sdtr_msg(&siop_cmd->cmd_c, 0,
    741   1.40.2.9  nathanw 					    sc->sc_c.st_minsync,
    742   1.40.2.9  nathanw 					    sc->sc_c.maxoff);
    743        1.9   bouyer 					siop_table_sync(siop_cmd,
    744        1.9   bouyer 					    BUS_DMASYNC_PREREAD |
    745        1.9   bouyer 					    BUS_DMASYNC_PREWRITE);
    746        1.9   bouyer 					CALL_SCRIPT(Ent_send_msgout);
    747        1.9   bouyer 					return 1;
    748        1.8   bouyer 				} else if (msg == MSG_EXTENDED &&
    749        1.8   bouyer 				    extmsg == MSG_EXT_SDTR) {
    750        1.7   bouyer 					/* sync rejected */
    751   1.40.2.9  nathanw 					siop_target->target_c.offset = 0;
    752   1.40.2.9  nathanw 					siop_target->target_c.period = 0;
    753   1.40.2.9  nathanw 					siop_target->target_c.status = TARST_OK;
    754   1.40.2.9  nathanw 					siop_update_xfer_mode(&sc->sc_c,
    755   1.40.2.9  nathanw 					    target);
    756        1.9   bouyer 					/* no table to flush here */
    757        1.9   bouyer 					CALL_SCRIPT(Ent_msgin_ack);
    758        1.9   bouyer 					return 1;
    759       1.35   bouyer 				} else if (msg == MSG_SIMPLE_Q_TAG ||
    760       1.35   bouyer 				    msg == MSG_HEAD_OF_Q_TAG ||
    761       1.35   bouyer 				    msg == MSG_ORDERED_Q_TAG) {
    762       1.35   bouyer 					if (siop_handle_qtag_reject(
    763       1.35   bouyer 					    siop_cmd) == -1)
    764       1.35   bouyer 						goto reset;
    765       1.35   bouyer 					CALL_SCRIPT(Ent_msgin_ack);
    766       1.35   bouyer 					return 1;
    767        1.9   bouyer 				}
    768        1.9   bouyer 				if (xs)
    769   1.40.2.2  nathanw 					scsipi_printaddr(xs->xs_periph);
    770        1.9   bouyer 				else
    771   1.40.2.9  nathanw 					printf("%s: ",
    772   1.40.2.9  nathanw 					    sc->sc_c.sc_dev.dv_xname);
    773        1.9   bouyer 				if (msg == MSG_EXTENDED) {
    774        1.9   bouyer 					printf("scsi message reject, extended "
    775        1.9   bouyer 					    "message sent was 0x%x\n", extmsg);
    776        1.9   bouyer 				} else {
    777        1.9   bouyer 					printf("scsi message reject, message "
    778        1.9   bouyer 					    "sent was 0x%x\n", msg);
    779        1.7   bouyer 				}
    780        1.2   bouyer 				/* no table to flush here */
    781        1.2   bouyer 				CALL_SCRIPT(Ent_msgin_ack);
    782        1.2   bouyer 				return 1;
    783        1.2   bouyer 			}
    784        1.9   bouyer 			if (xs)
    785   1.40.2.2  nathanw 				scsipi_printaddr(xs->xs_periph);
    786        1.9   bouyer 			else
    787   1.40.2.9  nathanw 				printf("%s: ", sc->sc_c.sc_dev.dv_xname);
    788        1.8   bouyer 			printf("unhandled message 0x%x\n",
    789   1.40.2.9  nathanw 			    siop_cmd->cmd_tables->msg_in[0]);
    790   1.40.2.9  nathanw 			siop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT;
    791   1.40.2.9  nathanw 			siop_cmd->cmd_tables->t_msgout.count= htole32(1);
    792        1.2   bouyer 			siop_table_sync(siop_cmd,
    793        1.2   bouyer 			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    794        1.2   bouyer 			CALL_SCRIPT(Ent_send_msgout);
    795        1.2   bouyer 			return 1;
    796       1.31   bouyer 		}
    797        1.2   bouyer 		case A_int_extmsgin:
    798       1.35   bouyer #ifdef SIOP_DEBUG_INTR
    799        1.2   bouyer 			printf("extended message: msg 0x%x len %d\n",
    800   1.40.2.9  nathanw 			    siop_cmd->cmd_tables->msg_in[2],
    801   1.40.2.9  nathanw 			    siop_cmd->cmd_tables->msg_in[1]);
    802        1.2   bouyer #endif
    803   1.40.2.9  nathanw 			if (siop_cmd->cmd_tables->msg_in[1] >
    804   1.40.2.9  nathanw 			    sizeof(siop_cmd->cmd_tables->msg_in) - 2)
    805        1.8   bouyer 				printf("%s: extended message too big (%d)\n",
    806   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname,
    807   1.40.2.9  nathanw 				    siop_cmd->cmd_tables->msg_in[1]);
    808   1.40.2.9  nathanw 			siop_cmd->cmd_tables->t_extmsgdata.count =
    809   1.40.2.9  nathanw 			    htole32(siop_cmd->cmd_tables->msg_in[1] - 1);
    810        1.2   bouyer 			siop_table_sync(siop_cmd,
    811        1.2   bouyer 			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    812        1.2   bouyer 			CALL_SCRIPT(Ent_get_extmsgdata);
    813        1.2   bouyer 			return 1;
    814        1.2   bouyer 		case A_int_extmsgdata:
    815       1.35   bouyer #ifdef SIOP_DEBUG_INTR
    816        1.2   bouyer 			{
    817        1.2   bouyer 			int i;
    818        1.2   bouyer 			printf("extended message: 0x%x, data:",
    819   1.40.2.9  nathanw 			    siop_cmd->cmd_tables->msg_in[2]);
    820   1.40.2.9  nathanw 			for (i = 3; i < 2 + siop_cmd->cmd_tables->msg_in[1];
    821        1.2   bouyer 			    i++)
    822        1.2   bouyer 				printf(" 0x%x",
    823   1.40.2.9  nathanw 				    siop_cmd->cmd_tables->msg_in[i]);
    824        1.2   bouyer 			printf("\n");
    825        1.2   bouyer 			}
    826        1.2   bouyer #endif
    827   1.40.2.9  nathanw 			if (siop_cmd->cmd_tables->msg_in[2] == MSG_EXT_WDTR) {
    828   1.40.2.9  nathanw 				switch (siop_wdtr_neg(&siop_cmd->cmd_c)) {
    829       1.14   bouyer 				case SIOP_NEG_MSGOUT:
    830       1.31   bouyer 					siop_update_scntl3(sc,
    831   1.40.2.9  nathanw 					    siop_cmd->cmd_c.siop_target);
    832       1.14   bouyer 					siop_table_sync(siop_cmd,
    833       1.14   bouyer 					    BUS_DMASYNC_PREREAD |
    834       1.14   bouyer 					    BUS_DMASYNC_PREWRITE);
    835       1.14   bouyer 					CALL_SCRIPT(Ent_send_msgout);
    836       1.31   bouyer 					return(1);
    837       1.26   bouyer 				case SIOP_NEG_ACK:
    838       1.31   bouyer 					siop_update_scntl3(sc,
    839   1.40.2.9  nathanw 					    siop_cmd->cmd_c.siop_target);
    840       1.26   bouyer 					CALL_SCRIPT(Ent_msgin_ack);
    841       1.31   bouyer 					return(1);
    842       1.14   bouyer 				default:
    843       1.14   bouyer 					panic("invalid retval from "
    844       1.14   bouyer 					    "siop_wdtr_neg()");
    845       1.14   bouyer 				}
    846        1.7   bouyer 				return(1);
    847        1.7   bouyer 			}
    848   1.40.2.9  nathanw 			if (siop_cmd->cmd_tables->msg_in[2] == MSG_EXT_SDTR) {
    849   1.40.2.9  nathanw 				switch (siop_sdtr_neg(&siop_cmd->cmd_c)) {
    850       1.14   bouyer 				case SIOP_NEG_MSGOUT:
    851       1.31   bouyer 					siop_update_scntl3(sc,
    852   1.40.2.9  nathanw 					    siop_cmd->cmd_c.siop_target);
    853       1.14   bouyer 					siop_table_sync(siop_cmd,
    854       1.14   bouyer 					    BUS_DMASYNC_PREREAD |
    855       1.14   bouyer 					    BUS_DMASYNC_PREWRITE);
    856       1.14   bouyer 					CALL_SCRIPT(Ent_send_msgout);
    857       1.31   bouyer 					return(1);
    858       1.14   bouyer 				case SIOP_NEG_ACK:
    859       1.31   bouyer 					siop_update_scntl3(sc,
    860   1.40.2.9  nathanw 					    siop_cmd->cmd_c.siop_target);
    861       1.14   bouyer 					CALL_SCRIPT(Ent_msgin_ack);
    862       1.31   bouyer 					return(1);
    863       1.14   bouyer 				default:
    864       1.14   bouyer 					panic("invalid retval from "
    865       1.14   bouyer 					    "siop_wdtr_neg()");
    866       1.14   bouyer 				}
    867        1.7   bouyer 				return(1);
    868        1.2   bouyer 			}
    869        1.7   bouyer 			/* send a message reject */
    870   1.40.2.9  nathanw 			siop_cmd->cmd_tables->msg_out[0] = MSG_MESSAGE_REJECT;
    871   1.40.2.9  nathanw 			siop_cmd->cmd_tables->t_msgout.count = htole32(1);
    872        1.2   bouyer 			siop_table_sync(siop_cmd,
    873        1.2   bouyer 			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    874        1.2   bouyer 			CALL_SCRIPT(Ent_send_msgout);
    875        1.2   bouyer 			return 1;
    876        1.1   bouyer 		case A_int_disc:
    877        1.2   bouyer 			INCSTAT(siop_stat_intr_sdp);
    878   1.40.2.9  nathanw 			offset = bus_space_read_1(sc->sc_c.sc_rt,
    879   1.40.2.9  nathanw 			    sc->sc_c.sc_rh, SIOP_SCRATCHA + 1);
    880       1.35   bouyer #ifdef SIOP_DEBUG_DR
    881        1.1   bouyer 			printf("disconnect offset %d\n", offset);
    882        1.1   bouyer #endif
    883        1.1   bouyer 			if (offset > SIOP_NSG) {
    884        1.1   bouyer 				printf("%s: bad offset for disconnect (%d)\n",
    885   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname, offset);
    886        1.1   bouyer 				goto reset;
    887        1.1   bouyer 			}
    888        1.1   bouyer 			/*
    889        1.1   bouyer 			 * offset == SIOP_NSG may be a valid condition if
    890        1.1   bouyer 			 * we get a sdp when the xfer is done.
    891        1.1   bouyer 			 * Don't call memmove in this case.
    892        1.1   bouyer 			 */
    893        1.1   bouyer 			if (offset < SIOP_NSG) {
    894   1.40.2.9  nathanw 				memmove(&siop_cmd->cmd_tables->data[0],
    895   1.40.2.9  nathanw 				    &siop_cmd->cmd_tables->data[offset],
    896        1.1   bouyer 				    (SIOP_NSG - offset) * sizeof(scr_table_t));
    897        1.2   bouyer 				siop_table_sync(siop_cmd,
    898        1.2   bouyer 				    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    899        1.1   bouyer 			}
    900       1.31   bouyer 			CALL_SCRIPT(Ent_script_sched);
    901        1.1   bouyer 			return 1;
    902        1.1   bouyer 		case A_int_resfail:
    903        1.1   bouyer 			printf("reselect failed\n");
    904       1.31   bouyer 			CALL_SCRIPT(Ent_script_sched);
    905        1.1   bouyer 			return  1;
    906        1.1   bouyer 		case A_int_done:
    907        1.2   bouyer 			if (xs == NULL) {
    908        1.8   bouyer 				printf("%s: done without command, DSA=0x%lx\n",
    909   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname,
    910   1.40.2.9  nathanw 				    (u_long)siop_cmd->cmd_c.dsa);
    911   1.40.2.9  nathanw 				siop_cmd->cmd_c.status = CMDST_FREE;
    912       1.31   bouyer 				CALL_SCRIPT(Ent_script_sched);
    913        1.2   bouyer 				return 1;
    914        1.2   bouyer 			}
    915       1.35   bouyer #ifdef SIOP_DEBUG_INTR
    916        1.8   bouyer 			printf("done, DSA=0x%lx target id 0x%x last msg "
    917   1.40.2.9  nathanw 			    "in=0x%x status=0x%x\n", (u_long)siop_cmd->cmd_c.dsa,
    918   1.40.2.9  nathanw 			    le32toh(siop_cmd->cmd_tables->id),
    919   1.40.2.9  nathanw 			    siop_cmd->cmd_tables->msg_in[0],
    920   1.40.2.9  nathanw 			    le32toh(siop_cmd->cmd_tables->status));
    921        1.1   bouyer #endif
    922        1.2   bouyer 			INCSTAT(siop_stat_intr_done);
    923   1.40.2.9  nathanw 			siop_cmd->cmd_c.status = CMDST_DONE;
    924        1.1   bouyer 			goto end;
    925        1.1   bouyer 		default:
    926        1.1   bouyer 			printf("unknown irqcode %x\n", irqcode);
    927       1.35   bouyer 			if (xs) {
    928       1.35   bouyer 				xs->error = XS_SELTIMEOUT;
    929       1.35   bouyer 				goto end;
    930       1.35   bouyer 			}
    931       1.35   bouyer 			goto reset;
    932        1.1   bouyer 		}
    933        1.1   bouyer 		return 1;
    934        1.1   bouyer 	}
    935        1.2   bouyer 	/* We just should't get there */
    936        1.2   bouyer 	panic("siop_intr: I shouldn't be there !");
    937        1.2   bouyer 	return 1;
    938        1.1   bouyer end:
    939       1.39   bouyer 	/*
    940       1.39   bouyer 	 * restart the script now if command completed properly
    941   1.40.2.2  nathanw 	 * Otherwise wait for siop_scsicmd_end(), we may need to cleanup the
    942   1.40.2.2  nathanw 	 * queue
    943       1.39   bouyer 	 */
    944   1.40.2.9  nathanw 	xs->status = le32toh(siop_cmd->cmd_tables->status);
    945   1.40.2.2  nathanw 	if (xs->status == SCSI_OK)
    946       1.39   bouyer 		CALL_SCRIPT(Ent_script_sched);
    947       1.39   bouyer 	else
    948       1.39   bouyer 		restart = 1;
    949       1.35   bouyer 	siop_lun->siop_tag[tag].active = NULL;
    950   1.40.2.2  nathanw 	siop_scsicmd_end(siop_cmd);
    951   1.40.2.9  nathanw 	if (freetarget && siop_target->target_c.status == TARST_PROBING)
    952   1.40.2.2  nathanw 		siop_del_dev(sc, target, lun);
    953       1.39   bouyer 	if (restart)
    954       1.39   bouyer 		CALL_SCRIPT(Ent_script_sched);
    955   1.40.2.2  nathanw 	if (sc->sc_flags & SCF_CHAN_NOSLOT) {
    956   1.40.2.2  nathanw 		/* a command terminated, so we have free slots now */
    957   1.40.2.2  nathanw 		sc->sc_flags &= ~SCF_CHAN_NOSLOT;
    958   1.40.2.9  nathanw 		scsipi_channel_thaw(&sc->sc_c.sc_chan, 1);
    959   1.40.2.2  nathanw 	}
    960   1.40.2.2  nathanw 
    961        1.2   bouyer 	return 1;
    962        1.2   bouyer }
    963        1.2   bouyer 
    964        1.2   bouyer void
    965        1.2   bouyer siop_scsicmd_end(siop_cmd)
    966        1.2   bouyer 	struct siop_cmd *siop_cmd;
    967        1.2   bouyer {
    968   1.40.2.9  nathanw 	struct scsipi_xfer *xs = siop_cmd->cmd_c.xs;
    969   1.40.2.9  nathanw 	struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc;
    970        1.2   bouyer 
    971   1.40.2.2  nathanw 	switch(xs->status) {
    972       1.36   bouyer 	case SCSI_OK:
    973   1.40.2.2  nathanw 		xs->error = XS_NOERROR;
    974       1.36   bouyer 		break;
    975       1.36   bouyer 	case SCSI_BUSY:
    976       1.36   bouyer 		xs->error = XS_BUSY;
    977       1.36   bouyer 		break;
    978       1.36   bouyer 	case SCSI_CHECK:
    979   1.40.2.2  nathanw 		xs->error = XS_BUSY;
    980   1.40.2.2  nathanw 		/* remove commands in the queue and scheduler */
    981   1.40.2.2  nathanw 		siop_unqueue(sc, xs->xs_periph->periph_target,
    982   1.40.2.2  nathanw 		    xs->xs_periph->periph_lun);
    983       1.36   bouyer 		break;
    984       1.36   bouyer 	case SCSI_QUEUE_FULL:
    985       1.36   bouyer 		INCSTAT(siop_stat_intr_qfull);
    986       1.36   bouyer #ifdef SIOP_DEBUG
    987   1.40.2.9  nathanw 		printf("%s:%d:%d: queue full (tag %d)\n",
    988   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname,
    989   1.40.2.2  nathanw 		    xs->xs_periph->periph_target,
    990   1.40.2.9  nathanw 		    xs->xs_periph->periph_lun, siop_cmd->cmd_c.tag);
    991       1.36   bouyer #endif
    992   1.40.2.2  nathanw 		xs->error = XS_BUSY;
    993   1.40.2.2  nathanw 		break;
    994       1.36   bouyer 	case SCSI_SIOP_NOCHECK:
    995       1.36   bouyer 		/*
    996       1.36   bouyer 		 * don't check status, xs->error is already valid
    997       1.36   bouyer 		 */
    998       1.36   bouyer 		break;
    999       1.36   bouyer 	case SCSI_SIOP_NOSTATUS:
   1000       1.36   bouyer 		/*
   1001       1.36   bouyer 		 * the status byte was not updated, cmd was
   1002       1.36   bouyer 		 * aborted
   1003       1.36   bouyer 		 */
   1004       1.36   bouyer 		xs->error = XS_SELTIMEOUT;
   1005       1.36   bouyer 		break;
   1006       1.36   bouyer 	default:
   1007   1.40.2.9  nathanw 		scsipi_printaddr(xs->xs_periph);
   1008   1.40.2.9  nathanw 		printf("invalid status code %d\n", xs->status);
   1009       1.36   bouyer 		xs->error = XS_DRIVER_STUFFUP;
   1010       1.36   bouyer 	}
   1011   1.40.2.2  nathanw 	if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
   1012   1.40.2.9  nathanw 		bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data, 0,
   1013   1.40.2.9  nathanw 		    siop_cmd->cmd_c.dmamap_data->dm_mapsize,
   1014        1.1   bouyer 		    (xs->xs_control & XS_CTL_DATA_IN) ?
   1015        1.1   bouyer 		    BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
   1016   1.40.2.9  nathanw 		bus_dmamap_unload(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_data);
   1017        1.1   bouyer 	}
   1018   1.40.2.9  nathanw 	bus_dmamap_unload(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_cmd);
   1019   1.40.2.9  nathanw 	callout_stop(&siop_cmd->cmd_c.xs->xs_callout);
   1020   1.40.2.9  nathanw 	siop_cmd->cmd_c.status = CMDST_FREE;
   1021   1.40.2.2  nathanw 	TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next);
   1022        1.1   bouyer 	xs->resid = 0;
   1023   1.40.2.2  nathanw 	scsipi_done (xs);
   1024   1.40.2.2  nathanw }
   1025   1.40.2.2  nathanw 
   1026   1.40.2.2  nathanw void
   1027   1.40.2.2  nathanw siop_unqueue(sc, target, lun)
   1028   1.40.2.2  nathanw 	struct siop_softc *sc;
   1029   1.40.2.2  nathanw 	int target;
   1030   1.40.2.2  nathanw 	int lun;
   1031   1.40.2.2  nathanw {
   1032   1.40.2.2  nathanw  	int slot, tag;
   1033   1.40.2.2  nathanw 	struct siop_cmd *siop_cmd;
   1034   1.40.2.9  nathanw 	struct siop_lun *siop_lun =
   1035   1.40.2.9  nathanw 	    ((struct siop_target *)sc->sc_c.targets[target])->siop_lun[lun];
   1036   1.40.2.2  nathanw 
   1037   1.40.2.2  nathanw 	/* first make sure to read valid data */
   1038   1.40.2.2  nathanw 	siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
   1039   1.40.2.2  nathanw 
   1040   1.40.2.2  nathanw 	for (tag = 1; tag < SIOP_NTAG; tag++) {
   1041   1.40.2.2  nathanw 		/* look for commands in the scheduler, not yet started */
   1042   1.40.2.2  nathanw 		if (siop_lun->siop_tag[tag].active == NULL)
   1043   1.40.2.2  nathanw 			continue;
   1044   1.40.2.2  nathanw 		siop_cmd = siop_lun->siop_tag[tag].active;
   1045   1.40.2.2  nathanw 		for (slot = 0; slot <= sc->sc_currschedslot; slot++) {
   1046   1.40.2.2  nathanw 			if (siop_script_read(sc,
   1047   1.40.2.2  nathanw 			    (Ent_script_sched_slot0 / 4) + slot * 2 + 1) ==
   1048   1.40.2.9  nathanw 			    siop_cmd->cmd_c.dsa +
   1049   1.40.2.9  nathanw 			    sizeof(struct siop_common_xfer) +
   1050   1.40.2.2  nathanw 			    Ent_ldsa_select)
   1051   1.40.2.2  nathanw 				break;
   1052   1.40.2.2  nathanw 		}
   1053   1.40.2.2  nathanw 		if (slot >  sc->sc_currschedslot)
   1054   1.40.2.2  nathanw 			continue; /* didn't find it */
   1055   1.40.2.2  nathanw 		if (siop_script_read(sc,
   1056   1.40.2.2  nathanw 		    (Ent_script_sched_slot0 / 4) + slot * 2) == 0x80000000)
   1057   1.40.2.2  nathanw 			continue; /* already started */
   1058   1.40.2.2  nathanw 		/* clear the slot */
   1059   1.40.2.2  nathanw 		siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2,
   1060   1.40.2.2  nathanw 		    0x80000000);
   1061   1.40.2.2  nathanw 		/* ask to requeue */
   1062   1.40.2.9  nathanw 		siop_cmd->cmd_c.xs->error = XS_REQUEUE;
   1063   1.40.2.9  nathanw 		siop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK;
   1064   1.40.2.2  nathanw 		siop_lun->siop_tag[tag].active = NULL;
   1065   1.40.2.2  nathanw 		siop_scsicmd_end(siop_cmd);
   1066   1.40.2.2  nathanw 	}
   1067   1.40.2.2  nathanw 	/* update sc_currschedslot */
   1068   1.40.2.2  nathanw 	sc->sc_currschedslot = 0;
   1069   1.40.2.2  nathanw 	for (slot = SIOP_NSLOTS - 1; slot >= 0; slot--) {
   1070   1.40.2.2  nathanw 		if (siop_script_read(sc,
   1071   1.40.2.2  nathanw 		    (Ent_script_sched_slot0 / 4) + slot * 2) != 0x80000000)
   1072   1.40.2.2  nathanw 			sc->sc_currschedslot = slot;
   1073   1.40.2.2  nathanw 	}
   1074        1.7   bouyer }
   1075        1.7   bouyer 
   1076        1.2   bouyer /*
   1077       1.31   bouyer  * handle a rejected queue tag message: the command will run untagged,
   1078       1.31   bouyer  * has to adjust the reselect script.
   1079       1.31   bouyer  */
   1080       1.31   bouyer int
   1081       1.31   bouyer siop_handle_qtag_reject(siop_cmd)
   1082       1.31   bouyer 	struct siop_cmd *siop_cmd;
   1083       1.31   bouyer {
   1084   1.40.2.9  nathanw 	struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc;
   1085   1.40.2.9  nathanw 	int target = siop_cmd->cmd_c.xs->xs_periph->periph_target;
   1086   1.40.2.9  nathanw 	int lun = siop_cmd->cmd_c.xs->xs_periph->periph_lun;
   1087   1.40.2.9  nathanw 	int tag = siop_cmd->cmd_tables->msg_out[2];
   1088   1.40.2.9  nathanw 	struct siop_lun *siop_lun =
   1089   1.40.2.9  nathanw 	    ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun];
   1090       1.31   bouyer 
   1091       1.36   bouyer #ifdef SIOP_DEBUG
   1092       1.36   bouyer 	printf("%s:%d:%d: tag message %d (%d) rejected (status %d)\n",
   1093   1.40.2.9  nathanw 	    sc->sc_c.sc_dev.dv_xname, target, lun, tag, siop_cmd->cmd_c.tag,
   1094   1.40.2.9  nathanw 	    siop_cmd->cmd_c.status);
   1095       1.36   bouyer #endif
   1096       1.36   bouyer 
   1097       1.35   bouyer 	if (siop_lun->siop_tag[0].active != NULL) {
   1098       1.36   bouyer 		printf("%s: untagged command already running for target %d "
   1099   1.40.2.9  nathanw 		    "lun %d (status %d)\n", sc->sc_c.sc_dev.dv_xname,
   1100   1.40.2.9  nathanw 		    target, lun, siop_lun->siop_tag[0].active->cmd_c.status);
   1101       1.35   bouyer 		return -1;
   1102       1.35   bouyer 	}
   1103       1.35   bouyer 	/* clear tag slot */
   1104       1.35   bouyer 	siop_lun->siop_tag[tag].active = NULL;
   1105       1.35   bouyer 	/* add command to non-tagged slot */
   1106       1.35   bouyer 	siop_lun->siop_tag[0].active = siop_cmd;
   1107   1.40.2.9  nathanw 	siop_cmd->cmd_c.tag = 0;
   1108       1.35   bouyer 	/* adjust reselect script if there is one */
   1109       1.35   bouyer 	if (siop_lun->siop_tag[0].reseloff > 0) {
   1110       1.35   bouyer 		siop_script_write(sc,
   1111       1.35   bouyer 		    siop_lun->siop_tag[0].reseloff + 1,
   1112   1.40.2.9  nathanw 		    siop_cmd->cmd_c.dsa + sizeof(struct siop_common_xfer) +
   1113       1.35   bouyer 		    Ent_ldsa_reload_dsa);
   1114       1.38   bouyer 		siop_table_sync(siop_cmd, BUS_DMASYNC_PREWRITE);
   1115       1.35   bouyer 	}
   1116       1.31   bouyer 	return 0;
   1117       1.31   bouyer }
   1118       1.31   bouyer 
   1119       1.31   bouyer /*
   1120       1.31   bouyer  * handle a bus reset: reset chip, unqueue all active commands, free all
   1121       1.31   bouyer  * target struct and report loosage to upper layer.
   1122        1.2   bouyer  * As the upper layer may requeue immediatly we have to first store
   1123        1.2   bouyer  * all active commands in a temporary queue.
   1124        1.2   bouyer  */
   1125        1.2   bouyer void
   1126        1.2   bouyer siop_handle_reset(sc)
   1127        1.2   bouyer 	struct siop_softc *sc;
   1128        1.2   bouyer {
   1129   1.40.2.2  nathanw 	struct siop_cmd *siop_cmd;
   1130       1.31   bouyer 	struct siop_lun *siop_lun;
   1131       1.35   bouyer 	int target, lun, tag;
   1132        1.2   bouyer 	/*
   1133        1.2   bouyer 	 * scsi bus reset. reset the chip and restart
   1134        1.2   bouyer 	 * the queue. Need to clean up all active commands
   1135        1.2   bouyer 	 */
   1136   1.40.2.9  nathanw 	printf("%s: scsi bus reset\n", sc->sc_c.sc_dev.dv_xname);
   1137        1.2   bouyer 	/* stop, reset and restart the chip */
   1138        1.2   bouyer 	siop_reset(sc);
   1139   1.40.2.2  nathanw 	if (sc->sc_flags & SCF_CHAN_NOSLOT) {
   1140   1.40.2.2  nathanw 		/* chip has been reset, all slots are free now */
   1141   1.40.2.2  nathanw 		sc->sc_flags &= ~SCF_CHAN_NOSLOT;
   1142   1.40.2.9  nathanw 		scsipi_channel_thaw(&sc->sc_c.sc_chan, 1);
   1143   1.40.2.2  nathanw 	}
   1144       1.36   bouyer 	/*
   1145       1.36   bouyer 	 * Process all commands: first commmands being executed
   1146       1.36   bouyer 	 */
   1147   1.40.2.9  nathanw 	for (target = 0; target < sc->sc_c.sc_chan.chan_ntargets;
   1148        1.7   bouyer 	    target++) {
   1149   1.40.2.9  nathanw 		if (sc->sc_c.targets[target] == NULL)
   1150        1.7   bouyer 			continue;
   1151        1.7   bouyer 		for (lun = 0; lun < 8; lun++) {
   1152   1.40.2.9  nathanw 			struct siop_target *siop_target =
   1153   1.40.2.9  nathanw 			    (struct siop_target *)sc->sc_c.targets[target];
   1154   1.40.2.9  nathanw 			siop_lun = siop_target->siop_lun[lun];
   1155       1.31   bouyer 			if (siop_lun == NULL)
   1156       1.31   bouyer 				continue;
   1157       1.35   bouyer 			for (tag = 0; tag <
   1158   1.40.2.9  nathanw 			    ((sc->sc_c.targets[target]->flags & TARF_TAG) ?
   1159       1.36   bouyer 			    SIOP_NTAG : 1);
   1160       1.35   bouyer 			    tag++) {
   1161       1.35   bouyer 				siop_cmd = siop_lun->siop_tag[tag].active;
   1162       1.35   bouyer 				if (siop_cmd == NULL)
   1163       1.35   bouyer 					continue;
   1164   1.40.2.9  nathanw 				scsipi_printaddr(siop_cmd->cmd_c.xs->xs_periph);
   1165   1.40.2.2  nathanw 				printf("command with tag id %d reset\n", tag);
   1166   1.40.2.9  nathanw 				siop_cmd->cmd_c.xs->error =
   1167   1.40.2.9  nathanw 				    (siop_cmd->cmd_c.flags & CMDFL_TIMEOUT) ?
   1168   1.40.2.2  nathanw 		    		    XS_TIMEOUT : XS_RESET;
   1169   1.40.2.9  nathanw 				siop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK;
   1170       1.35   bouyer 				siop_lun->siop_tag[tag].active = NULL;
   1171   1.40.2.9  nathanw 				siop_cmd->cmd_c.status = CMDST_DONE;
   1172   1.40.2.2  nathanw 				siop_scsicmd_end(siop_cmd);
   1173       1.35   bouyer 			}
   1174        1.2   bouyer 		}
   1175   1.40.2.9  nathanw 		sc->sc_c.targets[target]->status = TARST_ASYNC;
   1176   1.40.2.9  nathanw 		sc->sc_c.targets[target]->flags &= ~TARF_ISWIDE;
   1177   1.40.2.9  nathanw 		sc->sc_c.targets[target]->period =
   1178   1.40.2.9  nathanw 		    sc->sc_c.targets[target]->offset = 0;
   1179   1.40.2.9  nathanw 		siop_update_xfer_mode(&sc->sc_c, target);
   1180       1.31   bouyer 	}
   1181   1.40.2.2  nathanw 
   1182   1.40.2.9  nathanw 	scsipi_async_event(&sc->sc_c.sc_chan, ASYNC_EVENT_RESET, NULL);
   1183        1.1   bouyer }
   1184        1.1   bouyer 
   1185   1.40.2.2  nathanw void
   1186   1.40.2.2  nathanw siop_scsipi_request(chan, req, arg)
   1187   1.40.2.2  nathanw 	struct scsipi_channel *chan;
   1188   1.40.2.2  nathanw 	scsipi_adapter_req_t req;
   1189   1.40.2.2  nathanw 	void *arg;
   1190        1.1   bouyer {
   1191   1.40.2.2  nathanw 	struct scsipi_xfer *xs;
   1192   1.40.2.2  nathanw 	struct scsipi_periph *periph;
   1193   1.40.2.2  nathanw 	struct siop_softc *sc = (void *)chan->chan_adapter->adapt_dev;
   1194        1.1   bouyer 	struct siop_cmd *siop_cmd;
   1195   1.40.2.9  nathanw 	struct siop_target *siop_target;
   1196        1.1   bouyer 	int s, error, i;
   1197   1.40.2.2  nathanw 	int target;
   1198   1.40.2.2  nathanw 	int lun;
   1199        1.1   bouyer 
   1200   1.40.2.2  nathanw 	switch (req) {
   1201   1.40.2.2  nathanw 	case ADAPTER_REQ_RUN_XFER:
   1202   1.40.2.2  nathanw 		xs = arg;
   1203   1.40.2.2  nathanw 		periph = xs->xs_periph;
   1204   1.40.2.2  nathanw 		target = periph->periph_target;
   1205   1.40.2.2  nathanw 		lun = periph->periph_lun;
   1206   1.40.2.2  nathanw 
   1207   1.40.2.2  nathanw 		s = splbio();
   1208       1.35   bouyer #ifdef SIOP_DEBUG_SCHED
   1209   1.40.2.2  nathanw 		printf("starting cmd for %d:%d\n", target, lun);
   1210        1.1   bouyer #endif
   1211   1.40.2.2  nathanw 		siop_cmd = TAILQ_FIRST(&sc->free_list);
   1212   1.40.2.2  nathanw 		if (siop_cmd == NULL) {
   1213   1.40.2.2  nathanw 			xs->error = XS_RESOURCE_SHORTAGE;
   1214   1.40.2.2  nathanw 			scsipi_done(xs);
   1215   1.40.2.2  nathanw 			splx(s);
   1216   1.40.2.2  nathanw 			return;
   1217       1.16   bouyer 		}
   1218   1.40.2.4  nathanw 		TAILQ_REMOVE(&sc->free_list, siop_cmd, next);
   1219        1.1   bouyer #ifdef DIAGNOSTIC
   1220   1.40.2.9  nathanw 		if (siop_cmd->cmd_c.status != CMDST_FREE)
   1221   1.40.2.2  nathanw 			panic("siop_scsicmd: new cmd not free");
   1222        1.1   bouyer #endif
   1223   1.40.2.9  nathanw 		siop_target = (struct siop_target*)sc->sc_c.targets[target];
   1224   1.40.2.9  nathanw 		if (siop_target == NULL) {
   1225       1.35   bouyer #ifdef SIOP_DEBUG
   1226   1.40.2.2  nathanw 			printf("%s: alloc siop_target for target %d\n",
   1227   1.40.2.9  nathanw 				sc->sc_c.sc_dev.dv_xname, target);
   1228       1.31   bouyer #endif
   1229   1.40.2.9  nathanw 			sc->sc_c.targets[target] =
   1230   1.40.2.2  nathanw 			    malloc(sizeof(struct siop_target),
   1231   1.40.2.2  nathanw 				M_DEVBUF, M_NOWAIT);
   1232   1.40.2.9  nathanw 			if (sc->sc_c.targets[target] == NULL) {
   1233   1.40.2.2  nathanw 				printf("%s: can't malloc memory for "
   1234   1.40.2.9  nathanw 				    "target %d\n", sc->sc_c.sc_dev.dv_xname,
   1235   1.40.2.9  nathanw 				    target);
   1236   1.40.2.2  nathanw 				xs->error = XS_RESOURCE_SHORTAGE;
   1237   1.40.2.2  nathanw 				scsipi_done(xs);
   1238   1.40.2.2  nathanw 				splx(s);
   1239   1.40.2.2  nathanw 				return;
   1240   1.40.2.2  nathanw 			}
   1241   1.40.2.9  nathanw 			siop_target =
   1242   1.40.2.9  nathanw 			    (struct siop_target*)sc->sc_c.targets[target];
   1243   1.40.2.9  nathanw 			siop_target->target_c.status = TARST_PROBING;
   1244   1.40.2.9  nathanw 			siop_target->target_c.flags = 0;
   1245   1.40.2.9  nathanw 			siop_target->target_c.id =
   1246   1.40.2.9  nathanw 			    sc->sc_c.clock_div << 24; /* scntl3 */
   1247   1.40.2.9  nathanw 			siop_target->target_c.id |=  target << 16; /* id */
   1248   1.40.2.9  nathanw 			/* siop_target->target_c.id |= 0x0 << 8; scxfer is 0 */
   1249   1.40.2.2  nathanw 
   1250   1.40.2.2  nathanw 			/* get a lun switch script */
   1251   1.40.2.9  nathanw 			siop_target->lunsw = siop_get_lunsw(sc);
   1252   1.40.2.9  nathanw 			if (siop_target->lunsw == NULL) {
   1253   1.40.2.2  nathanw 				printf("%s: can't alloc lunsw for target %d\n",
   1254   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname, target);
   1255   1.40.2.2  nathanw 				xs->error = XS_RESOURCE_SHORTAGE;
   1256   1.40.2.2  nathanw 				scsipi_done(xs);
   1257   1.40.2.2  nathanw 				splx(s);
   1258   1.40.2.2  nathanw 				return;
   1259   1.40.2.2  nathanw 			}
   1260   1.40.2.2  nathanw 			for (i=0; i < 8; i++)
   1261   1.40.2.9  nathanw 				siop_target->siop_lun[i] = NULL;
   1262   1.40.2.2  nathanw 			siop_add_reselsw(sc, target);
   1263       1.31   bouyer 		}
   1264   1.40.2.9  nathanw 		if (siop_target->siop_lun[lun] == NULL) {
   1265   1.40.2.9  nathanw 			siop_target->siop_lun[lun] =
   1266   1.40.2.6  nathanw 			    malloc(sizeof(struct siop_lun), M_DEVBUF,
   1267   1.40.2.6  nathanw 			    M_NOWAIT|M_ZERO);
   1268   1.40.2.9  nathanw 			if (siop_target->siop_lun[lun] == NULL) {
   1269   1.40.2.2  nathanw 				printf("%s: can't alloc siop_lun for "
   1270   1.40.2.2  nathanw 				    "target %d lun %d\n",
   1271   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname, target, lun);
   1272   1.40.2.2  nathanw 				xs->error = XS_RESOURCE_SHORTAGE;
   1273   1.40.2.2  nathanw 				scsipi_done(xs);
   1274   1.40.2.2  nathanw 				splx(s);
   1275   1.40.2.2  nathanw 				return;
   1276   1.40.2.2  nathanw 			}
   1277   1.40.2.2  nathanw 		}
   1278   1.40.2.9  nathanw 		siop_cmd->cmd_c.siop_target = sc->sc_c.targets[target];
   1279   1.40.2.9  nathanw 		siop_cmd->cmd_c.xs = xs;
   1280   1.40.2.9  nathanw 		siop_cmd->cmd_c.flags = 0;
   1281   1.40.2.9  nathanw 		siop_cmd->cmd_c.status = CMDST_READY;
   1282   1.40.2.2  nathanw 
   1283   1.40.2.2  nathanw 		/* load the DMA maps */
   1284   1.40.2.9  nathanw 		error = bus_dmamap_load(sc->sc_c.sc_dmat,
   1285   1.40.2.9  nathanw 		    siop_cmd->cmd_c.dmamap_cmd,
   1286   1.40.2.2  nathanw 		    xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT);
   1287        1.1   bouyer 		if (error) {
   1288   1.40.2.2  nathanw 			printf("%s: unable to load cmd DMA map: %d\n",
   1289   1.40.2.9  nathanw 			    sc->sc_c.sc_dev.dv_xname, error);
   1290        1.1   bouyer 			xs->error = XS_DRIVER_STUFFUP;
   1291   1.40.2.2  nathanw 			scsipi_done(xs);
   1292       1.31   bouyer 			splx(s);
   1293   1.40.2.2  nathanw 			return;
   1294        1.1   bouyer 		}
   1295   1.40.2.2  nathanw 		if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
   1296   1.40.2.9  nathanw 			error = bus_dmamap_load(sc->sc_c.sc_dmat,
   1297   1.40.2.9  nathanw 			    siop_cmd->cmd_c.dmamap_data, xs->data, xs->datalen,
   1298   1.40.2.3  nathanw 			    NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
   1299   1.40.2.3  nathanw 			    ((xs->xs_control & XS_CTL_DATA_IN) ?
   1300   1.40.2.3  nathanw 			     BUS_DMA_READ : BUS_DMA_WRITE));
   1301   1.40.2.2  nathanw 			if (error) {
   1302   1.40.2.2  nathanw 				printf("%s: unable to load cmd DMA map: %d",
   1303   1.40.2.9  nathanw 				    sc->sc_c.sc_dev.dv_xname, error);
   1304   1.40.2.2  nathanw 				xs->error = XS_DRIVER_STUFFUP;
   1305   1.40.2.2  nathanw 				scsipi_done(xs);
   1306   1.40.2.9  nathanw 				bus_dmamap_unload(sc->sc_c.sc_dmat,
   1307   1.40.2.9  nathanw 				    siop_cmd->cmd_c.dmamap_cmd);
   1308   1.40.2.2  nathanw 				splx(s);
   1309   1.40.2.2  nathanw 				return;
   1310   1.40.2.2  nathanw 			}
   1311   1.40.2.9  nathanw 			bus_dmamap_sync(sc->sc_c.sc_dmat,
   1312   1.40.2.9  nathanw 			    siop_cmd->cmd_c.dmamap_data, 0,
   1313   1.40.2.9  nathanw 			    siop_cmd->cmd_c.dmamap_data->dm_mapsize,
   1314   1.40.2.2  nathanw 			    (xs->xs_control & XS_CTL_DATA_IN) ?
   1315   1.40.2.2  nathanw 			    BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1316   1.40.2.2  nathanw 		}
   1317   1.40.2.9  nathanw 		bus_dmamap_sync(sc->sc_c.sc_dmat, siop_cmd->cmd_c.dmamap_cmd, 0,
   1318   1.40.2.9  nathanw 		    siop_cmd->cmd_c.dmamap_cmd->dm_mapsize,
   1319   1.40.2.9  nathanw 		    BUS_DMASYNC_PREWRITE);
   1320   1.40.2.9  nathanw 
   1321   1.40.2.9  nathanw 		if (xs->xs_tag_type) {
   1322   1.40.2.9  nathanw 			/* use tag_id + 1, tag 0 is reserved for untagged cmds*/
   1323   1.40.2.9  nathanw 			siop_cmd->cmd_c.tag = xs->xs_tag_id + 1;
   1324   1.40.2.9  nathanw 		} else {
   1325   1.40.2.9  nathanw 			siop_cmd->cmd_c.tag = 0;
   1326   1.40.2.9  nathanw 		}
   1327   1.40.2.9  nathanw 		siop_setuptables(&siop_cmd->cmd_c);
   1328   1.40.2.9  nathanw 		siop_table_sync(siop_cmd,
   1329   1.40.2.9  nathanw 		    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1330   1.40.2.2  nathanw 		siop_start(sc, siop_cmd);
   1331   1.40.2.2  nathanw 		if (xs->xs_control & XS_CTL_POLL) {
   1332   1.40.2.2  nathanw 			/* poll for command completion */
   1333   1.40.2.2  nathanw 			while ((xs->xs_status & XS_STS_DONE) == 0) {
   1334   1.40.2.2  nathanw 				delay(1000);
   1335   1.40.2.2  nathanw 				siop_intr(sc);
   1336   1.40.2.2  nathanw 			}
   1337   1.40.2.2  nathanw 		}
   1338   1.40.2.2  nathanw 		splx(s);
   1339   1.40.2.2  nathanw 		return;
   1340        1.1   bouyer 
   1341   1.40.2.2  nathanw 	case ADAPTER_REQ_GROW_RESOURCES:
   1342   1.40.2.4  nathanw #ifdef SIOP_DEBUG
   1343   1.40.2.9  nathanw 		printf("%s grow resources (%d)\n", sc->sc_c.sc_dev.dv_xname,
   1344   1.40.2.9  nathanw 		    sc->sc_c.sc_adapt.adapt_openings);
   1345   1.40.2.4  nathanw #endif
   1346   1.40.2.4  nathanw 		siop_morecbd(sc);
   1347   1.40.2.2  nathanw 		return;
   1348       1.35   bouyer 
   1349   1.40.2.2  nathanw 	case ADAPTER_REQ_SET_XFER_MODE:
   1350   1.40.2.2  nathanw 	{
   1351   1.40.2.2  nathanw 		struct scsipi_xfer_mode *xm = arg;
   1352   1.40.2.9  nathanw 		if (sc->sc_c.targets[xm->xm_target] == NULL)
   1353   1.40.2.2  nathanw 			return;
   1354   1.40.2.2  nathanw 		s = splbio();
   1355   1.40.2.2  nathanw 		if (xm->xm_mode & PERIPH_CAP_TQING)
   1356   1.40.2.9  nathanw 			sc->sc_c.targets[xm->xm_target]->flags |= TARF_TAG;
   1357   1.40.2.2  nathanw 		if ((xm->xm_mode & PERIPH_CAP_WIDE16) &&
   1358   1.40.2.9  nathanw 		    (sc->sc_c.features & SF_BUS_WIDE))
   1359   1.40.2.9  nathanw 			sc->sc_c.targets[xm->xm_target]->flags |= TARF_WIDE;
   1360   1.40.2.2  nathanw 		if (xm->xm_mode & PERIPH_CAP_SYNC)
   1361   1.40.2.9  nathanw 			sc->sc_c.targets[xm->xm_target]->flags |= TARF_SYNC;
   1362   1.40.2.2  nathanw 		if ((xm->xm_mode & (PERIPH_CAP_SYNC | PERIPH_CAP_WIDE16)) ||
   1363   1.40.2.9  nathanw 		    sc->sc_c.targets[xm->xm_target]->status == TARST_PROBING)
   1364   1.40.2.9  nathanw 			sc->sc_c.targets[xm->xm_target]->status =
   1365   1.40.2.2  nathanw 			    TARST_ASYNC;
   1366   1.40.2.2  nathanw 
   1367   1.40.2.9  nathanw 		for (lun = 0; lun < sc->sc_c.sc_chan.chan_nluns; lun++) {
   1368   1.40.2.9  nathanw 			if (scsipi_lookup_periph(chan,
   1369   1.40.2.9  nathanw 			    xm->xm_target, lun) != NULL) {
   1370   1.40.2.2  nathanw 				/* allocate a lun sw entry for this device */
   1371   1.40.2.2  nathanw 				siop_add_dev(sc, xm->xm_target, lun);
   1372   1.40.2.9  nathanw 			}
   1373       1.31   bouyer 		}
   1374   1.40.2.2  nathanw 
   1375       1.14   bouyer 		splx(s);
   1376       1.14   bouyer 	}
   1377   1.40.2.2  nathanw 	}
   1378        1.1   bouyer }
   1379        1.1   bouyer 
   1380   1.40.2.2  nathanw static void
   1381   1.40.2.2  nathanw siop_start(sc, siop_cmd)
   1382        1.1   bouyer 	struct siop_softc *sc;
   1383   1.40.2.2  nathanw 	struct siop_cmd *siop_cmd;
   1384        1.1   bouyer {
   1385       1.31   bouyer 	struct siop_lun *siop_lun;
   1386   1.40.2.9  nathanw 	struct siop_xfer *siop_xfer;
   1387        1.2   bouyer 	u_int32_t dsa;
   1388        1.1   bouyer 	int timeout;
   1389   1.40.2.2  nathanw 	int target, lun, slot;
   1390        1.2   bouyer 
   1391        1.2   bouyer 	/*
   1392        1.2   bouyer 	 * first make sure to read valid data
   1393        1.2   bouyer 	 */
   1394       1.35   bouyer 	siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
   1395        1.1   bouyer 
   1396        1.2   bouyer 	/*
   1397       1.10   bouyer 	 * The queue management here is a bit tricky: the script always looks
   1398       1.10   bouyer 	 * at the slot from first to last, so if we always use the first
   1399       1.10   bouyer 	 * free slot commands can stay at the tail of the queue ~forever.
   1400       1.10   bouyer 	 * The algorithm used here is to restart from the head when we know
   1401       1.10   bouyer 	 * that the queue is empty, and only add commands after the last one.
   1402       1.10   bouyer 	 * When we're at the end of the queue wait for the script to clear it.
   1403       1.10   bouyer 	 * The best thing to do here would be to implement a circular queue,
   1404       1.10   bouyer 	 * but using only 53c720 features this can be "interesting".
   1405       1.10   bouyer 	 * A mid-way solution could be to implement 2 queues and swap orders.
   1406        1.2   bouyer 	 */
   1407       1.29   bouyer 	slot = sc->sc_currschedslot;
   1408       1.10   bouyer 	/*
   1409       1.35   bouyer 	 * If the instruction is 0x80000000 (JUMP foo, IF FALSE) the slot is
   1410       1.35   bouyer 	 * free. As this is the last used slot, all previous slots are free,
   1411   1.40.2.2  nathanw 	 * we can restart from 0.
   1412       1.10   bouyer 	 */
   1413       1.35   bouyer 	if (siop_script_read(sc, (Ent_script_sched_slot0 / 4) + slot * 2) ==
   1414       1.35   bouyer 	    0x80000000) {
   1415   1.40.2.2  nathanw 		slot = sc->sc_currschedslot = 0;
   1416       1.10   bouyer 	} else {
   1417       1.10   bouyer 		slot++;
   1418       1.10   bouyer 	}
   1419   1.40.2.9  nathanw 	target = siop_cmd->cmd_c.xs->xs_periph->periph_target;
   1420   1.40.2.9  nathanw 	lun = siop_cmd->cmd_c.xs->xs_periph->periph_lun;
   1421   1.40.2.9  nathanw 	siop_lun =
   1422   1.40.2.9  nathanw 	    ((struct siop_target*)sc->sc_c.targets[target])->siop_lun[lun];
   1423   1.40.2.2  nathanw 	/* if non-tagged command active, panic: this shouldn't happen */
   1424   1.40.2.2  nathanw 	if (siop_lun->siop_tag[0].active != NULL) {
   1425   1.40.2.2  nathanw 		panic("siop_start: tagged cmd while untagged running");
   1426   1.40.2.2  nathanw 	}
   1427       1.31   bouyer #ifdef DIAGNOSTIC
   1428   1.40.2.2  nathanw 	/* sanity check the tag if needed */
   1429   1.40.2.9  nathanw 	if (siop_cmd->cmd_c.flags & CMDFL_TAG) {
   1430   1.40.2.9  nathanw 		if (siop_lun->siop_tag[siop_cmd->cmd_c.tag].active != NULL)
   1431   1.40.2.2  nathanw 			panic("siop_start: tag not free");
   1432   1.40.2.9  nathanw 		if (siop_cmd->cmd_c.tag >= SIOP_NTAG) {
   1433   1.40.2.9  nathanw 			scsipi_printaddr(siop_cmd->cmd_c.xs->xs_periph);
   1434   1.40.2.9  nathanw 			printf(": tag id %d\n", siop_cmd->cmd_c.tag);
   1435   1.40.2.2  nathanw 			panic("siop_start: invalid tag id");
   1436   1.40.2.2  nathanw 		}
   1437   1.40.2.2  nathanw 	}
   1438   1.40.2.2  nathanw #endif
   1439   1.40.2.2  nathanw 	/*
   1440   1.40.2.2  nathanw 	 * find a free scheduler slot and load it.
   1441   1.40.2.2  nathanw 	 */
   1442   1.40.2.2  nathanw 	for (; slot < SIOP_NSLOTS; slot++) {
   1443       1.35   bouyer 		/*
   1444   1.40.2.2  nathanw 		 * If cmd if 0x80000000 the slot is free
   1445       1.35   bouyer 		 */
   1446   1.40.2.2  nathanw 		if (siop_script_read(sc,
   1447   1.40.2.2  nathanw 		    (Ent_script_sched_slot0 / 4) + slot * 2) ==
   1448   1.40.2.2  nathanw 		    0x80000000)
   1449   1.40.2.2  nathanw 			break;
   1450   1.40.2.2  nathanw 	}
   1451   1.40.2.2  nathanw 	if (slot == SIOP_NSLOTS) {
   1452       1.39   bouyer 		/*
   1453   1.40.2.2  nathanw 		 * no more free slot, no need to continue. freeze the queue
   1454   1.40.2.2  nathanw 		 * and requeue this command.
   1455       1.39   bouyer 		 */
   1456   1.40.2.9  nathanw 		scsipi_channel_freeze(&sc->sc_c.sc_chan, 1);
   1457   1.40.2.2  nathanw 		sc->sc_flags |= SCF_CHAN_NOSLOT;
   1458   1.40.2.9  nathanw 		siop_cmd->cmd_c.xs->error = XS_REQUEUE;
   1459   1.40.2.9  nathanw 		siop_cmd->cmd_c.xs->status = SCSI_SIOP_NOCHECK;
   1460   1.40.2.2  nathanw 		siop_scsicmd_end(siop_cmd);
   1461   1.40.2.2  nathanw 		return;
   1462   1.40.2.2  nathanw 	}
   1463       1.35   bouyer #ifdef SIOP_DEBUG_SCHED
   1464   1.40.2.2  nathanw 	printf("using slot %d for DSA 0x%lx\n", slot,
   1465   1.40.2.9  nathanw 	    (u_long)siop_cmd->cmd_c.dsa);
   1466       1.31   bouyer #endif
   1467   1.40.2.2  nathanw 	/* mark command as active */
   1468   1.40.2.9  nathanw 	if (siop_cmd->cmd_c.status == CMDST_READY)
   1469   1.40.2.9  nathanw 		siop_cmd->cmd_c.status = CMDST_ACTIVE;
   1470   1.40.2.2  nathanw 	else
   1471   1.40.2.2  nathanw 		panic("siop_start: bad status");
   1472   1.40.2.9  nathanw 	siop_lun->siop_tag[siop_cmd->cmd_c.tag].active = siop_cmd;
   1473   1.40.2.2  nathanw 	/* patch scripts with DSA addr */
   1474   1.40.2.9  nathanw 	dsa = siop_cmd->cmd_c.dsa;
   1475   1.40.2.2  nathanw 	/* first reselect switch, if we have an entry */
   1476   1.40.2.9  nathanw 	if (siop_lun->siop_tag[siop_cmd->cmd_c.tag].reseloff > 0)
   1477       1.35   bouyer 		siop_script_write(sc,
   1478   1.40.2.9  nathanw 		    siop_lun->siop_tag[siop_cmd->cmd_c.tag].reseloff + 1,
   1479   1.40.2.9  nathanw 		    dsa + sizeof(struct siop_common_xfer) +
   1480   1.40.2.2  nathanw 		    Ent_ldsa_reload_dsa);
   1481   1.40.2.2  nathanw 	/* CMD script: MOVE MEMORY addr */
   1482   1.40.2.9  nathanw 	siop_xfer = (struct siop_xfer*)siop_cmd->cmd_tables;
   1483   1.40.2.9  nathanw 	siop_xfer->resel[E_ldsa_abs_slot_Used[0]] =
   1484   1.40.2.9  nathanw 	   htole32(sc->sc_c.sc_scriptaddr + Ent_script_sched_slot0 + slot * 8);
   1485   1.40.2.2  nathanw 		siop_table_sync(siop_cmd, BUS_DMASYNC_PREWRITE);
   1486   1.40.2.2  nathanw 	/* scheduler slot: JUMP ldsa_select */
   1487   1.40.2.2  nathanw 	siop_script_write(sc,
   1488   1.40.2.2  nathanw 	    (Ent_script_sched_slot0 / 4) + slot * 2 + 1,
   1489   1.40.2.9  nathanw 	    dsa + sizeof(struct siop_common_xfer) + Ent_ldsa_select);
   1490   1.40.2.2  nathanw 	/* handle timeout */
   1491   1.40.2.9  nathanw 	if ((siop_cmd->cmd_c.xs->xs_control & XS_CTL_POLL) == 0) {
   1492   1.40.2.2  nathanw 		/* start exire timer */
   1493   1.40.2.9  nathanw 		timeout = mstohz(siop_cmd->cmd_c.xs->timeout);
   1494   1.40.2.2  nathanw 		if (timeout == 0)
   1495   1.40.2.2  nathanw 			timeout = 1;
   1496   1.40.2.9  nathanw 		callout_reset( &siop_cmd->cmd_c.xs->xs_callout,
   1497   1.40.2.2  nathanw 		    timeout, siop_timeout, siop_cmd);
   1498       1.36   bouyer 	}
   1499   1.40.2.2  nathanw 	/*
   1500   1.40.2.2  nathanw 	 * Change JUMP cmd so that this slot will be handled
   1501   1.40.2.2  nathanw 	 */
   1502   1.40.2.2  nathanw 	siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2,
   1503   1.40.2.2  nathanw 	    0x80080000);
   1504   1.40.2.2  nathanw 	sc->sc_currschedslot = slot;
   1505       1.36   bouyer 
   1506        1.2   bouyer 	/* make sure SCRIPT processor will read valid data */
   1507       1.35   bouyer 	siop_script_sync(sc,BUS_DMASYNC_PREREAD |  BUS_DMASYNC_PREWRITE);
   1508        1.2   bouyer 	/* Signal script it has some work to do */
   1509   1.40.2.9  nathanw 	bus_space_write_1(sc->sc_c.sc_rt, sc->sc_c.sc_rh,
   1510   1.40.2.9  nathanw 	    SIOP_ISTAT, ISTAT_SIGP);
   1511        1.2   bouyer 	/* and wait for IRQ */
   1512        1.2   bouyer 	return;
   1513        1.1   bouyer }
   1514        1.1   bouyer 
   1515        1.1   bouyer void
   1516        1.1   bouyer siop_timeout(v)
   1517        1.1   bouyer 	void *v;
   1518        1.1   bouyer {
   1519        1.1   bouyer 	struct siop_cmd *siop_cmd = v;
   1520   1.40.2.9  nathanw 	struct siop_softc *sc = (struct siop_softc *)siop_cmd->cmd_c.siop_sc;
   1521        1.1   bouyer 	int s;
   1522        1.1   bouyer 
   1523   1.40.2.9  nathanw 	scsipi_printaddr(siop_cmd->cmd_c.xs->xs_periph);
   1524        1.1   bouyer 	printf("command timeout\n");
   1525        1.1   bouyer 
   1526        1.1   bouyer 	s = splbio();
   1527        1.1   bouyer 	/* reset the scsi bus */
   1528   1.40.2.9  nathanw 	siop_resetbus(&sc->sc_c);
   1529        1.1   bouyer 
   1530       1.12    soren 	/* deactivate callout */
   1531   1.40.2.9  nathanw 	callout_stop(&siop_cmd->cmd_c.xs->xs_callout);
   1532       1.31   bouyer 	/* mark command as being timed out; siop_intr will handle it */
   1533        1.1   bouyer 	/*
   1534        1.1   bouyer 	 * mark command has being timed out and just return;
   1535        1.1   bouyer 	 * the bus reset will generate an interrupt,
   1536        1.1   bouyer 	 * it will be handled in siop_intr()
   1537        1.1   bouyer 	 */
   1538   1.40.2.9  nathanw 	siop_cmd->cmd_c.flags |= CMDFL_TIMEOUT;
   1539        1.1   bouyer 	splx(s);
   1540        1.1   bouyer 	return;
   1541        1.1   bouyer 
   1542        1.1   bouyer }
   1543        1.2   bouyer 
   1544        1.2   bouyer void
   1545        1.2   bouyer siop_dump_script(sc)
   1546        1.2   bouyer 	struct siop_softc *sc;
   1547        1.2   bouyer {
   1548        1.2   bouyer 	int i;
   1549       1.37  thorpej 	for (i = 0; i < PAGE_SIZE / 4; i += 2) {
   1550        1.4   bouyer 		printf("0x%04x: 0x%08x 0x%08x", i * 4,
   1551   1.40.2.9  nathanw 		    le32toh(sc->sc_c.sc_script[i]),
   1552   1.40.2.9  nathanw 		    le32toh(sc->sc_c.sc_script[i+1]));
   1553   1.40.2.9  nathanw 		if ((le32toh(sc->sc_c.sc_script[i]) & 0xe0000000) ==
   1554   1.40.2.9  nathanw 		    0xc0000000) {
   1555        1.2   bouyer 			i++;
   1556   1.40.2.9  nathanw 			printf(" 0x%08x", le32toh(sc->sc_c.sc_script[i+1]));
   1557        1.2   bouyer 		}
   1558        1.2   bouyer 		printf("\n");
   1559        1.2   bouyer 	}
   1560       1.16   bouyer }
   1561       1.16   bouyer 
   1562   1.40.2.4  nathanw void
   1563       1.16   bouyer siop_morecbd(sc)
   1564       1.16   bouyer 	struct siop_softc *sc;
   1565       1.16   bouyer {
   1566   1.40.2.7  nathanw 	int error, i, j, s;
   1567       1.16   bouyer 	bus_dma_segment_t seg;
   1568       1.16   bouyer 	int rseg;
   1569       1.16   bouyer 	struct siop_cbd *newcbd;
   1570   1.40.2.9  nathanw 	struct siop_xfer *xfer;
   1571       1.31   bouyer 	bus_addr_t dsa;
   1572       1.31   bouyer 	u_int32_t *scr;
   1573       1.16   bouyer 
   1574       1.16   bouyer 	/* allocate a new list head */
   1575   1.40.2.6  nathanw 	newcbd = malloc(sizeof(struct siop_cbd), M_DEVBUF, M_NOWAIT|M_ZERO);
   1576       1.16   bouyer 	if (newcbd == NULL) {
   1577       1.16   bouyer 		printf("%s: can't allocate memory for command descriptors "
   1578   1.40.2.9  nathanw 		    "head\n", sc->sc_c.sc_dev.dv_xname);
   1579   1.40.2.4  nathanw 		return;
   1580       1.16   bouyer 	}
   1581       1.16   bouyer 
   1582       1.16   bouyer 	/* allocate cmd list */
   1583   1.40.2.6  nathanw 	newcbd->cmds = malloc(sizeof(struct siop_cmd) * SIOP_NCMDPB,
   1584   1.40.2.6  nathanw 	    M_DEVBUF, M_NOWAIT|M_ZERO);
   1585       1.16   bouyer 	if (newcbd->cmds == NULL) {
   1586       1.16   bouyer 		printf("%s: can't allocate memory for command descriptors\n",
   1587   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname);
   1588       1.16   bouyer 		goto bad3;
   1589       1.16   bouyer 	}
   1590   1.40.2.9  nathanw 	error = bus_dmamem_alloc(sc->sc_c.sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, &seg,
   1591       1.37  thorpej 	    1, &rseg, BUS_DMA_NOWAIT);
   1592       1.16   bouyer 	if (error) {
   1593       1.16   bouyer 		printf("%s: unable to allocate cbd DMA memory, error = %d\n",
   1594   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname, error);
   1595       1.16   bouyer 		goto bad2;
   1596       1.16   bouyer 	}
   1597   1.40.2.9  nathanw 	error = bus_dmamem_map(sc->sc_c.sc_dmat, &seg, rseg, PAGE_SIZE,
   1598       1.16   bouyer 	    (caddr_t *)&newcbd->xfers, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
   1599       1.16   bouyer 	if (error) {
   1600       1.16   bouyer 		printf("%s: unable to map cbd DMA memory, error = %d\n",
   1601   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname, error);
   1602       1.16   bouyer 		goto bad2;
   1603       1.16   bouyer 	}
   1604   1.40.2.9  nathanw 	error = bus_dmamap_create(sc->sc_c.sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0,
   1605       1.16   bouyer 	    BUS_DMA_NOWAIT, &newcbd->xferdma);
   1606       1.16   bouyer 	if (error) {
   1607       1.16   bouyer 		printf("%s: unable to create cbd DMA map, error = %d\n",
   1608   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname, error);
   1609       1.16   bouyer 		goto bad1;
   1610       1.16   bouyer 	}
   1611   1.40.2.9  nathanw 	error = bus_dmamap_load(sc->sc_c.sc_dmat, newcbd->xferdma, newcbd->xfers,
   1612       1.37  thorpej 	    PAGE_SIZE, NULL, BUS_DMA_NOWAIT);
   1613       1.16   bouyer 	if (error) {
   1614       1.17   bouyer 		printf("%s: unable to load cbd DMA map, error = %d\n",
   1615   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname, error);
   1616       1.16   bouyer 		goto bad0;
   1617       1.16   bouyer 	}
   1618       1.31   bouyer #ifdef DEBUG
   1619   1.40.2.9  nathanw 	printf("%s: alloc newcdb at PHY addr 0x%lx\n", sc->sc_c.sc_dev.dv_xname,
   1620       1.31   bouyer 	    (unsigned long)newcbd->xferdma->dm_segs[0].ds_addr);
   1621       1.31   bouyer #endif
   1622       1.16   bouyer 	for (i = 0; i < SIOP_NCMDPB; i++) {
   1623   1.40.2.9  nathanw 		error = bus_dmamap_create(sc->sc_c.sc_dmat, MAXPHYS, SIOP_NSG,
   1624       1.16   bouyer 		    MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
   1625   1.40.2.9  nathanw 		    &newcbd->cmds[i].cmd_c.dmamap_data);
   1626       1.16   bouyer 		if (error) {
   1627       1.16   bouyer 			printf("%s: unable to create data DMA map for cbd: "
   1628       1.16   bouyer 			    "error %d\n",
   1629   1.40.2.9  nathanw 			    sc->sc_c.sc_dev.dv_xname, error);
   1630       1.16   bouyer 			goto bad0;
   1631       1.16   bouyer 		}
   1632   1.40.2.9  nathanw 		error = bus_dmamap_create(sc->sc_c.sc_dmat,
   1633       1.16   bouyer 		    sizeof(struct scsipi_generic), 1,
   1634       1.16   bouyer 		    sizeof(struct scsipi_generic), 0,
   1635       1.16   bouyer 		    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
   1636   1.40.2.9  nathanw 		    &newcbd->cmds[i].cmd_c.dmamap_cmd);
   1637       1.16   bouyer 		if (error) {
   1638       1.16   bouyer 			printf("%s: unable to create cmd DMA map for cbd %d\n",
   1639   1.40.2.9  nathanw 			    sc->sc_c.sc_dev.dv_xname, error);
   1640       1.16   bouyer 			goto bad0;
   1641       1.16   bouyer 		}
   1642   1.40.2.9  nathanw 		newcbd->cmds[i].cmd_c.siop_sc = &sc->sc_c;
   1643       1.16   bouyer 		newcbd->cmds[i].siop_cbdp = newcbd;
   1644   1.40.2.9  nathanw 		xfer = &newcbd->xfers[i];
   1645   1.40.2.9  nathanw 		newcbd->cmds[i].cmd_tables = (struct siop_common_xfer *)xfer;
   1646   1.40.2.9  nathanw 		memset(newcbd->cmds[i].cmd_tables, 0, sizeof(struct siop_xfer));
   1647   1.40.2.9  nathanw 		dsa = newcbd->xferdma->dm_segs[0].ds_addr +
   1648       1.16   bouyer 		    i * sizeof(struct siop_xfer);
   1649   1.40.2.9  nathanw 		newcbd->cmds[i].cmd_c.dsa = dsa;
   1650   1.40.2.9  nathanw 		newcbd->cmds[i].cmd_c.status = CMDST_FREE;
   1651   1.40.2.9  nathanw 		xfer->siop_tables.t_msgout.count= htole32(1);
   1652   1.40.2.9  nathanw 		xfer->siop_tables.t_msgout.addr = htole32(dsa);
   1653   1.40.2.9  nathanw 		xfer->siop_tables.t_msgin.count= htole32(1);
   1654   1.40.2.9  nathanw 		xfer->siop_tables.t_msgin.addr = htole32(dsa +
   1655   1.40.2.9  nathanw 				offsetof(struct siop_common_xfer, msg_in));
   1656   1.40.2.9  nathanw 		xfer->siop_tables.t_extmsgin.count= htole32(2);
   1657   1.40.2.9  nathanw 		xfer->siop_tables.t_extmsgin.addr = htole32(dsa +
   1658   1.40.2.9  nathanw 				offsetof(struct siop_common_xfer, msg_in) + 1);
   1659   1.40.2.9  nathanw 		xfer->siop_tables.t_extmsgdata.addr = htole32(dsa +
   1660   1.40.2.9  nathanw 				offsetof(struct siop_common_xfer, msg_in) + 3);
   1661   1.40.2.9  nathanw 		xfer->siop_tables.t_status.count= htole32(1);
   1662   1.40.2.9  nathanw 		xfer->siop_tables.t_status.addr = htole32(dsa +
   1663   1.40.2.9  nathanw 				offsetof(struct siop_common_xfer, status));
   1664       1.35   bouyer 		/* The select/reselect script */
   1665   1.40.2.9  nathanw 		scr = &xfer->resel[0];
   1666       1.31   bouyer 		for (j = 0; j < sizeof(load_dsa) / sizeof(load_dsa[0]); j++)
   1667       1.31   bouyer 			scr[j] = htole32(load_dsa[j]);
   1668       1.31   bouyer 		/*
   1669       1.31   bouyer 		 * 0x78000000 is a 'move data8 to reg'. data8 is the second
   1670       1.31   bouyer 		 * octet, reg offset is the third.
   1671       1.31   bouyer 		 */
   1672       1.31   bouyer 		scr[Ent_rdsa0 / 4] =
   1673       1.31   bouyer 		    htole32(0x78100000 | ((dsa & 0x000000ff) <<  8));
   1674       1.31   bouyer 		scr[Ent_rdsa1 / 4] =
   1675       1.31   bouyer 		    htole32(0x78110000 | ( dsa & 0x0000ff00       ));
   1676       1.31   bouyer 		scr[Ent_rdsa2 / 4] =
   1677       1.31   bouyer 		    htole32(0x78120000 | ((dsa & 0x00ff0000) >>  8));
   1678       1.31   bouyer 		scr[Ent_rdsa3 / 4] =
   1679       1.31   bouyer 		    htole32(0x78130000 | ((dsa & 0xff000000) >> 16));
   1680       1.35   bouyer 		scr[E_ldsa_abs_reselected_Used[0]] =
   1681   1.40.2.9  nathanw 		    htole32(sc->sc_c.sc_scriptaddr + Ent_reselected);
   1682       1.35   bouyer 		scr[E_ldsa_abs_reselect_Used[0]] =
   1683   1.40.2.9  nathanw 		    htole32(sc->sc_c.sc_scriptaddr + Ent_reselect);
   1684       1.35   bouyer 		scr[E_ldsa_abs_selected_Used[0]] =
   1685   1.40.2.9  nathanw 		    htole32(sc->sc_c.sc_scriptaddr + Ent_selected);
   1686       1.35   bouyer 		scr[E_ldsa_abs_data_Used[0]] =
   1687   1.40.2.9  nathanw 		    htole32(dsa + sizeof(struct siop_common_xfer) +
   1688       1.35   bouyer 		    Ent_ldsa_data);
   1689       1.35   bouyer 		/* JUMP foo, IF FALSE - used by MOVE MEMORY to clear the slot */
   1690       1.35   bouyer 		scr[Ent_ldsa_data / 4] = htole32(0x80000000);
   1691   1.40.2.7  nathanw 		s = splbio();
   1692       1.16   bouyer 		TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next);
   1693   1.40.2.7  nathanw 		splx(s);
   1694       1.35   bouyer #ifdef SIOP_DEBUG
   1695       1.31   bouyer 		printf("tables[%d]: in=0x%x out=0x%x status=0x%x\n", i,
   1696   1.40.2.9  nathanw 		    le32toh(newcbd->cmds[i].cmd_tables->t_msgin.addr),
   1697   1.40.2.9  nathanw 		    le32toh(newcbd->cmds[i].cmd_tables->t_msgout.addr),
   1698   1.40.2.9  nathanw 		    le32toh(newcbd->cmds[i].cmd_tables->t_status.addr));
   1699       1.16   bouyer #endif
   1700       1.16   bouyer 	}
   1701   1.40.2.7  nathanw 	s = splbio();
   1702       1.16   bouyer 	TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next);
   1703   1.40.2.9  nathanw 	sc->sc_c.sc_adapt.adapt_openings += SIOP_NCMDPB;
   1704   1.40.2.7  nathanw 	splx(s);
   1705   1.40.2.4  nathanw 	return;
   1706       1.16   bouyer bad0:
   1707   1.40.2.9  nathanw 	bus_dmamap_unload(sc->sc_c.sc_dmat, newcbd->xferdma);
   1708   1.40.2.9  nathanw 	bus_dmamap_destroy(sc->sc_c.sc_dmat, newcbd->xferdma);
   1709       1.16   bouyer bad1:
   1710   1.40.2.9  nathanw 	bus_dmamem_free(sc->sc_c.sc_dmat, &seg, rseg);
   1711       1.16   bouyer bad2:
   1712       1.16   bouyer 	free(newcbd->cmds, M_DEVBUF);
   1713       1.16   bouyer bad3:
   1714       1.16   bouyer 	free(newcbd, M_DEVBUF);
   1715   1.40.2.4  nathanw 	return;
   1716        1.2   bouyer }
   1717        1.2   bouyer 
   1718       1.31   bouyer struct siop_lunsw *
   1719       1.31   bouyer siop_get_lunsw(sc)
   1720       1.31   bouyer 	struct siop_softc *sc;
   1721       1.31   bouyer {
   1722       1.31   bouyer 	struct siop_lunsw *lunsw;
   1723       1.31   bouyer 	int i;
   1724       1.31   bouyer 
   1725       1.35   bouyer 	if (sc->script_free_lo + (sizeof(lun_switch) / sizeof(lun_switch[0])) >=
   1726       1.35   bouyer 	    sc->script_free_hi)
   1727       1.35   bouyer 		return NULL;
   1728       1.31   bouyer 	lunsw = TAILQ_FIRST(&sc->lunsw_list);
   1729       1.31   bouyer 	if (lunsw != NULL) {
   1730       1.35   bouyer #ifdef SIOP_DEBUG
   1731       1.31   bouyer 		printf("siop_get_lunsw got lunsw at offset %d\n",
   1732       1.31   bouyer 		    lunsw->lunsw_off);
   1733       1.31   bouyer #endif
   1734       1.31   bouyer 		TAILQ_REMOVE(&sc->lunsw_list, lunsw, next);
   1735       1.31   bouyer 		return lunsw;
   1736       1.31   bouyer 	}
   1737   1.40.2.6  nathanw 	lunsw = malloc(sizeof(struct siop_lunsw), M_DEVBUF, M_NOWAIT|M_ZERO);
   1738       1.31   bouyer 	if (lunsw == NULL)
   1739       1.31   bouyer 		return NULL;
   1740       1.35   bouyer #ifdef SIOP_DEBUG
   1741       1.35   bouyer 	printf("allocating lunsw at offset %d\n", sc->script_free_lo);
   1742       1.31   bouyer #endif
   1743   1.40.2.9  nathanw 	if (sc->sc_c.features & SF_CHIP_RAM) {
   1744   1.40.2.9  nathanw 		bus_space_write_region_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
   1745       1.35   bouyer 		    sc->script_free_lo * 4, lun_switch,
   1746       1.31   bouyer 		    sizeof(lun_switch) / sizeof(lun_switch[0]));
   1747   1.40.2.9  nathanw 		bus_space_write_4(sc->sc_c.sc_ramt, sc->sc_c.sc_ramh,
   1748       1.35   bouyer 		    (sc->script_free_lo + E_abs_lunsw_return_Used[0]) * 4,
   1749   1.40.2.9  nathanw 		    sc->sc_c.sc_scriptaddr + Ent_lunsw_return);
   1750       1.31   bouyer 	} else {
   1751       1.31   bouyer 		for (i = 0; i < sizeof(lun_switch) / sizeof(lun_switch[0]);
   1752       1.31   bouyer 		    i++)
   1753   1.40.2.9  nathanw 			sc->sc_c.sc_script[sc->script_free_lo + i] =
   1754       1.31   bouyer 			    htole32(lun_switch[i]);
   1755   1.40.2.9  nathanw 		sc->sc_c.sc_script[
   1756   1.40.2.9  nathanw 		    sc->script_free_lo + E_abs_lunsw_return_Used[0]] =
   1757   1.40.2.9  nathanw 		    htole32(sc->sc_c.sc_scriptaddr + Ent_lunsw_return);
   1758       1.31   bouyer 	}
   1759       1.35   bouyer 	lunsw->lunsw_off = sc->script_free_lo;
   1760       1.35   bouyer 	lunsw->lunsw_size = sizeof(lun_switch) / sizeof(lun_switch[0]);
   1761       1.35   bouyer 	sc->script_free_lo += lunsw->lunsw_size;
   1762       1.35   bouyer 	siop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1763       1.31   bouyer 	return lunsw;
   1764       1.31   bouyer }
   1765       1.31   bouyer 
   1766       1.31   bouyer void
   1767       1.31   bouyer siop_add_reselsw(sc, target)
   1768       1.31   bouyer 	struct siop_softc *sc;
   1769       1.31   bouyer 	int target;
   1770       1.31   bouyer {
   1771       1.31   bouyer 	int i;
   1772   1.40.2.9  nathanw 	struct siop_target *siop_target;
   1773       1.31   bouyer 	struct siop_lun *siop_lun;
   1774   1.40.2.9  nathanw 
   1775   1.40.2.9  nathanw 	siop_target = (struct siop_target *)sc->sc_c.targets[target];
   1776       1.32   bouyer 	/*
   1777       1.32   bouyer 	 * add an entry to resel switch
   1778       1.32   bouyer 	 */
   1779       1.32   bouyer 	siop_script_sync(sc, BUS_DMASYNC_POSTWRITE);
   1780       1.31   bouyer 	for (i = 0; i < 15; i++) {
   1781   1.40.2.9  nathanw 		siop_target->reseloff = Ent_resel_targ0 / 4 + i * 2;
   1782   1.40.2.9  nathanw 		if ((siop_script_read(sc, siop_target->reseloff) & 0xff)
   1783       1.31   bouyer 		    == 0xff) { /* it's free */
   1784       1.35   bouyer #ifdef SIOP_DEBUG
   1785       1.31   bouyer 			printf("siop: target %d slot %d offset %d\n",
   1786   1.40.2.9  nathanw 			    target, i, siop_target->reseloff);
   1787       1.31   bouyer #endif
   1788       1.31   bouyer 			/* JUMP abs_foo, IF target | 0x80; */
   1789   1.40.2.9  nathanw 			siop_script_write(sc, siop_target->reseloff,
   1790       1.31   bouyer 			    0x800c0080 | target);
   1791   1.40.2.9  nathanw 			siop_script_write(sc, siop_target->reseloff + 1,
   1792   1.40.2.9  nathanw 			    sc->sc_c.sc_scriptaddr +
   1793   1.40.2.9  nathanw 			    siop_target->lunsw->lunsw_off * 4 +
   1794       1.33   bouyer 			    Ent_lun_switch_entry);
   1795       1.31   bouyer 			break;
   1796       1.31   bouyer 		}
   1797       1.31   bouyer 	}
   1798       1.31   bouyer 	if (i == 15) /* no free slot, shouldn't happen */
   1799       1.31   bouyer 		panic("siop: resel switch full");
   1800       1.31   bouyer 
   1801       1.35   bouyer 	sc->sc_ntargets++;
   1802       1.31   bouyer 	for (i = 0; i < 8; i++) {
   1803   1.40.2.9  nathanw 		siop_lun = siop_target->siop_lun[i];
   1804       1.35   bouyer 		if (siop_lun == NULL)
   1805       1.35   bouyer 			continue;
   1806       1.35   bouyer 		if (siop_lun->reseloff > 0) {
   1807       1.35   bouyer 			siop_lun->reseloff = 0;
   1808       1.35   bouyer 			siop_add_dev(sc, target, i);
   1809       1.35   bouyer 		}
   1810       1.31   bouyer 	}
   1811   1.40.2.9  nathanw 	siop_update_scntl3(sc, sc->sc_c.targets[target]);
   1812       1.32   bouyer 	siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
   1813       1.31   bouyer }
   1814       1.31   bouyer 
   1815       1.31   bouyer void
   1816   1.40.2.9  nathanw siop_update_scntl3(sc, _siop_target)
   1817       1.31   bouyer 	struct siop_softc *sc;
   1818   1.40.2.9  nathanw 	struct siop_common_target *_siop_target;
   1819       1.31   bouyer {
   1820   1.40.2.9  nathanw 	struct siop_target *siop_target = (struct siop_target *)_siop_target;
   1821       1.31   bouyer 	/* MOVE target->id >> 24 TO SCNTL3 */
   1822       1.31   bouyer 	siop_script_write(sc,
   1823       1.31   bouyer 	    siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4),
   1824   1.40.2.9  nathanw 	    0x78030000 | ((siop_target->target_c.id >> 16) & 0x0000ff00));
   1825       1.31   bouyer 	/* MOVE target->id >> 8 TO SXFER */
   1826       1.31   bouyer 	siop_script_write(sc,
   1827       1.31   bouyer 	    siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4) + 2,
   1828   1.40.2.9  nathanw 	    0x78050000 | (siop_target->target_c.id & 0x0000ff00));
   1829       1.32   bouyer 	siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
   1830       1.31   bouyer }
   1831       1.31   bouyer 
   1832       1.35   bouyer void
   1833       1.35   bouyer siop_add_dev(sc, target, lun)
   1834       1.35   bouyer 	struct siop_softc *sc;
   1835       1.35   bouyer 	int target;
   1836       1.35   bouyer 	int lun;
   1837       1.35   bouyer {
   1838       1.35   bouyer 	struct siop_lunsw *lunsw;
   1839   1.40.2.9  nathanw 	struct siop_target *siop_target =
   1840   1.40.2.9  nathanw 	    (struct siop_target *)sc->sc_c.targets[target];
   1841   1.40.2.9  nathanw 	struct siop_lun *siop_lun = siop_target->siop_lun[lun];
   1842       1.35   bouyer 	int i, ntargets;
   1843       1.35   bouyer 
   1844       1.35   bouyer 	if (siop_lun->reseloff > 0)
   1845       1.35   bouyer 		return;
   1846   1.40.2.9  nathanw 	lunsw = siop_target->lunsw;
   1847       1.35   bouyer 	if ((lunsw->lunsw_off + lunsw->lunsw_size) < sc->script_free_lo) {
   1848       1.35   bouyer 		/*
   1849       1.35   bouyer 		 * can't extend this slot. Probably not worth trying to deal
   1850       1.35   bouyer 		 * with this case
   1851       1.35   bouyer 		 */
   1852       1.35   bouyer #ifdef DEBUG
   1853       1.35   bouyer 		printf("%s:%d:%d: can't allocate a lun sw slot\n",
   1854   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname, target, lun);
   1855       1.35   bouyer #endif
   1856       1.35   bouyer 		return;
   1857       1.35   bouyer 	}
   1858       1.35   bouyer 	/* count how many free targets we still have to probe */
   1859   1.40.2.9  nathanw 	ntargets =  sc->sc_c.sc_chan.chan_ntargets - 1 - sc->sc_ntargets;
   1860       1.35   bouyer 
   1861       1.35   bouyer 	/*
   1862       1.35   bouyer 	 * we need 8 bytes for the lun sw additionnal entry, and
   1863       1.35   bouyer 	 * eventually sizeof(tag_switch) for the tag switch entry.
   1864  1.40.2.10  nathanw 	 * Keep enough free space for the free targets that could be
   1865       1.35   bouyer 	 * probed later.
   1866       1.35   bouyer 	 */
   1867       1.35   bouyer 	if (sc->script_free_lo + 2 +
   1868       1.35   bouyer 	    (ntargets * sizeof(lun_switch) / sizeof(lun_switch[0])) >=
   1869   1.40.2.9  nathanw 	    ((siop_target->target_c.flags & TARF_TAG) ?
   1870       1.35   bouyer 	    sc->script_free_hi - (sizeof(tag_switch) / sizeof(tag_switch[0])) :
   1871       1.35   bouyer 	    sc->script_free_hi)) {
   1872       1.35   bouyer 		/*
   1873  1.40.2.10  nathanw 		 * not enough space, probably not worth dealing with it.
   1874       1.35   bouyer 		 * We can hold 13 tagged-queuing capable devices in the 4k RAM.
   1875       1.35   bouyer 		 */
   1876       1.35   bouyer #ifdef DEBUG
   1877  1.40.2.10  nathanw 		printf("%s:%d:%d: not enough memory for a lun sw slot\n",
   1878   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname, target, lun);
   1879       1.35   bouyer #endif
   1880       1.35   bouyer 		return;
   1881       1.35   bouyer 	}
   1882       1.35   bouyer #ifdef SIOP_DEBUG
   1883       1.35   bouyer 	printf("%s:%d:%d: allocate lun sw entry\n",
   1884   1.40.2.9  nathanw 	    sc->sc_c.sc_dev.dv_xname, target, lun);
   1885       1.35   bouyer #endif
   1886       1.35   bouyer 	/* INT int_resellun */
   1887       1.35   bouyer 	siop_script_write(sc, sc->script_free_lo, 0x98080000);
   1888       1.35   bouyer 	siop_script_write(sc, sc->script_free_lo + 1, A_int_resellun);
   1889       1.35   bouyer 	/* Now the slot entry: JUMP abs_foo, IF lun */
   1890       1.35   bouyer 	siop_script_write(sc, sc->script_free_lo - 2,
   1891       1.35   bouyer 	    0x800c0000 | lun);
   1892       1.35   bouyer 	siop_script_write(sc, sc->script_free_lo - 1, 0);
   1893       1.35   bouyer 	siop_lun->reseloff = sc->script_free_lo - 2;
   1894       1.35   bouyer 	lunsw->lunsw_size += 2;
   1895       1.35   bouyer 	sc->script_free_lo += 2;
   1896   1.40.2.9  nathanw 	if (siop_target->target_c.flags & TARF_TAG) {
   1897       1.35   bouyer 		/* we need a tag switch */
   1898       1.35   bouyer 		sc->script_free_hi -=
   1899       1.35   bouyer 		    sizeof(tag_switch) / sizeof(tag_switch[0]);
   1900   1.40.2.9  nathanw 		if (sc->sc_c.features & SF_CHIP_RAM) {
   1901   1.40.2.9  nathanw 			bus_space_write_region_4(sc->sc_c.sc_ramt,
   1902   1.40.2.9  nathanw 			    sc->sc_c.sc_ramh,
   1903       1.35   bouyer 			    sc->script_free_hi * 4, tag_switch,
   1904       1.35   bouyer 			    sizeof(tag_switch) / sizeof(tag_switch[0]));
   1905       1.35   bouyer 		} else {
   1906       1.35   bouyer 			for(i = 0;
   1907       1.35   bouyer 			    i < sizeof(tag_switch) / sizeof(tag_switch[0]);
   1908       1.35   bouyer 			    i++) {
   1909   1.40.2.9  nathanw 				sc->sc_c.sc_script[sc->script_free_hi + i] =
   1910       1.35   bouyer 				    htole32(tag_switch[i]);
   1911       1.35   bouyer 			}
   1912       1.35   bouyer 		}
   1913       1.35   bouyer 		siop_script_write(sc,
   1914       1.35   bouyer 		    siop_lun->reseloff + 1,
   1915   1.40.2.9  nathanw 		    sc->sc_c.sc_scriptaddr + sc->script_free_hi * 4 +
   1916       1.35   bouyer 		    Ent_tag_switch_entry);
   1917       1.35   bouyer 
   1918       1.35   bouyer 		for (i = 0; i < SIOP_NTAG; i++) {
   1919       1.35   bouyer 			siop_lun->siop_tag[i].reseloff =
   1920       1.35   bouyer 			    sc->script_free_hi + (Ent_resel_tag0 / 4) + i * 2;
   1921       1.35   bouyer 		}
   1922       1.35   bouyer 	} else {
   1923       1.35   bouyer 		/* non-tag case; just work with the lun switch */
   1924       1.35   bouyer 		siop_lun->siop_tag[0].reseloff =
   1925   1.40.2.9  nathanw 		    siop_target->siop_lun[lun]->reseloff;
   1926       1.35   bouyer 	}
   1927       1.35   bouyer 	siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
   1928       1.35   bouyer }
   1929       1.35   bouyer 
   1930       1.35   bouyer void
   1931       1.35   bouyer siop_del_dev(sc, target, lun)
   1932       1.35   bouyer 	struct siop_softc *sc;
   1933       1.35   bouyer 	int target;
   1934       1.35   bouyer 	int lun;
   1935       1.35   bouyer {
   1936       1.35   bouyer 	int i;
   1937   1.40.2.9  nathanw 	struct siop_target *siop_target;
   1938       1.35   bouyer #ifdef SIOP_DEBUG
   1939       1.35   bouyer 		printf("%s:%d:%d: free lun sw entry\n",
   1940   1.40.2.9  nathanw 		    sc->sc_c.sc_dev.dv_xname, target, lun);
   1941       1.35   bouyer #endif
   1942   1.40.2.9  nathanw 	if (sc->sc_c.targets[target] == NULL)
   1943       1.35   bouyer 		return;
   1944   1.40.2.9  nathanw 	siop_target = (struct siop_target *)sc->sc_c.targets[target];
   1945   1.40.2.9  nathanw 	free(siop_target->siop_lun[lun], M_DEVBUF);
   1946   1.40.2.9  nathanw 	siop_target->siop_lun[lun] = NULL;
   1947       1.35   bouyer 	/* XXX compact sw entry too ? */
   1948       1.35   bouyer 	/* check if we can free the whole target */
   1949       1.35   bouyer 	for (i = 0; i < 8; i++) {
   1950   1.40.2.9  nathanw 		if (siop_target->siop_lun[i] != NULL)
   1951       1.35   bouyer 			return;
   1952       1.35   bouyer 	}
   1953       1.35   bouyer #ifdef SIOP_DEBUG
   1954       1.35   bouyer 	printf("%s: free siop_target for target %d lun %d lunsw offset %d\n",
   1955   1.40.2.9  nathanw 	    sc->sc_c.sc_dev.dv_xname, target, lun,
   1956   1.40.2.9  nathanw 	    sc->sc_c.targets[target]->lunsw->lunsw_off);
   1957       1.35   bouyer #endif
   1958       1.35   bouyer 	/*
   1959       1.35   bouyer 	 * nothing here, free the target struct and resel
   1960       1.35   bouyer 	 * switch entry
   1961       1.35   bouyer 	 */
   1962   1.40.2.9  nathanw 	siop_script_write(sc, siop_target->reseloff, 0x800c00ff);
   1963       1.35   bouyer 	siop_script_sync(sc, BUS_DMASYNC_PREWRITE);
   1964   1.40.2.9  nathanw 	TAILQ_INSERT_TAIL(&sc->lunsw_list, siop_target->lunsw, next);
   1965   1.40.2.9  nathanw 	free(sc->sc_c.targets[target], M_DEVBUF);
   1966   1.40.2.9  nathanw 	sc->sc_c.targets[target] = NULL;
   1967       1.35   bouyer 	sc->sc_ntargets--;
   1968       1.35   bouyer }
   1969       1.35   bouyer 
   1970        1.2   bouyer #ifdef SIOP_STATS
   1971        1.2   bouyer void
   1972        1.2   bouyer siop_printstats()
   1973        1.2   bouyer {
   1974        1.2   bouyer 	printf("siop_stat_intr %d\n", siop_stat_intr);
   1975        1.2   bouyer 	printf("siop_stat_intr_shortxfer %d\n", siop_stat_intr_shortxfer);
   1976        1.2   bouyer 	printf("siop_stat_intr_xferdisc %d\n", siop_stat_intr_xferdisc);
   1977        1.2   bouyer 	printf("siop_stat_intr_sdp %d\n", siop_stat_intr_sdp);
   1978        1.2   bouyer 	printf("siop_stat_intr_done %d\n", siop_stat_intr_done);
   1979       1.35   bouyer 	printf("siop_stat_intr_lunresel %d\n", siop_stat_intr_lunresel);
   1980       1.36   bouyer 	printf("siop_stat_intr_qfull %d\n", siop_stat_intr_qfull);
   1981        1.2   bouyer }
   1982        1.2   bouyer #endif
   1983