siop.c revision 1.37.2.5
1 /* $NetBSD: siop.c,v 1.37.2.5 2000/12/15 07:48:32 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/malloc.h> 39 #include <sys/buf.h> 40 #include <sys/kernel.h> 41 42 #include <uvm/uvm_extern.h> 43 44 #include <machine/endian.h> 45 #include <machine/bus.h> 46 47 #include <dev/microcode/siop/siop.out> 48 49 #include <dev/scsipi/scsi_all.h> 50 #include <dev/scsipi/scsi_message.h> 51 #include <dev/scsipi/scsipi_all.h> 52 53 #include <dev/scsipi/scsiconf.h> 54 55 #include <dev/ic/siopreg.h> 56 #include <dev/ic/siopvar.h> 57 #include <dev/ic/siopvar_common.h> 58 59 #ifndef DEBUG 60 #undef DEBUG 61 #endif 62 #undef SIOP_DEBUG 63 #undef SIOP_DEBUG_DR 64 #undef SIOP_DEBUG_INTR 65 #undef SIOP_DEBUG_SCHED 66 #undef DUMP_SCRIPT 67 68 #define SIOP_STATS 69 70 #ifndef SIOP_DEFAULT_TARGET 71 #define SIOP_DEFAULT_TARGET 7 72 #endif 73 74 /* number of cmd descriptors per block */ 75 #define SIOP_NCMDPB (PAGE_SIZE / sizeof(struct siop_xfer)) 76 77 /* Number of scheduler slot (needs to match script) */ 78 #define SIOP_NSLOTS 40 79 80 void siop_reset __P((struct siop_softc *)); 81 void siop_handle_reset __P((struct siop_softc *)); 82 int siop_handle_qtag_reject __P((struct siop_cmd *)); 83 void siop_scsicmd_end __P((struct siop_cmd *)); 84 void siop_start __P((struct siop_softc *)); 85 void siop_timeout __P((void *)); 86 int siop_scsicmd __P((struct scsipi_xfer *)); 87 void siop_scsipi_request __P(( struct scsipi_channel *, 88 scsipi_adapter_req_t, void *)); 89 void siop_dump_script __P((struct siop_softc *)); 90 int siop_morecbd __P((struct siop_softc *)); 91 struct siop_lunsw *siop_get_lunsw __P((struct siop_softc *)); 92 void siop_add_reselsw __P((struct siop_softc *, int)); 93 void siop_update_scntl3 __P((struct siop_softc *, struct siop_target *)); 94 95 #ifdef SIOP_STATS 96 static int siop_stat_intr = 0; 97 static int siop_stat_intr_shortxfer = 0; 98 static int siop_stat_intr_sdp = 0; 99 static int siop_stat_intr_done = 0; 100 static int siop_stat_intr_xferdisc = 0; 101 static int siop_stat_intr_lunresel = 0; 102 static int siop_stat_intr_qfull = 0; 103 void siop_printstats __P((void)); 104 #define INCSTAT(x) x++ 105 #else 106 #define INCSTAT(x) 107 #endif 108 109 static __inline__ void siop_script_sync __P((struct siop_softc *, int)); 110 static __inline__ void 111 siop_script_sync(sc, ops) 112 struct siop_softc *sc; 113 int ops; 114 { 115 if ((sc->features & SF_CHIP_RAM) == 0) 116 bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, 0, 117 PAGE_SIZE, ops); 118 } 119 120 static __inline__ u_int32_t siop_script_read __P((struct siop_softc *, u_int)); 121 static __inline__ u_int32_t 122 siop_script_read(sc, offset) 123 struct siop_softc *sc; 124 u_int offset; 125 { 126 if (sc->features & SF_CHIP_RAM) { 127 return bus_space_read_4(sc->sc_ramt, sc->sc_ramh, offset * 4); 128 } else { 129 return le32toh(sc->sc_script[offset]); 130 } 131 } 132 133 static __inline__ void siop_script_write __P((struct siop_softc *, u_int, 134 u_int32_t)); 135 static __inline__ void 136 siop_script_write(sc, offset, val) 137 struct siop_softc *sc; 138 u_int offset; 139 u_int32_t val; 140 { 141 if (sc->features & SF_CHIP_RAM) { 142 bus_space_write_4(sc->sc_ramt, sc->sc_ramh, offset * 4, val); 143 } else { 144 sc->sc_script[offset] = htole32(val); 145 } 146 } 147 148 void 149 siop_attach(sc) 150 struct siop_softc *sc; 151 { 152 int error, i; 153 bus_dma_segment_t seg; 154 int rseg; 155 156 /* 157 * Allocate DMA-safe memory for the script and map it. 158 */ 159 if ((sc->features & SF_CHIP_RAM) == 0) { 160 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, 161 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT); 162 if (error) { 163 printf("%s: unable to allocate script DMA memory, " 164 "error = %d\n", sc->sc_dev.dv_xname, error); 165 return; 166 } 167 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE, 168 (caddr_t *)&sc->sc_script, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 169 if (error) { 170 printf("%s: unable to map script DMA memory, " 171 "error = %d\n", sc->sc_dev.dv_xname, error); 172 return; 173 } 174 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, 175 PAGE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma); 176 if (error) { 177 printf("%s: unable to create script DMA map, " 178 "error = %d\n", sc->sc_dev.dv_xname, error); 179 return; 180 } 181 error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma, 182 sc->sc_script, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 183 if (error) { 184 printf("%s: unable to load script DMA map, " 185 "error = %d\n", sc->sc_dev.dv_xname, error); 186 return; 187 } 188 sc->sc_scriptaddr = sc->sc_scriptdma->dm_segs[0].ds_addr; 189 sc->ram_size = PAGE_SIZE; 190 } 191 TAILQ_INIT(&sc->free_list); 192 TAILQ_INIT(&sc->ready_list); 193 TAILQ_INIT(&sc->urgent_list); 194 TAILQ_INIT(&sc->cmds); 195 TAILQ_INIT(&sc->lunsw_list); 196 sc->sc_currschedslot = 0; 197 #ifdef SIOP_DEBUG 198 printf("%s: script size = %d, PHY addr=0x%x, VIRT=%p\n", 199 sc->sc_dev.dv_xname, (int)sizeof(siop_script), 200 (u_int32_t)sc->sc_scriptaddr, sc->sc_script); 201 #endif 202 203 sc->sc_adapt.adapt_dev = &sc->sc_dev; 204 sc->sc_adapt.adapt_nchannels = 1; 205 sc->sc_adapt.adapt_openings = 225; 206 sc->sc_adapt.adapt_max_periph = SIOP_NTAG - 1; 207 sc->sc_adapt.adapt_ioctl = siop_ioctl; 208 sc->sc_adapt.adapt_minphys = minphys; 209 sc->sc_adapt.adapt_request = siop_scsipi_request; 210 211 memset(&sc->sc_chan, 0, sizeof(sc->sc_chan)); 212 sc->sc_chan.chan_adapter = &sc->sc_adapt; 213 sc->sc_chan.chan_bustype = &scsi_bustype; 214 sc->sc_chan.chan_channel = 0; 215 sc->sc_chan.chan_ntargets = (sc->features & SF_BUS_WIDE) ? 16 : 8; 216 sc->sc_chan.chan_nluns = 8; 217 sc->sc_chan.chan_id = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCID); 218 if (sc->sc_chan.chan_id == 0 || 219 sc->sc_chan.chan_id >= sc->sc_chan.chan_ntargets) 220 sc->sc_chan.chan_id = SIOP_DEFAULT_TARGET; 221 222 for (i = 0; i < 16; i++) 223 sc->targets[i] = NULL; 224 225 /* find min/max sync period for this chip */ 226 sc->maxsync = 0; 227 sc->minsync = 255; 228 for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]); i++) { 229 if (sc->clock_period != scf_period[i].clock) 230 continue; 231 if (sc->maxsync < scf_period[i].period) 232 sc->maxsync = scf_period[i].period; 233 if (sc->minsync > scf_period[i].period) 234 sc->minsync = scf_period[i].period; 235 } 236 if (sc->maxsync == 255 || sc->minsync == 0) 237 panic("siop: can't find my sync parameters\n"); 238 /* Do a bus reset, so that devices fall back to narrow/async */ 239 siop_resetbus(sc); 240 /* 241 * siop_reset() will reset the chip, thus clearing pending interrupts 242 */ 243 siop_reset(sc); 244 #ifdef DUMP_SCRIPT 245 siop_dump_script(sc); 246 #endif 247 248 config_found((struct device*)sc, &sc->sc_chan, scsiprint); 249 } 250 251 void 252 siop_reset(sc) 253 struct siop_softc *sc; 254 { 255 int i, j; 256 struct siop_lunsw *lunsw; 257 258 siop_common_reset(sc); 259 260 /* copy and patch the script */ 261 if (sc->features & SF_CHIP_RAM) { 262 bus_space_write_region_4(sc->sc_ramt, sc->sc_ramh, 0, 263 siop_script, sizeof(siop_script) / sizeof(siop_script[0])); 264 for (j = 0; j < 265 (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0])); 266 j++) { 267 bus_space_write_4(sc->sc_ramt, sc->sc_ramh, 268 E_abs_msgin_Used[j] * 4, 269 sc->sc_scriptaddr + Ent_msgin_space); 270 } 271 } else { 272 for (j = 0; 273 j < (sizeof(siop_script) / sizeof(siop_script[0])); j++) { 274 sc->sc_script[j] = htole32(siop_script[j]); 275 } 276 for (j = 0; j < 277 (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0])); 278 j++) { 279 sc->sc_script[E_abs_msgin_Used[j]] = 280 htole32(sc->sc_scriptaddr + Ent_msgin_space); 281 } 282 } 283 sc->script_free_lo = sizeof(siop_script) / sizeof(siop_script[0]); 284 sc->script_free_hi = sc->ram_size / 4; 285 286 /* free used and unused lun switches */ 287 while((lunsw = TAILQ_FIRST(&sc->lunsw_list)) != NULL) { 288 #ifdef SIOP_DEBUG 289 printf("%s: free lunsw at offset %d\n", 290 sc->sc_dev.dv_xname, lunsw->lunsw_off); 291 #endif 292 TAILQ_REMOVE(&sc->lunsw_list, lunsw, next); 293 free(lunsw, M_DEVBUF); 294 } 295 TAILQ_INIT(&sc->lunsw_list); 296 /* restore reselect switch */ 297 for (i = 0; i < sc->sc_chan.chan_ntargets; i++) { 298 if (sc->targets[i] == NULL) 299 continue; 300 #ifdef SIOP_DEBUG 301 printf("%s: restore sw for target %d\n", 302 sc->sc_dev.dv_xname, i); 303 #endif 304 free(sc->targets[i]->lunsw, M_DEVBUF); 305 sc->targets[i]->lunsw = siop_get_lunsw(sc); 306 if (sc->targets[i]->lunsw == NULL) { 307 printf("%s: can't alloc lunsw for target %d\n", 308 sc->sc_dev.dv_xname, i); 309 break; 310 } 311 siop_add_reselsw(sc, i); 312 } 313 314 /* start script */ 315 if ((sc->features & SF_CHIP_RAM) == 0) { 316 bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, 0, PAGE_SIZE, 317 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 318 } 319 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, 320 sc->sc_scriptaddr + Ent_reselect); 321 } 322 323 #if 0 324 #define CALL_SCRIPT(ent) do {\ 325 printf ("start script DSA 0x%lx DSP 0x%lx\n", \ 326 siop_cmd->dsa, \ 327 sc->sc_scriptaddr + ent); \ 328 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, sc->sc_scriptaddr + ent); \ 329 } while (0) 330 #else 331 #define CALL_SCRIPT(ent) do {\ 332 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, sc->sc_scriptaddr + ent); \ 333 } while (0) 334 #endif 335 336 int 337 siop_intr(v) 338 void *v; 339 { 340 struct siop_softc *sc = v; 341 struct siop_target *siop_target; 342 struct siop_cmd *siop_cmd; 343 struct siop_lun *siop_lun; 344 struct scsipi_xfer *xs; 345 int istat, sist, sstat1, dstat; 346 u_int32_t irqcode; 347 int need_reset = 0; 348 int offset, target, lun, tag; 349 bus_addr_t dsa; 350 struct siop_cbd *cbdp; 351 int freetarget = 0; 352 353 istat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT); 354 if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0) 355 return 0; 356 INCSTAT(siop_stat_intr); 357 if (istat & ISTAT_INTF) { 358 printf("INTRF\n"); 359 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_INTF); 360 } 361 /* use DSA to find the current siop_cmd */ 362 dsa = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA); 363 for (cbdp = TAILQ_FIRST(&sc->cmds); cbdp != NULL; 364 cbdp = TAILQ_NEXT(cbdp, next)) { 365 if (dsa >= cbdp->xferdma->dm_segs[0].ds_addr && 366 dsa < cbdp->xferdma->dm_segs[0].ds_addr + PAGE_SIZE) { 367 dsa -= cbdp->xferdma->dm_segs[0].ds_addr; 368 siop_cmd = &cbdp->cmds[dsa / sizeof(struct siop_xfer)]; 369 siop_table_sync(siop_cmd, 370 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 371 break; 372 } 373 } 374 if (cbdp == NULL) { 375 siop_cmd = NULL; 376 } 377 if (siop_cmd) { 378 xs = siop_cmd->xs; 379 siop_target = siop_cmd->siop_target; 380 target = siop_cmd->xs->xs_periph->periph_target; 381 lun = siop_cmd->xs->xs_periph->periph_lun; 382 tag = siop_cmd->tag; 383 siop_lun = siop_target->siop_lun[lun]; 384 #ifdef DIAGNOSTIC 385 if (siop_cmd->status != CMDST_ACTIVE && 386 siop_cmd->status != CMDST_SENSE_ACTIVE) { 387 printf("siop_cmd (lun %d) not active (%d)\n", 388 lun, siop_cmd->status); 389 xs = NULL; 390 siop_target = NULL; 391 target = -1; 392 lun = -1; 393 tag = -1; 394 siop_lun = NULL; 395 siop_cmd = NULL; 396 } else if (siop_lun->siop_tag[tag].active != siop_cmd) { 397 printf("siop_cmd (lun %d tag %d) not in siop_lun " 398 "active (%p != %p)\n", lun, tag, siop_cmd, 399 siop_lun->siop_tag[tag].active); 400 } 401 #endif 402 } else { 403 xs = NULL; 404 siop_target = NULL; 405 target = -1; 406 lun = -1; 407 tag = -1; 408 siop_lun = NULL; 409 } 410 if (istat & ISTAT_DIP) { 411 dstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DSTAT); 412 if (dstat & DSTAT_SSI) { 413 printf("single step dsp 0x%08x dsa 0x08%x\n", 414 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 415 sc->sc_scriptaddr), 416 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA)); 417 if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 && 418 (istat & ISTAT_SIP) == 0) { 419 bus_space_write_1(sc->sc_rt, sc->sc_rh, 420 SIOP_DCNTL, bus_space_read_1(sc->sc_rt, 421 sc->sc_rh, SIOP_DCNTL) | DCNTL_STD); 422 } 423 return 1; 424 } 425 if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) { 426 printf("DMA IRQ:"); 427 if (dstat & DSTAT_IID) 428 printf(" Illegal instruction"); 429 if (dstat & DSTAT_ABRT) 430 printf(" abort"); 431 if (dstat & DSTAT_BF) 432 printf(" bus fault"); 433 if (dstat & DSTAT_MDPE) 434 printf(" parity"); 435 if (dstat & DSTAT_DFE) 436 printf(" dma fifo empty"); 437 printf(", DSP=0x%x DSA=0x%x: ", 438 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 439 sc->sc_scriptaddr), 440 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA)); 441 if (siop_cmd) 442 printf("last msg_in=0x%x status=0x%x\n", 443 siop_cmd->siop_tables.msg_in[0], 444 le32toh(siop_cmd->siop_tables.status)); 445 else 446 printf("%s: current DSA invalid\n", 447 sc->sc_dev.dv_xname); 448 need_reset = 1; 449 } 450 } 451 if (istat & ISTAT_SIP) { 452 if (istat & ISTAT_DIP) 453 delay(10); 454 /* 455 * Can't read sist0 & sist1 independantly, or we have to 456 * insert delay 457 */ 458 sist = bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_SIST0); 459 sstat1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1); 460 #ifdef SIOP_DEBUG_INTR 461 printf("scsi interrupt, sist=0x%x sstat1=0x%x " 462 "DSA=0x%x DSP=0x%lx\n", sist, 463 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1), 464 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA), 465 (u_long)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 466 sc->sc_scriptaddr)); 467 #endif 468 if (sist & SIST0_RST) { 469 siop_handle_reset(sc); 470 siop_start(sc); 471 /* no table to flush here */ 472 return 1; 473 } 474 if (sist & SIST0_SGE) { 475 if (siop_cmd) 476 scsipi_printaddr(xs->xs_periph); 477 else 478 printf("%s:", sc->sc_dev.dv_xname); 479 printf("scsi gross error\n"); 480 goto reset; 481 } 482 if ((sist & SIST0_MA) && need_reset == 0) { 483 if (siop_cmd) { 484 int scratcha0; 485 dstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, 486 SIOP_DSTAT); 487 /* 488 * first restore DSA, in case we were in a S/G 489 * operation. 490 */ 491 bus_space_write_4(sc->sc_rt, sc->sc_rh, 492 SIOP_DSA, siop_cmd->dsa); 493 scratcha0 = bus_space_read_1(sc->sc_rt, 494 sc->sc_rh, SIOP_SCRATCHA); 495 switch (sstat1 & SSTAT1_PHASE_MASK) { 496 case SSTAT1_PHASE_STATUS: 497 /* 498 * previous phase may be aborted for any reason 499 * ( for example, the target has less data to 500 * transfer than requested). Just go to status 501 * and the command should terminate. 502 */ 503 INCSTAT(siop_stat_intr_shortxfer); 504 if ((dstat & DSTAT_DFE) == 0) 505 siop_clearfifo(sc); 506 /* no table to flush here */ 507 CALL_SCRIPT(Ent_status); 508 return 1; 509 case SSTAT1_PHASE_MSGIN: 510 /* 511 * target may be ready to disconnect 512 * Save data pointers just in case. 513 */ 514 INCSTAT(siop_stat_intr_xferdisc); 515 if (scratcha0 & A_flag_data) 516 siop_sdp(siop_cmd); 517 else if ((dstat & DSTAT_DFE) == 0) 518 siop_clearfifo(sc); 519 bus_space_write_1(sc->sc_rt, sc->sc_rh, 520 SIOP_SCRATCHA, 521 scratcha0 & ~A_flag_data); 522 siop_table_sync(siop_cmd, 523 BUS_DMASYNC_PREREAD | 524 BUS_DMASYNC_PREWRITE); 525 CALL_SCRIPT(Ent_msgin); 526 return 1; 527 } 528 printf("%s: unexpected phase mismatch %d\n", 529 sc->sc_dev.dv_xname, 530 sstat1 & SSTAT1_PHASE_MASK); 531 } else { 532 printf("%s: phase mismatch without command\n", 533 sc->sc_dev.dv_xname); 534 } 535 need_reset = 1; 536 } 537 if (sist & SIST0_PAR) { 538 /* parity error, reset */ 539 if (siop_cmd) 540 scsipi_printaddr(xs->xs_periph); 541 else 542 printf("%s:", sc->sc_dev.dv_xname); 543 printf("parity error\n"); 544 goto reset; 545 } 546 if ((sist & (SIST1_STO << 8)) && need_reset == 0) { 547 /* selection time out, assume there's no device here */ 548 if (siop_cmd) { 549 siop_cmd->status = CMDST_DONE; 550 xs->error = XS_SELTIMEOUT; 551 freetarget = 1; 552 goto end; 553 } else { 554 printf("%s: selection timeout without " 555 "command\n", sc->sc_dev.dv_xname); 556 need_reset = 1; 557 } 558 } 559 if (sist & SIST0_UDC) { 560 /* 561 * unexpected disconnect. Usually the target signals 562 * a fatal condition this way. Attempt to get sense. 563 */ 564 if (siop_cmd) { 565 siop_cmd->siop_tables.status = 566 htole32(SCSI_CHECK); 567 goto end; 568 } 569 printf("%s: unexpected disconnect without " 570 "command\n", sc->sc_dev.dv_xname); 571 goto reset; 572 } 573 if (sist & (SIST1_SBMC << 8)) { 574 /* SCSI bus mode change */ 575 if (siop_modechange(sc) == 0 || need_reset == 1) 576 goto reset; 577 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { 578 /* 579 * we have a script interrupt, it will 580 * restart the script. 581 */ 582 goto scintr; 583 } 584 /* 585 * else we have to restart it ourselve, at the 586 * interrupted instruction. 587 */ 588 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, 589 bus_space_read_4(sc->sc_rt, sc->sc_rh, 590 SIOP_DSP) - 8); 591 return 1; 592 } 593 /* Else it's an unhandled exeption (for now). */ 594 printf("%s: unhandled scsi interrupt, sist=0x%x sstat1=0x%x " 595 "DSA=0x%x DSP=0x%x\n", sc->sc_dev.dv_xname, sist, 596 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1), 597 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA), 598 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 599 sc->sc_scriptaddr)); 600 if (siop_cmd) { 601 siop_cmd->status = CMDST_DONE; 602 xs->error = XS_SELTIMEOUT; 603 goto end; 604 } 605 need_reset = 1; 606 } 607 if (need_reset) { 608 reset: 609 /* fatal error, reset the bus */ 610 siop_resetbus(sc); 611 /* no table to flush here */ 612 return 1; 613 } 614 615 scintr: 616 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */ 617 irqcode = bus_space_read_4(sc->sc_rt, sc->sc_rh, 618 SIOP_DSPS); 619 #ifdef SIOP_DEBUG_INTR 620 printf("script interrupt 0x%x\n", irqcode); 621 #endif 622 /* 623 * no command, or an inactive command is only valid for a 624 * reselect interrupt 625 */ 626 if ((irqcode & 0x80) == 0) { 627 if (siop_cmd == NULL) { 628 printf("%s: script interrupt (0x%x) with 629 invalid DSA !!!\n", sc->sc_dev.dv_xname, 630 irqcode); 631 goto reset; 632 } 633 if (siop_cmd->status != CMDST_ACTIVE && 634 siop_cmd->status != CMDST_SENSE_ACTIVE) { 635 printf("%s: command with invalid status " 636 "(IRQ code 0x%x current status %d) !\n", 637 sc->sc_dev.dv_xname, 638 irqcode, siop_cmd->status); 639 xs = NULL; 640 } 641 } 642 switch(irqcode) { 643 case A_int_err: 644 printf("error, DSP=0x%x\n", 645 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, 646 SIOP_DSP) - sc->sc_scriptaddr)); 647 if (xs) { 648 xs->error = XS_SELTIMEOUT; 649 goto end; 650 } else { 651 goto reset; 652 } 653 case A_int_reseltarg: 654 printf("%s: reselect with invalid target\n", 655 sc->sc_dev.dv_xname); 656 goto reset; 657 case A_int_resellun: 658 INCSTAT(siop_stat_intr_lunresel); 659 target = bus_space_read_1(sc->sc_rt, sc->sc_rh, 660 SIOP_SCRATCHA) & 0xf; 661 lun = bus_space_read_1(sc->sc_rt, sc->sc_rh, 662 SIOP_SCRATCHA + 1); 663 tag = bus_space_read_1(sc->sc_rt, sc->sc_rh, 664 SIOP_SCRATCHA + 2); 665 siop_target = sc->targets[target]; 666 if (siop_target == NULL) { 667 printf("%s: reselect with invalid " 668 "target %d\n", sc->sc_dev.dv_xname, target); 669 goto reset; 670 } 671 siop_lun = siop_target->siop_lun[lun]; 672 if (siop_lun == NULL) { 673 printf("%s: target %d reselect with invalid " 674 "lun %d\n", sc->sc_dev.dv_xname, 675 target, lun); 676 goto reset; 677 } 678 if (siop_lun->siop_tag[tag].active == NULL) { 679 printf("%s: target %d lun %d tag %d reselect " 680 "without command\n", sc->sc_dev.dv_xname, 681 target, lun, tag); 682 goto reset; 683 } 684 siop_cmd = siop_lun->siop_tag[tag].active; 685 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, 686 siop_cmd->dsa + sizeof(struct siop_xfer_common) + 687 Ent_ldsa_reload_dsa); 688 return 1; 689 case A_int_reseltag: 690 printf("%s: reselect with invalid tag\n", 691 sc->sc_dev.dv_xname); 692 goto reset; 693 case A_int_msgin: 694 { 695 int msgin = bus_space_read_1(sc->sc_rt, sc->sc_rh, 696 SIOP_SFBR); 697 if (msgin == MSG_MESSAGE_REJECT) { 698 int msg, extmsg; 699 if (siop_cmd->siop_tables.msg_out[0] & 0x80) { 700 /* 701 * message was part of a identify + 702 * something else. Identify shoudl't 703 * have been rejected. 704 */ 705 msg = siop_cmd->siop_tables.msg_out[1]; 706 extmsg = 707 siop_cmd->siop_tables.msg_out[3]; 708 } else { 709 msg = siop_cmd->siop_tables.msg_out[0]; 710 extmsg = 711 siop_cmd->siop_tables.msg_out[2]; 712 } 713 if (msg == MSG_MESSAGE_REJECT) { 714 /* MSG_REJECT for a MSG_REJECT !*/ 715 if (xs) 716 scsipi_printaddr(xs->xs_periph); 717 else 718 printf("%s: ", 719 sc->sc_dev.dv_xname); 720 printf("our reject message was " 721 "rejected\n"); 722 goto reset; 723 } 724 if (msg == MSG_EXTENDED && 725 extmsg == MSG_EXT_WDTR) { 726 /* WDTR rejected, initiate sync */ 727 if ((siop_target->flags & TARF_SYNC) 728 == 0) { 729 siop_target->status = TARST_OK; 730 siop_update_xfer_mode(sc, 731 target); 732 /* no table to flush here */ 733 CALL_SCRIPT(Ent_msgin_ack); 734 return 1; 735 } 736 siop_target->status = TARST_SYNC_NEG; 737 siop_sdtr_msg(siop_cmd, 0, 738 sc->minsync, sc->maxoff); 739 siop_table_sync(siop_cmd, 740 BUS_DMASYNC_PREREAD | 741 BUS_DMASYNC_PREWRITE); 742 CALL_SCRIPT(Ent_send_msgout); 743 return 1; 744 } else if (msg == MSG_EXTENDED && 745 extmsg == MSG_EXT_SDTR) { 746 /* sync rejected */ 747 siop_target->offset = 0; 748 siop_target->period = 0; 749 siop_target->status = TARST_OK; 750 siop_update_xfer_mode(sc, target); 751 /* no table to flush here */ 752 CALL_SCRIPT(Ent_msgin_ack); 753 return 1; 754 } else if (msg == MSG_SIMPLE_Q_TAG || 755 msg == MSG_HEAD_OF_Q_TAG || 756 msg == MSG_ORDERED_Q_TAG) { 757 if (siop_handle_qtag_reject( 758 siop_cmd) == -1) 759 goto reset; 760 CALL_SCRIPT(Ent_msgin_ack); 761 return 1; 762 } 763 if (xs) 764 scsipi_printaddr(xs->xs_periph); 765 else 766 printf("%s: ", sc->sc_dev.dv_xname); 767 if (msg == MSG_EXTENDED) { 768 printf("scsi message reject, extended " 769 "message sent was 0x%x\n", extmsg); 770 } else { 771 printf("scsi message reject, message " 772 "sent was 0x%x\n", msg); 773 } 774 /* no table to flush here */ 775 CALL_SCRIPT(Ent_msgin_ack); 776 return 1; 777 } 778 if (xs) 779 scsipi_printaddr(xs->xs_periph); 780 else 781 printf("%s: ", sc->sc_dev.dv_xname); 782 printf("unhandled message 0x%x\n", 783 siop_cmd->siop_tables.msg_in[0]); 784 siop_cmd->siop_tables.msg_out[0] = MSG_MESSAGE_REJECT; 785 siop_cmd->siop_tables.t_msgout.count= htole32(1); 786 siop_table_sync(siop_cmd, 787 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 788 CALL_SCRIPT(Ent_send_msgout); 789 return 1; 790 } 791 case A_int_extmsgin: 792 #ifdef SIOP_DEBUG_INTR 793 printf("extended message: msg 0x%x len %d\n", 794 siop_cmd->siop_tables.msg_in[2], 795 siop_cmd->siop_tables.msg_in[1]); 796 #endif 797 if (siop_cmd->siop_tables.msg_in[1] > 6) 798 printf("%s: extended message too big (%d)\n", 799 sc->sc_dev.dv_xname, 800 siop_cmd->siop_tables.msg_in[1]); 801 siop_cmd->siop_tables.t_extmsgdata.count = 802 htole32(siop_cmd->siop_tables.msg_in[1] - 1); 803 siop_table_sync(siop_cmd, 804 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 805 CALL_SCRIPT(Ent_get_extmsgdata); 806 return 1; 807 case A_int_extmsgdata: 808 #ifdef SIOP_DEBUG_INTR 809 { 810 int i; 811 printf("extended message: 0x%x, data:", 812 siop_cmd->siop_tables.msg_in[2]); 813 for (i = 3; i < 2 + siop_cmd->siop_tables.msg_in[1]; 814 i++) 815 printf(" 0x%x", 816 siop_cmd->siop_tables.msg_in[i]); 817 printf("\n"); 818 } 819 #endif 820 if (siop_cmd->siop_tables.msg_in[2] == MSG_EXT_WDTR) { 821 switch (siop_wdtr_neg(siop_cmd)) { 822 case SIOP_NEG_MSGOUT: 823 siop_update_scntl3(sc, 824 siop_cmd->siop_target); 825 siop_table_sync(siop_cmd, 826 BUS_DMASYNC_PREREAD | 827 BUS_DMASYNC_PREWRITE); 828 CALL_SCRIPT(Ent_send_msgout); 829 return(1); 830 case SIOP_NEG_ACK: 831 siop_update_scntl3(sc, 832 siop_cmd->siop_target); 833 CALL_SCRIPT(Ent_msgin_ack); 834 return(1); 835 default: 836 panic("invalid retval from " 837 "siop_wdtr_neg()"); 838 } 839 return(1); 840 } 841 if (siop_cmd->siop_tables.msg_in[2] == MSG_EXT_SDTR) { 842 switch (siop_sdtr_neg(siop_cmd)) { 843 case SIOP_NEG_MSGOUT: 844 siop_update_scntl3(sc, 845 siop_cmd->siop_target); 846 siop_table_sync(siop_cmd, 847 BUS_DMASYNC_PREREAD | 848 BUS_DMASYNC_PREWRITE); 849 CALL_SCRIPT(Ent_send_msgout); 850 return(1); 851 case SIOP_NEG_ACK: 852 siop_update_scntl3(sc, 853 siop_cmd->siop_target); 854 CALL_SCRIPT(Ent_msgin_ack); 855 return(1); 856 default: 857 panic("invalid retval from " 858 "siop_wdtr_neg()"); 859 } 860 return(1); 861 } 862 /* send a message reject */ 863 siop_cmd->siop_tables.msg_out[0] = MSG_MESSAGE_REJECT; 864 siop_cmd->siop_tables.t_msgout.count = htole32(1); 865 siop_table_sync(siop_cmd, 866 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 867 CALL_SCRIPT(Ent_send_msgout); 868 return 1; 869 case A_int_disc: 870 INCSTAT(siop_stat_intr_sdp); 871 offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, 872 SIOP_SCRATCHA + 1); 873 #ifdef SIOP_DEBUG_DR 874 printf("disconnect offset %d\n", offset); 875 #endif 876 if (offset > SIOP_NSG) { 877 printf("%s: bad offset for disconnect (%d)\n", 878 sc->sc_dev.dv_xname, offset); 879 goto reset; 880 } 881 /* 882 * offset == SIOP_NSG may be a valid condition if 883 * we get a sdp when the xfer is done. 884 * Don't call memmove in this case. 885 */ 886 if (offset < SIOP_NSG) { 887 memmove(&siop_cmd->siop_tables.data[0], 888 &siop_cmd->siop_tables.data[offset], 889 (SIOP_NSG - offset) * sizeof(scr_table_t)); 890 siop_table_sync(siop_cmd, 891 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 892 } 893 CALL_SCRIPT(Ent_script_sched); 894 /* check if we can put some command in scheduler */ 895 siop_start(sc); 896 return 1; 897 case A_int_resfail: 898 printf("reselect failed\n"); 899 CALL_SCRIPT(Ent_script_sched); 900 return 1; 901 case A_int_done: 902 if (xs == NULL) { 903 printf("%s: done without command, DSA=0x%lx\n", 904 sc->sc_dev.dv_xname, (u_long)siop_cmd->dsa); 905 siop_cmd->status = CMDST_FREE; 906 siop_start(sc); 907 CALL_SCRIPT(Ent_script_sched); 908 return 1; 909 } 910 #ifdef SIOP_DEBUG_INTR 911 printf("done, DSA=0x%lx target id 0x%x last msg " 912 "in=0x%x status=0x%x\n", (u_long)siop_cmd->dsa, 913 le32toh(siop_cmd->siop_tables.id), 914 siop_cmd->siop_tables.msg_in[0], 915 le32toh(siop_cmd->siop_tables.status)); 916 #endif 917 INCSTAT(siop_stat_intr_done); 918 if (siop_cmd->status == CMDST_SENSE_ACTIVE) 919 siop_cmd->status = CMDST_SENSE_DONE; 920 else 921 siop_cmd->status = CMDST_DONE; 922 goto end; 923 default: 924 printf("unknown irqcode %x\n", irqcode); 925 if (xs) { 926 xs->error = XS_SELTIMEOUT; 927 goto end; 928 } 929 goto reset; 930 } 931 return 1; 932 } 933 /* We just should't get there */ 934 panic("siop_intr: I shouldn't be there !"); 935 return 1; 936 end: 937 CALL_SCRIPT(Ent_script_sched); 938 siop_lun->siop_tag[tag].active = NULL; 939 siop_scsicmd_end(siop_cmd); 940 if (siop_cmd->status == CMDST_FREE) { 941 TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next); 942 if (freetarget && siop_target->status == TARST_PROBING) 943 siop_del_dev(sc, target, lun); 944 } 945 siop_start(sc); 946 return 1; 947 } 948 949 void 950 siop_scsicmd_end(siop_cmd) 951 struct siop_cmd *siop_cmd; 952 { 953 struct scsipi_xfer *xs = siop_cmd->xs; 954 struct siop_softc *sc = siop_cmd->siop_sc; 955 956 xs->status = le32toh(siop_cmd->siop_tables.status); 957 switch(xs->status) { 958 case SCSI_OK: 959 xs->error = (siop_cmd->status == CMDST_DONE) ? 960 XS_NOERROR : XS_SENSE; 961 break; 962 case SCSI_BUSY: 963 xs->error = XS_BUSY; 964 break; 965 case SCSI_CHECK: 966 if (siop_cmd->status == CMDST_SENSE_DONE) { 967 /* request sense on a request sense ? */ 968 printf("request sense failed\n"); 969 xs->error = XS_DRIVER_STUFFUP; 970 } else { 971 siop_cmd->status = CMDST_SENSE; 972 } 973 break; 974 case SCSI_QUEUE_FULL: 975 INCSTAT(siop_stat_intr_qfull); 976 #ifdef SIOP_DEBUG 977 printf("%s:%d:%d: queue full (tag %d)\n", sc->sc_dev.dv_xname, 978 xs->xs_periph->periph_target, 979 xs->xs_periph->periph_lun, siop_cmd->tag); 980 #endif 981 xs->error = XS_BUSY; 982 break; 983 case SCSI_SIOP_NOCHECK: 984 /* 985 * don't check status, xs->error is already valid 986 */ 987 break; 988 case SCSI_SIOP_NOSTATUS: 989 /* 990 * the status byte was not updated, cmd was 991 * aborted 992 */ 993 xs->error = XS_SELTIMEOUT; 994 break; 995 default: 996 xs->error = XS_DRIVER_STUFFUP; 997 } 998 if (siop_cmd->status != CMDST_SENSE_DONE && 999 xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1000 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0, 1001 siop_cmd->dmamap_data->dm_mapsize, 1002 (xs->xs_control & XS_CTL_DATA_IN) ? 1003 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1004 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_data); 1005 } 1006 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd); 1007 if (siop_cmd->status == CMDST_SENSE) { 1008 /* issue a request sense for this target */ 1009 int error; 1010 siop_cmd->rs_cmd.opcode = REQUEST_SENSE; 1011 siop_cmd->rs_cmd.byte2 = xs->xs_periph->periph_lun << 5; 1012 siop_cmd->rs_cmd.unused[0] = siop_cmd->rs_cmd.unused[1] = 0; 1013 siop_cmd->rs_cmd.length = sizeof(struct scsipi_sense_data); 1014 siop_cmd->rs_cmd.control = 0; 1015 siop_cmd->flags &= ~CMDFL_TAG; 1016 error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_cmd, 1017 &siop_cmd->rs_cmd, sizeof(struct scsipi_sense), 1018 NULL, BUS_DMA_NOWAIT); 1019 if (error) { 1020 printf("%s: unable to load cmd DMA map: %d", 1021 sc->sc_dev.dv_xname, error); 1022 xs->error = XS_DRIVER_STUFFUP; 1023 goto out; 1024 } 1025 error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_data, 1026 &xs->sense.scsi_sense, sizeof(struct scsipi_sense_data), 1027 NULL, BUS_DMA_NOWAIT); 1028 if (error) { 1029 printf("%s: unable to load sense DMA map: %d", 1030 sc->sc_dev.dv_xname, error); 1031 xs->error = XS_DRIVER_STUFFUP; 1032 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd); 1033 goto out; 1034 } 1035 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0, 1036 siop_cmd->dmamap_data->dm_mapsize, BUS_DMASYNC_PREREAD); 1037 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_cmd, 0, 1038 siop_cmd->dmamap_cmd->dm_mapsize, BUS_DMASYNC_PREWRITE); 1039 1040 siop_setuptables(siop_cmd); 1041 /* arrange for the cmd to be handled now */ 1042 TAILQ_INSERT_HEAD(&sc->urgent_list, siop_cmd, next); 1043 return; 1044 } else if (siop_cmd->status == CMDST_SENSE_DONE) { 1045 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0, 1046 siop_cmd->dmamap_data->dm_mapsize, BUS_DMASYNC_POSTREAD); 1047 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_data); 1048 } 1049 out: 1050 callout_stop(&siop_cmd->xs->xs_callout); 1051 siop_cmd->status = CMDST_FREE; 1052 xs->resid = 0; 1053 scsipi_done (xs); 1054 } 1055 1056 /* 1057 * handle a rejected queue tag message: the command will run untagged, 1058 * has to adjust the reselect script. 1059 */ 1060 int 1061 siop_handle_qtag_reject(siop_cmd) 1062 struct siop_cmd *siop_cmd; 1063 { 1064 struct siop_softc *sc = siop_cmd->siop_sc; 1065 int target = siop_cmd->xs->xs_periph->periph_target; 1066 int lun = siop_cmd->xs->xs_periph->periph_lun; 1067 int tag = siop_cmd->siop_tables.msg_out[2]; 1068 struct siop_lun *siop_lun = sc->targets[target]->siop_lun[lun]; 1069 1070 #ifdef SIOP_DEBUG 1071 printf("%s:%d:%d: tag message %d (%d) rejected (status %d)\n", 1072 sc->sc_dev.dv_xname, target, lun, tag, siop_cmd->tag, 1073 siop_cmd->status); 1074 #endif 1075 1076 if (siop_lun->siop_tag[0].active != NULL) { 1077 printf("%s: untagged command already running for target %d " 1078 "lun %d (status %d)\n", sc->sc_dev.dv_xname, target, lun, 1079 siop_lun->siop_tag[0].active->status); 1080 return -1; 1081 } 1082 /* clear tag slot */ 1083 siop_lun->siop_tag[tag].active = NULL; 1084 /* add command to non-tagged slot */ 1085 siop_lun->siop_tag[0].active = siop_cmd; 1086 siop_cmd->tag = 0; 1087 /* adjust reselect script if there is one */ 1088 if (siop_lun->siop_tag[0].reseloff > 0) { 1089 siop_script_write(sc, 1090 siop_lun->siop_tag[0].reseloff + 1, 1091 siop_cmd->dsa + sizeof(struct siop_xfer_common) + 1092 Ent_ldsa_reload_dsa); 1093 } 1094 return 0; 1095 } 1096 1097 /* 1098 * handle a bus reset: reset chip, unqueue all active commands, free all 1099 * target struct and report loosage to upper layer. 1100 * As the upper layer may requeue immediatly we have to first store 1101 * all active commands in a temporary queue. 1102 */ 1103 void 1104 siop_handle_reset(sc) 1105 struct siop_softc *sc; 1106 { 1107 struct cmd_list reset_list; 1108 struct siop_cmd *siop_cmd, *next_siop_cmd; 1109 struct siop_lun *siop_lun; 1110 int target, lun, tag; 1111 /* 1112 * scsi bus reset. reset the chip and restart 1113 * the queue. Need to clean up all active commands 1114 */ 1115 printf("%s: scsi bus reset\n", sc->sc_dev.dv_xname); 1116 /* stop, reset and restart the chip */ 1117 siop_reset(sc); 1118 TAILQ_INIT(&reset_list); 1119 /* 1120 * Process all commands: first commmands being executed 1121 */ 1122 for (target = 0; target < sc->sc_chan.chan_ntargets; 1123 target++) { 1124 if (sc->targets[target] == NULL) 1125 continue; 1126 for (lun = 0; lun < 8; lun++) { 1127 siop_lun = sc->targets[target]->siop_lun[lun]; 1128 if (siop_lun == NULL) 1129 continue; 1130 for (tag = 0; tag < 1131 ((sc->targets[target]->flags & TARF_TAG) ? 1132 SIOP_NTAG : 1); 1133 tag++) { 1134 siop_cmd = siop_lun->siop_tag[tag].active; 1135 if (siop_cmd == NULL) 1136 continue; 1137 printf("cmd %p (target %d:%d) in reset list\n", 1138 siop_cmd, target, lun); 1139 TAILQ_INSERT_TAIL(&reset_list, siop_cmd, next); 1140 siop_lun->siop_tag[tag].active = NULL; 1141 } 1142 } 1143 sc->targets[target]->status = TARST_ASYNC; 1144 sc->targets[target]->flags &= ~TARF_ISWIDE; 1145 sc->targets[target]->period = sc->targets[target]->offset = 0; 1146 siop_update_xfer_mode(sc, target); 1147 } 1148 /* Next commands from the urgent list */ 1149 for (siop_cmd = TAILQ_FIRST(&sc->urgent_list); siop_cmd != NULL; 1150 siop_cmd = next_siop_cmd) { 1151 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1152 siop_cmd->flags &= ~CMDFL_TAG; 1153 printf("cmd %p (target %d:%d) in reset list (wait)\n", 1154 siop_cmd, siop_cmd->xs->xs_periph->periph_target, 1155 siop_cmd->xs->xs_periph->periph_lun); 1156 TAILQ_REMOVE(&sc->urgent_list, siop_cmd, next); 1157 TAILQ_INSERT_TAIL(&reset_list, siop_cmd, next); 1158 } 1159 /* Then command waiting in the input list */ 1160 for (siop_cmd = TAILQ_FIRST(&sc->ready_list); siop_cmd != NULL; 1161 siop_cmd = next_siop_cmd) { 1162 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1163 siop_cmd->flags &= ~CMDFL_TAG; 1164 printf("cmd %p (target %d:%d) in reset list (wait)\n", 1165 siop_cmd, siop_cmd->xs->xs_periph->periph_target, 1166 siop_cmd->xs->xs_periph->periph_lun); 1167 TAILQ_REMOVE(&sc->ready_list, siop_cmd, next); 1168 TAILQ_INSERT_TAIL(&reset_list, siop_cmd, next); 1169 } 1170 1171 for (siop_cmd = TAILQ_FIRST(&reset_list); siop_cmd != NULL; 1172 siop_cmd = next_siop_cmd) { 1173 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1174 siop_cmd->xs->error = (siop_cmd->flags & CMDFL_TIMEOUT) ? 1175 XS_TIMEOUT : XS_RESET; 1176 siop_cmd->siop_tables.status = htole32(SCSI_SIOP_NOCHECK); 1177 printf("cmd %p (status %d) about to be processed\n", siop_cmd, 1178 siop_cmd->status); 1179 if (siop_cmd->status == CMDST_SENSE || 1180 siop_cmd->status == CMDST_SENSE_ACTIVE) 1181 siop_cmd->status = CMDST_SENSE_DONE; 1182 else 1183 siop_cmd->status = CMDST_DONE; 1184 TAILQ_REMOVE(&reset_list, siop_cmd, next); 1185 siop_scsicmd_end(siop_cmd); 1186 TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next); 1187 } 1188 } 1189 1190 void 1191 siop_scsipi_request(chan, req, arg) 1192 struct scsipi_channel *chan; 1193 scsipi_adapter_req_t req; 1194 void *arg; 1195 { 1196 struct scsipi_xfer *xs; 1197 struct scsipi_periph *periph; 1198 struct siop_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1199 struct siop_cmd *siop_cmd; 1200 int s, error, i; 1201 int target; 1202 int lun; 1203 1204 switch (req) { 1205 case ADAPTER_REQ_RUN_XFER: 1206 xs = arg; 1207 periph = xs->xs_periph; 1208 target = periph->periph_target; 1209 lun = periph->periph_lun; 1210 1211 s = splbio(); 1212 #ifdef SIOP_DEBUG_SCHED 1213 printf("starting cmd for %d:%d\n", target, lun); 1214 #endif 1215 siop_cmd = TAILQ_FIRST(&sc->free_list); 1216 if (siop_cmd) { 1217 TAILQ_REMOVE(&sc->free_list, siop_cmd, next); 1218 } else { 1219 if (siop_morecbd(sc) == 0) { 1220 siop_cmd = TAILQ_FIRST(&sc->free_list); 1221 #ifdef DIAGNOSTIC 1222 if (siop_cmd == NULL) 1223 panic("siop_morecbd succeed and does nothing"); 1224 #endif 1225 TAILQ_REMOVE(&sc->free_list, siop_cmd, next); 1226 } 1227 } 1228 if (siop_cmd == NULL) { 1229 xs->error = XS_RESOURCE_SHORTAGE; 1230 splx(s); 1231 return; 1232 } 1233 #ifdef DIAGNOSTIC 1234 if (siop_cmd->status != CMDST_FREE) 1235 panic("siop_scsicmd: new cmd not free"); 1236 #endif 1237 if (sc->targets[target] == NULL) { 1238 #ifdef SIOP_DEBUG 1239 printf("%s: alloc siop_target for target %d\n", 1240 sc->sc_dev.dv_xname, target); 1241 #endif 1242 sc->targets[target] = 1243 malloc(sizeof(struct siop_target), 1244 M_DEVBUF, M_NOWAIT); 1245 if (sc->targets[target] == NULL) { 1246 printf("%s: can't malloc memory for " 1247 "target %d\n", sc->sc_dev.dv_xname, target); 1248 xs->error = XS_RESOURCE_SHORTAGE; 1249 splx(s); 1250 return; 1251 } 1252 sc->targets[target]->status = TARST_PROBING; 1253 sc->targets[target]->flags = 0; 1254 sc->targets[target]->id = 1255 sc->clock_div << 24; /* scntl3 */ 1256 sc->targets[target]->id |= target << 16; /* id */ 1257 /* sc->targets[target]->id |= 0x0 << 8; scxfer is 0 */ 1258 1259 /* get a lun switch script */ 1260 sc->targets[target]->lunsw = siop_get_lunsw(sc); 1261 if (sc->targets[target]->lunsw == NULL) { 1262 printf("%s: can't alloc lunsw for target %d\n", 1263 sc->sc_dev.dv_xname, target); 1264 xs->error = XS_RESOURCE_SHORTAGE; 1265 splx(s); 1266 return; 1267 } 1268 for (i=0; i < 8; i++) 1269 sc->targets[target]->siop_lun[i] = NULL; 1270 siop_add_reselsw(sc, target); 1271 } 1272 if (sc->targets[target]->siop_lun[lun] == NULL) { 1273 sc->targets[target]->siop_lun[lun] = 1274 malloc(sizeof(struct siop_lun), M_DEVBUF, M_NOWAIT); 1275 if (sc->targets[target]->siop_lun[lun] == NULL) { 1276 printf("%s: can't alloc siop_lun for " 1277 "target %d lun %d\n", 1278 sc->sc_dev.dv_xname, target, lun); 1279 xs->error = XS_RESOURCE_SHORTAGE; 1280 splx(s); 1281 return; 1282 } 1283 memset(sc->targets[target]->siop_lun[lun], 0, 1284 sizeof(struct siop_lun)); 1285 } 1286 siop_cmd->siop_target = sc->targets[target]; 1287 siop_cmd->xs = xs; 1288 siop_cmd->flags = 0; 1289 siop_cmd->status = CMDST_READY; 1290 1291 /* load the DMA maps */ 1292 error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_cmd, 1293 xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT); 1294 if (error) { 1295 printf("%s: unable to load cmd DMA map: %d", 1296 sc->sc_dev.dv_xname, error); 1297 xs->error = XS_DRIVER_STUFFUP; 1298 splx(s); 1299 return; 1300 } 1301 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1302 error = bus_dmamap_load(sc->sc_dmat, 1303 siop_cmd->dmamap_data, xs->data, xs->datalen, 1304 NULL, BUS_DMA_NOWAIT); 1305 if (error) { 1306 printf("%s: unable to load cmd DMA map: %d", 1307 sc->sc_dev.dv_xname, error); 1308 xs->error = XS_DRIVER_STUFFUP; 1309 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd); 1310 splx(s); 1311 return; 1312 } 1313 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0, 1314 siop_cmd->dmamap_data->dm_mapsize, 1315 (xs->xs_control & XS_CTL_DATA_IN) ? 1316 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1317 } 1318 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_cmd, 0, 1319 siop_cmd->dmamap_cmd->dm_mapsize, BUS_DMASYNC_PREWRITE); 1320 1321 siop_setuptables(siop_cmd); 1322 1323 TAILQ_INSERT_TAIL(&sc->ready_list, siop_cmd, next); 1324 siop_start(sc); 1325 if (xs->xs_control & XS_CTL_POLL) { 1326 /* poll for command completion */ 1327 while ((xs->xs_status & XS_STS_DONE) == 0) { 1328 delay(1000); 1329 siop_intr(sc); 1330 } 1331 } 1332 splx(s); 1333 return; 1334 1335 case ADAPTER_REQ_GROW_RESOURCES: 1336 /* XXX Not supported. */ 1337 return; 1338 1339 case ADAPTER_REQ_SET_XFER_MODE: 1340 { 1341 struct scsipi_xfer_mode *xm = arg; 1342 if (sc->targets[xm->xm_target] == NULL) 1343 return; 1344 s = splbio(); 1345 if (xm->xm_mode & PERIPH_CAP_TQING) 1346 sc->targets[xm->xm_target]->flags |= TARF_TAG; 1347 if ((xm->xm_mode & PERIPH_CAP_WIDE16) && 1348 (sc->features & SF_BUS_WIDE)) 1349 sc->targets[xm->xm_target]->flags |= TARF_WIDE; 1350 if (xm->xm_mode & PERIPH_CAP_SYNC) 1351 sc->targets[xm->xm_target]->flags |= TARF_SYNC; 1352 if ((xm->xm_mode & (PERIPH_CAP_SYNC | PERIPH_CAP_WIDE16)) || 1353 sc->targets[xm->xm_target]->status == TARST_PROBING) 1354 sc->targets[xm->xm_target]->status = 1355 TARST_ASYNC; 1356 1357 for (lun = 0; lun < sc->sc_chan.chan_nluns; lun++) { 1358 if (sc->sc_chan.chan_periphs[xm->xm_target][lun]) 1359 /* allocate a lun sw entry for this device */ 1360 siop_add_dev(sc, xm->xm_target, lun); 1361 } 1362 1363 splx(s); 1364 } 1365 } 1366 } 1367 1368 void 1369 siop_start(sc) 1370 struct siop_softc *sc; 1371 { 1372 struct siop_cmd *siop_cmd, *next_siop_cmd; 1373 struct siop_lun *siop_lun; 1374 u_int32_t dsa; 1375 int timeout; 1376 int target, lun, tag, slot; 1377 int newcmd = 0; 1378 int doingready = 0; 1379 1380 /* 1381 * first make sure to read valid data 1382 */ 1383 siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1384 1385 /* 1386 * The queue management here is a bit tricky: the script always looks 1387 * at the slot from first to last, so if we always use the first 1388 * free slot commands can stay at the tail of the queue ~forever. 1389 * The algorithm used here is to restart from the head when we know 1390 * that the queue is empty, and only add commands after the last one. 1391 * When we're at the end of the queue wait for the script to clear it. 1392 * The best thing to do here would be to implement a circular queue, 1393 * but using only 53c720 features this can be "interesting". 1394 * A mid-way solution could be to implement 2 queues and swap orders. 1395 */ 1396 slot = sc->sc_currschedslot; 1397 /* 1398 * If the instruction is 0x80000000 (JUMP foo, IF FALSE) the slot is 1399 * free. As this is the last used slot, all previous slots are free, 1400 * we can restart from 0. 1401 */ 1402 if (siop_script_read(sc, (Ent_script_sched_slot0 / 4) + slot * 2) == 1403 0x80000000) { 1404 slot = sc->sc_currschedslot = 0; 1405 } else { 1406 slot++; 1407 } 1408 /* first handle commands from the urgent list */ 1409 siop_cmd = TAILQ_FIRST(&sc->urgent_list); 1410 again: 1411 for (; siop_cmd != NULL; siop_cmd = next_siop_cmd) { 1412 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1413 #ifdef DIAGNOSTIC 1414 if (siop_cmd->status != CMDST_READY && 1415 siop_cmd->status != CMDST_SENSE) 1416 panic("siop: non-ready cmd in ready list"); 1417 #endif 1418 target = siop_cmd->xs->xs_periph->periph_target; 1419 lun = siop_cmd->xs->xs_periph->periph_lun; 1420 siop_lun = sc->targets[target]->siop_lun[lun]; 1421 /* if non-tagged command active, wait */ 1422 if (siop_lun->siop_tag[0].active != NULL) 1423 continue; 1424 /* find a free tag if needed */ 1425 if (siop_cmd->flags & CMDFL_TAG) { 1426 tag = siop_cmd->xs->xs_tag_id + 1; 1427 #ifdef DIAGNOSTIC 1428 if (siop_lun->siop_tag[tag].active != NULL) 1429 panic("siop_start: tag not free"); 1430 if (tag >= SIOP_NTAG) { 1431 scsipi_printaddr(siop_cmd->xs->xs_periph); 1432 printf(": tag id %d\n", tag); 1433 panic("siop_start: invalid tag id"); 1434 } 1435 #endif 1436 } else { 1437 tag = 0; 1438 } 1439 siop_cmd->tag = tag; 1440 /* find a free scheduler slot and load it */ 1441 for (; slot < SIOP_NSLOTS; slot++) { 1442 /* 1443 * If cmd if 0x80000000 the slot is free 1444 */ 1445 if (siop_script_read(sc, 1446 (Ent_script_sched_slot0 / 4) + slot * 2) == 1447 0x80000000) 1448 break; 1449 } 1450 /* no more free slot, no need to continue */ 1451 if (slot == SIOP_NSLOTS) { 1452 goto end; 1453 } 1454 #ifdef SIOP_DEBUG_SCHED 1455 printf("using slot %d for DSA 0x%lx\n", slot, 1456 (u_long)siop_cmd->dsa); 1457 #endif 1458 /* Ok, we can add the tag message */ 1459 if (tag > 0) { 1460 #ifdef DIAGNOSTIC 1461 int msgcount = 1462 le32toh(siop_cmd->siop_tables.t_msgout.count); 1463 if (msgcount != 1) 1464 printf("%s:%d:%d: tag %d with msgcount %d\n", 1465 sc->sc_dev.dv_xname, target, lun, tag, 1466 msgcount); 1467 #endif 1468 siop_cmd->siop_tables.msg_out[1] = 1469 siop_cmd->xs->xs_tag_type; 1470 siop_cmd->siop_tables.msg_out[2] = tag; 1471 siop_cmd->siop_tables.t_msgout.count = htole32(3); 1472 } 1473 /* note that we started a new command */ 1474 newcmd = 1; 1475 /* mark command as active */ 1476 if (siop_cmd->status == CMDST_READY) { 1477 siop_cmd->status = CMDST_ACTIVE; 1478 } else if (siop_cmd->status == CMDST_SENSE) { 1479 siop_cmd->status = CMDST_SENSE_ACTIVE; 1480 } else 1481 panic("siop_start: bad status"); 1482 if (doingready) 1483 TAILQ_REMOVE(&sc->ready_list, siop_cmd, next); 1484 else 1485 TAILQ_REMOVE(&sc->urgent_list, siop_cmd, next); 1486 siop_lun->siop_tag[tag].active = siop_cmd; 1487 /* patch scripts with DSA addr */ 1488 dsa = siop_cmd->dsa; 1489 /* first reselect switch, if we have an entry */ 1490 if (siop_lun->siop_tag[tag].reseloff > 0) 1491 siop_script_write(sc, 1492 siop_lun->siop_tag[tag].reseloff + 1, 1493 dsa + sizeof(struct siop_xfer_common) + 1494 Ent_ldsa_reload_dsa); 1495 /* CMD script: MOVE MEMORY addr */ 1496 siop_cmd->siop_xfer->resel[E_ldsa_abs_slot_Used[0]] = 1497 htole32(sc->sc_scriptaddr + Ent_script_sched_slot0 + 1498 slot * 8); 1499 /* scheduler slot: JUMP ldsa_select */ 1500 siop_script_write(sc, 1501 (Ent_script_sched_slot0 / 4) + slot * 2 + 1, 1502 dsa + sizeof(struct siop_xfer_common) + Ent_ldsa_select); 1503 /* handle timeout */ 1504 if (siop_cmd->status == CMDST_ACTIVE) { 1505 if ((siop_cmd->xs->xs_control & 1506 XS_CTL_POLL) == 0) { 1507 /* start exire timer */ 1508 timeout = (u_int64_t) siop_cmd->xs->timeout * 1509 (u_int64_t)hz / 1000; 1510 if (timeout == 0) 1511 timeout = 1; 1512 callout_reset( &siop_cmd->xs->xs_callout, 1513 timeout, siop_timeout, siop_cmd); 1514 } 1515 } 1516 /* 1517 * Change JUMP cmd so that this slot will be handled 1518 */ 1519 siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2, 1520 0x80080000); 1521 sc->sc_currschedslot = slot; 1522 slot++; 1523 } 1524 if (doingready == 0) { 1525 /* now process ready list */ 1526 doingready = 1; 1527 siop_cmd = TAILQ_FIRST(&sc->ready_list); 1528 goto again; 1529 } 1530 1531 end: 1532 /* if nothing changed no need to flush cache and wakeup script */ 1533 if (newcmd == 0) 1534 return; 1535 /* make sure SCRIPT processor will read valid data */ 1536 siop_script_sync(sc,BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1537 /* Signal script it has some work to do */ 1538 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SIGP); 1539 /* and wait for IRQ */ 1540 return; 1541 } 1542 1543 void 1544 siop_timeout(v) 1545 void *v; 1546 { 1547 struct siop_cmd *siop_cmd = v; 1548 struct siop_softc *sc = siop_cmd->siop_sc; 1549 int s; 1550 1551 scsipi_printaddr(siop_cmd->xs->xs_periph); 1552 printf("command timeout\n"); 1553 1554 s = splbio(); 1555 /* reset the scsi bus */ 1556 siop_resetbus(sc); 1557 1558 /* deactivate callout */ 1559 callout_stop(&siop_cmd->xs->xs_callout); 1560 /* mark command as being timed out; siop_intr will handle it */ 1561 /* 1562 * mark command has being timed out and just return; 1563 * the bus reset will generate an interrupt, 1564 * it will be handled in siop_intr() 1565 */ 1566 siop_cmd->flags |= CMDFL_TIMEOUT; 1567 splx(s); 1568 return; 1569 1570 } 1571 1572 void 1573 siop_dump_script(sc) 1574 struct siop_softc *sc; 1575 { 1576 int i; 1577 for (i = 0; i < PAGE_SIZE / 4; i += 2) { 1578 printf("0x%04x: 0x%08x 0x%08x", i * 4, 1579 le32toh(sc->sc_script[i]), le32toh(sc->sc_script[i+1])); 1580 if ((le32toh(sc->sc_script[i]) & 0xe0000000) == 0xc0000000) { 1581 i++; 1582 printf(" 0x%08x", le32toh(sc->sc_script[i+1])); 1583 } 1584 printf("\n"); 1585 } 1586 } 1587 1588 int 1589 siop_morecbd(sc) 1590 struct siop_softc *sc; 1591 { 1592 int error, i, j; 1593 bus_dma_segment_t seg; 1594 int rseg; 1595 struct siop_cbd *newcbd; 1596 bus_addr_t dsa; 1597 u_int32_t *scr; 1598 1599 /* allocate a new list head */ 1600 newcbd = malloc(sizeof(struct siop_cbd), M_DEVBUF, M_NOWAIT); 1601 if (newcbd == NULL) { 1602 printf("%s: can't allocate memory for command descriptors " 1603 "head\n", sc->sc_dev.dv_xname); 1604 return ENOMEM; 1605 } 1606 memset(newcbd, 0, sizeof(struct siop_cbd)); 1607 1608 /* allocate cmd list */ 1609 newcbd->cmds = 1610 malloc(sizeof(struct siop_cmd) * SIOP_NCMDPB, M_DEVBUF, M_NOWAIT); 1611 if (newcbd->cmds == NULL) { 1612 printf("%s: can't allocate memory for command descriptors\n", 1613 sc->sc_dev.dv_xname); 1614 error = ENOMEM; 1615 goto bad3; 1616 } 1617 memset(newcbd->cmds, 0, sizeof(struct siop_cmd) * SIOP_NCMDPB); 1618 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, &seg, 1619 1, &rseg, BUS_DMA_NOWAIT); 1620 if (error) { 1621 printf("%s: unable to allocate cbd DMA memory, error = %d\n", 1622 sc->sc_dev.dv_xname, error); 1623 goto bad2; 1624 } 1625 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE, 1626 (caddr_t *)&newcbd->xfers, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1627 if (error) { 1628 printf("%s: unable to map cbd DMA memory, error = %d\n", 1629 sc->sc_dev.dv_xname, error); 1630 goto bad2; 1631 } 1632 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1633 BUS_DMA_NOWAIT, &newcbd->xferdma); 1634 if (error) { 1635 printf("%s: unable to create cbd DMA map, error = %d\n", 1636 sc->sc_dev.dv_xname, error); 1637 goto bad1; 1638 } 1639 error = bus_dmamap_load(sc->sc_dmat, newcbd->xferdma, newcbd->xfers, 1640 PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 1641 if (error) { 1642 printf("%s: unable to load cbd DMA map, error = %d\n", 1643 sc->sc_dev.dv_xname, error); 1644 goto bad0; 1645 } 1646 #ifdef DEBUG 1647 printf("%s: alloc newcdb at PHY addr 0x%lx\n", sc->sc_dev.dv_xname, 1648 (unsigned long)newcbd->xferdma->dm_segs[0].ds_addr); 1649 #endif 1650 1651 for (i = 0; i < SIOP_NCMDPB; i++) { 1652 error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, SIOP_NSG, 1653 MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1654 &newcbd->cmds[i].dmamap_data); 1655 if (error) { 1656 printf("%s: unable to create data DMA map for cbd: " 1657 "error %d\n", 1658 sc->sc_dev.dv_xname, error); 1659 goto bad0; 1660 } 1661 error = bus_dmamap_create(sc->sc_dmat, 1662 sizeof(struct scsipi_generic), 1, 1663 sizeof(struct scsipi_generic), 0, 1664 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1665 &newcbd->cmds[i].dmamap_cmd); 1666 if (error) { 1667 printf("%s: unable to create cmd DMA map for cbd %d\n", 1668 sc->sc_dev.dv_xname, error); 1669 goto bad0; 1670 } 1671 newcbd->cmds[i].siop_sc = sc; 1672 newcbd->cmds[i].siop_cbdp = newcbd; 1673 newcbd->cmds[i].siop_xfer = &newcbd->xfers[i]; 1674 memset(newcbd->cmds[i].siop_xfer, 0, 1675 sizeof(struct siop_xfer)); 1676 newcbd->cmds[i].dsa = newcbd->xferdma->dm_segs[0].ds_addr + 1677 i * sizeof(struct siop_xfer); 1678 dsa = newcbd->cmds[i].dsa; 1679 newcbd->cmds[i].status = CMDST_FREE; 1680 newcbd->cmds[i].siop_tables.t_msgout.count= htole32(1); 1681 newcbd->cmds[i].siop_tables.t_msgout.addr = htole32(dsa); 1682 newcbd->cmds[i].siop_tables.t_msgin.count= htole32(1); 1683 newcbd->cmds[i].siop_tables.t_msgin.addr = htole32(dsa + 8); 1684 newcbd->cmds[i].siop_tables.t_extmsgin.count= htole32(2); 1685 newcbd->cmds[i].siop_tables.t_extmsgin.addr = htole32(dsa + 9); 1686 newcbd->cmds[i].siop_tables.t_extmsgdata.addr = 1687 htole32(dsa + 11); 1688 newcbd->cmds[i].siop_tables.t_status.count= htole32(1); 1689 newcbd->cmds[i].siop_tables.t_status.addr = htole32(dsa + 16); 1690 1691 /* The select/reselect script */ 1692 scr = &newcbd->cmds[i].siop_xfer->resel[0]; 1693 for (j = 0; j < sizeof(load_dsa) / sizeof(load_dsa[0]); j++) 1694 scr[j] = htole32(load_dsa[j]); 1695 /* 1696 * 0x78000000 is a 'move data8 to reg'. data8 is the second 1697 * octet, reg offset is the third. 1698 */ 1699 scr[Ent_rdsa0 / 4] = 1700 htole32(0x78100000 | ((dsa & 0x000000ff) << 8)); 1701 scr[Ent_rdsa1 / 4] = 1702 htole32(0x78110000 | ( dsa & 0x0000ff00 )); 1703 scr[Ent_rdsa2 / 4] = 1704 htole32(0x78120000 | ((dsa & 0x00ff0000) >> 8)); 1705 scr[Ent_rdsa3 / 4] = 1706 htole32(0x78130000 | ((dsa & 0xff000000) >> 16)); 1707 scr[E_ldsa_abs_reselected_Used[0]] = 1708 htole32(sc->sc_scriptaddr + Ent_reselected); 1709 scr[E_ldsa_abs_reselect_Used[0]] = 1710 htole32(sc->sc_scriptaddr + Ent_reselect); 1711 scr[E_ldsa_abs_selected_Used[0]] = 1712 htole32(sc->sc_scriptaddr + Ent_selected); 1713 scr[E_ldsa_abs_data_Used[0]] = 1714 htole32(dsa + sizeof(struct siop_xfer_common) + 1715 Ent_ldsa_data); 1716 /* JUMP foo, IF FALSE - used by MOVE MEMORY to clear the slot */ 1717 scr[Ent_ldsa_data / 4] = htole32(0x80000000); 1718 TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next); 1719 #ifdef SIOP_DEBUG 1720 printf("tables[%d]: in=0x%x out=0x%x status=0x%x\n", i, 1721 le32toh(newcbd->cmds[i].siop_tables.t_msgin.addr), 1722 le32toh(newcbd->cmds[i].siop_tables.t_msgout.addr), 1723 le32toh(newcbd->cmds[i].siop_tables.t_status.addr)); 1724 #endif 1725 } 1726 TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next); 1727 return 0; 1728 bad0: 1729 bus_dmamap_destroy(sc->sc_dmat, newcbd->xferdma); 1730 bad1: 1731 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 1732 bad2: 1733 free(newcbd->cmds, M_DEVBUF); 1734 bad3: 1735 free(newcbd, M_DEVBUF); 1736 return error; 1737 } 1738 1739 struct siop_lunsw * 1740 siop_get_lunsw(sc) 1741 struct siop_softc *sc; 1742 { 1743 struct siop_lunsw *lunsw; 1744 int i; 1745 1746 if (sc->script_free_lo + (sizeof(lun_switch) / sizeof(lun_switch[0])) >= 1747 sc->script_free_hi) 1748 return NULL; 1749 lunsw = TAILQ_FIRST(&sc->lunsw_list); 1750 if (lunsw != NULL) { 1751 #ifdef SIOP_DEBUG 1752 printf("siop_get_lunsw got lunsw at offset %d\n", 1753 lunsw->lunsw_off); 1754 #endif 1755 TAILQ_REMOVE(&sc->lunsw_list, lunsw, next); 1756 return lunsw; 1757 } 1758 lunsw = malloc(sizeof(struct siop_lunsw), M_DEVBUF, M_NOWAIT); 1759 if (lunsw == NULL) 1760 return NULL; 1761 memset(lunsw, 0, sizeof(struct siop_lunsw)); 1762 #ifdef SIOP_DEBUG 1763 printf("allocating lunsw at offset %d\n", sc->script_free_lo); 1764 #endif 1765 if (sc->features & SF_CHIP_RAM) { 1766 bus_space_write_region_4(sc->sc_ramt, sc->sc_ramh, 1767 sc->script_free_lo * 4, lun_switch, 1768 sizeof(lun_switch) / sizeof(lun_switch[0])); 1769 bus_space_write_4(sc->sc_ramt, sc->sc_ramh, 1770 (sc->script_free_lo + E_abs_lunsw_return_Used[0]) * 4, 1771 sc->sc_scriptaddr + Ent_lunsw_return); 1772 } else { 1773 for (i = 0; i < sizeof(lun_switch) / sizeof(lun_switch[0]); 1774 i++) 1775 sc->sc_script[sc->script_free_lo + i] = 1776 htole32(lun_switch[i]); 1777 sc->sc_script[sc->script_free_lo + E_abs_lunsw_return_Used[0]] = 1778 htole32(sc->sc_scriptaddr + Ent_lunsw_return); 1779 } 1780 lunsw->lunsw_off = sc->script_free_lo; 1781 lunsw->lunsw_size = sizeof(lun_switch) / sizeof(lun_switch[0]); 1782 sc->script_free_lo += lunsw->lunsw_size; 1783 siop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1784 return lunsw; 1785 } 1786 1787 void 1788 siop_add_reselsw(sc, target) 1789 struct siop_softc *sc; 1790 int target; 1791 { 1792 int i; 1793 struct siop_lun *siop_lun; 1794 /* 1795 * add an entry to resel switch 1796 */ 1797 siop_script_sync(sc, BUS_DMASYNC_POSTWRITE); 1798 for (i = 0; i < 15; i++) { 1799 sc->targets[target]->reseloff = Ent_resel_targ0 / 4 + i * 2; 1800 if ((siop_script_read(sc, sc->targets[target]->reseloff) & 0xff) 1801 == 0xff) { /* it's free */ 1802 #ifdef SIOP_DEBUG 1803 printf("siop: target %d slot %d offset %d\n", 1804 target, i, sc->targets[target]->reseloff); 1805 #endif 1806 /* JUMP abs_foo, IF target | 0x80; */ 1807 siop_script_write(sc, sc->targets[target]->reseloff, 1808 0x800c0080 | target); 1809 siop_script_write(sc, sc->targets[target]->reseloff + 1, 1810 sc->sc_scriptaddr + 1811 sc->targets[target]->lunsw->lunsw_off * 4 + 1812 Ent_lun_switch_entry); 1813 break; 1814 } 1815 } 1816 if (i == 15) /* no free slot, shouldn't happen */ 1817 panic("siop: resel switch full"); 1818 1819 sc->sc_ntargets++; 1820 for (i = 0; i < 8; i++) { 1821 siop_lun = sc->targets[target]->siop_lun[i]; 1822 if (siop_lun == NULL) 1823 continue; 1824 if (siop_lun->reseloff > 0) { 1825 siop_lun->reseloff = 0; 1826 siop_add_dev(sc, target, i); 1827 } 1828 } 1829 siop_update_scntl3(sc, sc->targets[target]); 1830 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1831 } 1832 1833 void 1834 siop_update_scntl3(sc, siop_target) 1835 struct siop_softc *sc; 1836 struct siop_target *siop_target; 1837 { 1838 /* MOVE target->id >> 24 TO SCNTL3 */ 1839 siop_script_write(sc, 1840 siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4), 1841 0x78030000 | ((siop_target->id >> 16) & 0x0000ff00)); 1842 /* MOVE target->id >> 8 TO SXFER */ 1843 siop_script_write(sc, 1844 siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4) + 2, 1845 0x78050000 | (siop_target->id & 0x0000ff00)); 1846 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1847 } 1848 1849 void 1850 siop_add_dev(sc, target, lun) 1851 struct siop_softc *sc; 1852 int target; 1853 int lun; 1854 { 1855 struct siop_lunsw *lunsw; 1856 struct siop_lun *siop_lun = sc->targets[target]->siop_lun[lun]; 1857 int i, ntargets; 1858 1859 if (siop_lun->reseloff > 0) 1860 return; 1861 lunsw = sc->targets[target]->lunsw; 1862 if ((lunsw->lunsw_off + lunsw->lunsw_size) < sc->script_free_lo) { 1863 /* 1864 * can't extend this slot. Probably not worth trying to deal 1865 * with this case 1866 */ 1867 #ifdef DEBUG 1868 printf("%s:%d:%d: can't allocate a lun sw slot\n", 1869 sc->sc_dev.dv_xname, target, lun); 1870 #endif 1871 return; 1872 } 1873 /* count how many free targets we still have to probe */ 1874 ntargets = sc->sc_chan.chan_ntargets - 1 - sc->sc_ntargets; 1875 1876 /* 1877 * we need 8 bytes for the lun sw additionnal entry, and 1878 * eventually sizeof(tag_switch) for the tag switch entry. 1879 * Keep enouth free space for the free targets that could be 1880 * probed later. 1881 */ 1882 if (sc->script_free_lo + 2 + 1883 (ntargets * sizeof(lun_switch) / sizeof(lun_switch[0])) >= 1884 ((sc->targets[target]->flags & TARF_TAG) ? 1885 sc->script_free_hi - (sizeof(tag_switch) / sizeof(tag_switch[0])) : 1886 sc->script_free_hi)) { 1887 /* 1888 * not enouth space, probably not worth dealing with it. 1889 * We can hold 13 tagged-queuing capable devices in the 4k RAM. 1890 */ 1891 #ifdef DEBUG 1892 printf("%s:%d:%d: not enouth memory for a lun sw slot\n", 1893 sc->sc_dev.dv_xname, target, lun); 1894 #endif 1895 return; 1896 } 1897 #ifdef SIOP_DEBUG 1898 printf("%s:%d:%d: allocate lun sw entry\n", 1899 sc->sc_dev.dv_xname, target, lun); 1900 #endif 1901 /* INT int_resellun */ 1902 siop_script_write(sc, sc->script_free_lo, 0x98080000); 1903 siop_script_write(sc, sc->script_free_lo + 1, A_int_resellun); 1904 /* Now the slot entry: JUMP abs_foo, IF lun */ 1905 siop_script_write(sc, sc->script_free_lo - 2, 1906 0x800c0000 | lun); 1907 siop_script_write(sc, sc->script_free_lo - 1, 0); 1908 siop_lun->reseloff = sc->script_free_lo - 2; 1909 lunsw->lunsw_size += 2; 1910 sc->script_free_lo += 2; 1911 if (sc->targets[target]->flags & TARF_TAG) { 1912 /* we need a tag switch */ 1913 sc->script_free_hi -= 1914 sizeof(tag_switch) / sizeof(tag_switch[0]); 1915 if (sc->features & SF_CHIP_RAM) { 1916 bus_space_write_region_4(sc->sc_ramt, sc->sc_ramh, 1917 sc->script_free_hi * 4, tag_switch, 1918 sizeof(tag_switch) / sizeof(tag_switch[0])); 1919 } else { 1920 for(i = 0; 1921 i < sizeof(tag_switch) / sizeof(tag_switch[0]); 1922 i++) { 1923 sc->sc_script[sc->script_free_hi + i] = 1924 htole32(tag_switch[i]); 1925 } 1926 } 1927 siop_script_write(sc, 1928 siop_lun->reseloff + 1, 1929 sc->sc_scriptaddr + sc->script_free_hi * 4 + 1930 Ent_tag_switch_entry); 1931 1932 for (i = 0; i < SIOP_NTAG; i++) { 1933 siop_lun->siop_tag[i].reseloff = 1934 sc->script_free_hi + (Ent_resel_tag0 / 4) + i * 2; 1935 } 1936 } else { 1937 /* non-tag case; just work with the lun switch */ 1938 siop_lun->siop_tag[0].reseloff = 1939 sc->targets[target]->siop_lun[lun]->reseloff; 1940 } 1941 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1942 } 1943 1944 void 1945 siop_del_dev(sc, target, lun) 1946 struct siop_softc *sc; 1947 int target; 1948 int lun; 1949 { 1950 int i; 1951 #ifdef SIOP_DEBUG 1952 printf("%s:%d:%d: free lun sw entry\n", 1953 sc->sc_dev.dv_xname, target, lun); 1954 #endif 1955 if (sc->targets[target] == NULL) 1956 return; 1957 free(sc->targets[target]->siop_lun[lun], M_DEVBUF); 1958 sc->targets[target]->siop_lun[lun] = NULL; 1959 /* XXX compact sw entry too ? */ 1960 /* check if we can free the whole target */ 1961 for (i = 0; i < 8; i++) { 1962 if (sc->targets[target]->siop_lun[i] != NULL) 1963 return; 1964 } 1965 #ifdef SIOP_DEBUG 1966 printf("%s: free siop_target for target %d lun %d lunsw offset %d\n", 1967 sc->sc_dev.dv_xname, target, lun, 1968 sc->targets[target]->lunsw->lunsw_off); 1969 #endif 1970 /* 1971 * nothing here, free the target struct and resel 1972 * switch entry 1973 */ 1974 siop_script_write(sc, sc->targets[target]->reseloff, 0x800c00ff); 1975 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1976 TAILQ_INSERT_TAIL(&sc->lunsw_list, sc->targets[target]->lunsw, next); 1977 free(sc->targets[target], M_DEVBUF); 1978 sc->targets[target] = NULL; 1979 sc->sc_ntargets--; 1980 } 1981 1982 void 1983 siop_update_xfer_mode(sc, target) 1984 struct siop_softc *sc; 1985 int target; 1986 { 1987 struct siop_target *siop_target = sc->targets[target]; 1988 struct scsipi_xfer_mode xm; 1989 1990 xm.xm_target = target; 1991 xm.xm_mode = 0; 1992 xm.xm_period = 0; 1993 xm.xm_offset = 0; 1994 1995 if (siop_target->flags & TARF_ISWIDE) 1996 xm.xm_mode |= PERIPH_CAP_WIDE16; 1997 if (siop_target->period) { 1998 xm.xm_period = siop_target->period; 1999 xm.xm_offset = siop_target->offset; 2000 xm.xm_mode |= PERIPH_CAP_SYNC; 2001 } 2002 if (siop_target->flags & TARF_TAG) 2003 xm.xm_mode |= PERIPH_CAP_TQING; 2004 scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_XFER_MODE, &xm); 2005 } 2006 2007 #ifdef SIOP_STATS 2008 void 2009 siop_printstats() 2010 { 2011 printf("siop_stat_intr %d\n", siop_stat_intr); 2012 printf("siop_stat_intr_shortxfer %d\n", siop_stat_intr_shortxfer); 2013 printf("siop_stat_intr_xferdisc %d\n", siop_stat_intr_xferdisc); 2014 printf("siop_stat_intr_sdp %d\n", siop_stat_intr_sdp); 2015 printf("siop_stat_intr_done %d\n", siop_stat_intr_done); 2016 printf("siop_stat_intr_lunresel %d\n", siop_stat_intr_lunresel); 2017 printf("siop_stat_intr_qfull %d\n", siop_stat_intr_qfull); 2018 } 2019 #endif 2020
Indexes created Mon Oct 20 03:09:53 GMT 2025