siop.c revision 1.37.2.7
1 /* $NetBSD: siop.c,v 1.37.2.7 2001/01/22 17:46:31 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */ 34 35 #include <sys/param.h> 36 #include <sys/systm.h> 37 #include <sys/device.h> 38 #include <sys/malloc.h> 39 #include <sys/buf.h> 40 #include <sys/kernel.h> 41 42 #include <uvm/uvm_extern.h> 43 44 #include <machine/endian.h> 45 #include <machine/bus.h> 46 47 #include <dev/microcode/siop/siop.out> 48 49 #include <dev/scsipi/scsi_all.h> 50 #include <dev/scsipi/scsi_message.h> 51 #include <dev/scsipi/scsipi_all.h> 52 53 #include <dev/scsipi/scsiconf.h> 54 55 #include <dev/ic/siopreg.h> 56 #include <dev/ic/siopvar.h> 57 #include <dev/ic/siopvar_common.h> 58 59 #ifndef DEBUG 60 #undef DEBUG 61 #endif 62 #undef SIOP_DEBUG 63 #undef SIOP_DEBUG_DR 64 #undef SIOP_DEBUG_INTR 65 #undef SIOP_DEBUG_SCHED 66 #undef DUMP_SCRIPT 67 68 #define SIOP_STATS 69 70 #ifndef SIOP_DEFAULT_TARGET 71 #define SIOP_DEFAULT_TARGET 7 72 #endif 73 74 /* number of cmd descriptors per block */ 75 #define SIOP_NCMDPB (PAGE_SIZE / sizeof(struct siop_xfer)) 76 77 /* Number of scheduler slot (needs to match script) */ 78 #define SIOP_NSLOTS 40 79 80 void siop_reset __P((struct siop_softc *)); 81 void siop_handle_reset __P((struct siop_softc *)); 82 int siop_handle_qtag_reject __P((struct siop_cmd *)); 83 void siop_scsicmd_end __P((struct siop_cmd *)); 84 void siop_unqueue __P((struct siop_softc *, int, int)); 85 void siop_start __P((struct siop_softc *)); 86 void siop_timeout __P((void *)); 87 int siop_scsicmd __P((struct scsipi_xfer *)); 88 void siop_scsipi_request __P((struct scsipi_channel *, 89 scsipi_adapter_req_t, void *)); 90 void siop_dump_script __P((struct siop_softc *)); 91 int siop_morecbd __P((struct siop_softc *)); 92 struct siop_lunsw *siop_get_lunsw __P((struct siop_softc *)); 93 void siop_add_reselsw __P((struct siop_softc *, int)); 94 void siop_update_scntl3 __P((struct siop_softc *, struct siop_target *)); 95 96 #ifdef SIOP_STATS 97 static int siop_stat_intr = 0; 98 static int siop_stat_intr_shortxfer = 0; 99 static int siop_stat_intr_sdp = 0; 100 static int siop_stat_intr_done = 0; 101 static int siop_stat_intr_xferdisc = 0; 102 static int siop_stat_intr_lunresel = 0; 103 static int siop_stat_intr_qfull = 0; 104 void siop_printstats __P((void)); 105 #define INCSTAT(x) x++ 106 #else 107 #define INCSTAT(x) 108 #endif 109 110 static __inline__ void siop_script_sync __P((struct siop_softc *, int)); 111 static __inline__ void 112 siop_script_sync(sc, ops) 113 struct siop_softc *sc; 114 int ops; 115 { 116 if ((sc->features & SF_CHIP_RAM) == 0) 117 bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, 0, 118 PAGE_SIZE, ops); 119 } 120 121 static __inline__ u_int32_t siop_script_read __P((struct siop_softc *, u_int)); 122 static __inline__ u_int32_t 123 siop_script_read(sc, offset) 124 struct siop_softc *sc; 125 u_int offset; 126 { 127 if (sc->features & SF_CHIP_RAM) { 128 return bus_space_read_4(sc->sc_ramt, sc->sc_ramh, offset * 4); 129 } else { 130 return le32toh(sc->sc_script[offset]); 131 } 132 } 133 134 static __inline__ void siop_script_write __P((struct siop_softc *, u_int, 135 u_int32_t)); 136 static __inline__ void 137 siop_script_write(sc, offset, val) 138 struct siop_softc *sc; 139 u_int offset; 140 u_int32_t val; 141 { 142 if (sc->features & SF_CHIP_RAM) { 143 bus_space_write_4(sc->sc_ramt, sc->sc_ramh, offset * 4, val); 144 } else { 145 sc->sc_script[offset] = htole32(val); 146 } 147 } 148 149 void 150 siop_attach(sc) 151 struct siop_softc *sc; 152 { 153 int error, i; 154 bus_dma_segment_t seg; 155 int rseg; 156 157 /* 158 * Allocate DMA-safe memory for the script and map it. 159 */ 160 if ((sc->features & SF_CHIP_RAM) == 0) { 161 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, 162 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT); 163 if (error) { 164 printf("%s: unable to allocate script DMA memory, " 165 "error = %d\n", sc->sc_dev.dv_xname, error); 166 return; 167 } 168 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE, 169 (caddr_t *)&sc->sc_script, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 170 if (error) { 171 printf("%s: unable to map script DMA memory, " 172 "error = %d\n", sc->sc_dev.dv_xname, error); 173 return; 174 } 175 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, 176 PAGE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma); 177 if (error) { 178 printf("%s: unable to create script DMA map, " 179 "error = %d\n", sc->sc_dev.dv_xname, error); 180 return; 181 } 182 error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma, 183 sc->sc_script, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 184 if (error) { 185 printf("%s: unable to load script DMA map, " 186 "error = %d\n", sc->sc_dev.dv_xname, error); 187 return; 188 } 189 sc->sc_scriptaddr = sc->sc_scriptdma->dm_segs[0].ds_addr; 190 sc->ram_size = PAGE_SIZE; 191 } 192 TAILQ_INIT(&sc->free_list); 193 TAILQ_INIT(&sc->ready_list); 194 TAILQ_INIT(&sc->urgent_list); 195 TAILQ_INIT(&sc->cmds); 196 TAILQ_INIT(&sc->lunsw_list); 197 sc->sc_currschedslot = 0; 198 #ifdef SIOP_DEBUG 199 printf("%s: script size = %d, PHY addr=0x%x, VIRT=%p\n", 200 sc->sc_dev.dv_xname, (int)sizeof(siop_script), 201 (u_int32_t)sc->sc_scriptaddr, sc->sc_script); 202 #endif 203 204 sc->sc_adapt.adapt_dev = &sc->sc_dev; 205 sc->sc_adapt.adapt_nchannels = 1; 206 sc->sc_adapt.adapt_openings = 225; 207 sc->sc_adapt.adapt_max_periph = SIOP_NTAG - 1; 208 sc->sc_adapt.adapt_ioctl = siop_ioctl; 209 sc->sc_adapt.adapt_minphys = minphys; 210 sc->sc_adapt.adapt_request = siop_scsipi_request; 211 212 memset(&sc->sc_chan, 0, sizeof(sc->sc_chan)); 213 sc->sc_chan.chan_adapter = &sc->sc_adapt; 214 sc->sc_chan.chan_bustype = &scsi_bustype; 215 sc->sc_chan.chan_channel = 0; 216 sc->sc_chan.chan_ntargets = (sc->features & SF_BUS_WIDE) ? 16 : 8; 217 sc->sc_chan.chan_nluns = 8; 218 sc->sc_chan.chan_id = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCID); 219 if (sc->sc_chan.chan_id == 0 || 220 sc->sc_chan.chan_id >= sc->sc_chan.chan_ntargets) 221 sc->sc_chan.chan_id = SIOP_DEFAULT_TARGET; 222 223 for (i = 0; i < 16; i++) 224 sc->targets[i] = NULL; 225 226 /* find min/max sync period for this chip */ 227 sc->maxsync = 0; 228 sc->minsync = 255; 229 for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]); i++) { 230 if (sc->clock_period != scf_period[i].clock) 231 continue; 232 if (sc->maxsync < scf_period[i].period) 233 sc->maxsync = scf_period[i].period; 234 if (sc->minsync > scf_period[i].period) 235 sc->minsync = scf_period[i].period; 236 } 237 if (sc->maxsync == 255 || sc->minsync == 0) 238 panic("siop: can't find my sync parameters\n"); 239 /* Do a bus reset, so that devices fall back to narrow/async */ 240 siop_resetbus(sc); 241 /* 242 * siop_reset() will reset the chip, thus clearing pending interrupts 243 */ 244 siop_reset(sc); 245 #ifdef DUMP_SCRIPT 246 siop_dump_script(sc); 247 #endif 248 249 config_found((struct device*)sc, &sc->sc_chan, scsiprint); 250 } 251 252 void 253 siop_reset(sc) 254 struct siop_softc *sc; 255 { 256 int i, j; 257 struct siop_lunsw *lunsw; 258 259 siop_common_reset(sc); 260 261 /* copy and patch the script */ 262 if (sc->features & SF_CHIP_RAM) { 263 bus_space_write_region_4(sc->sc_ramt, sc->sc_ramh, 0, 264 siop_script, sizeof(siop_script) / sizeof(siop_script[0])); 265 for (j = 0; j < 266 (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0])); 267 j++) { 268 bus_space_write_4(sc->sc_ramt, sc->sc_ramh, 269 E_abs_msgin_Used[j] * 4, 270 sc->sc_scriptaddr + Ent_msgin_space); 271 } 272 } else { 273 for (j = 0; 274 j < (sizeof(siop_script) / sizeof(siop_script[0])); j++) { 275 sc->sc_script[j] = htole32(siop_script[j]); 276 } 277 for (j = 0; j < 278 (sizeof(E_abs_msgin_Used) / sizeof(E_abs_msgin_Used[0])); 279 j++) { 280 sc->sc_script[E_abs_msgin_Used[j]] = 281 htole32(sc->sc_scriptaddr + Ent_msgin_space); 282 } 283 } 284 sc->script_free_lo = sizeof(siop_script) / sizeof(siop_script[0]); 285 sc->script_free_hi = sc->ram_size / 4; 286 287 /* free used and unused lun switches */ 288 while((lunsw = TAILQ_FIRST(&sc->lunsw_list)) != NULL) { 289 #ifdef SIOP_DEBUG 290 printf("%s: free lunsw at offset %d\n", 291 sc->sc_dev.dv_xname, lunsw->lunsw_off); 292 #endif 293 TAILQ_REMOVE(&sc->lunsw_list, lunsw, next); 294 free(lunsw, M_DEVBUF); 295 } 296 TAILQ_INIT(&sc->lunsw_list); 297 /* restore reselect switch */ 298 for (i = 0; i < sc->sc_chan.chan_ntargets; i++) { 299 if (sc->targets[i] == NULL) 300 continue; 301 #ifdef SIOP_DEBUG 302 printf("%s: restore sw for target %d\n", 303 sc->sc_dev.dv_xname, i); 304 #endif 305 free(sc->targets[i]->lunsw, M_DEVBUF); 306 sc->targets[i]->lunsw = siop_get_lunsw(sc); 307 if (sc->targets[i]->lunsw == NULL) { 308 printf("%s: can't alloc lunsw for target %d\n", 309 sc->sc_dev.dv_xname, i); 310 break; 311 } 312 siop_add_reselsw(sc, i); 313 } 314 315 /* start script */ 316 if ((sc->features & SF_CHIP_RAM) == 0) { 317 bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, 0, PAGE_SIZE, 318 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 319 } 320 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, 321 sc->sc_scriptaddr + Ent_reselect); 322 } 323 324 #if 0 325 #define CALL_SCRIPT(ent) do {\ 326 printf ("start script DSA 0x%lx DSP 0x%lx\n", \ 327 siop_cmd->dsa, \ 328 sc->sc_scriptaddr + ent); \ 329 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, sc->sc_scriptaddr + ent); \ 330 } while (0) 331 #else 332 #define CALL_SCRIPT(ent) do {\ 333 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, sc->sc_scriptaddr + ent); \ 334 } while (0) 335 #endif 336 337 int 338 siop_intr(v) 339 void *v; 340 { 341 struct siop_softc *sc = v; 342 struct siop_target *siop_target; 343 struct siop_cmd *siop_cmd; 344 struct siop_lun *siop_lun; 345 struct scsipi_xfer *xs; 346 int istat, sist, sstat1, dstat; 347 u_int32_t irqcode; 348 int need_reset = 0; 349 int offset, target, lun, tag; 350 bus_addr_t dsa; 351 struct siop_cbd *cbdp; 352 int freetarget = 0; 353 int restart = 0; 354 355 istat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT); 356 if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0) 357 return 0; 358 INCSTAT(siop_stat_intr); 359 if (istat & ISTAT_INTF) { 360 printf("INTRF\n"); 361 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_INTF); 362 } 363 /* use DSA to find the current siop_cmd */ 364 dsa = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA); 365 for (cbdp = TAILQ_FIRST(&sc->cmds); cbdp != NULL; 366 cbdp = TAILQ_NEXT(cbdp, next)) { 367 if (dsa >= cbdp->xferdma->dm_segs[0].ds_addr && 368 dsa < cbdp->xferdma->dm_segs[0].ds_addr + PAGE_SIZE) { 369 dsa -= cbdp->xferdma->dm_segs[0].ds_addr; 370 siop_cmd = &cbdp->cmds[dsa / sizeof(struct siop_xfer)]; 371 siop_table_sync(siop_cmd, 372 BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 373 break; 374 } 375 } 376 if (cbdp == NULL) { 377 siop_cmd = NULL; 378 } 379 if (siop_cmd) { 380 xs = siop_cmd->xs; 381 siop_target = siop_cmd->siop_target; 382 target = siop_cmd->xs->xs_periph->periph_target; 383 lun = siop_cmd->xs->xs_periph->periph_lun; 384 tag = siop_cmd->tag; 385 siop_lun = siop_target->siop_lun[lun]; 386 #ifdef DIAGNOSTIC 387 if (siop_cmd->status != CMDST_ACTIVE) { 388 printf("siop_cmd (lun %d) not active (%d)\n", 389 lun, siop_cmd->status); 390 xs = NULL; 391 siop_target = NULL; 392 target = -1; 393 lun = -1; 394 tag = -1; 395 siop_lun = NULL; 396 siop_cmd = NULL; 397 } else if (siop_lun->siop_tag[tag].active != siop_cmd) { 398 printf("siop_cmd (lun %d tag %d) not in siop_lun " 399 "active (%p != %p)\n", lun, tag, siop_cmd, 400 siop_lun->siop_tag[tag].active); 401 } 402 #endif 403 } else { 404 xs = NULL; 405 siop_target = NULL; 406 target = -1; 407 lun = -1; 408 tag = -1; 409 siop_lun = NULL; 410 } 411 if (istat & ISTAT_DIP) { 412 dstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DSTAT); 413 if (dstat & DSTAT_SSI) { 414 printf("single step dsp 0x%08x dsa 0x08%x\n", 415 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 416 sc->sc_scriptaddr), 417 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA)); 418 if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 && 419 (istat & ISTAT_SIP) == 0) { 420 bus_space_write_1(sc->sc_rt, sc->sc_rh, 421 SIOP_DCNTL, bus_space_read_1(sc->sc_rt, 422 sc->sc_rh, SIOP_DCNTL) | DCNTL_STD); 423 } 424 return 1; 425 } 426 if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) { 427 printf("DMA IRQ:"); 428 if (dstat & DSTAT_IID) 429 printf(" Illegal instruction"); 430 if (dstat & DSTAT_ABRT) 431 printf(" abort"); 432 if (dstat & DSTAT_BF) 433 printf(" bus fault"); 434 if (dstat & DSTAT_MDPE) 435 printf(" parity"); 436 if (dstat & DSTAT_DFE) 437 printf(" dma fifo empty"); 438 printf(", DSP=0x%x DSA=0x%x: ", 439 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 440 sc->sc_scriptaddr), 441 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA)); 442 if (siop_cmd) 443 printf("last msg_in=0x%x status=0x%x\n", 444 siop_cmd->siop_tables.msg_in[0], 445 le32toh(siop_cmd->siop_tables.status)); 446 else 447 printf("%s: current DSA invalid\n", 448 sc->sc_dev.dv_xname); 449 need_reset = 1; 450 } 451 } 452 if (istat & ISTAT_SIP) { 453 if (istat & ISTAT_DIP) 454 delay(10); 455 /* 456 * Can't read sist0 & sist1 independantly, or we have to 457 * insert delay 458 */ 459 sist = bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_SIST0); 460 sstat1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1); 461 #ifdef SIOP_DEBUG_INTR 462 printf("scsi interrupt, sist=0x%x sstat1=0x%x " 463 "DSA=0x%x DSP=0x%lx\n", sist, 464 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1), 465 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA), 466 (u_long)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 467 sc->sc_scriptaddr)); 468 #endif 469 if (sist & SIST0_RST) { 470 siop_handle_reset(sc); 471 siop_start(sc); 472 /* no table to flush here */ 473 return 1; 474 } 475 if (sist & SIST0_SGE) { 476 if (siop_cmd) 477 scsipi_printaddr(xs->xs_periph); 478 else 479 printf("%s:", sc->sc_dev.dv_xname); 480 printf("scsi gross error\n"); 481 goto reset; 482 } 483 if ((sist & SIST0_MA) && need_reset == 0) { 484 if (siop_cmd) { 485 int scratcha0; 486 dstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, 487 SIOP_DSTAT); 488 /* 489 * first restore DSA, in case we were in a S/G 490 * operation. 491 */ 492 bus_space_write_4(sc->sc_rt, sc->sc_rh, 493 SIOP_DSA, siop_cmd->dsa); 494 scratcha0 = bus_space_read_1(sc->sc_rt, 495 sc->sc_rh, SIOP_SCRATCHA); 496 switch (sstat1 & SSTAT1_PHASE_MASK) { 497 case SSTAT1_PHASE_STATUS: 498 /* 499 * previous phase may be aborted for any reason 500 * ( for example, the target has less data to 501 * transfer than requested). Just go to status 502 * and the command should terminate. 503 */ 504 INCSTAT(siop_stat_intr_shortxfer); 505 if ((dstat & DSTAT_DFE) == 0) 506 siop_clearfifo(sc); 507 /* no table to flush here */ 508 CALL_SCRIPT(Ent_status); 509 return 1; 510 case SSTAT1_PHASE_MSGIN: 511 /* 512 * target may be ready to disconnect 513 * Save data pointers just in case. 514 */ 515 INCSTAT(siop_stat_intr_xferdisc); 516 if (scratcha0 & A_flag_data) 517 siop_sdp(siop_cmd); 518 else if ((dstat & DSTAT_DFE) == 0) 519 siop_clearfifo(sc); 520 bus_space_write_1(sc->sc_rt, sc->sc_rh, 521 SIOP_SCRATCHA, 522 scratcha0 & ~A_flag_data); 523 siop_table_sync(siop_cmd, 524 BUS_DMASYNC_PREREAD | 525 BUS_DMASYNC_PREWRITE); 526 CALL_SCRIPT(Ent_msgin); 527 return 1; 528 } 529 printf("%s: unexpected phase mismatch %d\n", 530 sc->sc_dev.dv_xname, 531 sstat1 & SSTAT1_PHASE_MASK); 532 } else { 533 printf("%s: phase mismatch without command\n", 534 sc->sc_dev.dv_xname); 535 } 536 need_reset = 1; 537 } 538 if (sist & SIST0_PAR) { 539 /* parity error, reset */ 540 if (siop_cmd) 541 scsipi_printaddr(xs->xs_periph); 542 else 543 printf("%s:", sc->sc_dev.dv_xname); 544 printf("parity error\n"); 545 goto reset; 546 } 547 if ((sist & (SIST1_STO << 8)) && need_reset == 0) { 548 /* selection time out, assume there's no device here */ 549 if (siop_cmd) { 550 siop_cmd->status = CMDST_DONE; 551 xs->error = XS_SELTIMEOUT; 552 freetarget = 1; 553 goto end; 554 } else { 555 printf("%s: selection timeout without " 556 "command\n", sc->sc_dev.dv_xname); 557 need_reset = 1; 558 } 559 } 560 if (sist & SIST0_UDC) { 561 /* 562 * unexpected disconnect. Usually the target signals 563 * a fatal condition this way. Attempt to get sense. 564 */ 565 if (siop_cmd) { 566 siop_cmd->siop_tables.status = 567 htole32(SCSI_CHECK); 568 goto end; 569 } 570 printf("%s: unexpected disconnect without " 571 "command\n", sc->sc_dev.dv_xname); 572 goto reset; 573 } 574 if (sist & (SIST1_SBMC << 8)) { 575 /* SCSI bus mode change */ 576 if (siop_modechange(sc) == 0 || need_reset == 1) 577 goto reset; 578 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { 579 /* 580 * we have a script interrupt, it will 581 * restart the script. 582 */ 583 goto scintr; 584 } 585 /* 586 * else we have to restart it ourselve, at the 587 * interrupted instruction. 588 */ 589 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, 590 bus_space_read_4(sc->sc_rt, sc->sc_rh, 591 SIOP_DSP) - 8); 592 return 1; 593 } 594 /* Else it's an unhandled exeption (for now). */ 595 printf("%s: unhandled scsi interrupt, sist=0x%x sstat1=0x%x " 596 "DSA=0x%x DSP=0x%x\n", sc->sc_dev.dv_xname, sist, 597 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1), 598 bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA), 599 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) - 600 sc->sc_scriptaddr)); 601 if (siop_cmd) { 602 siop_cmd->status = CMDST_DONE; 603 xs->error = XS_SELTIMEOUT; 604 goto end; 605 } 606 need_reset = 1; 607 } 608 if (need_reset) { 609 reset: 610 /* fatal error, reset the bus */ 611 siop_resetbus(sc); 612 /* no table to flush here */ 613 return 1; 614 } 615 616 scintr: 617 if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */ 618 irqcode = bus_space_read_4(sc->sc_rt, sc->sc_rh, 619 SIOP_DSPS); 620 #ifdef SIOP_DEBUG_INTR 621 printf("script interrupt 0x%x\n", irqcode); 622 #endif 623 /* 624 * no command, or an inactive command is only valid for a 625 * reselect interrupt 626 */ 627 if ((irqcode & 0x80) == 0) { 628 if (siop_cmd == NULL) { 629 printf("%s: script interrupt (0x%x) with 630 invalid DSA !!!\n", sc->sc_dev.dv_xname, 631 irqcode); 632 goto reset; 633 } 634 if (siop_cmd->status != CMDST_ACTIVE) { 635 printf("%s: command with invalid status " 636 "(IRQ code 0x%x current status %d) !\n", 637 sc->sc_dev.dv_xname, 638 irqcode, siop_cmd->status); 639 xs = NULL; 640 } 641 } 642 switch(irqcode) { 643 case A_int_err: 644 printf("error, DSP=0x%x\n", 645 (int)(bus_space_read_4(sc->sc_rt, sc->sc_rh, 646 SIOP_DSP) - sc->sc_scriptaddr)); 647 if (xs) { 648 xs->error = XS_SELTIMEOUT; 649 goto end; 650 } else { 651 goto reset; 652 } 653 case A_int_reseltarg: 654 printf("%s: reselect with invalid target\n", 655 sc->sc_dev.dv_xname); 656 goto reset; 657 case A_int_resellun: 658 INCSTAT(siop_stat_intr_lunresel); 659 target = bus_space_read_1(sc->sc_rt, sc->sc_rh, 660 SIOP_SCRATCHA) & 0xf; 661 lun = bus_space_read_1(sc->sc_rt, sc->sc_rh, 662 SIOP_SCRATCHA + 1); 663 tag = bus_space_read_1(sc->sc_rt, sc->sc_rh, 664 SIOP_SCRATCHA + 2); 665 siop_target = sc->targets[target]; 666 if (siop_target == NULL) { 667 printf("%s: reselect with invalid " 668 "target %d\n", sc->sc_dev.dv_xname, target); 669 goto reset; 670 } 671 siop_lun = siop_target->siop_lun[lun]; 672 if (siop_lun == NULL) { 673 printf("%s: target %d reselect with invalid " 674 "lun %d\n", sc->sc_dev.dv_xname, 675 target, lun); 676 goto reset; 677 } 678 if (siop_lun->siop_tag[tag].active == NULL) { 679 printf("%s: target %d lun %d tag %d reselect " 680 "without command\n", sc->sc_dev.dv_xname, 681 target, lun, tag); 682 goto reset; 683 } 684 siop_cmd = siop_lun->siop_tag[tag].active; 685 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, 686 siop_cmd->dsa + sizeof(struct siop_xfer_common) + 687 Ent_ldsa_reload_dsa); 688 return 1; 689 case A_int_reseltag: 690 printf("%s: reselect with invalid tag\n", 691 sc->sc_dev.dv_xname); 692 goto reset; 693 case A_int_msgin: 694 { 695 int msgin = bus_space_read_1(sc->sc_rt, sc->sc_rh, 696 SIOP_SFBR); 697 if (msgin == MSG_MESSAGE_REJECT) { 698 int msg, extmsg; 699 if (siop_cmd->siop_tables.msg_out[0] & 0x80) { 700 /* 701 * message was part of a identify + 702 * something else. Identify shoudl't 703 * have been rejected. 704 */ 705 msg = siop_cmd->siop_tables.msg_out[1]; 706 extmsg = 707 siop_cmd->siop_tables.msg_out[3]; 708 } else { 709 msg = siop_cmd->siop_tables.msg_out[0]; 710 extmsg = 711 siop_cmd->siop_tables.msg_out[2]; 712 } 713 if (msg == MSG_MESSAGE_REJECT) { 714 /* MSG_REJECT for a MSG_REJECT !*/ 715 if (xs) 716 scsipi_printaddr(xs->xs_periph); 717 else 718 printf("%s: ", 719 sc->sc_dev.dv_xname); 720 printf("our reject message was " 721 "rejected\n"); 722 goto reset; 723 } 724 if (msg == MSG_EXTENDED && 725 extmsg == MSG_EXT_WDTR) { 726 /* WDTR rejected, initiate sync */ 727 if ((siop_target->flags & TARF_SYNC) 728 == 0) { 729 siop_target->status = TARST_OK; 730 siop_update_xfer_mode(sc, 731 target); 732 /* no table to flush here */ 733 CALL_SCRIPT(Ent_msgin_ack); 734 return 1; 735 } 736 siop_target->status = TARST_SYNC_NEG; 737 siop_sdtr_msg(siop_cmd, 0, 738 sc->minsync, sc->maxoff); 739 siop_table_sync(siop_cmd, 740 BUS_DMASYNC_PREREAD | 741 BUS_DMASYNC_PREWRITE); 742 CALL_SCRIPT(Ent_send_msgout); 743 return 1; 744 } else if (msg == MSG_EXTENDED && 745 extmsg == MSG_EXT_SDTR) { 746 /* sync rejected */ 747 siop_target->offset = 0; 748 siop_target->period = 0; 749 siop_target->status = TARST_OK; 750 siop_update_xfer_mode(sc, target); 751 /* no table to flush here */ 752 CALL_SCRIPT(Ent_msgin_ack); 753 return 1; 754 } else if (msg == MSG_SIMPLE_Q_TAG || 755 msg == MSG_HEAD_OF_Q_TAG || 756 msg == MSG_ORDERED_Q_TAG) { 757 if (siop_handle_qtag_reject( 758 siop_cmd) == -1) 759 goto reset; 760 CALL_SCRIPT(Ent_msgin_ack); 761 return 1; 762 } 763 if (xs) 764 scsipi_printaddr(xs->xs_periph); 765 else 766 printf("%s: ", sc->sc_dev.dv_xname); 767 if (msg == MSG_EXTENDED) { 768 printf("scsi message reject, extended " 769 "message sent was 0x%x\n", extmsg); 770 } else { 771 printf("scsi message reject, message " 772 "sent was 0x%x\n", msg); 773 } 774 /* no table to flush here */ 775 CALL_SCRIPT(Ent_msgin_ack); 776 return 1; 777 } 778 if (xs) 779 scsipi_printaddr(xs->xs_periph); 780 else 781 printf("%s: ", sc->sc_dev.dv_xname); 782 printf("unhandled message 0x%x\n", 783 siop_cmd->siop_tables.msg_in[0]); 784 siop_cmd->siop_tables.msg_out[0] = MSG_MESSAGE_REJECT; 785 siop_cmd->siop_tables.t_msgout.count= htole32(1); 786 siop_table_sync(siop_cmd, 787 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 788 CALL_SCRIPT(Ent_send_msgout); 789 return 1; 790 } 791 case A_int_extmsgin: 792 #ifdef SIOP_DEBUG_INTR 793 printf("extended message: msg 0x%x len %d\n", 794 siop_cmd->siop_tables.msg_in[2], 795 siop_cmd->siop_tables.msg_in[1]); 796 #endif 797 if (siop_cmd->siop_tables.msg_in[1] > 6) 798 printf("%s: extended message too big (%d)\n", 799 sc->sc_dev.dv_xname, 800 siop_cmd->siop_tables.msg_in[1]); 801 siop_cmd->siop_tables.t_extmsgdata.count = 802 htole32(siop_cmd->siop_tables.msg_in[1] - 1); 803 siop_table_sync(siop_cmd, 804 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 805 CALL_SCRIPT(Ent_get_extmsgdata); 806 return 1; 807 case A_int_extmsgdata: 808 #ifdef SIOP_DEBUG_INTR 809 { 810 int i; 811 printf("extended message: 0x%x, data:", 812 siop_cmd->siop_tables.msg_in[2]); 813 for (i = 3; i < 2 + siop_cmd->siop_tables.msg_in[1]; 814 i++) 815 printf(" 0x%x", 816 siop_cmd->siop_tables.msg_in[i]); 817 printf("\n"); 818 } 819 #endif 820 if (siop_cmd->siop_tables.msg_in[2] == MSG_EXT_WDTR) { 821 switch (siop_wdtr_neg(siop_cmd)) { 822 case SIOP_NEG_MSGOUT: 823 siop_update_scntl3(sc, 824 siop_cmd->siop_target); 825 siop_table_sync(siop_cmd, 826 BUS_DMASYNC_PREREAD | 827 BUS_DMASYNC_PREWRITE); 828 CALL_SCRIPT(Ent_send_msgout); 829 return(1); 830 case SIOP_NEG_ACK: 831 siop_update_scntl3(sc, 832 siop_cmd->siop_target); 833 CALL_SCRIPT(Ent_msgin_ack); 834 return(1); 835 default: 836 panic("invalid retval from " 837 "siop_wdtr_neg()"); 838 } 839 return(1); 840 } 841 if (siop_cmd->siop_tables.msg_in[2] == MSG_EXT_SDTR) { 842 switch (siop_sdtr_neg(siop_cmd)) { 843 case SIOP_NEG_MSGOUT: 844 siop_update_scntl3(sc, 845 siop_cmd->siop_target); 846 siop_table_sync(siop_cmd, 847 BUS_DMASYNC_PREREAD | 848 BUS_DMASYNC_PREWRITE); 849 CALL_SCRIPT(Ent_send_msgout); 850 return(1); 851 case SIOP_NEG_ACK: 852 siop_update_scntl3(sc, 853 siop_cmd->siop_target); 854 CALL_SCRIPT(Ent_msgin_ack); 855 return(1); 856 default: 857 panic("invalid retval from " 858 "siop_wdtr_neg()"); 859 } 860 return(1); 861 } 862 /* send a message reject */ 863 siop_cmd->siop_tables.msg_out[0] = MSG_MESSAGE_REJECT; 864 siop_cmd->siop_tables.t_msgout.count = htole32(1); 865 siop_table_sync(siop_cmd, 866 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 867 CALL_SCRIPT(Ent_send_msgout); 868 return 1; 869 case A_int_disc: 870 INCSTAT(siop_stat_intr_sdp); 871 offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, 872 SIOP_SCRATCHA + 1); 873 #ifdef SIOP_DEBUG_DR 874 printf("disconnect offset %d\n", offset); 875 #endif 876 if (offset > SIOP_NSG) { 877 printf("%s: bad offset for disconnect (%d)\n", 878 sc->sc_dev.dv_xname, offset); 879 goto reset; 880 } 881 /* 882 * offset == SIOP_NSG may be a valid condition if 883 * we get a sdp when the xfer is done. 884 * Don't call memmove in this case. 885 */ 886 if (offset < SIOP_NSG) { 887 memmove(&siop_cmd->siop_tables.data[0], 888 &siop_cmd->siop_tables.data[offset], 889 (SIOP_NSG - offset) * sizeof(scr_table_t)); 890 siop_table_sync(siop_cmd, 891 BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 892 } 893 CALL_SCRIPT(Ent_script_sched); 894 /* check if we can put some command in scheduler */ 895 siop_start(sc); 896 return 1; 897 case A_int_resfail: 898 printf("reselect failed\n"); 899 CALL_SCRIPT(Ent_script_sched); 900 return 1; 901 case A_int_done: 902 if (xs == NULL) { 903 printf("%s: done without command, DSA=0x%lx\n", 904 sc->sc_dev.dv_xname, (u_long)siop_cmd->dsa); 905 siop_cmd->status = CMDST_FREE; 906 siop_start(sc); 907 CALL_SCRIPT(Ent_script_sched); 908 return 1; 909 } 910 #ifdef SIOP_DEBUG_INTR 911 printf("done, DSA=0x%lx target id 0x%x last msg " 912 "in=0x%x status=0x%x\n", (u_long)siop_cmd->dsa, 913 le32toh(siop_cmd->siop_tables.id), 914 siop_cmd->siop_tables.msg_in[0], 915 le32toh(siop_cmd->siop_tables.status)); 916 #endif 917 INCSTAT(siop_stat_intr_done); 918 siop_cmd->status = CMDST_DONE; 919 goto end; 920 default: 921 printf("unknown irqcode %x\n", irqcode); 922 if (xs) { 923 xs->error = XS_SELTIMEOUT; 924 goto end; 925 } 926 goto reset; 927 } 928 return 1; 929 } 930 /* We just should't get there */ 931 panic("siop_intr: I shouldn't be there !"); 932 return 1; 933 end: 934 /* 935 * restart the script now if command completed properly 936 * Otherwise wait for siop_scsicmd_end(), we may need to cleanup the 937 * queue 938 */ 939 xs->status = le32toh(siop_cmd->siop_tables.status); 940 if (xs->status == SCSI_OK) 941 CALL_SCRIPT(Ent_script_sched); 942 else 943 restart = 1; 944 siop_lun->siop_tag[tag].active = NULL; 945 siop_scsicmd_end(siop_cmd); 946 if (freetarget && siop_target->status == TARST_PROBING) 947 siop_del_dev(sc, target, lun); 948 if (restart) 949 CALL_SCRIPT(Ent_script_sched); 950 siop_start(sc); 951 return 1; 952 } 953 954 void 955 siop_scsicmd_end(siop_cmd) 956 struct siop_cmd *siop_cmd; 957 { 958 struct scsipi_xfer *xs = siop_cmd->xs; 959 struct siop_softc *sc = siop_cmd->siop_sc; 960 961 switch(xs->status) { 962 case SCSI_OK: 963 xs->error = XS_NOERROR; 964 break; 965 case SCSI_BUSY: 966 xs->error = XS_BUSY; 967 break; 968 case SCSI_CHECK: 969 xs->error = XS_BUSY; 970 /* remove commands in the queue and scheduler */ 971 siop_unqueue(sc, xs->xs_periph->periph_target, 972 xs->xs_periph->periph_lun); 973 break; 974 case SCSI_QUEUE_FULL: 975 INCSTAT(siop_stat_intr_qfull); 976 #ifdef SIOP_DEBUG 977 printf("%s:%d:%d: queue full (tag %d)\n", sc->sc_dev.dv_xname, 978 xs->xs_periph->periph_target, 979 xs->xs_periph->periph_lun, siop_cmd->tag); 980 #endif 981 xs->error = XS_BUSY; 982 break; 983 case SCSI_SIOP_NOCHECK: 984 /* 985 * don't check status, xs->error is already valid 986 */ 987 break; 988 case SCSI_SIOP_NOSTATUS: 989 /* 990 * the status byte was not updated, cmd was 991 * aborted 992 */ 993 xs->error = XS_SELTIMEOUT; 994 break; 995 default: 996 xs->error = XS_DRIVER_STUFFUP; 997 } 998 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 999 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0, 1000 siop_cmd->dmamap_data->dm_mapsize, 1001 (xs->xs_control & XS_CTL_DATA_IN) ? 1002 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1003 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_data); 1004 } 1005 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd); 1006 callout_stop(&siop_cmd->xs->xs_callout); 1007 siop_cmd->status = CMDST_FREE; 1008 TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next); 1009 xs->resid = 0; 1010 scsipi_done (xs); 1011 } 1012 1013 void 1014 siop_unqueue(sc, target, lun) 1015 struct siop_softc *sc; 1016 int target; 1017 int lun; 1018 { 1019 int slot, tag; 1020 struct siop_cmd *siop_cmd, *next_siop_cmd; 1021 struct siop_lun *siop_lun = sc->targets[target]->siop_lun[lun]; 1022 1023 /* first make sure to read valid data */ 1024 siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1025 1026 for (tag = 1; tag < SIOP_NTAG; tag++) { 1027 /* look for commands in the scheduler, not yet started */ 1028 if (siop_lun->siop_tag[tag].active == NULL) 1029 continue; 1030 siop_cmd = siop_lun->siop_tag[tag].active; 1031 for (slot = 0; slot <= sc->sc_currschedslot; slot++) { 1032 if (siop_script_read(sc, 1033 (Ent_script_sched_slot0 / 4) + slot * 2 + 1) == 1034 siop_cmd->dsa + sizeof(struct siop_xfer_common) + 1035 Ent_ldsa_select) 1036 break; 1037 } 1038 if (slot > sc->sc_currschedslot) 1039 continue; /* didn't find it */ 1040 if (siop_script_read(sc, 1041 (Ent_script_sched_slot0 / 4) + slot * 2) == 0x80000000) 1042 continue; /* already started */ 1043 /* clear the slot */ 1044 siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2, 1045 0x80000000); 1046 /* ask to requeue */ 1047 siop_cmd->xs->error = XS_REQUEUE; 1048 siop_cmd->xs->status = SCSI_SIOP_NOCHECK; 1049 siop_lun->siop_tag[tag].active = NULL; 1050 siop_scsicmd_end(siop_cmd); 1051 } 1052 /* update sc_currschedslot */ 1053 sc->sc_currschedslot = 0; 1054 for (slot = 0; slot < SIOP_NSLOTS; slot++) { 1055 if (siop_script_read(sc, 1056 (Ent_script_sched_slot0 / 4) + slot * 2) != 0x80000000) 1057 sc->sc_currschedslot = slot; 1058 } 1059 /* clean up the urgent and ready lists */ 1060 for (siop_cmd = TAILQ_FIRST(&sc->urgent_list); siop_cmd != NULL; 1061 siop_cmd = next_siop_cmd) { 1062 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1063 if (siop_cmd->xs->xs_periph->periph_target == target && 1064 siop_cmd->xs->xs_periph->periph_lun == lun) { 1065 TAILQ_REMOVE(&sc->urgent_list, siop_cmd, next); 1066 siop_cmd->xs->error = XS_REQUEUE; 1067 siop_cmd->xs->status = SCSI_SIOP_NOCHECK; 1068 siop_scsicmd_end(siop_cmd); 1069 } 1070 } 1071 for (siop_cmd = TAILQ_FIRST(&sc->ready_list); siop_cmd != NULL; 1072 siop_cmd = next_siop_cmd) { 1073 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1074 if (siop_cmd->xs->xs_periph->periph_target == target && 1075 siop_cmd->xs->xs_periph->periph_lun == lun) { 1076 TAILQ_REMOVE(&sc->ready_list, siop_cmd, next); 1077 siop_cmd->xs->error = XS_REQUEUE; 1078 siop_cmd->xs->status = SCSI_SIOP_NOCHECK; 1079 siop_scsicmd_end(siop_cmd); 1080 } 1081 } 1082 } 1083 1084 /* 1085 * handle a rejected queue tag message: the command will run untagged, 1086 * has to adjust the reselect script. 1087 */ 1088 int 1089 siop_handle_qtag_reject(siop_cmd) 1090 struct siop_cmd *siop_cmd; 1091 { 1092 struct siop_softc *sc = siop_cmd->siop_sc; 1093 int target = siop_cmd->xs->xs_periph->periph_target; 1094 int lun = siop_cmd->xs->xs_periph->periph_lun; 1095 int tag = siop_cmd->siop_tables.msg_out[2]; 1096 struct siop_lun *siop_lun = sc->targets[target]->siop_lun[lun]; 1097 1098 #ifdef SIOP_DEBUG 1099 printf("%s:%d:%d: tag message %d (%d) rejected (status %d)\n", 1100 sc->sc_dev.dv_xname, target, lun, tag, siop_cmd->tag, 1101 siop_cmd->status); 1102 #endif 1103 1104 if (siop_lun->siop_tag[0].active != NULL) { 1105 printf("%s: untagged command already running for target %d " 1106 "lun %d (status %d)\n", sc->sc_dev.dv_xname, target, lun, 1107 siop_lun->siop_tag[0].active->status); 1108 return -1; 1109 } 1110 /* clear tag slot */ 1111 siop_lun->siop_tag[tag].active = NULL; 1112 /* add command to non-tagged slot */ 1113 siop_lun->siop_tag[0].active = siop_cmd; 1114 siop_cmd->tag = 0; 1115 /* adjust reselect script if there is one */ 1116 if (siop_lun->siop_tag[0].reseloff > 0) { 1117 siop_script_write(sc, 1118 siop_lun->siop_tag[0].reseloff + 1, 1119 siop_cmd->dsa + sizeof(struct siop_xfer_common) + 1120 Ent_ldsa_reload_dsa); 1121 } 1122 return 0; 1123 } 1124 1125 /* 1126 * handle a bus reset: reset chip, unqueue all active commands, free all 1127 * target struct and report loosage to upper layer. 1128 * As the upper layer may requeue immediatly we have to first store 1129 * all active commands in a temporary queue. 1130 */ 1131 void 1132 siop_handle_reset(sc) 1133 struct siop_softc *sc; 1134 { 1135 struct cmd_list reset_list; 1136 struct siop_cmd *siop_cmd, *next_siop_cmd; 1137 struct siop_lun *siop_lun; 1138 int target, lun, tag; 1139 /* 1140 * scsi bus reset. reset the chip and restart 1141 * the queue. Need to clean up all active commands 1142 */ 1143 printf("%s: scsi bus reset\n", sc->sc_dev.dv_xname); 1144 /* stop, reset and restart the chip */ 1145 siop_reset(sc); 1146 TAILQ_INIT(&reset_list); 1147 /* 1148 * Process all commands: first commmands being executed 1149 */ 1150 for (target = 0; target < sc->sc_chan.chan_ntargets; 1151 target++) { 1152 if (sc->targets[target] == NULL) 1153 continue; 1154 for (lun = 0; lun < 8; lun++) { 1155 siop_lun = sc->targets[target]->siop_lun[lun]; 1156 if (siop_lun == NULL) 1157 continue; 1158 for (tag = 0; tag < 1159 ((sc->targets[target]->flags & TARF_TAG) ? 1160 SIOP_NTAG : 1); 1161 tag++) { 1162 siop_cmd = siop_lun->siop_tag[tag].active; 1163 if (siop_cmd == NULL) 1164 continue; 1165 printf("cmd %p (target %d:%d) in reset list\n", 1166 siop_cmd, target, lun); 1167 TAILQ_INSERT_TAIL(&reset_list, siop_cmd, next); 1168 siop_lun->siop_tag[tag].active = NULL; 1169 } 1170 } 1171 sc->targets[target]->status = TARST_ASYNC; 1172 sc->targets[target]->flags &= ~TARF_ISWIDE; 1173 sc->targets[target]->period = sc->targets[target]->offset = 0; 1174 siop_update_xfer_mode(sc, target); 1175 } 1176 /* Next commands from the urgent list */ 1177 for (siop_cmd = TAILQ_FIRST(&sc->urgent_list); siop_cmd != NULL; 1178 siop_cmd = next_siop_cmd) { 1179 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1180 siop_cmd->flags &= ~CMDFL_TAG; 1181 printf("cmd %p (target %d:%d) in reset list (wait)\n", 1182 siop_cmd, siop_cmd->xs->xs_periph->periph_target, 1183 siop_cmd->xs->xs_periph->periph_lun); 1184 TAILQ_REMOVE(&sc->urgent_list, siop_cmd, next); 1185 TAILQ_INSERT_TAIL(&reset_list, siop_cmd, next); 1186 } 1187 /* Then command waiting in the input list */ 1188 for (siop_cmd = TAILQ_FIRST(&sc->ready_list); siop_cmd != NULL; 1189 siop_cmd = next_siop_cmd) { 1190 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1191 siop_cmd->flags &= ~CMDFL_TAG; 1192 printf("cmd %p (target %d:%d) in reset list (wait)\n", 1193 siop_cmd, siop_cmd->xs->xs_periph->periph_target, 1194 siop_cmd->xs->xs_periph->periph_lun); 1195 TAILQ_REMOVE(&sc->ready_list, siop_cmd, next); 1196 TAILQ_INSERT_TAIL(&reset_list, siop_cmd, next); 1197 } 1198 1199 for (siop_cmd = TAILQ_FIRST(&reset_list); siop_cmd != NULL; 1200 siop_cmd = next_siop_cmd) { 1201 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1202 siop_cmd->xs->error = (siop_cmd->flags & CMDFL_TIMEOUT) ? 1203 XS_TIMEOUT : XS_RESET; 1204 siop_cmd->xs->status = SCSI_SIOP_NOCHECK; 1205 printf("cmd %p (status %d) about to be processed\n", siop_cmd, 1206 siop_cmd->status); 1207 siop_cmd->status = CMDST_DONE; 1208 TAILQ_REMOVE(&reset_list, siop_cmd, next); 1209 siop_scsicmd_end(siop_cmd); 1210 } 1211 scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_RESET, NULL); 1212 } 1213 1214 void 1215 siop_scsipi_request(chan, req, arg) 1216 struct scsipi_channel *chan; 1217 scsipi_adapter_req_t req; 1218 void *arg; 1219 { 1220 struct scsipi_xfer *xs; 1221 struct scsipi_periph *periph; 1222 struct siop_softc *sc = (void *)chan->chan_adapter->adapt_dev; 1223 struct siop_cmd *siop_cmd; 1224 int s, error, i; 1225 int target; 1226 int lun; 1227 1228 switch (req) { 1229 case ADAPTER_REQ_RUN_XFER: 1230 xs = arg; 1231 periph = xs->xs_periph; 1232 target = periph->periph_target; 1233 lun = periph->periph_lun; 1234 1235 s = splbio(); 1236 #ifdef SIOP_DEBUG_SCHED 1237 printf("starting cmd for %d:%d\n", target, lun); 1238 #endif 1239 siop_cmd = TAILQ_FIRST(&sc->free_list); 1240 if (siop_cmd) { 1241 TAILQ_REMOVE(&sc->free_list, siop_cmd, next); 1242 } else { 1243 if (siop_morecbd(sc) == 0) { 1244 siop_cmd = TAILQ_FIRST(&sc->free_list); 1245 #ifdef DIAGNOSTIC 1246 if (siop_cmd == NULL) 1247 panic("siop_morecbd succeed and does nothing"); 1248 #endif 1249 TAILQ_REMOVE(&sc->free_list, siop_cmd, next); 1250 } 1251 } 1252 if (siop_cmd == NULL) { 1253 xs->error = XS_RESOURCE_SHORTAGE; 1254 scsipi_done(xs); 1255 splx(s); 1256 return; 1257 } 1258 #ifdef DIAGNOSTIC 1259 if (siop_cmd->status != CMDST_FREE) 1260 panic("siop_scsicmd: new cmd not free"); 1261 #endif 1262 if (sc->targets[target] == NULL) { 1263 #ifdef SIOP_DEBUG 1264 printf("%s: alloc siop_target for target %d\n", 1265 sc->sc_dev.dv_xname, target); 1266 #endif 1267 sc->targets[target] = 1268 malloc(sizeof(struct siop_target), 1269 M_DEVBUF, M_NOWAIT); 1270 if (sc->targets[target] == NULL) { 1271 printf("%s: can't malloc memory for " 1272 "target %d\n", sc->sc_dev.dv_xname, target); 1273 xs->error = XS_RESOURCE_SHORTAGE; 1274 scsipi_done(xs); 1275 splx(s); 1276 return; 1277 } 1278 sc->targets[target]->status = TARST_PROBING; 1279 sc->targets[target]->flags = 0; 1280 sc->targets[target]->id = 1281 sc->clock_div << 24; /* scntl3 */ 1282 sc->targets[target]->id |= target << 16; /* id */ 1283 /* sc->targets[target]->id |= 0x0 << 8; scxfer is 0 */ 1284 1285 /* get a lun switch script */ 1286 sc->targets[target]->lunsw = siop_get_lunsw(sc); 1287 if (sc->targets[target]->lunsw == NULL) { 1288 printf("%s: can't alloc lunsw for target %d\n", 1289 sc->sc_dev.dv_xname, target); 1290 xs->error = XS_RESOURCE_SHORTAGE; 1291 scsipi_done(xs); 1292 splx(s); 1293 return; 1294 } 1295 for (i=0; i < 8; i++) 1296 sc->targets[target]->siop_lun[i] = NULL; 1297 siop_add_reselsw(sc, target); 1298 } 1299 if (sc->targets[target]->siop_lun[lun] == NULL) { 1300 sc->targets[target]->siop_lun[lun] = 1301 malloc(sizeof(struct siop_lun), M_DEVBUF, M_NOWAIT); 1302 if (sc->targets[target]->siop_lun[lun] == NULL) { 1303 printf("%s: can't alloc siop_lun for " 1304 "target %d lun %d\n", 1305 sc->sc_dev.dv_xname, target, lun); 1306 xs->error = XS_RESOURCE_SHORTAGE; 1307 scsipi_done(xs); 1308 splx(s); 1309 return; 1310 } 1311 memset(sc->targets[target]->siop_lun[lun], 0, 1312 sizeof(struct siop_lun)); 1313 } 1314 siop_cmd->siop_target = sc->targets[target]; 1315 siop_cmd->xs = xs; 1316 siop_cmd->flags = 0; 1317 siop_cmd->status = CMDST_READY; 1318 1319 /* load the DMA maps */ 1320 error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_cmd, 1321 xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT); 1322 if (error) { 1323 printf("%s: unable to load cmd DMA map: %d", 1324 sc->sc_dev.dv_xname, error); 1325 xs->error = XS_DRIVER_STUFFUP; 1326 scsipi_done(xs); 1327 splx(s); 1328 return; 1329 } 1330 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 1331 error = bus_dmamap_load(sc->sc_dmat, 1332 siop_cmd->dmamap_data, xs->data, xs->datalen, 1333 NULL, BUS_DMA_NOWAIT); 1334 if (error) { 1335 printf("%s: unable to load cmd DMA map: %d", 1336 sc->sc_dev.dv_xname, error); 1337 xs->error = XS_DRIVER_STUFFUP; 1338 scsipi_done(xs); 1339 bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd); 1340 splx(s); 1341 return; 1342 } 1343 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0, 1344 siop_cmd->dmamap_data->dm_mapsize, 1345 (xs->xs_control & XS_CTL_DATA_IN) ? 1346 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1347 } 1348 bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_cmd, 0, 1349 siop_cmd->dmamap_cmd->dm_mapsize, BUS_DMASYNC_PREWRITE); 1350 1351 siop_setuptables(siop_cmd); 1352 if (xs->xs_control & XS_CTL_URGENT) 1353 TAILQ_INSERT_TAIL(&sc->urgent_list, siop_cmd, next); 1354 else 1355 TAILQ_INSERT_TAIL(&sc->ready_list, siop_cmd, next); 1356 siop_start(sc); 1357 if (xs->xs_control & XS_CTL_POLL) { 1358 /* poll for command completion */ 1359 while ((xs->xs_status & XS_STS_DONE) == 0) { 1360 delay(1000); 1361 siop_intr(sc); 1362 } 1363 } 1364 splx(s); 1365 return; 1366 1367 case ADAPTER_REQ_GROW_RESOURCES: 1368 /* XXX Not supported. */ 1369 return; 1370 1371 case ADAPTER_REQ_SET_XFER_MODE: 1372 { 1373 struct scsipi_xfer_mode *xm = arg; 1374 if (sc->targets[xm->xm_target] == NULL) 1375 return; 1376 s = splbio(); 1377 if (xm->xm_mode & PERIPH_CAP_TQING) 1378 sc->targets[xm->xm_target]->flags |= TARF_TAG; 1379 if ((xm->xm_mode & PERIPH_CAP_WIDE16) && 1380 (sc->features & SF_BUS_WIDE)) 1381 sc->targets[xm->xm_target]->flags |= TARF_WIDE; 1382 if (xm->xm_mode & PERIPH_CAP_SYNC) 1383 sc->targets[xm->xm_target]->flags |= TARF_SYNC; 1384 if ((xm->xm_mode & (PERIPH_CAP_SYNC | PERIPH_CAP_WIDE16)) || 1385 sc->targets[xm->xm_target]->status == TARST_PROBING) 1386 sc->targets[xm->xm_target]->status = 1387 TARST_ASYNC; 1388 1389 for (lun = 0; lun < sc->sc_chan.chan_nluns; lun++) { 1390 if (sc->sc_chan.chan_periphs[xm->xm_target][lun]) 1391 /* allocate a lun sw entry for this device */ 1392 siop_add_dev(sc, xm->xm_target, lun); 1393 } 1394 1395 splx(s); 1396 } 1397 } 1398 } 1399 1400 void 1401 siop_start(sc) 1402 struct siop_softc *sc; 1403 { 1404 struct siop_cmd *siop_cmd, *next_siop_cmd; 1405 struct siop_lun *siop_lun; 1406 u_int32_t dsa; 1407 int timeout; 1408 int target, lun, tag, slot; 1409 int newcmd = 0; 1410 int doingready = 0; 1411 1412 /* 1413 * first make sure to read valid data 1414 */ 1415 siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 1416 1417 /* 1418 * The queue management here is a bit tricky: the script always looks 1419 * at the slot from first to last, so if we always use the first 1420 * free slot commands can stay at the tail of the queue ~forever. 1421 * The algorithm used here is to restart from the head when we know 1422 * that the queue is empty, and only add commands after the last one. 1423 * When we're at the end of the queue wait for the script to clear it. 1424 * The best thing to do here would be to implement a circular queue, 1425 * but using only 53c720 features this can be "interesting". 1426 * A mid-way solution could be to implement 2 queues and swap orders. 1427 */ 1428 slot = sc->sc_currschedslot; 1429 /* 1430 * If the instruction is 0x80000000 (JUMP foo, IF FALSE) the slot is 1431 * free. As this is the last used slot, all previous slots are free, 1432 * we can restart from 0. 1433 */ 1434 if (siop_script_read(sc, (Ent_script_sched_slot0 / 4) + slot * 2) == 1435 0x80000000) { 1436 slot = sc->sc_currschedslot = 0; 1437 } else { 1438 slot++; 1439 } 1440 /* first handle commands from the urgent list */ 1441 siop_cmd = TAILQ_FIRST(&sc->urgent_list); 1442 again: 1443 for (; siop_cmd != NULL; siop_cmd = next_siop_cmd) { 1444 next_siop_cmd = TAILQ_NEXT(siop_cmd, next); 1445 #ifdef DIAGNOSTIC 1446 if (siop_cmd->status != CMDST_READY) 1447 panic("siop: non-ready cmd in ready list"); 1448 #endif 1449 target = siop_cmd->xs->xs_periph->periph_target; 1450 lun = siop_cmd->xs->xs_periph->periph_lun; 1451 siop_lun = sc->targets[target]->siop_lun[lun]; 1452 /* if non-tagged command active, wait */ 1453 if (siop_lun->siop_tag[0].active != NULL) 1454 continue; 1455 /* find a free tag if needed */ 1456 if (siop_cmd->flags & CMDFL_TAG) { 1457 tag = siop_cmd->xs->xs_tag_id + 1; 1458 #ifdef DIAGNOSTIC 1459 if (siop_lun->siop_tag[tag].active != NULL) 1460 panic("siop_start: tag not free"); 1461 if (tag >= SIOP_NTAG) { 1462 scsipi_printaddr(siop_cmd->xs->xs_periph); 1463 printf(": tag id %d\n", tag); 1464 panic("siop_start: invalid tag id"); 1465 } 1466 #endif 1467 } else { 1468 tag = 0; 1469 } 1470 siop_cmd->tag = tag; 1471 /* find a free scheduler slot and load it */ 1472 for (; slot < SIOP_NSLOTS; slot++) { 1473 /* 1474 * If cmd if 0x80000000 the slot is free 1475 */ 1476 if (siop_script_read(sc, 1477 (Ent_script_sched_slot0 / 4) + slot * 2) == 1478 0x80000000) 1479 break; 1480 } 1481 /* no more free slot, no need to continue */ 1482 if (slot == SIOP_NSLOTS) { 1483 goto end; 1484 } 1485 #ifdef SIOP_DEBUG_SCHED 1486 printf("using slot %d for DSA 0x%lx\n", slot, 1487 (u_long)siop_cmd->dsa); 1488 #endif 1489 /* Ok, we can add the tag message */ 1490 if (tag > 0) { 1491 #ifdef DIAGNOSTIC 1492 int msgcount = 1493 le32toh(siop_cmd->siop_tables.t_msgout.count); 1494 if (msgcount != 1) 1495 printf("%s:%d:%d: tag %d with msgcount %d\n", 1496 sc->sc_dev.dv_xname, target, lun, tag, 1497 msgcount); 1498 #endif 1499 siop_cmd->siop_tables.msg_out[1] = 1500 siop_cmd->xs->xs_tag_type; 1501 siop_cmd->siop_tables.msg_out[2] = tag; 1502 siop_cmd->siop_tables.t_msgout.count = htole32(3); 1503 } 1504 /* note that we started a new command */ 1505 newcmd = 1; 1506 /* mark command as active */ 1507 if (siop_cmd->status == CMDST_READY) { 1508 siop_cmd->status = CMDST_ACTIVE; 1509 } else 1510 panic("siop_start: bad status"); 1511 if (doingready) 1512 TAILQ_REMOVE(&sc->ready_list, siop_cmd, next); 1513 else 1514 TAILQ_REMOVE(&sc->urgent_list, siop_cmd, next); 1515 siop_lun->siop_tag[tag].active = siop_cmd; 1516 /* patch scripts with DSA addr */ 1517 dsa = siop_cmd->dsa; 1518 /* first reselect switch, if we have an entry */ 1519 if (siop_lun->siop_tag[tag].reseloff > 0) 1520 siop_script_write(sc, 1521 siop_lun->siop_tag[tag].reseloff + 1, 1522 dsa + sizeof(struct siop_xfer_common) + 1523 Ent_ldsa_reload_dsa); 1524 /* CMD script: MOVE MEMORY addr */ 1525 siop_cmd->siop_xfer->resel[E_ldsa_abs_slot_Used[0]] = 1526 htole32(sc->sc_scriptaddr + Ent_script_sched_slot0 + 1527 slot * 8); 1528 /* scheduler slot: JUMP ldsa_select */ 1529 siop_script_write(sc, 1530 (Ent_script_sched_slot0 / 4) + slot * 2 + 1, 1531 dsa + sizeof(struct siop_xfer_common) + Ent_ldsa_select); 1532 /* handle timeout */ 1533 if (siop_cmd->status == CMDST_ACTIVE) { 1534 if ((siop_cmd->xs->xs_control & 1535 XS_CTL_POLL) == 0) { 1536 /* start exire timer */ 1537 timeout = (u_int64_t) siop_cmd->xs->timeout * 1538 (u_int64_t)hz / 1000; 1539 if (timeout == 0) 1540 timeout = 1; 1541 callout_reset( &siop_cmd->xs->xs_callout, 1542 timeout, siop_timeout, siop_cmd); 1543 } 1544 } 1545 /* 1546 * Change JUMP cmd so that this slot will be handled 1547 */ 1548 siop_script_write(sc, (Ent_script_sched_slot0 / 4) + slot * 2, 1549 0x80080000); 1550 sc->sc_currschedslot = slot; 1551 slot++; 1552 } 1553 if (doingready == 0) { 1554 /* now process ready list */ 1555 doingready = 1; 1556 siop_cmd = TAILQ_FIRST(&sc->ready_list); 1557 goto again; 1558 } 1559 1560 end: 1561 /* if nothing changed no need to flush cache and wakeup script */ 1562 if (newcmd == 0) 1563 return; 1564 /* make sure SCRIPT processor will read valid data */ 1565 siop_script_sync(sc,BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1566 /* Signal script it has some work to do */ 1567 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SIGP); 1568 /* and wait for IRQ */ 1569 return; 1570 } 1571 1572 void 1573 siop_timeout(v) 1574 void *v; 1575 { 1576 struct siop_cmd *siop_cmd = v; 1577 struct siop_softc *sc = siop_cmd->siop_sc; 1578 int s; 1579 1580 scsipi_printaddr(siop_cmd->xs->xs_periph); 1581 printf("command timeout\n"); 1582 1583 s = splbio(); 1584 /* reset the scsi bus */ 1585 siop_resetbus(sc); 1586 1587 /* deactivate callout */ 1588 callout_stop(&siop_cmd->xs->xs_callout); 1589 /* mark command as being timed out; siop_intr will handle it */ 1590 /* 1591 * mark command has being timed out and just return; 1592 * the bus reset will generate an interrupt, 1593 * it will be handled in siop_intr() 1594 */ 1595 siop_cmd->flags |= CMDFL_TIMEOUT; 1596 splx(s); 1597 return; 1598 1599 } 1600 1601 void 1602 siop_dump_script(sc) 1603 struct siop_softc *sc; 1604 { 1605 int i; 1606 for (i = 0; i < PAGE_SIZE / 4; i += 2) { 1607 printf("0x%04x: 0x%08x 0x%08x", i * 4, 1608 le32toh(sc->sc_script[i]), le32toh(sc->sc_script[i+1])); 1609 if ((le32toh(sc->sc_script[i]) & 0xe0000000) == 0xc0000000) { 1610 i++; 1611 printf(" 0x%08x", le32toh(sc->sc_script[i+1])); 1612 } 1613 printf("\n"); 1614 } 1615 } 1616 1617 int 1618 siop_morecbd(sc) 1619 struct siop_softc *sc; 1620 { 1621 int error, i, j; 1622 bus_dma_segment_t seg; 1623 int rseg; 1624 struct siop_cbd *newcbd; 1625 bus_addr_t dsa; 1626 u_int32_t *scr; 1627 1628 /* allocate a new list head */ 1629 newcbd = malloc(sizeof(struct siop_cbd), M_DEVBUF, M_NOWAIT); 1630 if (newcbd == NULL) { 1631 printf("%s: can't allocate memory for command descriptors " 1632 "head\n", sc->sc_dev.dv_xname); 1633 return ENOMEM; 1634 } 1635 memset(newcbd, 0, sizeof(struct siop_cbd)); 1636 1637 /* allocate cmd list */ 1638 newcbd->cmds = 1639 malloc(sizeof(struct siop_cmd) * SIOP_NCMDPB, M_DEVBUF, M_NOWAIT); 1640 if (newcbd->cmds == NULL) { 1641 printf("%s: can't allocate memory for command descriptors\n", 1642 sc->sc_dev.dv_xname); 1643 error = ENOMEM; 1644 goto bad3; 1645 } 1646 memset(newcbd->cmds, 0, sizeof(struct siop_cmd) * SIOP_NCMDPB); 1647 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, PAGE_SIZE, 0, &seg, 1648 1, &rseg, BUS_DMA_NOWAIT); 1649 if (error) { 1650 printf("%s: unable to allocate cbd DMA memory, error = %d\n", 1651 sc->sc_dev.dv_xname, error); 1652 goto bad2; 1653 } 1654 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE, 1655 (caddr_t *)&newcbd->xfers, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 1656 if (error) { 1657 printf("%s: unable to map cbd DMA memory, error = %d\n", 1658 sc->sc_dev.dv_xname, error); 1659 goto bad2; 1660 } 1661 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, PAGE_SIZE, 0, 1662 BUS_DMA_NOWAIT, &newcbd->xferdma); 1663 if (error) { 1664 printf("%s: unable to create cbd DMA map, error = %d\n", 1665 sc->sc_dev.dv_xname, error); 1666 goto bad1; 1667 } 1668 error = bus_dmamap_load(sc->sc_dmat, newcbd->xferdma, newcbd->xfers, 1669 PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 1670 if (error) { 1671 printf("%s: unable to load cbd DMA map, error = %d\n", 1672 sc->sc_dev.dv_xname, error); 1673 goto bad0; 1674 } 1675 #ifdef DEBUG 1676 printf("%s: alloc newcdb at PHY addr 0x%lx\n", sc->sc_dev.dv_xname, 1677 (unsigned long)newcbd->xferdma->dm_segs[0].ds_addr); 1678 #endif 1679 1680 for (i = 0; i < SIOP_NCMDPB; i++) { 1681 error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, SIOP_NSG, 1682 MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1683 &newcbd->cmds[i].dmamap_data); 1684 if (error) { 1685 printf("%s: unable to create data DMA map for cbd: " 1686 "error %d\n", 1687 sc->sc_dev.dv_xname, error); 1688 goto bad0; 1689 } 1690 error = bus_dmamap_create(sc->sc_dmat, 1691 sizeof(struct scsipi_generic), 1, 1692 sizeof(struct scsipi_generic), 0, 1693 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 1694 &newcbd->cmds[i].dmamap_cmd); 1695 if (error) { 1696 printf("%s: unable to create cmd DMA map for cbd %d\n", 1697 sc->sc_dev.dv_xname, error); 1698 goto bad0; 1699 } 1700 newcbd->cmds[i].siop_sc = sc; 1701 newcbd->cmds[i].siop_cbdp = newcbd; 1702 newcbd->cmds[i].siop_xfer = &newcbd->xfers[i]; 1703 memset(newcbd->cmds[i].siop_xfer, 0, 1704 sizeof(struct siop_xfer)); 1705 newcbd->cmds[i].dsa = newcbd->xferdma->dm_segs[0].ds_addr + 1706 i * sizeof(struct siop_xfer); 1707 dsa = newcbd->cmds[i].dsa; 1708 newcbd->cmds[i].status = CMDST_FREE; 1709 newcbd->cmds[i].siop_tables.t_msgout.count= htole32(1); 1710 newcbd->cmds[i].siop_tables.t_msgout.addr = htole32(dsa); 1711 newcbd->cmds[i].siop_tables.t_msgin.count= htole32(1); 1712 newcbd->cmds[i].siop_tables.t_msgin.addr = htole32(dsa + 8); 1713 newcbd->cmds[i].siop_tables.t_extmsgin.count= htole32(2); 1714 newcbd->cmds[i].siop_tables.t_extmsgin.addr = htole32(dsa + 9); 1715 newcbd->cmds[i].siop_tables.t_extmsgdata.addr = 1716 htole32(dsa + 11); 1717 newcbd->cmds[i].siop_tables.t_status.count= htole32(1); 1718 newcbd->cmds[i].siop_tables.t_status.addr = htole32(dsa + 16); 1719 1720 /* The select/reselect script */ 1721 scr = &newcbd->cmds[i].siop_xfer->resel[0]; 1722 for (j = 0; j < sizeof(load_dsa) / sizeof(load_dsa[0]); j++) 1723 scr[j] = htole32(load_dsa[j]); 1724 /* 1725 * 0x78000000 is a 'move data8 to reg'. data8 is the second 1726 * octet, reg offset is the third. 1727 */ 1728 scr[Ent_rdsa0 / 4] = 1729 htole32(0x78100000 | ((dsa & 0x000000ff) << 8)); 1730 scr[Ent_rdsa1 / 4] = 1731 htole32(0x78110000 | ( dsa & 0x0000ff00 )); 1732 scr[Ent_rdsa2 / 4] = 1733 htole32(0x78120000 | ((dsa & 0x00ff0000) >> 8)); 1734 scr[Ent_rdsa3 / 4] = 1735 htole32(0x78130000 | ((dsa & 0xff000000) >> 16)); 1736 scr[E_ldsa_abs_reselected_Used[0]] = 1737 htole32(sc->sc_scriptaddr + Ent_reselected); 1738 scr[E_ldsa_abs_reselect_Used[0]] = 1739 htole32(sc->sc_scriptaddr + Ent_reselect); 1740 scr[E_ldsa_abs_selected_Used[0]] = 1741 htole32(sc->sc_scriptaddr + Ent_selected); 1742 scr[E_ldsa_abs_data_Used[0]] = 1743 htole32(dsa + sizeof(struct siop_xfer_common) + 1744 Ent_ldsa_data); 1745 /* JUMP foo, IF FALSE - used by MOVE MEMORY to clear the slot */ 1746 scr[Ent_ldsa_data / 4] = htole32(0x80000000); 1747 TAILQ_INSERT_TAIL(&sc->free_list, &newcbd->cmds[i], next); 1748 #ifdef SIOP_DEBUG 1749 printf("tables[%d]: in=0x%x out=0x%x status=0x%x\n", i, 1750 le32toh(newcbd->cmds[i].siop_tables.t_msgin.addr), 1751 le32toh(newcbd->cmds[i].siop_tables.t_msgout.addr), 1752 le32toh(newcbd->cmds[i].siop_tables.t_status.addr)); 1753 #endif 1754 } 1755 TAILQ_INSERT_TAIL(&sc->cmds, newcbd, next); 1756 return 0; 1757 bad0: 1758 bus_dmamap_destroy(sc->sc_dmat, newcbd->xferdma); 1759 bad1: 1760 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 1761 bad2: 1762 free(newcbd->cmds, M_DEVBUF); 1763 bad3: 1764 free(newcbd, M_DEVBUF); 1765 return error; 1766 } 1767 1768 struct siop_lunsw * 1769 siop_get_lunsw(sc) 1770 struct siop_softc *sc; 1771 { 1772 struct siop_lunsw *lunsw; 1773 int i; 1774 1775 if (sc->script_free_lo + (sizeof(lun_switch) / sizeof(lun_switch[0])) >= 1776 sc->script_free_hi) 1777 return NULL; 1778 lunsw = TAILQ_FIRST(&sc->lunsw_list); 1779 if (lunsw != NULL) { 1780 #ifdef SIOP_DEBUG 1781 printf("siop_get_lunsw got lunsw at offset %d\n", 1782 lunsw->lunsw_off); 1783 #endif 1784 TAILQ_REMOVE(&sc->lunsw_list, lunsw, next); 1785 return lunsw; 1786 } 1787 lunsw = malloc(sizeof(struct siop_lunsw), M_DEVBUF, M_NOWAIT); 1788 if (lunsw == NULL) 1789 return NULL; 1790 memset(lunsw, 0, sizeof(struct siop_lunsw)); 1791 #ifdef SIOP_DEBUG 1792 printf("allocating lunsw at offset %d\n", sc->script_free_lo); 1793 #endif 1794 if (sc->features & SF_CHIP_RAM) { 1795 bus_space_write_region_4(sc->sc_ramt, sc->sc_ramh, 1796 sc->script_free_lo * 4, lun_switch, 1797 sizeof(lun_switch) / sizeof(lun_switch[0])); 1798 bus_space_write_4(sc->sc_ramt, sc->sc_ramh, 1799 (sc->script_free_lo + E_abs_lunsw_return_Used[0]) * 4, 1800 sc->sc_scriptaddr + Ent_lunsw_return); 1801 } else { 1802 for (i = 0; i < sizeof(lun_switch) / sizeof(lun_switch[0]); 1803 i++) 1804 sc->sc_script[sc->script_free_lo + i] = 1805 htole32(lun_switch[i]); 1806 sc->sc_script[sc->script_free_lo + E_abs_lunsw_return_Used[0]] = 1807 htole32(sc->sc_scriptaddr + Ent_lunsw_return); 1808 } 1809 lunsw->lunsw_off = sc->script_free_lo; 1810 lunsw->lunsw_size = sizeof(lun_switch) / sizeof(lun_switch[0]); 1811 sc->script_free_lo += lunsw->lunsw_size; 1812 siop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1813 return lunsw; 1814 } 1815 1816 void 1817 siop_add_reselsw(sc, target) 1818 struct siop_softc *sc; 1819 int target; 1820 { 1821 int i; 1822 struct siop_lun *siop_lun; 1823 /* 1824 * add an entry to resel switch 1825 */ 1826 siop_script_sync(sc, BUS_DMASYNC_POSTWRITE); 1827 for (i = 0; i < 15; i++) { 1828 sc->targets[target]->reseloff = Ent_resel_targ0 / 4 + i * 2; 1829 if ((siop_script_read(sc, sc->targets[target]->reseloff) & 0xff) 1830 == 0xff) { /* it's free */ 1831 #ifdef SIOP_DEBUG 1832 printf("siop: target %d slot %d offset %d\n", 1833 target, i, sc->targets[target]->reseloff); 1834 #endif 1835 /* JUMP abs_foo, IF target | 0x80; */ 1836 siop_script_write(sc, sc->targets[target]->reseloff, 1837 0x800c0080 | target); 1838 siop_script_write(sc, sc->targets[target]->reseloff + 1, 1839 sc->sc_scriptaddr + 1840 sc->targets[target]->lunsw->lunsw_off * 4 + 1841 Ent_lun_switch_entry); 1842 break; 1843 } 1844 } 1845 if (i == 15) /* no free slot, shouldn't happen */ 1846 panic("siop: resel switch full"); 1847 1848 sc->sc_ntargets++; 1849 for (i = 0; i < 8; i++) { 1850 siop_lun = sc->targets[target]->siop_lun[i]; 1851 if (siop_lun == NULL) 1852 continue; 1853 if (siop_lun->reseloff > 0) { 1854 siop_lun->reseloff = 0; 1855 siop_add_dev(sc, target, i); 1856 } 1857 } 1858 siop_update_scntl3(sc, sc->targets[target]); 1859 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1860 } 1861 1862 void 1863 siop_update_scntl3(sc, siop_target) 1864 struct siop_softc *sc; 1865 struct siop_target *siop_target; 1866 { 1867 /* MOVE target->id >> 24 TO SCNTL3 */ 1868 siop_script_write(sc, 1869 siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4), 1870 0x78030000 | ((siop_target->id >> 16) & 0x0000ff00)); 1871 /* MOVE target->id >> 8 TO SXFER */ 1872 siop_script_write(sc, 1873 siop_target->lunsw->lunsw_off + (Ent_restore_scntl3 / 4) + 2, 1874 0x78050000 | (siop_target->id & 0x0000ff00)); 1875 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1876 } 1877 1878 void 1879 siop_add_dev(sc, target, lun) 1880 struct siop_softc *sc; 1881 int target; 1882 int lun; 1883 { 1884 struct siop_lunsw *lunsw; 1885 struct siop_lun *siop_lun = sc->targets[target]->siop_lun[lun]; 1886 int i, ntargets; 1887 1888 if (siop_lun->reseloff > 0) 1889 return; 1890 lunsw = sc->targets[target]->lunsw; 1891 if ((lunsw->lunsw_off + lunsw->lunsw_size) < sc->script_free_lo) { 1892 /* 1893 * can't extend this slot. Probably not worth trying to deal 1894 * with this case 1895 */ 1896 #ifdef DEBUG 1897 printf("%s:%d:%d: can't allocate a lun sw slot\n", 1898 sc->sc_dev.dv_xname, target, lun); 1899 #endif 1900 return; 1901 } 1902 /* count how many free targets we still have to probe */ 1903 ntargets = sc->sc_chan.chan_ntargets - 1 - sc->sc_ntargets; 1904 1905 /* 1906 * we need 8 bytes for the lun sw additionnal entry, and 1907 * eventually sizeof(tag_switch) for the tag switch entry. 1908 * Keep enouth free space for the free targets that could be 1909 * probed later. 1910 */ 1911 if (sc->script_free_lo + 2 + 1912 (ntargets * sizeof(lun_switch) / sizeof(lun_switch[0])) >= 1913 ((sc->targets[target]->flags & TARF_TAG) ? 1914 sc->script_free_hi - (sizeof(tag_switch) / sizeof(tag_switch[0])) : 1915 sc->script_free_hi)) { 1916 /* 1917 * not enouth space, probably not worth dealing with it. 1918 * We can hold 13 tagged-queuing capable devices in the 4k RAM. 1919 */ 1920 #ifdef DEBUG 1921 printf("%s:%d:%d: not enouth memory for a lun sw slot\n", 1922 sc->sc_dev.dv_xname, target, lun); 1923 #endif 1924 return; 1925 } 1926 #ifdef SIOP_DEBUG 1927 printf("%s:%d:%d: allocate lun sw entry\n", 1928 sc->sc_dev.dv_xname, target, lun); 1929 #endif 1930 /* INT int_resellun */ 1931 siop_script_write(sc, sc->script_free_lo, 0x98080000); 1932 siop_script_write(sc, sc->script_free_lo + 1, A_int_resellun); 1933 /* Now the slot entry: JUMP abs_foo, IF lun */ 1934 siop_script_write(sc, sc->script_free_lo - 2, 1935 0x800c0000 | lun); 1936 siop_script_write(sc, sc->script_free_lo - 1, 0); 1937 siop_lun->reseloff = sc->script_free_lo - 2; 1938 lunsw->lunsw_size += 2; 1939 sc->script_free_lo += 2; 1940 if (sc->targets[target]->flags & TARF_TAG) { 1941 /* we need a tag switch */ 1942 sc->script_free_hi -= 1943 sizeof(tag_switch) / sizeof(tag_switch[0]); 1944 if (sc->features & SF_CHIP_RAM) { 1945 bus_space_write_region_4(sc->sc_ramt, sc->sc_ramh, 1946 sc->script_free_hi * 4, tag_switch, 1947 sizeof(tag_switch) / sizeof(tag_switch[0])); 1948 } else { 1949 for(i = 0; 1950 i < sizeof(tag_switch) / sizeof(tag_switch[0]); 1951 i++) { 1952 sc->sc_script[sc->script_free_hi + i] = 1953 htole32(tag_switch[i]); 1954 } 1955 } 1956 siop_script_write(sc, 1957 siop_lun->reseloff + 1, 1958 sc->sc_scriptaddr + sc->script_free_hi * 4 + 1959 Ent_tag_switch_entry); 1960 1961 for (i = 0; i < SIOP_NTAG; i++) { 1962 siop_lun->siop_tag[i].reseloff = 1963 sc->script_free_hi + (Ent_resel_tag0 / 4) + i * 2; 1964 } 1965 } else { 1966 /* non-tag case; just work with the lun switch */ 1967 siop_lun->siop_tag[0].reseloff = 1968 sc->targets[target]->siop_lun[lun]->reseloff; 1969 } 1970 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 1971 } 1972 1973 void 1974 siop_del_dev(sc, target, lun) 1975 struct siop_softc *sc; 1976 int target; 1977 int lun; 1978 { 1979 int i; 1980 #ifdef SIOP_DEBUG 1981 printf("%s:%d:%d: free lun sw entry\n", 1982 sc->sc_dev.dv_xname, target, lun); 1983 #endif 1984 if (sc->targets[target] == NULL) 1985 return; 1986 free(sc->targets[target]->siop_lun[lun], M_DEVBUF); 1987 sc->targets[target]->siop_lun[lun] = NULL; 1988 /* XXX compact sw entry too ? */ 1989 /* check if we can free the whole target */ 1990 for (i = 0; i < 8; i++) { 1991 if (sc->targets[target]->siop_lun[i] != NULL) 1992 return; 1993 } 1994 #ifdef SIOP_DEBUG 1995 printf("%s: free siop_target for target %d lun %d lunsw offset %d\n", 1996 sc->sc_dev.dv_xname, target, lun, 1997 sc->targets[target]->lunsw->lunsw_off); 1998 #endif 1999 /* 2000 * nothing here, free the target struct and resel 2001 * switch entry 2002 */ 2003 siop_script_write(sc, sc->targets[target]->reseloff, 0x800c00ff); 2004 siop_script_sync(sc, BUS_DMASYNC_PREWRITE); 2005 TAILQ_INSERT_TAIL(&sc->lunsw_list, sc->targets[target]->lunsw, next); 2006 free(sc->targets[target], M_DEVBUF); 2007 sc->targets[target] = NULL; 2008 sc->sc_ntargets--; 2009 } 2010 2011 void 2012 siop_update_xfer_mode(sc, target) 2013 struct siop_softc *sc; 2014 int target; 2015 { 2016 struct siop_target *siop_target = sc->targets[target]; 2017 struct scsipi_xfer_mode xm; 2018 2019 xm.xm_target = target; 2020 xm.xm_mode = 0; 2021 xm.xm_period = 0; 2022 xm.xm_offset = 0; 2023 2024 if (siop_target->flags & TARF_ISWIDE) 2025 xm.xm_mode |= PERIPH_CAP_WIDE16; 2026 if (siop_target->period) { 2027 xm.xm_period = siop_target->period; 2028 xm.xm_offset = siop_target->offset; 2029 xm.xm_mode |= PERIPH_CAP_SYNC; 2030 } 2031 if (siop_target->flags & TARF_TAG) 2032 xm.xm_mode |= PERIPH_CAP_TQING; 2033 scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_XFER_MODE, &xm); 2034 } 2035 2036 #ifdef SIOP_STATS 2037 void 2038 siop_printstats() 2039 { 2040 printf("siop_stat_intr %d\n", siop_stat_intr); 2041 printf("siop_stat_intr_shortxfer %d\n", siop_stat_intr_shortxfer); 2042 printf("siop_stat_intr_xferdisc %d\n", siop_stat_intr_xferdisc); 2043 printf("siop_stat_intr_sdp %d\n", siop_stat_intr_sdp); 2044 printf("siop_stat_intr_done %d\n", siop_stat_intr_done); 2045 printf("siop_stat_intr_lunresel %d\n", siop_stat_intr_lunresel); 2046 printf("siop_stat_intr_qfull %d\n", siop_stat_intr_qfull); 2047 } 2048 #endif 2049
Indexes created Sun Oct 19 02:09:48 GMT 2025