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siop.c revision 1.6
      1 /*	$NetBSD: siop.c,v 1.6 2000/04/27 16:49:07 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2000 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES,
     21  * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY
     22  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
     23  * AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY,
     24  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  *
     31  */
     32 
     33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */
     34 
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 #include <sys/device.h>
     38 #include <sys/malloc.h>
     39 #include <sys/buf.h>
     40 #include <sys/kernel.h>
     41 #include <sys/scsiio.h>
     42 
     43 #include <machine/endian.h>
     44 #include <machine/bus.h>
     45 
     46 #include <vm/vm.h>
     47 #include <vm/vm_param.h>
     48 #include <vm/vm_kern.h>
     49 
     50 #include <dev/microcode/siop/siop.out>
     51 
     52 #include <dev/scsipi/scsi_all.h>
     53 #include <dev/scsipi/scsi_message.h>
     54 #include <dev/scsipi/scsipi_all.h>
     55 
     56 #include <dev/scsipi/scsiconf.h>
     57 
     58 #include <dev/ic/siopreg.h>
     59 #include <dev/ic/siopvar.h>
     60 
     61 #undef DEBUG
     62 #undef DEBUG_INTR
     63 #undef DEBUG_SHED
     64 #undef DUMP_SCRIPT
     65 
     66 #define SIOP_STATS
     67 
     68 #ifndef SIOP_DEFAULT_TARGET
     69 #define SIOP_DEFAULT_TARGET 7
     70 #endif
     71 
     72 #define MEM_SIZE 8192
     73 #define CMD_OFF 4096
     74 
     75 /* tables used by SCRIPT */
     76 typedef struct scr_table {
     77 	u_int32_t count;
     78 	u_int32_t addr;
     79 } scr_table_t ;
     80 
     81 /* Number of scatter/gather entries */
     82 #define SIOP_NSG	(MAXPHYS/NBPG + 1)
     83 
     84 /*
     85  * This structure interfaces the SCRIPT with the driver; it describes a full
     86  * transfert. It lives in the same chunk of DMA-safe memory as the script.
     87  */
     88 struct siop_xfer {
     89 	u_int8_t msg_out[8];	/* 0 */
     90 	u_int8_t msg_in[8];	/* 8 */
     91 	int status;		/* 16 */
     92 	u_int32_t id;		/* 20 */
     93 	u_int32_t pad1;		/* 24 */
     94 	scr_table_t t_msgin;	/* 28 */
     95 	scr_table_t t_extmsgin;	/* 36 */
     96 	scr_table_t t_extmsgdata; /* 44 */
     97 	scr_table_t t_extmsgtag; /* 52 */
     98 	scr_table_t t_msgout;	/* 60 */
     99 	scr_table_t cmd;	/* 68 */
    100 	scr_table_t t_status;	/* 76 */
    101 	scr_table_t data[SIOP_NSG]; /* 84 */
    102 };
    103 
    104 /*
    105  * This decribes a command handled by the SCSI controller
    106  * These are chained in either a free list or a active list
    107  * We have one queue per target + (one at the adapter's target for probe)
    108  */
    109 struct siop_cmd {
    110 	TAILQ_ENTRY (siop_cmd) next;
    111 	struct siop_softc *siop_sc; /* pointer to adapter */
    112 	struct scsipi_xfer *xs; /* xfer from the upper level */
    113 	struct siop_xfer *siop_table; /* tables dealing with this xfer */
    114 	bus_addr_t	dsa; /* DSA value to load */
    115 	bus_dmamap_t	dmamap_cmd;
    116 	bus_dmamap_t	dmamap_data;
    117 	struct scsipi_sense rs_cmd; /* request sense command buffer */
    118 	int       status;
    119 	int       flags;
    120 };
    121 
    122 /* status defs */
    123 #define CMDST_FREE		0 /* cmd slot is free */
    124 #define CMDST_READY		1 /* cmd slot is waiting for processing */
    125 #define CMDST_ACTIVE		2 /* cmd slot is being processed */
    126 #define CMDST_SENSE		3 /* cmd slot is being requesting sense */
    127 #define CMDST_SENSE_ACTIVE	4 /* request sense active */
    128 #define CMDST_SENSE_DONE 	5 /* request sense done */
    129 #define CMDST_DONE		6 /* cmd slot has been processed */
    130 /* flags defs */
    131 #define CMDFL_TIMEOUT	0x0001 /* cmd timed out */
    132 
    133 /* initial number of cmd descriptors */
    134 #define SIOP_NCMD 10
    135 
    136 void	siop_reset __P((struct siop_softc *));
    137 void	siop_handle_reset __P((struct siop_softc *));
    138 void	siop_scsicmd_end __P((struct siop_cmd *));
    139 void	siop_start __P((struct siop_softc *));
    140 void 	siop_timeout __P((void *));
    141 void	siop_minphys __P((struct buf *));
    142 int	siop_ioctl __P((struct scsipi_link *, u_long,
    143 		caddr_t, int, struct proc *));
    144 int	siop_scsicmd __P((struct scsipi_xfer *));
    145 void 	siop_sdp __P((struct siop_cmd *));
    146 void 	siop_ssg __P((struct siop_cmd *));
    147 void	siop_dump_script __P((struct siop_softc *));
    148 
    149 struct scsipi_adapter siop_adapter = {
    150 	0,
    151 	siop_scsicmd,
    152 	siop_minphys,
    153 	siop_ioctl,
    154 	NULL,
    155 };
    156 
    157 struct scsipi_device siop_dev = {
    158 	NULL,
    159 	NULL,
    160 	NULL,
    161 	NULL,
    162 };
    163 
    164 #ifdef SIOP_STATS
    165 static int siop_stat_intr = 0;
    166 static int siop_stat_intr_shortxfer = 0;
    167 static int siop_stat_intr_sdp = 0;
    168 static int siop_stat_intr_done = 0;
    169 static int siop_stat_intr_reselect = 0;
    170 static int siop_stat_intr_xferdisc = 0;
    171 void siop_printstats __P((void));
    172 #define INCSTAT(x) x++
    173 #else
    174 #define INCSTAT(x)
    175 #endif
    176 
    177 static __inline__ void siop_table_sync __P((struct siop_cmd *, int));
    178 static __inline__ void
    179 siop_table_sync(siop_cmd, ops)
    180 	struct siop_cmd *siop_cmd;
    181 	int ops;
    182 {
    183 	struct siop_softc *sc  = siop_cmd->siop_sc;
    184 	bus_addr_t offset;
    185 
    186 	offset = sc->sc_scriptdma->dm_segs[0].ds_addr - siop_cmd->dsa;
    187 	bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, offset,
    188 	    sizeof(struct siop_xfer), ops);
    189 }
    190 
    191 static __inline__ void siop_script_sync __P((struct siop_softc *, int));
    192 static __inline__ void
    193 siop_script_sync(sc, ops)
    194 	struct siop_softc *sc;
    195 	int ops;
    196 {
    197 	bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, 0, CMD_OFF, ops);
    198 }
    199 
    200 void
    201 siop_attach(sc)
    202 	struct siop_softc *sc;
    203 {
    204 	int error, i;
    205 	bus_dma_segment_t seg;
    206 	int rseg;
    207 
    208 	/*
    209 	 * Allocate DMA-safe memory for the script itself and internal
    210 	 * variables and map it.
    211 	 */
    212 	error = bus_dmamem_alloc(sc->sc_dmat, MEM_SIZE,
    213 	    NBPG, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT);
    214 	if (error) {
    215 		printf("%s: unable to allocate script DMA memory, error = %d\n",
    216 		    sc->sc_dev.dv_xname, error);
    217 		return;
    218 	}
    219 	error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, MEM_SIZE,
    220 	    (caddr_t *)&sc->sc_script, BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
    221 	if (error) {
    222 		printf("%s: unable to map script DMA memory, error = %d\n",
    223 		    sc->sc_dev.dv_xname, error);
    224 		return;
    225 	}
    226 	error = bus_dmamap_create(sc->sc_dmat, MEM_SIZE, 1,
    227 	    MEM_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma);
    228 	if (error) {
    229 		printf("%s: unable to create script DMA map, error = %d\n",
    230 		    sc->sc_dev.dv_xname, error);
    231 		return;
    232 	}
    233 	error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma, sc->sc_script,
    234 	    MEM_SIZE, NULL, BUS_DMA_NOWAIT);
    235 	if (error) {
    236 		printf("%s: unable to load script DMA map, error = %d\n",
    237 		    sc->sc_dev.dv_xname, error);
    238 		return;
    239 	}
    240 	TAILQ_INIT(&sc->free_list);
    241 	for (i = 0; i < 16; i++)
    242 		TAILQ_INIT(&sc->active_list[i]);
    243 	/* allocate cmd list */
    244 	sc->cmds =
    245 	    malloc(sizeof(struct siop_cmd) * SIOP_NCMD, M_DEVBUF, M_NOWAIT);
    246 	if (sc->cmds == NULL) {
    247 		printf("%s: can't allocate memory for command descriptors\n",
    248 		    sc->sc_dev.dv_xname);
    249 		return;
    250 	}
    251 	for (i = 0; i < SIOP_NCMD; i++) {
    252 		error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, SIOP_NSG,
    253 		    MAXPHYS, 0, BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
    254 		    &sc->cmds[i].dmamap_data);
    255 		if (error) {
    256 			printf("%s: unable to create data DMA map for cbd %d\n",
    257 			    sc->sc_dev.dv_xname, error);
    258 			return;
    259 		}
    260 		error = bus_dmamap_create(sc->sc_dmat,
    261 		    sizeof(struct scsipi_generic), 1,
    262 		    sizeof(struct scsipi_generic), 0,
    263 		    BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
    264 		    &sc->cmds[i].dmamap_cmd);
    265 		if (error) {
    266 			printf("%s: unable to create cmd DMA map for cbd %d\n",
    267 			    sc->sc_dev.dv_xname, error);
    268 			return;
    269 		}
    270 		sc->cmds[i].siop_sc = sc;
    271 		sc->cmds[i].siop_table =
    272 		    &((struct siop_xfer *)(&sc->sc_script[CMD_OFF/4]))[i];
    273 		sc->cmds[i].dsa = sc->sc_scriptdma->dm_segs[0].ds_addr +
    274 		    CMD_OFF + i * sizeof(struct siop_xfer);
    275 		sc->cmds[i].status = CMDST_FREE;
    276 		sc->cmds[i].siop_table->t_msgout.count= htole32(1);
    277 		sc->cmds[i].siop_table->t_msgout.addr =
    278 		    htole32(sc->cmds[i].dsa);
    279 		sc->cmds[i].siop_table->t_msgin.count= htole32(1);
    280 		sc->cmds[i].siop_table->t_msgin.addr =
    281 		    htole32(sc->cmds[i].dsa + 8);
    282 		sc->cmds[i].siop_table->t_extmsgin.count= htole32(2);
    283 		sc->cmds[i].siop_table->t_extmsgin.addr =
    284 		    htole32(le32toh(sc->cmds[i].siop_table->t_msgin.addr) + 1);
    285 		sc->cmds[i].siop_table->t_status.count= htole32(1);
    286 		sc->cmds[i].siop_table->t_status.addr =
    287 		    htole32(le32toh(sc->cmds[i].siop_table->t_msgin.addr) + 8);
    288 		TAILQ_INSERT_TAIL(&sc->free_list, &sc->cmds[i], next);
    289 #ifdef DEBUG
    290 		printf("tables[%d]: out=0x%x in=0x%x status=0x%x\n", i,
    291 		    le32toh(sc->cmds[i].siop_table->t_msgin.addr),
    292 		    le32toh(sc->cmds[i].siop_table->t_msgout.addr),
    293 		    le32toh(sc->cmds[i].siop_table->t_status.addr));
    294 #endif
    295 	}
    296 	/* compute number of sheduler slots */
    297 	sc->sc_nshedslots = (
    298 	    CMD_OFF /* memory size allocated for scripts */
    299 	    - sizeof(siop_script) /* memory for main script */
    300 	    + 8		/* extra NOP at end of main script */
    301 	    - sizeof(endslot_script) /* memory needed at end of sheduler */
    302 	    ) / (sizeof(slot_script) - 8);
    303 #ifdef DEBUG
    304 	printf("%s: script size = %d, PHY addr=0x%x, VIRT=%p nslots %d\n",
    305 	    sc->sc_dev.dv_xname, (int)sizeof(siop_script),
    306 	    (u_int)sc->sc_scriptdma->dm_segs[0].ds_addr, sc->sc_script,
    307 	    sc->sc_nshedslots);
    308 #endif
    309 
    310 	sc->sc_link.adapter_softc = sc;
    311 	sc->sc_link.openings = 1;
    312 	sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
    313 	sc->sc_link.scsipi_scsi.max_target  =
    314 	    (sc->features & SF_BUS_WIDE) ? 15 : 7;
    315 	sc->sc_link.scsipi_scsi.max_lun = 7;
    316 	sc->sc_link.scsipi_scsi.adapter_target = bus_space_read_1(sc->sc_rt,
    317 	    sc->sc_rh, SIOP_SCID);
    318 	if (sc->sc_link.scsipi_scsi.adapter_target == 0 ||
    319 	    sc->sc_link.scsipi_scsi.adapter_target >
    320 	    sc->sc_link.scsipi_scsi.max_target)
    321 		sc->sc_link.scsipi_scsi.adapter_target = SIOP_DEFAULT_TARGET;
    322 	sc->sc_link.type = BUS_SCSI;
    323 	sc->sc_link.adapter = &siop_adapter;
    324 	sc->sc_link.device = &siop_dev;
    325 	sc->sc_link.flags  = 0;
    326 
    327 	siop_reset(sc);
    328 #ifdef DUMP_SCRIPT
    329 	siop_dump_script(sc);
    330 #endif
    331 
    332 	config_found((struct device*)sc, &sc->sc_link, scsiprint);
    333 }
    334 
    335 void
    336 siop_reset(sc)
    337 	struct siop_softc *sc;
    338 {
    339 	int i, j;
    340 	u_int32_t *scr;
    341 	bus_addr_t physaddr;
    342 
    343 	/* reset the chip */
    344 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST);
    345 	delay(1000);
    346 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, 0);
    347 
    348 	/* copy and patch the script */
    349 	for (j = 0; j < (sizeof(siop_script) / sizeof(siop_script[0])); j++) {
    350 		sc->sc_script[j] = htole32(siop_script[j]);
    351 	}
    352 	/* copy the sheduler slots script */
    353 	for (i = 0; i < sc->sc_nshedslots; i++) {
    354 		scr = &sc->sc_script[Ent_sheduler / 4 + (Ent_nextslot / 4) * i];
    355 		physaddr = sc->sc_scriptdma->dm_segs[0].ds_addr + Ent_sheduler
    356 		    + Ent_nextslot * i;
    357 		for (j = 0; j < (sizeof(slot_script) / sizeof(slot_script[0]));
    358 		    j++) {
    359 			scr[j] = htole32(slot_script[j]);
    360 		}
    361 		/*
    362 		 * save current jump offset and patch MOVE MEMORY operands
    363 		 * to restore it.
    364 		 */
    365 		scr[Ent_slotdata/4 + 1] = scr[Ent_slot/4 + 1];
    366 		scr[E_slot_nextp_Used[0]] = htole32(physaddr + Ent_slot + 4);
    367 		scr[E_slot_shed_addrsrc_Used[0]] = htole32(physaddr +
    368 		    Ent_slotdata + 4);
    369 		/* JUMP selected, in main script */
    370 		scr[E_slot_abs_selected_Used[0]] =
    371 		   htole32(sc->sc_scriptdma->dm_segs[0].ds_addr + Ent_selected);
    372 		/* JUMP addr if SELECT fail */
    373 		scr[E_slot_abs_reselect_Used[0]] =
    374 		   htole32(sc->sc_scriptdma->dm_segs[0].ds_addr + Ent_reselect);
    375 	}
    376 	/* Now the final JUMP */
    377 	scr = &sc->sc_script[Ent_sheduler / 4 +
    378 	    (Ent_nextslot / 4) * sc->sc_nshedslots];
    379 	for (j = 0; j < (sizeof(endslot_script) / sizeof(endslot_script[0]));
    380 	    j++) {
    381 		scr[j] = htole32(endslot_script[j]);
    382 	}
    383 	scr[E_endslot_abs_reselect_Used[0]] =
    384 	    htole32(sc->sc_scriptdma->dm_segs[0].ds_addr + Ent_reselect);
    385 
    386 	/* init registers */
    387 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL0,
    388 	    SCNTL0_ARB_MASK | SCNTL0_EPC | SCNTL0_AAP);
    389 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 0);
    390 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, 0x3);
    391 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DIEN, 0xff);
    392 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN0,
    393 	    0xff & ~(SIEN0_CMP | SIEN0_SEL | SIEN0_RSL));
    394 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN1,
    395 	    0xff & ~(SIEN1_HTH | SIEN1_GEN));
    396 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, STEST2_EXT);
    397 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, STEST3_TE);
    398 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
    399 	    (0xb << STIME0_SEL_SHIFT));
    400 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCID,
    401 	    sc->sc_link.scsipi_scsi.adapter_target | SCID_RRE);
    402 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_RESPID0,
    403 	    1 << sc->sc_link.scsipi_scsi.adapter_target);
    404 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, 0);
    405 
    406 	/* start script */
    407 	siop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    408 	bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP,
    409 	    sc->sc_scriptdma->dm_segs[0].ds_addr + Ent_reselect);
    410 }
    411 
    412 #if 0
    413 #define CALL_SCRIPT(ent) do {\
    414 	printf ("start script DSA 0x%lx DSP 0x%lx\n", \
    415 	    siop_cmd->dsa, \
    416 	    sc->sc_scriptdma->dm_segs[0].ds_addr + ent); \
    417 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, sc->sc_scriptdma->dm_segs[0].ds_addr + ent); \
    418 } while (0)
    419 #else
    420 #define CALL_SCRIPT(ent) do {\
    421 bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP, sc->sc_scriptdma->dm_segs[0].ds_addr + ent); \
    422 } while (0)
    423 #endif
    424 
    425 int
    426 siop_intr(v)
    427 	void *v;
    428 {
    429 	struct siop_softc *sc = v;
    430 	struct siop_cmd *siop_cmd;
    431 	struct scsipi_xfer *xs;
    432 	u_int8_t istat, sist0, sist1, sstat1, dstat, scntl1;
    433 	u_int32_t irqcode;
    434 	int need_reset = 0;
    435 	int offset, target;
    436 	bus_addr_t dsa;
    437 
    438 	istat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT);
    439 	if ((istat & (ISTAT_INTF | ISTAT_DIP | ISTAT_SIP)) == 0)
    440 		return 0;
    441 	INCSTAT(siop_stat_intr);
    442 	if (istat & ISTAT_INTF) {
    443 		printf("INTRF\n");
    444 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_INTF);
    445 	}
    446 	/* use DSA to find the current siop_cmd */
    447 	dsa = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA);
    448 	if (dsa >= sc->sc_scriptdma->dm_segs[0].ds_addr + CMD_OFF &&
    449 	    dsa < sc->sc_scriptdma->dm_segs[0].ds_addr + CMD_OFF +
    450 	       SIOP_NCMD * sizeof(struct siop_xfer)) {
    451 		dsa -= sc->sc_scriptdma->dm_segs[0].ds_addr + CMD_OFF;
    452 		siop_cmd = &sc->cmds[dsa / sizeof(struct siop_xfer)];
    453 		siop_table_sync(siop_cmd,
    454 		    BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
    455 	} else {
    456 		printf("%s: current DSA invalid\n",
    457 		    sc->sc_dev.dv_xname);
    458 		siop_cmd = NULL;
    459 	}
    460 	if (istat & ISTAT_DIP) {
    461 		u_int32_t *p;
    462 		dstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DSTAT);
    463 		if (dstat & DSTAT_SSI) {
    464 			printf("single step dsp 0x%08x dsa 0x08%x\n",
    465 			    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP),
    466 			    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA));
    467 			if ((dstat & ~(DSTAT_DFE | DSTAT_SSI)) == 0 &&
    468 			    (istat & ISTAT_SIP) == 0) {
    469 				bus_space_write_1(sc->sc_rt, sc->sc_rh,
    470 				    SIOP_DCNTL, bus_space_read_1(sc->sc_rt,
    471 				    sc->sc_rh, SIOP_DCNTL) | DCNTL_STD);
    472 			}
    473 			return 1;
    474 		}
    475 		if (dstat & ~(DSTAT_SIR | DSTAT_DFE | DSTAT_SSI)) {
    476 		printf("DMA IRQ:");
    477 		if (dstat & DSTAT_IID)
    478 			printf(" Illegal instruction");
    479 		if (dstat & DSTAT_ABRT)
    480 			printf(" abort");
    481 		if (dstat & DSTAT_BF)
    482 			printf(" bus fault");
    483 		if (dstat & DSTAT_MDPE)
    484 			printf(" parity");
    485 		if (dstat & DSTAT_DFE)
    486 			printf(" dma fifo empty");
    487 		printf(", DSP=0x%x DSA=0x%x: ",
    488 		    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP),
    489 		    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA));
    490 		p = sc->sc_script +
    491 		    (bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP) -
    492 		    sc->sc_scriptdma->dm_segs[0].ds_addr - 8) / 4;
    493 		printf("0x%x 0x%x 0x%x 0x%x\n", le32toh(p[0]), le32toh(p[1]),
    494 		    le32toh(p[2]), le32toh(p[3]));
    495 		if (siop_cmd)
    496 			printf("last msg_in=0x%x status=0x%x\n",
    497 			    siop_cmd->siop_table->msg_in[0],
    498 			    le32toh(siop_cmd->siop_table->status));
    499 		need_reset = 1;
    500 		}
    501 	}
    502 	if (istat & ISTAT_SIP) {
    503 		/*
    504 		 * SCSI interrupt. If current command is not active,
    505 		 * we don't need siop_cmd
    506 		 */
    507 		if (siop_cmd->status != CMDST_ACTIVE &&
    508 		    siop_cmd->status != CMDST_SENSE_ACTIVE) {
    509 			siop_cmd = NULL;
    510 		}
    511 		if (istat & ISTAT_DIP)
    512 			delay(1);
    513 		sist0 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST0);
    514 			delay(1);
    515 		sist1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST1);
    516 		sstat1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1);
    517 #if 0
    518 		printf("scsi interrupt, sist0=0x%x sist1=0x%x sstat1=0x%x "
    519 		    "DSA=0x%x DSP=0x%x\n", sist0, sist1,
    520 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1),
    521 		    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA),
    522 		    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP));
    523 #endif
    524 		if (siop_cmd)
    525 			xs = siop_cmd->xs;
    526 		if (sist0 & SIST0_RST) {
    527 			siop_handle_reset(sc);
    528 			siop_start(sc);
    529 			/* no table to flush here */
    530 			return 1;
    531 		}
    532 		if (sist0 & SIST0_SGE) {
    533 			if (siop_cmd)
    534 				scsi_print_addr(xs->sc_link);
    535 			else
    536 				printf("%s:", sc->sc_dev.dv_xname);
    537 			printf("scsi gross error\n");
    538 			goto reset;
    539 		}
    540 		if ((sist0 & SIST0_MA) && need_reset == 0) {
    541 			if (siop_cmd) {
    542 				/*
    543 				 * first restore DSA, in case we were in a S/G
    544 				 * operation.
    545 				 */
    546 				bus_space_write_4(sc->sc_rt, sc->sc_rh,
    547 				    SIOP_DSA, siop_cmd->dsa);
    548 				switch (sstat1 & SSTAT1_PHASE_MASK) {
    549 				case SSTAT1_PHASE_STATUS:
    550 				/*
    551 				 * previous phase may be aborted for any reason
    552 				 * ( for example, the target has less data to
    553 				 * transfer than requested). Just go to status
    554 				 * and the command should terminate.
    555 				 */
    556 					INCSTAT(siop_stat_intr_shortxfer);
    557 					CALL_SCRIPT(Ent_status);
    558 					/* no table to flush here */
    559 					return 1;
    560 				case SSTAT1_PHASE_MSGIN:
    561 					/*
    562 					 * target may be ready to disconnect
    563 					 * Save data pointers just in case.
    564 					 */
    565 					INCSTAT(siop_stat_intr_xferdisc);
    566 					siop_sdp(siop_cmd);
    567 					siop_table_sync(siop_cmd,
    568 					    BUS_DMASYNC_PREREAD |
    569 					    BUS_DMASYNC_PREWRITE);
    570 					CALL_SCRIPT(Ent_msgin);
    571 					return 1;
    572 				}
    573 				printf("%s: unexpected phase mismatch %d\n",
    574 				    sc->sc_dev.dv_xname,
    575 				    sstat1 & SSTAT1_PHASE_MASK);
    576 			} else {
    577 				printf("%s: phase mismatch without command\n",
    578 				    sc->sc_dev.dv_xname);
    579 			}
    580 			need_reset = 1;
    581 		}
    582 		if (sist0 & SIST0_PAR) {
    583 			/* parity error, reset */
    584 			if (siop_cmd)
    585 				scsi_print_addr(xs->sc_link);
    586 			else
    587 				printf("%s:", sc->sc_dev.dv_xname);
    588 			printf("parity error\n");
    589 			need_reset = 1;
    590 		}
    591 		if ((sist1 & SIST1_STO) && need_reset == 0) {
    592 			/* selection time out, assume there's no device here */
    593 			if (siop_cmd) {
    594 				siop_cmd->status = CMDST_DONE;
    595 				xs->error = XS_SELTIMEOUT;
    596 				goto end;
    597 			} else {
    598 				printf("%s: selection timeout without "
    599 				    "command\n", sc->sc_dev.dv_xname);
    600 				need_reset = 1;
    601 			}
    602 		}
    603 		if (sist0 & SIST0_UDC) {
    604 			/*
    605 			 * unexpected disconnect. Usually the target signals
    606 			 * a fatal condition this way. Attempt to get sense.
    607 			 */
    608 			 if (siop_cmd)
    609 			 	goto check_sense;
    610 			printf("%s: unexpected disconnect without "
    611 			    "command\n", sc->sc_dev.dv_xname);
    612 			goto reset;
    613 		}
    614 		/* Else it's an unhandled exeption (for now). */
    615 		printf("%s: unhandled scsi interrupt, sist0=0x%x sist1=0x%x "
    616 		    "sstat1=0x%x DSA=0x%x DSP=0x%x\n", sc->sc_dev.dv_xname,
    617 		    sist0, sist1,
    618 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT1),
    619 		    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSA),
    620 		    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP));
    621 		if (siop_cmd) {
    622 			siop_cmd->status = CMDST_DONE;
    623 			xs->error = XS_SELTIMEOUT;
    624 			goto end;
    625 		}
    626 		need_reset = 1;
    627 	}
    628 	if (need_reset) {
    629 reset:
    630 		/* fatal error, reset the bus */
    631 		scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
    632 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
    633 		    scntl1 | SCNTL1_RST);
    634 		/* minimum 25 us, more time won't hurt */
    635 		delay(100);
    636 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
    637 		/* no table to flush here */
    638 		return 1;
    639 	}
    640 
    641 
    642 	if ((istat & ISTAT_DIP) && (dstat & DSTAT_SIR)) { /* script interrupt */
    643 		irqcode = bus_space_read_4(sc->sc_rt, sc->sc_rh,
    644 		    SIOP_DSPS);
    645 #ifdef DEBUG_INTR
    646 		printf("script interrupt 0x%x\n", irqcode);
    647 #endif
    648 		/*
    649 		 * an inactive command is only valid if it's a reselect
    650 		 * interrupt: we'll change siop_cmd to point to the rigth one
    651 		 * just here
    652 		 */
    653 		if (irqcode != A_int_resel &&
    654 		    siop_cmd->status != CMDST_ACTIVE &&
    655 		    siop_cmd->status != CMDST_SENSE_ACTIVE) {
    656 			printf("%s: Aie, no command (IRQ code 0x%x current "
    657 			    "status %d) !\n", sc->sc_dev.dv_xname,
    658 			    irqcode, siop_cmd->status);
    659 			xs = NULL;
    660 		} else
    661 			xs = siop_cmd->xs;
    662 		switch(irqcode) {
    663 		case A_int_err:
    664 			printf("error, DSP=0x%x\n",
    665 			    bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DSP));
    666 			if (xs) {
    667 				xs->error = XS_SELTIMEOUT;
    668 				goto end;
    669 			} else {
    670 				goto reset;
    671 			}
    672 		case A_int_msgin:
    673 			if (xs)
    674 				scsi_print_addr(xs->sc_link);
    675 			else
    676 				printf("%s: ", sc->sc_dev.dv_xname);
    677 			if (siop_cmd->siop_table->msg_in[0] ==
    678 			    MSG_MESSAGE_REJECT) {
    679 				printf("scsi message reject, message sent "
    680 				    "was 0x%x\n",
    681 				    siop_cmd->siop_table->msg_out[0]);
    682 				if (siop_cmd->siop_table->msg_out[0] ==
    683 				    MSG_MESSAGE_REJECT) {
    684 					/* MSG_REJECT  for a MSG_REJECT  !*/
    685 					goto reset;
    686 				}
    687 				/* no table to flush here */
    688 				CALL_SCRIPT(Ent_msgin_ack);
    689 				return 1;
    690 			}
    691 			printf("unhandled message 0x%x\n",
    692 			    siop_cmd->siop_table->msg_in[0]);
    693 			siop_cmd->siop_table->t_msgout.count= htole32(1);
    694 			siop_cmd->siop_table->t_msgout.addr =
    695 			    htole32(siop_cmd->dsa);
    696 			siop_cmd->siop_table->msg_out[0] = MSG_MESSAGE_REJECT;
    697 			siop_table_sync(siop_cmd,
    698 			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    699 			CALL_SCRIPT(Ent_send_msgout);
    700 			return 1;
    701 		case A_int_extmsgin:
    702 #ifdef DEBUG_INTR
    703 			printf("extended message: msg 0x%x len %d\n",
    704 			    siop_cmd->siop_table->msg_in[2],
    705 			    siop_cmd->siop_table->msg_in[1]);
    706 #endif
    707 			siop_cmd->siop_table->t_extmsgdata.count =
    708 			    htole32(siop_cmd->siop_table->msg_in[1] - 1);
    709 			siop_cmd->siop_table->t_extmsgdata.addr =
    710 			    htole32(
    711 			    le32toh(siop_cmd->siop_table->t_extmsgin.addr)
    712 			    + 2);
    713 			siop_table_sync(siop_cmd,
    714 			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    715 			CALL_SCRIPT(Ent_get_extmsgdata);
    716 			return 1;
    717 		case A_int_extmsgdata:
    718 #ifdef DEBUG_INTR
    719 			{
    720 			int i;
    721 			printf("extended message: 0x%x, data:",
    722 			    siop_cmd->siop_table->msg_in[2]);
    723 			for (i = 3; i < 2 + siop_cmd->siop_table->msg_in[1];
    724 			    i++)
    725 				printf(" 0x%x",
    726 				    siop_cmd->siop_table->msg_in[i]);
    727 			printf("\n");
    728 			}
    729 #endif
    730 			if (siop_cmd->siop_table->msg_in[2] == MSG_EXT_SDTR) {
    731 				/* anserw with async for now */
    732 				siop_cmd->siop_table->msg_out[0] = MSG_EXTENDED;
    733 				siop_cmd->siop_table->msg_out[1] =
    734 				    MSG_EXT_SDTR_LEN;
    735 				siop_cmd->siop_table->msg_out[2] = MSG_EXT_SDTR;
    736 				siop_cmd->siop_table->msg_out[3] = 0;
    737 				siop_cmd->siop_table->msg_out[4] = 0;
    738 				siop_cmd->siop_table->t_msgout.count =
    739 				    htole32(MSG_EXT_SDTR_LEN + 2);
    740 				siop_cmd->siop_table->t_msgout.addr =
    741 				    htole32(siop_cmd->dsa);
    742 			} else {
    743 				/* send a message reject */
    744 				siop_cmd->siop_table->t_msgout.count =
    745 				    htole32(1);
    746 				siop_cmd->siop_table->t_msgout.addr =
    747 				    htole32(siop_cmd->dsa);
    748 				siop_cmd->siop_table->msg_out[0] =
    749 				    MSG_MESSAGE_REJECT;
    750 			}
    751 			siop_table_sync(siop_cmd,
    752 			    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    753 			CALL_SCRIPT(Ent_send_msgout);
    754 			return 1;
    755 		case A_int_resel: /* reselected */
    756 			INCSTAT(siop_stat_intr_reselect);
    757 			if ((siop_cmd->siop_table->msg_in[0] & 0x80) == 0) {
    758 				printf("%s: reselect without identify (%d)\n",
    759 				    sc->sc_dev.dv_xname,
    760 				    siop_cmd->siop_table->msg_in[0]);
    761 				goto reset;
    762 			}
    763 			target = bus_space_read_1(sc->sc_rt,
    764 			    sc->sc_rh, SIOP_SCRATCHA);
    765 			if ((target & 0x80) == 0) {
    766 				printf("reselect without id (%d)\n", target);
    767 				goto reset;
    768 			}
    769 			target &= 0x0f;
    770 #ifdef DEBUG_DR
    771 			printf("reselected by target %d lun %d\n",
    772 			    target,
    773 			    siop_cmd->siop_table->msg_in[0] & 0x07);
    774 #endif
    775 			siop_cmd =
    776 			    sc->active_list[target].tqh_first;
    777 			if (siop_cmd == NULL) {
    778 				printf("%s: reselected without cmd\n",
    779 				    sc->sc_dev.dv_xname);
    780 				goto reset;
    781 			}
    782 			bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSA,
    783 			    siop_cmd->dsa);
    784 			/* no table to flush */
    785 			CALL_SCRIPT(Ent_selected);
    786 			return 1;
    787 		case A_int_disc:
    788 			INCSTAT(siop_stat_intr_sdp);
    789 			offset = bus_space_read_1(sc->sc_rt, sc->sc_rh,
    790 			    SIOP_SCRATCHA + 1);
    791 #ifdef DEBUG_DR
    792 			printf("disconnect offset %d\n", offset);
    793 #endif
    794 			if (offset > SIOP_NSG) {
    795 				printf("%s: bad offset for disconnect (%d)\n",
    796 				    sc->sc_dev.dv_xname, offset);
    797 				goto reset;
    798 			}
    799 			/*
    800 			 * offset == SIOP_NSG may be a valid condition if
    801 			 * we get a sdp when the xfer is done.
    802 			 * Don't call memmove in this case.
    803 			 */
    804 			if (offset < SIOP_NSG) {
    805 				memmove(&siop_cmd->siop_table->data[0],
    806 				    &siop_cmd->siop_table->data[offset],
    807 				    (SIOP_NSG - offset) * sizeof(scr_table_t));
    808 				siop_table_sync(siop_cmd,
    809 				    BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    810 			}
    811 			CALL_SCRIPT(Ent_sheduler);
    812 			return 1;
    813 		case A_int_resfail:
    814 			printf("reselect failed\n");
    815 			CALL_SCRIPT(Ent_sheduler);
    816 			return  1;
    817 		case A_int_done:
    818 			if (xs == NULL) {
    819 				printf("%s: done without command\n",
    820 				    sc->sc_dev.dv_xname);
    821 				siop_cmd->status = 0;
    822 				CALL_SCRIPT(Ent_sheduler);
    823 				siop_start(sc);
    824 				return 1;
    825 			}
    826 #if 0
    827 			printf("done, taget id 0x%x last msg in=0x%x "
    828 			    "status=0x%x\n",
    829 			    le32toh(siop_cmd->siop_table->id),
    830 			    siop_cmd->siop_table->msg_in[0],
    831 			    le32toh(siop_cmd->siop_table->status));
    832 #endif
    833 			INCSTAT(siop_stat_intr_done);
    834 			if (siop_cmd->status == CMDST_SENSE_ACTIVE)
    835 				siop_cmd->status = CMDST_SENSE_DONE;
    836 			else
    837 				siop_cmd->status = CMDST_DONE;
    838 			switch(le32toh(siop_cmd->siop_table->status)) {
    839 			case SCSI_OK:
    840 				xs->error = (siop_cmd->status == CMDST_DONE) ?
    841 				    XS_NOERROR : XS_SENSE;
    842 				break;
    843 			case SCSI_BUSY:
    844 				xs->error = XS_BUSY;
    845 				break;
    846 			case SCSI_CHECK:
    847 check_sense:
    848 				if (siop_cmd->status == CMDST_SENSE_DONE) {
    849 					/* request sense on a request sense ? */
    850 					printf("request sense failed\n");
    851 					xs->error = XS_DRIVER_STUFFUP;
    852 				} else {
    853 					siop_cmd->status = CMDST_SENSE;
    854 				}
    855 				break;
    856 			case 0xff:
    857 				/*
    858 				 * the status byte was not updated, cmd was
    859 				 * aborted
    860 				 */
    861 				xs->error = XS_SELTIMEOUT;
    862 				break;
    863 			default:
    864 				xs->error = XS_DRIVER_STUFFUP;
    865 			}
    866 			goto end;
    867 		default:
    868 			printf("unknown irqcode %x\n", irqcode);
    869 			xs->error = XS_SELTIMEOUT;
    870 			goto end;
    871 		}
    872 		return 1;
    873 	}
    874 	/* We just should't get there */
    875 	panic("siop_intr: I shouldn't be there !");
    876 	return 1;
    877 end:
    878 	siop_scsicmd_end(siop_cmd);
    879 	if (siop_cmd->status == CMDST_FREE) {
    880 		TAILQ_REMOVE(&sc->active_list[xs->sc_link->scsipi_scsi.target],
    881 		    siop_cmd, next);
    882 		TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next);
    883 	}
    884 	bus_space_write_4(sc->sc_rt, sc->sc_rh, SIOP_DSP,
    885 	    sc->sc_scriptdma->dm_segs[0].ds_addr + Ent_reselect);
    886 	siop_start(sc);
    887 	return 1;
    888 }
    889 
    890 void
    891 siop_scsicmd_end(siop_cmd)
    892 	struct siop_cmd *siop_cmd;
    893 {
    894 	struct scsipi_xfer *xs = siop_cmd->xs;
    895 	struct siop_softc *sc = siop_cmd->siop_sc;
    896 
    897 	if (siop_cmd->status != CMDST_SENSE_DONE &&
    898 	    xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
    899 		bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0,
    900 		    siop_cmd->dmamap_data->dm_mapsize,
    901 		    (xs->xs_control & XS_CTL_DATA_IN) ?
    902 		    BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
    903 		bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_data);
    904 	}
    905 	bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd);
    906 	if (siop_cmd->status == CMDST_SENSE) {
    907 		/* issue a request sense for this target */
    908 		int error, i;
    909 		siop_cmd->rs_cmd.opcode = REQUEST_SENSE;
    910 		siop_cmd->rs_cmd.byte2 = xs->sc_link->scsipi_scsi.lun << 5;
    911 		siop_cmd->rs_cmd.unused[0] = siop_cmd->rs_cmd.unused[1] = 0;
    912 		siop_cmd->rs_cmd.length = sizeof(struct scsipi_sense_data);
    913 		siop_cmd->rs_cmd.control = 0;
    914 		siop_cmd->siop_table->status = htole32(0xff); /*invalid status*/
    915 		siop_cmd->siop_table->t_msgout.count= htole32(1);
    916 		siop_cmd->siop_table->t_msgout.addr = htole32(siop_cmd->dsa);
    917 		siop_cmd->siop_table->msg_out[0] =
    918 		    MSG_IDENTIFY(xs->sc_link->scsipi_scsi.lun, 1);
    919 		error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_cmd,
    920 		    &siop_cmd->rs_cmd, sizeof(struct scsipi_sense),
    921 		    NULL, BUS_DMA_NOWAIT);
    922 		if (error) {
    923 			printf("%s: unable to load cmd DMA map: %d",
    924 			    sc->sc_dev.dv_xname, error);
    925 			xs->error = XS_DRIVER_STUFFUP;
    926 			goto out;
    927 		}
    928 		siop_cmd->siop_table->cmd.count =
    929 		    htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_len);
    930 		siop_cmd->siop_table->cmd.addr =
    931 		    htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_addr);
    932 		error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_data,
    933 		    &xs->sense.scsi_sense, sizeof(struct  scsipi_sense_data),
    934 		    NULL, BUS_DMA_NOWAIT);
    935 		if (error) {
    936 			printf("%s: unable to load sense DMA map: %d",
    937 			    sc->sc_dev.dv_xname, error);
    938 			xs->error = XS_DRIVER_STUFFUP;
    939 			bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd);
    940 			goto out;
    941 		}
    942 		for (i = 0; i < siop_cmd->dmamap_data->dm_nsegs; i++) {
    943 			siop_cmd->siop_table->data[i].count =
    944 			    htole32(siop_cmd->dmamap_data->dm_segs[i].ds_len);
    945 			siop_cmd->siop_table->data[i].addr =
    946 			    htole32(siop_cmd->dmamap_data->dm_segs[i].ds_addr);
    947 		}
    948 		bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0,
    949 		    siop_cmd->dmamap_data->dm_mapsize, BUS_DMASYNC_PREREAD);
    950 		bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_cmd, 0,
    951 		    siop_cmd->dmamap_cmd->dm_mapsize, BUS_DMASYNC_PREWRITE);
    952 		siop_table_sync(siop_cmd, BUS_DMASYNC_PREWRITE);
    953 #if 0
    954 		bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, CMD_OFF,
    955 		    sc->sc_scriptdma->dm_mapsize - CMD_OFF,
    956 		    BUS_DMASYNC_PREWRITE);
    957 #endif
    958 		return;
    959 	} else if (siop_cmd->status == CMDST_SENSE_DONE) {
    960 		bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0,
    961 		    siop_cmd->dmamap_data->dm_mapsize, BUS_DMASYNC_POSTREAD);
    962 		bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_data);
    963 	}
    964 out:
    965 	callout_stop(&siop_cmd->xs->xs_callout);
    966 	siop_cmd->status = CMDST_FREE;
    967 	xs->xs_status |= XS_STS_DONE;
    968 	xs->resid = 0;
    969 	scsipi_done (xs);
    970 }
    971 
    972 /*
    973  * handle a bus reset: reset chip, unqueue all active commands and report
    974  * loosage to upper layer.
    975  * As the upper layer may requeue immediatly we have to first store
    976  * all active commands in a temporary queue.
    977  */
    978 void
    979 siop_handle_reset(sc)
    980 	struct siop_softc *sc;
    981 {
    982 	struct cmd_list reset_list;
    983 	struct siop_cmd *siop_cmd, *next_siop_cmd;
    984 	int target;
    985 	/*
    986 	 * scsi bus reset. reset the chip and restart
    987 	 * the queue. Need to clean up all active commands
    988 	 */
    989 	printf("%s: scsi bus reset\n", sc->sc_dev.dv_xname);
    990 	/* stop, reset and restart the chip */
    991 	siop_reset(sc);
    992 	TAILQ_INIT(&reset_list);
    993 	/* find all active commands */
    994 	for (target = 0; target < 16; target++) {
    995 		for (siop_cmd = TAILQ_FIRST(&sc->active_list[target]);
    996 		    siop_cmd != NULL; siop_cmd = next_siop_cmd) {
    997 			next_siop_cmd = TAILQ_NEXT(siop_cmd, next);
    998 			if (siop_cmd->status < CMDST_ACTIVE)
    999 				continue;
   1000 			printf("cmd %p (target %d) in reset list\n", siop_cmd,
   1001 			    target);
   1002 			TAILQ_REMOVE( &sc->active_list[target], siop_cmd, next);
   1003 			TAILQ_INSERT_TAIL(&reset_list, siop_cmd, next);
   1004 		}
   1005 	}
   1006 	for (siop_cmd = TAILQ_FIRST(&reset_list); siop_cmd != NULL;
   1007 	    siop_cmd = next_siop_cmd) {
   1008 		next_siop_cmd = TAILQ_NEXT(siop_cmd, next);
   1009 		siop_cmd->xs->error = (siop_cmd->flags & CMDFL_TIMEOUT) ?
   1010 		    XS_TIMEOUT : XS_RESET;
   1011 		printf("cmd %p about to be processed\n", siop_cmd);
   1012 		TAILQ_REMOVE(&reset_list, siop_cmd, next);
   1013 		siop_scsicmd_end(siop_cmd);
   1014 		TAILQ_INSERT_TAIL(&sc->free_list, siop_cmd, next);
   1015 	}
   1016 }
   1017 
   1018 void
   1019 siop_minphys(bp)
   1020 	struct buf *bp;
   1021 {
   1022 	minphys(bp);
   1023 }
   1024 
   1025 int
   1026 siop_ioctl(link, cmd, arg, flag, p)
   1027 	struct scsipi_link *link;
   1028 	u_long cmd;
   1029 	caddr_t arg;
   1030 	int flag;
   1031 	struct proc *p;
   1032 {
   1033 	struct siop_softc *sc = link->adapter_softc;
   1034 	u_int8_t scntl1;
   1035 	int s;
   1036 
   1037 	switch (cmd) {
   1038 	case SCBUSIORESET:
   1039 		s = splbio();
   1040 		scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
   1041 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
   1042 		    scntl1 | SCNTL1_RST);
   1043 		/* minimum 25 us, more time won't hurt */
   1044 		delay(100);
   1045 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
   1046 		splx(s);
   1047 		return (0);
   1048 	default:
   1049 		return (ENOTTY);
   1050 	}
   1051 }
   1052 
   1053 int
   1054 siop_scsicmd(xs)
   1055 	struct scsipi_xfer *xs;
   1056 {
   1057 	struct siop_softc *sc = (struct siop_softc *)xs->sc_link->adapter_softc;
   1058 	struct siop_cmd *siop_cmd;
   1059 	int s, error, i;
   1060 	u_int32_t id;
   1061 
   1062 	s = splbio();
   1063 #if 0
   1064 	printf("starting cmd for %d:%d\n", xs->sc_link->scsipi_scsi.target,xs->sc_link->scsipi_scsi.lun);
   1065 #endif
   1066 	siop_cmd = sc->free_list.tqh_first;
   1067 	if (siop_cmd) {
   1068 		TAILQ_REMOVE(&sc->free_list, siop_cmd, next);
   1069 	}
   1070 	splx(s);
   1071 	if (siop_cmd == NULL) {
   1072 		xs->error = XS_DRIVER_STUFFUP;
   1073 		return(TRY_AGAIN_LATER);
   1074 	}
   1075 #ifdef DIAGNOSTIC
   1076 	if (siop_cmd->status != CMDST_FREE)
   1077 		panic("siop_scsicmd: new cmd not free");
   1078 #endif
   1079 	siop_cmd->xs = xs;
   1080 	id = 0x3 << 24; /* scntl3 */
   1081 	id |=  xs->sc_link->scsipi_scsi.target << 16; /* id */
   1082 	id |= 0xe0 << 8; /* scxfer */
   1083 	siop_cmd->siop_table->id = htole32(id);
   1084 	siop_cmd->siop_table->t_msgout.count= htole32(1);
   1085 	siop_cmd->siop_table->t_msgout.addr = htole32(siop_cmd->dsa);
   1086 	siop_cmd->siop_table->msg_out[0] =
   1087 	    MSG_IDENTIFY(xs->sc_link->scsipi_scsi.lun, 1);
   1088 	siop_cmd->siop_table->status = htole32(0xff); /* set invalid status */
   1089 
   1090 	/* load the DMA maps */
   1091 	error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_cmd,
   1092 	    xs->cmd, xs->cmdlen, NULL, BUS_DMA_NOWAIT);
   1093 	if (error) {
   1094 		printf("%s: unable to load cmd DMA map: %d",
   1095 		    sc->sc_dev.dv_xname, error);
   1096 		xs->error = XS_DRIVER_STUFFUP;
   1097 		return(TRY_AGAIN_LATER);
   1098 	}
   1099 	siop_cmd->siop_table->cmd.count =
   1100 	    htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_len);
   1101 	siop_cmd->siop_table->cmd.addr =
   1102 	    htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_addr);
   1103 	if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
   1104 		error = bus_dmamap_load(sc->sc_dmat, siop_cmd->dmamap_data,
   1105 		    xs->data, xs->datalen, NULL, BUS_DMA_NOWAIT);
   1106 		if (error) {
   1107 			printf("%s: unable to load cmd DMA map: %d",
   1108 			    sc->sc_dev.dv_xname, error);
   1109 			xs->error = XS_DRIVER_STUFFUP;
   1110 			return(TRY_AGAIN_LATER);
   1111 			bus_dmamap_unload(sc->sc_dmat, siop_cmd->dmamap_cmd);
   1112 		}
   1113 		for (i = 0; i < siop_cmd->dmamap_data->dm_nsegs; i++) {
   1114 			siop_cmd->siop_table->data[i].count =
   1115 			    htole32(siop_cmd->dmamap_data->dm_segs[i].ds_len);
   1116 			siop_cmd->siop_table->data[i].addr =
   1117 			    htole32(siop_cmd->dmamap_data->dm_segs[i].ds_addr);
   1118 		}
   1119 		bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_data, 0,
   1120 		    siop_cmd->dmamap_data->dm_mapsize,
   1121 		    (xs->xs_control & XS_CTL_DATA_IN) ?
   1122 		    BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
   1123 	}
   1124 	bus_dmamap_sync(sc->sc_dmat, siop_cmd->dmamap_cmd, 0,
   1125 	    siop_cmd->dmamap_cmd->dm_mapsize, BUS_DMASYNC_PREWRITE);
   1126 	siop_table_sync(siop_cmd, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1127 #if 0
   1128 	bus_dmamap_sync(sc->sc_dmat, sc->sc_scriptdma, 0,
   1129 	    sc->sc_scriptdma->dm_mapsize, BUS_DMASYNC_PREWRITE);
   1130 #endif
   1131 
   1132 	siop_cmd->status = CMDST_READY;
   1133 	s = splbio();
   1134 	TAILQ_INSERT_TAIL(&sc->active_list[xs->sc_link->scsipi_scsi.target],
   1135 	    siop_cmd, next);
   1136 	siop_start(sc);
   1137 	splx(s);
   1138 	return (SUCCESSFULLY_QUEUED);
   1139 }
   1140 
   1141 void
   1142 siop_start(sc)
   1143 	struct siop_softc *sc;
   1144 {
   1145 	struct siop_cmd *siop_cmd;
   1146 	u_int32_t *scr;
   1147 	u_int32_t dsa;
   1148 	int timeout;
   1149 	int target, slot;
   1150 	int newcmd = 0;
   1151 
   1152 	/*
   1153 	 * first make sure to read valid data
   1154 	 */
   1155 	siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
   1156 
   1157 	/*
   1158 	 * no need to restart at slot 0 each time we're looking for a free
   1159 	 * slot; init slot before the target loop.
   1160 	 */
   1161 	slot = 0;
   1162 	for (target = 0; target < 16; target++) {
   1163 		siop_cmd = sc->active_list[target].tqh_first;
   1164 		if (siop_cmd == NULL)
   1165 			continue;
   1166 		if (siop_cmd->status != CMDST_READY &&
   1167 		    siop_cmd->status != CMDST_SENSE)
   1168 			continue;
   1169 		/* mark command as active (if not reqsense) and start script */
   1170 		if (siop_cmd->status == CMDST_READY)
   1171 			siop_cmd->status = CMDST_ACTIVE;
   1172 		else if (siop_cmd->status == CMDST_SENSE)
   1173 			siop_cmd->status = CMDST_SENSE_ACTIVE;
   1174 		else
   1175 			panic("siop_start: bad status");
   1176 		/* find a free sheduler slot and load it */
   1177 		for (; slot < sc->sc_nshedslots; slot++) {
   1178 			scr = &sc->sc_script[Ent_sheduler / 4 +
   1179 			    (Ent_nextslot / 4) * slot];
   1180 			/*
   1181 			 * if relative addr of first jump is 0 the slot isn't
   1182 			 * free
   1183 			 */
   1184 			if (scr[Ent_slot / 4 + 1] == 0)
   1185 				continue;
   1186 #ifdef DEBUG_SHED
   1187 			printf("using slot %d\n", slot);
   1188 #endif
   1189 			/* record that we started at last one new comand */
   1190 			newcmd = 1;
   1191 			/* ok, patch script with DSA addr */
   1192 			dsa = siop_cmd->dsa;
   1193 			/*
   1194 			 * 0x78000000 is a 'move data8 to reg'. data8 is the
   1195 			 * second octet, reg offset is the third.
   1196 			 */
   1197 			scr[Ent_idsa0 / 4] =
   1198 			    htole32(0x78100000 | ((dsa & 0x000000ff) <<  8));
   1199 			scr[Ent_idsa1 / 4] =
   1200 			    htole32(0x78110000 | ( dsa & 0x0000ff00       ));
   1201 			scr[Ent_idsa2 / 4] =
   1202 			    htole32(0x78120000 | ((dsa & 0x00ff0000) >>  8));
   1203 			scr[Ent_idsa3 / 4] =
   1204 			    htole32(0x78130000 | ((dsa & 0xff000000) >> 16));
   1205 			/* change status of cmd */
   1206 			if (siop_cmd->status == CMDST_ACTIVE) {
   1207 				if ((siop_cmd->xs->xs_control & XS_CTL_POLL)
   1208 				    == 0) {
   1209 					/* start exire timer */
   1210 					timeout =
   1211 					    siop_cmd->xs->timeout * hz / 1000;
   1212 					if (timeout == 0)
   1213 						timeout = 1;
   1214 					callout_reset(&siop_cmd->xs->xs_callout,
   1215 					    timeout, siop_timeout, siop_cmd);
   1216 				}
   1217 			}
   1218 			/*
   1219 			 * Change jump offset so that this slot will be
   1220 			 * handled
   1221 			 */
   1222 			scr[Ent_slot / 4 + 1] = 0;
   1223 			break;
   1224 		}
   1225 		/* if we didn't find any free slot no need to try next target */
   1226 		if (slot == sc->sc_nshedslots)
   1227 			break;
   1228 	}
   1229 	/* if nothing changed no need to flush cache and wakeup script */
   1230 	if (newcmd == 0)
   1231 		return;
   1232 	/* make sure SCRIPT processor will read valid data */
   1233 	siop_script_sync(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
   1234 	/* Signal script it has some work to do */
   1235 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SIGP);
   1236 	/* and wait for IRQ */
   1237 	return;
   1238 }
   1239 
   1240 void
   1241 siop_timeout(v)
   1242 	void *v;
   1243 {
   1244 	struct siop_cmd *siop_cmd = v;
   1245 	struct siop_softc *sc = siop_cmd->siop_sc;
   1246 	int s;
   1247 	u_int8_t scntl1;
   1248 
   1249 	scsi_print_addr(siop_cmd->xs->sc_link);
   1250 	printf("command timeout\n");
   1251 
   1252 	s = splbio();
   1253 	/* reset the scsi bus */
   1254 	scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
   1255 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
   1256 	    scntl1 | SCNTL1_RST);
   1257 	/* minimum 25 us, more time won't hurt */
   1258 	delay(100);
   1259 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
   1260 
   1261 	/* desactivate callout */
   1262 	callout_stop(&siop_cmd->xs->xs_callout);
   1263 	/* mark command has being timed out; siop_intr will handle it */
   1264 	/*
   1265 	 * mark command has being timed out and just return;
   1266 	 * the bus reset will generate an interrupt,
   1267 	 * it will be handled in siop_intr()
   1268 	 */
   1269 	siop_cmd->flags |= CMDFL_TIMEOUT;
   1270 	splx(s);
   1271 	return;
   1272 
   1273 }
   1274 
   1275 void
   1276 siop_sdp(siop_cmd)
   1277 	struct siop_cmd *siop_cmd;
   1278 {
   1279 	/* save data pointer. Handle async only for now */
   1280 	int offset, dbc, sstat;
   1281 	struct siop_softc *sc = siop_cmd->siop_sc;
   1282 	scr_table_t *table; /* table to patch */
   1283 
   1284 	if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
   1285 	    == 0)
   1286 	    return; /* no data pointers to save */
   1287 	offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
   1288 	if (offset >= SIOP_NSG) {
   1289 		printf("%s: bad offset in siop_sdp (%d)\n",
   1290 		    sc->sc_dev.dv_xname, offset);
   1291 		return;
   1292 	}
   1293 	table = &siop_cmd->siop_table->data[offset];
   1294 #ifdef DEBUG_DR
   1295 	printf("sdp: offset %d count=%d addr=0x%x ", offset,
   1296 	    table->count, table->addr);
   1297 #endif
   1298 	dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff;
   1299 	if (siop_cmd->xs->xs_control & XS_CTL_DATA_OUT) {
   1300 		/* need to account stale data in FIFO */
   1301 		/* XXX check for large fifo */
   1302 		dbc += (bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO) -
   1303 		    (dbc & 0x7f)) & 0x7f;
   1304 		sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0);
   1305 		if (sstat & SSTAT0_OLF)
   1306 			dbc++;
   1307 		if (sstat & SSTAT0_ORF)
   1308 			dbc++;
   1309 		/* XXX check sstat1 for wide adapters */
   1310 		/* Flush the FIFO */
   1311 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
   1312 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) |
   1313 			CTEST3_CLF);
   1314 	}
   1315 	table->addr =
   1316 	    htole32(le32toh(table->addr) + le32toh(table->count) - dbc);
   1317 	table->count = htole32(dbc);
   1318 #ifdef DEBUG_DR
   1319 	printf("now count=%d addr=0x%x\n", table->count, table->addr);
   1320 #endif
   1321 }
   1322 
   1323 void
   1324 siop_dump_script(sc)
   1325 	struct siop_softc *sc;
   1326 {
   1327 	int i;
   1328 	siop_script_sync(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
   1329 	for (i = 0; i < CMD_OFF / 4; i += 2) {
   1330 		printf("0x%04x: 0x%08x 0x%08x", i * 4,
   1331 		    le32toh(sc->sc_script[i]), le32toh(sc->sc_script[i+1]));
   1332 		if ((le32toh(sc->sc_script[i]) & 0xe0000000) == 0xc0000000) {
   1333 			i++;
   1334 			printf(" 0x%08x", le32toh(sc->sc_script[i+1]));
   1335 		}
   1336 		printf("\n");
   1337 	}
   1338 }
   1339 
   1340 #ifdef SIOP_STATS
   1341 void
   1342 siop_printstats()
   1343 {
   1344 	printf("siop_stat_intr %d\n", siop_stat_intr);
   1345 	printf("siop_stat_intr_shortxfer %d\n", siop_stat_intr_shortxfer);
   1346 	printf("siop_stat_intr_xferdisc %d\n", siop_stat_intr_xferdisc);
   1347 	printf("siop_stat_intr_sdp %d\n", siop_stat_intr_sdp);
   1348 	printf("siop_stat_intr_reselect %d\n", siop_stat_intr_reselect);
   1349 	printf("siop_stat_intr_done %d\n", siop_stat_intr_done);
   1350 }
   1351 #endif
   1352