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siop_common.c revision 1.11.2.2
      1  1.11.2.2  bouyer /*	$NetBSD: siop_common.c,v 1.11.2.2 2000/11/20 11:40:55 bouyer Exp $	*/
      2  1.11.2.2  bouyer 
      3  1.11.2.2  bouyer /*
      4  1.11.2.2  bouyer  * Copyright (c) 2000 Manuel Bouyer.
      5  1.11.2.2  bouyer  *
      6  1.11.2.2  bouyer  * Redistribution and use in source and binary forms, with or without
      7  1.11.2.2  bouyer  * modification, are permitted provided that the following conditions
      8  1.11.2.2  bouyer  * are met:
      9  1.11.2.2  bouyer  * 1. Redistributions of source code must retain the above copyright
     10  1.11.2.2  bouyer  *    notice, this list of conditions and the following disclaimer.
     11  1.11.2.2  bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12  1.11.2.2  bouyer  *    notice, this list of conditions and the following disclaimer in the
     13  1.11.2.2  bouyer  *    documentation and/or other materials provided with the distribution.
     14  1.11.2.2  bouyer  * 3. All advertising materials mentioning features or use of this software
     15  1.11.2.2  bouyer  *    must display the following acknowledgement:
     16  1.11.2.2  bouyer  *	This product includes software developed by Manuel Bouyer
     17  1.11.2.2  bouyer  * 4. The name of the author may not be used to endorse or promote products
     18  1.11.2.2  bouyer  *    derived from this software without specific prior written permission.
     19  1.11.2.2  bouyer  *
     20  1.11.2.2  bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  1.11.2.2  bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  1.11.2.2  bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  1.11.2.2  bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  1.11.2.2  bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  1.11.2.2  bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  1.11.2.2  bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  1.11.2.2  bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  1.11.2.2  bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  1.11.2.2  bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  1.11.2.2  bouyer  *
     31  1.11.2.2  bouyer  */
     32  1.11.2.2  bouyer 
     33  1.11.2.2  bouyer /* SYM53c7/8xx PCI-SCSI I/O Processors driver */
     34  1.11.2.2  bouyer 
     35  1.11.2.2  bouyer #include <sys/param.h>
     36  1.11.2.2  bouyer #include <sys/systm.h>
     37  1.11.2.2  bouyer #include <sys/device.h>
     38  1.11.2.2  bouyer #include <sys/malloc.h>
     39  1.11.2.2  bouyer #include <sys/buf.h>
     40  1.11.2.2  bouyer #include <sys/kernel.h>
     41  1.11.2.2  bouyer #include <sys/scsiio.h>
     42  1.11.2.2  bouyer 
     43  1.11.2.2  bouyer #include <machine/endian.h>
     44  1.11.2.2  bouyer #include <machine/bus.h>
     45  1.11.2.2  bouyer 
     46  1.11.2.2  bouyer #include <dev/scsipi/scsi_all.h>
     47  1.11.2.2  bouyer #include <dev/scsipi/scsi_message.h>
     48  1.11.2.2  bouyer #include <dev/scsipi/scsipi_all.h>
     49  1.11.2.2  bouyer 
     50  1.11.2.2  bouyer #include <dev/scsipi/scsiconf.h>
     51  1.11.2.2  bouyer 
     52  1.11.2.2  bouyer #include <dev/ic/siopreg.h>
     53  1.11.2.2  bouyer #include <dev/ic/siopvar.h>
     54  1.11.2.2  bouyer #include <dev/ic/siopvar_common.h>
     55  1.11.2.2  bouyer 
     56  1.11.2.2  bouyer #undef DEBUG
     57  1.11.2.2  bouyer #undef DEBUG_DR
     58  1.11.2.2  bouyer 
     59  1.11.2.2  bouyer void
     60  1.11.2.2  bouyer siop_common_reset(sc)
     61  1.11.2.2  bouyer 	struct siop_softc *sc;
     62  1.11.2.2  bouyer {
     63  1.11.2.2  bouyer 	u_int32_t stest3;
     64  1.11.2.2  bouyer 
     65  1.11.2.2  bouyer 	/* reset the chip */
     66  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST);
     67  1.11.2.2  bouyer 	delay(1000);
     68  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, 0);
     69  1.11.2.2  bouyer 
     70  1.11.2.2  bouyer 	/* init registers */
     71  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL0,
     72  1.11.2.2  bouyer 	    SCNTL0_ARB_MASK | SCNTL0_EPC | SCNTL0_AAP);
     73  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 0);
     74  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, sc->clock_div);
     75  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 0);
     76  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DIEN, 0xff);
     77  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN0,
     78  1.11.2.2  bouyer 	    0xff & ~(SIEN0_CMP | SIEN0_SEL | SIEN0_RSL));
     79  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN1,
     80  1.11.2.2  bouyer 	    0xff & ~(SIEN1_HTH | SIEN1_GEN));
     81  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 0);
     82  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, STEST3_TE);
     83  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
     84  1.11.2.2  bouyer 	    (0xb << STIME0_SEL_SHIFT));
     85  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCID,
     86  1.11.2.2  bouyer 	    sc->sc_link.scsipi_scsi.adapter_target | SCID_RRE);
     87  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_RESPID0,
     88  1.11.2.2  bouyer 	    1 << sc->sc_link.scsipi_scsi.adapter_target);
     89  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL,
     90  1.11.2.2  bouyer 	    (sc->features & SF_CHIP_PF) ? DCNTL_COM | DCNTL_PFEN : DCNTL_COM);
     91  1.11.2.2  bouyer 
     92  1.11.2.2  bouyer 	/* enable clock doubler or quadruler if appropriate */
     93  1.11.2.2  bouyer 	if (sc->features & (SF_CHIP_DBLR | SF_CHIP_QUAD)) {
     94  1.11.2.2  bouyer 		stest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3);
     95  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
     96  1.11.2.2  bouyer 		    STEST1_DBLEN);
     97  1.11.2.2  bouyer 		if (sc->features & SF_CHIP_QUAD) {
     98  1.11.2.2  bouyer 			/* wait for PPL to lock */
     99  1.11.2.2  bouyer 			while ((bus_space_read_1(sc->sc_rt, sc->sc_rh,
    100  1.11.2.2  bouyer 			    SIOP_STEST4) & STEST4_LOCK) == 0)
    101  1.11.2.2  bouyer 				delay(10);
    102  1.11.2.2  bouyer 		} else {
    103  1.11.2.2  bouyer 			/* data sheet says 20us - more won't hurt */
    104  1.11.2.2  bouyer 			delay(100);
    105  1.11.2.2  bouyer 		}
    106  1.11.2.2  bouyer 		/* halt scsi clock, select doubler/quad, restart clock */
    107  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3,
    108  1.11.2.2  bouyer 		    stest3 | STEST3_HSC);
    109  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
    110  1.11.2.2  bouyer 		    STEST1_DBLEN | STEST1_DBLSEL);
    111  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, stest3);
    112  1.11.2.2  bouyer 	} else {
    113  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 0);
    114  1.11.2.2  bouyer 	}
    115  1.11.2.2  bouyer 	if (sc->features & SF_CHIP_FIFO)
    116  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5,
    117  1.11.2.2  bouyer 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5) |
    118  1.11.2.2  bouyer 		    CTEST5_DFS);
    119  1.11.2.2  bouyer 
    120  1.11.2.2  bouyer 	sc->sc_reset(sc);
    121  1.11.2.2  bouyer }
    122  1.11.2.2  bouyer 
    123  1.11.2.2  bouyer /* prepare tables before sending a cmd */
    124  1.11.2.2  bouyer void
    125  1.11.2.2  bouyer siop_setuptables(siop_cmd)
    126  1.11.2.2  bouyer 	struct siop_cmd *siop_cmd;
    127  1.11.2.2  bouyer {
    128  1.11.2.2  bouyer 	int i;
    129  1.11.2.2  bouyer 	struct siop_softc *sc = siop_cmd->siop_sc;
    130  1.11.2.2  bouyer 	struct scsipi_xfer *xs = siop_cmd->xs;
    131  1.11.2.2  bouyer 	int target = xs->sc_link->scsipi_scsi.target;
    132  1.11.2.2  bouyer 	int lun = xs->sc_link->scsipi_scsi.lun;
    133  1.11.2.2  bouyer 
    134  1.11.2.2  bouyer 	siop_cmd->siop_tables.id = htole32(sc->targets[target]->id);
    135  1.11.2.2  bouyer 	memset(siop_cmd->siop_tables.msg_out, 0, 8);
    136  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[0] = MSG_IDENTIFY(lun, 1);
    137  1.11.2.2  bouyer 	siop_cmd->siop_tables.t_msgout.count= htole32(1);
    138  1.11.2.2  bouyer 	if (sc->targets[target]->status == TARST_ASYNC) {
    139  1.11.2.2  bouyer 		if (sc->targets[target]->flags & TARF_WIDE) {
    140  1.11.2.2  bouyer 			sc->targets[target]->status = TARST_WIDE_NEG;
    141  1.11.2.2  bouyer 			siop_wdtr_msg(siop_cmd, 1, MSG_EXT_WDTR_BUS_16_BIT);
    142  1.11.2.2  bouyer 		} else if (sc->targets[target]->flags & TARF_SYNC) {
    143  1.11.2.2  bouyer 			sc->targets[target]->status = TARST_SYNC_NEG;
    144  1.11.2.2  bouyer 			siop_sdtr_msg(siop_cmd, 1, sc->minsync, sc->maxoff);
    145  1.11.2.2  bouyer 		} else {
    146  1.11.2.2  bouyer 			sc->targets[target]->status = TARST_OK;
    147  1.11.2.2  bouyer 		}
    148  1.11.2.2  bouyer 	} else if (sc->targets[target]->status == TARST_OK &&
    149  1.11.2.2  bouyer 	    (sc->targets[target]->flags & TARF_TAG) &&
    150  1.11.2.2  bouyer 	    siop_cmd->status != CMDST_SENSE) {
    151  1.11.2.2  bouyer 		siop_cmd->flags |= CMDFL_TAG;
    152  1.11.2.2  bouyer 	}
    153  1.11.2.2  bouyer 	siop_cmd->siop_tables.status =
    154  1.11.2.2  bouyer 	    htole32(SCSI_SIOP_NOSTATUS); /* set invalid status */
    155  1.11.2.2  bouyer 
    156  1.11.2.2  bouyer 	siop_cmd->siop_tables.cmd.count =
    157  1.11.2.2  bouyer 	    htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_len);
    158  1.11.2.2  bouyer 	siop_cmd->siop_tables.cmd.addr =
    159  1.11.2.2  bouyer 	    htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_addr);
    160  1.11.2.2  bouyer 	if ((xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ||
    161  1.11.2.2  bouyer 	    siop_cmd->status == CMDST_SENSE) {
    162  1.11.2.2  bouyer 		for (i = 0; i < siop_cmd->dmamap_data->dm_nsegs; i++) {
    163  1.11.2.2  bouyer 			siop_cmd->siop_tables.data[i].count =
    164  1.11.2.2  bouyer 			    htole32(siop_cmd->dmamap_data->dm_segs[i].ds_len);
    165  1.11.2.2  bouyer 			siop_cmd->siop_tables.data[i].addr =
    166  1.11.2.2  bouyer 			    htole32(siop_cmd->dmamap_data->dm_segs[i].ds_addr);
    167  1.11.2.2  bouyer 		}
    168  1.11.2.2  bouyer 	}
    169  1.11.2.2  bouyer 	siop_table_sync(siop_cmd, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
    170  1.11.2.2  bouyer }
    171  1.11.2.2  bouyer 
    172  1.11.2.2  bouyer int
    173  1.11.2.2  bouyer siop_wdtr_neg(siop_cmd)
    174  1.11.2.2  bouyer 	struct siop_cmd *siop_cmd;
    175  1.11.2.2  bouyer {
    176  1.11.2.2  bouyer 	struct siop_softc *sc = siop_cmd->siop_sc;
    177  1.11.2.2  bouyer 	struct siop_target *siop_target = siop_cmd->siop_target;
    178  1.11.2.2  bouyer 	int target = siop_cmd->xs->sc_link->scsipi_scsi.target;
    179  1.11.2.2  bouyer 	struct siop_xfer_common *tables = &siop_cmd->siop_xfer->tables;
    180  1.11.2.2  bouyer 
    181  1.11.2.2  bouyer 	if (siop_target->status == TARST_WIDE_NEG) {
    182  1.11.2.2  bouyer 		/* we initiated wide negotiation */
    183  1.11.2.2  bouyer 		switch (tables->msg_in[3]) {
    184  1.11.2.2  bouyer 		case MSG_EXT_WDTR_BUS_8_BIT:
    185  1.11.2.2  bouyer 			printf("%s: target %d using 8bit transfers\n",
    186  1.11.2.2  bouyer 			    sc->sc_dev.dv_xname, target);
    187  1.11.2.2  bouyer 			siop_target->flags &= ~TARF_ISWIDE;
    188  1.11.2.2  bouyer 			sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
    189  1.11.2.2  bouyer 			break;
    190  1.11.2.2  bouyer 		case MSG_EXT_WDTR_BUS_16_BIT:
    191  1.11.2.2  bouyer 			if (siop_target->flags & TARF_WIDE) {
    192  1.11.2.2  bouyer 				printf("%s: target %d using 16bit transfers\n",
    193  1.11.2.2  bouyer 				    sc->sc_dev.dv_xname, target);
    194  1.11.2.2  bouyer 				siop_target->flags |= TARF_ISWIDE;
    195  1.11.2.2  bouyer 				sc->targets[target]->id |= (SCNTL3_EWS << 24);
    196  1.11.2.2  bouyer 				break;
    197  1.11.2.2  bouyer 			}
    198  1.11.2.2  bouyer 		/* FALLTHROUH */
    199  1.11.2.2  bouyer 		default:
    200  1.11.2.2  bouyer 			/*
    201  1.11.2.2  bouyer  			 * hum, we got more than what we can handle, shoudn't
    202  1.11.2.2  bouyer 			 * happen. Reject, and stay async
    203  1.11.2.2  bouyer 			 */
    204  1.11.2.2  bouyer 			siop_target->flags &= ~TARF_ISWIDE;
    205  1.11.2.2  bouyer 			siop_target->status = TARST_OK;
    206  1.11.2.2  bouyer 			printf("%s: rejecting invalid wide negotiation from "
    207  1.11.2.2  bouyer 			    "target %d (%d)\n", sc->sc_dev.dv_xname, target,
    208  1.11.2.2  bouyer 			    tables->msg_in[3]);
    209  1.11.2.2  bouyer 			tables->t_msgout.count= htole32(1);
    210  1.11.2.2  bouyer 			tables->msg_out[0] = MSG_MESSAGE_REJECT;
    211  1.11.2.2  bouyer 			return SIOP_NEG_MSGOUT;
    212  1.11.2.2  bouyer 		}
    213  1.11.2.2  bouyer 		tables->id = htole32(sc->targets[target]->id);
    214  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh,
    215  1.11.2.2  bouyer 		    SIOP_SCNTL3,
    216  1.11.2.2  bouyer 		    (sc->targets[target]->id >> 24) & 0xff);
    217  1.11.2.2  bouyer 		/* we now need to do sync */
    218  1.11.2.2  bouyer 		if (siop_target->flags & TARF_SYNC) {
    219  1.11.2.2  bouyer 			siop_target->status = TARST_SYNC_NEG;
    220  1.11.2.2  bouyer 			siop_sdtr_msg(siop_cmd, 0, sc->minsync, sc->maxoff);
    221  1.11.2.2  bouyer 			return SIOP_NEG_MSGOUT;
    222  1.11.2.2  bouyer 		} else {
    223  1.11.2.2  bouyer 			siop_target->status = TARST_OK;
    224  1.11.2.2  bouyer 			return SIOP_NEG_ACK;
    225  1.11.2.2  bouyer 		}
    226  1.11.2.2  bouyer 	} else {
    227  1.11.2.2  bouyer 		/* target initiated wide negotiation */
    228  1.11.2.2  bouyer 		if (tables->msg_in[3] >= MSG_EXT_WDTR_BUS_16_BIT
    229  1.11.2.2  bouyer 		    && (siop_target->flags & TARF_WIDE)) {
    230  1.11.2.2  bouyer 			printf("%s: target %d using 16bit transfers\n",
    231  1.11.2.2  bouyer 			    sc->sc_dev.dv_xname, target);
    232  1.11.2.2  bouyer 			siop_target->flags |= TARF_ISWIDE;
    233  1.11.2.2  bouyer 			sc->targets[target]->id |= SCNTL3_EWS << 24;
    234  1.11.2.2  bouyer 		} else {
    235  1.11.2.2  bouyer 			printf("%s: target %d using 8bit transfers\n",
    236  1.11.2.2  bouyer 			    sc->sc_dev.dv_xname, target);
    237  1.11.2.2  bouyer 			siop_target->flags &= ~TARF_ISWIDE;
    238  1.11.2.2  bouyer 			sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
    239  1.11.2.2  bouyer 		}
    240  1.11.2.2  bouyer 		tables->id = htole32(sc->targets[target]->id);
    241  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
    242  1.11.2.2  bouyer 		    (sc->targets[target]->id >> 24) & 0xff);
    243  1.11.2.2  bouyer 		/*
    244  1.11.2.2  bouyer 		 * we did reset wide parameters, so fall back to async,
    245  1.11.2.2  bouyer 		 * but don't schedule a sync neg, target should initiate it
    246  1.11.2.2  bouyer 		 */
    247  1.11.2.2  bouyer 		siop_target->status = TARST_OK;
    248  1.11.2.2  bouyer 		siop_wdtr_msg(siop_cmd, 0, (siop_target->flags & TARF_ISWIDE) ?
    249  1.11.2.2  bouyer 		    MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT);
    250  1.11.2.2  bouyer 		return SIOP_NEG_MSGOUT;
    251  1.11.2.2  bouyer 	}
    252  1.11.2.2  bouyer }
    253  1.11.2.2  bouyer 
    254  1.11.2.2  bouyer int
    255  1.11.2.2  bouyer siop_sdtr_neg(siop_cmd)
    256  1.11.2.2  bouyer 	struct siop_cmd *siop_cmd;
    257  1.11.2.2  bouyer {
    258  1.11.2.2  bouyer 	struct siop_softc *sc = siop_cmd->siop_sc;
    259  1.11.2.2  bouyer 	struct siop_target *siop_target = siop_cmd->siop_target;
    260  1.11.2.2  bouyer 	int target = siop_cmd->xs->sc_link->scsipi_scsi.target;
    261  1.11.2.2  bouyer 	int sync, offset, i;
    262  1.11.2.2  bouyer 	int send_msgout = 0;
    263  1.11.2.2  bouyer 	struct siop_xfer_common *tables = &siop_cmd->siop_xfer->tables;
    264  1.11.2.2  bouyer 
    265  1.11.2.2  bouyer 	sync = tables->msg_in[3];
    266  1.11.2.2  bouyer 	offset = tables->msg_in[4];
    267  1.11.2.2  bouyer 
    268  1.11.2.2  bouyer 	if (siop_target->status == TARST_SYNC_NEG) {
    269  1.11.2.2  bouyer 		/* we initiated sync negotiation */
    270  1.11.2.2  bouyer 		siop_target->status = TARST_OK;
    271  1.11.2.2  bouyer #ifdef DEBUG
    272  1.11.2.2  bouyer 		printf("sdtr: sync %d offset %d\n", sync, offset);
    273  1.11.2.2  bouyer #endif
    274  1.11.2.2  bouyer 		if (offset > sc->maxoff || sync < sc->minsync ||
    275  1.11.2.2  bouyer 			sync > sc->maxsync)
    276  1.11.2.2  bouyer 			goto reject;
    277  1.11.2.2  bouyer 		for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]);
    278  1.11.2.2  bouyer 		    i++) {
    279  1.11.2.2  bouyer 			if (sc->clock_period != scf_period[i].clock)
    280  1.11.2.2  bouyer 				continue;
    281  1.11.2.2  bouyer 			if (scf_period[i].period == sync) {
    282  1.11.2.2  bouyer 				/* ok, found it. we now are sync. */
    283  1.11.2.2  bouyer 				printf("%s: target %d now synchronous at "
    284  1.11.2.2  bouyer 				    "%sMhz, offset %d\n", sc->sc_dev.dv_xname,
    285  1.11.2.2  bouyer 				    target, scf_period[i].rate, offset);
    286  1.11.2.2  bouyer 				sc->targets[target]->id &=
    287  1.11.2.2  bouyer 				    ~(SCNTL3_SCF_MASK << 24);
    288  1.11.2.2  bouyer 				sc->targets[target]->id |= scf_period[i].scf
    289  1.11.2.2  bouyer 				    << (24 + SCNTL3_SCF_SHIFT);
    290  1.11.2.2  bouyer 				if (sync < 25) /* Ultra */
    291  1.11.2.2  bouyer 					sc->targets[target]->id |=
    292  1.11.2.2  bouyer 					    SCNTL3_ULTRA << 24;
    293  1.11.2.2  bouyer 				else
    294  1.11.2.2  bouyer 					sc->targets[target]->id &=
    295  1.11.2.2  bouyer 					    ~(SCNTL3_ULTRA << 24);
    296  1.11.2.2  bouyer 				sc->targets[target]->id &=
    297  1.11.2.2  bouyer 				    ~(SXFER_MO_MASK << 8);
    298  1.11.2.2  bouyer 				sc->targets[target]->id |=
    299  1.11.2.2  bouyer 				    (offset & SXFER_MO_MASK) << 8;
    300  1.11.2.2  bouyer 				goto end;
    301  1.11.2.2  bouyer 			}
    302  1.11.2.2  bouyer 		}
    303  1.11.2.2  bouyer 		/*
    304  1.11.2.2  bouyer 		 * we didn't find it in our table, do async and send reject
    305  1.11.2.2  bouyer 		 * msg
    306  1.11.2.2  bouyer 		 */
    307  1.11.2.2  bouyer reject:
    308  1.11.2.2  bouyer 		send_msgout = 1;
    309  1.11.2.2  bouyer 		tables->t_msgout.count= htole32(1);
    310  1.11.2.2  bouyer 		tables->msg_out[0] = MSG_MESSAGE_REJECT;
    311  1.11.2.2  bouyer 		printf("%s: target %d asynchronous\n", sc->sc_dev.dv_xname,
    312  1.11.2.2  bouyer 		    target);
    313  1.11.2.2  bouyer 		sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
    314  1.11.2.2  bouyer 		sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
    315  1.11.2.2  bouyer 		sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
    316  1.11.2.2  bouyer 	} else { /* target initiated sync neg */
    317  1.11.2.2  bouyer #ifdef DEBUG
    318  1.11.2.2  bouyer 		printf("sdtr (target): sync %d offset %d\n", sync, offset);
    319  1.11.2.2  bouyer #endif
    320  1.11.2.2  bouyer 		if (offset == 0 || sync > sc->maxsync) { /* async */
    321  1.11.2.2  bouyer 			goto async;
    322  1.11.2.2  bouyer 		}
    323  1.11.2.2  bouyer 		if (offset > sc->maxoff)
    324  1.11.2.2  bouyer 			offset = sc->maxoff;
    325  1.11.2.2  bouyer 		if (sync < sc->minsync)
    326  1.11.2.2  bouyer 			sync = sc->minsync;
    327  1.11.2.2  bouyer 		/* look for sync period */
    328  1.11.2.2  bouyer 		for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]);
    329  1.11.2.2  bouyer 		    i++) {
    330  1.11.2.2  bouyer 			if (sc->clock_period != scf_period[i].clock)
    331  1.11.2.2  bouyer 				continue;
    332  1.11.2.2  bouyer 			if (scf_period[i].period == sync) {
    333  1.11.2.2  bouyer 				/* ok, found it. we now are sync. */
    334  1.11.2.2  bouyer 				printf("%s: target %d now synchronous at "
    335  1.11.2.2  bouyer 				    "%sMhz, offset %d\n", sc->sc_dev.dv_xname,
    336  1.11.2.2  bouyer 				    target, scf_period[i].rate, offset);
    337  1.11.2.2  bouyer 				sc->targets[target]->id &=
    338  1.11.2.2  bouyer 				    ~(SCNTL3_SCF_MASK << 24);
    339  1.11.2.2  bouyer 				sc->targets[target]->id |= scf_period[i].scf
    340  1.11.2.2  bouyer 				    << (24 + SCNTL3_SCF_SHIFT);
    341  1.11.2.2  bouyer 				if (sync < 25) /* Ultra */
    342  1.11.2.2  bouyer 					sc->targets[target]->id |=
    343  1.11.2.2  bouyer 					    SCNTL3_ULTRA << 24;
    344  1.11.2.2  bouyer 				else
    345  1.11.2.2  bouyer 					sc->targets[target]->id &=
    346  1.11.2.2  bouyer 					    ~(SCNTL3_ULTRA << 24);
    347  1.11.2.2  bouyer 				sc->targets[target]->id &=
    348  1.11.2.2  bouyer 				    ~(SXFER_MO_MASK << 8);
    349  1.11.2.2  bouyer 				sc->targets[target]->id |=
    350  1.11.2.2  bouyer 				    (offset & SXFER_MO_MASK) << 8;
    351  1.11.2.2  bouyer 				siop_sdtr_msg(siop_cmd, 0, sync, offset);
    352  1.11.2.2  bouyer 				send_msgout = 1;
    353  1.11.2.2  bouyer 				goto end;
    354  1.11.2.2  bouyer 			}
    355  1.11.2.2  bouyer 		}
    356  1.11.2.2  bouyer async:
    357  1.11.2.2  bouyer 		printf("%s: target %d asynchronous\n",
    358  1.11.2.2  bouyer 		    sc->sc_dev.dv_xname, target);
    359  1.11.2.2  bouyer 		sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
    360  1.11.2.2  bouyer 		sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
    361  1.11.2.2  bouyer 		sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
    362  1.11.2.2  bouyer 		siop_sdtr_msg(siop_cmd, 0, 0, 0);
    363  1.11.2.2  bouyer 		send_msgout = 1;
    364  1.11.2.2  bouyer 	}
    365  1.11.2.2  bouyer end:
    366  1.11.2.2  bouyer #ifdef DEBUG
    367  1.11.2.2  bouyer 	printf("id now 0x%x\n", sc->targets[target]->id);
    368  1.11.2.2  bouyer #endif
    369  1.11.2.2  bouyer 	tables->id = htole32(sc->targets[target]->id);
    370  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
    371  1.11.2.2  bouyer 	    (sc->targets[target]->id >> 24) & 0xff);
    372  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
    373  1.11.2.2  bouyer 	    (sc->targets[target]->id >> 8) & 0xff);
    374  1.11.2.2  bouyer 	if (send_msgout) {
    375  1.11.2.2  bouyer 		return SIOP_NEG_MSGOUT;
    376  1.11.2.2  bouyer 	} else {
    377  1.11.2.2  bouyer 		return SIOP_NEG_ACK;
    378  1.11.2.2  bouyer 	}
    379  1.11.2.2  bouyer }
    380  1.11.2.2  bouyer 
    381  1.11.2.2  bouyer void
    382  1.11.2.2  bouyer siop_sdtr_msg(siop_cmd, offset, ssync, soff)
    383  1.11.2.2  bouyer 	struct siop_cmd *siop_cmd;
    384  1.11.2.2  bouyer 	int offset;
    385  1.11.2.2  bouyer 	int ssync, soff;
    386  1.11.2.2  bouyer {
    387  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 0] = MSG_EXTENDED;
    388  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 1] = MSG_EXT_SDTR_LEN;
    389  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 2] = MSG_EXT_SDTR;
    390  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 3] = ssync;
    391  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 4] = soff;
    392  1.11.2.2  bouyer 	siop_cmd->siop_tables.t_msgout.count =
    393  1.11.2.2  bouyer 	    htole32(offset + MSG_EXT_SDTR_LEN + 2);
    394  1.11.2.2  bouyer }
    395  1.11.2.2  bouyer 
    396  1.11.2.2  bouyer void
    397  1.11.2.2  bouyer siop_wdtr_msg(siop_cmd, offset, wide)
    398  1.11.2.2  bouyer 	struct siop_cmd *siop_cmd;
    399  1.11.2.2  bouyer 	int offset;
    400  1.11.2.2  bouyer {
    401  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 0] = MSG_EXTENDED;
    402  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 1] = MSG_EXT_WDTR_LEN;
    403  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 2] = MSG_EXT_WDTR;
    404  1.11.2.2  bouyer 	siop_cmd->siop_tables.msg_out[offset + 3] = wide;
    405  1.11.2.2  bouyer 	siop_cmd->siop_tables.t_msgout.count =
    406  1.11.2.2  bouyer 	    htole32(offset + MSG_EXT_WDTR_LEN + 2);
    407  1.11.2.2  bouyer }
    408  1.11.2.2  bouyer 
    409  1.11.2.2  bouyer void
    410  1.11.2.2  bouyer siop_minphys(bp)
    411  1.11.2.2  bouyer 	struct buf *bp;
    412  1.11.2.2  bouyer {
    413  1.11.2.2  bouyer 	minphys(bp);
    414  1.11.2.2  bouyer }
    415  1.11.2.2  bouyer 
    416  1.11.2.2  bouyer int
    417  1.11.2.2  bouyer siop_ioctl(link, cmd, arg, flag, p)
    418  1.11.2.2  bouyer 	struct scsipi_link *link;
    419  1.11.2.2  bouyer 	u_long cmd;
    420  1.11.2.2  bouyer 	caddr_t arg;
    421  1.11.2.2  bouyer 	int flag;
    422  1.11.2.2  bouyer 	struct proc *p;
    423  1.11.2.2  bouyer {
    424  1.11.2.2  bouyer 	struct siop_softc *sc = link->adapter_softc;
    425  1.11.2.2  bouyer 	u_int8_t scntl1;
    426  1.11.2.2  bouyer 	int s;
    427  1.11.2.2  bouyer 
    428  1.11.2.2  bouyer 	switch (cmd) {
    429  1.11.2.2  bouyer 	case SCBUSACCEL:
    430  1.11.2.2  bouyer 	{
    431  1.11.2.2  bouyer 		struct scbusaccel_args *sp = (struct scbusaccel_args *)arg;
    432  1.11.2.2  bouyer 		s = splbio();
    433  1.11.2.2  bouyer 		if (sp->sa_lun == 0) {
    434  1.11.2.2  bouyer 			if (sp->sa_flags & SC_ACCEL_TAGS) {
    435  1.11.2.2  bouyer 				sc->targets[sp->sa_target]->flags |= TARF_TAG;
    436  1.11.2.2  bouyer 				printf("%s: target %d using tagged queuing\n",
    437  1.11.2.2  bouyer 			 	   sc->sc_dev.dv_xname, sp->sa_target);
    438  1.11.2.2  bouyer 			}
    439  1.11.2.2  bouyer 			if ((sp->sa_flags & SC_ACCEL_WIDE) &&
    440  1.11.2.2  bouyer 			    (sc->features & SF_BUS_WIDE))
    441  1.11.2.2  bouyer 				sc->targets[sp->sa_target]->flags |= TARF_WIDE;
    442  1.11.2.2  bouyer 			if (sp->sa_flags & SC_ACCEL_SYNC)
    443  1.11.2.2  bouyer 				sc->targets[sp->sa_target]->flags |= TARF_SYNC;
    444  1.11.2.2  bouyer 			if ((sp->sa_flags & (SC_ACCEL_SYNC | SC_ACCEL_WIDE)) ||
    445  1.11.2.2  bouyer 			    sc->targets[sp->sa_target]->status == TARST_PROBING)
    446  1.11.2.2  bouyer 				sc->targets[sp->sa_target]->status =
    447  1.11.2.2  bouyer 				    TARST_ASYNC;
    448  1.11.2.2  bouyer 		}
    449  1.11.2.2  bouyer 
    450  1.11.2.2  bouyer 		/* allocate a lun sw entry for this device */
    451  1.11.2.2  bouyer 		siop_add_dev(sc, sp->sa_target, sp->sa_lun);
    452  1.11.2.2  bouyer 		/*
    453  1.11.2.2  bouyer 		 * if we can to tagged queueing, inform upper layer
    454  1.11.2.2  bouyer 		 * we can have NIOP_NTAG concurent commands
    455  1.11.2.2  bouyer 		 */
    456  1.11.2.2  bouyer 		if (sc->targets[sp->sa_target]->flags & TARF_TAG)
    457  1.11.2.2  bouyer 			link->openings = SIOP_NTAG;
    458  1.11.2.2  bouyer 		splx(s);
    459  1.11.2.2  bouyer 		return 0;
    460  1.11.2.2  bouyer 	}
    461  1.11.2.2  bouyer 	case SCBUSIORESET:
    462  1.11.2.2  bouyer 		s = splbio();
    463  1.11.2.2  bouyer 		scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
    464  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
    465  1.11.2.2  bouyer 		    scntl1 | SCNTL1_RST);
    466  1.11.2.2  bouyer 		/* minimum 25 us, more time won't hurt */
    467  1.11.2.2  bouyer 		delay(100);
    468  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
    469  1.11.2.2  bouyer 		splx(s);
    470  1.11.2.2  bouyer 		return (0);
    471  1.11.2.2  bouyer 	default:
    472  1.11.2.2  bouyer 		return (ENOTTY);
    473  1.11.2.2  bouyer 	}
    474  1.11.2.2  bouyer }
    475  1.11.2.2  bouyer 
    476  1.11.2.2  bouyer void
    477  1.11.2.2  bouyer siop_sdp(siop_cmd)
    478  1.11.2.2  bouyer 	struct siop_cmd *siop_cmd;
    479  1.11.2.2  bouyer {
    480  1.11.2.2  bouyer 	/* save data pointer. Handle async only for now */
    481  1.11.2.2  bouyer 	int offset, dbc, sstat;
    482  1.11.2.2  bouyer 	struct siop_softc *sc = siop_cmd->siop_sc;
    483  1.11.2.2  bouyer 	scr_table_t *table; /* table to patch */
    484  1.11.2.2  bouyer 
    485  1.11.2.2  bouyer 	if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
    486  1.11.2.2  bouyer 	    == 0)
    487  1.11.2.2  bouyer 	    return; /* no data pointers to save */
    488  1.11.2.2  bouyer 	offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
    489  1.11.2.2  bouyer 	if (offset >= SIOP_NSG) {
    490  1.11.2.2  bouyer 		printf("%s: bad offset in siop_sdp (%d)\n",
    491  1.11.2.2  bouyer 		    sc->sc_dev.dv_xname, offset);
    492  1.11.2.2  bouyer 		return;
    493  1.11.2.2  bouyer 	}
    494  1.11.2.2  bouyer 	table = &siop_cmd->siop_xfer->tables.data[offset];
    495  1.11.2.2  bouyer #ifdef DEBUG_DR
    496  1.11.2.2  bouyer 	printf("sdp: offset %d count=%d addr=0x%x ", offset,
    497  1.11.2.2  bouyer 	    table->count, table->addr);
    498  1.11.2.2  bouyer #endif
    499  1.11.2.2  bouyer 	dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff;
    500  1.11.2.2  bouyer 	if (siop_cmd->xs->xs_control & XS_CTL_DATA_OUT) {
    501  1.11.2.2  bouyer 		/* need to account stale data in FIFO */
    502  1.11.2.2  bouyer 		int dfifo = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO);
    503  1.11.2.2  bouyer 		if (sc->features & SF_CHIP_FIFO) {
    504  1.11.2.2  bouyer 			dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh,
    505  1.11.2.2  bouyer 			    SIOP_CTEST5) & CTEST5_BOMASK) << 8;
    506  1.11.2.2  bouyer 			dbc += (dfifo - (dbc & 0x3ff)) & 0x3ff;
    507  1.11.2.2  bouyer 		} else {
    508  1.11.2.2  bouyer 			dbc += (dfifo - (dbc & 0x7f)) & 0x7f;
    509  1.11.2.2  bouyer 		}
    510  1.11.2.2  bouyer 		sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0);
    511  1.11.2.2  bouyer 		if (sstat & SSTAT0_OLF)
    512  1.11.2.2  bouyer 			dbc++;
    513  1.11.2.2  bouyer 		if (sstat & SSTAT0_ORF)
    514  1.11.2.2  bouyer 			dbc++;
    515  1.11.2.2  bouyer 		if (siop_cmd->siop_target->flags & TARF_ISWIDE) {
    516  1.11.2.2  bouyer 			sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh,
    517  1.11.2.2  bouyer 			    SIOP_SSTAT2);
    518  1.11.2.2  bouyer 			if (sstat & SSTAT2_OLF1)
    519  1.11.2.2  bouyer 				dbc++;
    520  1.11.2.2  bouyer 			if (sstat & SSTAT2_ORF1)
    521  1.11.2.2  bouyer 				dbc++;
    522  1.11.2.2  bouyer 		}
    523  1.11.2.2  bouyer 		/* clear the FIFO */
    524  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
    525  1.11.2.2  bouyer 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) |
    526  1.11.2.2  bouyer 		    CTEST3_CLF);
    527  1.11.2.2  bouyer 	}
    528  1.11.2.2  bouyer 	table->addr =
    529  1.11.2.2  bouyer 	    htole32(le32toh(table->addr) + le32toh(table->count) - dbc);
    530  1.11.2.2  bouyer 	table->count = htole32(dbc);
    531  1.11.2.2  bouyer #ifdef DEBUG_DR
    532  1.11.2.2  bouyer 	printf("now count=%d addr=0x%x\n", table->count, table->addr);
    533  1.11.2.2  bouyer #endif
    534  1.11.2.2  bouyer }
    535  1.11.2.2  bouyer 
    536  1.11.2.2  bouyer void
    537  1.11.2.2  bouyer siop_clearfifo(sc)
    538  1.11.2.2  bouyer 	struct siop_softc *sc;
    539  1.11.2.2  bouyer {
    540  1.11.2.2  bouyer 	int timeout = 0;
    541  1.11.2.2  bouyer 	int ctest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3);
    542  1.11.2.2  bouyer 
    543  1.11.2.2  bouyer #ifdef DEBUG_INTR
    544  1.11.2.2  bouyer 	printf("DMA fifo not empty !\n");
    545  1.11.2.2  bouyer #endif
    546  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
    547  1.11.2.2  bouyer 	    ctest3 | CTEST3_CLF);
    548  1.11.2.2  bouyer 	while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) &
    549  1.11.2.2  bouyer 	    CTEST3_CLF) != 0) {
    550  1.11.2.2  bouyer 		delay(1);
    551  1.11.2.2  bouyer 		if (++timeout > 1000) {
    552  1.11.2.2  bouyer 			printf("clear fifo failed\n");
    553  1.11.2.2  bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
    554  1.11.2.2  bouyer 			    bus_space_read_1(sc->sc_rt, sc->sc_rh,
    555  1.11.2.2  bouyer 			    SIOP_CTEST3) & ~CTEST3_CLF);
    556  1.11.2.2  bouyer 			return;
    557  1.11.2.2  bouyer 		}
    558  1.11.2.2  bouyer 	}
    559  1.11.2.2  bouyer }
    560  1.11.2.2  bouyer 
    561  1.11.2.2  bouyer int
    562  1.11.2.2  bouyer siop_modechange(sc)
    563  1.11.2.2  bouyer 	struct siop_softc *sc;
    564  1.11.2.2  bouyer {
    565  1.11.2.2  bouyer 	int retry;
    566  1.11.2.2  bouyer 	int sist0, sist1, stest2, stest4;
    567  1.11.2.2  bouyer 	for (retry = 0; retry < 5; retry++) {
    568  1.11.2.2  bouyer 		/*
    569  1.11.2.2  bouyer 		 * datasheet says to wait 100ms and re-read SIST1,
    570  1.11.2.2  bouyer 		 * to check that DIFFSENSE is srable.
    571  1.11.2.2  bouyer 		 * We may delay() 5 times for  100ms at interrupt time;
    572  1.11.2.2  bouyer 		 * hopefully this will not happen often.
    573  1.11.2.2  bouyer 		 */
    574  1.11.2.2  bouyer 		delay(100000);
    575  1.11.2.2  bouyer 		sist0 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST0);
    576  1.11.2.2  bouyer 		sist1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST1);
    577  1.11.2.2  bouyer 		if (sist1 & SIEN1_SBMC)
    578  1.11.2.2  bouyer 			continue; /* we got an irq again */
    579  1.11.2.2  bouyer 		stest4 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
    580  1.11.2.2  bouyer 		    STEST4_MODE_MASK;
    581  1.11.2.2  bouyer 		stest2 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2);
    582  1.11.2.2  bouyer 		switch(stest4) {
    583  1.11.2.2  bouyer 		case STEST4_MODE_DIF:
    584  1.11.2.2  bouyer 			printf("%s: switching to differential mode\n",
    585  1.11.2.2  bouyer 			    sc->sc_dev.dv_xname);
    586  1.11.2.2  bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
    587  1.11.2.2  bouyer 			    stest2 | STEST2_DIF);
    588  1.11.2.2  bouyer 			break;
    589  1.11.2.2  bouyer 		case STEST4_MODE_SE:
    590  1.11.2.2  bouyer 			printf("%s: switching to single-ended mode\n",
    591  1.11.2.2  bouyer 			    sc->sc_dev.dv_xname);
    592  1.11.2.2  bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
    593  1.11.2.2  bouyer 			    stest2 & ~STEST2_DIF);
    594  1.11.2.2  bouyer 			break;
    595  1.11.2.2  bouyer 		case STEST4_MODE_LVD:
    596  1.11.2.2  bouyer 			printf("%s: switching to LVD mode\n",
    597  1.11.2.2  bouyer 			    sc->sc_dev.dv_xname);
    598  1.11.2.2  bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
    599  1.11.2.2  bouyer 			    stest2 & ~STEST2_DIF);
    600  1.11.2.2  bouyer 			break;
    601  1.11.2.2  bouyer 		default:
    602  1.11.2.2  bouyer 			printf("%s: invalid SCSI mode 0x%x\n",
    603  1.11.2.2  bouyer 			    sc->sc_dev.dv_xname, stest4);
    604  1.11.2.2  bouyer 			return 0;
    605  1.11.2.2  bouyer 		}
    606  1.11.2.2  bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST0,
    607  1.11.2.2  bouyer 		    stest4 >> 2);
    608  1.11.2.2  bouyer 		return 1;
    609  1.11.2.2  bouyer 	}
    610  1.11.2.2  bouyer 	printf("%s: timeout waiting for DIFFSENSE to stabilise\n",
    611  1.11.2.2  bouyer 	    sc->sc_dev.dv_xname);
    612  1.11.2.2  bouyer 	return 0;
    613  1.11.2.2  bouyer }
    614  1.11.2.2  bouyer 
    615  1.11.2.2  bouyer void
    616  1.11.2.2  bouyer siop_resetbus(sc)
    617  1.11.2.2  bouyer 	struct siop_softc *sc;
    618  1.11.2.2  bouyer {
    619  1.11.2.2  bouyer 	int scntl1;
    620  1.11.2.2  bouyer 	scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
    621  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
    622  1.11.2.2  bouyer 	    scntl1 | SCNTL1_RST);
    623  1.11.2.2  bouyer 	/* minimum 25 us, more time won't hurt */
    624  1.11.2.2  bouyer 	delay(100);
    625  1.11.2.2  bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
    626  1.11.2.2  bouyer }
    627