siop_common.c revision 1.31 1 1.31 provos /* $NetBSD: siop_common.c,v 1.31 2002/09/27 15:37:18 provos Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.22 bouyer * Copyright (c) 2000, 2002 Manuel Bouyer.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer * 3. All advertising materials mentioning features or use of this software
15 1.1 bouyer * must display the following acknowledgement:
16 1.23 bouyer * This product includes software developed by Manuel Bouyer.
17 1.1 bouyer * 4. The name of the author may not be used to endorse or promote products
18 1.1 bouyer * derived from this software without specific prior written permission.
19 1.1 bouyer *
20 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23 1.1 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 1.1 bouyer *
31 1.1 bouyer */
32 1.1 bouyer
33 1.1 bouyer /* SYM53c7/8xx PCI-SCSI I/O Processors driver */
34 1.15 lukem
35 1.15 lukem #include <sys/cdefs.h>
36 1.31 provos __KERNEL_RCSID(0, "$NetBSD: siop_common.c,v 1.31 2002/09/27 15:37:18 provos Exp $");
37 1.1 bouyer
38 1.1 bouyer #include <sys/param.h>
39 1.1 bouyer #include <sys/systm.h>
40 1.1 bouyer #include <sys/device.h>
41 1.1 bouyer #include <sys/malloc.h>
42 1.1 bouyer #include <sys/buf.h>
43 1.1 bouyer #include <sys/kernel.h>
44 1.1 bouyer #include <sys/scsiio.h>
45 1.1 bouyer
46 1.22 bouyer #include <uvm/uvm_extern.h>
47 1.22 bouyer
48 1.1 bouyer #include <machine/endian.h>
49 1.1 bouyer #include <machine/bus.h>
50 1.1 bouyer
51 1.1 bouyer #include <dev/scsipi/scsi_all.h>
52 1.1 bouyer #include <dev/scsipi/scsi_message.h>
53 1.1 bouyer #include <dev/scsipi/scsipi_all.h>
54 1.1 bouyer
55 1.1 bouyer #include <dev/scsipi/scsiconf.h>
56 1.1 bouyer
57 1.1 bouyer #include <dev/ic/siopreg.h>
58 1.1 bouyer #include <dev/ic/siopvar_common.h>
59 1.1 bouyer
60 1.16 bouyer #include "opt_siop.h"
61 1.16 bouyer
62 1.2 bouyer #undef DEBUG
63 1.2 bouyer #undef DEBUG_DR
64 1.22 bouyer #undef DEBUG_NEG
65 1.22 bouyer
66 1.22 bouyer int
67 1.22 bouyer siop_common_attach(sc)
68 1.22 bouyer struct siop_common_softc *sc;
69 1.22 bouyer {
70 1.22 bouyer int error, i;
71 1.22 bouyer bus_dma_segment_t seg;
72 1.22 bouyer int rseg;
73 1.22 bouyer
74 1.22 bouyer /*
75 1.22 bouyer * Allocate DMA-safe memory for the script and map it.
76 1.22 bouyer */
77 1.22 bouyer if ((sc->features & SF_CHIP_RAM) == 0) {
78 1.22 bouyer error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE,
79 1.22 bouyer PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT);
80 1.22 bouyer if (error) {
81 1.22 bouyer printf("%s: unable to allocate script DMA memory, "
82 1.22 bouyer "error = %d\n", sc->sc_dev.dv_xname, error);
83 1.22 bouyer return error;
84 1.22 bouyer }
85 1.22 bouyer error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE,
86 1.22 bouyer (caddr_t *)&sc->sc_script,
87 1.22 bouyer BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
88 1.22 bouyer if (error) {
89 1.22 bouyer printf("%s: unable to map script DMA memory, "
90 1.22 bouyer "error = %d\n", sc->sc_dev.dv_xname, error);
91 1.22 bouyer return error;
92 1.22 bouyer }
93 1.22 bouyer error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1,
94 1.22 bouyer PAGE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma);
95 1.22 bouyer if (error) {
96 1.22 bouyer printf("%s: unable to create script DMA map, "
97 1.22 bouyer "error = %d\n", sc->sc_dev.dv_xname, error);
98 1.22 bouyer return error;
99 1.22 bouyer }
100 1.22 bouyer error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma,
101 1.22 bouyer sc->sc_script, PAGE_SIZE, NULL, BUS_DMA_NOWAIT);
102 1.22 bouyer if (error) {
103 1.22 bouyer printf("%s: unable to load script DMA map, "
104 1.22 bouyer "error = %d\n", sc->sc_dev.dv_xname, error);
105 1.22 bouyer return error;
106 1.22 bouyer }
107 1.22 bouyer sc->sc_scriptaddr =
108 1.22 bouyer sc->sc_scriptdma->dm_segs[0].ds_addr;
109 1.22 bouyer sc->ram_size = PAGE_SIZE;
110 1.22 bouyer }
111 1.22 bouyer
112 1.22 bouyer sc->sc_adapt.adapt_dev = &sc->sc_dev;
113 1.22 bouyer sc->sc_adapt.adapt_nchannels = 1;
114 1.22 bouyer sc->sc_adapt.adapt_openings = 0;
115 1.22 bouyer sc->sc_adapt.adapt_ioctl = siop_ioctl;
116 1.22 bouyer sc->sc_adapt.adapt_minphys = minphys;
117 1.22 bouyer
118 1.22 bouyer memset(&sc->sc_chan, 0, sizeof(sc->sc_chan));
119 1.22 bouyer sc->sc_chan.chan_adapter = &sc->sc_adapt;
120 1.22 bouyer sc->sc_chan.chan_bustype = &scsi_bustype;
121 1.22 bouyer sc->sc_chan.chan_channel = 0;
122 1.22 bouyer sc->sc_chan.chan_flags = SCSIPI_CHAN_CANGROW;
123 1.22 bouyer sc->sc_chan.chan_ntargets =
124 1.22 bouyer (sc->features & SF_BUS_WIDE) ? 16 : 8;
125 1.22 bouyer sc->sc_chan.chan_nluns = 8;
126 1.22 bouyer sc->sc_chan.chan_id =
127 1.22 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCID);
128 1.22 bouyer if (sc->sc_chan.chan_id == 0 ||
129 1.22 bouyer sc->sc_chan.chan_id >= sc->sc_chan.chan_ntargets)
130 1.22 bouyer sc->sc_chan.chan_id = SIOP_DEFAULT_TARGET;
131 1.22 bouyer
132 1.22 bouyer for (i = 0; i < 16; i++)
133 1.22 bouyer sc->targets[i] = NULL;
134 1.22 bouyer
135 1.22 bouyer /* find min/max sync period for this chip */
136 1.22 bouyer sc->st_maxsync = 0;
137 1.22 bouyer sc->dt_maxsync = 0;
138 1.22 bouyer sc->st_minsync = 255;
139 1.22 bouyer sc->dt_minsync = 255;
140 1.22 bouyer for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]); i++) {
141 1.22 bouyer if (sc->clock_period != scf_period[i].clock)
142 1.22 bouyer continue;
143 1.22 bouyer if (sc->st_maxsync < scf_period[i].period)
144 1.22 bouyer sc->st_maxsync = scf_period[i].period;
145 1.22 bouyer if (sc->st_minsync > scf_period[i].period)
146 1.22 bouyer sc->st_minsync = scf_period[i].period;
147 1.22 bouyer }
148 1.22 bouyer if (sc->st_maxsync == 255 || sc->st_minsync == 0)
149 1.31 provos panic("siop: can't find my sync parameters");
150 1.22 bouyer for (i = 0; i < sizeof(dt_scf_period) / sizeof(dt_scf_period[0]); i++) {
151 1.22 bouyer if (sc->clock_period != dt_scf_period[i].clock)
152 1.22 bouyer continue;
153 1.22 bouyer if (sc->dt_maxsync < dt_scf_period[i].period)
154 1.22 bouyer sc->dt_maxsync = dt_scf_period[i].period;
155 1.22 bouyer if (sc->dt_minsync > dt_scf_period[i].period)
156 1.22 bouyer sc->dt_minsync = dt_scf_period[i].period;
157 1.22 bouyer }
158 1.22 bouyer if (sc->dt_maxsync == 255 || sc->dt_minsync == 0)
159 1.31 provos panic("siop: can't find my sync parameters");
160 1.22 bouyer return 0;
161 1.22 bouyer }
162 1.1 bouyer
163 1.1 bouyer void
164 1.1 bouyer siop_common_reset(sc)
165 1.17 bouyer struct siop_common_softc *sc;
166 1.1 bouyer {
167 1.1 bouyer u_int32_t stest3;
168 1.1 bouyer
169 1.1 bouyer /* reset the chip */
170 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST);
171 1.1 bouyer delay(1000);
172 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, 0);
173 1.1 bouyer
174 1.1 bouyer /* init registers */
175 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL0,
176 1.1 bouyer SCNTL0_ARB_MASK | SCNTL0_EPC | SCNTL0_AAP);
177 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 0);
178 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, sc->clock_div);
179 1.7 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 0);
180 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DIEN, 0xff);
181 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN0,
182 1.1 bouyer 0xff & ~(SIEN0_CMP | SIEN0_SEL | SIEN0_RSL));
183 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN1,
184 1.1 bouyer 0xff & ~(SIEN1_HTH | SIEN1_GEN));
185 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 0);
186 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, STEST3_TE);
187 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
188 1.1 bouyer (0xb << STIME0_SEL_SHIFT));
189 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCID,
190 1.14 bouyer sc->sc_chan.chan_id | SCID_RRE);
191 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_RESPID0,
192 1.14 bouyer 1 << sc->sc_chan.chan_id);
193 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL,
194 1.1 bouyer (sc->features & SF_CHIP_PF) ? DCNTL_COM | DCNTL_PFEN : DCNTL_COM);
195 1.1 bouyer
196 1.1 bouyer /* enable clock doubler or quadruler if appropriate */
197 1.1 bouyer if (sc->features & (SF_CHIP_DBLR | SF_CHIP_QUAD)) {
198 1.1 bouyer stest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3);
199 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
200 1.1 bouyer STEST1_DBLEN);
201 1.1 bouyer if (sc->features & SF_CHIP_QUAD) {
202 1.1 bouyer /* wait for PPL to lock */
203 1.1 bouyer while ((bus_space_read_1(sc->sc_rt, sc->sc_rh,
204 1.1 bouyer SIOP_STEST4) & STEST4_LOCK) == 0)
205 1.1 bouyer delay(10);
206 1.1 bouyer } else {
207 1.1 bouyer /* data sheet says 20us - more won't hurt */
208 1.1 bouyer delay(100);
209 1.1 bouyer }
210 1.1 bouyer /* halt scsi clock, select doubler/quad, restart clock */
211 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3,
212 1.1 bouyer stest3 | STEST3_HSC);
213 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
214 1.1 bouyer STEST1_DBLEN | STEST1_DBLSEL);
215 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, stest3);
216 1.1 bouyer } else {
217 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 0);
218 1.1 bouyer }
219 1.1 bouyer if (sc->features & SF_CHIP_FIFO)
220 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5,
221 1.1 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5) |
222 1.1 bouyer CTEST5_DFS);
223 1.21 bouyer if (sc->features & SF_CHIP_LED0) {
224 1.21 bouyer /* Set GPIO0 as output if software LED control is required */
225 1.21 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL,
226 1.21 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL) & 0xfe);
227 1.21 bouyer }
228 1.22 bouyer if (sc->features & SF_BUS_ULTRA3) {
229 1.22 bouyer /* reset SCNTL4 */
230 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4, 0);
231 1.22 bouyer }
232 1.27 bouyer sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
233 1.27 bouyer STEST4_MODE_MASK;
234 1.30 bouyer
235 1.30 bouyer /*
236 1.30 bouyer * initialise the RAM. Without this we may get scsi gross errors on
237 1.30 bouyer * the 1010
238 1.30 bouyer */
239 1.30 bouyer if (sc->features & SF_CHIP_RAM)
240 1.30 bouyer bus_space_set_region_4(sc->sc_ramt, sc->sc_ramh,
241 1.30 bouyer 0, 0, sc->ram_size / 4);
242 1.1 bouyer sc->sc_reset(sc);
243 1.1 bouyer }
244 1.1 bouyer
245 1.10 bouyer /* prepare tables before sending a cmd */
246 1.10 bouyer void
247 1.10 bouyer siop_setuptables(siop_cmd)
248 1.17 bouyer struct siop_common_cmd *siop_cmd;
249 1.10 bouyer {
250 1.10 bouyer int i;
251 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
252 1.10 bouyer struct scsipi_xfer *xs = siop_cmd->xs;
253 1.14 bouyer int target = xs->xs_periph->periph_target;
254 1.14 bouyer int lun = xs->xs_periph->periph_lun;
255 1.14 bouyer int msgoffset = 1;
256 1.10 bouyer
257 1.17 bouyer siop_cmd->siop_tables->id = htole32(sc->targets[target]->id);
258 1.22 bouyer memset(siop_cmd->siop_tables->msg_out, 0,
259 1.22 bouyer sizeof(siop_cmd->siop_tables->msg_out));
260 1.14 bouyer /* request sense doesn't disconnect */
261 1.14 bouyer if (xs->xs_control & XS_CTL_REQSENSE)
262 1.17 bouyer siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0);
263 1.26 bouyer else if ((sc->features & SF_CHIP_GEBUG) &&
264 1.26 bouyer (sc->targets[target]->flags & TARF_ISWIDE) == 0)
265 1.26 bouyer /*
266 1.26 bouyer * 1010 bug: it seems that the 1010 has problems with reselect
267 1.26 bouyer * when not in wide mode (generate false SCSI gross error).
268 1.26 bouyer * The FreeBSD sym driver has comments about it but their
269 1.26 bouyer * workaround (disable SCSI gross error reporting) doesn't
270 1.26 bouyer * work with my adapter. So disable disconnect when not
271 1.26 bouyer * wide.
272 1.26 bouyer */
273 1.26 bouyer siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0);
274 1.14 bouyer else
275 1.17 bouyer siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 1);
276 1.14 bouyer if (xs->xs_tag_type != 0) {
277 1.14 bouyer if ((sc->targets[target]->flags & TARF_TAG) == 0) {
278 1.14 bouyer scsipi_printaddr(xs->xs_periph);
279 1.14 bouyer printf(": tagged command type %d id %d\n",
280 1.14 bouyer siop_cmd->xs->xs_tag_type, siop_cmd->xs->xs_tag_id);
281 1.31 provos panic("tagged command for non-tagging device");
282 1.14 bouyer }
283 1.14 bouyer siop_cmd->flags |= CMDFL_TAG;
284 1.17 bouyer siop_cmd->siop_tables->msg_out[1] = siop_cmd->xs->xs_tag_type;
285 1.19 bouyer /*
286 1.19 bouyer * use siop_cmd->tag not xs->xs_tag_id, caller may want a
287 1.19 bouyer * different one
288 1.19 bouyer */
289 1.19 bouyer siop_cmd->siop_tables->msg_out[2] = siop_cmd->tag;
290 1.14 bouyer msgoffset = 3;
291 1.20 bouyer }
292 1.25 bouyer siop_cmd->siop_tables->t_msgout.count= htole32(msgoffset);
293 1.10 bouyer if (sc->targets[target]->status == TARST_ASYNC) {
294 1.27 bouyer if ((sc->targets[target]->flags & TARF_DT) &&
295 1.27 bouyer (sc->mode == STEST4_MODE_LVD)) {
296 1.22 bouyer sc->targets[target]->status = TARST_PPR_NEG;
297 1.22 bouyer siop_ppr_msg(siop_cmd, msgoffset, sc->dt_minsync,
298 1.22 bouyer sc->maxoff);
299 1.22 bouyer } else if (sc->targets[target]->flags & TARF_WIDE) {
300 1.10 bouyer sc->targets[target]->status = TARST_WIDE_NEG;
301 1.14 bouyer siop_wdtr_msg(siop_cmd, msgoffset,
302 1.14 bouyer MSG_EXT_WDTR_BUS_16_BIT);
303 1.10 bouyer } else if (sc->targets[target]->flags & TARF_SYNC) {
304 1.10 bouyer sc->targets[target]->status = TARST_SYNC_NEG;
305 1.22 bouyer siop_sdtr_msg(siop_cmd, msgoffset, sc->st_minsync,
306 1.22 bouyer (sc->maxoff > 31) ? 31 : sc->maxoff);
307 1.10 bouyer } else {
308 1.10 bouyer sc->targets[target]->status = TARST_OK;
309 1.14 bouyer siop_update_xfer_mode(sc, target);
310 1.10 bouyer }
311 1.10 bouyer }
312 1.17 bouyer siop_cmd->siop_tables->status =
313 1.11 bouyer htole32(SCSI_SIOP_NOSTATUS); /* set invalid status */
314 1.10 bouyer
315 1.17 bouyer siop_cmd->siop_tables->cmd.count =
316 1.10 bouyer htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_len);
317 1.17 bouyer siop_cmd->siop_tables->cmd.addr =
318 1.10 bouyer htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_addr);
319 1.14 bouyer if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
320 1.10 bouyer for (i = 0; i < siop_cmd->dmamap_data->dm_nsegs; i++) {
321 1.17 bouyer siop_cmd->siop_tables->data[i].count =
322 1.10 bouyer htole32(siop_cmd->dmamap_data->dm_segs[i].ds_len);
323 1.17 bouyer siop_cmd->siop_tables->data[i].addr =
324 1.10 bouyer htole32(siop_cmd->dmamap_data->dm_segs[i].ds_addr);
325 1.10 bouyer }
326 1.10 bouyer }
327 1.10 bouyer }
328 1.10 bouyer
329 1.1 bouyer int
330 1.1 bouyer siop_wdtr_neg(siop_cmd)
331 1.17 bouyer struct siop_common_cmd *siop_cmd;
332 1.1 bouyer {
333 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
334 1.17 bouyer struct siop_common_target *siop_target = siop_cmd->siop_target;
335 1.14 bouyer int target = siop_cmd->xs->xs_periph->periph_target;
336 1.17 bouyer struct siop_common_xfer *tables = siop_cmd->siop_tables;
337 1.1 bouyer
338 1.1 bouyer if (siop_target->status == TARST_WIDE_NEG) {
339 1.1 bouyer /* we initiated wide negotiation */
340 1.9 bouyer switch (tables->msg_in[3]) {
341 1.1 bouyer case MSG_EXT_WDTR_BUS_8_BIT:
342 1.9 bouyer siop_target->flags &= ~TARF_ISWIDE;
343 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
344 1.1 bouyer break;
345 1.1 bouyer case MSG_EXT_WDTR_BUS_16_BIT:
346 1.9 bouyer if (siop_target->flags & TARF_WIDE) {
347 1.9 bouyer siop_target->flags |= TARF_ISWIDE;
348 1.1 bouyer sc->targets[target]->id |= (SCNTL3_EWS << 24);
349 1.1 bouyer break;
350 1.1 bouyer }
351 1.1 bouyer /* FALLTHROUH */
352 1.1 bouyer default:
353 1.1 bouyer /*
354 1.29 wiz * hum, we got more than what we can handle, shouldn't
355 1.1 bouyer * happen. Reject, and stay async
356 1.1 bouyer */
357 1.9 bouyer siop_target->flags &= ~TARF_ISWIDE;
358 1.1 bouyer siop_target->status = TARST_OK;
359 1.14 bouyer siop_target->offset = siop_target->period = 0;
360 1.14 bouyer siop_update_xfer_mode(sc, target);
361 1.1 bouyer printf("%s: rejecting invalid wide negotiation from "
362 1.1 bouyer "target %d (%d)\n", sc->sc_dev.dv_xname, target,
363 1.9 bouyer tables->msg_in[3]);
364 1.9 bouyer tables->t_msgout.count= htole32(1);
365 1.9 bouyer tables->msg_out[0] = MSG_MESSAGE_REJECT;
366 1.1 bouyer return SIOP_NEG_MSGOUT;
367 1.1 bouyer }
368 1.9 bouyer tables->id = htole32(sc->targets[target]->id);
369 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh,
370 1.1 bouyer SIOP_SCNTL3,
371 1.1 bouyer (sc->targets[target]->id >> 24) & 0xff);
372 1.1 bouyer /* we now need to do sync */
373 1.9 bouyer if (siop_target->flags & TARF_SYNC) {
374 1.6 bouyer siop_target->status = TARST_SYNC_NEG;
375 1.22 bouyer siop_sdtr_msg(siop_cmd, 0, sc->st_minsync,
376 1.22 bouyer (sc->maxoff > 31) ? 31 : sc->maxoff);
377 1.6 bouyer return SIOP_NEG_MSGOUT;
378 1.6 bouyer } else {
379 1.6 bouyer siop_target->status = TARST_OK;
380 1.14 bouyer siop_update_xfer_mode(sc, target);
381 1.6 bouyer return SIOP_NEG_ACK;
382 1.6 bouyer }
383 1.1 bouyer } else {
384 1.1 bouyer /* target initiated wide negotiation */
385 1.9 bouyer if (tables->msg_in[3] >= MSG_EXT_WDTR_BUS_16_BIT
386 1.9 bouyer && (siop_target->flags & TARF_WIDE)) {
387 1.9 bouyer siop_target->flags |= TARF_ISWIDE;
388 1.1 bouyer sc->targets[target]->id |= SCNTL3_EWS << 24;
389 1.1 bouyer } else {
390 1.9 bouyer siop_target->flags &= ~TARF_ISWIDE;
391 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
392 1.1 bouyer }
393 1.9 bouyer tables->id = htole32(sc->targets[target]->id);
394 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
395 1.1 bouyer (sc->targets[target]->id >> 24) & 0xff);
396 1.1 bouyer /*
397 1.1 bouyer * we did reset wide parameters, so fall back to async,
398 1.8 bouyer * but don't schedule a sync neg, target should initiate it
399 1.1 bouyer */
400 1.1 bouyer siop_target->status = TARST_OK;
401 1.14 bouyer siop_target->offset = siop_target->period = 0;
402 1.14 bouyer siop_update_xfer_mode(sc, target);
403 1.10 bouyer siop_wdtr_msg(siop_cmd, 0, (siop_target->flags & TARF_ISWIDE) ?
404 1.10 bouyer MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT);
405 1.1 bouyer return SIOP_NEG_MSGOUT;
406 1.1 bouyer }
407 1.1 bouyer }
408 1.1 bouyer
409 1.1 bouyer int
410 1.22 bouyer siop_ppr_neg(siop_cmd)
411 1.22 bouyer struct siop_common_cmd *siop_cmd;
412 1.22 bouyer {
413 1.22 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
414 1.22 bouyer struct siop_common_target *siop_target = siop_cmd->siop_target;
415 1.22 bouyer int target = siop_cmd->xs->xs_periph->periph_target;
416 1.22 bouyer struct siop_common_xfer *tables = siop_cmd->siop_tables;
417 1.22 bouyer int sync, offset, options, scf = 0;
418 1.22 bouyer int i;
419 1.22 bouyer
420 1.22 bouyer #ifdef DEBUG_NEG
421 1.22 bouyer printf("%s: anserw on ppr negotiation:", sc->sc_dev.dv_xname);
422 1.22 bouyer for (i = 0; i < 8; i++)
423 1.22 bouyer printf(" 0x%x", tables->msg_in[i]);
424 1.22 bouyer printf("\n");
425 1.22 bouyer #endif
426 1.22 bouyer
427 1.22 bouyer if (siop_target->status == TARST_PPR_NEG) {
428 1.22 bouyer /* we initiated PPR negotiation */
429 1.22 bouyer sync = tables->msg_in[3];
430 1.22 bouyer offset = tables->msg_in[5];
431 1.22 bouyer options = tables->msg_in[7];
432 1.22 bouyer if (options != MSG_EXT_PPR_DT) {
433 1.22 bouyer /* should't happen */
434 1.22 bouyer printf("%s: ppr negotiation for target %d: "
435 1.22 bouyer "no DT option\n", sc->sc_dev.dv_xname, target);
436 1.22 bouyer siop_target->status = TARST_ASYNC;
437 1.22 bouyer siop_target->flags &= ~(TARF_DT | TARF_ISDT);
438 1.22 bouyer siop_target->offset = 0;
439 1.22 bouyer siop_target->period = 0;
440 1.22 bouyer goto reject;
441 1.22 bouyer }
442 1.22 bouyer
443 1.22 bouyer if (offset > sc->maxoff || sync < sc->dt_minsync ||
444 1.22 bouyer sync > sc->dt_maxsync) {
445 1.22 bouyer printf("%s: ppr negotiation for target %d: "
446 1.22 bouyer "offset (%d) or sync (%d) out of range\n",
447 1.22 bouyer sc->sc_dev.dv_xname, target, offset, sync);
448 1.22 bouyer /* should not happen */
449 1.22 bouyer siop_target->offset = 0;
450 1.22 bouyer siop_target->period = 0;
451 1.22 bouyer goto reject;
452 1.22 bouyer } else {
453 1.22 bouyer for (i = 0; i <
454 1.22 bouyer sizeof(dt_scf_period) / sizeof(dt_scf_period[0]);
455 1.22 bouyer i++) {
456 1.22 bouyer if (sc->clock_period != dt_scf_period[i].clock)
457 1.22 bouyer continue;
458 1.22 bouyer if (dt_scf_period[i].period == sync) {
459 1.22 bouyer /* ok, found it. we now are sync. */
460 1.22 bouyer siop_target->offset = offset;
461 1.22 bouyer siop_target->period = sync;
462 1.22 bouyer scf = dt_scf_period[i].scf;
463 1.22 bouyer siop_target->flags |= TARF_ISDT;
464 1.22 bouyer }
465 1.22 bouyer }
466 1.22 bouyer if ((siop_target->flags & TARF_ISDT) == 0) {
467 1.22 bouyer printf("%s: ppr negotiation for target %d: "
468 1.22 bouyer "sync (%d) incompatible with adapter\n",
469 1.22 bouyer sc->sc_dev.dv_xname, target, sync);
470 1.22 bouyer /*
471 1.22 bouyer * we didn't find it in our table, do async
472 1.22 bouyer * send reject msg, start SDTR/WDTR neg
473 1.22 bouyer */
474 1.22 bouyer siop_target->status = TARST_ASYNC;
475 1.22 bouyer siop_target->flags &= ~(TARF_DT | TARF_ISDT);
476 1.22 bouyer siop_target->offset = 0;
477 1.22 bouyer siop_target->period = 0;
478 1.22 bouyer goto reject;
479 1.22 bouyer }
480 1.22 bouyer }
481 1.22 bouyer if (tables->msg_in[6] != 1) {
482 1.22 bouyer printf("%s: ppr negotiation for target %d: "
483 1.22 bouyer "transfer width (%d) incompatible with dt\n",
484 1.22 bouyer sc->sc_dev.dv_xname, target, tables->msg_in[6]);
485 1.22 bouyer /* DT mode can only be done with wide transfers */
486 1.22 bouyer siop_target->status = TARST_ASYNC;
487 1.22 bouyer goto reject;
488 1.22 bouyer }
489 1.22 bouyer siop_target->flags |= TARF_ISWIDE;
490 1.22 bouyer sc->targets[target]->id |= (SCNTL3_EWS << 24);
491 1.22 bouyer sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
492 1.22 bouyer sc->targets[target]->id |= scf << (24 + SCNTL3_SCF_SHIFT);
493 1.22 bouyer sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
494 1.22 bouyer sc->targets[target]->id |=
495 1.22 bouyer (siop_target->offset & SXFER_MO_MASK) << 8;
496 1.22 bouyer sc->targets[target]->id &= ~0xff;
497 1.22 bouyer sc->targets[target]->id |= SCNTL4_U3EN;
498 1.22 bouyer siop_target->status = TARST_OK;
499 1.22 bouyer siop_update_xfer_mode(sc, target);
500 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
501 1.22 bouyer (sc->targets[target]->id >> 24) & 0xff);
502 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
503 1.22 bouyer (sc->targets[target]->id >> 8) & 0xff);
504 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4,
505 1.22 bouyer sc->targets[target]->id & 0xff);
506 1.22 bouyer return SIOP_NEG_ACK;
507 1.22 bouyer } else {
508 1.22 bouyer /* target initiated PPR negotiation, shouldn't happen */
509 1.22 bouyer printf("%s: rejecting invalid PPR negotiation from "
510 1.22 bouyer "target %d\n", sc->sc_dev.dv_xname, target);
511 1.22 bouyer reject:
512 1.22 bouyer tables->t_msgout.count= htole32(1);
513 1.22 bouyer tables->msg_out[0] = MSG_MESSAGE_REJECT;
514 1.22 bouyer return SIOP_NEG_MSGOUT;
515 1.22 bouyer }
516 1.22 bouyer }
517 1.22 bouyer
518 1.22 bouyer int
519 1.1 bouyer siop_sdtr_neg(siop_cmd)
520 1.17 bouyer struct siop_common_cmd *siop_cmd;
521 1.1 bouyer {
522 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
523 1.17 bouyer struct siop_common_target *siop_target = siop_cmd->siop_target;
524 1.14 bouyer int target = siop_cmd->xs->xs_periph->periph_target;
525 1.22 bouyer int sync, maxoffset, offset, i;
526 1.1 bouyer int send_msgout = 0;
527 1.17 bouyer struct siop_common_xfer *tables = siop_cmd->siop_tables;
528 1.1 bouyer
529 1.22 bouyer /* limit to Ultra/2 parameters, need PPR for Ultra/3 */
530 1.22 bouyer maxoffset = (sc->maxoff > 31) ? 31 : sc->maxoff;
531 1.22 bouyer
532 1.9 bouyer sync = tables->msg_in[3];
533 1.9 bouyer offset = tables->msg_in[4];
534 1.1 bouyer
535 1.1 bouyer if (siop_target->status == TARST_SYNC_NEG) {
536 1.1 bouyer /* we initiated sync negotiation */
537 1.1 bouyer siop_target->status = TARST_OK;
538 1.1 bouyer #ifdef DEBUG
539 1.1 bouyer printf("sdtr: sync %d offset %d\n", sync, offset);
540 1.1 bouyer #endif
541 1.22 bouyer if (offset > maxoffset || sync < sc->st_minsync ||
542 1.22 bouyer sync > sc->st_maxsync)
543 1.1 bouyer goto reject;
544 1.1 bouyer for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]);
545 1.1 bouyer i++) {
546 1.1 bouyer if (sc->clock_period != scf_period[i].clock)
547 1.1 bouyer continue;
548 1.1 bouyer if (scf_period[i].period == sync) {
549 1.1 bouyer /* ok, found it. we now are sync. */
550 1.14 bouyer siop_target->offset = offset;
551 1.14 bouyer siop_target->period = sync;
552 1.1 bouyer sc->targets[target]->id &=
553 1.1 bouyer ~(SCNTL3_SCF_MASK << 24);
554 1.1 bouyer sc->targets[target]->id |= scf_period[i].scf
555 1.1 bouyer << (24 + SCNTL3_SCF_SHIFT);
556 1.22 bouyer if (sync < 25 && /* Ultra */
557 1.22 bouyer (sc->features & SF_BUS_ULTRA3) == 0)
558 1.1 bouyer sc->targets[target]->id |=
559 1.1 bouyer SCNTL3_ULTRA << 24;
560 1.1 bouyer else
561 1.1 bouyer sc->targets[target]->id &=
562 1.1 bouyer ~(SCNTL3_ULTRA << 24);
563 1.1 bouyer sc->targets[target]->id &=
564 1.7 bouyer ~(SXFER_MO_MASK << 8);
565 1.1 bouyer sc->targets[target]->id |=
566 1.7 bouyer (offset & SXFER_MO_MASK) << 8;
567 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
568 1.1 bouyer goto end;
569 1.1 bouyer }
570 1.1 bouyer }
571 1.1 bouyer /*
572 1.1 bouyer * we didn't find it in our table, do async and send reject
573 1.1 bouyer * msg
574 1.1 bouyer */
575 1.1 bouyer reject:
576 1.1 bouyer send_msgout = 1;
577 1.9 bouyer tables->t_msgout.count= htole32(1);
578 1.9 bouyer tables->msg_out[0] = MSG_MESSAGE_REJECT;
579 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
580 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
581 1.7 bouyer sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
582 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
583 1.14 bouyer siop_target->offset = siop_target->period = 0;
584 1.1 bouyer } else { /* target initiated sync neg */
585 1.1 bouyer #ifdef DEBUG
586 1.1 bouyer printf("sdtr (target): sync %d offset %d\n", sync, offset);
587 1.1 bouyer #endif
588 1.22 bouyer if (offset == 0 || sync > sc->st_maxsync) { /* async */
589 1.1 bouyer goto async;
590 1.1 bouyer }
591 1.22 bouyer if (offset > maxoffset)
592 1.22 bouyer offset = maxoffset;
593 1.22 bouyer if (sync < sc->st_minsync)
594 1.22 bouyer sync = sc->st_minsync;
595 1.1 bouyer /* look for sync period */
596 1.1 bouyer for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]);
597 1.1 bouyer i++) {
598 1.1 bouyer if (sc->clock_period != scf_period[i].clock)
599 1.1 bouyer continue;
600 1.1 bouyer if (scf_period[i].period == sync) {
601 1.1 bouyer /* ok, found it. we now are sync. */
602 1.14 bouyer siop_target->offset = offset;
603 1.14 bouyer siop_target->period = sync;
604 1.1 bouyer sc->targets[target]->id &=
605 1.1 bouyer ~(SCNTL3_SCF_MASK << 24);
606 1.1 bouyer sc->targets[target]->id |= scf_period[i].scf
607 1.1 bouyer << (24 + SCNTL3_SCF_SHIFT);
608 1.22 bouyer if (sync < 25 && /* Ultra */
609 1.22 bouyer (sc->features & SF_BUS_ULTRA3) == 0)
610 1.1 bouyer sc->targets[target]->id |=
611 1.1 bouyer SCNTL3_ULTRA << 24;
612 1.1 bouyer else
613 1.1 bouyer sc->targets[target]->id &=
614 1.1 bouyer ~(SCNTL3_ULTRA << 24);
615 1.1 bouyer sc->targets[target]->id &=
616 1.7 bouyer ~(SXFER_MO_MASK << 8);
617 1.1 bouyer sc->targets[target]->id |=
618 1.7 bouyer (offset & SXFER_MO_MASK) << 8;
619 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
620 1.10 bouyer siop_sdtr_msg(siop_cmd, 0, sync, offset);
621 1.1 bouyer send_msgout = 1;
622 1.1 bouyer goto end;
623 1.1 bouyer }
624 1.1 bouyer }
625 1.1 bouyer async:
626 1.14 bouyer siop_target->offset = siop_target->period = 0;
627 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
628 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
629 1.7 bouyer sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
630 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
631 1.10 bouyer siop_sdtr_msg(siop_cmd, 0, 0, 0);
632 1.1 bouyer send_msgout = 1;
633 1.1 bouyer }
634 1.1 bouyer end:
635 1.14 bouyer if (siop_target->status == TARST_OK)
636 1.14 bouyer siop_update_xfer_mode(sc, target);
637 1.1 bouyer #ifdef DEBUG
638 1.1 bouyer printf("id now 0x%x\n", sc->targets[target]->id);
639 1.1 bouyer #endif
640 1.9 bouyer tables->id = htole32(sc->targets[target]->id);
641 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
642 1.1 bouyer (sc->targets[target]->id >> 24) & 0xff);
643 1.7 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
644 1.1 bouyer (sc->targets[target]->id >> 8) & 0xff);
645 1.1 bouyer if (send_msgout) {
646 1.1 bouyer return SIOP_NEG_MSGOUT;
647 1.1 bouyer } else {
648 1.1 bouyer return SIOP_NEG_ACK;
649 1.1 bouyer }
650 1.1 bouyer }
651 1.1 bouyer
652 1.1 bouyer void
653 1.10 bouyer siop_sdtr_msg(siop_cmd, offset, ssync, soff)
654 1.17 bouyer struct siop_common_cmd *siop_cmd;
655 1.10 bouyer int offset;
656 1.10 bouyer int ssync, soff;
657 1.10 bouyer {
658 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
659 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_SDTR_LEN;
660 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_SDTR;
661 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
662 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 4] = soff;
663 1.17 bouyer siop_cmd->siop_tables->t_msgout.count =
664 1.10 bouyer htole32(offset + MSG_EXT_SDTR_LEN + 2);
665 1.10 bouyer }
666 1.10 bouyer
667 1.10 bouyer void
668 1.10 bouyer siop_wdtr_msg(siop_cmd, offset, wide)
669 1.17 bouyer struct siop_common_cmd *siop_cmd;
670 1.10 bouyer int offset;
671 1.10 bouyer {
672 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
673 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_WDTR_LEN;
674 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_WDTR;
675 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 3] = wide;
676 1.17 bouyer siop_cmd->siop_tables->t_msgout.count =
677 1.10 bouyer htole32(offset + MSG_EXT_WDTR_LEN + 2);
678 1.22 bouyer }
679 1.22 bouyer
680 1.22 bouyer void
681 1.22 bouyer siop_ppr_msg(siop_cmd, offset, ssync, soff)
682 1.22 bouyer struct siop_common_cmd *siop_cmd;
683 1.22 bouyer int offset;
684 1.22 bouyer int ssync, soff;
685 1.22 bouyer {
686 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
687 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_PPR_LEN;
688 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_PPR;
689 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
690 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 4] = 0; /* reserved */
691 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 5] = soff;
692 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 6] = 1; /* wide */
693 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 7] = MSG_EXT_PPR_DT;
694 1.22 bouyer siop_cmd->siop_tables->t_msgout.count =
695 1.22 bouyer htole32(offset + MSG_EXT_PPR_LEN + 2);
696 1.10 bouyer }
697 1.10 bouyer
698 1.10 bouyer void
699 1.1 bouyer siop_minphys(bp)
700 1.1 bouyer struct buf *bp;
701 1.1 bouyer {
702 1.1 bouyer minphys(bp);
703 1.1 bouyer }
704 1.1 bouyer
705 1.1 bouyer int
706 1.14 bouyer siop_ioctl(chan, cmd, arg, flag, p)
707 1.14 bouyer struct scsipi_channel *chan;
708 1.1 bouyer u_long cmd;
709 1.1 bouyer caddr_t arg;
710 1.1 bouyer int flag;
711 1.1 bouyer struct proc *p;
712 1.1 bouyer {
713 1.17 bouyer struct siop_common_softc *sc = (void *)chan->chan_adapter->adapt_dev;
714 1.1 bouyer
715 1.1 bouyer switch (cmd) {
716 1.1 bouyer case SCBUSIORESET:
717 1.24 bouyer /*
718 1.24 bouyer * abort the script. This will trigger an interrupt, which will
719 1.24 bouyer * trigger a bus reset.
720 1.24 bouyer * We can't safely trigger the reset here as we can't access
721 1.24 bouyer * the required register while the script is running.
722 1.24 bouyer */
723 1.24 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_ABRT);
724 1.1 bouyer return (0);
725 1.1 bouyer default:
726 1.1 bouyer return (ENOTTY);
727 1.1 bouyer }
728 1.1 bouyer }
729 1.1 bouyer
730 1.1 bouyer void
731 1.1 bouyer siop_sdp(siop_cmd)
732 1.17 bouyer struct siop_common_cmd *siop_cmd;
733 1.1 bouyer {
734 1.1 bouyer /* save data pointer. Handle async only for now */
735 1.1 bouyer int offset, dbc, sstat;
736 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
737 1.1 bouyer scr_table_t *table; /* table to patch */
738 1.1 bouyer
739 1.1 bouyer if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
740 1.1 bouyer == 0)
741 1.1 bouyer return; /* no data pointers to save */
742 1.1 bouyer offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
743 1.1 bouyer if (offset >= SIOP_NSG) {
744 1.1 bouyer printf("%s: bad offset in siop_sdp (%d)\n",
745 1.1 bouyer sc->sc_dev.dv_xname, offset);
746 1.1 bouyer return;
747 1.1 bouyer }
748 1.17 bouyer table = &siop_cmd->siop_tables->data[offset];
749 1.1 bouyer #ifdef DEBUG_DR
750 1.1 bouyer printf("sdp: offset %d count=%d addr=0x%x ", offset,
751 1.1 bouyer table->count, table->addr);
752 1.1 bouyer #endif
753 1.1 bouyer dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff;
754 1.1 bouyer if (siop_cmd->xs->xs_control & XS_CTL_DATA_OUT) {
755 1.13 bouyer if (sc->features & SF_CHIP_DFBC) {
756 1.13 bouyer dbc +=
757 1.13 bouyer bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_DFBC);
758 1.1 bouyer } else {
759 1.13 bouyer /* need to account stale data in FIFO */
760 1.13 bouyer int dfifo =
761 1.13 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO);
762 1.13 bouyer if (sc->features & SF_CHIP_FIFO) {
763 1.13 bouyer dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh,
764 1.13 bouyer SIOP_CTEST5) & CTEST5_BOMASK) << 8;
765 1.13 bouyer dbc += (dfifo - (dbc & 0x3ff)) & 0x3ff;
766 1.13 bouyer } else {
767 1.13 bouyer dbc += (dfifo - (dbc & 0x7f)) & 0x7f;
768 1.13 bouyer }
769 1.1 bouyer }
770 1.1 bouyer sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0);
771 1.1 bouyer if (sstat & SSTAT0_OLF)
772 1.1 bouyer dbc++;
773 1.13 bouyer if ((sstat & SSTAT0_ORF) && (sc->features & SF_CHIP_DFBC) == 0)
774 1.1 bouyer dbc++;
775 1.9 bouyer if (siop_cmd->siop_target->flags & TARF_ISWIDE) {
776 1.1 bouyer sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh,
777 1.1 bouyer SIOP_SSTAT2);
778 1.1 bouyer if (sstat & SSTAT2_OLF1)
779 1.1 bouyer dbc++;
780 1.13 bouyer if ((sstat & SSTAT2_ORF1) &&
781 1.13 bouyer (sc->features & SF_CHIP_DFBC) == 0)
782 1.1 bouyer dbc++;
783 1.1 bouyer }
784 1.1 bouyer /* clear the FIFO */
785 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
786 1.1 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) |
787 1.1 bouyer CTEST3_CLF);
788 1.1 bouyer }
789 1.1 bouyer table->addr =
790 1.1 bouyer htole32(le32toh(table->addr) + le32toh(table->count) - dbc);
791 1.1 bouyer table->count = htole32(dbc);
792 1.1 bouyer #ifdef DEBUG_DR
793 1.1 bouyer printf("now count=%d addr=0x%x\n", table->count, table->addr);
794 1.1 bouyer #endif
795 1.1 bouyer }
796 1.1 bouyer
797 1.1 bouyer void
798 1.1 bouyer siop_clearfifo(sc)
799 1.17 bouyer struct siop_common_softc *sc;
800 1.1 bouyer {
801 1.1 bouyer int timeout = 0;
802 1.1 bouyer int ctest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3);
803 1.1 bouyer
804 1.1 bouyer #ifdef DEBUG_INTR
805 1.1 bouyer printf("DMA fifo not empty !\n");
806 1.1 bouyer #endif
807 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
808 1.1 bouyer ctest3 | CTEST3_CLF);
809 1.1 bouyer while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) &
810 1.1 bouyer CTEST3_CLF) != 0) {
811 1.1 bouyer delay(1);
812 1.1 bouyer if (++timeout > 1000) {
813 1.1 bouyer printf("clear fifo failed\n");
814 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
815 1.1 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh,
816 1.1 bouyer SIOP_CTEST3) & ~CTEST3_CLF);
817 1.1 bouyer return;
818 1.1 bouyer }
819 1.1 bouyer }
820 1.3 bouyer }
821 1.3 bouyer
822 1.3 bouyer int
823 1.3 bouyer siop_modechange(sc)
824 1.17 bouyer struct siop_common_softc *sc;
825 1.3 bouyer {
826 1.3 bouyer int retry;
827 1.27 bouyer int sist0, sist1, stest2;
828 1.3 bouyer for (retry = 0; retry < 5; retry++) {
829 1.3 bouyer /*
830 1.3 bouyer * datasheet says to wait 100ms and re-read SIST1,
831 1.14 bouyer * to check that DIFFSENSE is stable.
832 1.3 bouyer * We may delay() 5 times for 100ms at interrupt time;
833 1.3 bouyer * hopefully this will not happen often.
834 1.3 bouyer */
835 1.3 bouyer delay(100000);
836 1.3 bouyer sist0 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST0);
837 1.3 bouyer sist1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST1);
838 1.3 bouyer if (sist1 & SIEN1_SBMC)
839 1.3 bouyer continue; /* we got an irq again */
840 1.27 bouyer sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
841 1.3 bouyer STEST4_MODE_MASK;
842 1.3 bouyer stest2 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2);
843 1.27 bouyer switch(sc->mode) {
844 1.3 bouyer case STEST4_MODE_DIF:
845 1.3 bouyer printf("%s: switching to differential mode\n",
846 1.3 bouyer sc->sc_dev.dv_xname);
847 1.3 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
848 1.3 bouyer stest2 | STEST2_DIF);
849 1.3 bouyer break;
850 1.3 bouyer case STEST4_MODE_SE:
851 1.3 bouyer printf("%s: switching to single-ended mode\n",
852 1.3 bouyer sc->sc_dev.dv_xname);
853 1.3 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
854 1.3 bouyer stest2 & ~STEST2_DIF);
855 1.3 bouyer break;
856 1.3 bouyer case STEST4_MODE_LVD:
857 1.3 bouyer printf("%s: switching to LVD mode\n",
858 1.3 bouyer sc->sc_dev.dv_xname);
859 1.3 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
860 1.3 bouyer stest2 & ~STEST2_DIF);
861 1.3 bouyer break;
862 1.3 bouyer default:
863 1.3 bouyer printf("%s: invalid SCSI mode 0x%x\n",
864 1.27 bouyer sc->sc_dev.dv_xname, sc->mode);
865 1.3 bouyer return 0;
866 1.3 bouyer }
867 1.3 bouyer return 1;
868 1.3 bouyer }
869 1.3 bouyer printf("%s: timeout waiting for DIFFSENSE to stabilise\n",
870 1.3 bouyer sc->sc_dev.dv_xname);
871 1.3 bouyer return 0;
872 1.6 bouyer }
873 1.6 bouyer
874 1.6 bouyer void
875 1.6 bouyer siop_resetbus(sc)
876 1.17 bouyer struct siop_common_softc *sc;
877 1.6 bouyer {
878 1.6 bouyer int scntl1;
879 1.6 bouyer scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
880 1.6 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
881 1.6 bouyer scntl1 | SCNTL1_RST);
882 1.6 bouyer /* minimum 25 us, more time won't hurt */
883 1.6 bouyer delay(100);
884 1.6 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
885 1.17 bouyer }
886 1.17 bouyer
887 1.17 bouyer void
888 1.17 bouyer siop_update_xfer_mode(sc, target)
889 1.17 bouyer struct siop_common_softc *sc;
890 1.17 bouyer int target;
891 1.17 bouyer {
892 1.17 bouyer struct siop_common_target *siop_target = sc->targets[target];
893 1.17 bouyer struct scsipi_xfer_mode xm;
894 1.17 bouyer
895 1.17 bouyer xm.xm_target = target;
896 1.17 bouyer xm.xm_mode = 0;
897 1.17 bouyer xm.xm_period = 0;
898 1.17 bouyer xm.xm_offset = 0;
899 1.26 bouyer
900 1.17 bouyer
901 1.17 bouyer if (siop_target->flags & TARF_ISWIDE)
902 1.17 bouyer xm.xm_mode |= PERIPH_CAP_WIDE16;
903 1.17 bouyer if (siop_target->period) {
904 1.17 bouyer xm.xm_period = siop_target->period;
905 1.17 bouyer xm.xm_offset = siop_target->offset;
906 1.17 bouyer xm.xm_mode |= PERIPH_CAP_SYNC;
907 1.17 bouyer }
908 1.28 bouyer if (siop_target->flags & TARF_TAG) {
909 1.28 bouyer /* 1010 workaround: can't do disconnect if not wide, so can't do tag */
910 1.28 bouyer if ((sc->features & SF_CHIP_GEBUG) == 0 ||
911 1.28 bouyer (sc->targets[target]->flags & TARF_ISWIDE))
912 1.28 bouyer xm.xm_mode |= PERIPH_CAP_TQING;
913 1.28 bouyer }
914 1.28 bouyer
915 1.17 bouyer scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_XFER_MODE, &xm);
916 1.1 bouyer }
917