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siop_common.c revision 1.45.2.1
      1  1.45.2.1      yamt /*	$NetBSD: siop_common.c,v 1.45.2.1 2008/06/17 09:14:34 yamt Exp $	*/
      2       1.1    bouyer 
      3       1.1    bouyer /*
      4      1.22    bouyer  * Copyright (c) 2000, 2002 Manuel Bouyer.
      5       1.1    bouyer  *
      6       1.1    bouyer  * Redistribution and use in source and binary forms, with or without
      7       1.1    bouyer  * modification, are permitted provided that the following conditions
      8       1.1    bouyer  * are met:
      9       1.1    bouyer  * 1. Redistributions of source code must retain the above copyright
     10       1.1    bouyer  *    notice, this list of conditions and the following disclaimer.
     11       1.1    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.1    bouyer  *    notice, this list of conditions and the following disclaimer in the
     13       1.1    bouyer  *    documentation and/or other materials provided with the distribution.
     14       1.1    bouyer  * 3. All advertising materials mentioning features or use of this software
     15       1.1    bouyer  *    must display the following acknowledgement:
     16      1.23    bouyer  *	This product includes software developed by Manuel Bouyer.
     17       1.1    bouyer  * 4. The name of the author may not be used to endorse or promote products
     18       1.1    bouyer  *    derived from this software without specific prior written permission.
     19       1.1    bouyer  *
     20       1.1    bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21       1.1    bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22       1.1    bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23      1.37     perry  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24       1.1    bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25       1.1    bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26       1.1    bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27       1.1    bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28       1.1    bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29       1.1    bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30       1.1    bouyer  *
     31       1.1    bouyer  */
     32       1.1    bouyer 
     33       1.1    bouyer /* SYM53c7/8xx PCI-SCSI I/O Processors driver */
     34      1.15     lukem 
     35      1.15     lukem #include <sys/cdefs.h>
     36  1.45.2.1      yamt __KERNEL_RCSID(0, "$NetBSD: siop_common.c,v 1.45.2.1 2008/06/17 09:14:34 yamt Exp $");
     37       1.1    bouyer 
     38       1.1    bouyer #include <sys/param.h>
     39       1.1    bouyer #include <sys/systm.h>
     40       1.1    bouyer #include <sys/device.h>
     41       1.1    bouyer #include <sys/malloc.h>
     42       1.1    bouyer #include <sys/buf.h>
     43       1.1    bouyer #include <sys/kernel.h>
     44       1.1    bouyer #include <sys/scsiio.h>
     45       1.1    bouyer 
     46      1.22    bouyer #include <uvm/uvm_extern.h>
     47      1.22    bouyer 
     48       1.1    bouyer #include <machine/endian.h>
     49      1.43        ad #include <sys/bus.h>
     50       1.1    bouyer 
     51       1.1    bouyer #include <dev/scsipi/scsi_all.h>
     52       1.1    bouyer #include <dev/scsipi/scsi_message.h>
     53       1.1    bouyer #include <dev/scsipi/scsipi_all.h>
     54       1.1    bouyer 
     55       1.1    bouyer #include <dev/scsipi/scsiconf.h>
     56       1.1    bouyer 
     57       1.1    bouyer #include <dev/ic/siopreg.h>
     58       1.1    bouyer #include <dev/ic/siopvar_common.h>
     59       1.1    bouyer 
     60      1.16    bouyer #include "opt_siop.h"
     61      1.16    bouyer 
     62       1.2    bouyer #undef DEBUG
     63       1.2    bouyer #undef DEBUG_DR
     64      1.22    bouyer #undef DEBUG_NEG
     65      1.22    bouyer 
     66      1.22    bouyer int
     67      1.22    bouyer siop_common_attach(sc)
     68      1.22    bouyer 	struct siop_common_softc *sc;
     69      1.22    bouyer {
     70      1.22    bouyer 	int error, i;
     71      1.22    bouyer 	bus_dma_segment_t seg;
     72      1.22    bouyer 	int rseg;
     73      1.22    bouyer 
     74      1.22    bouyer 	/*
     75      1.22    bouyer 	 * Allocate DMA-safe memory for the script and map it.
     76      1.22    bouyer 	 */
     77      1.22    bouyer 	if ((sc->features & SF_CHIP_RAM) == 0) {
     78      1.37     perry 		error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE,
     79      1.22    bouyer 		    PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT);
     80      1.22    bouyer 		if (error) {
     81      1.45    cegger 			aprint_error_dev(&sc->sc_dev,
     82      1.45    cegger 			    "unable to allocate script DMA memory, "
     83      1.45    cegger 			    "error = %d\n", error);
     84      1.22    bouyer 			return error;
     85      1.22    bouyer 		}
     86      1.22    bouyer 		error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE,
     87      1.42  christos 		    (void **)&sc->sc_script,
     88      1.22    bouyer 		    BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
     89      1.22    bouyer 		if (error) {
     90      1.45    cegger 			aprint_error_dev(&sc->sc_dev, "unable to map script DMA memory, "
     91      1.45    cegger 			    "error = %d\n", error);
     92      1.22    bouyer 			return error;
     93      1.22    bouyer 		}
     94      1.22    bouyer 		error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1,
     95      1.22    bouyer 		    PAGE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma);
     96      1.22    bouyer 		if (error) {
     97      1.45    cegger 			aprint_error_dev(&sc->sc_dev, "unable to create script DMA map, "
     98      1.45    cegger 			    "error = %d\n", error);
     99      1.22    bouyer 			return error;
    100      1.22    bouyer 		}
    101      1.22    bouyer 		error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma,
    102      1.22    bouyer 		    sc->sc_script, PAGE_SIZE, NULL, BUS_DMA_NOWAIT);
    103      1.22    bouyer 		if (error) {
    104      1.45    cegger 			aprint_error_dev(&sc->sc_dev, "unable to load script DMA map, "
    105      1.45    cegger 			    "error = %d\n", error);
    106      1.22    bouyer 			return error;
    107      1.22    bouyer 		}
    108      1.22    bouyer 		sc->sc_scriptaddr =
    109      1.22    bouyer 		    sc->sc_scriptdma->dm_segs[0].ds_addr;
    110      1.22    bouyer 		sc->ram_size = PAGE_SIZE;
    111      1.22    bouyer 	}
    112      1.22    bouyer 
    113      1.22    bouyer 	sc->sc_adapt.adapt_dev = &sc->sc_dev;
    114      1.22    bouyer 	sc->sc_adapt.adapt_nchannels = 1;
    115      1.22    bouyer 	sc->sc_adapt.adapt_openings = 0;
    116      1.22    bouyer 	sc->sc_adapt.adapt_ioctl = siop_ioctl;
    117      1.22    bouyer 	sc->sc_adapt.adapt_minphys = minphys;
    118      1.22    bouyer 
    119      1.22    bouyer 	memset(&sc->sc_chan, 0, sizeof(sc->sc_chan));
    120      1.22    bouyer 	sc->sc_chan.chan_adapter = &sc->sc_adapt;
    121      1.22    bouyer 	sc->sc_chan.chan_bustype = &scsi_bustype;
    122      1.22    bouyer 	sc->sc_chan.chan_channel = 0;
    123      1.22    bouyer 	sc->sc_chan.chan_flags = SCSIPI_CHAN_CANGROW;
    124      1.22    bouyer 	sc->sc_chan.chan_ntargets =
    125      1.22    bouyer 	    (sc->features & SF_BUS_WIDE) ? 16 : 8;
    126      1.22    bouyer 	sc->sc_chan.chan_nluns = 8;
    127      1.22    bouyer 	sc->sc_chan.chan_id =
    128      1.22    bouyer 	    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCID);
    129      1.22    bouyer 	if (sc->sc_chan.chan_id == 0 ||
    130      1.22    bouyer 	    sc->sc_chan.chan_id >= sc->sc_chan.chan_ntargets)
    131      1.22    bouyer 		sc->sc_chan.chan_id = SIOP_DEFAULT_TARGET;
    132      1.22    bouyer 
    133      1.22    bouyer 	for (i = 0; i < 16; i++)
    134      1.22    bouyer 		sc->targets[i] = NULL;
    135      1.22    bouyer 
    136      1.22    bouyer 	/* find min/max sync period for this chip */
    137      1.22    bouyer 	sc->st_maxsync = 0;
    138      1.22    bouyer 	sc->dt_maxsync = 0;
    139      1.22    bouyer 	sc->st_minsync = 255;
    140      1.22    bouyer 	sc->dt_minsync = 255;
    141      1.22    bouyer 	for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]); i++) {
    142      1.22    bouyer 		if (sc->clock_period != scf_period[i].clock)
    143      1.22    bouyer 			continue;
    144      1.22    bouyer 		if (sc->st_maxsync < scf_period[i].period)
    145      1.22    bouyer 			sc->st_maxsync = scf_period[i].period;
    146      1.22    bouyer 		if (sc->st_minsync > scf_period[i].period)
    147      1.22    bouyer 			sc->st_minsync = scf_period[i].period;
    148      1.22    bouyer 	}
    149      1.22    bouyer 	if (sc->st_maxsync == 255 || sc->st_minsync == 0)
    150      1.31    provos 		panic("siop: can't find my sync parameters");
    151      1.22    bouyer 	for (i = 0; i < sizeof(dt_scf_period) / sizeof(dt_scf_period[0]); i++) {
    152      1.22    bouyer 		if (sc->clock_period != dt_scf_period[i].clock)
    153      1.22    bouyer 			continue;
    154      1.22    bouyer 		if (sc->dt_maxsync < dt_scf_period[i].period)
    155      1.22    bouyer 			sc->dt_maxsync = dt_scf_period[i].period;
    156      1.22    bouyer 		if (sc->dt_minsync > dt_scf_period[i].period)
    157      1.22    bouyer 			sc->dt_minsync = dt_scf_period[i].period;
    158      1.22    bouyer 	}
    159      1.22    bouyer 	if (sc->dt_maxsync == 255 || sc->dt_minsync == 0)
    160      1.31    provos 		panic("siop: can't find my sync parameters");
    161      1.22    bouyer 	return 0;
    162      1.22    bouyer }
    163       1.1    bouyer 
    164       1.1    bouyer void
    165       1.1    bouyer siop_common_reset(sc)
    166      1.17    bouyer 	struct siop_common_softc *sc;
    167       1.1    bouyer {
    168  1.45.2.1      yamt 	u_int32_t stest1, stest3;
    169       1.1    bouyer 
    170       1.1    bouyer 	/* reset the chip */
    171       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST);
    172       1.1    bouyer 	delay(1000);
    173       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, 0);
    174       1.1    bouyer 
    175       1.1    bouyer 	/* init registers */
    176       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL0,
    177       1.1    bouyer 	    SCNTL0_ARB_MASK | SCNTL0_EPC | SCNTL0_AAP);
    178       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 0);
    179       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, sc->clock_div);
    180       1.7    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 0);
    181       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DIEN, 0xff);
    182       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN0,
    183       1.1    bouyer 	    0xff & ~(SIEN0_CMP | SIEN0_SEL | SIEN0_RSL));
    184       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN1,
    185       1.1    bouyer 	    0xff & ~(SIEN1_HTH | SIEN1_GEN));
    186       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 0);
    187       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, STEST3_TE);
    188       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
    189       1.1    bouyer 	    (0xb << STIME0_SEL_SHIFT));
    190       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCID,
    191      1.14    bouyer 	    sc->sc_chan.chan_id | SCID_RRE);
    192       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_RESPID0,
    193      1.14    bouyer 	    1 << sc->sc_chan.chan_id);
    194       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL,
    195       1.1    bouyer 	    (sc->features & SF_CHIP_PF) ? DCNTL_COM | DCNTL_PFEN : DCNTL_COM);
    196      1.33    bouyer 	if (sc->features & SF_CHIP_AAIP)
    197      1.33    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh,
    198      1.33    bouyer 		    SIOP_AIPCNTL1, AIPCNTL1_DIS);
    199       1.1    bouyer 
    200       1.1    bouyer 	/* enable clock doubler or quadruler if appropriate */
    201       1.1    bouyer 	if (sc->features & (SF_CHIP_DBLR | SF_CHIP_QUAD)) {
    202       1.1    bouyer 		stest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3);
    203       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
    204       1.1    bouyer 		    STEST1_DBLEN);
    205       1.1    bouyer 		if (sc->features & SF_CHIP_QUAD) {
    206       1.1    bouyer 			/* wait for PPL to lock */
    207       1.1    bouyer 			while ((bus_space_read_1(sc->sc_rt, sc->sc_rh,
    208       1.1    bouyer 			    SIOP_STEST4) & STEST4_LOCK) == 0)
    209       1.1    bouyer 				delay(10);
    210       1.1    bouyer 		} else {
    211       1.1    bouyer 			/* data sheet says 20us - more won't hurt */
    212       1.1    bouyer 			delay(100);
    213       1.1    bouyer 		}
    214       1.1    bouyer 		/* halt scsi clock, select doubler/quad, restart clock */
    215       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3,
    216       1.1    bouyer 		    stest3 | STEST3_HSC);
    217       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
    218       1.1    bouyer 		    STEST1_DBLEN | STEST1_DBLSEL);
    219       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, stest3);
    220       1.1    bouyer 	} else {
    221       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 0);
    222       1.1    bouyer 	}
    223  1.45.2.1      yamt 
    224  1.45.2.1      yamt 	if (sc->features & SF_CHIP_USEPCIC) {
    225  1.45.2.1      yamt 		stest1 = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_STEST1);
    226  1.45.2.1      yamt 		stest1 |= STEST1_SCLK;
    227  1.45.2.1      yamt 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, stest1);
    228  1.45.2.1      yamt 	}
    229  1.45.2.1      yamt 
    230       1.1    bouyer 	if (sc->features & SF_CHIP_FIFO)
    231       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5,
    232       1.1    bouyer 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5) |
    233       1.1    bouyer 		    CTEST5_DFS);
    234      1.21    bouyer 	if (sc->features & SF_CHIP_LED0) {
    235      1.21    bouyer 		/* Set GPIO0 as output if software LED control is required */
    236      1.21    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL,
    237      1.21    bouyer 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL) & 0xfe);
    238      1.21    bouyer 	}
    239      1.22    bouyer 	if (sc->features & SF_BUS_ULTRA3) {
    240      1.22    bouyer 		/* reset SCNTL4 */
    241      1.22    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4, 0);
    242      1.22    bouyer 	}
    243      1.27    bouyer 	sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
    244      1.27    bouyer 	    STEST4_MODE_MASK;
    245      1.30    bouyer 
    246      1.30    bouyer 	/*
    247      1.30    bouyer 	 * initialise the RAM. Without this we may get scsi gross errors on
    248      1.30    bouyer 	 * the 1010
    249      1.30    bouyer 	 */
    250      1.30    bouyer 	if (sc->features & SF_CHIP_RAM)
    251      1.30    bouyer 		bus_space_set_region_4(sc->sc_ramt, sc->sc_ramh,
    252      1.30    bouyer 			0, 0, sc->ram_size / 4);
    253       1.1    bouyer 	sc->sc_reset(sc);
    254       1.1    bouyer }
    255       1.1    bouyer 
    256      1.10    bouyer /* prepare tables before sending a cmd */
    257      1.10    bouyer void
    258      1.10    bouyer siop_setuptables(siop_cmd)
    259      1.17    bouyer 	struct siop_common_cmd *siop_cmd;
    260      1.10    bouyer {
    261      1.10    bouyer 	int i;
    262      1.17    bouyer 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    263      1.10    bouyer 	struct scsipi_xfer *xs = siop_cmd->xs;
    264      1.14    bouyer 	int target = xs->xs_periph->periph_target;
    265      1.14    bouyer 	int lun = xs->xs_periph->periph_lun;
    266      1.14    bouyer 	int msgoffset = 1;
    267      1.10    bouyer 
    268      1.44     skrll 	siop_cmd->siop_tables->id = siop_htoc32(sc, sc->targets[target]->id);
    269      1.22    bouyer 	memset(siop_cmd->siop_tables->msg_out, 0,
    270      1.22    bouyer 	    sizeof(siop_cmd->siop_tables->msg_out));
    271      1.14    bouyer 	/* request sense doesn't disconnect */
    272      1.14    bouyer 	if (xs->xs_control & XS_CTL_REQSENSE)
    273      1.17    bouyer 		siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0);
    274      1.26    bouyer 	else if ((sc->features & SF_CHIP_GEBUG) &&
    275      1.26    bouyer 	    (sc->targets[target]->flags & TARF_ISWIDE) == 0)
    276      1.26    bouyer 		/*
    277      1.26    bouyer 		 * 1010 bug: it seems that the 1010 has problems with reselect
    278      1.26    bouyer 		 * when not in wide mode (generate false SCSI gross error).
    279      1.26    bouyer 		 * The FreeBSD sym driver has comments about it but their
    280      1.26    bouyer 		 * workaround (disable SCSI gross error reporting) doesn't
    281      1.26    bouyer 		 * work with my adapter. So disable disconnect when not
    282      1.26    bouyer 		 * wide.
    283      1.26    bouyer 		 */
    284      1.26    bouyer 		siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0);
    285      1.14    bouyer 	else
    286      1.17    bouyer 		siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 1);
    287      1.14    bouyer 	if (xs->xs_tag_type != 0) {
    288      1.14    bouyer 		if ((sc->targets[target]->flags & TARF_TAG) == 0) {
    289      1.14    bouyer 			scsipi_printaddr(xs->xs_periph);
    290      1.14    bouyer 			printf(": tagged command type %d id %d\n",
    291      1.14    bouyer 			    siop_cmd->xs->xs_tag_type, siop_cmd->xs->xs_tag_id);
    292      1.31    provos 			panic("tagged command for non-tagging device");
    293      1.14    bouyer 		}
    294      1.14    bouyer 		siop_cmd->flags |= CMDFL_TAG;
    295      1.17    bouyer 		siop_cmd->siop_tables->msg_out[1] = siop_cmd->xs->xs_tag_type;
    296      1.19    bouyer 		/*
    297      1.19    bouyer 		 * use siop_cmd->tag not xs->xs_tag_id, caller may want a
    298      1.19    bouyer 		 * different one
    299      1.19    bouyer 		 */
    300      1.19    bouyer 		siop_cmd->siop_tables->msg_out[2] = siop_cmd->tag;
    301      1.14    bouyer 		msgoffset = 3;
    302      1.20    bouyer 	}
    303      1.44     skrll 	siop_cmd->siop_tables->t_msgout.count = siop_htoc32(sc, msgoffset);
    304      1.10    bouyer 	if (sc->targets[target]->status == TARST_ASYNC) {
    305      1.27    bouyer 		if ((sc->targets[target]->flags & TARF_DT) &&
    306      1.27    bouyer 			(sc->mode == STEST4_MODE_LVD)) {
    307      1.22    bouyer 			sc->targets[target]->status = TARST_PPR_NEG;
    308      1.22    bouyer 			 siop_ppr_msg(siop_cmd, msgoffset, sc->dt_minsync,
    309      1.22    bouyer 			    sc->maxoff);
    310      1.22    bouyer 		} else if (sc->targets[target]->flags & TARF_WIDE) {
    311      1.10    bouyer 			sc->targets[target]->status = TARST_WIDE_NEG;
    312      1.14    bouyer 			siop_wdtr_msg(siop_cmd, msgoffset,
    313      1.14    bouyer 			    MSG_EXT_WDTR_BUS_16_BIT);
    314      1.10    bouyer 		} else if (sc->targets[target]->flags & TARF_SYNC) {
    315      1.10    bouyer 			sc->targets[target]->status = TARST_SYNC_NEG;
    316      1.22    bouyer 			siop_sdtr_msg(siop_cmd, msgoffset, sc->st_minsync,
    317      1.22    bouyer 			(sc->maxoff > 31) ? 31 :  sc->maxoff);
    318      1.10    bouyer 		} else {
    319      1.10    bouyer 			sc->targets[target]->status = TARST_OK;
    320      1.14    bouyer 			siop_update_xfer_mode(sc, target);
    321      1.10    bouyer 		}
    322      1.10    bouyer 	}
    323      1.17    bouyer 	siop_cmd->siop_tables->status =
    324      1.44     skrll 	    siop_htoc32(sc, SCSI_SIOP_NOSTATUS); /* set invalid status */
    325      1.10    bouyer 
    326      1.17    bouyer 	siop_cmd->siop_tables->cmd.count =
    327      1.44     skrll 	    siop_htoc32(sc, siop_cmd->dmamap_cmd->dm_segs[0].ds_len);
    328      1.17    bouyer 	siop_cmd->siop_tables->cmd.addr =
    329      1.44     skrll 	    siop_htoc32(sc, siop_cmd->dmamap_cmd->dm_segs[0].ds_addr);
    330      1.14    bouyer 	if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
    331      1.10    bouyer 		for (i = 0; i < siop_cmd->dmamap_data->dm_nsegs; i++) {
    332      1.17    bouyer 			siop_cmd->siop_tables->data[i].count =
    333      1.44     skrll 			    siop_htoc32(sc,
    334      1.44     skrll 				siop_cmd->dmamap_data->dm_segs[i].ds_len);
    335      1.17    bouyer 			siop_cmd->siop_tables->data[i].addr =
    336      1.44     skrll 			    siop_htoc32(sc,
    337      1.44     skrll 				siop_cmd->dmamap_data->dm_segs[i].ds_addr);
    338      1.10    bouyer 		}
    339      1.10    bouyer 	}
    340      1.10    bouyer }
    341      1.10    bouyer 
    342       1.1    bouyer int
    343       1.1    bouyer siop_wdtr_neg(siop_cmd)
    344      1.17    bouyer 	struct siop_common_cmd *siop_cmd;
    345       1.1    bouyer {
    346      1.17    bouyer 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    347      1.17    bouyer 	struct siop_common_target *siop_target = siop_cmd->siop_target;
    348      1.14    bouyer 	int target = siop_cmd->xs->xs_periph->periph_target;
    349      1.17    bouyer 	struct siop_common_xfer *tables = siop_cmd->siop_tables;
    350       1.1    bouyer 
    351       1.1    bouyer 	if (siop_target->status == TARST_WIDE_NEG) {
    352       1.1    bouyer 		/* we initiated wide negotiation */
    353       1.9    bouyer 		switch (tables->msg_in[3]) {
    354       1.1    bouyer 		case MSG_EXT_WDTR_BUS_8_BIT:
    355       1.9    bouyer 			siop_target->flags &= ~TARF_ISWIDE;
    356       1.1    bouyer 			sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
    357       1.1    bouyer 			break;
    358       1.1    bouyer 		case MSG_EXT_WDTR_BUS_16_BIT:
    359       1.9    bouyer 			if (siop_target->flags & TARF_WIDE) {
    360       1.9    bouyer 				siop_target->flags |= TARF_ISWIDE;
    361       1.1    bouyer 				sc->targets[target]->id |= (SCNTL3_EWS << 24);
    362       1.1    bouyer 				break;
    363       1.1    bouyer 			}
    364      1.38   tsutsui 		/* FALLTHROUGH */
    365       1.1    bouyer 		default:
    366       1.1    bouyer 			/*
    367      1.29       wiz  			 * hum, we got more than what we can handle, shouldn't
    368       1.1    bouyer 			 * happen. Reject, and stay async
    369       1.1    bouyer 			 */
    370       1.9    bouyer 			siop_target->flags &= ~TARF_ISWIDE;
    371       1.1    bouyer 			siop_target->status = TARST_OK;
    372      1.14    bouyer 			siop_target->offset = siop_target->period = 0;
    373      1.14    bouyer 			siop_update_xfer_mode(sc, target);
    374       1.1    bouyer 			printf("%s: rejecting invalid wide negotiation from "
    375      1.45    cegger 			    "target %d (%d)\n", device_xname(&sc->sc_dev), target,
    376       1.9    bouyer 			    tables->msg_in[3]);
    377      1.44     skrll 			tables->t_msgout.count = siop_htoc32(sc, 1);
    378       1.9    bouyer 			tables->msg_out[0] = MSG_MESSAGE_REJECT;
    379       1.1    bouyer 			return SIOP_NEG_MSGOUT;
    380       1.1    bouyer 		}
    381      1.44     skrll 		tables->id = siop_htoc32(sc, sc->targets[target]->id);
    382       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh,
    383       1.1    bouyer 		    SIOP_SCNTL3,
    384       1.1    bouyer 		    (sc->targets[target]->id >> 24) & 0xff);
    385       1.1    bouyer 		/* we now need to do sync */
    386       1.9    bouyer 		if (siop_target->flags & TARF_SYNC) {
    387       1.6    bouyer 			siop_target->status = TARST_SYNC_NEG;
    388      1.22    bouyer 			siop_sdtr_msg(siop_cmd, 0, sc->st_minsync,
    389      1.22    bouyer 			    (sc->maxoff > 31) ? 31 : sc->maxoff);
    390       1.6    bouyer 			return SIOP_NEG_MSGOUT;
    391       1.6    bouyer 		} else {
    392       1.6    bouyer 			siop_target->status = TARST_OK;
    393      1.14    bouyer 			siop_update_xfer_mode(sc, target);
    394       1.6    bouyer 			return SIOP_NEG_ACK;
    395       1.6    bouyer 		}
    396       1.1    bouyer 	} else {
    397       1.1    bouyer 		/* target initiated wide negotiation */
    398       1.9    bouyer 		if (tables->msg_in[3] >= MSG_EXT_WDTR_BUS_16_BIT
    399       1.9    bouyer 		    && (siop_target->flags & TARF_WIDE)) {
    400       1.9    bouyer 			siop_target->flags |= TARF_ISWIDE;
    401       1.1    bouyer 			sc->targets[target]->id |= SCNTL3_EWS << 24;
    402       1.1    bouyer 		} else {
    403       1.9    bouyer 			siop_target->flags &= ~TARF_ISWIDE;
    404       1.1    bouyer 			sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
    405       1.1    bouyer 		}
    406      1.44     skrll 		tables->id = siop_htoc32(sc, sc->targets[target]->id);
    407       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
    408       1.1    bouyer 		    (sc->targets[target]->id >> 24) & 0xff);
    409       1.1    bouyer 		/*
    410       1.1    bouyer 		 * we did reset wide parameters, so fall back to async,
    411       1.8    bouyer 		 * but don't schedule a sync neg, target should initiate it
    412       1.1    bouyer 		 */
    413       1.1    bouyer 		siop_target->status = TARST_OK;
    414      1.14    bouyer 		siop_target->offset = siop_target->period = 0;
    415      1.14    bouyer 		siop_update_xfer_mode(sc, target);
    416      1.10    bouyer 		siop_wdtr_msg(siop_cmd, 0, (siop_target->flags & TARF_ISWIDE) ?
    417      1.10    bouyer 		    MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT);
    418       1.1    bouyer 		return SIOP_NEG_MSGOUT;
    419       1.1    bouyer 	}
    420       1.1    bouyer }
    421       1.1    bouyer 
    422       1.1    bouyer int
    423      1.22    bouyer siop_ppr_neg(siop_cmd)
    424      1.22    bouyer 	struct siop_common_cmd *siop_cmd;
    425      1.22    bouyer {
    426      1.22    bouyer 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    427      1.22    bouyer 	struct siop_common_target *siop_target = siop_cmd->siop_target;
    428      1.22    bouyer 	int target = siop_cmd->xs->xs_periph->periph_target;
    429      1.22    bouyer 	struct siop_common_xfer *tables = siop_cmd->siop_tables;
    430      1.22    bouyer 	int sync, offset, options, scf = 0;
    431      1.22    bouyer 	int i;
    432      1.22    bouyer 
    433      1.22    bouyer #ifdef DEBUG_NEG
    434      1.45    cegger 	printf("%s: answer on ppr negotiation:", device_xname(&sc->sc_dev));
    435      1.22    bouyer 	for (i = 0; i < 8; i++)
    436      1.22    bouyer 		printf(" 0x%x", tables->msg_in[i]);
    437      1.22    bouyer 	printf("\n");
    438      1.22    bouyer #endif
    439      1.22    bouyer 
    440      1.22    bouyer 	if (siop_target->status == TARST_PPR_NEG) {
    441      1.22    bouyer 		/* we initiated PPR negotiation */
    442      1.22    bouyer 		sync = tables->msg_in[3];
    443      1.22    bouyer 		offset = tables->msg_in[5];
    444      1.22    bouyer 		options = tables->msg_in[7];
    445      1.22    bouyer 		if (options != MSG_EXT_PPR_DT) {
    446      1.22    bouyer 			/* should't happen */
    447      1.22    bouyer 			printf("%s: ppr negotiation for target %d: "
    448      1.45    cegger 			    "no DT option\n", device_xname(&sc->sc_dev), target);
    449      1.22    bouyer 			siop_target->status = TARST_ASYNC;
    450      1.22    bouyer 			siop_target->flags &= ~(TARF_DT | TARF_ISDT);
    451      1.22    bouyer 			siop_target->offset = 0;
    452      1.22    bouyer 			siop_target->period = 0;
    453      1.22    bouyer 			goto reject;
    454      1.22    bouyer 		}
    455      1.37     perry 
    456      1.22    bouyer 		if (offset > sc->maxoff || sync < sc->dt_minsync ||
    457      1.22    bouyer 		    sync > sc->dt_maxsync) {
    458      1.22    bouyer 			printf("%s: ppr negotiation for target %d: "
    459      1.22    bouyer 			    "offset (%d) or sync (%d) out of range\n",
    460      1.45    cegger 			    device_xname(&sc->sc_dev), target, offset, sync);
    461      1.22    bouyer 			/* should not happen */
    462      1.22    bouyer 			siop_target->offset = 0;
    463      1.22    bouyer 			siop_target->period = 0;
    464      1.22    bouyer 			goto reject;
    465      1.22    bouyer 		} else {
    466      1.22    bouyer 			for (i = 0; i <
    467      1.22    bouyer 			    sizeof(dt_scf_period) / sizeof(dt_scf_period[0]);
    468      1.22    bouyer 			    i++) {
    469      1.22    bouyer 				if (sc->clock_period != dt_scf_period[i].clock)
    470      1.22    bouyer 					continue;
    471      1.22    bouyer 				if (dt_scf_period[i].period == sync) {
    472      1.22    bouyer 					/* ok, found it. we now are sync. */
    473      1.22    bouyer 					siop_target->offset = offset;
    474      1.22    bouyer 					siop_target->period = sync;
    475      1.22    bouyer 					scf = dt_scf_period[i].scf;
    476      1.22    bouyer 					siop_target->flags |= TARF_ISDT;
    477      1.22    bouyer 				}
    478      1.22    bouyer 			}
    479      1.22    bouyer 			if ((siop_target->flags & TARF_ISDT) == 0) {
    480      1.22    bouyer 				printf("%s: ppr negotiation for target %d: "
    481      1.22    bouyer 				    "sync (%d) incompatible with adapter\n",
    482      1.45    cegger 				    device_xname(&sc->sc_dev), target, sync);
    483      1.22    bouyer 				/*
    484      1.22    bouyer 				 * we didn't find it in our table, do async
    485      1.22    bouyer 				 * send reject msg, start SDTR/WDTR neg
    486      1.22    bouyer 				 */
    487      1.22    bouyer 				siop_target->status = TARST_ASYNC;
    488      1.22    bouyer 				siop_target->flags &= ~(TARF_DT | TARF_ISDT);
    489      1.22    bouyer 				siop_target->offset = 0;
    490      1.22    bouyer 				siop_target->period = 0;
    491      1.22    bouyer 				goto reject;
    492      1.22    bouyer 			}
    493      1.22    bouyer 		}
    494      1.22    bouyer 		if (tables->msg_in[6] != 1) {
    495      1.22    bouyer 			printf("%s: ppr negotiation for target %d: "
    496      1.22    bouyer 			    "transfer width (%d) incompatible with dt\n",
    497      1.45    cegger 			    device_xname(&sc->sc_dev), target, tables->msg_in[6]);
    498      1.22    bouyer 			/* DT mode can only be done with wide transfers */
    499      1.22    bouyer 			siop_target->status = TARST_ASYNC;
    500      1.22    bouyer 			goto reject;
    501      1.37     perry 		}
    502      1.22    bouyer 		siop_target->flags |= TARF_ISWIDE;
    503      1.22    bouyer 		sc->targets[target]->id |= (SCNTL3_EWS << 24);
    504      1.22    bouyer 		sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
    505      1.22    bouyer 		sc->targets[target]->id |= scf << (24 + SCNTL3_SCF_SHIFT);
    506      1.22    bouyer 		sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
    507      1.22    bouyer 		sc->targets[target]->id |=
    508      1.22    bouyer 		    (siop_target->offset & SXFER_MO_MASK) << 8;
    509      1.22    bouyer 		sc->targets[target]->id &= ~0xff;
    510      1.22    bouyer 		sc->targets[target]->id |= SCNTL4_U3EN;
    511      1.22    bouyer 		siop_target->status = TARST_OK;
    512      1.22    bouyer 		siop_update_xfer_mode(sc, target);
    513      1.22    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
    514      1.22    bouyer 		    (sc->targets[target]->id >> 24) & 0xff);
    515      1.22    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
    516      1.22    bouyer 		    (sc->targets[target]->id >> 8) & 0xff);
    517      1.22    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4,
    518      1.22    bouyer 		    sc->targets[target]->id & 0xff);
    519      1.22    bouyer 		return SIOP_NEG_ACK;
    520      1.22    bouyer 	} else {
    521      1.22    bouyer 		/* target initiated PPR negotiation, shouldn't happen */
    522      1.22    bouyer 		printf("%s: rejecting invalid PPR negotiation from "
    523      1.45    cegger 		    "target %d\n", device_xname(&sc->sc_dev), target);
    524      1.22    bouyer reject:
    525      1.44     skrll 		tables->t_msgout.count = siop_htoc32(sc, 1);
    526      1.22    bouyer 		tables->msg_out[0] = MSG_MESSAGE_REJECT;
    527      1.22    bouyer 		return SIOP_NEG_MSGOUT;
    528      1.22    bouyer 	}
    529      1.22    bouyer }
    530      1.22    bouyer 
    531      1.22    bouyer int
    532       1.1    bouyer siop_sdtr_neg(siop_cmd)
    533      1.17    bouyer 	struct siop_common_cmd *siop_cmd;
    534       1.1    bouyer {
    535      1.17    bouyer 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    536      1.17    bouyer 	struct siop_common_target *siop_target = siop_cmd->siop_target;
    537      1.14    bouyer 	int target = siop_cmd->xs->xs_periph->periph_target;
    538      1.22    bouyer 	int sync, maxoffset, offset, i;
    539       1.1    bouyer 	int send_msgout = 0;
    540      1.17    bouyer 	struct siop_common_xfer *tables = siop_cmd->siop_tables;
    541       1.1    bouyer 
    542      1.22    bouyer 	/* limit to Ultra/2 parameters, need PPR for Ultra/3 */
    543      1.22    bouyer 	maxoffset = (sc->maxoff > 31) ? 31 : sc->maxoff;
    544      1.22    bouyer 
    545       1.9    bouyer 	sync = tables->msg_in[3];
    546       1.9    bouyer 	offset = tables->msg_in[4];
    547       1.1    bouyer 
    548       1.1    bouyer 	if (siop_target->status == TARST_SYNC_NEG) {
    549       1.1    bouyer 		/* we initiated sync negotiation */
    550       1.1    bouyer 		siop_target->status = TARST_OK;
    551       1.1    bouyer #ifdef DEBUG
    552       1.1    bouyer 		printf("sdtr: sync %d offset %d\n", sync, offset);
    553       1.1    bouyer #endif
    554      1.22    bouyer 		if (offset > maxoffset || sync < sc->st_minsync ||
    555      1.22    bouyer 			sync > sc->st_maxsync)
    556       1.1    bouyer 			goto reject;
    557       1.1    bouyer 		for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]);
    558       1.1    bouyer 		    i++) {
    559       1.1    bouyer 			if (sc->clock_period != scf_period[i].clock)
    560       1.1    bouyer 				continue;
    561       1.1    bouyer 			if (scf_period[i].period == sync) {
    562       1.1    bouyer 				/* ok, found it. we now are sync. */
    563      1.14    bouyer 				siop_target->offset = offset;
    564      1.14    bouyer 				siop_target->period = sync;
    565       1.1    bouyer 				sc->targets[target]->id &=
    566       1.1    bouyer 				    ~(SCNTL3_SCF_MASK << 24);
    567       1.1    bouyer 				sc->targets[target]->id |= scf_period[i].scf
    568       1.1    bouyer 				    << (24 + SCNTL3_SCF_SHIFT);
    569      1.22    bouyer 				if (sync < 25 && /* Ultra */
    570      1.22    bouyer 				    (sc->features & SF_BUS_ULTRA3) == 0)
    571       1.1    bouyer 					sc->targets[target]->id |=
    572       1.1    bouyer 					    SCNTL3_ULTRA << 24;
    573       1.1    bouyer 				else
    574       1.1    bouyer 					sc->targets[target]->id &=
    575       1.1    bouyer 					    ~(SCNTL3_ULTRA << 24);
    576       1.1    bouyer 				sc->targets[target]->id &=
    577       1.7    bouyer 				    ~(SXFER_MO_MASK << 8);
    578       1.1    bouyer 				sc->targets[target]->id |=
    579       1.7    bouyer 				    (offset & SXFER_MO_MASK) << 8;
    580      1.25    bouyer 				sc->targets[target]->id &= ~0xff; /* scntl4 */
    581       1.1    bouyer 				goto end;
    582       1.1    bouyer 			}
    583       1.1    bouyer 		}
    584       1.1    bouyer 		/*
    585       1.1    bouyer 		 * we didn't find it in our table, do async and send reject
    586       1.1    bouyer 		 * msg
    587       1.1    bouyer 		 */
    588       1.1    bouyer reject:
    589       1.1    bouyer 		send_msgout = 1;
    590      1.44     skrll 		tables->t_msgout.count = siop_htoc32(sc, 1);
    591       1.9    bouyer 		tables->msg_out[0] = MSG_MESSAGE_REJECT;
    592       1.1    bouyer 		sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
    593       1.1    bouyer 		sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
    594       1.7    bouyer 		sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
    595      1.25    bouyer 		sc->targets[target]->id &= ~0xff; /* scntl4 */
    596      1.14    bouyer 		siop_target->offset = siop_target->period = 0;
    597       1.1    bouyer 	} else { /* target initiated sync neg */
    598       1.1    bouyer #ifdef DEBUG
    599       1.1    bouyer 		printf("sdtr (target): sync %d offset %d\n", sync, offset);
    600       1.1    bouyer #endif
    601      1.22    bouyer 		if (offset == 0 || sync > sc->st_maxsync) { /* async */
    602       1.1    bouyer 			goto async;
    603       1.1    bouyer 		}
    604      1.22    bouyer 		if (offset > maxoffset)
    605      1.22    bouyer 			offset = maxoffset;
    606      1.22    bouyer 		if (sync < sc->st_minsync)
    607      1.22    bouyer 			sync = sc->st_minsync;
    608       1.1    bouyer 		/* look for sync period */
    609       1.1    bouyer 		for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]);
    610       1.1    bouyer 		    i++) {
    611       1.1    bouyer 			if (sc->clock_period != scf_period[i].clock)
    612       1.1    bouyer 				continue;
    613       1.1    bouyer 			if (scf_period[i].period == sync) {
    614       1.1    bouyer 				/* ok, found it. we now are sync. */
    615      1.14    bouyer 				siop_target->offset = offset;
    616      1.14    bouyer 				siop_target->period = sync;
    617       1.1    bouyer 				sc->targets[target]->id &=
    618       1.1    bouyer 				    ~(SCNTL3_SCF_MASK << 24);
    619       1.1    bouyer 				sc->targets[target]->id |= scf_period[i].scf
    620       1.1    bouyer 				    << (24 + SCNTL3_SCF_SHIFT);
    621      1.22    bouyer 				if (sync < 25 && /* Ultra */
    622      1.22    bouyer 				    (sc->features & SF_BUS_ULTRA3) == 0)
    623       1.1    bouyer 					sc->targets[target]->id |=
    624       1.1    bouyer 					    SCNTL3_ULTRA << 24;
    625       1.1    bouyer 				else
    626       1.1    bouyer 					sc->targets[target]->id &=
    627       1.1    bouyer 					    ~(SCNTL3_ULTRA << 24);
    628       1.1    bouyer 				sc->targets[target]->id &=
    629       1.7    bouyer 				    ~(SXFER_MO_MASK << 8);
    630       1.1    bouyer 				sc->targets[target]->id |=
    631       1.7    bouyer 				    (offset & SXFER_MO_MASK) << 8;
    632      1.25    bouyer 				sc->targets[target]->id &= ~0xff; /* scntl4 */
    633      1.10    bouyer 				siop_sdtr_msg(siop_cmd, 0, sync, offset);
    634       1.1    bouyer 				send_msgout = 1;
    635       1.1    bouyer 				goto end;
    636       1.1    bouyer 			}
    637       1.1    bouyer 		}
    638       1.1    bouyer async:
    639      1.14    bouyer 		siop_target->offset = siop_target->period = 0;
    640       1.1    bouyer 		sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
    641       1.1    bouyer 		sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
    642       1.7    bouyer 		sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
    643      1.25    bouyer 		sc->targets[target]->id &= ~0xff; /* scntl4 */
    644      1.10    bouyer 		siop_sdtr_msg(siop_cmd, 0, 0, 0);
    645       1.1    bouyer 		send_msgout = 1;
    646       1.1    bouyer 	}
    647       1.1    bouyer end:
    648      1.14    bouyer 	if (siop_target->status == TARST_OK)
    649      1.14    bouyer 		siop_update_xfer_mode(sc, target);
    650       1.1    bouyer #ifdef DEBUG
    651       1.1    bouyer 	printf("id now 0x%x\n", sc->targets[target]->id);
    652       1.1    bouyer #endif
    653      1.44     skrll 	tables->id = siop_htoc32(sc, sc->targets[target]->id);
    654       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
    655       1.1    bouyer 	    (sc->targets[target]->id >> 24) & 0xff);
    656       1.7    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
    657       1.1    bouyer 	    (sc->targets[target]->id >> 8) & 0xff);
    658       1.1    bouyer 	if (send_msgout) {
    659       1.1    bouyer 		return SIOP_NEG_MSGOUT;
    660       1.1    bouyer 	} else {
    661       1.1    bouyer 		return SIOP_NEG_ACK;
    662       1.1    bouyer 	}
    663       1.1    bouyer }
    664       1.1    bouyer 
    665       1.1    bouyer void
    666      1.10    bouyer siop_sdtr_msg(siop_cmd, offset, ssync, soff)
    667      1.17    bouyer 	struct siop_common_cmd *siop_cmd;
    668      1.10    bouyer 	int offset;
    669      1.10    bouyer 	int ssync, soff;
    670      1.10    bouyer {
    671      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
    672      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_SDTR_LEN;
    673      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_SDTR;
    674      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
    675      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 4] = soff;
    676      1.17    bouyer 	siop_cmd->siop_tables->t_msgout.count =
    677      1.44     skrll 	    siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_SDTR_LEN + 2);
    678      1.10    bouyer }
    679      1.10    bouyer 
    680      1.10    bouyer void
    681      1.10    bouyer siop_wdtr_msg(siop_cmd, offset, wide)
    682      1.17    bouyer 	struct siop_common_cmd *siop_cmd;
    683      1.10    bouyer 	int offset;
    684      1.39  christos 	int wide;
    685      1.10    bouyer {
    686      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
    687      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_WDTR_LEN;
    688      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_WDTR;
    689      1.17    bouyer 	siop_cmd->siop_tables->msg_out[offset + 3] = wide;
    690      1.17    bouyer 	siop_cmd->siop_tables->t_msgout.count =
    691      1.44     skrll 	    siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_WDTR_LEN + 2);
    692      1.22    bouyer }
    693      1.22    bouyer 
    694      1.22    bouyer void
    695      1.22    bouyer siop_ppr_msg(siop_cmd, offset, ssync, soff)
    696      1.22    bouyer 	struct siop_common_cmd *siop_cmd;
    697      1.22    bouyer 	int offset;
    698      1.22    bouyer 	int ssync, soff;
    699      1.22    bouyer {
    700      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
    701      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_PPR_LEN;
    702      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_PPR;
    703      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
    704      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 4] = 0; /* reserved */
    705      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 5] = soff;
    706      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 6] = 1; /* wide */
    707      1.22    bouyer 	siop_cmd->siop_tables->msg_out[offset + 7] = MSG_EXT_PPR_DT;
    708      1.22    bouyer 	siop_cmd->siop_tables->t_msgout.count =
    709      1.44     skrll 	    siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_PPR_LEN + 2);
    710      1.10    bouyer }
    711      1.10    bouyer 
    712      1.10    bouyer void
    713       1.1    bouyer siop_minphys(bp)
    714       1.1    bouyer 	struct buf *bp;
    715       1.1    bouyer {
    716       1.1    bouyer 	minphys(bp);
    717       1.1    bouyer }
    718       1.1    bouyer 
    719       1.1    bouyer int
    720      1.42  christos siop_ioctl(struct scsipi_channel *chan, u_long cmd, void *arg,
    721      1.41  christos     int flag, struct proc *p)
    722       1.1    bouyer {
    723      1.17    bouyer 	struct siop_common_softc *sc = (void *)chan->chan_adapter->adapt_dev;
    724       1.1    bouyer 
    725       1.1    bouyer 	switch (cmd) {
    726       1.1    bouyer 	case SCBUSIORESET:
    727      1.24    bouyer 		/*
    728      1.24    bouyer 		 * abort the script. This will trigger an interrupt, which will
    729      1.24    bouyer 		 * trigger a bus reset.
    730      1.24    bouyer 		 * We can't safely trigger the reset here as we can't access
    731      1.24    bouyer 		 * the required register while the script is running.
    732      1.24    bouyer 		 */
    733      1.24    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_ABRT);
    734       1.1    bouyer 		return (0);
    735       1.1    bouyer 	default:
    736       1.1    bouyer 		return (ENOTTY);
    737       1.1    bouyer 	}
    738       1.1    bouyer }
    739       1.1    bouyer 
    740       1.1    bouyer void
    741      1.35    bouyer siop_ma(siop_cmd)
    742      1.17    bouyer 	struct siop_common_cmd *siop_cmd;
    743       1.1    bouyer {
    744       1.1    bouyer 	int offset, dbc, sstat;
    745      1.17    bouyer 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    746      1.35    bouyer 	scr_table_t *table; /* table with partial xfer */
    747       1.1    bouyer 
    748      1.35    bouyer 	/*
    749      1.35    bouyer 	 * compute how much of the current table didn't get handled when
    750      1.35    bouyer 	 * a phase mismatch occurs
    751      1.35    bouyer 	 */
    752       1.1    bouyer 	if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
    753       1.1    bouyer 	    == 0)
    754      1.35    bouyer 	    return; /* no valid data transfer */
    755      1.35    bouyer 
    756       1.1    bouyer 	offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
    757       1.1    bouyer 	if (offset >= SIOP_NSG) {
    758      1.45    cegger 		aprint_error_dev(&sc->sc_dev, "bad offset in siop_sdp (%d)\n",
    759      1.45    cegger 		    offset);
    760       1.1    bouyer 		return;
    761       1.1    bouyer 	}
    762      1.17    bouyer 	table = &siop_cmd->siop_tables->data[offset];
    763       1.1    bouyer #ifdef DEBUG_DR
    764      1.35    bouyer 	printf("siop_ma: offset %d count=%d addr=0x%x ", offset,
    765       1.1    bouyer 	    table->count, table->addr);
    766       1.1    bouyer #endif
    767       1.1    bouyer 	dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff;
    768       1.1    bouyer 	if (siop_cmd->xs->xs_control & XS_CTL_DATA_OUT) {
    769      1.13    bouyer 		if (sc->features & SF_CHIP_DFBC) {
    770      1.13    bouyer 			dbc +=
    771      1.13    bouyer 			    bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_DFBC);
    772       1.1    bouyer 		} else {
    773      1.13    bouyer 			/* need to account stale data in FIFO */
    774      1.13    bouyer 			int dfifo =
    775      1.13    bouyer 			    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO);
    776      1.13    bouyer 			if (sc->features & SF_CHIP_FIFO) {
    777      1.13    bouyer 				dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh,
    778      1.13    bouyer 				    SIOP_CTEST5) & CTEST5_BOMASK) << 8;
    779      1.13    bouyer 				dbc += (dfifo - (dbc & 0x3ff)) & 0x3ff;
    780      1.13    bouyer 			} else {
    781      1.13    bouyer 				dbc += (dfifo - (dbc & 0x7f)) & 0x7f;
    782      1.13    bouyer 			}
    783       1.1    bouyer 		}
    784       1.1    bouyer 		sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0);
    785       1.1    bouyer 		if (sstat & SSTAT0_OLF)
    786       1.1    bouyer 			dbc++;
    787      1.13    bouyer 		if ((sstat & SSTAT0_ORF) && (sc->features & SF_CHIP_DFBC) == 0)
    788       1.1    bouyer 			dbc++;
    789       1.9    bouyer 		if (siop_cmd->siop_target->flags & TARF_ISWIDE) {
    790       1.1    bouyer 			sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh,
    791       1.1    bouyer 			    SIOP_SSTAT2);
    792       1.1    bouyer 			if (sstat & SSTAT2_OLF1)
    793       1.1    bouyer 				dbc++;
    794      1.13    bouyer 			if ((sstat & SSTAT2_ORF1) &&
    795      1.13    bouyer 			    (sc->features & SF_CHIP_DFBC) == 0)
    796       1.1    bouyer 				dbc++;
    797       1.1    bouyer 		}
    798       1.1    bouyer 		/* clear the FIFO */
    799       1.1    bouyer 		bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
    800       1.1    bouyer 		    bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) |
    801       1.1    bouyer 		    CTEST3_CLF);
    802       1.1    bouyer 	}
    803      1.35    bouyer 	siop_cmd->flags |= CMDFL_RESID;
    804      1.35    bouyer 	siop_cmd->resid = dbc;
    805      1.35    bouyer }
    806      1.35    bouyer 
    807      1.35    bouyer void
    808      1.35    bouyer siop_sdp(siop_cmd, offset)
    809      1.35    bouyer 	struct siop_common_cmd *siop_cmd;
    810      1.35    bouyer 	int offset;
    811      1.35    bouyer {
    812      1.44     skrll 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    813      1.35    bouyer 	scr_table_t *table;
    814      1.37     perry 
    815      1.35    bouyer 	if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
    816      1.35    bouyer 	    == 0)
    817      1.35    bouyer 	    return; /* no data pointers to save */
    818      1.35    bouyer 
    819      1.35    bouyer 	/*
    820      1.35    bouyer 	 * offset == SIOP_NSG may be a valid condition if we get a Save data
    821      1.35    bouyer 	 * pointer when the xfer is done. Just ignore the Save data pointer
    822      1.35    bouyer 	 * in this case
    823      1.35    bouyer 	 */
    824      1.35    bouyer 	if (offset == SIOP_NSG)
    825      1.35    bouyer 		return;
    826      1.35    bouyer #ifdef DIAGNOSTIC
    827      1.35    bouyer 	if (offset > SIOP_NSG) {
    828      1.35    bouyer 		scsipi_printaddr(siop_cmd->xs->xs_periph);
    829      1.35    bouyer 		printf(": offset %d > %d\n", offset, SIOP_NSG);
    830      1.35    bouyer 		panic("siop_sdp: offset");
    831      1.35    bouyer 	}
    832       1.1    bouyer #endif
    833      1.35    bouyer 	/*
    834      1.35    bouyer 	 * Save data pointer. We do this by adjusting the tables to point
    835      1.37     perry 	 * at the begginning of the data not yet transfered.
    836      1.35    bouyer 	 * offset points to the first table with untransfered data.
    837      1.35    bouyer 	 */
    838      1.35    bouyer 
    839      1.35    bouyer 	/*
    840      1.35    bouyer 	 * before doing that we decrease resid from the ammount of data which
    841      1.35    bouyer 	 * has been transfered.
    842      1.35    bouyer 	 */
    843      1.35    bouyer 	siop_update_resid(siop_cmd, offset);
    844      1.35    bouyer 
    845      1.35    bouyer 	/*
    846      1.35    bouyer 	 * First let see if we have a resid from a phase mismatch. If so,
    847      1.35    bouyer 	 * we have to adjst the table at offset to remove transfered data.
    848      1.35    bouyer 	 */
    849      1.35    bouyer 	if (siop_cmd->flags & CMDFL_RESID) {
    850      1.35    bouyer 		siop_cmd->flags &= ~CMDFL_RESID;
    851      1.35    bouyer 		table = &siop_cmd->siop_tables->data[offset];
    852      1.35    bouyer 		/* "cut" already transfered data from this table */
    853      1.35    bouyer 		table->addr =
    854      1.44     skrll 		    siop_htoc32(sc, siop_ctoh32(sc, table->addr) +
    855      1.44     skrll 		    siop_ctoh32(sc, table->count) - siop_cmd->resid);
    856      1.44     skrll 		table->count = siop_htoc32(sc, siop_cmd->resid);
    857      1.35    bouyer 	}
    858      1.35    bouyer 
    859      1.35    bouyer 	/*
    860      1.35    bouyer 	 * now we can remove entries which have been transfered.
    861      1.35    bouyer 	 * We just move the entries with data left at the beggining of the
    862      1.35    bouyer 	 * tables
    863      1.35    bouyer 	 */
    864      1.35    bouyer 	memmove(&siop_cmd->siop_tables->data[0],
    865      1.35    bouyer 	    &siop_cmd->siop_tables->data[offset],
    866      1.35    bouyer 	    (SIOP_NSG - offset) * sizeof(scr_table_t));
    867      1.35    bouyer }
    868      1.35    bouyer 
    869      1.35    bouyer void
    870      1.35    bouyer siop_update_resid(siop_cmd, offset)
    871      1.35    bouyer 	struct siop_common_cmd *siop_cmd;
    872      1.35    bouyer 	int offset;
    873      1.35    bouyer {
    874      1.44     skrll 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    875      1.35    bouyer 	scr_table_t *table;
    876      1.35    bouyer 	int i;
    877      1.35    bouyer 
    878      1.35    bouyer 	if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
    879      1.35    bouyer 	    == 0)
    880      1.35    bouyer 	    return; /* no data to transfer */
    881      1.35    bouyer 
    882      1.35    bouyer 	/*
    883      1.35    bouyer 	 * update resid. First account for the table entries which have
    884      1.35    bouyer 	 * been fully completed.
    885      1.35    bouyer 	 */
    886      1.35    bouyer 	for (i = 0; i < offset; i++)
    887      1.35    bouyer 		siop_cmd->xs->resid -=
    888      1.44     skrll 		    siop_ctoh32(sc, siop_cmd->siop_tables->data[i].count);
    889      1.35    bouyer 	/*
    890      1.35    bouyer 	 * if CMDFL_RESID is set, the last table (pointed by offset) is a
    891      1.35    bouyer 	 * partial transfers. If not, offset points to the entry folloing
    892      1.35    bouyer 	 * the last full transfer.
    893      1.35    bouyer 	 */
    894      1.35    bouyer 	if (siop_cmd->flags & CMDFL_RESID) {
    895      1.35    bouyer 		table = &siop_cmd->siop_tables->data[offset];
    896      1.44     skrll 		siop_cmd->xs->resid -=
    897      1.44     skrll 		    siop_ctoh32(sc, table->count) - siop_cmd->resid;
    898      1.35    bouyer 	}
    899       1.1    bouyer }
    900       1.1    bouyer 
    901      1.36    bouyer int
    902      1.36    bouyer siop_iwr(siop_cmd)
    903      1.36    bouyer 	struct siop_common_cmd *siop_cmd;
    904      1.36    bouyer {
    905      1.36    bouyer 	int offset;
    906      1.36    bouyer 	scr_table_t *table; /* table with IWR */
    907      1.36    bouyer 	struct siop_common_softc *sc = siop_cmd->siop_sc;
    908      1.36    bouyer 	/* handle ignore wide residue messages */
    909      1.36    bouyer 
    910      1.36    bouyer 	/* if target isn't wide, reject */
    911      1.36    bouyer 	if ((siop_cmd->siop_target->flags & TARF_ISWIDE) == 0) {
    912      1.44     skrll 		siop_cmd->siop_tables->t_msgout.count = siop_htoc32(sc, 1);
    913      1.36    bouyer 		siop_cmd->siop_tables->msg_out[0] = MSG_MESSAGE_REJECT;
    914      1.36    bouyer 		return SIOP_NEG_MSGOUT;
    915      1.36    bouyer 	}
    916      1.36    bouyer 	/* get index of current command in table */
    917      1.36    bouyer 	offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
    918      1.36    bouyer 	/*
    919      1.36    bouyer 	 * if the current table did complete, we're now pointing at the
    920      1.36    bouyer 	 * next one. Go back one if we didn't see a phase mismatch.
    921      1.36    bouyer 	 */
    922      1.36    bouyer 	if ((siop_cmd->flags & CMDFL_RESID) == 0)
    923      1.36    bouyer 		offset--;
    924      1.36    bouyer 	table = &siop_cmd->siop_tables->data[offset];
    925      1.36    bouyer 
    926      1.36    bouyer 	if ((siop_cmd->flags & CMDFL_RESID) == 0) {
    927      1.44     skrll 		if (siop_ctoh32(sc, table->count) & 1) {
    928      1.36    bouyer 			/* we really got the number of bytes we expected */
    929      1.36    bouyer 			return SIOP_NEG_ACK;
    930      1.36    bouyer 		} else {
    931      1.36    bouyer 			/*
    932      1.36    bouyer 			 * now we really had a short xfer, by one byte.
    933      1.36    bouyer 			 * handle it just as if we had a phase mistmatch
    934      1.36    bouyer 			 * (there is a resid of one for this table).
    935      1.36    bouyer 			 * Update scratcha1 to reflect the fact that
    936      1.36    bouyer 			 * this xfer isn't complete.
    937      1.36    bouyer 			 */
    938      1.36    bouyer 			 siop_cmd->flags |= CMDFL_RESID;
    939      1.36    bouyer 			 siop_cmd->resid = 1;
    940      1.36    bouyer 			 bus_space_write_1(sc->sc_rt, sc->sc_rh,
    941      1.36    bouyer 			     SIOP_SCRATCHA + 1, offset);
    942      1.36    bouyer 			 return SIOP_NEG_ACK;
    943      1.36    bouyer 		}
    944      1.36    bouyer 	} else {
    945      1.36    bouyer 		/*
    946      1.36    bouyer 		 * we already have a short xfer for this table; it's
    947      1.36    bouyer 		 * just one byte less than we though it was
    948      1.36    bouyer 		 */
    949      1.36    bouyer 		siop_cmd->resid--;
    950      1.36    bouyer 		return SIOP_NEG_ACK;
    951      1.36    bouyer 	}
    952      1.36    bouyer }
    953      1.36    bouyer 
    954       1.1    bouyer void
    955       1.1    bouyer siop_clearfifo(sc)
    956      1.17    bouyer 	struct siop_common_softc *sc;
    957       1.1    bouyer {
    958       1.1    bouyer 	int timeout = 0;
    959       1.1    bouyer 	int ctest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3);
    960       1.1    bouyer 
    961       1.1    bouyer #ifdef DEBUG_INTR
    962       1.1    bouyer 	printf("DMA fifo not empty !\n");
    963       1.1    bouyer #endif
    964       1.1    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
    965       1.1    bouyer 	    ctest3 | CTEST3_CLF);
    966       1.1    bouyer 	while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) &
    967       1.1    bouyer 	    CTEST3_CLF) != 0) {
    968       1.1    bouyer 		delay(1);
    969       1.1    bouyer 		if (++timeout > 1000) {
    970       1.1    bouyer 			printf("clear fifo failed\n");
    971       1.1    bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
    972       1.1    bouyer 			    bus_space_read_1(sc->sc_rt, sc->sc_rh,
    973       1.1    bouyer 			    SIOP_CTEST3) & ~CTEST3_CLF);
    974       1.1    bouyer 			return;
    975       1.1    bouyer 		}
    976       1.1    bouyer 	}
    977       1.3    bouyer }
    978       1.3    bouyer 
    979       1.3    bouyer int
    980       1.3    bouyer siop_modechange(sc)
    981      1.17    bouyer 	struct siop_common_softc *sc;
    982       1.3    bouyer {
    983       1.3    bouyer 	int retry;
    984      1.27    bouyer 	int sist0, sist1, stest2;
    985       1.3    bouyer 	for (retry = 0; retry < 5; retry++) {
    986       1.3    bouyer 		/*
    987       1.3    bouyer 		 * datasheet says to wait 100ms and re-read SIST1,
    988      1.14    bouyer 		 * to check that DIFFSENSE is stable.
    989       1.3    bouyer 		 * We may delay() 5 times for  100ms at interrupt time;
    990       1.3    bouyer 		 * hopefully this will not happen often.
    991       1.3    bouyer 		 */
    992       1.3    bouyer 		delay(100000);
    993       1.3    bouyer 		sist0 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST0);
    994       1.3    bouyer 		sist1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST1);
    995       1.3    bouyer 		if (sist1 & SIEN1_SBMC)
    996       1.3    bouyer 			continue; /* we got an irq again */
    997      1.27    bouyer 		sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
    998       1.3    bouyer 		    STEST4_MODE_MASK;
    999       1.3    bouyer 		stest2 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2);
   1000      1.27    bouyer 		switch(sc->mode) {
   1001       1.3    bouyer 		case STEST4_MODE_DIF:
   1002       1.3    bouyer 			printf("%s: switching to differential mode\n",
   1003      1.45    cegger 			    device_xname(&sc->sc_dev));
   1004       1.3    bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
   1005       1.3    bouyer 			    stest2 | STEST2_DIF);
   1006       1.3    bouyer 			break;
   1007       1.3    bouyer 		case STEST4_MODE_SE:
   1008       1.3    bouyer 			printf("%s: switching to single-ended mode\n",
   1009      1.45    cegger 			    device_xname(&sc->sc_dev));
   1010       1.3    bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
   1011       1.3    bouyer 			    stest2 & ~STEST2_DIF);
   1012       1.3    bouyer 			break;
   1013       1.3    bouyer 		case STEST4_MODE_LVD:
   1014       1.3    bouyer 			printf("%s: switching to LVD mode\n",
   1015      1.45    cegger 			    device_xname(&sc->sc_dev));
   1016       1.3    bouyer 			bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
   1017       1.3    bouyer 			    stest2 & ~STEST2_DIF);
   1018       1.3    bouyer 			break;
   1019       1.3    bouyer 		default:
   1020      1.45    cegger 			aprint_error_dev(&sc->sc_dev, "invalid SCSI mode 0x%x\n",
   1021      1.45    cegger 			    sc->mode);
   1022       1.3    bouyer 			return 0;
   1023       1.3    bouyer 		}
   1024       1.3    bouyer 		return 1;
   1025       1.3    bouyer 	}
   1026       1.3    bouyer 	printf("%s: timeout waiting for DIFFSENSE to stabilise\n",
   1027      1.45    cegger 	    device_xname(&sc->sc_dev));
   1028       1.3    bouyer 	return 0;
   1029       1.6    bouyer }
   1030       1.6    bouyer 
   1031       1.6    bouyer void
   1032       1.6    bouyer siop_resetbus(sc)
   1033      1.17    bouyer 	struct siop_common_softc *sc;
   1034       1.6    bouyer {
   1035       1.6    bouyer 	int scntl1;
   1036       1.6    bouyer 	scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
   1037       1.6    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
   1038       1.6    bouyer 	    scntl1 | SCNTL1_RST);
   1039       1.6    bouyer 	/* minimum 25 us, more time won't hurt */
   1040       1.6    bouyer 	delay(100);
   1041       1.6    bouyer 	bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
   1042      1.17    bouyer }
   1043      1.17    bouyer 
   1044      1.17    bouyer void
   1045      1.17    bouyer siop_update_xfer_mode(sc, target)
   1046      1.17    bouyer 	struct siop_common_softc *sc;
   1047      1.17    bouyer 	int target;
   1048      1.17    bouyer {
   1049      1.17    bouyer 	struct siop_common_target *siop_target = sc->targets[target];
   1050      1.17    bouyer 	struct scsipi_xfer_mode xm;
   1051      1.17    bouyer 
   1052      1.17    bouyer 	xm.xm_target = target;
   1053      1.17    bouyer 	xm.xm_mode = 0;
   1054      1.17    bouyer 	xm.xm_period = 0;
   1055      1.17    bouyer 	xm.xm_offset = 0;
   1056      1.26    bouyer 
   1057      1.17    bouyer 
   1058      1.17    bouyer 	if (siop_target->flags & TARF_ISWIDE)
   1059      1.17    bouyer 		xm.xm_mode |= PERIPH_CAP_WIDE16;
   1060      1.17    bouyer 	if (siop_target->period) {
   1061      1.17    bouyer 		xm.xm_period = siop_target->period;
   1062      1.17    bouyer 		xm.xm_offset = siop_target->offset;
   1063      1.17    bouyer 		xm.xm_mode |= PERIPH_CAP_SYNC;
   1064      1.17    bouyer 	}
   1065      1.28    bouyer 	if (siop_target->flags & TARF_TAG) {
   1066      1.28    bouyer 	/* 1010 workaround: can't do disconnect if not wide, so can't do tag */
   1067      1.28    bouyer 		if ((sc->features & SF_CHIP_GEBUG) == 0 ||
   1068      1.28    bouyer 		    (sc->targets[target]->flags & TARF_ISWIDE))
   1069      1.28    bouyer 			xm.xm_mode |= PERIPH_CAP_TQING;
   1070      1.28    bouyer 	}
   1071      1.28    bouyer 
   1072      1.17    bouyer 	scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_XFER_MODE, &xm);
   1073       1.1    bouyer }
   1074