siop_common.c revision 1.52 1 1.52 bouyer /* $NetBSD: siop_common.c,v 1.52 2009/10/19 18:41:13 bouyer Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.22 bouyer * Copyright (c) 2000, 2002 Manuel Bouyer.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer *
15 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 1.37 perry * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 1.1 bouyer *
26 1.1 bouyer */
27 1.1 bouyer
28 1.1 bouyer /* SYM53c7/8xx PCI-SCSI I/O Processors driver */
29 1.15 lukem
30 1.15 lukem #include <sys/cdefs.h>
31 1.52 bouyer __KERNEL_RCSID(0, "$NetBSD: siop_common.c,v 1.52 2009/10/19 18:41:13 bouyer Exp $");
32 1.1 bouyer
33 1.1 bouyer #include <sys/param.h>
34 1.1 bouyer #include <sys/systm.h>
35 1.1 bouyer #include <sys/device.h>
36 1.1 bouyer #include <sys/malloc.h>
37 1.1 bouyer #include <sys/buf.h>
38 1.1 bouyer #include <sys/kernel.h>
39 1.1 bouyer #include <sys/scsiio.h>
40 1.1 bouyer
41 1.22 bouyer #include <uvm/uvm_extern.h>
42 1.22 bouyer
43 1.1 bouyer #include <machine/endian.h>
44 1.43 ad #include <sys/bus.h>
45 1.1 bouyer
46 1.1 bouyer #include <dev/scsipi/scsi_all.h>
47 1.1 bouyer #include <dev/scsipi/scsi_message.h>
48 1.1 bouyer #include <dev/scsipi/scsipi_all.h>
49 1.1 bouyer
50 1.1 bouyer #include <dev/scsipi/scsiconf.h>
51 1.1 bouyer
52 1.1 bouyer #include <dev/ic/siopreg.h>
53 1.1 bouyer #include <dev/ic/siopvar_common.h>
54 1.1 bouyer
55 1.16 bouyer #include "opt_siop.h"
56 1.16 bouyer
57 1.2 bouyer #undef DEBUG
58 1.2 bouyer #undef DEBUG_DR
59 1.22 bouyer #undef DEBUG_NEG
60 1.22 bouyer
61 1.22 bouyer int
62 1.47 dsl siop_common_attach(struct siop_common_softc *sc)
63 1.22 bouyer {
64 1.22 bouyer int error, i;
65 1.22 bouyer bus_dma_segment_t seg;
66 1.22 bouyer int rseg;
67 1.22 bouyer
68 1.22 bouyer /*
69 1.22 bouyer * Allocate DMA-safe memory for the script and map it.
70 1.22 bouyer */
71 1.22 bouyer if ((sc->features & SF_CHIP_RAM) == 0) {
72 1.37 perry error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE,
73 1.22 bouyer PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT);
74 1.22 bouyer if (error) {
75 1.51 tsutsui aprint_error_dev(sc->sc_dev,
76 1.45 cegger "unable to allocate script DMA memory, "
77 1.45 cegger "error = %d\n", error);
78 1.22 bouyer return error;
79 1.22 bouyer }
80 1.22 bouyer error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE,
81 1.42 christos (void **)&sc->sc_script,
82 1.22 bouyer BUS_DMA_NOWAIT|BUS_DMA_COHERENT);
83 1.22 bouyer if (error) {
84 1.50 tsutsui aprint_error_dev(sc->sc_dev,
85 1.50 tsutsui "unable to map script DMA memory, "
86 1.45 cegger "error = %d\n", error);
87 1.22 bouyer return error;
88 1.22 bouyer }
89 1.22 bouyer error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1,
90 1.22 bouyer PAGE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma);
91 1.22 bouyer if (error) {
92 1.50 tsutsui aprint_error_dev(sc->sc_dev,
93 1.50 tsutsui "unable to create script DMA map, "
94 1.45 cegger "error = %d\n", error);
95 1.22 bouyer return error;
96 1.22 bouyer }
97 1.22 bouyer error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma,
98 1.22 bouyer sc->sc_script, PAGE_SIZE, NULL, BUS_DMA_NOWAIT);
99 1.22 bouyer if (error) {
100 1.50 tsutsui aprint_error_dev(sc->sc_dev,
101 1.50 tsutsui "unable to load script DMA map, "
102 1.45 cegger "error = %d\n", error);
103 1.22 bouyer return error;
104 1.22 bouyer }
105 1.22 bouyer sc->sc_scriptaddr =
106 1.22 bouyer sc->sc_scriptdma->dm_segs[0].ds_addr;
107 1.22 bouyer sc->ram_size = PAGE_SIZE;
108 1.22 bouyer }
109 1.22 bouyer
110 1.49 tsutsui sc->sc_adapt.adapt_dev = sc->sc_dev;
111 1.22 bouyer sc->sc_adapt.adapt_nchannels = 1;
112 1.22 bouyer sc->sc_adapt.adapt_openings = 0;
113 1.22 bouyer sc->sc_adapt.adapt_ioctl = siop_ioctl;
114 1.22 bouyer sc->sc_adapt.adapt_minphys = minphys;
115 1.22 bouyer
116 1.22 bouyer memset(&sc->sc_chan, 0, sizeof(sc->sc_chan));
117 1.22 bouyer sc->sc_chan.chan_adapter = &sc->sc_adapt;
118 1.22 bouyer sc->sc_chan.chan_bustype = &scsi_bustype;
119 1.22 bouyer sc->sc_chan.chan_channel = 0;
120 1.22 bouyer sc->sc_chan.chan_flags = SCSIPI_CHAN_CANGROW;
121 1.22 bouyer sc->sc_chan.chan_ntargets =
122 1.22 bouyer (sc->features & SF_BUS_WIDE) ? 16 : 8;
123 1.22 bouyer sc->sc_chan.chan_nluns = 8;
124 1.22 bouyer sc->sc_chan.chan_id =
125 1.22 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCID);
126 1.22 bouyer if (sc->sc_chan.chan_id == 0 ||
127 1.22 bouyer sc->sc_chan.chan_id >= sc->sc_chan.chan_ntargets)
128 1.22 bouyer sc->sc_chan.chan_id = SIOP_DEFAULT_TARGET;
129 1.22 bouyer
130 1.22 bouyer for (i = 0; i < 16; i++)
131 1.22 bouyer sc->targets[i] = NULL;
132 1.22 bouyer
133 1.22 bouyer /* find min/max sync period for this chip */
134 1.22 bouyer sc->st_maxsync = 0;
135 1.22 bouyer sc->dt_maxsync = 0;
136 1.22 bouyer sc->st_minsync = 255;
137 1.22 bouyer sc->dt_minsync = 255;
138 1.50 tsutsui for (i = 0; i < __arraycount(scf_period); i++) {
139 1.22 bouyer if (sc->clock_period != scf_period[i].clock)
140 1.22 bouyer continue;
141 1.22 bouyer if (sc->st_maxsync < scf_period[i].period)
142 1.22 bouyer sc->st_maxsync = scf_period[i].period;
143 1.22 bouyer if (sc->st_minsync > scf_period[i].period)
144 1.22 bouyer sc->st_minsync = scf_period[i].period;
145 1.22 bouyer }
146 1.22 bouyer if (sc->st_maxsync == 255 || sc->st_minsync == 0)
147 1.31 provos panic("siop: can't find my sync parameters");
148 1.50 tsutsui for (i = 0; i < __arraycount(dt_scf_period); i++) {
149 1.22 bouyer if (sc->clock_period != dt_scf_period[i].clock)
150 1.22 bouyer continue;
151 1.22 bouyer if (sc->dt_maxsync < dt_scf_period[i].period)
152 1.22 bouyer sc->dt_maxsync = dt_scf_period[i].period;
153 1.22 bouyer if (sc->dt_minsync > dt_scf_period[i].period)
154 1.22 bouyer sc->dt_minsync = dt_scf_period[i].period;
155 1.22 bouyer }
156 1.22 bouyer if (sc->dt_maxsync == 255 || sc->dt_minsync == 0)
157 1.31 provos panic("siop: can't find my sync parameters");
158 1.22 bouyer return 0;
159 1.22 bouyer }
160 1.1 bouyer
161 1.1 bouyer void
162 1.47 dsl siop_common_reset(struct siop_common_softc *sc)
163 1.1 bouyer {
164 1.46 kiyohara u_int32_t stest1, stest3;
165 1.1 bouyer
166 1.1 bouyer /* reset the chip */
167 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST);
168 1.1 bouyer delay(1000);
169 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, 0);
170 1.1 bouyer
171 1.1 bouyer /* init registers */
172 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL0,
173 1.1 bouyer SCNTL0_ARB_MASK | SCNTL0_EPC | SCNTL0_AAP);
174 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 0);
175 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, sc->clock_div);
176 1.7 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 0);
177 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DIEN, 0xff);
178 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN0,
179 1.1 bouyer 0xff & ~(SIEN0_CMP | SIEN0_SEL | SIEN0_RSL));
180 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN1,
181 1.1 bouyer 0xff & ~(SIEN1_HTH | SIEN1_GEN));
182 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 0);
183 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, STEST3_TE);
184 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0,
185 1.1 bouyer (0xb << STIME0_SEL_SHIFT));
186 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCID,
187 1.14 bouyer sc->sc_chan.chan_id | SCID_RRE);
188 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_RESPID0,
189 1.14 bouyer 1 << sc->sc_chan.chan_id);
190 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL,
191 1.1 bouyer (sc->features & SF_CHIP_PF) ? DCNTL_COM | DCNTL_PFEN : DCNTL_COM);
192 1.33 bouyer if (sc->features & SF_CHIP_AAIP)
193 1.33 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh,
194 1.33 bouyer SIOP_AIPCNTL1, AIPCNTL1_DIS);
195 1.1 bouyer
196 1.1 bouyer /* enable clock doubler or quadruler if appropriate */
197 1.1 bouyer if (sc->features & (SF_CHIP_DBLR | SF_CHIP_QUAD)) {
198 1.1 bouyer stest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3);
199 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
200 1.1 bouyer STEST1_DBLEN);
201 1.1 bouyer if (sc->features & SF_CHIP_QUAD) {
202 1.1 bouyer /* wait for PPL to lock */
203 1.1 bouyer while ((bus_space_read_1(sc->sc_rt, sc->sc_rh,
204 1.1 bouyer SIOP_STEST4) & STEST4_LOCK) == 0)
205 1.1 bouyer delay(10);
206 1.1 bouyer } else {
207 1.1 bouyer /* data sheet says 20us - more won't hurt */
208 1.1 bouyer delay(100);
209 1.1 bouyer }
210 1.1 bouyer /* halt scsi clock, select doubler/quad, restart clock */
211 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3,
212 1.1 bouyer stest3 | STEST3_HSC);
213 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1,
214 1.1 bouyer STEST1_DBLEN | STEST1_DBLSEL);
215 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, stest3);
216 1.1 bouyer } else {
217 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 0);
218 1.1 bouyer }
219 1.46 kiyohara
220 1.46 kiyohara if (sc->features & SF_CHIP_USEPCIC) {
221 1.46 kiyohara stest1 = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_STEST1);
222 1.46 kiyohara stest1 |= STEST1_SCLK;
223 1.46 kiyohara bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, stest1);
224 1.46 kiyohara }
225 1.46 kiyohara
226 1.1 bouyer if (sc->features & SF_CHIP_FIFO)
227 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5,
228 1.1 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5) |
229 1.1 bouyer CTEST5_DFS);
230 1.21 bouyer if (sc->features & SF_CHIP_LED0) {
231 1.21 bouyer /* Set GPIO0 as output if software LED control is required */
232 1.21 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL,
233 1.21 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL) & 0xfe);
234 1.21 bouyer }
235 1.22 bouyer if (sc->features & SF_BUS_ULTRA3) {
236 1.22 bouyer /* reset SCNTL4 */
237 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4, 0);
238 1.22 bouyer }
239 1.27 bouyer sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
240 1.27 bouyer STEST4_MODE_MASK;
241 1.30 bouyer
242 1.30 bouyer /*
243 1.30 bouyer * initialise the RAM. Without this we may get scsi gross errors on
244 1.30 bouyer * the 1010
245 1.30 bouyer */
246 1.30 bouyer if (sc->features & SF_CHIP_RAM)
247 1.30 bouyer bus_space_set_region_4(sc->sc_ramt, sc->sc_ramh,
248 1.30 bouyer 0, 0, sc->ram_size / 4);
249 1.1 bouyer sc->sc_reset(sc);
250 1.1 bouyer }
251 1.1 bouyer
252 1.10 bouyer /* prepare tables before sending a cmd */
253 1.10 bouyer void
254 1.47 dsl siop_setuptables(struct siop_common_cmd *siop_cmd)
255 1.10 bouyer {
256 1.10 bouyer int i;
257 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
258 1.10 bouyer struct scsipi_xfer *xs = siop_cmd->xs;
259 1.14 bouyer int target = xs->xs_periph->periph_target;
260 1.14 bouyer int lun = xs->xs_periph->periph_lun;
261 1.14 bouyer int msgoffset = 1;
262 1.10 bouyer
263 1.44 skrll siop_cmd->siop_tables->id = siop_htoc32(sc, sc->targets[target]->id);
264 1.22 bouyer memset(siop_cmd->siop_tables->msg_out, 0,
265 1.22 bouyer sizeof(siop_cmd->siop_tables->msg_out));
266 1.14 bouyer /* request sense doesn't disconnect */
267 1.14 bouyer if (xs->xs_control & XS_CTL_REQSENSE)
268 1.17 bouyer siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0);
269 1.26 bouyer else if ((sc->features & SF_CHIP_GEBUG) &&
270 1.26 bouyer (sc->targets[target]->flags & TARF_ISWIDE) == 0)
271 1.26 bouyer /*
272 1.26 bouyer * 1010 bug: it seems that the 1010 has problems with reselect
273 1.26 bouyer * when not in wide mode (generate false SCSI gross error).
274 1.26 bouyer * The FreeBSD sym driver has comments about it but their
275 1.26 bouyer * workaround (disable SCSI gross error reporting) doesn't
276 1.26 bouyer * work with my adapter. So disable disconnect when not
277 1.26 bouyer * wide.
278 1.26 bouyer */
279 1.26 bouyer siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0);
280 1.14 bouyer else
281 1.17 bouyer siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 1);
282 1.14 bouyer if (xs->xs_tag_type != 0) {
283 1.14 bouyer if ((sc->targets[target]->flags & TARF_TAG) == 0) {
284 1.14 bouyer scsipi_printaddr(xs->xs_periph);
285 1.14 bouyer printf(": tagged command type %d id %d\n",
286 1.14 bouyer siop_cmd->xs->xs_tag_type, siop_cmd->xs->xs_tag_id);
287 1.31 provos panic("tagged command for non-tagging device");
288 1.14 bouyer }
289 1.14 bouyer siop_cmd->flags |= CMDFL_TAG;
290 1.17 bouyer siop_cmd->siop_tables->msg_out[1] = siop_cmd->xs->xs_tag_type;
291 1.19 bouyer /*
292 1.19 bouyer * use siop_cmd->tag not xs->xs_tag_id, caller may want a
293 1.19 bouyer * different one
294 1.19 bouyer */
295 1.19 bouyer siop_cmd->siop_tables->msg_out[2] = siop_cmd->tag;
296 1.14 bouyer msgoffset = 3;
297 1.20 bouyer }
298 1.44 skrll siop_cmd->siop_tables->t_msgout.count = siop_htoc32(sc, msgoffset);
299 1.10 bouyer if (sc->targets[target]->status == TARST_ASYNC) {
300 1.27 bouyer if ((sc->targets[target]->flags & TARF_DT) &&
301 1.50 tsutsui (sc->mode == STEST4_MODE_LVD)) {
302 1.22 bouyer sc->targets[target]->status = TARST_PPR_NEG;
303 1.50 tsutsui siop_ppr_msg(siop_cmd, msgoffset, sc->dt_minsync,
304 1.22 bouyer sc->maxoff);
305 1.22 bouyer } else if (sc->targets[target]->flags & TARF_WIDE) {
306 1.10 bouyer sc->targets[target]->status = TARST_WIDE_NEG;
307 1.14 bouyer siop_wdtr_msg(siop_cmd, msgoffset,
308 1.14 bouyer MSG_EXT_WDTR_BUS_16_BIT);
309 1.10 bouyer } else if (sc->targets[target]->flags & TARF_SYNC) {
310 1.10 bouyer sc->targets[target]->status = TARST_SYNC_NEG;
311 1.22 bouyer siop_sdtr_msg(siop_cmd, msgoffset, sc->st_minsync,
312 1.22 bouyer (sc->maxoff > 31) ? 31 : sc->maxoff);
313 1.10 bouyer } else {
314 1.10 bouyer sc->targets[target]->status = TARST_OK;
315 1.14 bouyer siop_update_xfer_mode(sc, target);
316 1.10 bouyer }
317 1.10 bouyer }
318 1.17 bouyer siop_cmd->siop_tables->status =
319 1.44 skrll siop_htoc32(sc, SCSI_SIOP_NOSTATUS); /* set invalid status */
320 1.10 bouyer
321 1.17 bouyer siop_cmd->siop_tables->cmd.count =
322 1.44 skrll siop_htoc32(sc, siop_cmd->dmamap_cmd->dm_segs[0].ds_len);
323 1.17 bouyer siop_cmd->siop_tables->cmd.addr =
324 1.44 skrll siop_htoc32(sc, siop_cmd->dmamap_cmd->dm_segs[0].ds_addr);
325 1.14 bouyer if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) {
326 1.10 bouyer for (i = 0; i < siop_cmd->dmamap_data->dm_nsegs; i++) {
327 1.17 bouyer siop_cmd->siop_tables->data[i].count =
328 1.44 skrll siop_htoc32(sc,
329 1.44 skrll siop_cmd->dmamap_data->dm_segs[i].ds_len);
330 1.17 bouyer siop_cmd->siop_tables->data[i].addr =
331 1.44 skrll siop_htoc32(sc,
332 1.44 skrll siop_cmd->dmamap_data->dm_segs[i].ds_addr);
333 1.10 bouyer }
334 1.10 bouyer }
335 1.10 bouyer }
336 1.10 bouyer
337 1.1 bouyer int
338 1.47 dsl siop_wdtr_neg(struct siop_common_cmd *siop_cmd)
339 1.1 bouyer {
340 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
341 1.17 bouyer struct siop_common_target *siop_target = siop_cmd->siop_target;
342 1.14 bouyer int target = siop_cmd->xs->xs_periph->periph_target;
343 1.17 bouyer struct siop_common_xfer *tables = siop_cmd->siop_tables;
344 1.1 bouyer
345 1.1 bouyer if (siop_target->status == TARST_WIDE_NEG) {
346 1.1 bouyer /* we initiated wide negotiation */
347 1.9 bouyer switch (tables->msg_in[3]) {
348 1.1 bouyer case MSG_EXT_WDTR_BUS_8_BIT:
349 1.9 bouyer siop_target->flags &= ~TARF_ISWIDE;
350 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
351 1.1 bouyer break;
352 1.1 bouyer case MSG_EXT_WDTR_BUS_16_BIT:
353 1.9 bouyer if (siop_target->flags & TARF_WIDE) {
354 1.9 bouyer siop_target->flags |= TARF_ISWIDE;
355 1.1 bouyer sc->targets[target]->id |= (SCNTL3_EWS << 24);
356 1.1 bouyer break;
357 1.1 bouyer }
358 1.38 tsutsui /* FALLTHROUGH */
359 1.1 bouyer default:
360 1.1 bouyer /*
361 1.51 tsutsui * hum, we got more than what we can handle, shouldn't
362 1.1 bouyer * happen. Reject, and stay async
363 1.1 bouyer */
364 1.9 bouyer siop_target->flags &= ~TARF_ISWIDE;
365 1.1 bouyer siop_target->status = TARST_OK;
366 1.14 bouyer siop_target->offset = siop_target->period = 0;
367 1.14 bouyer siop_update_xfer_mode(sc, target);
368 1.1 bouyer printf("%s: rejecting invalid wide negotiation from "
369 1.50 tsutsui "target %d (%d)\n", device_xname(sc->sc_dev),
370 1.50 tsutsui target,
371 1.9 bouyer tables->msg_in[3]);
372 1.44 skrll tables->t_msgout.count = siop_htoc32(sc, 1);
373 1.9 bouyer tables->msg_out[0] = MSG_MESSAGE_REJECT;
374 1.1 bouyer return SIOP_NEG_MSGOUT;
375 1.1 bouyer }
376 1.44 skrll tables->id = siop_htoc32(sc, sc->targets[target]->id);
377 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh,
378 1.1 bouyer SIOP_SCNTL3,
379 1.1 bouyer (sc->targets[target]->id >> 24) & 0xff);
380 1.1 bouyer /* we now need to do sync */
381 1.9 bouyer if (siop_target->flags & TARF_SYNC) {
382 1.6 bouyer siop_target->status = TARST_SYNC_NEG;
383 1.22 bouyer siop_sdtr_msg(siop_cmd, 0, sc->st_minsync,
384 1.22 bouyer (sc->maxoff > 31) ? 31 : sc->maxoff);
385 1.6 bouyer return SIOP_NEG_MSGOUT;
386 1.6 bouyer } else {
387 1.6 bouyer siop_target->status = TARST_OK;
388 1.14 bouyer siop_update_xfer_mode(sc, target);
389 1.6 bouyer return SIOP_NEG_ACK;
390 1.6 bouyer }
391 1.1 bouyer } else {
392 1.1 bouyer /* target initiated wide negotiation */
393 1.9 bouyer if (tables->msg_in[3] >= MSG_EXT_WDTR_BUS_16_BIT
394 1.9 bouyer && (siop_target->flags & TARF_WIDE)) {
395 1.9 bouyer siop_target->flags |= TARF_ISWIDE;
396 1.1 bouyer sc->targets[target]->id |= SCNTL3_EWS << 24;
397 1.1 bouyer } else {
398 1.9 bouyer siop_target->flags &= ~TARF_ISWIDE;
399 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_EWS << 24);
400 1.1 bouyer }
401 1.44 skrll tables->id = siop_htoc32(sc, sc->targets[target]->id);
402 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
403 1.1 bouyer (sc->targets[target]->id >> 24) & 0xff);
404 1.1 bouyer /*
405 1.1 bouyer * we did reset wide parameters, so fall back to async,
406 1.8 bouyer * but don't schedule a sync neg, target should initiate it
407 1.1 bouyer */
408 1.1 bouyer siop_target->status = TARST_OK;
409 1.14 bouyer siop_target->offset = siop_target->period = 0;
410 1.14 bouyer siop_update_xfer_mode(sc, target);
411 1.10 bouyer siop_wdtr_msg(siop_cmd, 0, (siop_target->flags & TARF_ISWIDE) ?
412 1.10 bouyer MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT);
413 1.1 bouyer return SIOP_NEG_MSGOUT;
414 1.1 bouyer }
415 1.1 bouyer }
416 1.1 bouyer
417 1.1 bouyer int
418 1.47 dsl siop_ppr_neg(struct siop_common_cmd *siop_cmd)
419 1.22 bouyer {
420 1.22 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
421 1.22 bouyer struct siop_common_target *siop_target = siop_cmd->siop_target;
422 1.22 bouyer int target = siop_cmd->xs->xs_periph->periph_target;
423 1.22 bouyer struct siop_common_xfer *tables = siop_cmd->siop_tables;
424 1.22 bouyer int sync, offset, options, scf = 0;
425 1.22 bouyer int i;
426 1.22 bouyer
427 1.22 bouyer #ifdef DEBUG_NEG
428 1.49 tsutsui printf("%s: answer on ppr negotiation:", device_xname(sc->sc_dev));
429 1.22 bouyer for (i = 0; i < 8; i++)
430 1.22 bouyer printf(" 0x%x", tables->msg_in[i]);
431 1.22 bouyer printf("\n");
432 1.22 bouyer #endif
433 1.22 bouyer
434 1.22 bouyer if (siop_target->status == TARST_PPR_NEG) {
435 1.22 bouyer /* we initiated PPR negotiation */
436 1.22 bouyer sync = tables->msg_in[3];
437 1.22 bouyer offset = tables->msg_in[5];
438 1.22 bouyer options = tables->msg_in[7];
439 1.22 bouyer if (options != MSG_EXT_PPR_DT) {
440 1.22 bouyer /* should't happen */
441 1.22 bouyer printf("%s: ppr negotiation for target %d: "
442 1.49 tsutsui "no DT option\n", device_xname(sc->sc_dev), target);
443 1.22 bouyer siop_target->status = TARST_ASYNC;
444 1.22 bouyer siop_target->flags &= ~(TARF_DT | TARF_ISDT);
445 1.22 bouyer siop_target->offset = 0;
446 1.22 bouyer siop_target->period = 0;
447 1.22 bouyer goto reject;
448 1.22 bouyer }
449 1.37 perry
450 1.22 bouyer if (offset > sc->maxoff || sync < sc->dt_minsync ||
451 1.22 bouyer sync > sc->dt_maxsync) {
452 1.22 bouyer printf("%s: ppr negotiation for target %d: "
453 1.22 bouyer "offset (%d) or sync (%d) out of range\n",
454 1.49 tsutsui device_xname(sc->sc_dev), target, offset, sync);
455 1.22 bouyer /* should not happen */
456 1.22 bouyer siop_target->offset = 0;
457 1.22 bouyer siop_target->period = 0;
458 1.22 bouyer goto reject;
459 1.22 bouyer } else {
460 1.50 tsutsui for (i = 0; i < __arraycount(dt_scf_period); i++) {
461 1.22 bouyer if (sc->clock_period != dt_scf_period[i].clock)
462 1.22 bouyer continue;
463 1.22 bouyer if (dt_scf_period[i].period == sync) {
464 1.22 bouyer /* ok, found it. we now are sync. */
465 1.22 bouyer siop_target->offset = offset;
466 1.22 bouyer siop_target->period = sync;
467 1.22 bouyer scf = dt_scf_period[i].scf;
468 1.22 bouyer siop_target->flags |= TARF_ISDT;
469 1.22 bouyer }
470 1.22 bouyer }
471 1.22 bouyer if ((siop_target->flags & TARF_ISDT) == 0) {
472 1.22 bouyer printf("%s: ppr negotiation for target %d: "
473 1.22 bouyer "sync (%d) incompatible with adapter\n",
474 1.49 tsutsui device_xname(sc->sc_dev), target, sync);
475 1.22 bouyer /*
476 1.22 bouyer * we didn't find it in our table, do async
477 1.22 bouyer * send reject msg, start SDTR/WDTR neg
478 1.22 bouyer */
479 1.22 bouyer siop_target->status = TARST_ASYNC;
480 1.22 bouyer siop_target->flags &= ~(TARF_DT | TARF_ISDT);
481 1.22 bouyer siop_target->offset = 0;
482 1.22 bouyer siop_target->period = 0;
483 1.22 bouyer goto reject;
484 1.22 bouyer }
485 1.22 bouyer }
486 1.22 bouyer if (tables->msg_in[6] != 1) {
487 1.22 bouyer printf("%s: ppr negotiation for target %d: "
488 1.22 bouyer "transfer width (%d) incompatible with dt\n",
489 1.50 tsutsui device_xname(sc->sc_dev),
490 1.50 tsutsui target, tables->msg_in[6]);
491 1.22 bouyer /* DT mode can only be done with wide transfers */
492 1.22 bouyer siop_target->status = TARST_ASYNC;
493 1.22 bouyer goto reject;
494 1.37 perry }
495 1.22 bouyer siop_target->flags |= TARF_ISWIDE;
496 1.22 bouyer sc->targets[target]->id |= (SCNTL3_EWS << 24);
497 1.22 bouyer sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
498 1.22 bouyer sc->targets[target]->id |= scf << (24 + SCNTL3_SCF_SHIFT);
499 1.22 bouyer sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
500 1.22 bouyer sc->targets[target]->id |=
501 1.22 bouyer (siop_target->offset & SXFER_MO_MASK) << 8;
502 1.22 bouyer sc->targets[target]->id &= ~0xff;
503 1.22 bouyer sc->targets[target]->id |= SCNTL4_U3EN;
504 1.22 bouyer siop_target->status = TARST_OK;
505 1.22 bouyer siop_update_xfer_mode(sc, target);
506 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
507 1.22 bouyer (sc->targets[target]->id >> 24) & 0xff);
508 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
509 1.22 bouyer (sc->targets[target]->id >> 8) & 0xff);
510 1.22 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4,
511 1.22 bouyer sc->targets[target]->id & 0xff);
512 1.22 bouyer return SIOP_NEG_ACK;
513 1.22 bouyer } else {
514 1.22 bouyer /* target initiated PPR negotiation, shouldn't happen */
515 1.22 bouyer printf("%s: rejecting invalid PPR negotiation from "
516 1.49 tsutsui "target %d\n", device_xname(sc->sc_dev), target);
517 1.22 bouyer reject:
518 1.44 skrll tables->t_msgout.count = siop_htoc32(sc, 1);
519 1.22 bouyer tables->msg_out[0] = MSG_MESSAGE_REJECT;
520 1.22 bouyer return SIOP_NEG_MSGOUT;
521 1.22 bouyer }
522 1.22 bouyer }
523 1.22 bouyer
524 1.22 bouyer int
525 1.47 dsl siop_sdtr_neg(struct siop_common_cmd *siop_cmd)
526 1.1 bouyer {
527 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
528 1.17 bouyer struct siop_common_target *siop_target = siop_cmd->siop_target;
529 1.14 bouyer int target = siop_cmd->xs->xs_periph->periph_target;
530 1.22 bouyer int sync, maxoffset, offset, i;
531 1.1 bouyer int send_msgout = 0;
532 1.17 bouyer struct siop_common_xfer *tables = siop_cmd->siop_tables;
533 1.1 bouyer
534 1.22 bouyer /* limit to Ultra/2 parameters, need PPR for Ultra/3 */
535 1.22 bouyer maxoffset = (sc->maxoff > 31) ? 31 : sc->maxoff;
536 1.22 bouyer
537 1.9 bouyer sync = tables->msg_in[3];
538 1.9 bouyer offset = tables->msg_in[4];
539 1.1 bouyer
540 1.1 bouyer if (siop_target->status == TARST_SYNC_NEG) {
541 1.1 bouyer /* we initiated sync negotiation */
542 1.1 bouyer siop_target->status = TARST_OK;
543 1.1 bouyer #ifdef DEBUG
544 1.1 bouyer printf("sdtr: sync %d offset %d\n", sync, offset);
545 1.1 bouyer #endif
546 1.22 bouyer if (offset > maxoffset || sync < sc->st_minsync ||
547 1.22 bouyer sync > sc->st_maxsync)
548 1.1 bouyer goto reject;
549 1.50 tsutsui for (i = 0; i < __arraycount(scf_period); i++) {
550 1.1 bouyer if (sc->clock_period != scf_period[i].clock)
551 1.1 bouyer continue;
552 1.1 bouyer if (scf_period[i].period == sync) {
553 1.1 bouyer /* ok, found it. we now are sync. */
554 1.14 bouyer siop_target->offset = offset;
555 1.14 bouyer siop_target->period = sync;
556 1.1 bouyer sc->targets[target]->id &=
557 1.1 bouyer ~(SCNTL3_SCF_MASK << 24);
558 1.1 bouyer sc->targets[target]->id |= scf_period[i].scf
559 1.1 bouyer << (24 + SCNTL3_SCF_SHIFT);
560 1.22 bouyer if (sync < 25 && /* Ultra */
561 1.22 bouyer (sc->features & SF_BUS_ULTRA3) == 0)
562 1.1 bouyer sc->targets[target]->id |=
563 1.1 bouyer SCNTL3_ULTRA << 24;
564 1.1 bouyer else
565 1.1 bouyer sc->targets[target]->id &=
566 1.1 bouyer ~(SCNTL3_ULTRA << 24);
567 1.1 bouyer sc->targets[target]->id &=
568 1.7 bouyer ~(SXFER_MO_MASK << 8);
569 1.1 bouyer sc->targets[target]->id |=
570 1.7 bouyer (offset & SXFER_MO_MASK) << 8;
571 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
572 1.1 bouyer goto end;
573 1.1 bouyer }
574 1.1 bouyer }
575 1.1 bouyer /*
576 1.1 bouyer * we didn't find it in our table, do async and send reject
577 1.1 bouyer * msg
578 1.1 bouyer */
579 1.1 bouyer reject:
580 1.1 bouyer send_msgout = 1;
581 1.44 skrll tables->t_msgout.count = siop_htoc32(sc, 1);
582 1.9 bouyer tables->msg_out[0] = MSG_MESSAGE_REJECT;
583 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
584 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
585 1.7 bouyer sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
586 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
587 1.14 bouyer siop_target->offset = siop_target->period = 0;
588 1.1 bouyer } else { /* target initiated sync neg */
589 1.1 bouyer #ifdef DEBUG
590 1.1 bouyer printf("sdtr (target): sync %d offset %d\n", sync, offset);
591 1.1 bouyer #endif
592 1.22 bouyer if (offset == 0 || sync > sc->st_maxsync) { /* async */
593 1.1 bouyer goto async;
594 1.1 bouyer }
595 1.22 bouyer if (offset > maxoffset)
596 1.22 bouyer offset = maxoffset;
597 1.22 bouyer if (sync < sc->st_minsync)
598 1.22 bouyer sync = sc->st_minsync;
599 1.1 bouyer /* look for sync period */
600 1.50 tsutsui for (i = 0; i < __arraycount(scf_period); i++) {
601 1.1 bouyer if (sc->clock_period != scf_period[i].clock)
602 1.1 bouyer continue;
603 1.1 bouyer if (scf_period[i].period == sync) {
604 1.1 bouyer /* ok, found it. we now are sync. */
605 1.14 bouyer siop_target->offset = offset;
606 1.14 bouyer siop_target->period = sync;
607 1.1 bouyer sc->targets[target]->id &=
608 1.1 bouyer ~(SCNTL3_SCF_MASK << 24);
609 1.1 bouyer sc->targets[target]->id |= scf_period[i].scf
610 1.1 bouyer << (24 + SCNTL3_SCF_SHIFT);
611 1.22 bouyer if (sync < 25 && /* Ultra */
612 1.22 bouyer (sc->features & SF_BUS_ULTRA3) == 0)
613 1.1 bouyer sc->targets[target]->id |=
614 1.1 bouyer SCNTL3_ULTRA << 24;
615 1.1 bouyer else
616 1.1 bouyer sc->targets[target]->id &=
617 1.1 bouyer ~(SCNTL3_ULTRA << 24);
618 1.1 bouyer sc->targets[target]->id &=
619 1.7 bouyer ~(SXFER_MO_MASK << 8);
620 1.1 bouyer sc->targets[target]->id |=
621 1.7 bouyer (offset & SXFER_MO_MASK) << 8;
622 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
623 1.10 bouyer siop_sdtr_msg(siop_cmd, 0, sync, offset);
624 1.1 bouyer send_msgout = 1;
625 1.1 bouyer goto end;
626 1.1 bouyer }
627 1.1 bouyer }
628 1.1 bouyer async:
629 1.14 bouyer siop_target->offset = siop_target->period = 0;
630 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24);
631 1.1 bouyer sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24);
632 1.7 bouyer sc->targets[target]->id &= ~(SXFER_MO_MASK << 8);
633 1.25 bouyer sc->targets[target]->id &= ~0xff; /* scntl4 */
634 1.10 bouyer siop_sdtr_msg(siop_cmd, 0, 0, 0);
635 1.1 bouyer send_msgout = 1;
636 1.1 bouyer }
637 1.1 bouyer end:
638 1.14 bouyer if (siop_target->status == TARST_OK)
639 1.14 bouyer siop_update_xfer_mode(sc, target);
640 1.1 bouyer #ifdef DEBUG
641 1.1 bouyer printf("id now 0x%x\n", sc->targets[target]->id);
642 1.1 bouyer #endif
643 1.44 skrll tables->id = siop_htoc32(sc, sc->targets[target]->id);
644 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3,
645 1.1 bouyer (sc->targets[target]->id >> 24) & 0xff);
646 1.7 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER,
647 1.1 bouyer (sc->targets[target]->id >> 8) & 0xff);
648 1.1 bouyer if (send_msgout) {
649 1.1 bouyer return SIOP_NEG_MSGOUT;
650 1.1 bouyer } else {
651 1.1 bouyer return SIOP_NEG_ACK;
652 1.1 bouyer }
653 1.1 bouyer }
654 1.1 bouyer
655 1.1 bouyer void
656 1.48 dsl siop_sdtr_msg(struct siop_common_cmd *siop_cmd, int offset, int ssync, int soff)
657 1.10 bouyer {
658 1.50 tsutsui
659 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
660 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_SDTR_LEN;
661 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_SDTR;
662 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
663 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 4] = soff;
664 1.17 bouyer siop_cmd->siop_tables->t_msgout.count =
665 1.44 skrll siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_SDTR_LEN + 2);
666 1.10 bouyer }
667 1.10 bouyer
668 1.10 bouyer void
669 1.47 dsl siop_wdtr_msg(struct siop_common_cmd *siop_cmd, int offset, int wide)
670 1.10 bouyer {
671 1.50 tsutsui
672 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
673 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_WDTR_LEN;
674 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_WDTR;
675 1.17 bouyer siop_cmd->siop_tables->msg_out[offset + 3] = wide;
676 1.17 bouyer siop_cmd->siop_tables->t_msgout.count =
677 1.44 skrll siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_WDTR_LEN + 2);
678 1.22 bouyer }
679 1.22 bouyer
680 1.22 bouyer void
681 1.48 dsl siop_ppr_msg(struct siop_common_cmd *siop_cmd, int offset, int ssync, int soff)
682 1.22 bouyer {
683 1.50 tsutsui
684 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED;
685 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_PPR_LEN;
686 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_PPR;
687 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 3] = ssync;
688 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 4] = 0; /* reserved */
689 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 5] = soff;
690 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 6] = 1; /* wide */
691 1.22 bouyer siop_cmd->siop_tables->msg_out[offset + 7] = MSG_EXT_PPR_DT;
692 1.22 bouyer siop_cmd->siop_tables->t_msgout.count =
693 1.44 skrll siop_htoc32(siop_cmd->siop_sc, offset + MSG_EXT_PPR_LEN + 2);
694 1.10 bouyer }
695 1.10 bouyer
696 1.10 bouyer void
697 1.47 dsl siop_minphys(struct buf *bp)
698 1.1 bouyer {
699 1.50 tsutsui
700 1.1 bouyer minphys(bp);
701 1.1 bouyer }
702 1.1 bouyer
703 1.1 bouyer int
704 1.42 christos siop_ioctl(struct scsipi_channel *chan, u_long cmd, void *arg,
705 1.41 christos int flag, struct proc *p)
706 1.1 bouyer {
707 1.49 tsutsui struct siop_common_softc *sc;
708 1.49 tsutsui
709 1.49 tsutsui sc = device_private(chan->chan_adapter->adapt_dev);
710 1.1 bouyer
711 1.1 bouyer switch (cmd) {
712 1.1 bouyer case SCBUSIORESET:
713 1.24 bouyer /*
714 1.24 bouyer * abort the script. This will trigger an interrupt, which will
715 1.24 bouyer * trigger a bus reset.
716 1.24 bouyer * We can't safely trigger the reset here as we can't access
717 1.24 bouyer * the required register while the script is running.
718 1.24 bouyer */
719 1.24 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_ABRT);
720 1.1 bouyer return (0);
721 1.1 bouyer default:
722 1.1 bouyer return (ENOTTY);
723 1.1 bouyer }
724 1.1 bouyer }
725 1.1 bouyer
726 1.1 bouyer void
727 1.47 dsl siop_ma(struct siop_common_cmd *siop_cmd)
728 1.1 bouyer {
729 1.1 bouyer int offset, dbc, sstat;
730 1.17 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
731 1.35 bouyer scr_table_t *table; /* table with partial xfer */
732 1.1 bouyer
733 1.35 bouyer /*
734 1.35 bouyer * compute how much of the current table didn't get handled when
735 1.35 bouyer * a phase mismatch occurs
736 1.35 bouyer */
737 1.1 bouyer if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
738 1.1 bouyer == 0)
739 1.35 bouyer return; /* no valid data transfer */
740 1.35 bouyer
741 1.1 bouyer offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
742 1.1 bouyer if (offset >= SIOP_NSG) {
743 1.49 tsutsui aprint_error_dev(sc->sc_dev, "bad offset in siop_sdp (%d)\n",
744 1.45 cegger offset);
745 1.1 bouyer return;
746 1.1 bouyer }
747 1.17 bouyer table = &siop_cmd->siop_tables->data[offset];
748 1.1 bouyer #ifdef DEBUG_DR
749 1.35 bouyer printf("siop_ma: offset %d count=%d addr=0x%x ", offset,
750 1.1 bouyer table->count, table->addr);
751 1.1 bouyer #endif
752 1.1 bouyer dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff;
753 1.1 bouyer if (siop_cmd->xs->xs_control & XS_CTL_DATA_OUT) {
754 1.13 bouyer if (sc->features & SF_CHIP_DFBC) {
755 1.13 bouyer dbc +=
756 1.13 bouyer bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_DFBC);
757 1.1 bouyer } else {
758 1.13 bouyer /* need to account stale data in FIFO */
759 1.13 bouyer int dfifo =
760 1.13 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO);
761 1.13 bouyer if (sc->features & SF_CHIP_FIFO) {
762 1.13 bouyer dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh,
763 1.13 bouyer SIOP_CTEST5) & CTEST5_BOMASK) << 8;
764 1.13 bouyer dbc += (dfifo - (dbc & 0x3ff)) & 0x3ff;
765 1.13 bouyer } else {
766 1.13 bouyer dbc += (dfifo - (dbc & 0x7f)) & 0x7f;
767 1.13 bouyer }
768 1.1 bouyer }
769 1.1 bouyer sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0);
770 1.1 bouyer if (sstat & SSTAT0_OLF)
771 1.1 bouyer dbc++;
772 1.13 bouyer if ((sstat & SSTAT0_ORF) && (sc->features & SF_CHIP_DFBC) == 0)
773 1.1 bouyer dbc++;
774 1.9 bouyer if (siop_cmd->siop_target->flags & TARF_ISWIDE) {
775 1.1 bouyer sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh,
776 1.1 bouyer SIOP_SSTAT2);
777 1.1 bouyer if (sstat & SSTAT2_OLF1)
778 1.1 bouyer dbc++;
779 1.13 bouyer if ((sstat & SSTAT2_ORF1) &&
780 1.13 bouyer (sc->features & SF_CHIP_DFBC) == 0)
781 1.1 bouyer dbc++;
782 1.1 bouyer }
783 1.1 bouyer /* clear the FIFO */
784 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
785 1.1 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) |
786 1.1 bouyer CTEST3_CLF);
787 1.1 bouyer }
788 1.35 bouyer siop_cmd->flags |= CMDFL_RESID;
789 1.35 bouyer siop_cmd->resid = dbc;
790 1.35 bouyer }
791 1.35 bouyer
792 1.35 bouyer void
793 1.47 dsl siop_sdp(struct siop_common_cmd *siop_cmd, int offset)
794 1.35 bouyer {
795 1.44 skrll struct siop_common_softc *sc = siop_cmd->siop_sc;
796 1.35 bouyer scr_table_t *table;
797 1.37 perry
798 1.35 bouyer if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
799 1.35 bouyer == 0)
800 1.35 bouyer return; /* no data pointers to save */
801 1.35 bouyer
802 1.35 bouyer /*
803 1.35 bouyer * offset == SIOP_NSG may be a valid condition if we get a Save data
804 1.35 bouyer * pointer when the xfer is done. Just ignore the Save data pointer
805 1.35 bouyer * in this case
806 1.35 bouyer */
807 1.35 bouyer if (offset == SIOP_NSG)
808 1.35 bouyer return;
809 1.35 bouyer #ifdef DIAGNOSTIC
810 1.35 bouyer if (offset > SIOP_NSG) {
811 1.35 bouyer scsipi_printaddr(siop_cmd->xs->xs_periph);
812 1.35 bouyer printf(": offset %d > %d\n", offset, SIOP_NSG);
813 1.35 bouyer panic("siop_sdp: offset");
814 1.35 bouyer }
815 1.1 bouyer #endif
816 1.35 bouyer /*
817 1.35 bouyer * Save data pointer. We do this by adjusting the tables to point
818 1.37 perry * at the begginning of the data not yet transfered.
819 1.35 bouyer * offset points to the first table with untransfered data.
820 1.35 bouyer */
821 1.35 bouyer
822 1.35 bouyer /*
823 1.35 bouyer * before doing that we decrease resid from the ammount of data which
824 1.35 bouyer * has been transfered.
825 1.35 bouyer */
826 1.35 bouyer siop_update_resid(siop_cmd, offset);
827 1.35 bouyer
828 1.35 bouyer /*
829 1.35 bouyer * First let see if we have a resid from a phase mismatch. If so,
830 1.35 bouyer * we have to adjst the table at offset to remove transfered data.
831 1.35 bouyer */
832 1.35 bouyer if (siop_cmd->flags & CMDFL_RESID) {
833 1.35 bouyer siop_cmd->flags &= ~CMDFL_RESID;
834 1.35 bouyer table = &siop_cmd->siop_tables->data[offset];
835 1.35 bouyer /* "cut" already transfered data from this table */
836 1.35 bouyer table->addr =
837 1.44 skrll siop_htoc32(sc, siop_ctoh32(sc, table->addr) +
838 1.44 skrll siop_ctoh32(sc, table->count) - siop_cmd->resid);
839 1.44 skrll table->count = siop_htoc32(sc, siop_cmd->resid);
840 1.35 bouyer }
841 1.35 bouyer
842 1.35 bouyer /*
843 1.35 bouyer * now we can remove entries which have been transfered.
844 1.35 bouyer * We just move the entries with data left at the beggining of the
845 1.35 bouyer * tables
846 1.35 bouyer */
847 1.35 bouyer memmove(&siop_cmd->siop_tables->data[0],
848 1.35 bouyer &siop_cmd->siop_tables->data[offset],
849 1.35 bouyer (SIOP_NSG - offset) * sizeof(scr_table_t));
850 1.35 bouyer }
851 1.35 bouyer
852 1.35 bouyer void
853 1.47 dsl siop_update_resid(struct siop_common_cmd *siop_cmd, int offset)
854 1.35 bouyer {
855 1.44 skrll struct siop_common_softc *sc = siop_cmd->siop_sc;
856 1.35 bouyer scr_table_t *table;
857 1.35 bouyer int i;
858 1.35 bouyer
859 1.35 bouyer if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN))
860 1.35 bouyer == 0)
861 1.35 bouyer return; /* no data to transfer */
862 1.35 bouyer
863 1.35 bouyer /*
864 1.35 bouyer * update resid. First account for the table entries which have
865 1.35 bouyer * been fully completed.
866 1.35 bouyer */
867 1.35 bouyer for (i = 0; i < offset; i++)
868 1.35 bouyer siop_cmd->xs->resid -=
869 1.44 skrll siop_ctoh32(sc, siop_cmd->siop_tables->data[i].count);
870 1.35 bouyer /*
871 1.35 bouyer * if CMDFL_RESID is set, the last table (pointed by offset) is a
872 1.35 bouyer * partial transfers. If not, offset points to the entry folloing
873 1.35 bouyer * the last full transfer.
874 1.35 bouyer */
875 1.35 bouyer if (siop_cmd->flags & CMDFL_RESID) {
876 1.35 bouyer table = &siop_cmd->siop_tables->data[offset];
877 1.51 tsutsui siop_cmd->xs->resid -=
878 1.44 skrll siop_ctoh32(sc, table->count) - siop_cmd->resid;
879 1.35 bouyer }
880 1.1 bouyer }
881 1.1 bouyer
882 1.36 bouyer int
883 1.47 dsl siop_iwr(struct siop_common_cmd *siop_cmd)
884 1.36 bouyer {
885 1.36 bouyer int offset;
886 1.36 bouyer scr_table_t *table; /* table with IWR */
887 1.36 bouyer struct siop_common_softc *sc = siop_cmd->siop_sc;
888 1.50 tsutsui
889 1.36 bouyer /* handle ignore wide residue messages */
890 1.36 bouyer
891 1.36 bouyer /* if target isn't wide, reject */
892 1.36 bouyer if ((siop_cmd->siop_target->flags & TARF_ISWIDE) == 0) {
893 1.44 skrll siop_cmd->siop_tables->t_msgout.count = siop_htoc32(sc, 1);
894 1.36 bouyer siop_cmd->siop_tables->msg_out[0] = MSG_MESSAGE_REJECT;
895 1.36 bouyer return SIOP_NEG_MSGOUT;
896 1.36 bouyer }
897 1.36 bouyer /* get index of current command in table */
898 1.36 bouyer offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1);
899 1.36 bouyer /*
900 1.36 bouyer * if the current table did complete, we're now pointing at the
901 1.36 bouyer * next one. Go back one if we didn't see a phase mismatch.
902 1.36 bouyer */
903 1.36 bouyer if ((siop_cmd->flags & CMDFL_RESID) == 0)
904 1.36 bouyer offset--;
905 1.36 bouyer table = &siop_cmd->siop_tables->data[offset];
906 1.36 bouyer
907 1.36 bouyer if ((siop_cmd->flags & CMDFL_RESID) == 0) {
908 1.44 skrll if (siop_ctoh32(sc, table->count) & 1) {
909 1.36 bouyer /* we really got the number of bytes we expected */
910 1.36 bouyer return SIOP_NEG_ACK;
911 1.36 bouyer } else {
912 1.36 bouyer /*
913 1.36 bouyer * now we really had a short xfer, by one byte.
914 1.36 bouyer * handle it just as if we had a phase mistmatch
915 1.36 bouyer * (there is a resid of one for this table).
916 1.36 bouyer * Update scratcha1 to reflect the fact that
917 1.36 bouyer * this xfer isn't complete.
918 1.36 bouyer */
919 1.36 bouyer siop_cmd->flags |= CMDFL_RESID;
920 1.36 bouyer siop_cmd->resid = 1;
921 1.36 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh,
922 1.36 bouyer SIOP_SCRATCHA + 1, offset);
923 1.36 bouyer return SIOP_NEG_ACK;
924 1.36 bouyer }
925 1.36 bouyer } else {
926 1.36 bouyer /*
927 1.36 bouyer * we already have a short xfer for this table; it's
928 1.36 bouyer * just one byte less than we though it was
929 1.36 bouyer */
930 1.36 bouyer siop_cmd->resid--;
931 1.36 bouyer return SIOP_NEG_ACK;
932 1.36 bouyer }
933 1.36 bouyer }
934 1.36 bouyer
935 1.1 bouyer void
936 1.47 dsl siop_clearfifo(struct siop_common_softc *sc)
937 1.1 bouyer {
938 1.1 bouyer int timeout = 0;
939 1.1 bouyer int ctest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3);
940 1.1 bouyer
941 1.1 bouyer #ifdef DEBUG_INTR
942 1.1 bouyer printf("DMA fifo not empty !\n");
943 1.1 bouyer #endif
944 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
945 1.1 bouyer ctest3 | CTEST3_CLF);
946 1.1 bouyer while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) &
947 1.1 bouyer CTEST3_CLF) != 0) {
948 1.1 bouyer delay(1);
949 1.1 bouyer if (++timeout > 1000) {
950 1.1 bouyer printf("clear fifo failed\n");
951 1.1 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3,
952 1.1 bouyer bus_space_read_1(sc->sc_rt, sc->sc_rh,
953 1.1 bouyer SIOP_CTEST3) & ~CTEST3_CLF);
954 1.1 bouyer return;
955 1.1 bouyer }
956 1.1 bouyer }
957 1.3 bouyer }
958 1.3 bouyer
959 1.3 bouyer int
960 1.47 dsl siop_modechange(struct siop_common_softc *sc)
961 1.3 bouyer {
962 1.3 bouyer int retry;
963 1.27 bouyer int sist0, sist1, stest2;
964 1.50 tsutsui
965 1.3 bouyer for (retry = 0; retry < 5; retry++) {
966 1.3 bouyer /*
967 1.3 bouyer * datasheet says to wait 100ms and re-read SIST1,
968 1.14 bouyer * to check that DIFFSENSE is stable.
969 1.3 bouyer * We may delay() 5 times for 100ms at interrupt time;
970 1.3 bouyer * hopefully this will not happen often.
971 1.3 bouyer */
972 1.3 bouyer delay(100000);
973 1.3 bouyer sist0 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST0);
974 1.3 bouyer sist1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST1);
975 1.3 bouyer if (sist1 & SIEN1_SBMC)
976 1.3 bouyer continue; /* we got an irq again */
977 1.27 bouyer sc->mode = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) &
978 1.3 bouyer STEST4_MODE_MASK;
979 1.3 bouyer stest2 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2);
980 1.27 bouyer switch(sc->mode) {
981 1.3 bouyer case STEST4_MODE_DIF:
982 1.3 bouyer printf("%s: switching to differential mode\n",
983 1.49 tsutsui device_xname(sc->sc_dev));
984 1.3 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
985 1.3 bouyer stest2 | STEST2_DIF);
986 1.3 bouyer break;
987 1.3 bouyer case STEST4_MODE_SE:
988 1.3 bouyer printf("%s: switching to single-ended mode\n",
989 1.49 tsutsui device_xname(sc->sc_dev));
990 1.3 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
991 1.3 bouyer stest2 & ~STEST2_DIF);
992 1.3 bouyer break;
993 1.3 bouyer case STEST4_MODE_LVD:
994 1.3 bouyer printf("%s: switching to LVD mode\n",
995 1.49 tsutsui device_xname(sc->sc_dev));
996 1.3 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2,
997 1.3 bouyer stest2 & ~STEST2_DIF);
998 1.3 bouyer break;
999 1.3 bouyer default:
1000 1.49 tsutsui aprint_error_dev(sc->sc_dev, "invalid SCSI mode 0x%x\n",
1001 1.45 cegger sc->mode);
1002 1.3 bouyer return 0;
1003 1.3 bouyer }
1004 1.3 bouyer return 1;
1005 1.3 bouyer }
1006 1.3 bouyer printf("%s: timeout waiting for DIFFSENSE to stabilise\n",
1007 1.49 tsutsui device_xname(sc->sc_dev));
1008 1.3 bouyer return 0;
1009 1.6 bouyer }
1010 1.6 bouyer
1011 1.6 bouyer void
1012 1.47 dsl siop_resetbus(struct siop_common_softc *sc)
1013 1.6 bouyer {
1014 1.6 bouyer int scntl1;
1015 1.50 tsutsui
1016 1.6 bouyer scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1);
1017 1.6 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1,
1018 1.6 bouyer scntl1 | SCNTL1_RST);
1019 1.6 bouyer /* minimum 25 us, more time won't hurt */
1020 1.6 bouyer delay(100);
1021 1.6 bouyer bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1);
1022 1.17 bouyer }
1023 1.17 bouyer
1024 1.17 bouyer void
1025 1.47 dsl siop_update_xfer_mode(struct siop_common_softc *sc, int target)
1026 1.17 bouyer {
1027 1.17 bouyer struct siop_common_target *siop_target = sc->targets[target];
1028 1.17 bouyer struct scsipi_xfer_mode xm;
1029 1.17 bouyer
1030 1.17 bouyer xm.xm_target = target;
1031 1.17 bouyer xm.xm_mode = 0;
1032 1.17 bouyer xm.xm_period = 0;
1033 1.17 bouyer xm.xm_offset = 0;
1034 1.26 bouyer
1035 1.17 bouyer if (siop_target->flags & TARF_ISWIDE)
1036 1.17 bouyer xm.xm_mode |= PERIPH_CAP_WIDE16;
1037 1.17 bouyer if (siop_target->period) {
1038 1.17 bouyer xm.xm_period = siop_target->period;
1039 1.17 bouyer xm.xm_offset = siop_target->offset;
1040 1.17 bouyer xm.xm_mode |= PERIPH_CAP_SYNC;
1041 1.17 bouyer }
1042 1.28 bouyer if (siop_target->flags & TARF_TAG) {
1043 1.28 bouyer /* 1010 workaround: can't do disconnect if not wide, so can't do tag */
1044 1.28 bouyer if ((sc->features & SF_CHIP_GEBUG) == 0 ||
1045 1.28 bouyer (sc->targets[target]->flags & TARF_ISWIDE))
1046 1.28 bouyer xm.xm_mode |= PERIPH_CAP_TQING;
1047 1.28 bouyer }
1048 1.28 bouyer
1049 1.17 bouyer scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_XFER_MODE, &xm);
1050 1.1 bouyer }
1051