siop_common.c revision 1.26
1 /* $NetBSD: siop_common.c,v 1.26 2002/05/04 18:11:06 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 2000, 2002 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 /* SYM53c7/8xx PCI-SCSI I/O Processors driver */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: siop_common.c,v 1.26 2002/05/04 18:11:06 bouyer Exp $"); 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 #include <sys/malloc.h> 42 #include <sys/buf.h> 43 #include <sys/kernel.h> 44 #include <sys/scsiio.h> 45 46 #include <uvm/uvm_extern.h> 47 48 #include <machine/endian.h> 49 #include <machine/bus.h> 50 51 #include <dev/scsipi/scsi_all.h> 52 #include <dev/scsipi/scsi_message.h> 53 #include <dev/scsipi/scsipi_all.h> 54 55 #include <dev/scsipi/scsiconf.h> 56 57 #include <dev/ic/siopreg.h> 58 #include <dev/ic/siopvar_common.h> 59 60 #include "opt_siop.h" 61 62 #undef DEBUG 63 #undef DEBUG_DR 64 #undef DEBUG_NEG 65 66 int 67 siop_common_attach(sc) 68 struct siop_common_softc *sc; 69 { 70 int error, i; 71 bus_dma_segment_t seg; 72 int rseg; 73 74 /* 75 * Allocate DMA-safe memory for the script and map it. 76 */ 77 if ((sc->features & SF_CHIP_RAM) == 0) { 78 error = bus_dmamem_alloc(sc->sc_dmat, PAGE_SIZE, 79 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT); 80 if (error) { 81 printf("%s: unable to allocate script DMA memory, " 82 "error = %d\n", sc->sc_dev.dv_xname, error); 83 return error; 84 } 85 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, PAGE_SIZE, 86 (caddr_t *)&sc->sc_script, 87 BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 88 if (error) { 89 printf("%s: unable to map script DMA memory, " 90 "error = %d\n", sc->sc_dev.dv_xname, error); 91 return error; 92 } 93 error = bus_dmamap_create(sc->sc_dmat, PAGE_SIZE, 1, 94 PAGE_SIZE, 0, BUS_DMA_NOWAIT, &sc->sc_scriptdma); 95 if (error) { 96 printf("%s: unable to create script DMA map, " 97 "error = %d\n", sc->sc_dev.dv_xname, error); 98 return error; 99 } 100 error = bus_dmamap_load(sc->sc_dmat, sc->sc_scriptdma, 101 sc->sc_script, PAGE_SIZE, NULL, BUS_DMA_NOWAIT); 102 if (error) { 103 printf("%s: unable to load script DMA map, " 104 "error = %d\n", sc->sc_dev.dv_xname, error); 105 return error; 106 } 107 sc->sc_scriptaddr = 108 sc->sc_scriptdma->dm_segs[0].ds_addr; 109 sc->ram_size = PAGE_SIZE; 110 } 111 112 sc->sc_adapt.adapt_dev = &sc->sc_dev; 113 sc->sc_adapt.adapt_nchannels = 1; 114 sc->sc_adapt.adapt_openings = 0; 115 sc->sc_adapt.adapt_ioctl = siop_ioctl; 116 sc->sc_adapt.adapt_minphys = minphys; 117 118 memset(&sc->sc_chan, 0, sizeof(sc->sc_chan)); 119 sc->sc_chan.chan_adapter = &sc->sc_adapt; 120 sc->sc_chan.chan_bustype = &scsi_bustype; 121 sc->sc_chan.chan_channel = 0; 122 sc->sc_chan.chan_flags = SCSIPI_CHAN_CANGROW; 123 sc->sc_chan.chan_ntargets = 124 (sc->features & SF_BUS_WIDE) ? 16 : 8; 125 sc->sc_chan.chan_nluns = 8; 126 sc->sc_chan.chan_id = 127 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCID); 128 if (sc->sc_chan.chan_id == 0 || 129 sc->sc_chan.chan_id >= sc->sc_chan.chan_ntargets) 130 sc->sc_chan.chan_id = SIOP_DEFAULT_TARGET; 131 132 for (i = 0; i < 16; i++) 133 sc->targets[i] = NULL; 134 135 /* find min/max sync period for this chip */ 136 sc->st_maxsync = 0; 137 sc->dt_maxsync = 0; 138 sc->st_minsync = 255; 139 sc->dt_minsync = 255; 140 for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]); i++) { 141 if (sc->clock_period != scf_period[i].clock) 142 continue; 143 if (sc->st_maxsync < scf_period[i].period) 144 sc->st_maxsync = scf_period[i].period; 145 if (sc->st_minsync > scf_period[i].period) 146 sc->st_minsync = scf_period[i].period; 147 } 148 if (sc->st_maxsync == 255 || sc->st_minsync == 0) 149 panic("siop: can't find my sync parameters\n"); 150 for (i = 0; i < sizeof(dt_scf_period) / sizeof(dt_scf_period[0]); i++) { 151 if (sc->clock_period != dt_scf_period[i].clock) 152 continue; 153 if (sc->dt_maxsync < dt_scf_period[i].period) 154 sc->dt_maxsync = dt_scf_period[i].period; 155 if (sc->dt_minsync > dt_scf_period[i].period) 156 sc->dt_minsync = dt_scf_period[i].period; 157 } 158 if (sc->dt_maxsync == 255 || sc->dt_minsync == 0) 159 panic("siop: can't find my sync parameters\n"); 160 return 0; 161 } 162 163 void 164 siop_common_reset(sc) 165 struct siop_common_softc *sc; 166 { 167 u_int32_t stest3; 168 169 /* reset the chip */ 170 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_SRST); 171 delay(1000); 172 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, 0); 173 174 /* init registers */ 175 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL0, 176 SCNTL0_ARB_MASK | SCNTL0_EPC | SCNTL0_AAP); 177 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 0); 178 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, sc->clock_div); 179 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 0); 180 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DIEN, 0xff); 181 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN0, 182 0xff & ~(SIEN0_CMP | SIEN0_SEL | SIEN0_RSL)); 183 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SIEN1, 184 0xff & ~(SIEN1_HTH | SIEN1_GEN)); 185 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 0); 186 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, STEST3_TE); 187 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STIME0, 188 (0xb << STIME0_SEL_SHIFT)); 189 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCID, 190 sc->sc_chan.chan_id | SCID_RRE); 191 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_RESPID0, 192 1 << sc->sc_chan.chan_id); 193 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_DCNTL, 194 (sc->features & SF_CHIP_PF) ? DCNTL_COM | DCNTL_PFEN : DCNTL_COM); 195 196 /* enable clock doubler or quadruler if appropriate */ 197 if (sc->features & (SF_CHIP_DBLR | SF_CHIP_QUAD)) { 198 stest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3); 199 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 200 STEST1_DBLEN); 201 if (sc->features & SF_CHIP_QUAD) { 202 /* wait for PPL to lock */ 203 while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, 204 SIOP_STEST4) & STEST4_LOCK) == 0) 205 delay(10); 206 } else { 207 /* data sheet says 20us - more won't hurt */ 208 delay(100); 209 } 210 /* halt scsi clock, select doubler/quad, restart clock */ 211 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, 212 stest3 | STEST3_HSC); 213 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 214 STEST1_DBLEN | STEST1_DBLSEL); 215 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST3, stest3); 216 } else { 217 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST1, 0); 218 } 219 if (sc->features & SF_CHIP_FIFO) 220 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5, 221 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST5) | 222 CTEST5_DFS); 223 if (sc->features & SF_CHIP_LED0) { 224 /* Set GPIO0 as output if software LED control is required */ 225 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL, 226 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_GPCNTL) & 0xfe); 227 } 228 if (sc->features & SF_BUS_ULTRA3) { 229 /* reset SCNTL4 */ 230 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4, 0); 231 } 232 sc->sc_reset(sc); 233 } 234 235 /* prepare tables before sending a cmd */ 236 void 237 siop_setuptables(siop_cmd) 238 struct siop_common_cmd *siop_cmd; 239 { 240 int i; 241 struct siop_common_softc *sc = siop_cmd->siop_sc; 242 struct scsipi_xfer *xs = siop_cmd->xs; 243 int target = xs->xs_periph->periph_target; 244 int lun = xs->xs_periph->periph_lun; 245 int msgoffset = 1; 246 247 siop_cmd->siop_tables->id = htole32(sc->targets[target]->id); 248 memset(siop_cmd->siop_tables->msg_out, 0, 249 sizeof(siop_cmd->siop_tables->msg_out)); 250 /* request sense doesn't disconnect */ 251 if (xs->xs_control & XS_CTL_REQSENSE) 252 siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0); 253 else if ((sc->features & SF_CHIP_GEBUG) && 254 (sc->targets[target]->flags & TARF_ISWIDE) == 0) 255 /* 256 * 1010 bug: it seems that the 1010 has problems with reselect 257 * when not in wide mode (generate false SCSI gross error). 258 * The FreeBSD sym driver has comments about it but their 259 * workaround (disable SCSI gross error reporting) doesn't 260 * work with my adapter. So disable disconnect when not 261 * wide. 262 */ 263 siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 0); 264 else 265 siop_cmd->siop_tables->msg_out[0] = MSG_IDENTIFY(lun, 1); 266 if (xs->xs_tag_type != 0) { 267 if ((sc->targets[target]->flags & TARF_TAG) == 0) { 268 scsipi_printaddr(xs->xs_periph); 269 printf(": tagged command type %d id %d\n", 270 siop_cmd->xs->xs_tag_type, siop_cmd->xs->xs_tag_id); 271 panic("tagged command for non-tagging device\n"); 272 } 273 siop_cmd->flags |= CMDFL_TAG; 274 siop_cmd->siop_tables->msg_out[1] = siop_cmd->xs->xs_tag_type; 275 /* 276 * use siop_cmd->tag not xs->xs_tag_id, caller may want a 277 * different one 278 */ 279 siop_cmd->siop_tables->msg_out[2] = siop_cmd->tag; 280 msgoffset = 3; 281 } 282 siop_cmd->siop_tables->t_msgout.count= htole32(msgoffset); 283 if (sc->targets[target]->status == TARST_ASYNC) { 284 if (sc->targets[target]->flags & TARF_DT) { 285 sc->targets[target]->status = TARST_PPR_NEG; 286 siop_ppr_msg(siop_cmd, msgoffset, sc->dt_minsync, 287 sc->maxoff); 288 } else if (sc->targets[target]->flags & TARF_WIDE) { 289 sc->targets[target]->status = TARST_WIDE_NEG; 290 siop_wdtr_msg(siop_cmd, msgoffset, 291 MSG_EXT_WDTR_BUS_16_BIT); 292 } else if (sc->targets[target]->flags & TARF_SYNC) { 293 sc->targets[target]->status = TARST_SYNC_NEG; 294 siop_sdtr_msg(siop_cmd, msgoffset, sc->st_minsync, 295 (sc->maxoff > 31) ? 31 : sc->maxoff); 296 } else { 297 sc->targets[target]->status = TARST_OK; 298 siop_update_xfer_mode(sc, target); 299 } 300 } 301 siop_cmd->siop_tables->status = 302 htole32(SCSI_SIOP_NOSTATUS); /* set invalid status */ 303 304 siop_cmd->siop_tables->cmd.count = 305 htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_len); 306 siop_cmd->siop_tables->cmd.addr = 307 htole32(siop_cmd->dmamap_cmd->dm_segs[0].ds_addr); 308 if (xs->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) { 309 for (i = 0; i < siop_cmd->dmamap_data->dm_nsegs; i++) { 310 siop_cmd->siop_tables->data[i].count = 311 htole32(siop_cmd->dmamap_data->dm_segs[i].ds_len); 312 siop_cmd->siop_tables->data[i].addr = 313 htole32(siop_cmd->dmamap_data->dm_segs[i].ds_addr); 314 } 315 } 316 } 317 318 int 319 siop_wdtr_neg(siop_cmd) 320 struct siop_common_cmd *siop_cmd; 321 { 322 struct siop_common_softc *sc = siop_cmd->siop_sc; 323 struct siop_common_target *siop_target = siop_cmd->siop_target; 324 int target = siop_cmd->xs->xs_periph->periph_target; 325 struct siop_common_xfer *tables = siop_cmd->siop_tables; 326 327 if (siop_target->status == TARST_WIDE_NEG) { 328 /* we initiated wide negotiation */ 329 switch (tables->msg_in[3]) { 330 case MSG_EXT_WDTR_BUS_8_BIT: 331 siop_target->flags &= ~TARF_ISWIDE; 332 sc->targets[target]->id &= ~(SCNTL3_EWS << 24); 333 break; 334 case MSG_EXT_WDTR_BUS_16_BIT: 335 if (siop_target->flags & TARF_WIDE) { 336 siop_target->flags |= TARF_ISWIDE; 337 sc->targets[target]->id |= (SCNTL3_EWS << 24); 338 break; 339 } 340 /* FALLTHROUH */ 341 default: 342 /* 343 * hum, we got more than what we can handle, shoudn't 344 * happen. Reject, and stay async 345 */ 346 siop_target->flags &= ~TARF_ISWIDE; 347 siop_target->status = TARST_OK; 348 siop_target->offset = siop_target->period = 0; 349 siop_update_xfer_mode(sc, target); 350 printf("%s: rejecting invalid wide negotiation from " 351 "target %d (%d)\n", sc->sc_dev.dv_xname, target, 352 tables->msg_in[3]); 353 tables->t_msgout.count= htole32(1); 354 tables->msg_out[0] = MSG_MESSAGE_REJECT; 355 return SIOP_NEG_MSGOUT; 356 } 357 tables->id = htole32(sc->targets[target]->id); 358 bus_space_write_1(sc->sc_rt, sc->sc_rh, 359 SIOP_SCNTL3, 360 (sc->targets[target]->id >> 24) & 0xff); 361 /* we now need to do sync */ 362 if (siop_target->flags & TARF_SYNC) { 363 siop_target->status = TARST_SYNC_NEG; 364 siop_sdtr_msg(siop_cmd, 0, sc->st_minsync, 365 (sc->maxoff > 31) ? 31 : sc->maxoff); 366 return SIOP_NEG_MSGOUT; 367 } else { 368 siop_target->status = TARST_OK; 369 siop_update_xfer_mode(sc, target); 370 return SIOP_NEG_ACK; 371 } 372 } else { 373 /* target initiated wide negotiation */ 374 if (tables->msg_in[3] >= MSG_EXT_WDTR_BUS_16_BIT 375 && (siop_target->flags & TARF_WIDE)) { 376 siop_target->flags |= TARF_ISWIDE; 377 sc->targets[target]->id |= SCNTL3_EWS << 24; 378 } else { 379 siop_target->flags &= ~TARF_ISWIDE; 380 sc->targets[target]->id &= ~(SCNTL3_EWS << 24); 381 } 382 tables->id = htole32(sc->targets[target]->id); 383 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, 384 (sc->targets[target]->id >> 24) & 0xff); 385 /* 386 * we did reset wide parameters, so fall back to async, 387 * but don't schedule a sync neg, target should initiate it 388 */ 389 siop_target->status = TARST_OK; 390 siop_target->offset = siop_target->period = 0; 391 siop_update_xfer_mode(sc, target); 392 siop_wdtr_msg(siop_cmd, 0, (siop_target->flags & TARF_ISWIDE) ? 393 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT); 394 return SIOP_NEG_MSGOUT; 395 } 396 } 397 398 int 399 siop_ppr_neg(siop_cmd) 400 struct siop_common_cmd *siop_cmd; 401 { 402 struct siop_common_softc *sc = siop_cmd->siop_sc; 403 struct siop_common_target *siop_target = siop_cmd->siop_target; 404 int target = siop_cmd->xs->xs_periph->periph_target; 405 struct siop_common_xfer *tables = siop_cmd->siop_tables; 406 int sync, offset, options, scf = 0; 407 int i; 408 409 #ifdef DEBUG_NEG 410 printf("%s: anserw on ppr negotiation:", sc->sc_dev.dv_xname); 411 for (i = 0; i < 8; i++) 412 printf(" 0x%x", tables->msg_in[i]); 413 printf("\n"); 414 #endif 415 416 if (siop_target->status == TARST_PPR_NEG) { 417 /* we initiated PPR negotiation */ 418 sync = tables->msg_in[3]; 419 offset = tables->msg_in[5]; 420 options = tables->msg_in[7]; 421 if (options != MSG_EXT_PPR_DT) { 422 /* should't happen */ 423 printf("%s: ppr negotiation for target %d: " 424 "no DT option\n", sc->sc_dev.dv_xname, target); 425 siop_target->status = TARST_ASYNC; 426 siop_target->flags &= ~(TARF_DT | TARF_ISDT); 427 siop_target->offset = 0; 428 siop_target->period = 0; 429 goto reject; 430 } 431 432 if (offset > sc->maxoff || sync < sc->dt_minsync || 433 sync > sc->dt_maxsync) { 434 printf("%s: ppr negotiation for target %d: " 435 "offset (%d) or sync (%d) out of range\n", 436 sc->sc_dev.dv_xname, target, offset, sync); 437 /* should not happen */ 438 siop_target->offset = 0; 439 siop_target->period = 0; 440 goto reject; 441 } else { 442 for (i = 0; i < 443 sizeof(dt_scf_period) / sizeof(dt_scf_period[0]); 444 i++) { 445 if (sc->clock_period != dt_scf_period[i].clock) 446 continue; 447 if (dt_scf_period[i].period == sync) { 448 /* ok, found it. we now are sync. */ 449 siop_target->offset = offset; 450 siop_target->period = sync; 451 scf = dt_scf_period[i].scf; 452 siop_target->flags |= TARF_ISDT; 453 } 454 } 455 if ((siop_target->flags & TARF_ISDT) == 0) { 456 printf("%s: ppr negotiation for target %d: " 457 "sync (%d) incompatible with adapter\n", 458 sc->sc_dev.dv_xname, target, sync); 459 /* 460 * we didn't find it in our table, do async 461 * send reject msg, start SDTR/WDTR neg 462 */ 463 siop_target->status = TARST_ASYNC; 464 siop_target->flags &= ~(TARF_DT | TARF_ISDT); 465 siop_target->offset = 0; 466 siop_target->period = 0; 467 goto reject; 468 } 469 } 470 if (tables->msg_in[6] != 1) { 471 printf("%s: ppr negotiation for target %d: " 472 "transfer width (%d) incompatible with dt\n", 473 sc->sc_dev.dv_xname, target, tables->msg_in[6]); 474 /* DT mode can only be done with wide transfers */ 475 siop_target->status = TARST_ASYNC; 476 goto reject; 477 } 478 siop_target->flags |= TARF_ISWIDE; 479 sc->targets[target]->id |= (SCNTL3_EWS << 24); 480 sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24); 481 sc->targets[target]->id |= scf << (24 + SCNTL3_SCF_SHIFT); 482 sc->targets[target]->id &= ~(SXFER_MO_MASK << 8); 483 sc->targets[target]->id |= 484 (siop_target->offset & SXFER_MO_MASK) << 8; 485 sc->targets[target]->id &= ~0xff; 486 sc->targets[target]->id |= SCNTL4_U3EN; 487 siop_target->status = TARST_OK; 488 siop_update_xfer_mode(sc, target); 489 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, 490 (sc->targets[target]->id >> 24) & 0xff); 491 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 492 (sc->targets[target]->id >> 8) & 0xff); 493 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL4, 494 sc->targets[target]->id & 0xff); 495 return SIOP_NEG_ACK; 496 } else { 497 /* target initiated PPR negotiation, shouldn't happen */ 498 printf("%s: rejecting invalid PPR negotiation from " 499 "target %d\n", sc->sc_dev.dv_xname, target); 500 reject: 501 tables->t_msgout.count= htole32(1); 502 tables->msg_out[0] = MSG_MESSAGE_REJECT; 503 return SIOP_NEG_MSGOUT; 504 } 505 } 506 507 int 508 siop_sdtr_neg(siop_cmd) 509 struct siop_common_cmd *siop_cmd; 510 { 511 struct siop_common_softc *sc = siop_cmd->siop_sc; 512 struct siop_common_target *siop_target = siop_cmd->siop_target; 513 int target = siop_cmd->xs->xs_periph->periph_target; 514 int sync, maxoffset, offset, i; 515 int send_msgout = 0; 516 struct siop_common_xfer *tables = siop_cmd->siop_tables; 517 518 /* limit to Ultra/2 parameters, need PPR for Ultra/3 */ 519 maxoffset = (sc->maxoff > 31) ? 31 : sc->maxoff; 520 521 sync = tables->msg_in[3]; 522 offset = tables->msg_in[4]; 523 524 if (siop_target->status == TARST_SYNC_NEG) { 525 /* we initiated sync negotiation */ 526 siop_target->status = TARST_OK; 527 #ifdef DEBUG 528 printf("sdtr: sync %d offset %d\n", sync, offset); 529 #endif 530 if (offset > maxoffset || sync < sc->st_minsync || 531 sync > sc->st_maxsync) 532 goto reject; 533 for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]); 534 i++) { 535 if (sc->clock_period != scf_period[i].clock) 536 continue; 537 if (scf_period[i].period == sync) { 538 /* ok, found it. we now are sync. */ 539 siop_target->offset = offset; 540 siop_target->period = sync; 541 sc->targets[target]->id &= 542 ~(SCNTL3_SCF_MASK << 24); 543 sc->targets[target]->id |= scf_period[i].scf 544 << (24 + SCNTL3_SCF_SHIFT); 545 if (sync < 25 && /* Ultra */ 546 (sc->features & SF_BUS_ULTRA3) == 0) 547 sc->targets[target]->id |= 548 SCNTL3_ULTRA << 24; 549 else 550 sc->targets[target]->id &= 551 ~(SCNTL3_ULTRA << 24); 552 sc->targets[target]->id &= 553 ~(SXFER_MO_MASK << 8); 554 sc->targets[target]->id |= 555 (offset & SXFER_MO_MASK) << 8; 556 sc->targets[target]->id &= ~0xff; /* scntl4 */ 557 goto end; 558 } 559 } 560 /* 561 * we didn't find it in our table, do async and send reject 562 * msg 563 */ 564 reject: 565 send_msgout = 1; 566 tables->t_msgout.count= htole32(1); 567 tables->msg_out[0] = MSG_MESSAGE_REJECT; 568 sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24); 569 sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24); 570 sc->targets[target]->id &= ~(SXFER_MO_MASK << 8); 571 sc->targets[target]->id &= ~0xff; /* scntl4 */ 572 siop_target->offset = siop_target->period = 0; 573 } else { /* target initiated sync neg */ 574 #ifdef DEBUG 575 printf("sdtr (target): sync %d offset %d\n", sync, offset); 576 #endif 577 if (offset == 0 || sync > sc->st_maxsync) { /* async */ 578 goto async; 579 } 580 if (offset > maxoffset) 581 offset = maxoffset; 582 if (sync < sc->st_minsync) 583 sync = sc->st_minsync; 584 /* look for sync period */ 585 for (i = 0; i < sizeof(scf_period) / sizeof(scf_period[0]); 586 i++) { 587 if (sc->clock_period != scf_period[i].clock) 588 continue; 589 if (scf_period[i].period == sync) { 590 /* ok, found it. we now are sync. */ 591 siop_target->offset = offset; 592 siop_target->period = sync; 593 sc->targets[target]->id &= 594 ~(SCNTL3_SCF_MASK << 24); 595 sc->targets[target]->id |= scf_period[i].scf 596 << (24 + SCNTL3_SCF_SHIFT); 597 if (sync < 25 && /* Ultra */ 598 (sc->features & SF_BUS_ULTRA3) == 0) 599 sc->targets[target]->id |= 600 SCNTL3_ULTRA << 24; 601 else 602 sc->targets[target]->id &= 603 ~(SCNTL3_ULTRA << 24); 604 sc->targets[target]->id &= 605 ~(SXFER_MO_MASK << 8); 606 sc->targets[target]->id |= 607 (offset & SXFER_MO_MASK) << 8; 608 sc->targets[target]->id &= ~0xff; /* scntl4 */ 609 siop_sdtr_msg(siop_cmd, 0, sync, offset); 610 send_msgout = 1; 611 goto end; 612 } 613 } 614 async: 615 siop_target->offset = siop_target->period = 0; 616 sc->targets[target]->id &= ~(SCNTL3_SCF_MASK << 24); 617 sc->targets[target]->id &= ~(SCNTL3_ULTRA << 24); 618 sc->targets[target]->id &= ~(SXFER_MO_MASK << 8); 619 sc->targets[target]->id &= ~0xff; /* scntl4 */ 620 siop_sdtr_msg(siop_cmd, 0, 0, 0); 621 send_msgout = 1; 622 } 623 end: 624 if (siop_target->status == TARST_OK) 625 siop_update_xfer_mode(sc, target); 626 #ifdef DEBUG 627 printf("id now 0x%x\n", sc->targets[target]->id); 628 #endif 629 tables->id = htole32(sc->targets[target]->id); 630 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL3, 631 (sc->targets[target]->id >> 24) & 0xff); 632 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SXFER, 633 (sc->targets[target]->id >> 8) & 0xff); 634 if (send_msgout) { 635 return SIOP_NEG_MSGOUT; 636 } else { 637 return SIOP_NEG_ACK; 638 } 639 } 640 641 void 642 siop_sdtr_msg(siop_cmd, offset, ssync, soff) 643 struct siop_common_cmd *siop_cmd; 644 int offset; 645 int ssync, soff; 646 { 647 siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED; 648 siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_SDTR_LEN; 649 siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_SDTR; 650 siop_cmd->siop_tables->msg_out[offset + 3] = ssync; 651 siop_cmd->siop_tables->msg_out[offset + 4] = soff; 652 siop_cmd->siop_tables->t_msgout.count = 653 htole32(offset + MSG_EXT_SDTR_LEN + 2); 654 } 655 656 void 657 siop_wdtr_msg(siop_cmd, offset, wide) 658 struct siop_common_cmd *siop_cmd; 659 int offset; 660 { 661 siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED; 662 siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_WDTR_LEN; 663 siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_WDTR; 664 siop_cmd->siop_tables->msg_out[offset + 3] = wide; 665 siop_cmd->siop_tables->t_msgout.count = 666 htole32(offset + MSG_EXT_WDTR_LEN + 2); 667 } 668 669 void 670 siop_ppr_msg(siop_cmd, offset, ssync, soff) 671 struct siop_common_cmd *siop_cmd; 672 int offset; 673 int ssync, soff; 674 { 675 siop_cmd->siop_tables->msg_out[offset + 0] = MSG_EXTENDED; 676 siop_cmd->siop_tables->msg_out[offset + 1] = MSG_EXT_PPR_LEN; 677 siop_cmd->siop_tables->msg_out[offset + 2] = MSG_EXT_PPR; 678 siop_cmd->siop_tables->msg_out[offset + 3] = ssync; 679 siop_cmd->siop_tables->msg_out[offset + 4] = 0; /* reserved */ 680 siop_cmd->siop_tables->msg_out[offset + 5] = soff; 681 siop_cmd->siop_tables->msg_out[offset + 6] = 1; /* wide */ 682 siop_cmd->siop_tables->msg_out[offset + 7] = MSG_EXT_PPR_DT; 683 siop_cmd->siop_tables->t_msgout.count = 684 htole32(offset + MSG_EXT_PPR_LEN + 2); 685 } 686 687 void 688 siop_minphys(bp) 689 struct buf *bp; 690 { 691 minphys(bp); 692 } 693 694 int 695 siop_ioctl(chan, cmd, arg, flag, p) 696 struct scsipi_channel *chan; 697 u_long cmd; 698 caddr_t arg; 699 int flag; 700 struct proc *p; 701 { 702 struct siop_common_softc *sc = (void *)chan->chan_adapter->adapt_dev; 703 704 switch (cmd) { 705 case SCBUSIORESET: 706 /* 707 * abort the script. This will trigger an interrupt, which will 708 * trigger a bus reset. 709 * We can't safely trigger the reset here as we can't access 710 * the required register while the script is running. 711 */ 712 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_ISTAT, ISTAT_ABRT); 713 return (0); 714 default: 715 return (ENOTTY); 716 } 717 } 718 719 void 720 siop_sdp(siop_cmd) 721 struct siop_common_cmd *siop_cmd; 722 { 723 /* save data pointer. Handle async only for now */ 724 int offset, dbc, sstat; 725 struct siop_common_softc *sc = siop_cmd->siop_sc; 726 scr_table_t *table; /* table to patch */ 727 728 if ((siop_cmd->xs->xs_control & (XS_CTL_DATA_OUT | XS_CTL_DATA_IN)) 729 == 0) 730 return; /* no data pointers to save */ 731 offset = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCRATCHA + 1); 732 if (offset >= SIOP_NSG) { 733 printf("%s: bad offset in siop_sdp (%d)\n", 734 sc->sc_dev.dv_xname, offset); 735 return; 736 } 737 table = &siop_cmd->siop_tables->data[offset]; 738 #ifdef DEBUG_DR 739 printf("sdp: offset %d count=%d addr=0x%x ", offset, 740 table->count, table->addr); 741 #endif 742 dbc = bus_space_read_4(sc->sc_rt, sc->sc_rh, SIOP_DBC) & 0x00ffffff; 743 if (siop_cmd->xs->xs_control & XS_CTL_DATA_OUT) { 744 if (sc->features & SF_CHIP_DFBC) { 745 dbc += 746 bus_space_read_2(sc->sc_rt, sc->sc_rh, SIOP_DFBC); 747 } else { 748 /* need to account stale data in FIFO */ 749 int dfifo = 750 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_DFIFO); 751 if (sc->features & SF_CHIP_FIFO) { 752 dfifo |= (bus_space_read_1(sc->sc_rt, sc->sc_rh, 753 SIOP_CTEST5) & CTEST5_BOMASK) << 8; 754 dbc += (dfifo - (dbc & 0x3ff)) & 0x3ff; 755 } else { 756 dbc += (dfifo - (dbc & 0x7f)) & 0x7f; 757 } 758 } 759 sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SSTAT0); 760 if (sstat & SSTAT0_OLF) 761 dbc++; 762 if ((sstat & SSTAT0_ORF) && (sc->features & SF_CHIP_DFBC) == 0) 763 dbc++; 764 if (siop_cmd->siop_target->flags & TARF_ISWIDE) { 765 sstat = bus_space_read_1(sc->sc_rt, sc->sc_rh, 766 SIOP_SSTAT2); 767 if (sstat & SSTAT2_OLF1) 768 dbc++; 769 if ((sstat & SSTAT2_ORF1) && 770 (sc->features & SF_CHIP_DFBC) == 0) 771 dbc++; 772 } 773 /* clear the FIFO */ 774 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3, 775 bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) | 776 CTEST3_CLF); 777 } 778 table->addr = 779 htole32(le32toh(table->addr) + le32toh(table->count) - dbc); 780 table->count = htole32(dbc); 781 #ifdef DEBUG_DR 782 printf("now count=%d addr=0x%x\n", table->count, table->addr); 783 #endif 784 } 785 786 void 787 siop_clearfifo(sc) 788 struct siop_common_softc *sc; 789 { 790 int timeout = 0; 791 int ctest3 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3); 792 793 #ifdef DEBUG_INTR 794 printf("DMA fifo not empty !\n"); 795 #endif 796 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3, 797 ctest3 | CTEST3_CLF); 798 while ((bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3) & 799 CTEST3_CLF) != 0) { 800 delay(1); 801 if (++timeout > 1000) { 802 printf("clear fifo failed\n"); 803 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_CTEST3, 804 bus_space_read_1(sc->sc_rt, sc->sc_rh, 805 SIOP_CTEST3) & ~CTEST3_CLF); 806 return; 807 } 808 } 809 } 810 811 int 812 siop_modechange(sc) 813 struct siop_common_softc *sc; 814 { 815 int retry; 816 int sist0, sist1, stest2, stest4; 817 for (retry = 0; retry < 5; retry++) { 818 /* 819 * datasheet says to wait 100ms and re-read SIST1, 820 * to check that DIFFSENSE is stable. 821 * We may delay() 5 times for 100ms at interrupt time; 822 * hopefully this will not happen often. 823 */ 824 delay(100000); 825 sist0 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST0); 826 sist1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SIST1); 827 if (sist1 & SIEN1_SBMC) 828 continue; /* we got an irq again */ 829 stest4 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST4) & 830 STEST4_MODE_MASK; 831 stest2 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2); 832 switch(stest4) { 833 case STEST4_MODE_DIF: 834 printf("%s: switching to differential mode\n", 835 sc->sc_dev.dv_xname); 836 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 837 stest2 | STEST2_DIF); 838 break; 839 case STEST4_MODE_SE: 840 printf("%s: switching to single-ended mode\n", 841 sc->sc_dev.dv_xname); 842 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 843 stest2 & ~STEST2_DIF); 844 break; 845 case STEST4_MODE_LVD: 846 printf("%s: switching to LVD mode\n", 847 sc->sc_dev.dv_xname); 848 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST2, 849 stest2 & ~STEST2_DIF); 850 break; 851 default: 852 printf("%s: invalid SCSI mode 0x%x\n", 853 sc->sc_dev.dv_xname, stest4); 854 return 0; 855 } 856 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_STEST0, 857 stest4 >> 2); 858 return 1; 859 } 860 printf("%s: timeout waiting for DIFFSENSE to stabilise\n", 861 sc->sc_dev.dv_xname); 862 return 0; 863 } 864 865 void 866 siop_resetbus(sc) 867 struct siop_common_softc *sc; 868 { 869 int scntl1; 870 scntl1 = bus_space_read_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1); 871 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, 872 scntl1 | SCNTL1_RST); 873 /* minimum 25 us, more time won't hurt */ 874 delay(100); 875 bus_space_write_1(sc->sc_rt, sc->sc_rh, SIOP_SCNTL1, scntl1); 876 } 877 878 void 879 siop_update_xfer_mode(sc, target) 880 struct siop_common_softc *sc; 881 int target; 882 { 883 struct siop_common_target *siop_target = sc->targets[target]; 884 struct scsipi_xfer_mode xm; 885 886 xm.xm_target = target; 887 xm.xm_mode = 0; 888 xm.xm_period = 0; 889 xm.xm_offset = 0; 890 891 /* 1010 workaround: can't do disconnect if not wide, so can't do tag */ 892 if ((sc->features & SF_CHIP_GEBUG) && 893 (sc->targets[target]->flags & TARF_ISWIDE) == 0) 894 siop_target->flags &= ~TARF_TAG; 895 896 if (siop_target->flags & TARF_ISWIDE) 897 xm.xm_mode |= PERIPH_CAP_WIDE16; 898 if (siop_target->period) { 899 xm.xm_period = siop_target->period; 900 xm.xm_offset = siop_target->offset; 901 xm.xm_mode |= PERIPH_CAP_SYNC; 902 } 903 if (siop_target->flags & TARF_TAG) 904 xm.xm_mode |= PERIPH_CAP_TQING; 905 scsipi_async_event(&sc->sc_chan, ASYNC_EVENT_XFER_MODE, &xm); 906 } 907
Indexes created Thu Sep 25 16:09:42 GMT 2025