1 1.2 kiyohara /* $NetBSD: sl811hsreg.h,v 1.2 2007/08/15 03:53:10 kiyohara Exp $ */ 2 1.1 isaki 3 1.1 isaki /* 4 1.2 kiyohara * Not (c) 2007 Matthew Orgass 5 1.2 kiyohara * This file is public domain, meaning anyone can make any use of part or all 6 1.2 kiyohara * of this file including copying into other works without credit. Any use, 7 1.2 kiyohara * modified or not, is solely the responsibility of the user. If this file is 8 1.2 kiyohara * part of a collection then use in the collection is governed by the terms of 9 1.2 kiyohara * the collection. 10 1.1 isaki */ 11 1.1 isaki 12 1.1 isaki /* 13 1.2 kiyohara * ScanLogic SL811HS USB Host Controller 14 1.1 isaki */ 15 1.1 isaki 16 1.2 kiyohara /* note: pcmcia attachment uses 4 byte port with data repeated the last three 17 1.2 kiyohara * bytes; using 0x2 instead of 0x1 solves bus corruption on the Vadem Clio 18 1.2 kiyohara * C-1000. The main driver does not use these IDX and PORT values. 19 1.2 kiyohara */ 20 1.1 isaki #define SL11_IDX_ADDR (0x00) 21 1.1 isaki #define SL11_IDX_DATA (0x01) 22 1.2 kiyohara #define SL11_PORTSTART (0x00) 23 1.1 isaki #define SL11_PORTSIZE (0x02) 24 1.1 isaki 25 1.1 isaki #define SL11_E0BASE (0x00) /* Base of Control0 */ 26 1.1 isaki #define SL11_E0CTRL (0x00) /* Host Control Register */ 27 1.1 isaki #define SL11_E0ADDR (0x01) /* Host Base Address */ 28 1.1 isaki #define SL11_E0LEN (0x02) /* Host Base Length */ 29 1.1 isaki #define SL11_E0STAT (0x03) /* USB Status (Read) */ 30 1.1 isaki #define SL11_E0PID SL11_E0STAT /* Host PID, Device Endpoint (Write) */ 31 1.1 isaki #define SL11_E0CONT (0x04) /* Transfer Count (Read) */ 32 1.1 isaki #define SL11_E0DEV SL11_E0CONT /* Host Device Address (Write) */ 33 1.1 isaki 34 1.1 isaki #define SL11_E1BASE (0x08) /* Base of Control1 */ 35 1.1 isaki #define SL11_E1CTRL (SL11_E1BASE + SL11_E0CTRL) 36 1.1 isaki #define SL11_E1ADDR (SL11_E1BASE + SL11_E0ADDR) 37 1.1 isaki #define SL11_E1LEN (SL11_E1BASE + SL11_E0LEN) 38 1.1 isaki #define SL11_E1STAT (SL11_E1BASE + SL11_E0STAT) 39 1.1 isaki #define SL11_E1PID (SL11_E1BASE + SL11_E0PID) 40 1.1 isaki #define SL11_E1CONT (SL11_E1BASE + SL11_E0CONT) 41 1.1 isaki #define SL11_E1DEV (SL11_E1BASE + SL11_E0DEV) 42 1.1 isaki 43 1.1 isaki #define SL11_CTRL (0x05) /* Control Register1 */ 44 1.1 isaki #define SL11_IER (0x06) /* Interrupt Enable Register */ 45 1.1 isaki #define SL11_ISR (0x0d) /* Interrupt Status Register */ 46 1.2 kiyohara #define SL11_SOFTIME (0x0e) /* SOF Counter Low (Write) */ 47 1.2 kiyohara #define SL11_REV SL11_SOFTIME /* HW Revision Register (Read) */ 48 1.1 isaki #define SL811_CSOF (0x0f) /* SOF Counter High(R), Control2(W) */ 49 1.1 isaki #define SL11_MEM (0x10) /* Memory Buffer (0x10 - 0xff) */ 50 1.1 isaki 51 1.1 isaki #define SL11_EPCTRL_ARM (0x01) 52 1.1 isaki #define SL11_EPCTRL_ENABLE (0x02) 53 1.2 kiyohara #define SL11_EPCTRL_ARM_ENABLE (SL11_EPCTRL_ARM|SL11_EPCTRL_ENABLE) 54 1.1 isaki #define SL11_EPCTRL_DIRECTION (0x04) 55 1.1 isaki #define SL11_EPCTRL_ISO (0x10) 56 1.1 isaki #define SL11_EPCTRL_SOF (0x20) 57 1.1 isaki #define SL11_EPCTRL_DATATOGGLE (0x40) 58 1.1 isaki #define SL11_EPCTRL_PREAMBLE (0x80) 59 1.1 isaki 60 1.2 kiyohara #define SL11_PID_BITS (0xf0) 61 1.2 kiyohara #define SL11_EP_BITS (0x0f) 62 1.2 kiyohara 63 1.2 kiyohara #define SL11_PID_OUT (0x10) 64 1.2 kiyohara #define SL11_PID_IN (0x90) 65 1.2 kiyohara #define SL11_PID_SOF (0x50) 66 1.2 kiyohara #define SL11_PID_SETUP (0xd0) 67 1.2 kiyohara 68 1.2 kiyohara #define SLHCI_PID_SWAP_IN_OUT (0x80) /* xor to swap IN and OUT */ 69 1.1 isaki 70 1.1 isaki #define SL11_EPSTAT_ACK (0x01) 71 1.1 isaki #define SL11_EPSTAT_ERROR (0x02) 72 1.1 isaki #define SL11_EPSTAT_TIMEOUT (0x04) 73 1.1 isaki #define SL11_EPSTAT_SEQUENCE (0x08) 74 1.1 isaki #define SL11_EPSTAT_SETUP (0x10) 75 1.1 isaki #define SL11_EPSTAT_OVERFLOW (0x20) 76 1.1 isaki #define SL11_EPSTAT_NAK (0x40) 77 1.1 isaki #define SL11_EPSTAT_STALL (0x80) 78 1.2 kiyohara #define SL11_EPSTAT_STATBITS (0xf7) 79 1.2 kiyohara #define SL11_EPSTAT_ERRBITS (0xf6) 80 1.1 isaki 81 1.1 isaki #define SL11_CTRL_ENABLESOF (0x01) 82 1.2 kiyohara /* #define SL11_CTRL_EOF2 (0x04) XXX ? Reserved in 1.5 */ 83 1.1 isaki #define SL11_CTRL_RESETENGINE (0x08) 84 1.1 isaki #define SL11_CTRL_JKSTATE (0x10) 85 1.1 isaki #define SL11_CTRL_LOWSPEED (0x20) 86 1.1 isaki #define SL11_CTRL_SUSPEND (0x40) 87 1.1 isaki 88 1.1 isaki #define SL11_IER_USBA (0x01) /* USB-A done */ 89 1.1 isaki #define SL11_IER_USBB (0x02) /* USB-B done */ 90 1.1 isaki #define SL11_IER_BABBLE (0x04) /* Babble detection */ 91 1.2 kiyohara #define SL11_IER_SOF (0x10) /* 1ms Start Of Frame timer */ 92 1.1 isaki #define SL11_IER_INSERT (0x20) /* Slave Insert/Remove detection */ 93 1.2 kiyohara #define SL11_IER_DEVDET (0x40) /* USB Device Detect */ 94 1.2 kiyohara #define SL11_IER_RESUME (0x40) /* USB Resume */ 95 1.2 kiyohara #define SLHCI_NORMAL_INTERRUPTS (0x33) /* A, B, SOFTIMER, INSERT */ 96 1.1 isaki 97 1.1 isaki #define SL11_ISR_USBA (0x01) /* USB-A done */ 98 1.1 isaki #define SL11_ISR_USBB (0x02) /* USB-B done */ 99 1.2 kiyohara #define SL11_ISR_BABBLE (0x04) /* Babble detection or reserved */ 100 1.2 kiyohara #define SL11_ISR_RES (0x08) /* Reserved */ 101 1.2 kiyohara #define SL11_ISR_SOF (0x10) /* 1ms Start Of Frame timer */ 102 1.1 isaki #define SL11_ISR_INSERT (0x20) /* Slave Insert/Remove detection */ 103 1.2 kiyohara #define SL11_ISR_NODEV (0x40) /* USB Device Not Present */ 104 1.2 kiyohara #define SL11_ISR_RESUME (0x40) /* USB Resume */ 105 1.1 isaki #define SL11_ISR_DATA (0x80) /* Value of the Data+ pin */ 106 1.1 isaki 107 1.1 isaki #define SL11_REV_USBA (0x01) /* USB-A */ 108 1.1 isaki #define SL11_REV_USBB (0x02) /* USB-B */ 109 1.1 isaki #define SL11_REV_REVMASK (0xf0) /* HW Revision */ 110 1.2 kiyohara 111 1.2 kiyohara #define SL11_GET_REV(x) ((x) >> 4) 112 1.2 kiyohara #define SLTYPE_SL11H (0x00) /* SL11H not supported */ 113 1.2 kiyohara #define SLTYPE_SL811HS (0x01) 114 1.2 kiyohara #define SLTYPE_SL811HS_R12 SLTYPE_SL811HS 115 1.2 kiyohara #define SLTYPE_SL811HS_R14 (0x02) 116 1.2 kiyohara #define SLTYPE_SL811HS_R15 SLTYPE_SL811HS_R14 117 1.2 kiyohara 118 1.2 kiyohara #define SLHCI_USBAB (0x03) /* USB A/B bits in IER/ISR/flags */ 119 1.1 isaki 120 1.1 isaki #define SL811_CSOF_SOFMASK (0x3f) /* SOF High Counter */ 121 1.1 isaki #define SL811_CSOF_POLARITY (0x40) /* Change polarity */ 122 1.1 isaki #define SL811_CSOF_MASTER (0x80) /* Master/Slave selection */ 123 1.1 isaki 124 1.2 kiyohara #define SL11_BUFFER_START (0x10) /* Start of buffer memory */ 125 1.2 kiyohara #define SL11_BUFFER_END (0xff) /* End of buffer memory */ 126 1.2 kiyohara 127 1.2 kiyohara #define SL11_MAX_PACKET_SIZE 240 128 1.2 kiyohara 129