smc91cxx.c revision 1.10 1 /* $NetBSD: smc91cxx.c,v 1.10 1998/07/05 06:49:12 jonathan Exp $ */
2
3 /*-
4 * Copyright (c) 1997 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1996 Gardner Buchanan <gbuchanan (at) shl.com>
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Gardner Buchanan.
55 * 4. The name of Gardner Buchanan may not be used to endorse or promote
56 * products derived from this software without specific prior written
57 * permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
69 *
70 * from FreeBSD Id: if_sn.c,v 1.4 1996/03/18 15:47:16 gardner Exp
71 */
72
73 /*
74 * Core driver for the SMC 91Cxx family of Ethernet chips.
75 *
76 * Memory allocation interrupt logic is drived from an SMC 91C90 driver
77 * written for NetBSD/amiga by Michael Hitch.
78 */
79
80 #include "opt_inet.h"
81 #include "opt_ccitt.h"
82 #include "opt_llc.h"
83 #include "opt_ns.h"
84 #include "bpfilter.h"
85 #include "rnd.h"
86
87 #include <sys/param.h>
88 #include <sys/systm.h>
89 #include <sys/mbuf.h>
90 #include <sys/syslog.h>
91 #include <sys/socket.h>
92 #include <sys/device.h>
93 #include <sys/malloc.h>
94 #include <sys/ioctl.h>
95 #include <sys/errno.h>
96 #if NRND > 0
97 #include <sys/rnd.h>
98 #endif
99
100 #include <machine/bus.h>
101 #include <machine/intr.h>
102
103 #include <net/if.h>
104 #include <net/if_dl.h>
105 #include <net/if_ether.h>
106 #include <net/if_media.h>
107
108 #ifdef INET
109 #include <netinet/in.h>
110 #include <netinet/if_inarp.h>
111 #include <netinet/in_systm.h>
112 #include <netinet/in_var.h>
113 #include <netinet/ip.h>
114 #endif
115
116 #ifdef NS
117 #include <netns/ns.h>
118 #include <netns/ns_if.h>
119 #endif
120
121 #if defined(CCITT) && defined(LLC)
122 #include <sys/socketvar.h>
123 #include <netccitt/x25.h>
124 #include <netccitt/pk.h>
125 #include <netccitt/pk_var.h>
126 #include <netccitt/pk_extern.h>
127 #endif
128
129 #if NBPFILTER > 0
130 #include <net/bpf.h>
131 #include <net/bpfdesc.h>
132 #endif
133
134 #include <dev/ic/smc91cxxreg.h>
135 #include <dev/ic/smc91cxxvar.h>
136
137 /* XXX Hardware padding doesn't work yet(?) */
138 #define SMC91CXX_SW_PAD
139
140 const char *smc91cxx_idstrs[] = {
141 NULL, /* 0 */
142 NULL, /* 1 */
143 NULL, /* 2 */
144 "SMC91C90/91C92", /* 3 */
145 "SMC91C94", /* 4 */
146 "SMC91C95", /* 5 */
147 NULL, /* 6 */
148 "SMC91C100", /* 7 */
149 NULL, /* 8 */
150 NULL, /* 9 */
151 NULL, /* 10 */
152 NULL, /* 11 */
153 NULL, /* 12 */
154 NULL, /* 13 */
155 NULL, /* 14 */
156 NULL, /* 15 */
157 };
158
159 /* Supported media types. */
160 const int smc91cxx_media[] = {
161 IFM_ETHER|IFM_10_T,
162 IFM_ETHER|IFM_10_5,
163 };
164 #define NSMC91CxxMEDIA (sizeof(smc91cxx_media) / sizeof(smc91cxx_media[0]))
165
166 int smc91cxx_mediachange __P((struct ifnet *));
167 void smc91cxx_mediastatus __P((struct ifnet *, struct ifmediareq *));
168
169 int smc91cxx_set_media __P((struct smc91cxx_softc *, int));
170
171 void smc91cxx_init __P((struct smc91cxx_softc *));
172 void smc91cxx_read __P((struct smc91cxx_softc *));
173 void smc91cxx_reset __P((struct smc91cxx_softc *));
174 void smc91cxx_start __P((struct ifnet *));
175 void smc91cxx_resume __P((struct smc91cxx_softc *));
176 void smc91cxx_stop __P((struct smc91cxx_softc *));
177 void smc91cxx_watchdog __P((struct ifnet *));
178 int smc91cxx_ioctl __P((struct ifnet *, u_long, caddr_t));
179
180 int smc91cxx_enable __P((struct smc91cxx_softc *));
181 void smc91cxx_disable __P((struct smc91cxx_softc *));
182
183 /* XXX Should be in a common header file. */
184 #define ETHER_MAX_LEN 1518
185 #define ETHER_MIN_LEN 64
186 #define ETHER_CRC_LEN 4
187
188 static __inline int ether_cmp __P((void *, void *));
189 static __inline int
190 ether_cmp(va, vb)
191 void *va, *vb;
192 {
193 u_int8_t *a = va;
194 u_int8_t *b = vb;
195
196 return ((a[5] != b[5]) || (a[4] != b[4]) || (a[3] != b[3]) ||
197 (a[2] != b[2]) || (a[1] != b[1]) || (a[0] != b[0]));
198 }
199
200 void
201 smc91cxx_attach(sc, myea)
202 struct smc91cxx_softc *sc;
203 u_int8_t *myea;
204 {
205 struct ifnet *ifp = &sc->sc_ec.ec_if;
206 bus_space_tag_t bst = sc->sc_bst;
207 bus_space_handle_t bsh = sc->sc_bsh;
208 const char *idstr;
209 u_int16_t tmp;
210 u_int8_t enaddr[ETHER_ADDR_LEN];
211 int i, aui;
212
213 /* Make sure the chip is stopped. */
214 smc91cxx_stop(sc);
215
216 SMC_SELECT_BANK(sc, 3);
217 tmp = bus_space_read_2(bst, bsh, REVISION_REG_W);
218 idstr = smc91cxx_idstrs[RR_ID(tmp)];
219 printf("%s: ", sc->sc_dev.dv_xname);
220 if (idstr != NULL)
221 printf("%s, ", idstr);
222 else
223 printf("unknown chip id %d, ", RR_ID(tmp));
224 printf("revision %d\n", RR_REV(tmp));
225
226 /* Read the station address from the chip. */
227 SMC_SELECT_BANK(sc, 1);
228 if (myea == NULL) {
229 myea = enaddr;
230 for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
231 tmp = bus_space_read_2(bst, bsh, IAR_ADDR0_REG_W + i);
232 myea[i + 1] = (tmp >> 8) & 0xff;
233 myea[i] = tmp & 0xff;
234 }
235 }
236 printf("%s: MAC address %s, ", sc->sc_dev.dv_xname,
237 ether_sprintf(myea));
238
239 /* ..and default media. */
240 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
241 printf("default media %s\n", (aui = (tmp & CR_AUI_SELECT)) ?
242 "AUI" : "UTP");
243
244 /* Initialize the ifnet structure. */
245 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
246 ifp->if_softc = sc;
247 ifp->if_start = smc91cxx_start;
248 ifp->if_ioctl = smc91cxx_ioctl;
249 ifp->if_watchdog = smc91cxx_watchdog;
250 ifp->if_flags =
251 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
252
253 /* Attach the interface. */
254 if_attach(ifp);
255 ether_ifattach(ifp, myea);
256
257 /* Initialize the media structures. */
258 ifmedia_init(&sc->sc_media, 0, smc91cxx_mediachange,
259 smc91cxx_mediastatus);
260 for (i = 0; i < NSMC91CxxMEDIA; i++)
261 ifmedia_add(&sc->sc_media, smc91cxx_media[i], 0, NULL);
262 ifmedia_set(&sc->sc_media, IFM_ETHER | (aui ? IFM_10_5 : IFM_10_T));
263
264 #if NBPFILTER > 0
265 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
266 #endif
267
268 #if NRND > 0
269 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET);
270 #endif
271 }
272
273 /*
274 * Change media according to request.
275 */
276 int
277 smc91cxx_mediachange(ifp)
278 struct ifnet *ifp;
279 {
280 struct smc91cxx_softc *sc = ifp->if_softc;
281
282 return (smc91cxx_set_media(sc, sc->sc_media.ifm_media));
283 }
284
285 int
286 smc91cxx_set_media(sc, media)
287 struct smc91cxx_softc *sc;
288 int media;
289 {
290 bus_space_tag_t bst = sc->sc_bst;
291 bus_space_handle_t bsh = sc->sc_bsh;
292 u_int16_t tmp;
293
294 /*
295 * If the interface is not currently powered on, just return.
296 * When it is enabled later, smc91cxx_init() will properly set
297 * up the media for us.
298 */
299 if (sc->sc_enabled == 0)
300 return (0);
301
302 if (IFM_TYPE(media) != IFM_ETHER)
303 return (EINVAL);
304
305 switch (IFM_SUBTYPE(media)) {
306 case IFM_10_T:
307 case IFM_10_5:
308 SMC_SELECT_BANK(sc, 1);
309 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
310 if (IFM_SUBTYPE(media) == IFM_10_5)
311 tmp |= CR_AUI_SELECT;
312 else
313 tmp &= ~CR_AUI_SELECT;
314 bus_space_write_2(bst, bsh, CONFIG_REG_W, tmp);
315 delay(20000); /* XXX is this needed? */
316 break;
317
318 default:
319 return (EINVAL);
320 }
321
322 return (0);
323 }
324
325 /*
326 * Notify the world which media we're using.
327 */
328 void
329 smc91cxx_mediastatus(ifp, ifmr)
330 struct ifnet *ifp;
331 struct ifmediareq *ifmr;
332 {
333 struct smc91cxx_softc *sc = ifp->if_softc;
334 bus_space_tag_t bst = sc->sc_bst;
335 bus_space_handle_t bsh = sc->sc_bsh;
336 u_int16_t tmp;
337
338 if (sc->sc_enabled == 0) {
339 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
340 ifmr->ifm_status = 0;
341 return;
342 }
343
344 SMC_SELECT_BANK(sc, 1);
345 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
346 ifmr->ifm_active =
347 IFM_ETHER | ((tmp & CR_AUI_SELECT) ? IFM_10_5 : IFM_10_T);
348 }
349
350 /*
351 * Reset and initialize the chip.
352 */
353 void
354 smc91cxx_init(sc)
355 struct smc91cxx_softc *sc;
356 {
357 struct ifnet *ifp = &sc->sc_ec.ec_if;
358 bus_space_tag_t bst = sc->sc_bst;
359 bus_space_handle_t bsh = sc->sc_bsh;
360 u_int16_t tmp;
361 u_int8_t *enaddr;
362 int s, i;
363
364 s = splimp();
365
366 /*
367 * This resets the registersmostly to defaults, but doesn't
368 * affect the EEPROM. After the reset cycle, we pause briefly
369 * for the chip to recover.
370 *
371 * XXX how long are we really supposed to delay? --thorpej
372 */
373 SMC_SELECT_BANK(sc, 0);
374 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, RCR_SOFTRESET);
375 delay(100);
376 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
377 delay(200);
378
379 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
380
381 /* Set the Ethernet address. */
382 SMC_SELECT_BANK(sc, 1);
383 enaddr = (u_int8_t *)LLADDR(ifp->if_sadl);
384 for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
385 tmp = enaddr[i + 1] << 8 | enaddr[i];
386 bus_space_write_2(bst, bsh, IAR_ADDR0_REG_W + i, tmp);
387 }
388
389 /*
390 * Set the control register to automatically release successfully
391 * transmitted packets (making the best use of our limited memory)
392 * and enable the EPH interrupt on certain TX errors.
393 */
394 bus_space_write_2(bst, bsh, CONTROL_REG_W, (CTR_AUTO_RELEASE |
395 CTR_TE_ENABLE | CTR_CR_ENABLE | CTR_LE_ENABLE));
396
397 /*
398 * Reset the MMU and wait for it to be un-busy.
399 */
400 SMC_SELECT_BANK(sc, 2);
401 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RESET);
402 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
403 /* XXX bound this loop! */ ;
404
405 /*
406 * Disable all interrupts.
407 */
408 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
409
410 /*
411 * Set current media.
412 */
413 smc91cxx_set_media(sc, sc->sc_media.ifm_cur->ifm_media);
414
415 /*
416 * Set the receive filter. We want receive enable and auto
417 * strip of CRC from received packet. If we are in promisc. mode,
418 * then set that bit as well.
419 *
420 * XXX Initialize multicast filter. For now, we just accept
421 * XXX all multicast.
422 */
423 SMC_SELECT_BANK(sc, 0);
424
425 tmp = RCR_ENABLE | RCR_STRIP_CRC | RCR_ALMUL;
426 if (ifp->if_flags & IFF_PROMISC)
427 tmp |= RCR_PROMISC;
428
429 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, tmp);
430
431 /*
432 * Set transmitter control to "enabled".
433 */
434 tmp = TCR_ENABLE;
435
436 #ifndef SMC91CXX_SW_PAD
437 /*
438 * Enable hardware padding of transmitted packets.
439 * XXX doesn't work?
440 */
441 tmp |= TCR_PAD_ENABLE;
442 #endif
443
444 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, tmp);
445
446 /*
447 * Now, enable interrupts.
448 */
449 SMC_SELECT_BANK(sc, 2);
450
451 bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
452 IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT | IM_TX_INT);
453
454 /* Interface is now running, with no output active. */
455 ifp->if_flags |= IFF_RUNNING;
456 ifp->if_flags &= ~IFF_OACTIVE;
457
458 /*
459 * Attempt to start any pending transmission.
460 */
461 smc91cxx_start(ifp);
462
463 splx(s);
464 }
465
466 /*
467 * Start output on an interface.
468 * Must be called at splimp or interrupt level.
469 */
470 void
471 smc91cxx_start(ifp)
472 struct ifnet *ifp;
473 {
474 struct smc91cxx_softc *sc = ifp->if_softc;
475 bus_space_tag_t bst = sc->sc_bst;
476 bus_space_handle_t bsh = sc->sc_bsh;
477 u_int len;
478 struct mbuf *m, *top;
479 u_int16_t length, npages;
480 u_int8_t packetno;
481 int timo, pad;
482
483 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
484 return;
485
486 again:
487 /*
488 * Peek at the next packet.
489 */
490 if ((m = ifp->if_snd.ifq_head) == NULL)
491 return;
492
493 /*
494 * Compute the frame length and set pad to give an overall even
495 * number of bytes. Below, we assume that the packet length
496 * is even.
497 */
498 for (len = 0, top = m; m != NULL; m = m->m_next)
499 len += m->m_len;
500 pad = (len & 1);
501
502 /*
503 * We drop packets that are too large. Perhaps we should
504 * truncate them instead?
505 */
506 if ((len + pad) > (ETHER_MAX_LEN - ETHER_CRC_LEN)) {
507 printf("%s: large packet discarded\n", sc->sc_dev.dv_xname);
508 ifp->if_oerrors++;
509 IF_DEQUEUE(&ifp->if_snd, m);
510 m_freem(m);
511 goto readcheck;
512 }
513
514 #ifdef SMC91CXX_SW_PAD
515 /*
516 * Not using hardware padding; pad to ETHER_MIN_LEN.
517 */
518 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN))
519 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
520 #endif
521
522 length = pad + len;
523
524 /*
525 * The MMU has a 256 byte page size. The MMU expects us to
526 * ask for "npages - 1". We include space for the status word,
527 * byte count, and control bytes in the allocation request.
528 */
529 npages = (length + 6) >> 8;
530
531 /*
532 * Now allocate the memory.
533 */
534 SMC_SELECT_BANK(sc, 2);
535 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ALLOC | npages);
536
537 timo = MEMORY_WAIT_TIME;
538 do {
539 if (bus_space_read_1(bst, bsh, INTR_STAT_REG_B) & IM_ALLOC_INT)
540 break;
541 delay(1);
542 } while (--timo);
543
544 packetno = bus_space_read_1(bst, bsh, ALLOC_RESULT_REG_B);
545
546 if (packetno & ARR_FAILED || timo == 0) {
547 /*
548 * No transmit memory is available. Record the number
549 * of requestd pages and enable the allocation completion
550 * interrupt. Set up the watchdog timer in case we miss
551 * the interrupt. Mark the interface as active so that
552 * no one else attempts to transmit while we're allocating
553 * memory.
554 */
555 bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
556 bus_space_read_1(bst, bsh, INTR_MASK_REG_B) | IM_ALLOC_INT);
557
558 ifp->if_timer = 5;
559 ifp->if_flags |= IFF_OACTIVE;
560
561 return;
562 }
563
564 /*
565 * We have a packet number - set the data window.
566 */
567 bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno);
568
569 /*
570 * Point to the beginning of the packet.
571 */
572 bus_space_write_2(bst, bsh, POINTER_REG_W, PTR_AUTOINC /* | 0x0000 */);
573
574 /*
575 * Send the packet length (+6 for stats, length, and control bytes)
576 * and the status word (set to zeros).
577 */
578 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
579 bus_space_write_1(bst, bsh, DATA_REG_B, (length + 6) & 0xff);
580 bus_space_write_1(bst, bsh, DATA_REG_B, ((length + 6) >> 8) & 0xff);
581
582 /*
583 * Get the packet from the kernel. This will include the Ethernet
584 * frame header, MAC address, etc.
585 */
586 IF_DEQUEUE(&ifp->if_snd, m);
587
588 /*
589 * Push the packet out to the card.
590 */
591 for (top = m; m != NULL; m = m->m_next) {
592 /* Words... */
593 bus_space_write_multi_2(bst, bsh, DATA_REG_W,
594 mtod(m, u_int16_t *), m->m_len >> 1);
595
596 /* ...and the remaining byte, if any. */
597 if (m->m_len & 1)
598 bus_space_write_1(bst, bsh, DATA_REG_B,
599 *(u_int8_t *)(mtod(m, u_int8_t *) + (m->m_len - 1)));
600 }
601
602 #ifdef SMC91CXX_SW_PAD
603 /*
604 * Push out padding.
605 */
606 while (pad > 1) {
607 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
608 pad -= 2;
609 }
610 if (pad)
611 bus_space_write_1(bst, bsh, DATA_REG_B, 0);
612 #endif
613
614 /*
615 * Push out control byte and unused packet byte. The control byte
616 * is 0, meaning the packet is even lengthed and no special
617 * CRC handling is necessary.
618 */
619 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
620
621 /*
622 * Enable transmit interrupts and let the chip go. Set a watchdog
623 * in case we miss the interrupt.
624 */
625 bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
626 bus_space_read_1(bst, bsh, INTR_MASK_REG_B) |
627 IM_TX_INT | IM_TX_EMPTY_INT);
628
629 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ENQUEUE);
630
631 ifp->if_timer = 5;
632
633 #if NBPFILTER > 0
634 /* Hand off a copy to the bpf. */
635 if (ifp->if_bpf)
636 bpf_mtap(ifp->if_bpf, top);
637 #endif
638
639 ifp->if_opackets++;
640 m_freem(top);
641
642 readcheck:
643 /*
644 * Check for incoming pcakets. We don't want to overflow the small
645 * RX FIFO. If nothing has arrived, attempt to queue another
646 * transmit packet.
647 */
648 if (bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & FIFO_REMPTY)
649 goto again;
650 }
651
652 /*
653 * Interrupt service routine.
654 */
655 int
656 smc91cxx_intr(arg)
657 void *arg;
658 {
659 struct smc91cxx_softc *sc = arg;
660 struct ifnet *ifp = &sc->sc_ec.ec_if;
661 bus_space_tag_t bst = sc->sc_bst;
662 bus_space_handle_t bsh = sc->sc_bsh;
663 u_int8_t mask, interrupts, status;
664 u_int16_t packetno, tx_status, card_stats;
665
666 if (sc->sc_enabled == 0)
667 return (0);
668
669 SMC_SELECT_BANK(sc, 2);
670
671 /*
672 * Obtain the current interrupt mask.
673 */
674 mask = bus_space_read_1(bst, bsh, INTR_MASK_REG_B);
675
676 /*
677 * Get the set of interrupt which occurred and eliminate any
678 * which are not enabled.
679 */
680 interrupts = bus_space_read_1(bst, bsh, INTR_STAT_REG_B);
681 status = interrupts & mask;
682
683 /* Ours? */
684 if (status == 0)
685 return (0);
686
687 /*
688 * It's ours; disable all interrupts while we process them.
689 */
690 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
691
692 /*
693 * Receive overrun interrupts.
694 */
695 if (status & IM_RX_OVRN_INT) {
696 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_RX_OVRN_INT);
697 ifp->if_ierrors++;
698 }
699
700 /*
701 * Receive interrupts.
702 */
703 if (status & IM_RCV_INT) {
704 #if 1 /* DIAGNOSTIC */
705 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
706 if (packetno & FIFO_REMPTY)
707 printf("%s: receive interrupt on empty fifo\n",
708 sc->sc_dev.dv_xname);
709 else
710 #endif
711 smc91cxx_read(sc);
712 }
713
714 /*
715 * Memory allocation interrupts.
716 */
717 if (status & IM_ALLOC_INT) {
718 /* Disable this interrupt. */
719 mask &= ~IM_ALLOC_INT;
720
721 /*
722 * Release the just-allocated memory. We will reallocate
723 * it through the normal start logic.
724 */
725 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
726 /* XXX bound this loop! */ ;
727 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
728
729 ifp->if_flags &= ~IFF_OACTIVE;
730 ifp->if_timer = 0;
731 }
732
733 /*
734 * Transmit complete interrupt. Handle transmission error messages.
735 * This will only be called on error condition because of AUTO RELEASE
736 * mode.
737 */
738 if (status & IM_TX_INT) {
739 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_INT);
740
741 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) &
742 FIFO_TX_MASK;
743
744 /*
745 * Select this as the packet to read from.
746 */
747 bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno);
748
749 /*
750 * Position the pointer to the beginning of the packet.
751 */
752 bus_space_write_2(bst, bsh, POINTER_REG_W,
753 PTR_AUTOINC | PTR_READ /* | 0x0000 */);
754
755 /*
756 * Fetch the TX status word. This will be a copy of
757 * the EPH_STATUS_REG_W at the time of the transmission
758 * failure.
759 */
760 tx_status = bus_space_read_2(bst, bsh, DATA_REG_W);
761
762 if (tx_status & EPHSR_TX_SUC)
763 printf("%s: successful packet caused TX interrupt?!\n",
764 sc->sc_dev.dv_xname);
765 else
766 ifp->if_oerrors++;
767
768 if (tx_status & EPHSR_LATCOL)
769 ifp->if_collisions++;
770
771 /*
772 * Some of these errors disable the transmitter; reenable it.
773 */
774 SMC_SELECT_BANK(sc, 0);
775 #ifdef SMC91CXX_SW_PAD
776 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, TCR_ENABLE);
777 #else
778 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W,
779 TCR_ENABLE | TCR_PAD_ENABLE);
780 #endif
781
782 /*
783 * Kill the failed packet and wait for the MMU to unbusy.
784 */
785 SMC_SELECT_BANK(sc, 2);
786 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
787 /* XXX bound this loop! */ ;
788 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
789
790 ifp->if_timer = 0;
791 }
792
793 /*
794 * Transmit underrun interrupts. We use this opportunity to
795 * update transmit statistics from the card.
796 */
797 if (status & IM_TX_EMPTY_INT) {
798 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_EMPTY_INT);
799
800 /* Disable this interrupt. */
801 mask &= ~IM_TX_EMPTY_INT;
802
803 SMC_SELECT_BANK(sc, 0);
804 card_stats = bus_space_read_2(bst, bsh, COUNTER_REG_W);
805
806 /* Single collisions. */
807 ifp->if_collisions += card_stats & ECR_COLN_MASK;
808
809 /* Multiple collisions. */
810 ifp->if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
811
812 SMC_SELECT_BANK(sc, 2);
813
814 ifp->if_timer = 0;
815 }
816
817 /*
818 * Other errors. Reset the interface.
819 */
820 if (status & IM_EPH_INT) {
821 smc91cxx_stop(sc);
822 smc91cxx_init(sc);
823 }
824
825 /*
826 * Attempt to queue more packets for transmission.
827 */
828 smc91cxx_start(ifp);
829
830 /*
831 * Reenable the interrupts we wish to receive now that processing
832 * is complete.
833 */
834 mask |= bus_space_read_1(bst, bsh, INTR_MASK_REG_B);
835 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, mask);
836
837 #if NRND > 0
838 if (status)
839 rnd_add_uint32(&sc->rnd_source, status);
840 #endif
841
842 return (1);
843 }
844
845 /*
846 * Read a packet from the card and pass it up to the kernel.
847 * NOTE! WE EXPECT TO BE IN REGISTER WINDOW 2!
848 */
849 void
850 smc91cxx_read(sc)
851 struct smc91cxx_softc *sc;
852 {
853 struct ifnet *ifp = &sc->sc_ec.ec_if;
854 bus_space_tag_t bst = sc->sc_bst;
855 bus_space_handle_t bsh = sc->sc_bsh;
856 struct ether_header *eh;
857 struct mbuf *m;
858 u_int16_t status, packetno, packetlen;
859 u_int8_t *data;
860
861 again:
862 /*
863 * Set data pointer to the beginning of the packet. Since
864 * PTR_RCV is set, the packet number will be found automatically
865 * in FIFO_PORTS_REG_W, FIFO_RX_MASK.
866 */
867 bus_space_write_2(bst, bsh, POINTER_REG_W,
868 PTR_READ | PTR_RCV | PTR_AUTOINC /* | 0x0000 */);
869
870 /*
871 * First two words are status and packet length.
872 */
873 status = bus_space_read_2(bst, bsh, DATA_REG_W);
874 packetlen = bus_space_read_2(bst, bsh, DATA_REG_W);
875
876 /*
877 * The packet length includes 3 extra words: status, length,
878 * and an extra word that includes the control byte.
879 */
880 packetlen -= 6;
881
882 /*
883 * Account for receive errors and discard.
884 */
885 if (status & RS_ERRORS) {
886 ifp->if_ierrors++;
887 goto out;
888 }
889
890 /*
891 * Adjust for odd-length packet.
892 */
893 if (status & RS_ODDFRAME)
894 packetlen++;
895
896 /*
897 * Allocate a header mbuf.
898 */
899 MGETHDR(m, M_DONTWAIT, MT_DATA);
900 if (m == NULL)
901 goto out;
902
903 m->m_pkthdr.rcvif = ifp;
904 m->m_pkthdr.len = m->m_len = packetlen;
905
906 /*
907 * Always put the packet in a cluster.
908 * XXX should chain small mbufs if less than threshold.
909 */
910 MCLGET(m, M_DONTWAIT);
911 if ((m->m_flags & M_EXT) == 0) {
912 m_freem(m);
913 ifp->if_ierrors++;
914 printf("%s: can't allocate cluster for incoming packet\n",
915 sc->sc_dev.dv_xname);
916 goto out;
917 }
918
919 /*
920 * Pull the packet off the interface.
921 */
922 eh = mtod(m, struct ether_header *);
923 data = mtod(m, u_int8_t *);
924 bus_space_read_multi_2(bst, bsh, DATA_REG_W, (u_int16_t *)data,
925 packetlen >> 1);
926 if (packetlen & 1) {
927 data += packetlen & ~1;
928 *data = bus_space_read_1(bst, bsh, DATA_REG_B);
929 }
930
931 ifp->if_ipackets++;
932
933 #if NBPFILTER > 0
934 /*
935 * Hand the packet off to bpf listeners. If there's a bpf listener,
936 * we need to check if the packet is ours.
937 */
938 if (ifp->if_bpf) {
939 bpf_mtap(ifp->if_bpf, m);
940
941 if ((ifp->if_flags & IFF_PROMISC) &&
942 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
943 ether_cmp(eh->ether_dhost, LLADDR(ifp->if_sadl))) {
944 m_freem(m);
945 goto out;
946 }
947 }
948 #endif
949
950 /*
951 * Strip the ethernet header.
952 */
953 m->m_pkthdr.len = m->m_len = packetlen - sizeof(struct ether_header);
954 m->m_data += sizeof(struct ether_header);
955
956 ether_input(ifp, eh, m);
957
958 out:
959 /*
960 * Tell the card to free the memory occupied by this packet.
961 */
962 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
963 /* XXX bound this loop! */ ;
964 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RELEASE);
965
966 /*
967 * Check for another packet.
968 */
969 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
970 if (packetno & FIFO_REMPTY)
971 return;
972 goto again;
973 }
974
975 /*
976 * Process an ioctl request.
977 */
978 int
979 smc91cxx_ioctl(ifp, cmd, data)
980 struct ifnet *ifp;
981 u_long cmd;
982 caddr_t data;
983 {
984 struct smc91cxx_softc *sc = ifp->if_softc;
985 struct ifaddr *ifa = (struct ifaddr *)data;
986 struct ifreq *ifr = (struct ifreq *)data;
987 int s, error = 0;
988
989 s = splimp();
990
991 switch (cmd) {
992 case SIOCSIFADDR:
993 if ((error = smc91cxx_enable(sc)) != 0)
994 break;
995 ifp->if_flags |= IFF_UP;
996 switch (ifa->ifa_addr->sa_family) {
997 #ifdef INET
998 case AF_INET:
999 smc91cxx_init(sc);
1000 arp_ifinit(ifp, ifa);
1001 break;
1002 #endif
1003 #ifdef NS
1004 case AF_NS:
1005 {
1006 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1007
1008 if (ns_nullhost(*ina))
1009 ina->x_host =
1010 *(union ns_host *)LLADDR(ifp->if_sadl);
1011 else {
1012 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1013 ETHER_ADDR_LEN);
1014 }
1015
1016 /*
1017 * Set new address. Reset, because the receiver
1018 * has to be stopped before we can set the new
1019 * MAC address.
1020 */
1021 smc91cxx_reset(sc);
1022 break;
1023 }
1024 #endif
1025 default:
1026 smc91cxx_init(sc);
1027 break;
1028 }
1029 break;
1030
1031 #if defined(CCITT) && defined(LLC)
1032 case SIOCSIFCONF_X25:
1033 if ((error = smc91cxx_enable(sc)) != 0)
1034 break;
1035 ifp->if_flags |= IFF_UP;
1036 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */
1037 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr);
1038 if (error == 0)
1039 smc91cxx_init(sc);
1040 break;
1041 #endif
1042
1043 case SIOCSIFFLAGS:
1044 if ((ifp->if_flags & IFF_UP) == 0 &&
1045 (ifp->if_flags & IFF_RUNNING) != 0) {
1046 /*
1047 * If interface is marked down and it is running,
1048 * stop it.
1049 */
1050 smc91cxx_stop(sc);
1051 ifp->if_flags &= ~IFF_RUNNING;
1052 smc91cxx_disable(sc);
1053 } else if ((ifp->if_flags & IFF_UP) != 0 &&
1054 (ifp->if_flags & IFF_RUNNING) == 0) {
1055 /*
1056 * If interface is marked up and it is stopped,
1057 * start it.
1058 */
1059 if ((error = smc91cxx_enable(sc)) != 0)
1060 break;
1061 smc91cxx_init(sc);
1062 } else if (sc->sc_enabled) {
1063 /*
1064 * Reset the interface to pick up changes in any
1065 * other flags that affect hardware registers.
1066 */
1067 smc91cxx_reset(sc);
1068 }
1069 break;
1070
1071 case SIOCADDMULTI:
1072 case SIOCDELMULTI:
1073 if (sc->sc_enabled == 0) {
1074 error = EIO;
1075 break;
1076 }
1077
1078 error = (cmd == SIOCADDMULTI) ?
1079 ether_addmulti(ifr, &sc->sc_ec) :
1080 ether_delmulti(ifr, &sc->sc_ec);
1081 if (error == ENETRESET) {
1082 /*
1083 * Multicast list has changed; set the hardware
1084 * filter accordingly.
1085 */
1086 smc91cxx_reset(sc);
1087 error = 0;
1088 }
1089 break;
1090
1091 case SIOCGIFMEDIA:
1092 case SIOCSIFMEDIA:
1093 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
1094 break;
1095
1096 default:
1097 error = EINVAL;
1098 break;
1099 }
1100
1101 splx(s);
1102 return (error);
1103 }
1104
1105 /*
1106 * Reset the interface.
1107 */
1108 void
1109 smc91cxx_reset(sc)
1110 struct smc91cxx_softc *sc;
1111 {
1112 int s;
1113
1114 s = splimp();
1115 smc91cxx_stop(sc);
1116 smc91cxx_init(sc);
1117 splx(s);
1118 }
1119
1120 /*
1121 * Watchdog timer.
1122 */
1123 void
1124 smc91cxx_watchdog(ifp)
1125 struct ifnet *ifp;
1126 {
1127 struct smc91cxx_softc *sc = ifp->if_softc;
1128
1129 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1130 ifp->if_oerrors++;
1131 smc91cxx_reset(sc);
1132 }
1133
1134 /*
1135 * Stop output on the interface.
1136 */
1137 void
1138 smc91cxx_stop(sc)
1139 struct smc91cxx_softc *sc;
1140 {
1141 bus_space_tag_t bst = sc->sc_bst;
1142 bus_space_handle_t bsh = sc->sc_bsh;
1143
1144 /*
1145 * Clear interrupt mask; disable all interrupts.
1146 */
1147 SMC_SELECT_BANK(sc, 2);
1148 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
1149
1150 /*
1151 * Disable transmitter and receiver.
1152 */
1153 SMC_SELECT_BANK(sc, 0);
1154 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
1155 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
1156
1157 /*
1158 * Cancel watchdog timer.
1159 */
1160 sc->sc_ec.ec_if.if_timer = 0;
1161 }
1162
1163 /*
1164 * Enable power on the interface.
1165 */
1166 int
1167 smc91cxx_enable(sc)
1168 struct smc91cxx_softc *sc;
1169 {
1170
1171 if (sc->sc_enabled == 0 && sc->sc_enable != NULL) {
1172 if ((*sc->sc_enable)(sc) != 0) {
1173 printf("%s: device enable failed\n",
1174 sc->sc_dev.dv_xname);
1175 return (EIO);
1176 }
1177 }
1178
1179 sc->sc_enabled = 1;
1180 return (0);
1181 }
1182
1183 /*
1184 * Disable power on the interface.
1185 */
1186 void
1187 smc91cxx_disable(sc)
1188 struct smc91cxx_softc *sc;
1189 {
1190
1191 if (sc->sc_enabled != 0 && sc->sc_disable != NULL) {
1192 (*sc->sc_disable)(sc);
1193 sc->sc_enabled = 0;
1194 }
1195 }
1196