smc91cxx.c revision 1.8 1 /* $NetBSD: smc91cxx.c,v 1.8 1998/07/05 02:12:30 jonathan Exp $ */
2
3 /*-
4 * Copyright (c) 1997 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 /*
41 * Copyright (c) 1996 Gardner Buchanan <gbuchanan (at) shl.com>
42 * All rights reserved.
43 *
44 * Redistribution and use in source and binary forms, with or without
45 * modification, are permitted provided that the following conditions
46 * are met:
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. All advertising materials mentioning features or use of this software
53 * must display the following acknowledgement:
54 * This product includes software developed by Gardner Buchanan.
55 * 4. The name of Gardner Buchanan may not be used to endorse or promote
56 * products derived from this software without specific prior written
57 * permission.
58 *
59 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
60 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
61 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
63 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
64 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
65 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
66 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
68 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
69 *
70 * from FreeBSD Id: if_sn.c,v 1.4 1996/03/18 15:47:16 gardner Exp
71 */
72
73 /*
74 * Core driver for the SMC 91Cxx family of Ethernet chips.
75 *
76 * Memory allocation interrupt logic is drived from an SMC 91C90 driver
77 * written for NetBSD/amiga by Michael Hitch.
78 */
79
80 #include "opt_inet.h"
81 #include "opt_ccitt.h"
82 #include "bpfilter.h"
83 #include "rnd.h"
84
85 #include <sys/param.h>
86 #include <sys/systm.h>
87 #include <sys/mbuf.h>
88 #include <sys/syslog.h>
89 #include <sys/socket.h>
90 #include <sys/device.h>
91 #include <sys/malloc.h>
92 #include <sys/ioctl.h>
93 #include <sys/errno.h>
94 #if NRND > 0
95 #include <sys/rnd.h>
96 #endif
97
98 #include <machine/bus.h>
99 #include <machine/intr.h>
100
101 #include <net/if.h>
102 #include <net/if_dl.h>
103 #include <net/if_ether.h>
104 #include <net/if_media.h>
105
106 #ifdef INET
107 #include <netinet/in.h>
108 #include <netinet/if_inarp.h>
109 #include <netinet/in_systm.h>
110 #include <netinet/in_var.h>
111 #include <netinet/ip.h>
112 #endif
113
114 #ifdef NS
115 #include <netns/ns.h>
116 #include <netns/ns_if.h>
117 #endif
118
119 #if defined(CCITT) && defined(LLC)
120 #include <sys/socketvar.h>
121 #include <netccitt/x25.h>
122 #include <netccitt/pk.h>
123 #include <netccitt/pk_var.h>
124 #include <netccitt/pk_extern.h>
125 #endif
126
127 #if NBPFILTER > 0
128 #include <net/bpf.h>
129 #include <net/bpfdesc.h>
130 #endif
131
132 #include <dev/ic/smc91cxxreg.h>
133 #include <dev/ic/smc91cxxvar.h>
134
135 /* XXX Hardware padding doesn't work yet(?) */
136 #define SMC91CXX_SW_PAD
137
138 const char *smc91cxx_idstrs[] = {
139 NULL, /* 0 */
140 NULL, /* 1 */
141 NULL, /* 2 */
142 "SMC91C90/91C92", /* 3 */
143 "SMC91C94", /* 4 */
144 "SMC91C95", /* 5 */
145 NULL, /* 6 */
146 "SMC91C100", /* 7 */
147 NULL, /* 8 */
148 NULL, /* 9 */
149 NULL, /* 10 */
150 NULL, /* 11 */
151 NULL, /* 12 */
152 NULL, /* 13 */
153 NULL, /* 14 */
154 NULL, /* 15 */
155 };
156
157 /* Supported media types. */
158 const int smc91cxx_media[] = {
159 IFM_ETHER|IFM_10_T,
160 IFM_ETHER|IFM_10_5,
161 };
162 #define NSMC91CxxMEDIA (sizeof(smc91cxx_media) / sizeof(smc91cxx_media[0]))
163
164 int smc91cxx_mediachange __P((struct ifnet *));
165 void smc91cxx_mediastatus __P((struct ifnet *, struct ifmediareq *));
166
167 int smc91cxx_set_media __P((struct smc91cxx_softc *, int));
168
169 void smc91cxx_init __P((struct smc91cxx_softc *));
170 void smc91cxx_read __P((struct smc91cxx_softc *));
171 void smc91cxx_reset __P((struct smc91cxx_softc *));
172 void smc91cxx_start __P((struct ifnet *));
173 void smc91cxx_resume __P((struct smc91cxx_softc *));
174 void smc91cxx_stop __P((struct smc91cxx_softc *));
175 void smc91cxx_watchdog __P((struct ifnet *));
176 int smc91cxx_ioctl __P((struct ifnet *, u_long, caddr_t));
177
178 int smc91cxx_enable __P((struct smc91cxx_softc *));
179 void smc91cxx_disable __P((struct smc91cxx_softc *));
180
181 /* XXX Should be in a common header file. */
182 #define ETHER_MAX_LEN 1518
183 #define ETHER_MIN_LEN 64
184 #define ETHER_CRC_LEN 4
185
186 static __inline int ether_cmp __P((void *, void *));
187 static __inline int
188 ether_cmp(va, vb)
189 void *va, *vb;
190 {
191 u_int8_t *a = va;
192 u_int8_t *b = vb;
193
194 return ((a[5] != b[5]) || (a[4] != b[4]) || (a[3] != b[3]) ||
195 (a[2] != b[2]) || (a[1] != b[1]) || (a[0] != b[0]));
196 }
197
198 void
199 smc91cxx_attach(sc, myea)
200 struct smc91cxx_softc *sc;
201 u_int8_t *myea;
202 {
203 struct ifnet *ifp = &sc->sc_ec.ec_if;
204 bus_space_tag_t bst = sc->sc_bst;
205 bus_space_handle_t bsh = sc->sc_bsh;
206 const char *idstr;
207 u_int16_t tmp;
208 u_int8_t enaddr[ETHER_ADDR_LEN];
209 int i, aui;
210
211 /* Make sure the chip is stopped. */
212 smc91cxx_stop(sc);
213
214 SMC_SELECT_BANK(sc, 3);
215 tmp = bus_space_read_2(bst, bsh, REVISION_REG_W);
216 idstr = smc91cxx_idstrs[RR_ID(tmp)];
217 printf("%s: ", sc->sc_dev.dv_xname);
218 if (idstr != NULL)
219 printf("%s, ", idstr);
220 else
221 printf("unknown chip id %d, ", RR_ID(tmp));
222 printf("revision %d\n", RR_REV(tmp));
223
224 /* Read the station address from the chip. */
225 SMC_SELECT_BANK(sc, 1);
226 if (myea == NULL) {
227 myea = enaddr;
228 for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
229 tmp = bus_space_read_2(bst, bsh, IAR_ADDR0_REG_W + i);
230 myea[i + 1] = (tmp >> 8) & 0xff;
231 myea[i] = tmp & 0xff;
232 }
233 }
234 printf("%s: MAC address %s, ", sc->sc_dev.dv_xname,
235 ether_sprintf(myea));
236
237 /* ..and default media. */
238 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
239 printf("default media %s\n", (aui = (tmp & CR_AUI_SELECT)) ?
240 "AUI" : "UTP");
241
242 /* Initialize the ifnet structure. */
243 bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
244 ifp->if_softc = sc;
245 ifp->if_start = smc91cxx_start;
246 ifp->if_ioctl = smc91cxx_ioctl;
247 ifp->if_watchdog = smc91cxx_watchdog;
248 ifp->if_flags =
249 IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
250
251 /* Attach the interface. */
252 if_attach(ifp);
253 ether_ifattach(ifp, myea);
254
255 /* Initialize the media structures. */
256 ifmedia_init(&sc->sc_media, 0, smc91cxx_mediachange,
257 smc91cxx_mediastatus);
258 for (i = 0; i < NSMC91CxxMEDIA; i++)
259 ifmedia_add(&sc->sc_media, smc91cxx_media[i], 0, NULL);
260 ifmedia_set(&sc->sc_media, IFM_ETHER | (aui ? IFM_10_5 : IFM_10_T));
261
262 #if NBPFILTER > 0
263 bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
264 #endif
265
266 #if NRND > 0
267 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET);
268 #endif
269 }
270
271 /*
272 * Change media according to request.
273 */
274 int
275 smc91cxx_mediachange(ifp)
276 struct ifnet *ifp;
277 {
278 struct smc91cxx_softc *sc = ifp->if_softc;
279
280 return (smc91cxx_set_media(sc, sc->sc_media.ifm_media));
281 }
282
283 int
284 smc91cxx_set_media(sc, media)
285 struct smc91cxx_softc *sc;
286 int media;
287 {
288 bus_space_tag_t bst = sc->sc_bst;
289 bus_space_handle_t bsh = sc->sc_bsh;
290 u_int16_t tmp;
291
292 /*
293 * If the interface is not currently powered on, just return.
294 * When it is enabled later, smc91cxx_init() will properly set
295 * up the media for us.
296 */
297 if (sc->sc_enabled == 0)
298 return (0);
299
300 if (IFM_TYPE(media) != IFM_ETHER)
301 return (EINVAL);
302
303 switch (IFM_SUBTYPE(media)) {
304 case IFM_10_T:
305 case IFM_10_5:
306 SMC_SELECT_BANK(sc, 1);
307 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
308 if (IFM_SUBTYPE(media) == IFM_10_5)
309 tmp |= CR_AUI_SELECT;
310 else
311 tmp &= ~CR_AUI_SELECT;
312 bus_space_write_2(bst, bsh, CONFIG_REG_W, tmp);
313 delay(20000); /* XXX is this needed? */
314 break;
315
316 default:
317 return (EINVAL);
318 }
319
320 return (0);
321 }
322
323 /*
324 * Notify the world which media we're using.
325 */
326 void
327 smc91cxx_mediastatus(ifp, ifmr)
328 struct ifnet *ifp;
329 struct ifmediareq *ifmr;
330 {
331 struct smc91cxx_softc *sc = ifp->if_softc;
332 bus_space_tag_t bst = sc->sc_bst;
333 bus_space_handle_t bsh = sc->sc_bsh;
334 u_int16_t tmp;
335
336 if (sc->sc_enabled == 0) {
337 ifmr->ifm_active = IFM_ETHER | IFM_NONE;
338 ifmr->ifm_status = 0;
339 return;
340 }
341
342 SMC_SELECT_BANK(sc, 1);
343 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
344 ifmr->ifm_active =
345 IFM_ETHER | ((tmp & CR_AUI_SELECT) ? IFM_10_5 : IFM_10_T);
346 }
347
348 /*
349 * Reset and initialize the chip.
350 */
351 void
352 smc91cxx_init(sc)
353 struct smc91cxx_softc *sc;
354 {
355 struct ifnet *ifp = &sc->sc_ec.ec_if;
356 bus_space_tag_t bst = sc->sc_bst;
357 bus_space_handle_t bsh = sc->sc_bsh;
358 u_int16_t tmp;
359 u_int8_t *enaddr;
360 int s, i;
361
362 s = splimp();
363
364 /*
365 * This resets the registersmostly to defaults, but doesn't
366 * affect the EEPROM. After the reset cycle, we pause briefly
367 * for the chip to recover.
368 *
369 * XXX how long are we really supposed to delay? --thorpej
370 */
371 SMC_SELECT_BANK(sc, 0);
372 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, RCR_SOFTRESET);
373 delay(100);
374 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
375 delay(200);
376
377 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
378
379 /* Set the Ethernet address. */
380 SMC_SELECT_BANK(sc, 1);
381 enaddr = (u_int8_t *)LLADDR(ifp->if_sadl);
382 for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
383 tmp = enaddr[i + 1] << 8 | enaddr[i];
384 bus_space_write_2(bst, bsh, IAR_ADDR0_REG_W + i, tmp);
385 }
386
387 /*
388 * Set the control register to automatically release successfully
389 * transmitted packets (making the best use of our limited memory)
390 * and enable the EPH interrupt on certain TX errors.
391 */
392 bus_space_write_2(bst, bsh, CONTROL_REG_W, (CTR_AUTO_RELEASE |
393 CTR_TE_ENABLE | CTR_CR_ENABLE | CTR_LE_ENABLE));
394
395 /*
396 * Reset the MMU and wait for it to be un-busy.
397 */
398 SMC_SELECT_BANK(sc, 2);
399 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RESET);
400 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
401 /* XXX bound this loop! */ ;
402
403 /*
404 * Disable all interrupts.
405 */
406 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
407
408 /*
409 * Set current media.
410 */
411 smc91cxx_set_media(sc, sc->sc_media.ifm_cur->ifm_media);
412
413 /*
414 * Set the receive filter. We want receive enable and auto
415 * strip of CRC from received packet. If we are in promisc. mode,
416 * then set that bit as well.
417 *
418 * XXX Initialize multicast filter. For now, we just accept
419 * XXX all multicast.
420 */
421 SMC_SELECT_BANK(sc, 0);
422
423 tmp = RCR_ENABLE | RCR_STRIP_CRC | RCR_ALMUL;
424 if (ifp->if_flags & IFF_PROMISC)
425 tmp |= RCR_PROMISC;
426
427 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, tmp);
428
429 /*
430 * Set transmitter control to "enabled".
431 */
432 tmp = TCR_ENABLE;
433
434 #ifndef SMC91CXX_SW_PAD
435 /*
436 * Enable hardware padding of transmitted packets.
437 * XXX doesn't work?
438 */
439 tmp |= TCR_PAD_ENABLE;
440 #endif
441
442 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, tmp);
443
444 /*
445 * Now, enable interrupts.
446 */
447 SMC_SELECT_BANK(sc, 2);
448
449 bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
450 IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT | IM_TX_INT);
451
452 /* Interface is now running, with no output active. */
453 ifp->if_flags |= IFF_RUNNING;
454 ifp->if_flags &= ~IFF_OACTIVE;
455
456 /*
457 * Attempt to start any pending transmission.
458 */
459 smc91cxx_start(ifp);
460
461 splx(s);
462 }
463
464 /*
465 * Start output on an interface.
466 * Must be called at splimp or interrupt level.
467 */
468 void
469 smc91cxx_start(ifp)
470 struct ifnet *ifp;
471 {
472 struct smc91cxx_softc *sc = ifp->if_softc;
473 bus_space_tag_t bst = sc->sc_bst;
474 bus_space_handle_t bsh = sc->sc_bsh;
475 u_int len;
476 struct mbuf *m, *top;
477 u_int16_t length, npages;
478 u_int8_t packetno;
479 int timo, pad;
480
481 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
482 return;
483
484 again:
485 /*
486 * Peek at the next packet.
487 */
488 if ((m = ifp->if_snd.ifq_head) == NULL)
489 return;
490
491 /*
492 * Compute the frame length and set pad to give an overall even
493 * number of bytes. Below, we assume that the packet length
494 * is even.
495 */
496 for (len = 0, top = m; m != NULL; m = m->m_next)
497 len += m->m_len;
498 pad = (len & 1);
499
500 /*
501 * We drop packets that are too large. Perhaps we should
502 * truncate them instead?
503 */
504 if ((len + pad) > (ETHER_MAX_LEN - ETHER_CRC_LEN)) {
505 printf("%s: large packet discarded\n", sc->sc_dev.dv_xname);
506 ifp->if_oerrors++;
507 IF_DEQUEUE(&ifp->if_snd, m);
508 m_freem(m);
509 goto readcheck;
510 }
511
512 #ifdef SMC91CXX_SW_PAD
513 /*
514 * Not using hardware padding; pad to ETHER_MIN_LEN.
515 */
516 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN))
517 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
518 #endif
519
520 length = pad + len;
521
522 /*
523 * The MMU has a 256 byte page size. The MMU expects us to
524 * ask for "npages - 1". We include space for the status word,
525 * byte count, and control bytes in the allocation request.
526 */
527 npages = (length + 6) >> 8;
528
529 /*
530 * Now allocate the memory.
531 */
532 SMC_SELECT_BANK(sc, 2);
533 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ALLOC | npages);
534
535 timo = MEMORY_WAIT_TIME;
536 do {
537 if (bus_space_read_1(bst, bsh, INTR_STAT_REG_B) & IM_ALLOC_INT)
538 break;
539 delay(1);
540 } while (--timo);
541
542 packetno = bus_space_read_1(bst, bsh, ALLOC_RESULT_REG_B);
543
544 if (packetno & ARR_FAILED || timo == 0) {
545 /*
546 * No transmit memory is available. Record the number
547 * of requestd pages and enable the allocation completion
548 * interrupt. Set up the watchdog timer in case we miss
549 * the interrupt. Mark the interface as active so that
550 * no one else attempts to transmit while we're allocating
551 * memory.
552 */
553 bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
554 bus_space_read_1(bst, bsh, INTR_MASK_REG_B) | IM_ALLOC_INT);
555
556 ifp->if_timer = 5;
557 ifp->if_flags |= IFF_OACTIVE;
558
559 return;
560 }
561
562 /*
563 * We have a packet number - set the data window.
564 */
565 bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno);
566
567 /*
568 * Point to the beginning of the packet.
569 */
570 bus_space_write_2(bst, bsh, POINTER_REG_W, PTR_AUTOINC /* | 0x0000 */);
571
572 /*
573 * Send the packet length (+6 for stats, length, and control bytes)
574 * and the status word (set to zeros).
575 */
576 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
577 bus_space_write_1(bst, bsh, DATA_REG_B, (length + 6) & 0xff);
578 bus_space_write_1(bst, bsh, DATA_REG_B, ((length + 6) >> 8) & 0xff);
579
580 /*
581 * Get the packet from the kernel. This will include the Ethernet
582 * frame header, MAC address, etc.
583 */
584 IF_DEQUEUE(&ifp->if_snd, m);
585
586 /*
587 * Push the packet out to the card.
588 */
589 for (top = m; m != NULL; m = m->m_next) {
590 /* Words... */
591 bus_space_write_multi_2(bst, bsh, DATA_REG_W,
592 mtod(m, u_int16_t *), m->m_len >> 1);
593
594 /* ...and the remaining byte, if any. */
595 if (m->m_len & 1)
596 bus_space_write_1(bst, bsh, DATA_REG_B,
597 *(u_int8_t *)(mtod(m, u_int8_t *) + (m->m_len - 1)));
598 }
599
600 #ifdef SMC91CXX_SW_PAD
601 /*
602 * Push out padding.
603 */
604 while (pad > 1) {
605 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
606 pad -= 2;
607 }
608 if (pad)
609 bus_space_write_1(bst, bsh, DATA_REG_B, 0);
610 #endif
611
612 /*
613 * Push out control byte and unused packet byte. The control byte
614 * is 0, meaning the packet is even lengthed and no special
615 * CRC handling is necessary.
616 */
617 bus_space_write_2(bst, bsh, DATA_REG_W, 0);
618
619 /*
620 * Enable transmit interrupts and let the chip go. Set a watchdog
621 * in case we miss the interrupt.
622 */
623 bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
624 bus_space_read_1(bst, bsh, INTR_MASK_REG_B) |
625 IM_TX_INT | IM_TX_EMPTY_INT);
626
627 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ENQUEUE);
628
629 ifp->if_timer = 5;
630
631 #if NBPFILTER > 0
632 /* Hand off a copy to the bpf. */
633 if (ifp->if_bpf)
634 bpf_mtap(ifp->if_bpf, top);
635 #endif
636
637 ifp->if_opackets++;
638 m_freem(top);
639
640 readcheck:
641 /*
642 * Check for incoming pcakets. We don't want to overflow the small
643 * RX FIFO. If nothing has arrived, attempt to queue another
644 * transmit packet.
645 */
646 if (bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & FIFO_REMPTY)
647 goto again;
648 }
649
650 /*
651 * Interrupt service routine.
652 */
653 int
654 smc91cxx_intr(arg)
655 void *arg;
656 {
657 struct smc91cxx_softc *sc = arg;
658 struct ifnet *ifp = &sc->sc_ec.ec_if;
659 bus_space_tag_t bst = sc->sc_bst;
660 bus_space_handle_t bsh = sc->sc_bsh;
661 u_int8_t mask, interrupts, status;
662 u_int16_t packetno, tx_status, card_stats;
663
664 if (sc->sc_enabled == 0)
665 return (0);
666
667 SMC_SELECT_BANK(sc, 2);
668
669 /*
670 * Obtain the current interrupt mask.
671 */
672 mask = bus_space_read_1(bst, bsh, INTR_MASK_REG_B);
673
674 /*
675 * Get the set of interrupt which occurred and eliminate any
676 * which are not enabled.
677 */
678 interrupts = bus_space_read_1(bst, bsh, INTR_STAT_REG_B);
679 status = interrupts & mask;
680
681 /* Ours? */
682 if (status == 0)
683 return (0);
684
685 /*
686 * It's ours; disable all interrupts while we process them.
687 */
688 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
689
690 /*
691 * Receive overrun interrupts.
692 */
693 if (status & IM_RX_OVRN_INT) {
694 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_RX_OVRN_INT);
695 ifp->if_ierrors++;
696 }
697
698 /*
699 * Receive interrupts.
700 */
701 if (status & IM_RCV_INT) {
702 #if 1 /* DIAGNOSTIC */
703 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
704 if (packetno & FIFO_REMPTY)
705 printf("%s: receive interrupt on empty fifo\n",
706 sc->sc_dev.dv_xname);
707 else
708 #endif
709 smc91cxx_read(sc);
710 }
711
712 /*
713 * Memory allocation interrupts.
714 */
715 if (status & IM_ALLOC_INT) {
716 /* Disable this interrupt. */
717 mask &= ~IM_ALLOC_INT;
718
719 /*
720 * Release the just-allocated memory. We will reallocate
721 * it through the normal start logic.
722 */
723 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
724 /* XXX bound this loop! */ ;
725 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
726
727 ifp->if_flags &= ~IFF_OACTIVE;
728 ifp->if_timer = 0;
729 }
730
731 /*
732 * Transmit complete interrupt. Handle transmission error messages.
733 * This will only be called on error condition because of AUTO RELEASE
734 * mode.
735 */
736 if (status & IM_TX_INT) {
737 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_INT);
738
739 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) &
740 FIFO_TX_MASK;
741
742 /*
743 * Select this as the packet to read from.
744 */
745 bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno);
746
747 /*
748 * Position the pointer to the beginning of the packet.
749 */
750 bus_space_write_2(bst, bsh, POINTER_REG_W,
751 PTR_AUTOINC | PTR_READ /* | 0x0000 */);
752
753 /*
754 * Fetch the TX status word. This will be a copy of
755 * the EPH_STATUS_REG_W at the time of the transmission
756 * failure.
757 */
758 tx_status = bus_space_read_2(bst, bsh, DATA_REG_W);
759
760 if (tx_status & EPHSR_TX_SUC)
761 printf("%s: successful packet caused TX interrupt?!\n",
762 sc->sc_dev.dv_xname);
763 else
764 ifp->if_oerrors++;
765
766 if (tx_status & EPHSR_LATCOL)
767 ifp->if_collisions++;
768
769 /*
770 * Some of these errors disable the transmitter; reenable it.
771 */
772 SMC_SELECT_BANK(sc, 0);
773 #ifdef SMC91CXX_SW_PAD
774 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, TCR_ENABLE);
775 #else
776 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W,
777 TCR_ENABLE | TCR_PAD_ENABLE);
778 #endif
779
780 /*
781 * Kill the failed packet and wait for the MMU to unbusy.
782 */
783 SMC_SELECT_BANK(sc, 2);
784 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
785 /* XXX bound this loop! */ ;
786 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
787
788 ifp->if_timer = 0;
789 }
790
791 /*
792 * Transmit underrun interrupts. We use this opportunity to
793 * update transmit statistics from the card.
794 */
795 if (status & IM_TX_EMPTY_INT) {
796 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_EMPTY_INT);
797
798 /* Disable this interrupt. */
799 mask &= ~IM_TX_EMPTY_INT;
800
801 SMC_SELECT_BANK(sc, 0);
802 card_stats = bus_space_read_2(bst, bsh, COUNTER_REG_W);
803
804 /* Single collisions. */
805 ifp->if_collisions += card_stats & ECR_COLN_MASK;
806
807 /* Multiple collisions. */
808 ifp->if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
809
810 SMC_SELECT_BANK(sc, 2);
811
812 ifp->if_timer = 0;
813 }
814
815 /*
816 * Other errors. Reset the interface.
817 */
818 if (status & IM_EPH_INT) {
819 smc91cxx_stop(sc);
820 smc91cxx_init(sc);
821 }
822
823 /*
824 * Attempt to queue more packets for transmission.
825 */
826 smc91cxx_start(ifp);
827
828 /*
829 * Reenable the interrupts we wish to receive now that processing
830 * is complete.
831 */
832 mask |= bus_space_read_1(bst, bsh, INTR_MASK_REG_B);
833 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, mask);
834
835 #if NRND > 0
836 if (status)
837 rnd_add_uint32(&sc->rnd_source, status);
838 #endif
839
840 return (1);
841 }
842
843 /*
844 * Read a packet from the card and pass it up to the kernel.
845 * NOTE! WE EXPECT TO BE IN REGISTER WINDOW 2!
846 */
847 void
848 smc91cxx_read(sc)
849 struct smc91cxx_softc *sc;
850 {
851 struct ifnet *ifp = &sc->sc_ec.ec_if;
852 bus_space_tag_t bst = sc->sc_bst;
853 bus_space_handle_t bsh = sc->sc_bsh;
854 struct ether_header *eh;
855 struct mbuf *m;
856 u_int16_t status, packetno, packetlen;
857 u_int8_t *data;
858
859 again:
860 /*
861 * Set data pointer to the beginning of the packet. Since
862 * PTR_RCV is set, the packet number will be found automatically
863 * in FIFO_PORTS_REG_W, FIFO_RX_MASK.
864 */
865 bus_space_write_2(bst, bsh, POINTER_REG_W,
866 PTR_READ | PTR_RCV | PTR_AUTOINC /* | 0x0000 */);
867
868 /*
869 * First two words are status and packet length.
870 */
871 status = bus_space_read_2(bst, bsh, DATA_REG_W);
872 packetlen = bus_space_read_2(bst, bsh, DATA_REG_W);
873
874 /*
875 * The packet length includes 3 extra words: status, length,
876 * and an extra word that includes the control byte.
877 */
878 packetlen -= 6;
879
880 /*
881 * Account for receive errors and discard.
882 */
883 if (status & RS_ERRORS) {
884 ifp->if_ierrors++;
885 goto out;
886 }
887
888 /*
889 * Adjust for odd-length packet.
890 */
891 if (status & RS_ODDFRAME)
892 packetlen++;
893
894 /*
895 * Allocate a header mbuf.
896 */
897 MGETHDR(m, M_DONTWAIT, MT_DATA);
898 if (m == NULL)
899 goto out;
900
901 m->m_pkthdr.rcvif = ifp;
902 m->m_pkthdr.len = m->m_len = packetlen;
903
904 /*
905 * Always put the packet in a cluster.
906 * XXX should chain small mbufs if less than threshold.
907 */
908 MCLGET(m, M_DONTWAIT);
909 if ((m->m_flags & M_EXT) == 0) {
910 m_freem(m);
911 ifp->if_ierrors++;
912 printf("%s: can't allocate cluster for incoming packet\n",
913 sc->sc_dev.dv_xname);
914 goto out;
915 }
916
917 /*
918 * Pull the packet off the interface.
919 */
920 eh = mtod(m, struct ether_header *);
921 data = mtod(m, u_int8_t *);
922 bus_space_read_multi_2(bst, bsh, DATA_REG_W, (u_int16_t *)data,
923 packetlen >> 1);
924 if (packetlen & 1) {
925 data += packetlen & ~1;
926 *data = bus_space_read_1(bst, bsh, DATA_REG_B);
927 }
928
929 ifp->if_ipackets++;
930
931 #if NBPFILTER > 0
932 /*
933 * Hand the packet off to bpf listeners. If there's a bpf listener,
934 * we need to check if the packet is ours.
935 */
936 if (ifp->if_bpf) {
937 bpf_mtap(ifp->if_bpf, m);
938
939 if ((ifp->if_flags & IFF_PROMISC) &&
940 (eh->ether_dhost[0] & 1) == 0 && /* !mcast and !bcast */
941 ether_cmp(eh->ether_dhost, LLADDR(ifp->if_sadl))) {
942 m_freem(m);
943 goto out;
944 }
945 }
946 #endif
947
948 /*
949 * Strip the ethernet header.
950 */
951 m->m_pkthdr.len = m->m_len = packetlen - sizeof(struct ether_header);
952 m->m_data += sizeof(struct ether_header);
953
954 ether_input(ifp, eh, m);
955
956 out:
957 /*
958 * Tell the card to free the memory occupied by this packet.
959 */
960 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
961 /* XXX bound this loop! */ ;
962 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RELEASE);
963
964 /*
965 * Check for another packet.
966 */
967 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
968 if (packetno & FIFO_REMPTY)
969 return;
970 goto again;
971 }
972
973 /*
974 * Process an ioctl request.
975 */
976 int
977 smc91cxx_ioctl(ifp, cmd, data)
978 struct ifnet *ifp;
979 u_long cmd;
980 caddr_t data;
981 {
982 struct smc91cxx_softc *sc = ifp->if_softc;
983 struct ifaddr *ifa = (struct ifaddr *)data;
984 struct ifreq *ifr = (struct ifreq *)data;
985 int s, error = 0;
986
987 s = splimp();
988
989 switch (cmd) {
990 case SIOCSIFADDR:
991 if ((error = smc91cxx_enable(sc)) != 0)
992 break;
993 ifp->if_flags |= IFF_UP;
994 switch (ifa->ifa_addr->sa_family) {
995 #ifdef INET
996 case AF_INET:
997 smc91cxx_init(sc);
998 arp_ifinit(ifp, ifa);
999 break;
1000 #endif
1001 #ifdef NS
1002 case AF_NS:
1003 {
1004 struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
1005
1006 if (ns_nullhost(*ina))
1007 ina->x_host =
1008 *(union ns_host *)LLADDR(ifp->if_sadl);
1009 else {
1010 bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
1011 ETHER_ADDR_LEN);
1012 }
1013
1014 /*
1015 * Set new address. Reset, because the receiver
1016 * has to be stopped before we can set the new
1017 * MAC address.
1018 */
1019 smc91cxx_reset(sc);
1020 break;
1021 }
1022 #endif
1023 default:
1024 smc91cxx_init(sc);
1025 break;
1026 }
1027 break;
1028
1029 #if defined(CCITT) && defined(LLC)
1030 case SIOCSIFCONF_X25:
1031 if ((error = smc91cxx_enable(sc)) != 0)
1032 break;
1033 ifp->if_flags |= IFF_UP;
1034 ifa->ifa_rtrequest = cons_rtrequest; /* XXX */
1035 error = x25_llcglue(PRC_IFUP, ifa->ifa_addr);
1036 if (error == 0)
1037 smc91cxx_init(sc);
1038 break;
1039 #endif
1040
1041 case SIOCSIFFLAGS:
1042 if ((ifp->if_flags & IFF_UP) == 0 &&
1043 (ifp->if_flags & IFF_RUNNING) != 0) {
1044 /*
1045 * If interface is marked down and it is running,
1046 * stop it.
1047 */
1048 smc91cxx_stop(sc);
1049 ifp->if_flags &= ~IFF_RUNNING;
1050 smc91cxx_disable(sc);
1051 } else if ((ifp->if_flags & IFF_UP) != 0 &&
1052 (ifp->if_flags & IFF_RUNNING) == 0) {
1053 /*
1054 * If interface is marked up and it is stopped,
1055 * start it.
1056 */
1057 if ((error = smc91cxx_enable(sc)) != 0)
1058 break;
1059 smc91cxx_init(sc);
1060 } else if (sc->sc_enabled) {
1061 /*
1062 * Reset the interface to pick up changes in any
1063 * other flags that affect hardware registers.
1064 */
1065 smc91cxx_reset(sc);
1066 }
1067 break;
1068
1069 case SIOCADDMULTI:
1070 case SIOCDELMULTI:
1071 if (sc->sc_enabled == 0) {
1072 error = EIO;
1073 break;
1074 }
1075
1076 error = (cmd == SIOCADDMULTI) ?
1077 ether_addmulti(ifr, &sc->sc_ec) :
1078 ether_delmulti(ifr, &sc->sc_ec);
1079 if (error == ENETRESET) {
1080 /*
1081 * Multicast list has changed; set the hardware
1082 * filter accordingly.
1083 */
1084 smc91cxx_reset(sc);
1085 error = 0;
1086 }
1087 break;
1088
1089 case SIOCGIFMEDIA:
1090 case SIOCSIFMEDIA:
1091 error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
1092 break;
1093
1094 default:
1095 error = EINVAL;
1096 break;
1097 }
1098
1099 splx(s);
1100 return (error);
1101 }
1102
1103 /*
1104 * Reset the interface.
1105 */
1106 void
1107 smc91cxx_reset(sc)
1108 struct smc91cxx_softc *sc;
1109 {
1110 int s;
1111
1112 s = splimp();
1113 smc91cxx_stop(sc);
1114 smc91cxx_init(sc);
1115 splx(s);
1116 }
1117
1118 /*
1119 * Watchdog timer.
1120 */
1121 void
1122 smc91cxx_watchdog(ifp)
1123 struct ifnet *ifp;
1124 {
1125 struct smc91cxx_softc *sc = ifp->if_softc;
1126
1127 log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
1128 ifp->if_oerrors++;
1129 smc91cxx_reset(sc);
1130 }
1131
1132 /*
1133 * Stop output on the interface.
1134 */
1135 void
1136 smc91cxx_stop(sc)
1137 struct smc91cxx_softc *sc;
1138 {
1139 bus_space_tag_t bst = sc->sc_bst;
1140 bus_space_handle_t bsh = sc->sc_bsh;
1141
1142 /*
1143 * Clear interrupt mask; disable all interrupts.
1144 */
1145 SMC_SELECT_BANK(sc, 2);
1146 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
1147
1148 /*
1149 * Disable transmitter and receiver.
1150 */
1151 SMC_SELECT_BANK(sc, 0);
1152 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
1153 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
1154
1155 /*
1156 * Cancel watchdog timer.
1157 */
1158 sc->sc_ec.ec_if.if_timer = 0;
1159 }
1160
1161 /*
1162 * Enable power on the interface.
1163 */
1164 int
1165 smc91cxx_enable(sc)
1166 struct smc91cxx_softc *sc;
1167 {
1168
1169 if (sc->sc_enabled == 0 && sc->sc_enable != NULL) {
1170 if ((*sc->sc_enable)(sc) != 0) {
1171 printf("%s: device enable failed\n",
1172 sc->sc_dev.dv_xname);
1173 return (EIO);
1174 }
1175 }
1176
1177 sc->sc_enabled = 1;
1178 return (0);
1179 }
1180
1181 /*
1182 * Disable power on the interface.
1183 */
1184 void
1185 smc91cxx_disable(sc)
1186 struct smc91cxx_softc *sc;
1187 {
1188
1189 if (sc->sc_enabled != 0 && sc->sc_disable != NULL) {
1190 (*sc->sc_disable)(sc);
1191 sc->sc_enabled = 0;
1192 }
1193 }
1194