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smc91cxx.c revision 1.9
      1 /*	$NetBSD: smc91cxx.c,v 1.9 1998/07/05 03:14:43 jonathan Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1997 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed by the NetBSD
     22  *	Foundation, Inc. and its contributors.
     23  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24  *    contributors may be used to endorse or promote products derived
     25  *    from this software without specific prior written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 /*
     41  * Copyright (c) 1996 Gardner Buchanan <gbuchanan (at) shl.com>
     42  * All rights reserved.
     43  *
     44  * Redistribution and use in source and binary forms, with or without
     45  * modification, are permitted provided that the following conditions
     46  * are met:
     47  * 1. Redistributions of source code must retain the above copyright
     48  *    notice, this list of conditions and the following disclaimer.
     49  * 2. Redistributions in binary form must reproduce the above copyright
     50  *    notice, this list of conditions and the following disclaimer in the
     51  *    documentation and/or other materials provided with the distribution.
     52  * 3. All advertising materials mentioning features or use of this software
     53  *    must display the following acknowledgement:
     54  *	This product includes software developed by Gardner Buchanan.
     55  * 4. The name of Gardner Buchanan may not be used to endorse or promote
     56  *    products derived from this software without specific prior written
     57  *    permission.
     58  *
     59  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     60  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     61  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     63  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     64  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     65  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     66  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     67  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     68  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     69  *
     70  *   from FreeBSD Id: if_sn.c,v 1.4 1996/03/18 15:47:16 gardner Exp
     71  */
     72 
     73 /*
     74  * Core driver for the SMC 91Cxx family of Ethernet chips.
     75  *
     76  * Memory allocation interrupt logic is drived from an SMC 91C90 driver
     77  * written for NetBSD/amiga by Michael Hitch.
     78  */
     79 
     80 #include "opt_inet.h"
     81 #include "opt_ccitt.h"
     82 #include "opt_llc.h"
     83 #include "bpfilter.h"
     84 #include "rnd.h"
     85 
     86 #include <sys/param.h>
     87 #include <sys/systm.h>
     88 #include <sys/mbuf.h>
     89 #include <sys/syslog.h>
     90 #include <sys/socket.h>
     91 #include <sys/device.h>
     92 #include <sys/malloc.h>
     93 #include <sys/ioctl.h>
     94 #include <sys/errno.h>
     95 #if NRND > 0
     96 #include <sys/rnd.h>
     97 #endif
     98 
     99 #include <machine/bus.h>
    100 #include <machine/intr.h>
    101 
    102 #include <net/if.h>
    103 #include <net/if_dl.h>
    104 #include <net/if_ether.h>
    105 #include <net/if_media.h>
    106 
    107 #ifdef INET
    108 #include <netinet/in.h>
    109 #include <netinet/if_inarp.h>
    110 #include <netinet/in_systm.h>
    111 #include <netinet/in_var.h>
    112 #include <netinet/ip.h>
    113 #endif
    114 
    115 #ifdef NS
    116 #include <netns/ns.h>
    117 #include <netns/ns_if.h>
    118 #endif
    119 
    120 #if defined(CCITT) && defined(LLC)
    121 #include <sys/socketvar.h>
    122 #include <netccitt/x25.h>
    123 #include <netccitt/pk.h>
    124 #include <netccitt/pk_var.h>
    125 #include <netccitt/pk_extern.h>
    126 #endif
    127 
    128 #if NBPFILTER > 0
    129 #include <net/bpf.h>
    130 #include <net/bpfdesc.h>
    131 #endif
    132 
    133 #include <dev/ic/smc91cxxreg.h>
    134 #include <dev/ic/smc91cxxvar.h>
    135 
    136 /* XXX Hardware padding doesn't work yet(?) */
    137 #define	SMC91CXX_SW_PAD
    138 
    139 const char *smc91cxx_idstrs[] = {
    140 	NULL,				/* 0 */
    141 	NULL,				/* 1 */
    142 	NULL,				/* 2 */
    143 	"SMC91C90/91C92",		/* 3 */
    144 	"SMC91C94",			/* 4 */
    145 	"SMC91C95",			/* 5 */
    146 	NULL,				/* 6 */
    147 	"SMC91C100",			/* 7 */
    148 	NULL,				/* 8 */
    149 	NULL,				/* 9 */
    150 	NULL,				/* 10 */
    151 	NULL,				/* 11 */
    152 	NULL,				/* 12 */
    153 	NULL,				/* 13 */
    154 	NULL,				/* 14 */
    155 	NULL,				/* 15 */
    156 };
    157 
    158 /* Supported media types. */
    159 const int smc91cxx_media[] = {
    160 	IFM_ETHER|IFM_10_T,
    161 	IFM_ETHER|IFM_10_5,
    162 };
    163 #define	NSMC91CxxMEDIA	(sizeof(smc91cxx_media) / sizeof(smc91cxx_media[0]))
    164 
    165 int	smc91cxx_mediachange __P((struct ifnet *));
    166 void	smc91cxx_mediastatus __P((struct ifnet *, struct ifmediareq *));
    167 
    168 int	smc91cxx_set_media __P((struct smc91cxx_softc *, int));
    169 
    170 void	smc91cxx_init __P((struct smc91cxx_softc *));
    171 void	smc91cxx_read __P((struct smc91cxx_softc *));
    172 void	smc91cxx_reset __P((struct smc91cxx_softc *));
    173 void	smc91cxx_start __P((struct ifnet *));
    174 void	smc91cxx_resume __P((struct smc91cxx_softc *));
    175 void	smc91cxx_stop __P((struct smc91cxx_softc *));
    176 void	smc91cxx_watchdog __P((struct ifnet *));
    177 int	smc91cxx_ioctl __P((struct ifnet *, u_long, caddr_t));
    178 
    179 int	smc91cxx_enable __P((struct smc91cxx_softc *));
    180 void	smc91cxx_disable __P((struct smc91cxx_softc *));
    181 
    182 /* XXX Should be in a common header file. */
    183 #define	ETHER_MAX_LEN	1518
    184 #define	ETHER_MIN_LEN	64
    185 #define	ETHER_CRC_LEN	4
    186 
    187 static __inline int ether_cmp __P((void *, void *));
    188 static __inline int
    189 ether_cmp(va, vb)
    190 	void *va, *vb;
    191 {
    192 	u_int8_t *a = va;
    193 	u_int8_t *b = vb;
    194 
    195 	return ((a[5] != b[5]) || (a[4] != b[4]) || (a[3] != b[3]) ||
    196 		(a[2] != b[2]) || (a[1] != b[1]) || (a[0] != b[0]));
    197 }
    198 
    199 void
    200 smc91cxx_attach(sc, myea)
    201 	struct smc91cxx_softc *sc;
    202 	u_int8_t *myea;
    203 {
    204 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    205 	bus_space_tag_t bst = sc->sc_bst;
    206 	bus_space_handle_t bsh = sc->sc_bsh;
    207 	const char *idstr;
    208 	u_int16_t tmp;
    209 	u_int8_t enaddr[ETHER_ADDR_LEN];
    210 	int i, aui;
    211 
    212 	/* Make sure the chip is stopped. */
    213 	smc91cxx_stop(sc);
    214 
    215 	SMC_SELECT_BANK(sc, 3);
    216 	tmp = bus_space_read_2(bst, bsh, REVISION_REG_W);
    217 	idstr = smc91cxx_idstrs[RR_ID(tmp)];
    218 	printf("%s: ", sc->sc_dev.dv_xname);
    219 	if (idstr != NULL)
    220 		printf("%s, ", idstr);
    221 	else
    222 		printf("unknown chip id %d, ", RR_ID(tmp));
    223 	printf("revision %d\n", RR_REV(tmp));
    224 
    225 	/* Read the station address from the chip. */
    226 	SMC_SELECT_BANK(sc, 1);
    227 	if (myea == NULL) {
    228 		myea = enaddr;
    229 		for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
    230 			tmp = bus_space_read_2(bst, bsh, IAR_ADDR0_REG_W + i);
    231 			myea[i + 1] = (tmp >> 8) & 0xff;
    232 			myea[i] = tmp & 0xff;
    233 		}
    234 	}
    235 	printf("%s: MAC address %s, ", sc->sc_dev.dv_xname,
    236 	    ether_sprintf(myea));
    237 
    238 	/* ..and default media. */
    239 	tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
    240 	printf("default media %s\n", (aui = (tmp & CR_AUI_SELECT)) ?
    241 	    "AUI" : "UTP");
    242 
    243 	/* Initialize the ifnet structure. */
    244 	bcopy(sc->sc_dev.dv_xname, ifp->if_xname, IFNAMSIZ);
    245 	ifp->if_softc = sc;
    246 	ifp->if_start = smc91cxx_start;
    247 	ifp->if_ioctl = smc91cxx_ioctl;
    248 	ifp->if_watchdog = smc91cxx_watchdog;
    249 	ifp->if_flags =
    250 	    IFF_BROADCAST | IFF_SIMPLEX | IFF_NOTRAILERS | IFF_MULTICAST;
    251 
    252 	/* Attach the interface. */
    253 	if_attach(ifp);
    254 	ether_ifattach(ifp, myea);
    255 
    256 	/* Initialize the media structures. */
    257 	ifmedia_init(&sc->sc_media, 0, smc91cxx_mediachange,
    258 	    smc91cxx_mediastatus);
    259 	for (i = 0; i < NSMC91CxxMEDIA; i++)
    260 		ifmedia_add(&sc->sc_media, smc91cxx_media[i], 0, NULL);
    261 	ifmedia_set(&sc->sc_media, IFM_ETHER | (aui ? IFM_10_5 : IFM_10_T));
    262 
    263 #if NBPFILTER > 0
    264 	bpfattach(&ifp->if_bpf, ifp, DLT_EN10MB, sizeof(struct ether_header));
    265 #endif
    266 
    267 #if NRND > 0
    268 	rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, RND_TYPE_NET);
    269 #endif
    270 }
    271 
    272 /*
    273  * Change media according to request.
    274  */
    275 int
    276 smc91cxx_mediachange(ifp)
    277 	struct ifnet *ifp;
    278 {
    279 	struct smc91cxx_softc *sc = ifp->if_softc;
    280 
    281 	return (smc91cxx_set_media(sc, sc->sc_media.ifm_media));
    282 }
    283 
    284 int
    285 smc91cxx_set_media(sc, media)
    286 	struct smc91cxx_softc *sc;
    287 	int media;
    288 {
    289 	bus_space_tag_t bst = sc->sc_bst;
    290 	bus_space_handle_t bsh = sc->sc_bsh;
    291 	u_int16_t tmp;
    292 
    293 	/*
    294 	 * If the interface is not currently powered on, just return.
    295 	 * When it is enabled later, smc91cxx_init() will properly set
    296 	 * up the media for us.
    297 	 */
    298 	if (sc->sc_enabled == 0)
    299 		return (0);
    300 
    301 	if (IFM_TYPE(media) != IFM_ETHER)
    302 		return (EINVAL);
    303 
    304 	switch (IFM_SUBTYPE(media)) {
    305 	case IFM_10_T:
    306 	case IFM_10_5:
    307 		SMC_SELECT_BANK(sc, 1);
    308 		tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
    309 		if (IFM_SUBTYPE(media) == IFM_10_5)
    310 			tmp |= CR_AUI_SELECT;
    311 		else
    312 			tmp &= ~CR_AUI_SELECT;
    313 		bus_space_write_2(bst, bsh, CONFIG_REG_W, tmp);
    314 		delay(20000);	/* XXX is this needed? */
    315 		break;
    316 
    317 	default:
    318 		return (EINVAL);
    319 	}
    320 
    321 	return (0);
    322 }
    323 
    324 /*
    325  * Notify the world which media we're using.
    326  */
    327 void
    328 smc91cxx_mediastatus(ifp, ifmr)
    329 	struct ifnet *ifp;
    330 	struct ifmediareq *ifmr;
    331 {
    332 	struct smc91cxx_softc *sc = ifp->if_softc;
    333 	bus_space_tag_t bst = sc->sc_bst;
    334 	bus_space_handle_t bsh = sc->sc_bsh;
    335 	u_int16_t tmp;
    336 
    337 	if (sc->sc_enabled == 0) {
    338 		ifmr->ifm_active = IFM_ETHER | IFM_NONE;
    339 		ifmr->ifm_status = 0;
    340 		return;
    341 	}
    342 
    343 	SMC_SELECT_BANK(sc, 1);
    344 	tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W);
    345 	ifmr->ifm_active =
    346 	    IFM_ETHER | ((tmp & CR_AUI_SELECT) ? IFM_10_5 : IFM_10_T);
    347 }
    348 
    349 /*
    350  * Reset and initialize the chip.
    351  */
    352 void
    353 smc91cxx_init(sc)
    354 	struct smc91cxx_softc *sc;
    355 {
    356 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    357 	bus_space_tag_t bst = sc->sc_bst;
    358 	bus_space_handle_t bsh = sc->sc_bsh;
    359 	u_int16_t tmp;
    360 	u_int8_t *enaddr;
    361 	int s, i;
    362 
    363 	s = splimp();
    364 
    365 	/*
    366 	 * This resets the registersmostly to defaults, but doesn't
    367 	 * affect the EEPROM.  After the reset cycle, we pause briefly
    368 	 * for the chip to recover.
    369 	 *
    370 	 * XXX how long are we really supposed to delay?  --thorpej
    371 	 */
    372 	SMC_SELECT_BANK(sc, 0);
    373 	bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, RCR_SOFTRESET);
    374 	delay(100);
    375 	bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
    376 	delay(200);
    377 
    378 	bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
    379 
    380 	/* Set the Ethernet address. */
    381 	SMC_SELECT_BANK(sc, 1);
    382 	enaddr = (u_int8_t *)LLADDR(ifp->if_sadl);
    383 	for (i = 0; i < ETHER_ADDR_LEN; i += 2) {
    384 		tmp = enaddr[i + 1] << 8 | enaddr[i];
    385 		bus_space_write_2(bst, bsh, IAR_ADDR0_REG_W + i, tmp);
    386 	}
    387 
    388 	/*
    389 	 * Set the control register to automatically release successfully
    390 	 * transmitted packets (making the best use of our limited memory)
    391 	 * and enable the EPH interrupt on certain TX errors.
    392 	 */
    393 	bus_space_write_2(bst, bsh, CONTROL_REG_W, (CTR_AUTO_RELEASE |
    394 	    CTR_TE_ENABLE | CTR_CR_ENABLE | CTR_LE_ENABLE));
    395 
    396 	/*
    397 	 * Reset the MMU and wait for it to be un-busy.
    398 	 */
    399 	SMC_SELECT_BANK(sc, 2);
    400 	bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RESET);
    401 	while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
    402 		/* XXX bound this loop! */ ;
    403 
    404 	/*
    405 	 * Disable all interrupts.
    406 	 */
    407 	bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
    408 
    409 	/*
    410 	 * Set current media.
    411 	 */
    412 	smc91cxx_set_media(sc, sc->sc_media.ifm_cur->ifm_media);
    413 
    414 	/*
    415 	 * Set the receive filter.  We want receive enable and auto
    416 	 * strip of CRC from received packet.  If we are in promisc. mode,
    417 	 * then set that bit as well.
    418 	 *
    419 	 * XXX Initialize multicast filter.  For now, we just accept
    420 	 * XXX all multicast.
    421 	 */
    422 	SMC_SELECT_BANK(sc, 0);
    423 
    424 	tmp = RCR_ENABLE | RCR_STRIP_CRC | RCR_ALMUL;
    425 	if (ifp->if_flags & IFF_PROMISC)
    426 		tmp |= RCR_PROMISC;
    427 
    428 	bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, tmp);
    429 
    430 	/*
    431 	 * Set transmitter control to "enabled".
    432 	 */
    433 	tmp = TCR_ENABLE;
    434 
    435 #ifndef SMC91CXX_SW_PAD
    436 	/*
    437 	 * Enable hardware padding of transmitted packets.
    438 	 * XXX doesn't work?
    439 	 */
    440 	tmp |= TCR_PAD_ENABLE;
    441 #endif
    442 
    443 	bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, tmp);
    444 
    445 	/*
    446 	 * Now, enable interrupts.
    447 	 */
    448 	SMC_SELECT_BANK(sc, 2);
    449 
    450 	bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
    451 	    IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT | IM_TX_INT);
    452 
    453 	/* Interface is now running, with no output active. */
    454 	ifp->if_flags |= IFF_RUNNING;
    455 	ifp->if_flags &= ~IFF_OACTIVE;
    456 
    457 	/*
    458 	 * Attempt to start any pending transmission.
    459 	 */
    460 	smc91cxx_start(ifp);
    461 
    462 	splx(s);
    463 }
    464 
    465 /*
    466  * Start output on an interface.
    467  * Must be called at splimp or interrupt level.
    468  */
    469 void
    470 smc91cxx_start(ifp)
    471 	struct ifnet *ifp;
    472 {
    473 	struct smc91cxx_softc *sc = ifp->if_softc;
    474 	bus_space_tag_t bst = sc->sc_bst;
    475 	bus_space_handle_t bsh = sc->sc_bsh;
    476 	u_int len;
    477 	struct mbuf *m, *top;
    478 	u_int16_t length, npages;
    479 	u_int8_t packetno;
    480 	int timo, pad;
    481 
    482 	if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING)
    483 		return;
    484 
    485  again:
    486 	/*
    487 	 * Peek at the next packet.
    488 	 */
    489 	if ((m = ifp->if_snd.ifq_head) == NULL)
    490 		return;
    491 
    492 	/*
    493 	 * Compute the frame length and set pad to give an overall even
    494 	 * number of bytes.  Below, we assume that the packet length
    495 	 * is even.
    496 	 */
    497 	for (len = 0, top = m; m != NULL; m = m->m_next)
    498 		len += m->m_len;
    499 	pad = (len & 1);
    500 
    501 	/*
    502 	 * We drop packets that are too large.  Perhaps we should
    503 	 * truncate them instead?
    504 	 */
    505 	if ((len + pad) > (ETHER_MAX_LEN - ETHER_CRC_LEN)) {
    506 		printf("%s: large packet discarded\n", sc->sc_dev.dv_xname);
    507 		ifp->if_oerrors++;
    508 		IF_DEQUEUE(&ifp->if_snd, m);
    509 		m_freem(m);
    510 		goto readcheck;
    511 	}
    512 
    513 #ifdef SMC91CXX_SW_PAD
    514 	/*
    515 	 * Not using hardware padding; pad to ETHER_MIN_LEN.
    516 	 */
    517 	if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN))
    518 		pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len;
    519 #endif
    520 
    521 	length = pad + len;
    522 
    523 	/*
    524 	 * The MMU has a 256 byte page size.  The MMU expects us to
    525 	 * ask for "npages - 1".  We include space for the status word,
    526 	 * byte count, and control bytes in the allocation request.
    527 	 */
    528 	npages = (length + 6) >> 8;
    529 
    530 	/*
    531 	 * Now allocate the memory.
    532 	 */
    533 	SMC_SELECT_BANK(sc, 2);
    534 	bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ALLOC | npages);
    535 
    536 	timo = MEMORY_WAIT_TIME;
    537 	do {
    538 		if (bus_space_read_1(bst, bsh, INTR_STAT_REG_B) & IM_ALLOC_INT)
    539 			break;
    540 		delay(1);
    541 	} while (--timo);
    542 
    543 	packetno = bus_space_read_1(bst, bsh, ALLOC_RESULT_REG_B);
    544 
    545 	if (packetno & ARR_FAILED || timo == 0) {
    546 		/*
    547 		 * No transmit memory is available.  Record the number
    548 		 * of requestd pages and enable the allocation completion
    549 		 * interrupt.  Set up the watchdog timer in case we miss
    550 		 * the interrupt.  Mark the interface as active so that
    551 		 * no one else attempts to transmit while we're allocating
    552 		 * memory.
    553 		 */
    554 		bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
    555 		    bus_space_read_1(bst, bsh, INTR_MASK_REG_B) | IM_ALLOC_INT);
    556 
    557 		ifp->if_timer = 5;
    558 		ifp->if_flags |= IFF_OACTIVE;
    559 
    560 		return;
    561 	}
    562 
    563 	/*
    564 	 * We have a packet number - set the data window.
    565 	 */
    566 	bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno);
    567 
    568 	/*
    569 	 * Point to the beginning of the packet.
    570 	 */
    571 	bus_space_write_2(bst, bsh, POINTER_REG_W, PTR_AUTOINC /* | 0x0000 */);
    572 
    573 	/*
    574 	 * Send the packet length (+6 for stats, length, and control bytes)
    575 	 * and the status word (set to zeros).
    576 	 */
    577 	bus_space_write_2(bst, bsh, DATA_REG_W, 0);
    578 	bus_space_write_1(bst, bsh, DATA_REG_B, (length + 6) & 0xff);
    579 	bus_space_write_1(bst, bsh, DATA_REG_B, ((length + 6) >> 8) & 0xff);
    580 
    581 	/*
    582 	 * Get the packet from the kernel.  This will include the Ethernet
    583 	 * frame header, MAC address, etc.
    584 	 */
    585 	IF_DEQUEUE(&ifp->if_snd, m);
    586 
    587 	/*
    588 	 * Push the packet out to the card.
    589 	 */
    590 	for (top = m; m != NULL; m = m->m_next) {
    591 		/* Words... */
    592 		bus_space_write_multi_2(bst, bsh, DATA_REG_W,
    593 		    mtod(m, u_int16_t *), m->m_len >> 1);
    594 
    595 		/* ...and the remaining byte, if any. */
    596 		if (m->m_len & 1)
    597 			bus_space_write_1(bst, bsh, DATA_REG_B,
    598 			  *(u_int8_t *)(mtod(m, u_int8_t *) + (m->m_len - 1)));
    599 	}
    600 
    601 #ifdef SMC91CXX_SW_PAD
    602 	/*
    603 	 * Push out padding.
    604 	 */
    605 	while (pad > 1) {
    606 		bus_space_write_2(bst, bsh, DATA_REG_W, 0);
    607 		pad -= 2;
    608 	}
    609 	if (pad)
    610 		bus_space_write_1(bst, bsh, DATA_REG_B, 0);
    611 #endif
    612 
    613 	/*
    614 	 * Push out control byte and unused packet byte.  The control byte
    615 	 * is 0, meaning the packet is even lengthed and no special
    616 	 * CRC handling is necessary.
    617 	 */
    618 	bus_space_write_2(bst, bsh, DATA_REG_W, 0);
    619 
    620 	/*
    621 	 * Enable transmit interrupts and let the chip go.  Set a watchdog
    622 	 * in case we miss the interrupt.
    623 	 */
    624 	bus_space_write_1(bst, bsh, INTR_MASK_REG_B,
    625 	    bus_space_read_1(bst, bsh, INTR_MASK_REG_B) |
    626 	    IM_TX_INT | IM_TX_EMPTY_INT);
    627 
    628 	bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ENQUEUE);
    629 
    630 	ifp->if_timer = 5;
    631 
    632 #if NBPFILTER > 0
    633 	/* Hand off a copy to the bpf. */
    634 	if (ifp->if_bpf)
    635 		bpf_mtap(ifp->if_bpf, top);
    636 #endif
    637 
    638 	ifp->if_opackets++;
    639 	m_freem(top);
    640 
    641  readcheck:
    642 	/*
    643 	 * Check for incoming pcakets.  We don't want to overflow the small
    644 	 * RX FIFO.  If nothing has arrived, attempt to queue another
    645 	 * transmit packet.
    646 	 */
    647 	if (bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & FIFO_REMPTY)
    648 		goto again;
    649 }
    650 
    651 /*
    652  * Interrupt service routine.
    653  */
    654 int
    655 smc91cxx_intr(arg)
    656 	void *arg;
    657 {
    658 	struct smc91cxx_softc *sc = arg;
    659 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    660 	bus_space_tag_t bst = sc->sc_bst;
    661 	bus_space_handle_t bsh = sc->sc_bsh;
    662 	u_int8_t mask, interrupts, status;
    663 	u_int16_t packetno, tx_status, card_stats;
    664 
    665 	if (sc->sc_enabled == 0)
    666 		return (0);
    667 
    668 	SMC_SELECT_BANK(sc, 2);
    669 
    670 	/*
    671 	 * Obtain the current interrupt mask.
    672 	 */
    673 	mask = bus_space_read_1(bst, bsh, INTR_MASK_REG_B);
    674 
    675 	/*
    676 	 * Get the set of interrupt which occurred and eliminate any
    677 	 * which are not enabled.
    678 	 */
    679 	interrupts = bus_space_read_1(bst, bsh, INTR_STAT_REG_B);
    680 	status = interrupts & mask;
    681 
    682 	/* Ours? */
    683 	if (status == 0)
    684 		return (0);
    685 
    686 	/*
    687 	 * It's ours; disable all interrupts while we process them.
    688 	 */
    689 	bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
    690 
    691 	/*
    692 	 * Receive overrun interrupts.
    693 	 */
    694 	if (status & IM_RX_OVRN_INT) {
    695 		bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_RX_OVRN_INT);
    696 		ifp->if_ierrors++;
    697 	}
    698 
    699 	/*
    700 	 * Receive interrupts.
    701 	 */
    702 	if (status & IM_RCV_INT) {
    703 #if 1 /* DIAGNOSTIC */
    704 		packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
    705 		if (packetno & FIFO_REMPTY)
    706 			printf("%s: receive interrupt on empty fifo\n",
    707 			    sc->sc_dev.dv_xname);
    708 		else
    709 #endif
    710 		smc91cxx_read(sc);
    711 	}
    712 
    713 	/*
    714 	 * Memory allocation interrupts.
    715 	 */
    716 	if (status & IM_ALLOC_INT) {
    717 		/* Disable this interrupt. */
    718 		mask &= ~IM_ALLOC_INT;
    719 
    720 		/*
    721 		 * Release the just-allocated memory.  We will reallocate
    722 		 * it through the normal start logic.
    723 		 */
    724 		while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
    725 			/* XXX bound this loop! */ ;
    726 		bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
    727 
    728 		ifp->if_flags &= ~IFF_OACTIVE;
    729 		ifp->if_timer = 0;
    730 	}
    731 
    732 	/*
    733 	 * Transmit complete interrupt.  Handle transmission error messages.
    734 	 * This will only be called on error condition because of AUTO RELEASE
    735 	 * mode.
    736 	 */
    737 	if (status & IM_TX_INT) {
    738 		bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_INT);
    739 
    740 		packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) &
    741 		    FIFO_TX_MASK;
    742 
    743 		/*
    744 		 * Select this as the packet to read from.
    745 		 */
    746 		bus_space_write_1(bst, bsh, PACKET_NUM_REG_B, packetno);
    747 
    748 		/*
    749 		 * Position the pointer to the beginning of the packet.
    750 		 */
    751 		bus_space_write_2(bst, bsh, POINTER_REG_W,
    752 		    PTR_AUTOINC | PTR_READ /* | 0x0000 */);
    753 
    754 		/*
    755 		 * Fetch the TX status word.  This will be a copy of
    756 		 * the EPH_STATUS_REG_W at the time of the transmission
    757 		 * failure.
    758 		 */
    759 		tx_status = bus_space_read_2(bst, bsh, DATA_REG_W);
    760 
    761 		if (tx_status & EPHSR_TX_SUC)
    762 			printf("%s: successful packet caused TX interrupt?!\n",
    763 			    sc->sc_dev.dv_xname);
    764 		else
    765 			ifp->if_oerrors++;
    766 
    767 		if (tx_status & EPHSR_LATCOL)
    768 			ifp->if_collisions++;
    769 
    770 		/*
    771 		 * Some of these errors disable the transmitter; reenable it.
    772 		 */
    773 		SMC_SELECT_BANK(sc, 0);
    774 #ifdef SMC91CXX_SW_PAD
    775 		bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, TCR_ENABLE);
    776 #else
    777 		bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W,
    778 		    TCR_ENABLE | TCR_PAD_ENABLE);
    779 #endif
    780 
    781 		/*
    782 		 * Kill the failed packet and wait for the MMU to unbusy.
    783 		 */
    784 		SMC_SELECT_BANK(sc, 2);
    785 		while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
    786 			/* XXX bound this loop! */ ;
    787 		bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT);
    788 
    789 		ifp->if_timer = 0;
    790 	}
    791 
    792 	/*
    793 	 * Transmit underrun interrupts.  We use this opportunity to
    794 	 * update transmit statistics from the card.
    795 	 */
    796 	if (status & IM_TX_EMPTY_INT) {
    797 		bus_space_write_1(bst, bsh, INTR_ACK_REG_B, IM_TX_EMPTY_INT);
    798 
    799 		/* Disable this interrupt. */
    800 		mask &= ~IM_TX_EMPTY_INT;
    801 
    802 		SMC_SELECT_BANK(sc, 0);
    803 		card_stats = bus_space_read_2(bst, bsh, COUNTER_REG_W);
    804 
    805 		/* Single collisions. */
    806 		ifp->if_collisions += card_stats & ECR_COLN_MASK;
    807 
    808 		/* Multiple collisions. */
    809 		ifp->if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4;
    810 
    811 		SMC_SELECT_BANK(sc, 2);
    812 
    813 		ifp->if_timer = 0;
    814 	}
    815 
    816 	/*
    817 	 * Other errors.  Reset the interface.
    818 	 */
    819 	if (status & IM_EPH_INT) {
    820 		smc91cxx_stop(sc);
    821 		smc91cxx_init(sc);
    822 	}
    823 
    824 	/*
    825 	 * Attempt to queue more packets for transmission.
    826 	 */
    827 	smc91cxx_start(ifp);
    828 
    829 	/*
    830 	 * Reenable the interrupts we wish to receive now that processing
    831 	 * is complete.
    832 	 */
    833 	mask |= bus_space_read_1(bst, bsh, INTR_MASK_REG_B);
    834 	bus_space_write_1(bst, bsh, INTR_MASK_REG_B, mask);
    835 
    836 #if NRND > 0
    837 	if (status)
    838 		rnd_add_uint32(&sc->rnd_source, status);
    839 #endif
    840 
    841 	return (1);
    842 }
    843 
    844 /*
    845  * Read a packet from the card and pass it up to the kernel.
    846  * NOTE!  WE EXPECT TO BE IN REGISTER WINDOW 2!
    847  */
    848 void
    849 smc91cxx_read(sc)
    850 	struct smc91cxx_softc *sc;
    851 {
    852 	struct ifnet *ifp = &sc->sc_ec.ec_if;
    853 	bus_space_tag_t bst = sc->sc_bst;
    854 	bus_space_handle_t bsh = sc->sc_bsh;
    855 	struct ether_header *eh;
    856 	struct mbuf *m;
    857 	u_int16_t status, packetno, packetlen;
    858 	u_int8_t *data;
    859 
    860  again:
    861 	/*
    862 	 * Set data pointer to the beginning of the packet.  Since
    863 	 * PTR_RCV is set, the packet number will be found automatically
    864 	 * in FIFO_PORTS_REG_W, FIFO_RX_MASK.
    865 	 */
    866 	bus_space_write_2(bst, bsh, POINTER_REG_W,
    867 	    PTR_READ | PTR_RCV | PTR_AUTOINC /* | 0x0000 */);
    868 
    869 	/*
    870 	 * First two words are status and packet length.
    871 	 */
    872 	status = bus_space_read_2(bst, bsh, DATA_REG_W);
    873 	packetlen = bus_space_read_2(bst, bsh, DATA_REG_W);
    874 
    875 	/*
    876 	 * The packet length includes 3 extra words: status, length,
    877 	 * and an extra word that includes the control byte.
    878 	 */
    879 	packetlen -= 6;
    880 
    881 	/*
    882 	 * Account for receive errors and discard.
    883 	 */
    884 	if (status & RS_ERRORS) {
    885 		ifp->if_ierrors++;
    886 		goto out;
    887 	}
    888 
    889 	/*
    890 	 * Adjust for odd-length packet.
    891 	 */
    892 	if (status & RS_ODDFRAME)
    893 		packetlen++;
    894 
    895 	/*
    896 	 * Allocate a header mbuf.
    897 	 */
    898 	MGETHDR(m, M_DONTWAIT, MT_DATA);
    899 	if (m == NULL)
    900 		goto out;
    901 
    902 	m->m_pkthdr.rcvif = ifp;
    903 	m->m_pkthdr.len = m->m_len = packetlen;
    904 
    905 	/*
    906 	 * Always put the packet in a cluster.
    907 	 * XXX should chain small mbufs if less than threshold.
    908 	 */
    909 	MCLGET(m, M_DONTWAIT);
    910 	if ((m->m_flags & M_EXT) == 0) {
    911 		m_freem(m);
    912 		ifp->if_ierrors++;
    913 		printf("%s: can't allocate cluster for incoming packet\n",
    914 		    sc->sc_dev.dv_xname);
    915 		goto out;
    916 	}
    917 
    918 	/*
    919 	 * Pull the packet off the interface.
    920 	 */
    921 	eh = mtod(m, struct ether_header *);
    922 	data = mtod(m, u_int8_t *);
    923 	bus_space_read_multi_2(bst, bsh, DATA_REG_W, (u_int16_t *)data,
    924 	    packetlen >> 1);
    925 	if (packetlen & 1) {
    926 		data += packetlen & ~1;
    927 		*data = bus_space_read_1(bst, bsh, DATA_REG_B);
    928 	}
    929 
    930 	ifp->if_ipackets++;
    931 
    932 #if NBPFILTER > 0
    933 	/*
    934 	 * Hand the packet off to bpf listeners.  If there's a bpf listener,
    935 	 * we need to check if the packet is ours.
    936 	 */
    937 	if (ifp->if_bpf) {
    938 		bpf_mtap(ifp->if_bpf, m);
    939 
    940 		if ((ifp->if_flags & IFF_PROMISC) &&
    941 		    (eh->ether_dhost[0] & 1) == 0 &&	/* !mcast and !bcast */
    942 		    ether_cmp(eh->ether_dhost, LLADDR(ifp->if_sadl))) {
    943 			m_freem(m);
    944 			goto out;
    945 		}
    946 	}
    947 #endif
    948 
    949 	/*
    950 	 * Strip the ethernet header.
    951 	 */
    952 	m->m_pkthdr.len = m->m_len = packetlen - sizeof(struct ether_header);
    953 	m->m_data += sizeof(struct ether_header);
    954 
    955 	ether_input(ifp, eh, m);
    956 
    957  out:
    958 	/*
    959 	 * Tell the card to free the memory occupied by this packet.
    960 	 */
    961 	while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY)
    962 		/* XXX bound this loop! */ ;
    963 	bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RELEASE);
    964 
    965 	/*
    966 	 * Check for another packet.
    967 	 */
    968 	packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W);
    969 	if (packetno & FIFO_REMPTY)
    970 		return;
    971 	goto again;
    972 }
    973 
    974 /*
    975  * Process an ioctl request.
    976  */
    977 int
    978 smc91cxx_ioctl(ifp, cmd, data)
    979 	struct ifnet *ifp;
    980 	u_long cmd;
    981 	caddr_t data;
    982 {
    983 	struct smc91cxx_softc *sc = ifp->if_softc;
    984 	struct ifaddr *ifa = (struct ifaddr *)data;
    985 	struct ifreq *ifr = (struct ifreq *)data;
    986 	int s, error = 0;
    987 
    988 	s = splimp();
    989 
    990 	switch (cmd) {
    991 	case SIOCSIFADDR:
    992 		if ((error = smc91cxx_enable(sc)) != 0)
    993 			break;
    994 		ifp->if_flags |= IFF_UP;
    995 		switch (ifa->ifa_addr->sa_family) {
    996 #ifdef INET
    997 		case AF_INET:
    998 		smc91cxx_init(sc);
    999 		arp_ifinit(ifp, ifa);
   1000 		break;
   1001 #endif
   1002 #ifdef NS
   1003 		case AF_NS:
   1004 		    {
   1005 			struct ns_addr *ina = &IA_SNS(ifa)->sns_addr;
   1006 
   1007 			if (ns_nullhost(*ina))
   1008 				ina->x_host =
   1009 				    *(union ns_host *)LLADDR(ifp->if_sadl);
   1010 			else {
   1011 				bcopy(ina->x_host.c_host, LLADDR(ifp->if_sadl),
   1012 				    ETHER_ADDR_LEN);
   1013 			}
   1014 
   1015 			/*
   1016 			 * Set new address.  Reset, because the receiver
   1017 			 * has to be stopped before we can set the new
   1018 			 * MAC address.
   1019 			 */
   1020 			smc91cxx_reset(sc);
   1021 			break;
   1022 		    }
   1023 #endif
   1024 		default:
   1025 			smc91cxx_init(sc);
   1026 			break;
   1027 		}
   1028 		break;
   1029 
   1030 #if defined(CCITT) && defined(LLC)
   1031 	case SIOCSIFCONF_X25:
   1032 		if ((error = smc91cxx_enable(sc)) != 0)
   1033 			break;
   1034 		ifp->if_flags |= IFF_UP;
   1035 		ifa->ifa_rtrequest = cons_rtrequest;	/* XXX */
   1036 		error = x25_llcglue(PRC_IFUP, ifa->ifa_addr);
   1037 		if (error == 0)
   1038 			smc91cxx_init(sc);
   1039 		break;
   1040 #endif
   1041 
   1042 	case SIOCSIFFLAGS:
   1043 		if ((ifp->if_flags & IFF_UP) == 0 &&
   1044 		    (ifp->if_flags & IFF_RUNNING) != 0) {
   1045 			/*
   1046 			 * If interface is marked down and it is running,
   1047 			 * stop it.
   1048 			 */
   1049 			smc91cxx_stop(sc);
   1050 			ifp->if_flags &= ~IFF_RUNNING;
   1051 			smc91cxx_disable(sc);
   1052 		} else if ((ifp->if_flags & IFF_UP) != 0 &&
   1053 			   (ifp->if_flags & IFF_RUNNING) == 0) {
   1054 			/*
   1055 			 * If interface is marked up and it is stopped,
   1056 			 * start it.
   1057 			 */
   1058 			if ((error = smc91cxx_enable(sc)) != 0)
   1059 				break;
   1060 			smc91cxx_init(sc);
   1061 		} else if (sc->sc_enabled) {
   1062 			/*
   1063 			 * Reset the interface to pick up changes in any
   1064 			 * other flags that affect hardware registers.
   1065 			 */
   1066 			smc91cxx_reset(sc);
   1067 		}
   1068 		break;
   1069 
   1070 	case SIOCADDMULTI:
   1071 	case SIOCDELMULTI:
   1072 		if (sc->sc_enabled == 0) {
   1073 			error = EIO;
   1074 			break;
   1075 		}
   1076 
   1077 		error = (cmd == SIOCADDMULTI) ?
   1078 		    ether_addmulti(ifr, &sc->sc_ec) :
   1079 		    ether_delmulti(ifr, &sc->sc_ec);
   1080 		if (error == ENETRESET) {
   1081 			/*
   1082 			 * Multicast list has changed; set the hardware
   1083 			 * filter accordingly.
   1084 			 */
   1085 			smc91cxx_reset(sc);
   1086 			error = 0;
   1087 		}
   1088 		break;
   1089 
   1090 	case SIOCGIFMEDIA:
   1091 	case SIOCSIFMEDIA:
   1092 		error = ifmedia_ioctl(ifp, ifr, &sc->sc_media, cmd);
   1093 		break;
   1094 
   1095 	default:
   1096 		error = EINVAL;
   1097 		break;
   1098 	}
   1099 
   1100 	splx(s);
   1101 	return (error);
   1102 }
   1103 
   1104 /*
   1105  * Reset the interface.
   1106  */
   1107 void
   1108 smc91cxx_reset(sc)
   1109 	struct smc91cxx_softc *sc;
   1110 {
   1111 	int s;
   1112 
   1113 	s = splimp();
   1114 	smc91cxx_stop(sc);
   1115 	smc91cxx_init(sc);
   1116 	splx(s);
   1117 }
   1118 
   1119 /*
   1120  * Watchdog timer.
   1121  */
   1122 void
   1123 smc91cxx_watchdog(ifp)
   1124 	struct ifnet *ifp;
   1125 {
   1126 	struct smc91cxx_softc *sc = ifp->if_softc;
   1127 
   1128 	log(LOG_ERR, "%s: device timeout\n", sc->sc_dev.dv_xname);
   1129 	ifp->if_oerrors++;
   1130 	smc91cxx_reset(sc);
   1131 }
   1132 
   1133 /*
   1134  * Stop output on the interface.
   1135  */
   1136 void
   1137 smc91cxx_stop(sc)
   1138 	struct smc91cxx_softc *sc;
   1139 {
   1140 	bus_space_tag_t bst = sc->sc_bst;
   1141 	bus_space_handle_t bsh = sc->sc_bsh;
   1142 
   1143 	/*
   1144 	 * Clear interrupt mask; disable all interrupts.
   1145 	 */
   1146 	SMC_SELECT_BANK(sc, 2);
   1147 	bus_space_write_1(bst, bsh, INTR_MASK_REG_B, 0);
   1148 
   1149 	/*
   1150 	 * Disable transmitter and receiver.
   1151 	 */
   1152 	SMC_SELECT_BANK(sc, 0);
   1153 	bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0);
   1154 	bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0);
   1155 
   1156 	/*
   1157 	 * Cancel watchdog timer.
   1158 	 */
   1159 	sc->sc_ec.ec_if.if_timer = 0;
   1160 }
   1161 
   1162 /*
   1163  * Enable power on the interface.
   1164  */
   1165 int
   1166 smc91cxx_enable(sc)
   1167 	struct smc91cxx_softc *sc;
   1168 {
   1169 
   1170 	if (sc->sc_enabled == 0 && sc->sc_enable != NULL) {
   1171 		if ((*sc->sc_enable)(sc) != 0) {
   1172 			printf("%s: device enable failed\n",
   1173 			    sc->sc_dev.dv_xname);
   1174 			return (EIO);
   1175 		}
   1176 	}
   1177 
   1178 	sc->sc_enabled = 1;
   1179 	return (0);
   1180 }
   1181 
   1182 /*
   1183  * Disable power on the interface.
   1184  */
   1185 void
   1186 smc91cxx_disable(sc)
   1187 	struct smc91cxx_softc *sc;
   1188 {
   1189 
   1190 	if (sc->sc_enabled != 0 && sc->sc_disable != NULL) {
   1191 		(*sc->sc_disable)(sc);
   1192 		sc->sc_enabled = 0;
   1193 	}
   1194 }
   1195