smc93cx6.c revision 1.1.4.1 1 1.1.4.1 jtc /* $NetBSD: smc93cx6.c,v 1.1.4.1 1996/07/18 00:35:32 jtc Exp $ */
2 1.1 mycroft
3 1.1 mycroft /*
4 1.1 mycroft * Interface for the 93C46/26/06 serial eeprom parts.
5 1.1 mycroft *
6 1.1 mycroft * Copyright (c) 1995 Daniel M. Eischen
7 1.1 mycroft * All rights reserved.
8 1.1 mycroft *
9 1.1 mycroft * Redistribution and use in source and binary forms, with or without
10 1.1 mycroft * modification, are permitted provided that the following conditions
11 1.1 mycroft * are met:
12 1.1 mycroft * 1. Redistributions of source code must retain the above copyright
13 1.1 mycroft * notice immediately at the beginning of the file, without modification,
14 1.1 mycroft * this list of conditions, and the following disclaimer.
15 1.1 mycroft * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 mycroft * notice, this list of conditions and the following disclaimer in the
17 1.1 mycroft * documentation and/or other materials provided with the distribution.
18 1.1 mycroft * 3. Absolutely no warranty of function or purpose is made by the author
19 1.1 mycroft * Daniel M. Eischen.
20 1.1 mycroft * 4. Modifications may be freely made to this file if the above conditions
21 1.1 mycroft * are met.
22 1.1.4.1 jtc *
23 1.1.4.1 jtc * from Id: 93cx6.c,v 1.5 1996/05/30 07:19:54 gibbs Exp
24 1.1 mycroft */
25 1.1 mycroft
26 1.1 mycroft /*
27 1.1 mycroft * The instruction set of the 93C46/26/06 chips are as follows:
28 1.1 mycroft *
29 1.1 mycroft * Start OP
30 1.1 mycroft * Function Bit Code Address Data Description
31 1.1 mycroft * -------------------------------------------------------------------
32 1.1 mycroft * READ 1 10 A5 - A0 Reads data stored in memory,
33 1.1 mycroft * starting at specified address
34 1.1 mycroft * EWEN 1 00 11XXXX Write enable must preceed
35 1.1 mycroft * all programming modes
36 1.1 mycroft * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0
37 1.1 mycroft * WRITE 1 01 A5 - A0 D15 - D0 Writes register
38 1.1 mycroft * ERAL 1 00 10XXXX Erase all registers
39 1.1 mycroft * WRAL 1 00 01XXXX D15 - D0 Writes to all registers
40 1.1 mycroft * EWDS 1 00 00XXXX Disables all programming
41 1.1 mycroft * instructions
42 1.1 mycroft * *Note: A value of X for address is a don't care condition.
43 1.1 mycroft *
44 1.1 mycroft * The 93C46 has a four wire interface: clock, chip select, data in, and
45 1.1 mycroft * data out. In order to perform one of the above functions, you need
46 1.1 mycroft * to enable the chip select for a clock period (typically a minimum of
47 1.1 mycroft * 1 usec, with the clock high and low a minimum of 750 and 250 nsec
48 1.1 mycroft * respectively. While the chip select remains high, you can clock in
49 1.1 mycroft * the instructions (above) starting with the start bit, followed by the
50 1.1 mycroft * OP code, Address, and Data (if needed). For the READ instruction, the
51 1.1 mycroft * requested 16-bit register contents is read from the data out line but
52 1.1 mycroft * is preceded by an initial zero (leading 0, followed by 16-bits, MSB
53 1.1 mycroft * first). The clock cycling from low to high initiates the next data
54 1.1 mycroft * bit to be sent from the chip.
55 1.1 mycroft *
56 1.1 mycroft */
57 1.1 mycroft
58 1.1 mycroft #include <sys/param.h>
59 1.1 mycroft #include <sys/systm.h>
60 1.1 mycroft #if defined(__FreeBSD__)
61 1.1 mycroft #include <machine/clock.h>
62 1.1 mycroft #include <i386/scsi/93cx6.h>
63 1.1 mycroft #elif defined(__NetBSD__)
64 1.1 mycroft #include <machine/bus.h>
65 1.1 mycroft #include <dev/ic/smc93cx6var.h>
66 1.1 mycroft #endif
67 1.1 mycroft
68 1.1 mycroft /*
69 1.1 mycroft * Right now, we only have to read the SEEPROM. But we make it easier to
70 1.1 mycroft * add other 93Cx6 functions.
71 1.1 mycroft */
72 1.1 mycroft static struct seeprom_cmd {
73 1.1 mycroft unsigned char len;
74 1.1 mycroft unsigned char bits[3];
75 1.1 mycroft } seeprom_read = {3, {1, 1, 0}};
76 1.1 mycroft
77 1.1 mycroft /*
78 1.1 mycroft * Wait for the SEERDY to go high; about 800 ns.
79 1.1 mycroft */
80 1.1 mycroft #define CLOCK_PULSE(sd, rdy) \
81 1.1 mycroft while ((SEEPROM_INB(sd) & rdy) == 0) { \
82 1.1 mycroft ; /* Do nothing */ \
83 1.1 mycroft }
84 1.1 mycroft
85 1.1 mycroft /*
86 1.1 mycroft * Read the serial EEPROM and returns 1 if successful and 0 if
87 1.1 mycroft * not successful.
88 1.1 mycroft */
89 1.1 mycroft int
90 1.1 mycroft read_seeprom(sd, buf, start_addr, count)
91 1.1 mycroft struct seeprom_descriptor *sd;
92 1.1 mycroft u_int16_t *buf;
93 1.1 mycroft #if defined(__FreeBSD__)
94 1.1 mycroft u_int start_addr;
95 1.1 mycroft int count;
96 1.1 mycroft #elif defined(__NetBSD__)
97 1.1 mycroft bus_io_size_t start_addr;
98 1.1 mycroft bus_io_size_t count;
99 1.1 mycroft #endif
100 1.1 mycroft {
101 1.1 mycroft int i = 0, k = 0;
102 1.1 mycroft u_int16_t v;
103 1.1 mycroft u_int8_t temp;
104 1.1 mycroft
105 1.1 mycroft /*
106 1.1 mycroft * Read the requested registers of the seeprom. The loop
107 1.1 mycroft * will range from 0 to count-1.
108 1.1 mycroft */
109 1.1 mycroft for (k = start_addr; k < count + start_addr; k++) {
110 1.1 mycroft /* Send chip select for one clock cycle. */
111 1.1 mycroft temp = sd->sd_MS ^ sd->sd_CS;
112 1.1 mycroft SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
113 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
114 1.1 mycroft
115 1.1 mycroft /*
116 1.1 mycroft * Now we're ready to send the read command followed by the
117 1.1 mycroft * address of the 16-bit register we want to read.
118 1.1 mycroft */
119 1.1 mycroft for (i = 0; i < seeprom_read.len; i++) {
120 1.1 mycroft if (seeprom_read.bits[i] != 0)
121 1.1 mycroft temp ^= sd->sd_DO;
122 1.1 mycroft SEEPROM_OUTB(sd, temp);
123 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
124 1.1 mycroft SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
125 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
126 1.1 mycroft if (seeprom_read.bits[i] != 0)
127 1.1 mycroft temp ^= sd->sd_DO;
128 1.1 mycroft }
129 1.1 mycroft /* Send the 6 bit address (MSB first, LSB last). */
130 1.1 mycroft for (i = 5; i >= 0; i--) {
131 1.1 mycroft if ((k & (1 << i)) != 0)
132 1.1 mycroft temp ^= sd->sd_DO;
133 1.1 mycroft SEEPROM_OUTB(sd, temp);
134 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
135 1.1 mycroft SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
136 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
137 1.1 mycroft if ((k & (1 << i)) != 0)
138 1.1 mycroft temp ^= sd->sd_DO;
139 1.1 mycroft }
140 1.1 mycroft
141 1.1 mycroft /*
142 1.1 mycroft * Now read the 16 bit register. An initial 0 precedes the
143 1.1 mycroft * register contents which begins with bit 15 (MSB) and ends
144 1.1 mycroft * with bit 0 (LSB). The initial 0 will be shifted off the
145 1.1 mycroft * top of our word as we let the loop run from 0 to 16.
146 1.1 mycroft */
147 1.1 mycroft v = 0;
148 1.1 mycroft for (i = 16; i >= 0; i--) {
149 1.1 mycroft SEEPROM_OUTB(sd, temp);
150 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
151 1.1 mycroft v <<= 1;
152 1.1 mycroft if (SEEPROM_INB(sd) & sd->sd_DI)
153 1.1 mycroft v |= 1;
154 1.1 mycroft SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
155 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
156 1.1 mycroft }
157 1.1 mycroft
158 1.1 mycroft buf[k - start_addr] = v;
159 1.1 mycroft
160 1.1 mycroft /* Reset the chip select for the next command cycle. */
161 1.1 mycroft temp = sd->sd_MS;
162 1.1 mycroft SEEPROM_OUTB(sd, temp);
163 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
164 1.1 mycroft SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
165 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
166 1.1 mycroft SEEPROM_OUTB(sd, temp);
167 1.1 mycroft CLOCK_PULSE(sd, sd->sd_RDY);
168 1.1 mycroft }
169 1.1 mycroft #if 0
170 1.1 mycroft printf ("Serial EEPROM:");
171 1.1 mycroft for (k = 0; k < count; k = k + 1) {
172 1.1 mycroft if (((k % 8) == 0) && (k != 0))
173 1.1 mycroft {
174 1.1 mycroft printf ("\n ");
175 1.1 mycroft }
176 1.1 mycroft printf (" 0x%x", buf[k]);
177 1.1 mycroft }
178 1.1 mycroft printf ("\n");
179 1.1 mycroft #endif
180 1.1 mycroft return (1);
181 1.1 mycroft }
182