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smc93cx6.c revision 1.7.2.1
      1  1.7.2.1   thorpej /*	$NetBSD: smc93cx6.c,v 1.7.2.1 2001/08/25 06:16:17 thorpej Exp $	*/
      2      1.1   mycroft 
      3      1.1   mycroft /*
      4      1.6      fvdl  * Interface for the 93C66/56/46/26/06 serial eeprom parts.
      5      1.1   mycroft  *
      6      1.6      fvdl  * Copyright (c) 1995, 1996 Daniel M. Eischen
      7      1.1   mycroft  * All rights reserved.
      8      1.1   mycroft  *
      9      1.1   mycroft  * Redistribution and use in source and binary forms, with or without
     10      1.1   mycroft  * modification, are permitted provided that the following conditions
     11      1.1   mycroft  * are met:
     12      1.1   mycroft  * 1. Redistributions of source code must retain the above copyright
     13      1.1   mycroft  *    notice immediately at the beginning of the file, without modification,
     14      1.1   mycroft  *    this list of conditions, and the following disclaimer.
     15      1.1   mycroft  * 2. Redistributions in binary form must reproduce the above copyright
     16      1.1   mycroft  *    notice, this list of conditions and the following disclaimer in the
     17      1.1   mycroft  *    documentation and/or other materials provided with the distribution.
     18      1.1   mycroft  * 3. Absolutely no warranty of function or purpose is made by the author
     19      1.1   mycroft  *    Daniel M. Eischen.
     20      1.1   mycroft  * 4. Modifications may be freely made to this file if the above conditions
     21      1.1   mycroft  *    are met.
     22      1.2  explorer  *
     23      1.6      fvdl  * $FreeBSD: src/sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $
     24      1.1   mycroft  */
     25      1.1   mycroft 
     26      1.1   mycroft /*
     27      1.6      fvdl  *   The instruction set of the 93C66/56/46/26/06 chips are as follows:
     28      1.1   mycroft  *
     29      1.6      fvdl  *               Start  OP	    *
     30      1.6      fvdl  *     Function   Bit  Code  Address**  Data     Description
     31      1.1   mycroft  *     -------------------------------------------------------------------
     32      1.1   mycroft  *     READ        1    10   A5 - A0             Reads data stored in memory,
     33      1.1   mycroft  *                                               starting at specified address
     34  1.7.2.1   thorpej  *     EWEN        1    00   11XXXX              Write enable must precede
     35      1.1   mycroft  *                                               all programming modes
     36      1.1   mycroft  *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
     37      1.1   mycroft  *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
     38      1.1   mycroft  *     ERAL        1    00   10XXXX              Erase all registers
     39      1.1   mycroft  *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
     40      1.1   mycroft  *     EWDS        1    00   00XXXX              Disables all programming
     41      1.1   mycroft  *                                               instructions
     42      1.1   mycroft  *     *Note: A value of X for address is a don't care condition.
     43      1.6      fvdl  *    **Note: There are 8 address bits for the 93C56/66 chips unlike
     44      1.6      fvdl  *	      the 93C46/26/06 chips which have 6 address bits.
     45      1.1   mycroft  *
     46      1.1   mycroft  *   The 93C46 has a four wire interface: clock, chip select, data in, and
     47      1.1   mycroft  *   data out.  In order to perform one of the above functions, you need
     48      1.1   mycroft  *   to enable the chip select for a clock period (typically a minimum of
     49      1.1   mycroft  *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
     50      1.6      fvdl  *   respectively).  While the chip select remains high, you can clock in
     51      1.1   mycroft  *   the instructions (above) starting with the start bit, followed by the
     52      1.1   mycroft  *   OP code, Address, and Data (if needed).  For the READ instruction, the
     53      1.1   mycroft  *   requested 16-bit register contents is read from the data out line but
     54      1.1   mycroft  *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
     55      1.1   mycroft  *   first).  The clock cycling from low to high initiates the next data
     56      1.1   mycroft  *   bit to be sent from the chip.
     57      1.1   mycroft  *
     58      1.1   mycroft  */
     59      1.1   mycroft 
     60      1.6      fvdl #ifndef __NetBSD__
     61      1.6      fvdl #include "opt_aic7xxx.h"
     62      1.6      fvdl #endif
     63      1.6      fvdl 
     64      1.1   mycroft #include <sys/param.h>
     65      1.1   mycroft #include <sys/systm.h>
     66      1.6      fvdl #ifdef __NetBSD__
     67      1.1   mycroft #include <machine/bus.h>
     68      1.1   mycroft #include <dev/ic/smc93cx6var.h>
     69      1.6      fvdl #else
     70      1.6      fvdl #include <machine/bus_memio.h>
     71      1.6      fvdl #include <machine/bus_pio.h>
     72      1.6      fvdl #include <machine/bus.h>
     73      1.6      fvdl #include <dev/aic7xxx/93cx6.h>
     74      1.1   mycroft #endif
     75      1.1   mycroft 
     76      1.1   mycroft /*
     77      1.1   mycroft  * Right now, we only have to read the SEEPROM.  But we make it easier to
     78      1.1   mycroft  * add other 93Cx6 functions.
     79      1.1   mycroft  */
     80      1.1   mycroft static struct seeprom_cmd {
     81      1.1   mycroft   	unsigned char len;
     82      1.1   mycroft  	unsigned char bits[3];
     83      1.1   mycroft } seeprom_read = {3, {1, 1, 0}};
     84      1.1   mycroft 
     85      1.1   mycroft /*
     86      1.1   mycroft  * Wait for the SEERDY to go high; about 800 ns.
     87      1.1   mycroft  */
     88      1.6      fvdl #define CLOCK_PULSE(sd, rdy)	{					\
     89      1.7     lukem 	int cpi = 1000;							\
     90      1.7     lukem 	while ((SEEPROM_STATUS_INB(sd) & rdy) == 0 && cpi-- > 0) {	\
     91      1.6      fvdl 		;  /* Do nothing */					\
     92      1.6      fvdl 	}								\
     93      1.6      fvdl 	(void)SEEPROM_INB(sd);	/* Clear clock */			\
     94      1.6      fvdl }
     95      1.1   mycroft 
     96      1.1   mycroft /*
     97      1.1   mycroft  * Read the serial EEPROM and returns 1 if successful and 0 if
     98      1.1   mycroft  * not successful.
     99      1.1   mycroft  */
    100      1.1   mycroft int
    101      1.1   mycroft read_seeprom(sd, buf, start_addr, count)
    102      1.1   mycroft 	struct seeprom_descriptor *sd;
    103      1.1   mycroft 	u_int16_t *buf;
    104      1.5   thorpej 	bus_size_t start_addr;
    105      1.5   thorpej 	bus_size_t count;
    106      1.1   mycroft {
    107      1.6      fvdl 	int i = 0;
    108      1.6      fvdl 	u_int k = 0;
    109      1.1   mycroft 	u_int16_t v;
    110      1.1   mycroft 	u_int8_t temp;
    111      1.1   mycroft 
    112      1.1   mycroft 	/*
    113      1.1   mycroft 	 * Read the requested registers of the seeprom.  The loop
    114      1.1   mycroft 	 * will range from 0 to count-1.
    115      1.1   mycroft 	 */
    116      1.1   mycroft 	for (k = start_addr; k < count + start_addr; k++) {
    117      1.1   mycroft 		/* Send chip select for one clock cycle. */
    118      1.1   mycroft 		temp = sd->sd_MS ^ sd->sd_CS;
    119      1.1   mycroft 		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    120      1.1   mycroft 		CLOCK_PULSE(sd, sd->sd_RDY);
    121      1.1   mycroft 
    122      1.1   mycroft 		/*
    123      1.1   mycroft 		 * Now we're ready to send the read command followed by the
    124      1.1   mycroft 		 * address of the 16-bit register we want to read.
    125      1.1   mycroft 		 */
    126      1.1   mycroft 		for (i = 0; i < seeprom_read.len; i++) {
    127      1.1   mycroft 			if (seeprom_read.bits[i] != 0)
    128      1.1   mycroft 				temp ^= sd->sd_DO;
    129      1.1   mycroft 			SEEPROM_OUTB(sd, temp);
    130      1.1   mycroft 			CLOCK_PULSE(sd, sd->sd_RDY);
    131      1.1   mycroft 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    132      1.1   mycroft 			CLOCK_PULSE(sd, sd->sd_RDY);
    133      1.1   mycroft 			if (seeprom_read.bits[i] != 0)
    134      1.1   mycroft 				temp ^= sd->sd_DO;
    135      1.1   mycroft 		}
    136      1.6      fvdl 		/* Send the 6 or 8 bit address (MSB first, LSB last). */
    137      1.6      fvdl 		for (i = (sd->sd_chip - 1); i >= 0; i--) {
    138      1.1   mycroft 			if ((k & (1 << i)) != 0)
    139      1.1   mycroft 				temp ^= sd->sd_DO;
    140      1.1   mycroft 			SEEPROM_OUTB(sd, temp);
    141      1.1   mycroft 			CLOCK_PULSE(sd, sd->sd_RDY);
    142      1.1   mycroft 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    143      1.1   mycroft 			CLOCK_PULSE(sd, sd->sd_RDY);
    144      1.1   mycroft 			if ((k & (1 << i)) != 0)
    145      1.1   mycroft 				temp ^= sd->sd_DO;
    146      1.1   mycroft 		}
    147      1.1   mycroft 
    148      1.1   mycroft 		/*
    149      1.1   mycroft 		 * Now read the 16 bit register.  An initial 0 precedes the
    150      1.1   mycroft 		 * register contents which begins with bit 15 (MSB) and ends
    151      1.1   mycroft 		 * with bit 0 (LSB).  The initial 0 will be shifted off the
    152      1.1   mycroft 		 * top of our word as we let the loop run from 0 to 16.
    153      1.1   mycroft 		 */
    154      1.1   mycroft 		v = 0;
    155      1.1   mycroft 		for (i = 16; i >= 0; i--) {
    156      1.1   mycroft 			SEEPROM_OUTB(sd, temp);
    157      1.1   mycroft 			CLOCK_PULSE(sd, sd->sd_RDY);
    158      1.1   mycroft 			v <<= 1;
    159      1.6      fvdl 			if (SEEPROM_DATA_INB(sd) & sd->sd_DI)
    160      1.1   mycroft 				v |= 1;
    161      1.1   mycroft 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    162      1.1   mycroft 			CLOCK_PULSE(sd, sd->sd_RDY);
    163      1.1   mycroft 		}
    164      1.1   mycroft 
    165      1.1   mycroft 		buf[k - start_addr] = v;
    166      1.1   mycroft 
    167      1.1   mycroft 		/* Reset the chip select for the next command cycle. */
    168      1.1   mycroft 		temp = sd->sd_MS;
    169      1.1   mycroft 		SEEPROM_OUTB(sd, temp);
    170      1.1   mycroft 		CLOCK_PULSE(sd, sd->sd_RDY);
    171      1.1   mycroft 		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    172      1.1   mycroft 		CLOCK_PULSE(sd, sd->sd_RDY);
    173      1.1   mycroft 		SEEPROM_OUTB(sd, temp);
    174      1.1   mycroft 		CLOCK_PULSE(sd, sd->sd_RDY);
    175      1.1   mycroft 	}
    176      1.6      fvdl #ifdef AHC_DUMP_EEPROM
    177      1.6      fvdl 	printf("\nSerial EEPROM:\n\t");
    178      1.1   mycroft 	for (k = 0; k < count; k = k + 1) {
    179      1.6      fvdl 		if (((k % 8) == 0) && (k != 0)) {
    180      1.6      fvdl 			printf ("\n\t");
    181      1.1   mycroft 		}
    182      1.4  christos 		printf (" 0x%x", buf[k]);
    183      1.1   mycroft 	}
    184      1.4  christos 	printf ("\n");
    185      1.1   mycroft #endif
    186      1.1   mycroft 	return (1);
    187      1.1   mycroft }
    188