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smc93cx6.c revision 1.2
      1 /*	$NetBSD: smc93cx6.c,v 1.2 1996/07/10 22:50:49 explorer Exp $	*/
      2 
      3 /*
      4  * Interface for the 93C46/26/06 serial eeprom parts.
      5  *
      6  * Copyright (c) 1995 Daniel M. Eischen
      7  * All rights reserved.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice immediately at the beginning of the file, without modification,
     14  *    this list of conditions, and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. Absolutely no warranty of function or purpose is made by the author
     19  *    Daniel M. Eischen.
     20  * 4. Modifications may be freely made to this file if the above conditions
     21  *    are met.
     22  *
     23  * from	Id: 93cx6.c,v 1.5 1996/05/30 07:19:54 gibbs Exp
     24  */
     25 
     26 /*
     27  *   The instruction set of the 93C46/26/06 chips are as follows:
     28  *
     29  *               Start  OP
     30  *     Function   Bit  Code  Address    Data     Description
     31  *     -------------------------------------------------------------------
     32  *     READ        1    10   A5 - A0             Reads data stored in memory,
     33  *                                               starting at specified address
     34  *     EWEN        1    00   11XXXX              Write enable must preceed
     35  *                                               all programming modes
     36  *     ERASE       1    11   A5 - A0             Erase register A5A4A3A2A1A0
     37  *     WRITE       1    01   A5 - A0   D15 - D0  Writes register
     38  *     ERAL        1    00   10XXXX              Erase all registers
     39  *     WRAL        1    00   01XXXX    D15 - D0  Writes to all registers
     40  *     EWDS        1    00   00XXXX              Disables all programming
     41  *                                               instructions
     42  *     *Note: A value of X for address is a don't care condition.
     43  *
     44  *   The 93C46 has a four wire interface: clock, chip select, data in, and
     45  *   data out.  In order to perform one of the above functions, you need
     46  *   to enable the chip select for a clock period (typically a minimum of
     47  *   1 usec, with the clock high and low a minimum of 750 and 250 nsec
     48  *   respectively.  While the chip select remains high, you can clock in
     49  *   the instructions (above) starting with the start bit, followed by the
     50  *   OP code, Address, and Data (if needed).  For the READ instruction, the
     51  *   requested 16-bit register contents is read from the data out line but
     52  *   is preceded by an initial zero (leading 0, followed by 16-bits, MSB
     53  *   first).  The clock cycling from low to high initiates the next data
     54  *   bit to be sent from the chip.
     55  *
     56  */
     57 
     58 #include <sys/param.h>
     59 #include <sys/systm.h>
     60 #if defined(__FreeBSD__)
     61 #include <machine/clock.h>
     62 #include <i386/scsi/93cx6.h>
     63 #elif defined(__NetBSD__)
     64 #include <machine/bus.h>
     65 #include <dev/ic/smc93cx6var.h>
     66 #endif
     67 
     68 /*
     69  * Right now, we only have to read the SEEPROM.  But we make it easier to
     70  * add other 93Cx6 functions.
     71  */
     72 static struct seeprom_cmd {
     73   	unsigned char len;
     74  	unsigned char bits[3];
     75 } seeprom_read = {3, {1, 1, 0}};
     76 
     77 /*
     78  * Wait for the SEERDY to go high; about 800 ns.
     79  */
     80 #define CLOCK_PULSE(sd, rdy)			\
     81 	while ((SEEPROM_INB(sd) & rdy) == 0) {		\
     82 		;  /* Do nothing */		\
     83 	}
     84 
     85 /*
     86  * Read the serial EEPROM and returns 1 if successful and 0 if
     87  * not successful.
     88  */
     89 int
     90 read_seeprom(sd, buf, start_addr, count)
     91 	struct seeprom_descriptor *sd;
     92 	u_int16_t *buf;
     93 #if defined(__FreeBSD__)
     94 	u_int start_addr;
     95 	int count;
     96 #elif defined(__NetBSD__)
     97 	bus_io_size_t start_addr;
     98 	bus_io_size_t count;
     99 #endif
    100 {
    101 	int i = 0, k = 0;
    102 	u_int16_t v;
    103 	u_int8_t temp;
    104 
    105 	/*
    106 	 * Read the requested registers of the seeprom.  The loop
    107 	 * will range from 0 to count-1.
    108 	 */
    109 	for (k = start_addr; k < count + start_addr; k++) {
    110 		/* Send chip select for one clock cycle. */
    111 		temp = sd->sd_MS ^ sd->sd_CS;
    112 		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    113 		CLOCK_PULSE(sd, sd->sd_RDY);
    114 
    115 		/*
    116 		 * Now we're ready to send the read command followed by the
    117 		 * address of the 16-bit register we want to read.
    118 		 */
    119 		for (i = 0; i < seeprom_read.len; i++) {
    120 			if (seeprom_read.bits[i] != 0)
    121 				temp ^= sd->sd_DO;
    122 			SEEPROM_OUTB(sd, temp);
    123 			CLOCK_PULSE(sd, sd->sd_RDY);
    124 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    125 			CLOCK_PULSE(sd, sd->sd_RDY);
    126 			if (seeprom_read.bits[i] != 0)
    127 				temp ^= sd->sd_DO;
    128 		}
    129 		/* Send the 6 bit address (MSB first, LSB last). */
    130 		for (i = 5; i >= 0; i--) {
    131 			if ((k & (1 << i)) != 0)
    132 				temp ^= sd->sd_DO;
    133 			SEEPROM_OUTB(sd, temp);
    134 			CLOCK_PULSE(sd, sd->sd_RDY);
    135 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    136 			CLOCK_PULSE(sd, sd->sd_RDY);
    137 			if ((k & (1 << i)) != 0)
    138 				temp ^= sd->sd_DO;
    139 		}
    140 
    141 		/*
    142 		 * Now read the 16 bit register.  An initial 0 precedes the
    143 		 * register contents which begins with bit 15 (MSB) and ends
    144 		 * with bit 0 (LSB).  The initial 0 will be shifted off the
    145 		 * top of our word as we let the loop run from 0 to 16.
    146 		 */
    147 		v = 0;
    148 		for (i = 16; i >= 0; i--) {
    149 			SEEPROM_OUTB(sd, temp);
    150 			CLOCK_PULSE(sd, sd->sd_RDY);
    151 			v <<= 1;
    152 			if (SEEPROM_INB(sd) & sd->sd_DI)
    153 				v |= 1;
    154 			SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    155 			CLOCK_PULSE(sd, sd->sd_RDY);
    156 		}
    157 
    158 		buf[k - start_addr] = v;
    159 
    160 		/* Reset the chip select for the next command cycle. */
    161 		temp = sd->sd_MS;
    162 		SEEPROM_OUTB(sd, temp);
    163 		CLOCK_PULSE(sd, sd->sd_RDY);
    164 		SEEPROM_OUTB(sd, temp ^ sd->sd_CK);
    165 		CLOCK_PULSE(sd, sd->sd_RDY);
    166 		SEEPROM_OUTB(sd, temp);
    167 		CLOCK_PULSE(sd, sd->sd_RDY);
    168 	}
    169 #if 0
    170 	printf ("Serial EEPROM:");
    171 	for (k = 0; k < count; k = k + 1) {
    172 		if (((k % 8) == 0) && (k != 0))
    173 		{
    174 			printf ("\n              ");
    175 		}
    176 		printf (" 0x%x", buf[k]);
    177 	}
    178 	printf ("\n");
    179 #endif
    180 	return (1);
    181 }
    182