smc93cx6.c revision 1.6
1 /* $NetBSD: smc93cx6.c,v 1.6 2000/03/15 02:08:30 fvdl Exp $ */ 2 3 /* 4 * Interface for the 93C66/56/46/26/06 serial eeprom parts. 5 * 6 * Copyright (c) 1995, 1996 Daniel M. Eischen 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice immediately at the beginning of the file, without modification, 14 * this list of conditions, and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Absolutely no warranty of function or purpose is made by the author 19 * Daniel M. Eischen. 20 * 4. Modifications may be freely made to this file if the above conditions 21 * are met. 22 * 23 * $FreeBSD: src/sys/dev/aic7xxx/93cx6.c,v 1.5 2000/01/07 23:08:17 gibbs Exp $ 24 */ 25 26 /* 27 * The instruction set of the 93C66/56/46/26/06 chips are as follows: 28 * 29 * Start OP * 30 * Function Bit Code Address** Data Description 31 * ------------------------------------------------------------------- 32 * READ 1 10 A5 - A0 Reads data stored in memory, 33 * starting at specified address 34 * EWEN 1 00 11XXXX Write enable must preceed 35 * all programming modes 36 * ERASE 1 11 A5 - A0 Erase register A5A4A3A2A1A0 37 * WRITE 1 01 A5 - A0 D15 - D0 Writes register 38 * ERAL 1 00 10XXXX Erase all registers 39 * WRAL 1 00 01XXXX D15 - D0 Writes to all registers 40 * EWDS 1 00 00XXXX Disables all programming 41 * instructions 42 * *Note: A value of X for address is a don't care condition. 43 * **Note: There are 8 address bits for the 93C56/66 chips unlike 44 * the 93C46/26/06 chips which have 6 address bits. 45 * 46 * The 93C46 has a four wire interface: clock, chip select, data in, and 47 * data out. In order to perform one of the above functions, you need 48 * to enable the chip select for a clock period (typically a minimum of 49 * 1 usec, with the clock high and low a minimum of 750 and 250 nsec 50 * respectively). While the chip select remains high, you can clock in 51 * the instructions (above) starting with the start bit, followed by the 52 * OP code, Address, and Data (if needed). For the READ instruction, the 53 * requested 16-bit register contents is read from the data out line but 54 * is preceded by an initial zero (leading 0, followed by 16-bits, MSB 55 * first). The clock cycling from low to high initiates the next data 56 * bit to be sent from the chip. 57 * 58 */ 59 60 #ifndef __NetBSD__ 61 #include "opt_aic7xxx.h" 62 #endif 63 64 #include <sys/param.h> 65 #include <sys/systm.h> 66 #ifdef __NetBSD__ 67 #include <machine/bus.h> 68 #include <dev/ic/smc93cx6var.h> 69 #else 70 #include <machine/bus_memio.h> 71 #include <machine/bus_pio.h> 72 #include <machine/bus.h> 73 #include <dev/aic7xxx/93cx6.h> 74 #endif 75 76 /* 77 * Right now, we only have to read the SEEPROM. But we make it easier to 78 * add other 93Cx6 functions. 79 */ 80 static struct seeprom_cmd { 81 unsigned char len; 82 unsigned char bits[3]; 83 } seeprom_read = {3, {1, 1, 0}}; 84 85 /* 86 * Wait for the SEERDY to go high; about 800 ns. 87 */ 88 #define CLOCK_PULSE(sd, rdy) { \ 89 int i = 1000; \ 90 while ((SEEPROM_STATUS_INB(sd) & rdy) == 0 && i-- > 0) { \ 91 ; /* Do nothing */ \ 92 } \ 93 (void)SEEPROM_INB(sd); /* Clear clock */ \ 94 } 95 96 /* 97 * Read the serial EEPROM and returns 1 if successful and 0 if 98 * not successful. 99 */ 100 int 101 read_seeprom(sd, buf, start_addr, count) 102 struct seeprom_descriptor *sd; 103 u_int16_t *buf; 104 bus_size_t start_addr; 105 bus_size_t count; 106 { 107 int i = 0; 108 u_int k = 0; 109 u_int16_t v; 110 u_int8_t temp; 111 112 /* 113 * Read the requested registers of the seeprom. The loop 114 * will range from 0 to count-1. 115 */ 116 for (k = start_addr; k < count + start_addr; k++) { 117 /* Send chip select for one clock cycle. */ 118 temp = sd->sd_MS ^ sd->sd_CS; 119 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 120 CLOCK_PULSE(sd, sd->sd_RDY); 121 122 /* 123 * Now we're ready to send the read command followed by the 124 * address of the 16-bit register we want to read. 125 */ 126 for (i = 0; i < seeprom_read.len; i++) { 127 if (seeprom_read.bits[i] != 0) 128 temp ^= sd->sd_DO; 129 SEEPROM_OUTB(sd, temp); 130 CLOCK_PULSE(sd, sd->sd_RDY); 131 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 132 CLOCK_PULSE(sd, sd->sd_RDY); 133 if (seeprom_read.bits[i] != 0) 134 temp ^= sd->sd_DO; 135 } 136 /* Send the 6 or 8 bit address (MSB first, LSB last). */ 137 for (i = (sd->sd_chip - 1); i >= 0; i--) { 138 if ((k & (1 << i)) != 0) 139 temp ^= sd->sd_DO; 140 SEEPROM_OUTB(sd, temp); 141 CLOCK_PULSE(sd, sd->sd_RDY); 142 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 143 CLOCK_PULSE(sd, sd->sd_RDY); 144 if ((k & (1 << i)) != 0) 145 temp ^= sd->sd_DO; 146 } 147 148 /* 149 * Now read the 16 bit register. An initial 0 precedes the 150 * register contents which begins with bit 15 (MSB) and ends 151 * with bit 0 (LSB). The initial 0 will be shifted off the 152 * top of our word as we let the loop run from 0 to 16. 153 */ 154 v = 0; 155 for (i = 16; i >= 0; i--) { 156 SEEPROM_OUTB(sd, temp); 157 CLOCK_PULSE(sd, sd->sd_RDY); 158 v <<= 1; 159 if (SEEPROM_DATA_INB(sd) & sd->sd_DI) 160 v |= 1; 161 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 162 CLOCK_PULSE(sd, sd->sd_RDY); 163 } 164 165 buf[k - start_addr] = v; 166 167 /* Reset the chip select for the next command cycle. */ 168 temp = sd->sd_MS; 169 SEEPROM_OUTB(sd, temp); 170 CLOCK_PULSE(sd, sd->sd_RDY); 171 SEEPROM_OUTB(sd, temp ^ sd->sd_CK); 172 CLOCK_PULSE(sd, sd->sd_RDY); 173 SEEPROM_OUTB(sd, temp); 174 CLOCK_PULSE(sd, sd->sd_RDY); 175 } 176 #ifdef AHC_DUMP_EEPROM 177 printf("\nSerial EEPROM:\n\t"); 178 for (k = 0; k < count; k = k + 1) { 179 if (((k % 8) == 0) && (k != 0)) { 180 printf ("\n\t"); 181 } 182 printf (" 0x%x", buf[k]); 183 } 184 printf ("\n"); 185 #endif 186 return (1); 187 } 188
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