ssdfbvar.h revision 1.1 1 1.1 tnn /* $NetBSD: ssdfbvar.h,v 1.1 2019/03/17 00:57:15 tnn Exp $ */
2 1.1 tnn
3 1.1 tnn /*
4 1.1 tnn * Copyright (c) 2019 The NetBSD Foundation, Inc.
5 1.1 tnn * All rights reserved.
6 1.1 tnn *
7 1.1 tnn * This code is derived from software contributed to The NetBSD Foundation
8 1.1 tnn * by Tobias Nygren.
9 1.1 tnn *
10 1.1 tnn * Redistribution and use in source and binary forms, with or without
11 1.1 tnn * modification, are permitted provided that the following conditions
12 1.1 tnn * are met:
13 1.1 tnn * 1. Redistributions of source code must retain the above copyright
14 1.1 tnn * notice, this list of conditions and the following disclaimer.
15 1.1 tnn * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 tnn * notice, this list of conditions and the following disclaimer in the
17 1.1 tnn * documentation and/or other materials provided with the distribution.
18 1.1 tnn *
19 1.1 tnn * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 tnn * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 tnn * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 tnn * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 tnn * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 tnn * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 tnn * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 tnn * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 tnn * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 tnn * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 tnn * POSSIBILITY OF SUCH DAMAGE.
30 1.1 tnn */
31 1.1 tnn
32 1.1 tnn /*
33 1.1 tnn * cfdata attachment flags
34 1.1 tnn */
35 1.1 tnn #define SSDFB_ATTACH_FLAG_PRODUCT_MASK 0x000000ff
36 1.1 tnn #define SSDFB_ATTACH_FLAG_UPSIDEDOWN 0x00000100
37 1.1 tnn #define SSDFB_ATTACH_FLAG_INVERSE 0x00000200
38 1.1 tnn #define SSDFB_ATTACH_FLAG_CONSOLE 0x00000400
39 1.1 tnn
40 1.1 tnn /*
41 1.1 tnn * Fundamental commands
42 1.1 tnn * SSD1306 Rev 1.1 p.28
43 1.1 tnn * SH1106 Rev 0.1 p.19,20,22
44 1.1 tnn */
45 1.1 tnn #define SSDFB_CMD_SET_CONTRAST_CONTROL 0x81
46 1.1 tnn #define SSDFB_CMD_ENTIRE_DISPLAY_OFF 0xa4
47 1.1 tnn #define SSDFB_CMD_ENTIRE_DISPLAY_ON 0xa5
48 1.1 tnn #define SSDFB_CMD_SET_NORMAL_DISPLAY 0xa6
49 1.1 tnn #define SSDFB_CMD_SET_INVERSE_DISPLAY 0xa7
50 1.1 tnn #define SSDFB_CMD_SET_DISPLAY_OFF 0xae
51 1.1 tnn #define SSDFB_CMD_SET_DISPLAY_ON 0xaf
52 1.1 tnn
53 1.1 tnn /*
54 1.1 tnn * Scrolling commands; SSD1306 Rev 1.1 p. 28
55 1.1 tnn */
56 1.1 tnn #define SSDFB_CMD_VERTICAL_AND_RIGHT_SCROLL 0x29
57 1.1 tnn #define SSDFB_CMD_VERTICAL_AND_LEFT_SCROLL 0x2a
58 1.1 tnn #define SSDFB_CMD_DEACTIVATE_SCROLL 0x2e
59 1.1 tnn #define SSDFB_CMD_ACTIVATE_SCROLL 0x2f
60 1.1 tnn #define SSDFB_CMD_SET_VERTICAL_SCROLL_AREA 0xa3
61 1.1 tnn
62 1.1 tnn /*
63 1.1 tnn * Addressing commands
64 1.1 tnn * SSD1306 Rev 1.1 p.30
65 1.1 tnn * SH1106 Rev 0.1 p.18,22
66 1.1 tnn */
67 1.1 tnn #define SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_BASE 0x00
68 1.1 tnn #define SSDFB_CMD_SET_LOWER_COLUMN_START_ADDRESS_MAX 0x0f
69 1.1 tnn #define SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_BASE 0x10
70 1.1 tnn #define SSDFB_CMD_SET_HIGHER_COLUMN_START_ADDRESS_MAX 0x1f
71 1.1 tnn #define SSD1306_CMD_SET_MEMORY_ADDRESSING_MODE 0x20
72 1.1 tnn #define SSD1306_MEMORY_ADDRESSING_MODE_HORIZONTAL 0x00
73 1.1 tnn #define SSD1306_MEMORY_ADDRESSING_MODE_VERTICAL 0x01
74 1.1 tnn #define SSD1306_MEMORY_ADDRESSING_MODE_PAGE 0x02
75 1.1 tnn #define SSD1306_CMD_SET_COLUMN_ADDRESS 0x21
76 1.1 tnn #define SSD1306_CMD_SET_PAGE_ADDRESS 0x22
77 1.1 tnn #define SSDFB_CMD_SET_PAGE_START_ADDRESS_BASE 0xb0
78 1.1 tnn #define SSDFB_CMD_SET_PAGE_START_ADDRESS_MAX 0xb7
79 1.1 tnn
80 1.1 tnn /*
81 1.1 tnn * Resolution & hardware layout commands
82 1.1 tnn * SSD1306 Rev 1.1 p.31
83 1.1 tnn * SH1106 Rev 0.1 p.19,20,21,23
84 1.1 tnn */
85 1.1 tnn #define SSDFB_CMD_SET_DISPLAY_START_LINE_BASE 0x40
86 1.1 tnn #define SSDFB_CMD_SET_DISPLAY_START_LINE_MAX 0x7f
87 1.1 tnn #define SSDFB_CMD_SET_SEGMENT_REMAP_NORMAL 0xa0
88 1.1 tnn #define SSDFB_CMD_SET_SEGMENT_REMAP_REVERSE 0xa1
89 1.1 tnn #define SSDFB_CMD_SET_MULTIPLEX_RATIO 0xa8
90 1.1 tnn #define SSDFB_CMD_SET_COM_OUTPUT_DIRECTION_NORMAL 0xc0
91 1.1 tnn #define SSDFB_CMD_SET_COM_OUTPUT_DIRECTION_REMAP 0xc8
92 1.1 tnn #define SSDFB_CMD_SET_DISPLAY_OFFSET 0xd3
93 1.1 tnn #define SSDFB_CMD_SET_COM_PINS_HARDWARE_CFG 0xda
94 1.1 tnn #define SSDFB_COM_PINS_A1_MASK 0x02
95 1.1 tnn #define SSDFB_COM_PINS_ALTERNATIVE_MASK 0x10
96 1.1 tnn #define SSDFB_COM_PINS_REMAP_MASK 0x20
97 1.1 tnn
98 1.1 tnn /*
99 1.1 tnn * Timing & driving commands
100 1.1 tnn * SSD1306 Rev 1.1 p.32
101 1.1 tnn * SH1106 Rev 0.1 p.24,25,26
102 1.1 tnn */
103 1.1 tnn #define SSDFB_CMD_SET_DISPLAY_CLOCK_RATIO 0xd5
104 1.1 tnn #define SSDFB_DISPLAY_CLOCK_DIVIDER_MASK 0x0f
105 1.1 tnn #define SSDFB_DISPLAY_CLOCK_DIVIDER_SHIFT 0
106 1.1 tnn #define SSDFB_DISPLAY_CLOCK_OSCILLATOR_MASK 0xf0
107 1.1 tnn #define SSDFB_DISPLAY_CLOCK_OSCILLATOR_SHIFT 4
108 1.1 tnn #define SSDFB_CMD_SET_PRECHARGE_PERIOD 0xd9
109 1.1 tnn #define SSDFB_PRECHARGE_MASK 0x0f
110 1.1 tnn #define SSDFB_PRECHARGE_SHIFT 0
111 1.1 tnn #define SSDFB_DISCHARGE_MASK 0xf0
112 1.1 tnn #define SSDFB_DISCHARGE_SHIFT 4
113 1.1 tnn #define SSDFB_CMD_SET_VCOMH_DESELECT_LEVEL 0xdb
114 1.1 tnn #define SSD1306_VCOMH_DESELECT_LEVEL_0_65_VCC 0x00
115 1.1 tnn #define SSD1306_VCOMH_DESELECT_LEVEL_0_77_VCC 0x20
116 1.1 tnn #define SSD1306_VCOMH_DESELECT_LEVEL_0_83_VCC 0x30
117 1.1 tnn #define SH1106_VCOMH_DESELECT_LEVEL_DEFAULT 0x35
118 1.1 tnn
119 1.1 tnn /*
120 1.1 tnn * Misc commands
121 1.1 tnn * SSD1306 Rev 1.1 p.32
122 1.1 tnn * SH1106 Rev 0.1 p.27,28
123 1.1 tnn */
124 1.1 tnn #define SSDFB_CMD_NOP 0xe3
125 1.1 tnn #define SH1106_CMD_READ_MODIFY_WRITE 0xe0
126 1.1 tnn #define SH1106_CMD_READ_MODIFY_WRITE_CANCEL 0xee
127 1.1 tnn
128 1.1 tnn /*
129 1.1 tnn * Charge pump commands
130 1.1 tnn * SSD1306 App Note Rev 0.4 p.3
131 1.1 tnn * SH1106 V0.1 p.18
132 1.1 tnn */
133 1.1 tnn #define SSD1306_CMD_SET_CHARGE_PUMP 0x8d
134 1.1 tnn #define SSD1306_CHARGE_PUMP_ENABLE 0x14
135 1.1 tnn #define SSD1306_CHARGE_PUMP_DISABE 0x10
136 1.1 tnn #define SH1106_CMD_SET_CHARGE_PUMP_7V4 0x30
137 1.1 tnn #define SH1106_CMD_SET_CHARGE_PUMP_8V0 0x31
138 1.1 tnn #define SH1106_CMD_SET_CHARGE_PUMP_8V4 0x32
139 1.1 tnn #define SH1106_CMD_SET_CHARGE_PUMP_9V0 0x33
140 1.1 tnn
141 1.1 tnn /*
142 1.1 tnn * DC-DC commands
143 1.1 tnn * SH1106 V0.1 p.18
144 1.1 tnn */
145 1.1 tnn #define SH1106_CMD_SET_DC_DC 0xad
146 1.1 tnn #define SH1106_DC_DC_OFF 0x8a
147 1.1 tnn #define SH1106_DC_DC_ON 0x8b
148 1.1 tnn
149 1.1 tnn typedef enum {
150 1.1 tnn SSDFB_CONTROLLER_UNKNOWN=0,
151 1.1 tnn SSDFB_CONTROLLER_SSD1306=1,
152 1.1 tnn SSDFB_CONTROLLER_SH1106=2,
153 1.1 tnn } ssdfb_controller_id_t;
154 1.1 tnn
155 1.1 tnn typedef enum {
156 1.1 tnn SSDFB_PRODUCT_UNKNOWN=0,
157 1.1 tnn SSDFB_PRODUCT_SSD1306_GENERIC=1,
158 1.1 tnn SSDFB_PRODUCT_SH1106_GENERIC=2,
159 1.1 tnn SSDFB_PRODUCT_ADAFRUIT_931=3,
160 1.1 tnn SSDFB_PRODUCT_ADAFRUIT_938=4,
161 1.1 tnn } ssdfb_product_id_t;
162 1.1 tnn
163 1.1 tnn #define SSDFB_I2C_DEFAULT_ADDR 0x3c
164 1.1 tnn #define SSDFB_I2C_ALTERNATIVE_ADDR 0x3d
165 1.1 tnn
166 1.1 tnn /* Co bit has different behaviour in SSD1306 and SH1106 */
167 1.1 tnn #define SSDFB_I2C_CTRL_BYTE_CONTINUATION_MASK __BIT(7)
168 1.1 tnn #define SSDFB_I2C_CTRL_BYTE_DATA_MASK __BIT(6)
169 1.1 tnn
170 1.1 tnn union ssdfb_block {
171 1.1 tnn uint8_t col[8];
172 1.1 tnn uint64_t raw;
173 1.1 tnn };
174 1.1 tnn
175 1.1 tnn struct ssdfb_product {
176 1.1 tnn ssdfb_product_id_t p_product_id;
177 1.1 tnn ssdfb_controller_id_t p_controller_id;
178 1.1 tnn const char *p_name;
179 1.1 tnn int p_width;
180 1.1 tnn int p_height;
181 1.1 tnn int p_panel_shift;
182 1.1 tnn uint8_t p_fosc;
183 1.1 tnn uint8_t p_fosc_div;
184 1.1 tnn uint8_t p_precharge;
185 1.1 tnn uint8_t p_discharge;
186 1.1 tnn uint8_t p_compin_cfg;
187 1.1 tnn uint8_t p_vcomh_deselect_level;
188 1.1 tnn uint8_t p_default_contrast;
189 1.1 tnn uint8_t p_multiplex_ratio;
190 1.1 tnn uint8_t p_chargepump_cmd;
191 1.1 tnn uint8_t p_chargepump_arg;
192 1.1 tnn };
193 1.1 tnn
194 1.1 tnn struct ssdfb_softc {
195 1.1 tnn device_t sc_dev;
196 1.1 tnn const struct ssdfb_product *sc_p;
197 1.1 tnn
198 1.1 tnn /* wscons & rasops state */
199 1.1 tnn u_int sc_mode;
200 1.1 tnn int sc_fontcookie;
201 1.1 tnn struct wsdisplay_font *sc_font;
202 1.1 tnn struct wsscreen_descr sc_screen_descr;
203 1.1 tnn const struct wsscreen_descr *sc_screens[1];
204 1.1 tnn struct wsscreen_list sc_screenlist;
205 1.1 tnn struct rasops_info sc_ri;
206 1.1 tnn size_t sc_ri_bits_len;
207 1.1 tnn struct wsdisplay_emulops sc_orig_riops;
208 1.1 tnn int sc_nscreens;
209 1.1 tnn device_t sc_wsdisplay;
210 1.1 tnn bool sc_is_console;
211 1.1 tnn bool sc_usepoll;
212 1.1 tnn
213 1.1 tnn /* hardware state */
214 1.1 tnn bool sc_upsidedown;
215 1.1 tnn bool sc_inverse;
216 1.1 tnn uint8_t sc_contrast;
217 1.1 tnn bool sc_display_on;
218 1.1 tnn union ssdfb_block *sc_gddram;
219 1.1 tnn size_t sc_gddram_len;
220 1.1 tnn
221 1.1 tnn /* damage tracking */
222 1.1 tnn lwp_t *sc_thread;
223 1.1 tnn kcondvar_t sc_cond;
224 1.1 tnn kmutex_t sc_cond_mtx;
225 1.1 tnn bool sc_detaching;
226 1.1 tnn int sc_backoff;
227 1.1 tnn bool sc_modified;
228 1.1 tnn
229 1.1 tnn /* reference to bus-specific code */
230 1.1 tnn void *sc_cookie;
231 1.1 tnn int (*sc_cmd)(void *, uint8_t *, size_t, bool);
232 1.1 tnn int (*sc_transfer_rect)(void *, uint8_t, uint8_t, uint8_t, uint8_t,
233 1.1 tnn uint8_t *, size_t, bool);
234 1.1 tnn };
235 1.1 tnn
236 1.1 tnn void ssdfb_attach(struct ssdfb_softc *, int flags);
237 1.1 tnn int ssdfb_detach(struct ssdfb_softc *);
238