st16650reg.h revision 1.4 1 1.4 riastrad /* $NetBSD: st16650reg.h,v 1.4 2022/10/06 19:59:55 riastradh Exp $ */
2 1.1 fvdl
3 1.1 fvdl /*
4 1.1 fvdl * Copyright (c) 1991 The Regents of the University of California.
5 1.1 fvdl * All rights reserved.
6 1.1 fvdl *
7 1.1 fvdl * Redistribution and use in source and binary forms, with or without
8 1.1 fvdl * modification, are permitted provided that the following conditions
9 1.1 fvdl * are met:
10 1.1 fvdl * 1. Redistributions of source code must retain the above copyright
11 1.1 fvdl * notice, this list of conditions and the following disclaimer.
12 1.1 fvdl * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 fvdl * notice, this list of conditions and the following disclaimer in the
14 1.1 fvdl * documentation and/or other materials provided with the distribution.
15 1.2 agc * 3. Neither the name of the University nor the names of its contributors
16 1.1 fvdl * may be used to endorse or promote products derived from this software
17 1.1 fvdl * without specific prior written permission.
18 1.1 fvdl *
19 1.1 fvdl * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
20 1.1 fvdl * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 1.1 fvdl * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 1.1 fvdl * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
23 1.1 fvdl * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
24 1.1 fvdl * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
25 1.1 fvdl * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
26 1.1 fvdl * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
27 1.1 fvdl * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
28 1.1 fvdl * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 1.1 fvdl * SUCH DAMAGE.
30 1.1 fvdl *
31 1.1 fvdl * @(#)ns16550.h 7.1 (Berkeley) 5/9/91
32 1.1 fvdl */
33 1.1 fvdl
34 1.4 riastrad #ifndef _SYS_DEV_IC_ST16650REG_H_
35 1.4 riastrad #define _SYS_DEV_IC_ST16650REG_H_
36 1.4 riastrad
37 1.1 fvdl /*
38 1.1 fvdl * ST16650A UART registers
39 1.1 fvdl */
40 1.1 fvdl
41 1.1 fvdl #define com_data 0 /* data register (R/W) */
42 1.1 fvdl #define com_dlbl 0 /* divisor latch low (W) */
43 1.1 fvdl #define com_dlbh 1 /* divisor latch high (W) */
44 1.1 fvdl #define com_ier 1 /* interrupt enable (W) */
45 1.1 fvdl #define com_iir 2 /* interrupt identification (R) */
46 1.1 fvdl #define com_fifo 2 /* FIFO control (W) */
47 1.1 fvdl #define com_efr 2 /* Enhanced feature register (R/W) */
48 1.1 fvdl #define com_lctl 3 /* line control register (R/W) */
49 1.1 fvdl #define com_cfcr 3 /* line control register (R/W) */
50 1.1 fvdl #define com_mcr 4 /* modem control register (R/W) */
51 1.1 fvdl #define com_xon1 4 /* XON 1 character (R/W) */
52 1.1 fvdl #define com_lsr 5 /* line status register (R/W) */
53 1.1 fvdl #define com_xon2 5 /* XON 2 character (R/W) */
54 1.1 fvdl #define com_msr 6 /* modem status register (R/W) */
55 1.1 fvdl #define com_xoff1 6 /* XOFF 1 character (R/W) */
56 1.1 fvdl #define com_scratch 7 /* scratch register (R/W) */
57 1.1 fvdl #define com_xoff2 7 /* XOFF 2 character (R/W) */
58 1.4 riastrad
59 1.4 riastrad #endif /* _SYS_DEV_IC_ST16650REG_H_ */
60