stireg.h revision 1.18
1 /* $NetBSD: stireg.h,v 1.18 2025/05/30 13:42:33 tsutsui Exp $ */ 2 3 /* $OpenBSD: stireg.h,v 1.14 2015/04/05 23:25:57 miod Exp $ */ 4 5 /* 6 * Copyright (c) 2000 Michael Shalayeff 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 21 * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT, 22 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 23 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 24 * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 26 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 27 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #ifndef _IC_STIREG_H_ 32 #define _IC_STIREG_H_ 33 34 /* #define STIDEBUG */ 35 36 #define STI_REGION_MAX 8 37 #define STI_MONITOR_MAX 256 38 #define STI_DEVNAME_LEN 32 39 #define STI_NCMAP 256 40 41 /* code ROM definitions */ 42 #define STI_BEGIN 0 43 #define STI_INIT_GRAPH 0 44 #define STI_STATE_MGMT 1 45 #define STI_FONT_UNPMV 2 46 #define STI_BLOCK_MOVE 3 47 #define STI_SELF_TEST 4 48 #define STI_EXCEP_HDLR 5 49 #define STI_INQ_CONF 6 50 #define STI_SCM_ENT 7 51 #define STI_DMA_CTRL 8 52 #define STI_FLOW_CTRL 9 53 #define STI_UTIMING 10 54 #define STI_PROC_MGR 11 55 #define STI_UTIL 12 56 #define STI_END 13 57 #define STI_CODECNT 16 58 59 #define STI_CODEBASE_MAIN 0x40 60 #define STI_CODEBASE_ALT 0x80 61 62 #define STI_CODEBASE_PA STI_CODEBASE_MAIN 63 #define STI_CODEBASE_M68K STI_CODEBASE_ALT 64 #define STI_CODEBASE_PA64 STI_CODEBASE_ALT 65 66 /* sti returns */ 67 #define STI_OK 0 68 #define STI_FAIL -1 69 #define STI_NRDY 1 70 71 /* sti errno */ 72 #define STI_NOERRNO 0 /* no error */ 73 #define STI_BADREENTLVL 1 /* bad reentry level */ 74 #define STI_NOREGIONSDEF 2 /* region table is not setup */ 75 #define STI_ILLNPLANES 3 /* invalid num of text planes */ 76 #define STI_ILLINDEX 4 /* invalid font index */ 77 #define STI_ILLLOC 5 /* invalid font location */ 78 #define STI_ILLCOLOUR 6 /* invalid colour */ 79 #define STI_ILLBLKMVFROM 7 /* invalid from in blkmv */ 80 #define STI_ILLBLKMVTO 8 /* invalid to in blkmv */ 81 #define STI_ILLBLKMVSIZE 9 /* invalid size in blkmv */ 82 #define STI_BEIUNSUPP 10 /* bus error ints unsupported */ 83 #define STI_UNXPBE 11 /* unexpected bus error */ 84 #define STI_UNXHWF 12 /* unexpected hardware failure */ 85 #define STI_NEGCFG 13 /* no ext global config struct */ 86 #define STI_NEIG 14 /* no ext init struct */ 87 #define STI_ILLSCME 15 /* invalid set cmap entry */ 88 #define STI_ILLCMVAL 16 /* invalid cmap value */ 89 #define STI_NORESMEM 17 /* no requested global memory */ 90 #define STI_RESMEMCORR 18 /* reserved memory corrupted */ 91 #define STI_ILLNTBLKMV 19 /* invalid non-text blkmv */ 92 #define STI_ILLMONITOR 20 /* monitor selection is out of range */ 93 #define STI_ILLEXCADDR 21 /* invalid excpt handler addr */ 94 #define STI_ILLEXCFLAGS 22 /* invalid excpt handler flags */ 95 #define STI_NOEHE 23 /* no ext exhdl struct */ 96 #define STI_NOINQCE 24 /* no ext inq cfg struct */ 97 #define STI_ILLRGNPTR 25 /* invalid region pointer */ 98 #define STI_ILLUTLOP 26 /* invalid util opcode */ 99 #define STI_UNKNOWN 250 /* unknown error */ 100 #define STI_NOCFGPTR 251 /* no config ptr defined */ 101 #define STI_NOFLPTR 252 /* no flag ptr defined */ 102 #define STI_NOINPTR 253 /* no in ptr defined */ 103 #define STI_NOOUTPTR 254 /* no way you can get it */ 104 #define STI_NOLOCK 255 /* kernel dishonour graphics lock */ 105 106 /* colours */ 107 #define STI_COLOUR_BLACK 0 108 #define STI_COLOUR_WHITE 1 109 #define STI_COLOUR_RED 2 110 #define STI_COLOUR_YELLOW 3 111 #define STI_COLOUR_GREEN 4 112 #define STI_COLOUR_CYAN 5 113 #define STI_COLOUR_BLUE 6 114 #define STI_COLOUR_MAGENTA 7 115 116 /* LSB high */ 117 struct sti_dd { 118 uint32_t dd_type; /* 0x00 device type */ 119 #define STI_DEVTYPE1 1 120 #define STI_DEVTYPE4 3 121 uint8_t dd_unused; 122 uint8_t dd_nmon; /* 0x05 number monitor rates */ 123 uint8_t dd_grrev; /* 0x06 global rom revision */ 124 uint8_t dd_lrrev; /* 0x07 local rom revision */ 125 uint32_t dd_grid[2]; /* 0x08 graphics id */ 126 #define STI_DD_CRX 0x26D1482A /* single-head CRX */ 127 #define STI_DD_GRX 0x26D1488C /* gray-scale GRX */ 128 #define STI_DD_CRX24 0x26D148EE /* CRX+ */ 129 #define STI_DD_382C 0x27134C8E /* 382 on-board mid-res */ 130 #define STI_DD_EVRX 0x27134C9F /* 425e on-board */ 131 #define STI_DD_3X2V 0x27134CB4 /* 362/382 on-board VGA-res */ 132 #define STI_DD_TIMBER 0x27F12392 /* on-board 710, older 715 */ 133 #define STI_DD_DUAL_CRX 0x27FCCB6D /* dual-head CRX */ 134 #define STI_DD_ARTIST 0x2B4DED6D /* on-board 712/715, also GSC */ 135 #define STI_DD_HCRX 0x2BCB015A 136 #define STI_DD_EG 0x2D08C0A7 /* Visualize EG */ 137 #define STI_DD_SUMMIT 0x2FC1066B /* Visualize FX2, FX4, FX6 */ 138 #define STI_DD_PINNACLE 0x35ACDA16 /* Visualize FXe */ 139 #define STI_DD_LEGO 0x35ACDA30 /* Visualize FX5, FX10 */ 140 #define STI_DEV4_DD_GRID 0x08 /* offset for STI_DEVTYPE4 */ 141 #define STI_DEV1_DD_GRID 0x10 /* offset for STI_DEVTYPE1 */ 142 uint32_t dd_fntaddr; /* 0x10 font start address */ 143 uint32_t dd_maxst; /* 0x14 max state storage */ 144 uint32_t dd_romend; /* 0x18 rom last address */ 145 #define STI_DEV4_DD_ROMEND 0x18 /* offset for STI_DEVTYPE4 */ 146 #define STI_DEV1_DD_ROMEND 0x50 /* offset for STI_DEVTYPE1 */ 147 uint32_t dd_reglst; /* 0x1c device region list */ 148 uint16_t dd_maxreent; /* 0x20 max reent storage */ 149 uint16_t dd_maxtimo; /* 0x22 max execution timeout .1 sec */ 150 uint32_t dd_montbl; /* 0x24 mon table address, array of 151 names num of dd_nmon */ 152 uint32_t dd_udaddr; /* 0x28 user data address */ 153 uint32_t dd_stimemreq; /* 0x2c sti memory request */ 154 uint32_t dd_udsize; /* 0x30 user data size */ 155 uint16_t dd_pwruse; /* 0x34 power usage */ 156 uint8_t dd_bussup; /* 0x36 bus support */ 157 #define STI_BUSSUPPORT_GSCINTL 0x01 /* supports pulling INTL for int */ 158 #define STI_BUSSUPPORT_GSC15X 0x02 /* supports GSC 1.5X */ 159 #define STI_BUSSUPPORT_GSC2X 0x04 /* supports GSC 2.X */ 160 #define STI_BUSSUPPORT_PCIIOEIM 0x08 /* will use directed int */ 161 #define STI_BUSSUPPORT_PCISTD 0x10 /* will use std PCI int */ 162 #define STI_BUSSUPPORT_ILOCK 0x20 /* supports implicit locking */ 163 #define STI_BUSSUPPORT_ROMMAP 0x40 /* rom is only in pci erom space */ 164 #define STI_BUSSUPPORT_2DECODE 0x80 /* single address decoder */ 165 uint8_t dd_ebussup; /* 0x37 extended bus support */ 166 #define STI_EBUSSUPPORT_DMA 0x01 /* supports dma */ 167 #define STI_EBUSSUPPORT_PIOLOCK 0x02 /* no implicit locking for dma */ 168 uint8_t dd_altcodet; /* 0x38 alternate code type */ 169 #define STI_ALTCODE_UNKNOWN 0x00 170 #define STI_ALTCODE_PA64 0x01 /* alt code is in pa64 */ 171 uint8_t dd_eddst[3]; /* 0x39 extended DD struct */ 172 uint32_t dd_cfbaddr; /* 0x3c CFB address, location of 173 X11 driver to be used for 174 servers w/o accel */ 175 uint32_t dd_pacode[16]; /* 0x40 routines for pa-risc */ 176 uint32_t dd_altcode[16]; /* 0x80 routines for m68k/i386 */ 177 } __packed; 178 179 #define STI_REVISION(maj, min) (((maj) << 4) | ((min) & 0x0f)) 180 181 /* after the last region there is one indirect list ptr */ 182 struct sti_region { 183 u_int offset :14; /* page offset dev io space relative */ 184 u_int sys_only: 1; /* whether allow user access */ 185 u_int cache : 1; /* map in cache */ 186 u_int btlb : 1; /* should use BTLB if available */ 187 u_int last : 1; /* last region in the list */ 188 u_int length :14; /* size in pages */ 189 } __packed; 190 191 #define STI_PGSHIFT 12 /* sti(4) assumes 4KB/page for offset/length */ 192 193 struct sti_font { 194 uint16_t first; 195 uint16_t last; 196 uint8_t width; 197 uint8_t height; 198 uint8_t type; 199 #define STI_FONT_HPROMAN8 1 200 #define STI_FONT_KANA8 2 201 uint8_t bpc; 202 uint32_t next; 203 uint8_t uheight; 204 uint8_t uoffset; 205 uint8_t unused[2]; 206 } __packed; 207 208 struct sti_fontcfg { 209 uint16_t first; 210 uint16_t last; 211 uint8_t width; 212 uint8_t height; 213 uint8_t type; 214 uint8_t bpc; 215 uint8_t uheight; 216 uint8_t uoffset; 217 } __packed; 218 219 typedef struct sti_mon { 220 uint32_t width: 12; 221 uint32_t height: 12; 222 uint32_t hz: 7; /* low 7 bits of refresh rate */ 223 uint32_t flat: 1; /* flatpanel */ 224 uint32_t vesa: 1; /* vesa mode */ 225 uint32_t grey: 1; /* greyscale */ 226 uint32_t dblbuf: 1; /* double buffered */ 227 uint32_t user: 1; /* user-defined mode */ 228 uint32_t stereo: 1; /* stereo display */ 229 uint32_t sam: 1; /* ? */ 230 uint32_t : 15; 231 uint32_t hz_upper: 3; /* upper 3 bits of refresh rate */ 232 uint32_t font: 8; /* rom font index */ 233 } __packed *sti_mon_t; 234 235 typedef struct sti_ecfg { 236 uint8_t current_monitor; 237 uint8_t uf_boot; 238 uint16_t power; /* power dissipation Watts */ 239 uint32_t freq_ref; 240 uint32_t *addr; /* memory block of size dd_stimemreq */ 241 void *future; 242 } __packed *sti_ecfg_t; 243 244 typedef struct sti_cfg { 245 uint32_t text_planes; 246 uint16_t scr_width; 247 uint16_t scr_height; 248 uint16_t oscr_width; 249 uint16_t oscr_height; 250 uint16_t fb_width; 251 uint16_t fb_height; 252 uint32_t regions[STI_REGION_MAX]; 253 uint32_t reent_level; 254 uint32_t *save_addr; 255 sti_ecfg_t ext_cfg; 256 } __packed *sti_cfg_t; 257 258 259 /* routine types */ 260 #define STI_DEP(n) \ 261 typedef int (*sti_##n##_t)( \ 262 sti_##n##flags_t, sti_##n##in_t, sti_##n##out_t, sti_cfg_t); 263 264 typedef struct sti_initflags { 265 uint32_t flags; 266 #define STI_INITF_WAIT 0x80000000 267 #define STI_INITF_RESET 0x40000000 268 #define STI_INITF_TEXT 0x20000000 269 #define STI_INITF_NTEXT 0x10000000 270 #define STI_INITF_CLEAR 0x08000000 271 #define STI_INITF_CMB 0x04000000 /* non-text planes cmap black */ 272 #define STI_INITF_EBET 0x02000000 /* enable bus error timer */ 273 #define STI_INITF_EBETI 0x01000000 /* enable bus error timer interrupt */ 274 #define STI_INITF_PTS 0x00800000 /* preserve text settings */ 275 #define STI_INITF_PNTS 0x00400000 /* preserve non-text settings */ 276 #define STI_INITF_PBET 0x00200000 /* preserve BET settings */ 277 #define STI_INITF_PBETI 0x00100000 /* preserve BETI settings */ 278 #define STI_INITF_ICMT 0x00080000 /* init cmap for text planes */ 279 #define STI_INITF_SCMT 0x00040000 /* change current monitor type */ 280 #define STI_INITF_RIE 0x00020000 /* retain int enables */ 281 void *future; 282 } __packed *sti_initflags_t; 283 284 typedef struct sti_einitin { 285 uint8_t mon_type; 286 uint8_t pad; 287 uint16_t inflight; /* possible on pci */ 288 void *future; 289 } __packed *sti_einitin_t; 290 291 typedef struct sti_initin { 292 uint32_t text_planes; /* number of planes for text */ 293 sti_einitin_t ext_in; 294 } __packed *sti_initin_t; 295 296 typedef struct sti_initout { 297 int32_t errno; 298 uint32_t text_planes; /* number of planes used for text */ 299 void *future; 300 } __packed *sti_initout_t; 301 302 STI_DEP(init); 303 304 typedef struct sti_mgmtflags { 305 uint32_t flags; 306 #define STI_MGMTF_WAIT 0x80000000 307 #define STI_MGMTF_SAVE 0x40000000 308 #define STI_MGMTF_RALL 0x20000000 /* restore all display planes */ 309 void *future; 310 } __packed *sti_mgmtflags_t; 311 312 typedef struct sti_mgmtin { 313 void *addr; 314 void *future; 315 } __packed *sti_mgmtin_t; 316 317 typedef struct sti_mgmtout { 318 int32_t errno; 319 void *future; 320 } __packed *sti_mgmtout_t; 321 322 STI_DEP(mgmt); 323 324 typedef struct sti_unpmvflags { 325 uint32_t flags; 326 #define STI_UNPMVF_WAIT 0x80000000 327 #define STI_UNPMVF_NTXT 0x40000000 /* intp non-text planes */ 328 void *future; 329 } __packed *sti_unpmvflags_t; 330 331 typedef struct sti_unpmvin { 332 uint32_t *font_addr; /* font */ 333 uint16_t index; /* character index in the font */ 334 uint8_t fg_colour; 335 uint8_t bg_colour; 336 uint16_t x, y; 337 void *future; 338 } __packed *sti_unpmvin_t; 339 340 typedef struct sti_unpmvout { 341 uint32_t errno; 342 void *future; 343 } __packed *sti_unpmvout_t; 344 345 STI_DEP(unpmv); 346 347 typedef struct sti_blkmvflags { 348 uint32_t flags; 349 #define STI_BLKMVF_WAIT 0x80000000 350 #define STI_BLKMVF_COLR 0x40000000 /* change colour on move */ 351 #define STI_BLKMVF_CLR 0x20000000 /* clear on move */ 352 #define STI_BLKMVF_NTXT 0x10000000 /* move in non-text planes */ 353 void *future; 354 } __packed *sti_blkmvflags_t; 355 356 typedef struct sti_blkmvin { 357 uint8_t fg_colour; 358 uint8_t bg_colour; 359 uint16_t srcx, srcy, dstx, dsty; 360 uint16_t width, height; 361 uint16_t pad; 362 void *future; 363 } __packed *sti_blkmvin_t; 364 365 typedef struct sti_blkmvout { 366 uint32_t errno; 367 void *future; 368 } __packed *sti_blkmvout_t; 369 370 STI_DEP(blkmv); 371 372 typedef struct sti_testflags { 373 uint32_t flags; 374 #define STI_TESTF_WAIT 0x80000000 375 #define STI_TESTF_ETST 0x40000000 376 void *future; 377 } __packed *sti_testflags_t; 378 379 typedef struct sti_testin { 380 void *future; 381 } __packed *sti_testin_t; 382 383 typedef struct sti_testout { 384 uint32_t errno; 385 uint32_t result; 386 void *future; 387 } __packed *sti_testout_t; 388 389 STI_DEP(test); 390 391 typedef struct sti_exhdlflags { 392 uint32_t flags; 393 #define STI_EXHDLF_WAIT 0x80000000 394 #define STI_EXHDLF_CINT 0x40000000 /* clear int */ 395 #define STI_EXHDLF_CBE 0x20000000 /* clear BE */ 396 #define STI_EXHDLF_PINT 0x10000000 /* preserve int */ 397 #define STI_EXHDLF_RINT 0x08000000 /* restore int */ 398 #define STI_EXHDLF_WEIM 0x04000000 /* write eim w/ sti_eexhdlin */ 399 #define STI_EXHDLF_REIM 0x02000000 /* read eim to sti_eexhdlout */ 400 #define STI_EXHDLF_GIE 0x01000000 /* global int enable */ 401 #define STI_EXHDLF_PGIE 0x00800000 402 #define STI_EXHDLF_WIEM 0x00400000 403 #define STI_EXHDLF_EIEM 0x00200000 404 #define STI_EXHDLF_BIC 0x00100000 /* begin int cycle */ 405 #define STI_EXHDLF_EIC 0x00080000 /* end int cycle */ 406 #define STI_EXHDLF_RIE 0x00040000 /* reset do not clear int enables */ 407 void *future; 408 } __packed *sti_exhdlflags_t; 409 410 typedef struct sti_eexhdlin { 411 uint32_t eim_addr; 412 uint32_t eim_data; 413 uint32_t iem; /* enable mask */ 414 uint32_t icm; /* clear mask */ 415 void *future; 416 } __packed *sti_eexhdlin_t; 417 418 typedef struct sti_exhdlint { 419 uint32_t flags; 420 #define STI_EXHDLINT_BET 0x80000000 /* bus error timer */ 421 #define STI_EXHDLINT_HW 0x40000000 /* high water */ 422 #define STI_EXHDLINT_LW 0x20000000 /* low water */ 423 #define STI_EXHDLINT_TM 0x10000000 /* texture map */ 424 #define STI_EXHDLINT_VB 0x08000000 /* vertical blank */ 425 #define STI_EXHDLINT_UDC 0x04000000 /* unbuffered dma complete */ 426 #define STI_EXHDLINT_BDC 0x02000000 /* buffered dma complete */ 427 #define STI_EXHDLINT_UDPC 0x01000000 /* unbuf priv dma complete */ 428 #define STI_EXHDLINT_BDPC 0x00800000 /* buffered priv dma complete */ 429 } __packed *sti_exhdlint_t; 430 431 typedef struct sti_exhdlin { 432 sti_exhdlint_t addr; 433 sti_eexhdlin_t ext; 434 } __packed *sti_exhdlin_t; 435 436 typedef struct sti_eexhdlout { 437 uint32_t eim_addr; 438 uint32_t eim_data; 439 uint32_t iem; /* enable mask */ 440 uint32_t icm; /* clear mask */ 441 void *future; 442 } __packed *sti_eexhdlout_t; 443 444 typedef struct sti_exhdlout { 445 uint32_t errno; 446 uint32_t flags; 447 #define STI_EXHDLO_BE 0x80000000 /* BE was intercepted */ 448 #define STI_EXHDLO_IP 0x40000000 /* there is int pending */ 449 #define STI_EXHDLO_IE 0x20000000 /* global enable set */ 450 sti_eexhdlout_t ext; 451 } __packed *sti_exhdlout_t; 452 453 STI_DEP(exhdl); 454 455 typedef struct sti_inqconfflags { 456 uint32_t flags; 457 #define STI_INQCONFF_WAIT 0x80000000 458 void *future; 459 } __packed *sti_inqconfflags_t; 460 461 typedef struct sti_inqconfin { 462 void *future; 463 } __packed *sti_inqconfin_t; 464 465 typedef struct sti_einqconfout { 466 uint32_t crt_config[3]; 467 uint32_t crt_hw[3]; 468 void *future; 469 } __packed *sti_einqconfout_t; 470 471 typedef struct sti_inqconfout { 472 uint32_t errno; 473 uint16_t width, height, owidth, oheight, fbwidth, fbheight; 474 uint32_t bpp; /* bits per pixel */ 475 uint32_t bppu; /* accessible bpp */ 476 uint32_t planes; 477 uint8_t name[STI_DEVNAME_LEN]; 478 uint32_t attributes; 479 #define STI_INQCONF_Y2X 0x0001 /* pixel is higher than wider */ 480 #define STI_INQCONF_HWBLKMV 0x0002 /* hw blkmv is present */ 481 #define STI_INQCONF_AHW 0x0004 /* adv hw accel */ 482 #define STI_INQCONF_INT 0x0008 /* can interrupt */ 483 #define STI_INQCONF_GONOFF 0x0010 /* supports on/off */ 484 #define STI_INQCONF_AONOFF 0x0020 /* supports alpha on/off */ 485 #define STI_INQCONF_VARY 0x0040 /* variable fb height */ 486 #define STI_INQCONF_ODDBYTES 0x0080 /* use only odd fb bytes */ 487 #define STI_INQCONF_FLUSH 0x0100 /* fb cache requires flushing */ 488 #define STI_INQCONF_DMA 0x0200 /* supports dma */ 489 #define STI_INQCONF_VDMA 0x0400 /* supports vdma */ 490 #define STI_INQCONF_YUV1 0x2000 /* supports YUV type 1 */ 491 #define STI_INQCONF_YUV2 0x4000 /* supports YUV type 2 */ 492 #define STI_INQCONF_BITS \ 493 "\020\001y2x\002hwblkmv\003ahw\004int\005gonoff\006aonoff\007vary"\ 494 "\010oddb\011flush\012dma\013vdma\016yuv1\017yuv2" 495 sti_einqconfout_t ext; 496 } __packed *sti_inqconfout_t; 497 498 STI_DEP(inqconf); 499 500 typedef struct sti_scmentflags { 501 uint32_t flags; 502 #define STI_SCMENTF_WAIT 0x80000000 503 void *future; 504 } __packed *sti_scmentflags_t; 505 506 typedef struct sti_scmentin { 507 uint32_t entry; 508 uint32_t value; 509 void *future; 510 } __packed *sti_scmentin_t; 511 512 typedef struct sti_scmentout { 513 uint32_t errno; 514 void *future; 515 } __packed *sti_scmentout_t; 516 517 STI_DEP(scment); 518 519 typedef struct sti_dmacflags { 520 uint32_t flags; 521 #define STI_DMACF_WAIT 0x80000000 522 #define STI_DMACF_PRIV 0x40000000 /* priv dma */ 523 #define STI_DMACF_DIS 0x20000000 /* disable */ 524 #define STI_DMACF_BUF 0x10000000 /* buffered */ 525 #define STI_DMACF_MRK 0x08000000 /* write a marker */ 526 #define STI_DMACF_ABRT 0x04000000 /* abort dma xfer */ 527 void *future; 528 } __packed *sti_dmacflags_t; 529 530 typedef struct sti_dmacin { 531 uint32_t pa_upper; 532 uint32_t pa_lower; 533 uint32_t len; 534 uint32_t mrk_data; 535 uint32_t mrk_off; 536 void *future; 537 } __packed *sti_dmacin_t; 538 539 typedef struct sti_dmacout { 540 uint32_t errno; 541 void *future; 542 } __packed *sti_dmacout_t; 543 544 STI_DEP(dmac); 545 546 typedef struct sti_flowcflags { 547 uint32_t flags; 548 #define STI_FLOWCF_WAIT 0x80000000 549 #define STI_FLOWCF_CHW 0x40000000 /* check high water */ 550 #define STI_FLOWCF_WHW 0x20000000 /* write high water */ 551 #define STI_FLOWCF_WLW 0x10000000 /* write low water */ 552 #define STI_FLOWCF_PCSE 0x08000000 /* preserve cse */ 553 #define STI_FLOWCF_CSE 0x04000000 554 #define STI_FLOWCF_CSWF 0x02000000 /* cs write fine */ 555 #define STI_FLOWCF_CSWC 0x01000000 /* cs write coarse */ 556 #define STI_FLOWCF_CSWQ 0x00800000 /* cs write fifo */ 557 void *future; 558 } __packed *sti_flowcflags_t; 559 560 typedef struct sti_flowcin { 561 uint32_t retry; 562 uint32_t bufz; 563 uint32_t hwcnt; 564 uint32_t lwcnt; 565 uint32_t csfv; /* cs fine value */ 566 uint32_t cscv; /* cs coarse value */ 567 uint32_t csqc; /* cs fifo count */ 568 void *future; 569 } __packed *sti_flowcin_t; 570 571 typedef struct sti_flowcout { 572 uint32_t errno; 573 uint32_t retry_result; 574 uint32_t fifo_size; 575 void *future; 576 } __packed *sti_flowcout_t; 577 578 STI_DEP(flowc); 579 580 typedef struct sti_utimingflags { 581 uint32_t flags; 582 #define STI_UTIMF_WAIT 0x80000000 583 #define STI_UTIMF_HKS 0x40000000 /* has kbuf_size */ 584 void *future; 585 } __packed *sti_utimingflags_t; 586 587 typedef struct sti_utimingin { 588 void *data; 589 void *kbuf; 590 void *future; 591 } __packed *sti_utimingin_t; 592 593 typedef struct sti_utimingout { 594 uint32_t errno; 595 uint32_t kbuf_size; /* buffer required size */ 596 void *future; 597 } __packed *sti_utimingout_t; 598 599 STI_DEP(utiming); 600 601 typedef struct sti_pmgrflags { 602 uint32_t flags; 603 #define STI_UTIMF_WAIT 0x80000000 604 #define STI_UTIMOP_CLEANUP 0x00000000 605 #define STI_UTIMOP_BAC 0x10000000 606 #define STI_UTIMF_CRIT 0x04000000 607 #define STI_UTIMF_BUFF 0x02000000 608 #define STI_UTIMF_IBUFF 0x01000000 609 void *future; 610 } __packed *sti_pmgrflags_t; 611 612 typedef struct sti_pmgrin { 613 uint32_t reserved[4]; 614 void *future; 615 } __packed *sti_pmgrin_t; 616 617 typedef struct sti_pmgrout { 618 int32_t errno; 619 void *future; 620 } __packed *sti_pmgrout_t; 621 622 STI_DEP(pmgr); 623 624 typedef struct sti_utilflags { 625 uint32_t flags; 626 #define STI_UTILF_ROOT 0x80000000 /* was called as root */ 627 void *future; 628 } __packed *sti_utilflags_t; 629 630 typedef struct sti_utilin { 631 uint32_t in_size; 632 uint32_t out_size; 633 uint8_t *buf; 634 } __packed *sti_utilin_t; 635 636 typedef struct sti_utilout { 637 int32_t errno; 638 void *future; 639 } __packed *sti_utilout_t; 640 641 STI_DEP(util); 642 643 /* 644 * NGLE register layout. 645 * Based upon xc/programs/Xserver/hw/hp/ngle/dregs.h 646 */ 647 648 #define BA(F,C,S,A,J,B,I) \ 649 (((F)<<31)|((C)<<27)|((S)<<24)|((A)<<21)|((J)<<16)|((B)<<12)|(I)) 650 /* FCCC CSSS AAAJ JJJJ BBBB IIII IIII IIII */ 651 652 /* F */ 653 #define IndexedDcd 0 /* Pixel data is indexed (pseudo) color */ 654 #define FractDcd 1 /* Pixel data is Fractional 8-8-8 */ 655 /* C */ 656 #define Otc04 2 /* Pixels in each longword transfer (4) */ 657 #define Otc32 5 /* Pixels in each longword transfer (32) */ 658 #define Otc24 7 /* NGLE uses this for 24bit blits */ 659 /* S */ 660 #define Ots08 3 /* Each pixel is size (8)d transfer (1) */ 661 #define OtsIndirect 6 /* Each bit goes through FG/BG color(8) */ 662 /* A */ 663 #define AddrByte 3 /* byte access? Used by NGLE for direct fb */ 664 #define AddrLong 5 /* FB address is Long aligned (pixel) */ 665 #define Addr24 7 /* used for colour map access */ 666 /* B */ 667 #define BINapp0I 0x0 /* Application Buffer 0, Indexed */ 668 #define BINapp1I 0x1 /* Application Buffer 1, Indexed */ 669 #define BINovly 0x2 /* 8 bit overlay */ 670 #define BINcursor 0x6 /* cursor bitmap on EG */ 671 #define BINcmask 0x7 /* cursor mask on EG */ 672 #define BINapp0F8 0xa /* Application Buffer 0, Fractional 8-8-8 */ 673 #define BINattr 0xd /* Attribute Bitmap */ 674 #define BINcmap 0xf /* colour map(s) */ 675 /* other buffers are unknown */ 676 /* J - 'BA just point' - function unknown */ 677 /* I - 'BA index base' - function unknown */ 678 679 #define IBOvals(R,M,X,S,D,L,B,F) \ 680 (((R)<<8)|((M)<<16)|((X)<<24)|((S)<<29)|((D)<<28)|((L)<<31)|((B)<<1)|(F)) 681 /* LSSD XXXX MMMM MMMM RRRR RRRR ???? ??BF */ 682 683 /* R is a standard X11 ROP, no idea if the other bits areused for anything */ 684 #define RopClr 0x0 685 #define RopSrc 0x3 686 #define RopInv 0xc 687 #define RopSet 0xf 688 /* M: 'mask addr offset' - function unknown */ 689 /* X */ 690 #define BitmapExtent08 3 /* Each write hits ( 8) bits in depth */ 691 #define BitmapExtent32 5 /* Each write hits (32) bits in depth */ 692 /* S: 'static reg' flag, NGLE sets it for blits, function is unknown but 693 we get occasional garbage in 8bit blits without it */ 694 /* D */ 695 #define DataDynamic 0 /* Data register reloaded by direct access */ 696 /* L */ 697 #define MaskDynamic 1 /* Mask register reloaded by direct access */ 698 #define MaskOtc 0 /* Mask contains Object Count valid bits */ 699 /* B = 1 -> background transparency for masked fills */ 700 /* F probably the same for foreground */ 701 702 #define NGLE_REG_1 0x000118 /* Artist LUT blt ctrl */ 703 #define NGLE_REG_28 0x000420 /* HCRX video bus access */ 704 #define NGLE_REG_2 0x000480 /* BINC src */ 705 #define NGLE_REG_3 0x0004a0 /* BINC dst */ 706 #define NGLE_REG_22 0x0005a0 /* BINC dst mask */ 707 #define NGLE_REG_23 0x0005c0 /* BINC data */ 708 #define NGLE_REG_4 0x000600 /* palette data */ 709 #define NGLE_REG_5 0x0006a0 /* cursor data */ 710 #define NGLE_REG_6 0x000800 /* rectfill XY */ 711 #define NGLE_REG_7 0x000804 /* bitblt size WH */ 712 #define NGLE_REG_24 0x000808 /* bitblt src XY */ 713 #define NGLE_REG_8 0x000820 /* 'transfer data' - this is */ 714 /* a pixel mask on fills */ 715 #define NGLE_REG_37 0x000944 /* HCRX fast rect fill, size */ 716 #define NGLE_REG_9 0x000a04 /* rect fill size, start */ 717 #define NGLE_REG_25 0x000b00 /* bitblt dst XY, start */ 718 #define NGLE_REG_RAMDAC 0x001000 719 #define NGLE_REG_10 0x018000 /* buffer ctl */ 720 #define NGLE_REG_11 0x018004 /* dest bitmap access */ 721 #define NGLE_REG_12 0x01800c /* control plane register */ 722 #define NGLE_REG_35 0x018010 /* fg colour */ 723 #define NGLE_REG_36 0x018014 /* bg colour */ 724 #define NGLE_REG_13 0x018018 /* image planemask */ 725 #define NGLE_REG_14 0x01801c /* raster op */ 726 #define NGLE_REG_15 0x200000 /* 'busy dodger' idle */ 727 #define DODGER_IDLE 0x1000 /* or 0x10000, likely tpyo */ 728 #define NGLE_REG_15b0 0x200000 /* busy register */ 729 #define NGLE_REG_16 0x200004 730 #define NGLE_REG_16b1 0x200005 /* setup copyarea */ 731 #define NGLE_REG_16b3 0x200007 /* ROM table index on CRX */ 732 #define NGLE_REG_34 0x200008 /* # of fifo slots */ 733 #define NGLE_REG_17 0x200100 /* cursor coordinates */ 734 #define NGLE_REG_18 0x200104 /* cursor enable */ 735 #define NGLE_REG_26 0x200118 /* EG LUT blt ctrl */ 736 #define NGLE_REG_19 0x200200 /* artist sprite size */ 737 #define NGLE_REG_20 0x200208 /* cursor geometry */ 738 #define NGLE_REG_21 0x200218 /* Artist misc video */ 739 #define NGLE_REG_27 0x200308 /* Artist misc ctrl */ 740 #define NGLE_REG_29 0x210000 /* HCRX cursor coord & enable */ 741 #define HCRX_ENABLE_CURSOR 0x80000000 742 #define NGLE_REG_30 0x210004 /* HCRX cursor address */ 743 #define NGLE_REG_31 0x210008 /* HCRX cursor data */ 744 #define NGLE_REG_38 0x210020 /* HCRX LUT blt ctrl */ 745 /* EWRRRROO OOOOOOOO TTRRRRLL LLLLLLLL */ 746 #define LBC_ENABLE 0x80000000 747 #define LBC_WAIT_BLANK 0x40000000 748 #define LBS_OFFSET_SHIFT 16 749 #define LBC_TYPE_MASK 0xc000 750 #define LBC_TYPE_CMAP 0 751 #define LBC_TYPE_CURSOR 0x8000 752 #define LBC_TYPE_OVERLAY 0xc000 753 #define LBC_LENGTH_SHIFT 0 754 #define NGLE_REG_41 0x210024 755 #define NGLE_REG_42 0x210028 /* these seem to control */ 756 #define NGLE_REG_43 0x21002c /* how the 24bit planes */ 757 #define NGLE_REG_44 0x210030 /* are displayed on HCRX - */ 758 #define NGLE_REG_45 0x210034 /* no info on bits */ 759 #define NGLE_REG_32 0x21003c /* HCRX plane enable */ 760 #define NGLE_REG_33 0x210040 /* HCRX misc video */ 761 #define HCRX_VIDEO_ENABLE 0x0A000000 762 #define NGLE_REG_39 0x210120 /* HCRX 'hyperbowl' mode 2 */ 763 #define HYPERBOWL_MODE2_8_24 15 764 #define NGLE_REG_40 0x210130 /* HCRX 'hyperbowl' */ 765 #define HYPERBOWL_MODE_FOR_8_OVER_88_LUT0_NO_TRANSPARENCIES 4 766 #define HYPERBOWL_MODE01_8_24_LUT0_TRANSPARENT_LUT1_OPAQUE 8 767 #define HYPERBOWL_MODE01_8_24_LUT0_OPAQUE_LUT1_OPAQUE 10 768 769 #define NGLE_BUFF0_CMAP0 0x00001e02 770 #define NGLE_BUFF1_CMAP0 0x02001e02 771 #define NGLE_BUFF1_CMAP3 0x0c001e02 772 #define NGLE_ARTIST_CMAP0 0x00000102 773 774 /* mimic HP/UX, this will return the device's graphics ID */ 775 #define GCID _IOR('G', 40, u_int) 776 777 #endif /* _IC_STIREG_H_ */ 778
Indexes created Mon Sep 29 13:09:55 GMT 2025