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summitreg.h revision 1.13
      1  1.13  macallan /*	$NetBSD: summitreg.h,v 1.13 2025/01/24 07:43:42 macallan Exp $	*/
      2   1.1  macallan 
      3   1.1  macallan /*
      4   1.1  macallan  * Copyright (c) 2024 Michael Lorenz
      5   1.1  macallan  * All rights reserved.
      6   1.1  macallan  *
      7   1.1  macallan  * Redistribution and use in source and binary forms, with or without
      8   1.1  macallan  * modification, are permitted provided that the following conditions
      9   1.1  macallan  * are met:
     10   1.1  macallan  * 1. Redistributions of source code must retain the above copyright
     11   1.1  macallan  *    notice, this list of conditions and the following disclaimer.
     12   1.1  macallan  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1  macallan  *    notice, this list of conditions and the following disclaimer in the
     14   1.1  macallan  *    documentation and/or other materials provided with the distribution.
     15   1.1  macallan  *
     16   1.1  macallan  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17   1.1  macallan  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18   1.1  macallan  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19   1.1  macallan  * IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
     20   1.1  macallan  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     21   1.1  macallan  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     22   1.1  macallan  * SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23   1.1  macallan  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     24   1.1  macallan  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
     25   1.1  macallan  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
     26   1.1  macallan  * THE POSSIBILITY OF SUCH DAMAGE.
     27   1.1  macallan  */
     28   1.1  macallan 
     29   1.1  macallan /* HP Visualize FX 4 and related hardware, aka Summit */
     30   1.1  macallan 
     31   1.1  macallan /*
     32   1.1  macallan  * register values, found by disassembling the ROM
     33   1.1  macallan  * some found by Sven Schnelle
     34   1.1  macallan  * ( see https://patchwork.kernel.org/project/linux-parisc/patch/20211031204952.25678-2-svens@stackframe.org/ )
     35   1.1  macallan  * some by me
     36   1.1  macallan  */
     37   1.1  macallan 
     38   1.1  macallan #ifndef SUMMITREG_H
     39   1.1  macallan #define SUMMITREG_H
     40   1.1  macallan 
     41  1.10  macallan #define VISFX_CONTROL		0x641000
     42  1.12  macallan 	#define CONTROL_WFC	0x00000200	// FIFO when 0, direct when 1
     43  1.12  macallan #define VISFX_FC		0x641040	// Fault Control
     44   1.1  macallan #define VISFX_STATUS		0x641400	// zero when idle
     45   1.5  riastrad #define VISFX_FIFO		0x641440
     46  1.12  macallan #define VISFX_FOE		0x920404	// Fragment Operation Enable
     47  1.12  macallan 	#define FOE_TEXTURE	0x00000001
     48  1.12  macallan 	#define FOE_SPECULAR	0x00000002
     49  1.12  macallan 	#define FOE_DEPTHCUE	0x00000004
     50  1.12  macallan 	#define FOE_ALPHATEST	0x00000008
     51  1.12  macallan 	#define FOE_STENCIL	0x00000010
     52  1.12  macallan 	#define FOE_Z_TEST	0x00000020
     53  1.12  macallan 	#define FOE_BLEND_ROP	0x00000040	// IBO is used
     54  1.12  macallan 	#define FOE_DITHER	0x00000080
     55  1.12  macallan #define VISFX_IBO		0x921110	// ROP in lowest nibble
     56  1.10  macallan #define VISFX_IAA0		0x921200	// XLUT, 16 entries
     57  1.10  macallan #define VISFX_IAA(n)		(0x921200 + ((n) << 2))
     58  1.10  macallan #define VISFX_OTR		0x921148	// overlay transparency
     59  1.10  macallan 
     60   1.1  macallan #define VISFX_VRAM_WRITE_MODE	0xa00808
     61  1.10  macallan #define VISFX_VRAM_READ_MODE	0xa0080c
     62   1.1  macallan #define VISFX_PIXEL_MASK	0xa0082c
     63   1.1  macallan #define VISFX_FG_COLOUR		0xa0083c
     64   1.1  macallan #define VISFX_BG_COLOUR		0xa00844
     65   1.1  macallan #define VISFX_PLANE_MASK	0xa0084c
     66   1.6  macallan /* this controls what we see in the FB aperture */
     67   1.6  macallan #define VISFX_APERTURE_ACCESS	0xa00858
     68  1.12  macallan 	#define VISFX_DEPTH_8	0x30
     69  1.12  macallan 	#define VISFX_DEPTH_32	0x50
     70  1.13  macallan #define VISFX_RPH		0xa0085c	// read prefetch hint
     71  1.13  macallan 	#define VISFX_RPH_RTL	0x80000000	// right-to-left
     72  1.13  macallan 	#define VISFX_RPH_LTR	0x00000000	// left-to-right
     73  1.13  macallan 
     74  1.13  macallan #define VISFX_READ_DATA		0xa41480
     75   1.6  macallan 
     76   1.2  macallan #define VISFX_VRAM_WRITE_DATA_INCRX	0xa60000
     77   1.2  macallan #define VISFX_VRAM_WRITE_DATA_INCRY	0xa68000
     78   1.2  macallan #define VISFX_VRAM_WRITE_DEST		0xac1000
     79  1.12  macallan #define VISFX_TCR			0xac1024	/* throttle control */
     80   1.4  macallan #define VISFX_CLIP_TL		0xac1050	/* clipping rect, top/left */
     81   1.4  macallan #define VISFX_CLIP_WH		0xac1054	/* clipping rect, w/h */
     82   1.1  macallan 
     83   1.1  macallan #define VISFX_WRITE_MODE_PLAIN	0x02000000
     84   1.1  macallan #define VISFX_WRITE_MODE_EXPAND	0x050004c0
     85   1.1  macallan #define VISFX_WRITE_MODE_FILL	0x050008c0
     86   1.3  macallan #define VISFX_WRITE_MODE_TRANSPARENT	0x00000800	/* bg is tansparent */
     87   1.3  macallan #define VISFX_WRITE_MODE_MASK		0x00000400	/* apply pixel mask */
     88   1.7  macallan /* 0x00000200 - some pattern */
     89   1.7  macallan /* looks like 0x000000c0 enables fb/bg colours to be applied */
     90   1.1  macallan 
     91   1.2  macallan #define VISFX_READ_MODE_COPY	0x02000400
     92   1.2  macallan 
     93  1.10  macallan #define OTC01	0x00000000	/* one pixel per 32bit write */
     94  1.10  macallan #define OTC04	0x02000000	/* 4 pixels per 32bit write */
     95  1.10  macallan #define OTC32	0x05000000	/* 32 pixels per 32bit write */
     96  1.10  macallan #define BIN8I	0x00000000	/* 8bit indexed */
     97  1.10  macallan #define BIN12I	0x00010000	/* 12bit indexed */
     98  1.10  macallan #define BIN332F	0x00040000	/* R3G3B2 */
     99  1.10  macallan #define BIN8F	0x00070000	/* ARGB8 */
    100  1.10  macallan #define BINapln	0x00110000	/* attribute plane */
    101  1.10  macallan #define BINhost	0x00300000	/* DMA to host */
    102  1.10  macallan #define BUFovl	0x00000000	/* 8bit overlay */
    103  1.10  macallan #define BUFBL	0x00008000	/* back/left */
    104  1.10  macallan #define BUFFL	0x00004000	/* front/left */
    105  1.10  macallan #define BUFBR	0x00002000	/* back/right */
    106  1.10  macallan #define BUFFR	0x00001000	/* front/right */
    107  1.10  macallan 
    108  1.13  macallan /* attribute table, this only selects depth and CFS */
    109  1.10  macallan #define IAA_8I		0x00000000	/* 8bit CI */
    110  1.10  macallan #define IAA_8F		0x00000070	/* RGB8 */
    111  1.10  macallan #define IAA_CFS0	0x00000000	/* CFS select */
    112  1.10  macallan #define IAA_CFS1	0x00000100	/* CFS 1 etc. */
    113  1.10  macallan 
    114  1.10  macallan #define OTR_T	0x00010000	/* when set 0 is transparent, otherwise 0xff */
    115  1.10  macallan #define OTR_A	0x00000100	/* always transparent */
    116  1.10  macallan #define OTR_L1	0x00000002	/* transparency controlled by CFS17 */
    117  1.10  macallan #define OTR_L0	0x00000001	/* transparency controlled by CFS16 */
    118  1.10  macallan 
    119   1.7  macallan /*
    120   1.7  macallan  * for STI colour change mode:
    121   1.7  macallan  * set VISFX_FG_COLOUR, VISFX_BG_COLOUR
    122   1.7  macallan  * set VISFX_VRAM_READ_MODE 0x05000400
    123   1.7  macallan  * set VISFX_VRAM_WRITE_MODE 0x050000c0
    124   1.7  macallan  */
    125   1.7  macallan 
    126   1.2  macallan /* fill */
    127   1.1  macallan #define VISFX_START		0xb3c000
    128   1.2  macallan #define VISFX_SIZE		0xb3c808	/* start, FX4 uses 0xb3c908 */
    129   1.2  macallan 
    130   1.2  macallan /* copy */
    131   1.2  macallan #define VISFX_COPY_SRC		0xb3c010
    132   1.2  macallan #define VISFX_COPY_WH		0xb3c008
    133   1.2  macallan #define VISFX_COPY_DST		0xb3cc00
    134   1.2  macallan /*
    135   1.2  macallan  * looks like ORing 0x800 to the register address starts a command
    136   1.7  macallan  * - 0x800 - fill
    137   1.7  macallan  * - 0xc00 - copy
    138   1.7  macallan  * 0x100 and 0x200 seem to have functions as well, not sure what though
    139   1.7  macallan  * for example, the FX4 ROM uses 0xb3c908 to start a rectangle fill, but
    140   1.7  macallan  * it also works with 0xb3c808 and 0xb3ca08
    141   1.7  macallan  * same with copy, 0xc00 seems to be what matters, setting 0x100 or 0x200
    142   1.7  macallan  * doesn't seem to make a difference
    143   1.7  macallan  * 0x400 or 0x100 by themselves don't start a command either
    144   1.2  macallan  */
    145   1.1  macallan 
    146   1.8  macallan /*
    147   1.9  macallan  * Turns out 0x40xxxx and 0x80xxxx access the same registers, one difference
    148   1.9  macallan  * is that through 0x80xxxx we can read back at least some values, so use
    149   1.9  macallan  * that one
    150   1.8  macallan  * The _POS, _INDEX and _DATA registers work exactly like on HCRX
    151   1.8  macallan  */
    152   1.1  macallan 
    153  1.13  macallan #define VISFX_CURSOR_POS	0x400000
    154   1.8  macallan #define VISFX_CURSOR_ENABLE	0x80000000
    155  1.13  macallan #define VISFX_CURSOR_INDEX	0x400004
    156  1.13  macallan #define VISFX_CURSOR_DATA	0x400008
    157  1.13  macallan #define VISFX_CURSOR_FG		0x40000c
    158  1.13  macallan #define VISFX_CURSOR_BG		0x400010
    159   1.9  macallan #define VISFX_COLOR_MASK	0x800018
    160   1.9  macallan #define VISFX_COLOR_INDEX	0x800020
    161   1.9  macallan #define VISFX_COLOR_VALUE	0x800024
    162  1.10  macallan #define VISFX_FATTR		0x80003c	/* force attribute */
    163  1.10  macallan #define VISFX_MPC		0x80004c
    164  1.10  macallan 	#define MPC_VIDEO_ON	0x0c
    165  1.10  macallan 	#define MPC_VSYNC_OFF	0x02
    166  1.10  macallan 	#define MPC_HSYNC_OFF	0x01
    167  1.10  macallan #define VISFX_CFS0		0x800100	/* colour function select */
    168  1.10  macallan #define VISFX_CFS(n)		(VISFX_CFS0 + ((n) << 2))
    169  1.10  macallan /* 0 ... 6 for image planes, 7 or bypass, 16 and 17 for overlay */
    170  1.10  macallan #define CFS_CR		0x80	// enable color recovery
    171  1.11  macallan #define CFS_332		0x00	// R3G3B2
    172  1.11  macallan #define CFS_8I	 	0x40	// 8bit indexed
    173  1.10  macallan #define CFS_8F		0x70	// ARGB8
    174  1.10  macallan #define CFS_LUT0	0x00	// use LUT 0
    175  1.10  macallan #define CFS_LUT1	0x01	// LUT 1 etc.
    176  1.10  macallan #define CFS_BYPASS	0x07	// bypass LUT
    177   1.1  macallan 
    178   1.5  riastrad #endif	/* SUMMITREG_H */
    179